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1 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 1
 1 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 1
2 
 
 2 
 
3 
 
 3 
 
4 
   1              		.cpu cortex-m3
 4 
   1              		.cpu cortex-m3
5 
   2              		.eabi_attribute 20, 1
 5 
   2              		.eabi_attribute 20, 1
6 
   3              		.eabi_attribute 21, 1
 6 
   3              		.eabi_attribute 21, 1
Line 13... Line 13...
13 
  10              		.eabi_attribute 18, 4
 13 
  10              		.eabi_attribute 18, 4
14 
  11              		.file	"main.c"
 14 
  11              		.file	"main.c"
15 
  12              		.text
 15 
  12              		.text
16 
  13              	.Ltext0:
 16 
  13              	.Ltext0:
17 
  14              		.cfi_sections	.debug_frame
 17 
  14              		.cfi_sections	.debug_frame
18 
  15              		.section	.text.user_delay_ms,"ax",%progbits
 18 
  15              		.section	.text.user_delay_us,"ax",%progbits
19 
  16              		.align	1
 19 
  16              		.align	1
20 
  17              		.arch armv7-m
 20 
  17              		.arch armv7-m
21 
  18              		.syntax unified
 21 
  18              		.syntax unified
22 
  19              		.thumb
 22 
  19              		.thumb
23 
  20              		.thumb_func
 23 
  20              		.thumb_func
24 
  21              		.fpu softvfp
 24 
  21              		.fpu softvfp
25 
  23              	user_delay_ms:
 25 
  23              	user_delay_us:
26 
  24              	.LVL0:
 26 
  24              	.LVL0:
27 
  25              	.LFB70:
 27 
  25              	.LFB70:
28 
  26              		.file 1 "Core/Src/main.c"
 28 
  26              		.file 1 "Core/Src/main.c"
29 
   1:Core/Src/main.c **** /* USER CODE BEGIN Header */
 29 
   1:Core/Src/main.c **** /* USER CODE BEGIN Header */
30 
   2:Core/Src/main.c **** /**
 30 
   2:Core/Src/main.c **** /**
Line 50... Line 50...
50 
  22:Core/Src/main.c **** #include "usb_device.h"
 50 
  22:Core/Src/main.c **** #include "usb_device.h"
51 
  23:Core/Src/main.c ****
51 
  23:Core/Src/main.c ****
52 
  24:Core/Src/main.c **** /* Private includes ----------------------------------------------------------*/
 52 
  24:Core/Src/main.c **** /* Private includes ----------------------------------------------------------*/
53 
  25:Core/Src/main.c **** /* USER CODE BEGIN Includes */
 53 
  25:Core/Src/main.c **** /* USER CODE BEGIN Includes */
54 
  26:Core/Src/main.c **** #include "libSerial/serial.h"
 54 
  26:Core/Src/main.c **** #include "libSerial/serial.h"
55 
  27:Core/Src/main.c **** #include "libBMP280/bmp280.h"
 55 
  27:Core/Src/main.c **** #include "libBME280/bme280.h"
56 
  28:Core/Src/main.c **** #include "display.h"
 56 
  28:Core/Src/main.c **** #include "display.h"
57 
  29:Core/Src/main.c **** /* USER CODE END Includes */
 57 
  29:Core/Src/main.c **** /* USER CODE END Includes */
58 
  30:Core/Src/main.c ****
58 
  30:Core/Src/main.c ****
59 
  31:Core/Src/main.c **** /* Private typedef -----------------------------------------------------------*/
 59 
  31:Core/Src/main.c **** /* Private typedef -----------------------------------------------------------*/
60 
  32:Core/Src/main.c **** /* USER CODE BEGIN PTD */
 60 
  32:Core/Src/main.c **** /* USER CODE BEGIN PTD */
61 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 2
 61 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 2
62 
 
 62 
 
63 
 
 63 
 
64 
  33:Core/Src/main.c ****
64 
  33:Core/Src/main.c ****
65 
  34:Core/Src/main.c **** /* USER CODE END PTD */
 65 
  34:Core/Src/main.c **** /* USER CODE END PTD */
66 
  35:Core/Src/main.c ****
66 
  35:Core/Src/main.c ****
Line 84... Line 84...
84 
  53:Core/Src/main.c **** TIM_HandleTypeDef htim4;
 84 
  53:Core/Src/main.c **** TIM_HandleTypeDef htim4;
85 
  54:Core/Src/main.c ****
85 
  54:Core/Src/main.c ****
86 
  55:Core/Src/main.c **** UART_HandleTypeDef huart1;
 86 
  55:Core/Src/main.c **** UART_HandleTypeDef huart1;
87 
  56:Core/Src/main.c ****
87 
  56:Core/Src/main.c ****
88 
  57:Core/Src/main.c **** /* USER CODE BEGIN PV */
 88 
  57:Core/Src/main.c **** /* USER CODE BEGIN PV */
- 
 
 89 
  58:Core/Src/main.c **** /* Structure that contains identifier details used in example */
89 
  58:Core/Src/main.c **** typedef struct
 90 
  59:Core/Src/main.c **** struct identifier
90 
  59:Core/Src/main.c **** {
 91 
  60:Core/Src/main.c **** {
91 
  60:Core/Src/main.c ****   uint8_t dev_addr;
 92 
  61:Core/Src/main.c ****     /* Variable to hold device address */
92 
  61:Core/Src/main.c **** } interface_t;
 93 
  62:Core/Src/main.c ****     uint8_t dev_addr;
93 
  62:Core/Src/main.c ****
94 
  63:Core/Src/main.c ****
94 
  63:Core/Src/main.c **** static int8_t
 95 
  64:Core/Src/main.c ****     /* Variable that contains file descriptor */
95 
  64:Core/Src/main.c **** user_i2c_write (uint8_t i2c_addr, uint8_t reg_addr, uint8_t *reg_data, uint32_t len)
 96 
  65:Core/Src/main.c ****     int8_t fd;
96 
  65:Core/Src/main.c **** {
 97 
  66:Core/Src/main.c **** };
97 
  66:Core/Src/main.c ****     HAL_StatusTypeDef st = HAL_I2C_Mem_Write(&hi2c2, i2c_addr<<1, reg_addr, 1, reg_data, len, 10000
 - 
 
98 
  67:Core/Src/main.c ****
98 
  67:Core/Src/main.c ****
99 
  68:Core/Src/main.c ****   return st != HAL_OK ?  BMP280_E_COMM_FAIL: BMP280_OK;
 - 
 
100 
  69:Core/Src/main.c ****
99 
  68:Core/Src/main.c ****
101 
  70:Core/Src/main.c **** }
 - 
 
102 
  71:Core/Src/main.c **** static int8_t
 100 
  69:Core/Src/main.c **** static int8_t
103 
  72:Core/Src/main.c **** user_i2c_read (uint8_t i2c_addr, uint8_t reg_addr, uint8_t *reg_data, uint32_t len)
 101 
  70:Core/Src/main.c **** user_i2c_write ( uint8_t reg_addr, uint8_t *reg_data, uint32_t len, struct identifier * intf)
104 
  73:Core/Src/main.c **** {
 102 
  71:Core/Src/main.c **** {
- 
 
 103 
  72:Core/Src/main.c ****
- 
 
 104 
  73:Core/Src/main.c ****   uint8_t i2c_addr = intf->dev_addr;
105 
  74:Core/Src/main.c ****   HAL_StatusTypeDef st = HAL_I2C_Mem_Read(&hi2c2, i2c_addr<<1, reg_addr, 1, reg_data, len, 10000);
 105 
  74:Core/Src/main.c ****     HAL_StatusTypeDef st = HAL_I2C_Mem_Write(&hi2c2, i2c_addr<<1, reg_addr, 1, reg_data, len, 10000
106 
  75:Core/Src/main.c ****
106 
  75:Core/Src/main.c ****
107 
  76:Core/Src/main.c ****   return st != HAL_OK ?  BMP280_E_COMM_FAIL: BMP280_OK;
 107 
  76:Core/Src/main.c ****   return st != HAL_OK ?  BME280_E_COMM_FAIL: BME280_OK;
108 
  77:Core/Src/main.c ****
108 
  77:Core/Src/main.c ****
109 
  78:Core/Src/main.c **** }
 109 
  78:Core/Src/main.c **** }
- 
 
 110 
  79:Core/Src/main.c **** static int8_t
- 
 
 111 
  80:Core/Src/main.c **** user_i2c_read ( uint8_t reg_addr, uint8_t *reg_data, uint32_t len, struct identifier * intf)
- 
 
 112 
  81:Core/Src/main.c **** {
- 
 
 113 
  82:Core/Src/main.c ****   uint8_t i2c_addr = intf->dev_addr;
- 
 
 114 
  83:Core/Src/main.c ****
- 
 
 115 
  84:Core/Src/main.c ****   HAL_StatusTypeDef st = HAL_I2C_Mem_Read(&hi2c2, i2c_addr<<1, reg_addr, 1, reg_data, len, 10000);
- 
 
 116 
  85:Core/Src/main.c ****
- 
 
 117 
  86:Core/Src/main.c ****   return st != HAL_OK ?  BME280_E_COMM_FAIL: BME280_OK;
- 
 
 118 
  87:Core/Src/main.c ****
- 
 
 119 
  88:Core/Src/main.c **** }
110 
  79:Core/Src/main.c ****
120 
  89:Core/Src/main.c ****
- 
 
 121 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 3
- 
 
 122 
 
- 
 
 123 
 
111 
  80:Core/Src/main.c **** static void
 124 
  90:Core/Src/main.c **** static void
112 
  81:Core/Src/main.c **** user_delay_ms (uint32_t ms, void *handle)
 125 
  91:Core/Src/main.c **** user_delay_us(uint32_t us, void *handle)
113 
  82:Core/Src/main.c **** {
 126 
  92:Core/Src/main.c **** {
114 
  27              		.loc 1 82 1 view -0
 127 
  27              		.loc 1 92 1 view -0
115 
  28              		.cfi_startproc
 128 
  28              		.cfi_startproc
116 
  29              		@ args = 0, pretend = 0, frame = 0
 129 
  29              		@ args = 0, pretend = 0, frame = 0
117 
  30              		@ frame_needed = 0, uses_anonymous_args = 0
 130 
  30              		@ frame_needed = 0, uses_anonymous_args = 0
118 
  31              		.loc 1 82 1 is_stmt 0 view .LVU1
 131 
  31              		.loc 1 92 1 is_stmt 0 view .LVU1
119 
  32 0000 08B5     		push	{r3, lr}
 132 
  32 0000 08B5     		push	{r3, lr}
120 
  33              	.LCFI0:
 133 
  33              	.LCFI0:
121 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 3
 - 
 
122 
 
 - 
 
123 
 
 - 
 
124 
  34              		.cfi_def_cfa_offset 8
 134 
  34              		.cfi_def_cfa_offset 8
125 
  35              		.cfi_offset 3, -8
 135 
  35              		.cfi_offset 3, -8
126 
  36              		.cfi_offset 14, -4
 136 
  36              		.cfi_offset 14, -4
127 
  83:Core/Src/main.c ****   HAL_Delay (ms);
 137 
  93:Core/Src/main.c ****   HAL_Delay ((us+999)/1000);
128 
  37              		.loc 1 83 3 is_stmt 1 view .LVU2
 138 
  37              		.loc 1 93 3 is_stmt 1 view .LVU2
129 
  38 0002 FFF7FEFF 		bl	HAL_Delay
 - 
 
130 
  39              	.LVL1:
 - 
 
131 
  84:Core/Src/main.c ****
- 
 
132 
  85:Core/Src/main.c **** }
 - 
 
133 
  40              		.loc 1 85 1 is_stmt 0 view .LVU3
 139 
  38              		.loc 1 93 17 is_stmt 0 view .LVU3
134 
  41 0006 08BD     		pop	{r3, pc}
 - 
 
135 
  42              		.cfi_endproc
 - 
 
136 
  43              	.LFE70:
 - 
 
137 
  45              		.section	.text.user_i2c_write,"ax",%progbits
 - 
 
138 
  46              		.align	1
 - 
 
139 
  47              		.syntax unified
 - 
 
140 
  48              		.thumb
 - 
 
141 
  49              		.thumb_func
 - 
 
142 
  50              		.fpu softvfp
 - 
 
143 
  52              	user_i2c_write:
 - 
 
144 
  53              	.LVL2:
 - 
 
145 
  54              	.LFB68:
 - 
 
146 
  65:Core/Src/main.c ****     HAL_StatusTypeDef st = HAL_I2C_Mem_Write(&hi2c2, i2c_addr<<1, reg_addr, 1, reg_data, len, 10000
 - 
 
147 
  55              		.loc 1 65 1 is_stmt 1 view -0
 - 
 
148 
  56              		.cfi_startproc
 - 
 
149 
  57              		@ args = 0, pretend = 0, frame = 0
 - 
 
150 
  58              		@ frame_needed = 0, uses_anonymous_args = 0
 - 
 
151 
  65:Core/Src/main.c ****     HAL_StatusTypeDef st = HAL_I2C_Mem_Write(&hi2c2, i2c_addr<<1, reg_addr, 1, reg_data, len, 10000
 - 
 
152 
  59              		.loc 1 65 1 is_stmt 0 view .LVU5
 - 
 
153 
  60 0000 10B5     		push	{r4, lr}
 - 
 
154 
  61              	.LCFI1:
 - 
 
155 
  62              		.cfi_def_cfa_offset 8
 - 
 
156 
  63              		.cfi_offset 4, -8
 - 
 
157 
  64              		.cfi_offset 14, -4
 - 
 
158 
  65 0002 84B0     		sub	sp, sp, #16
 - 
 
159 
  66              	.LCFI2:
 - 
 
160 
  67              		.cfi_def_cfa_offset 24
 - 
 
161 
  66:Core/Src/main.c ****
- 
 
162 
  68              		.loc 1 66 5 is_stmt 1 view .LVU6
 - 
 
163 
  66:Core/Src/main.c ****
- 
 
164 
  69              		.loc 1 66 28 is_stmt 0 view .LVU7
 - 
 
165 
  70 0004 42F21074 		movw	r4, #10000
 - 
 
166 
  71 0008 0294     		str	r4, [sp, #8]
 140 
  39 0002 00F2E730 		addw	r0, r0, #999
167 
  72 000a 9BB2     		uxth	r3, r3
 - 
 
168 
  73              	.LVL3:
 141 
  40              	.LVL1:
169 
  66:Core/Src/main.c ****
- 
 
170 
  74              		.loc 1 66 28 view .LVU8
 142 
  41              		.loc 1 93 3 view .LVU4
171 
  75 000c 0193     		str	r3, [sp, #4]
 - 
 
172 
  76 000e 0092     		str	r2, [sp]
 143 
  42 0006 034B     		ldr	r3, .L3
173 
  77 0010 0123     		movs	r3, #1
 - 
 
174 
  78 0012 0A46     		mov	r2, r1
 - 
 
175 
  79              	.LVL4:
 - 
 
176 
  66:Core/Src/main.c ****
- 
 
177 
  80              		.loc 1 66 28 view .LVU9
 - 
 
178 
  81 0014 00FA03F1 		lsl	r1, r0, r3
 144 
  43 0008 A3FB0030 		umull	r3, r0, r3, r0
179 
  82              	.LVL5:
 145 
  44              	.LVL2:
180 
  66:Core/Src/main.c ****
- 
 
181 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 4
 - 
 
182 
 
 - 
 
183 
 
 - 
 
184 
  83              		.loc 1 66 28 view .LVU10
 146 
  45              		.loc 1 93 3 view .LVU5
185 
  84 0018 0448     		ldr	r0, .L8
 147 
  46 000c 8009     		lsrs	r0, r0, #6
186 
  85              	.LVL6:
 - 
 
187 
  66:Core/Src/main.c ****
- 
 
188 
  86              		.loc 1 66 28 view .LVU11
 - 
 
189 
  87 001a FFF7FEFF 		bl	HAL_I2C_Mem_Write
 148 
  47 000e FFF7FEFF 		bl	HAL_Delay
190 
  88              	.LVL7:
 149 
  48              	.LVL3:
191 
  68:Core/Src/main.c ****
150 
  94:Core/Src/main.c **** }
192 
  89              		.loc 1 68 3 is_stmt 1 view .LVU12
 151 
  49              		.loc 1 94 1 view .LVU6
193 
  68:Core/Src/main.c ****
- 
 
194 
  90              		.loc 1 68 44 is_stmt 0 view .LVU13
 - 
 
195 
  91 001e 10B9     		cbnz	r0, .L7
 - 
 
196 
  92 0020 0020     		movs	r0, #0
 - 
 
197 
  93              	.LVL8:
 - 
 
198 
  94              	.L4:
 - 
 
199 
  70:Core/Src/main.c **** static int8_t
 - 
 
200 
  95              		.loc 1 70 1 discriminator 4 view .LVU14
 - 
 
201 
  96 0022 04B0     		add	sp, sp, #16
 - 
 
202 
  97              	.LCFI3:
 - 
 
203 
  98              		.cfi_remember_state
 - 
 
204 
  99              		.cfi_def_cfa_offset 8
 - 
 
205 
 100              		@ sp needed
 - 
 
206 
 101 0024 10BD     		pop	{r4, pc}
 152 
  50 0012 08BD     		pop	{r3, pc}
207 
 102              	.LVL9:
 - 
 
208 
 103              	.L7:
 - 
 
209 
 104              	.LCFI4:
 - 
 
210 
 105              		.cfi_restore_state
 - 
 
211 
  68:Core/Src/main.c ****
- 
 
212 
 106              		.loc 1 68 44 view .LVU15
 - 
 
213 
 107 0026 6FF00300 		mvn	r0, #3
 - 
 
214 
 108              	.LVL10:
 - 
 
215 
  68:Core/Src/main.c ****
- 
 
216 
 109              		.loc 1 68 44 view .LVU16
 - 
 
217 
 110 002a FAE7     		b	.L4
 - 
 
218 
 111              	.L9:
 153 
  51              	.L4:
219 
 112              		.align	2
 154 
  52              		.align	2
220 
 113              	.L8:
 155 
  53              	.L3:
221 
 114 002c 00000000 		.word	hi2c2
 156 
  54 0014 D34D6210 		.word	274877907
222 
 115              		.cfi_endproc
 157 
  55              		.cfi_endproc
223 
 116              	.LFE68:
 158 
  56              	.LFE70:
224 
 118              		.section	.text.user_i2c_read,"ax",%progbits
 159 
  58              		.section	.text.user_i2c_write,"ax",%progbits
225 
 119              		.align	1
 160 
  59              		.align	1
226 
 120              		.syntax unified
 161 
  60              		.syntax unified
227 
 121              		.thumb
 162 
  61              		.thumb
228 
 122              		.thumb_func
 163 
  62              		.thumb_func
229 
 123              		.fpu softvfp
 164 
  63              		.fpu softvfp
230 
 125              	user_i2c_read:
 165 
  65              	user_i2c_write:
231 
 126              	.LVL11:
 166 
  66              	.LVL4:
232 
 127              	.LFB69:
 167 
  67              	.LFB68:
233 
  73:Core/Src/main.c ****   HAL_StatusTypeDef st = HAL_I2C_Mem_Read(&hi2c2, i2c_addr<<1, reg_addr, 1, reg_data, len, 10000);
 168 
  71:Core/Src/main.c ****
234 
 128              		.loc 1 73 1 is_stmt 1 view -0
 169 
  68              		.loc 1 71 1 is_stmt 1 view -0
235 
 129              		.cfi_startproc
 170 
  69              		.cfi_startproc
236 
 130              		@ args = 0, pretend = 0, frame = 0
 171 
  70              		@ args = 0, pretend = 0, frame = 0
237 
 131              		@ frame_needed = 0, uses_anonymous_args = 0
 172 
  71              		@ frame_needed = 0, uses_anonymous_args = 0
238 
  73:Core/Src/main.c ****   HAL_StatusTypeDef st = HAL_I2C_Mem_Read(&hi2c2, i2c_addr<<1, reg_addr, 1, reg_data, len, 10000);
 173 
  71:Core/Src/main.c ****
239 
 132              		.loc 1 73 1 is_stmt 0 view .LVU18
 174 
  72              		.loc 1 71 1 is_stmt 0 view .LVU8
240 
 133 0000 10B5     		push	{r4, lr}
 175 
  73 0000 10B5     		push	{r4, lr}
- 
 
 176 
  74              	.LCFI1:
- 
 
 177 
  75              		.cfi_def_cfa_offset 8
- 
 
 178 
  76              		.cfi_offset 4, -8
- 
 
 179 
  77              		.cfi_offset 14, -4
- 
 
 180 
  78 0002 84B0     		sub	sp, sp, #16
241 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 5
 181 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 4
242 
 
 182 
 
243 
 
 183 
 
244 
 134              	.LCFI5:
 184 
  79              	.LCFI2:
245 
 135              		.cfi_def_cfa_offset 8
 185 
  80              		.cfi_def_cfa_offset 24
- 
 
 186 
  73:Core/Src/main.c ****     HAL_StatusTypeDef st = HAL_I2C_Mem_Write(&hi2c2, i2c_addr<<1, reg_addr, 1, reg_data, len, 10000
246 
 136              		.cfi_offset 4, -8
 187 
  81              		.loc 1 73 3 is_stmt 1 view .LVU9
- 
 
 188 
  73:Core/Src/main.c ****     HAL_StatusTypeDef st = HAL_I2C_Mem_Write(&hi2c2, i2c_addr<<1, reg_addr, 1, reg_data, len, 10000
247 
 137              		.cfi_offset 14, -4
 189 
  82              		.loc 1 73 11 is_stmt 0 view .LVU10
248 
 138 0002 84B0     		sub	sp, sp, #16
 190 
  83 0004 1C78     		ldrb	r4, [r3]	@ zero_extendqisi2
249 
 139              	.LCFI6:
 191 
  84              	.LVL5:
250 
 140              		.cfi_def_cfa_offset 24
 - 
 
251 
  74:Core/Src/main.c ****
192 
  74:Core/Src/main.c ****
252 
 141              		.loc 1 74 3 is_stmt 1 view .LVU19
 193 
  85              		.loc 1 74 5 is_stmt 1 view .LVU11
253 
  74:Core/Src/main.c ****
194 
  74:Core/Src/main.c ****
254 
 142              		.loc 1 74 26 is_stmt 0 view .LVU20
 195 
  86              		.loc 1 74 28 is_stmt 0 view .LVU12
255 
 143 0004 42F21074 		movw	r4, #10000
 196 
  87 0006 42F21073 		movw	r3, #10000
256 
 144 0008 0294     		str	r4, [sp, #8]
 - 
 
257 
 145 000a 9BB2     		uxth	r3, r3
 - 
 
258 
 146              	.LVL12:
 197 
  88              	.LVL6:
259 
  74:Core/Src/main.c ****
198 
  74:Core/Src/main.c ****
260 
 147              		.loc 1 74 26 view .LVU21
 199 
  89              		.loc 1 74 28 view .LVU13
261 
 148 000c 0193     		str	r3, [sp, #4]
 200 
  90 000a 0293     		str	r3, [sp, #8]
262 
 149 000e 0092     		str	r2, [sp]
 - 
 
263 
 150 0010 0123     		movs	r3, #1
 - 
 
264 
 151 0012 0A46     		mov	r2, r1
 201 
  91 000c 92B2     		uxth	r2, r2
265 
 152              	.LVL13:
 202 
  92              	.LVL7:
266 
  74:Core/Src/main.c ****
203 
  74:Core/Src/main.c ****
267 
 153              		.loc 1 74 26 view .LVU22
 204 
  93              		.loc 1 74 28 view .LVU14
- 
 
 205 
  94 000e 0192     		str	r2, [sp, #4]
- 
 
 206 
  95 0010 0091     		str	r1, [sp]
- 
 
 207 
  96 0012 0123     		movs	r3, #1
- 
 
 208 
  97 0014 0246     		mov	r2, r0
268 
 154 0014 00FA03F1 		lsl	r1, r0, r3
 209 
  98 0016 04FA03F1 		lsl	r1, r4, r3
269 
 155              	.LVL14:
 210 
  99              	.LVL8:
270 
  74:Core/Src/main.c ****
211 
  74:Core/Src/main.c ****
271 
 156              		.loc 1 74 26 view .LVU23
 212 
 100              		.loc 1 74 28 view .LVU15
272 
 157 0018 0448     		ldr	r0, .L15
 213 
 101 001a 0548     		ldr	r0, .L10
273 
 158              	.LVL15:
 214 
 102              	.LVL9:
274 
  74:Core/Src/main.c ****
215 
  74:Core/Src/main.c ****
275 
 159              		.loc 1 74 26 view .LVU24
 216 
 103              		.loc 1 74 28 view .LVU16
276 
 160 001a FFF7FEFF 		bl	HAL_I2C_Mem_Read
 217 
 104 001c FFF7FEFF 		bl	HAL_I2C_Mem_Write
277 
 161              	.LVL16:
 218 
 105              	.LVL10:
278 
  76:Core/Src/main.c ****
219 
  76:Core/Src/main.c ****
279 
 162              		.loc 1 76 3 is_stmt 1 view .LVU25
 220 
 106              		.loc 1 76 3 is_stmt 1 view .LVU17
280 
  76:Core/Src/main.c ****
221 
  76:Core/Src/main.c ****
281 
 163              		.loc 1 76 44 is_stmt 0 view .LVU26
 222 
 107              		.loc 1 76 44 is_stmt 0 view .LVU18
282 
 164 001e 10B9     		cbnz	r0, .L14
 223 
 108 0020 10B9     		cbnz	r0, .L9
283 
 165 0020 0020     		movs	r0, #0
 224 
 109 0022 0020     		movs	r0, #0
284 
 166              	.LVL17:
 225 
 110              	.LVL11:
285 
 167              	.L11:
 226 
 111              	.L6:
286 
  78:Core/Src/main.c ****
227 
  78:Core/Src/main.c **** static int8_t
287 
 168              		.loc 1 78 1 discriminator 4 view .LVU27
 228 
 112              		.loc 1 78 1 discriminator 4 view .LVU19
288 
 169 0022 04B0     		add	sp, sp, #16
 229 
 113 0024 04B0     		add	sp, sp, #16
289 
 170              	.LCFI7:
 230 
 114              	.LCFI3:
290 
 171              		.cfi_remember_state
 231 
 115              		.cfi_remember_state
291 
 172              		.cfi_def_cfa_offset 8
 232 
 116              		.cfi_def_cfa_offset 8
292 
 173              		@ sp needed
 233 
 117              		@ sp needed
293 
 174 0024 10BD     		pop	{r4, pc}
 234 
 118 0026 10BD     		pop	{r4, pc}
294 
 175              	.LVL18:
 235 
 119              	.LVL12:
295 
 176              	.L14:
 236 
 120              	.L9:
296 
 177              	.LCFI8:
 237 
 121              	.LCFI4:
297 
 178              		.cfi_restore_state
 238 
 122              		.cfi_restore_state
298 
  76:Core/Src/main.c ****
239 
  76:Core/Src/main.c ****
299 
 179              		.loc 1 76 44 view .LVU28
 240 
 123              		.loc 1 76 44 view .LVU20
300 
 180 0026 6FF00300 		mvn	r0, #3
 - 
 
301 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 6
 241 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 5
302 
 
 242 
 
303 
 
 243 
 
- 
 
 244 
 124 0028 6FF00300 		mvn	r0, #3
304 
 181              	.LVL19:
 245 
 125              	.LVL13:
305 
  76:Core/Src/main.c ****
246 
  76:Core/Src/main.c ****
306 
 182              		.loc 1 76 44 view .LVU29
 247 
 126              		.loc 1 76 44 view .LVU21
307 
 183 002a FAE7     		b	.L11
 248 
 127 002c FAE7     		b	.L6
308 
 184              	.L16:
 249 
 128              	.L11:
309 
 185              		.align	2
 250 
 129 002e 00BF     		.align	2
310 
 186              	.L15:
 251 
 130              	.L10:
311 
 187 002c 00000000 		.word	hi2c2
 252 
 131 0030 00000000 		.word	hi2c2
312 
 188              		.cfi_endproc
 253 
 132              		.cfi_endproc
313 
 189              	.LFE69:
 254 
 133              	.LFE68:
314 
 191              		.section	.text.MX_GPIO_Init,"ax",%progbits
 255 
 135              		.section	.text.user_i2c_read,"ax",%progbits
315 
 192              		.align	1
 256 
 136              		.align	1
316 
 193              		.syntax unified
 257 
 137              		.syntax unified
317 
 194              		.thumb
 258 
 138              		.thumb
318 
 195              		.thumb_func
 259 
 139              		.thumb_func
319 
 196              		.fpu softvfp
 260 
 140              		.fpu softvfp
320 
 198              	MX_GPIO_Init:
 261 
 142              	user_i2c_read:
- 
 
 262 
 143              	.LVL14:
321 
 199              	.LFB79:
 263 
 144              	.LFB69:
- 
 
 264 
  81:Core/Src/main.c ****   uint8_t i2c_addr = intf->dev_addr;
- 
 
 265 
 145              		.loc 1 81 1 is_stmt 1 view -0
- 
 
 266 
 146              		.cfi_startproc
- 
 
 267 
 147              		@ args = 0, pretend = 0, frame = 0
- 
 
 268 
 148              		@ frame_needed = 0, uses_anonymous_args = 0
- 
 
 269 
  81:Core/Src/main.c ****   uint8_t i2c_addr = intf->dev_addr;
- 
 
 270 
 149              		.loc 1 81 1 is_stmt 0 view .LVU23
- 
 
 271 
 150 0000 10B5     		push	{r4, lr}
- 
 
 272 
 151              	.LCFI5:
- 
 
 273 
 152              		.cfi_def_cfa_offset 8
- 
 
 274 
 153              		.cfi_offset 4, -8
- 
 
 275 
 154              		.cfi_offset 14, -4
- 
 
 276 
 155 0002 84B0     		sub	sp, sp, #16
- 
 
 277 
 156              	.LCFI6:
- 
 
 278 
 157              		.cfi_def_cfa_offset 24
- 
 
 279 
  82:Core/Src/main.c ****
- 
 
 280 
 158              		.loc 1 82 3 is_stmt 1 view .LVU24
- 
 
 281 
  82:Core/Src/main.c ****
- 
 
 282 
 159              		.loc 1 82 11 is_stmt 0 view .LVU25
- 
 
 283 
 160 0004 1C78     		ldrb	r4, [r3]	@ zero_extendqisi2
- 
 
 284 
 161              	.LVL15:
- 
 
 285 
  84:Core/Src/main.c ****
- 
 
 286 
 162              		.loc 1 84 3 is_stmt 1 view .LVU26
- 
 
 287 
  84:Core/Src/main.c ****
- 
 
 288 
 163              		.loc 1 84 26 is_stmt 0 view .LVU27
- 
 
 289 
 164 0006 42F21073 		movw	r3, #10000
- 
 
 290 
 165              	.LVL16:
- 
 
 291 
  84:Core/Src/main.c ****
- 
 
 292 
 166              		.loc 1 84 26 view .LVU28
- 
 
 293 
 167 000a 0293     		str	r3, [sp, #8]
- 
 
 294 
 168 000c 92B2     		uxth	r2, r2
- 
 
 295 
 169              	.LVL17:
- 
 
 296 
  84:Core/Src/main.c ****
- 
 
 297 
 170              		.loc 1 84 26 view .LVU29
- 
 
 298 
 171 000e 0192     		str	r2, [sp, #4]
- 
 
 299 
 172 0010 0091     		str	r1, [sp]
- 
 
 300 
 173 0012 0123     		movs	r3, #1
- 
 
 301 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 6
- 
 
 302 
 
- 
 
 303 
 
- 
 
 304 
 174 0014 0246     		mov	r2, r0
- 
 
 305 
 175 0016 04FA03F1 		lsl	r1, r4, r3
- 
 
 306 
 176              	.LVL18:
- 
 
 307 
  84:Core/Src/main.c ****
- 
 
 308 
 177              		.loc 1 84 26 view .LVU30
- 
 
 309 
 178 001a 0548     		ldr	r0, .L17
- 
 
 310 
 179              	.LVL19:
- 
 
 311 
  84:Core/Src/main.c ****
- 
 
 312 
 180              		.loc 1 84 26 view .LVU31
- 
 
 313 
 181 001c FFF7FEFF 		bl	HAL_I2C_Mem_Read
- 
 
 314 
 182              	.LVL20:
322 
  86:Core/Src/main.c ****
315 
  86:Core/Src/main.c ****
- 
 
 316 
 183              		.loc 1 86 3 is_stmt 1 view .LVU32
323 
  87:Core/Src/main.c ****
317 
  86:Core/Src/main.c ****
- 
 
 318 
 184              		.loc 1 86 44 is_stmt 0 view .LVU33
- 
 
 319 
 185 0020 10B9     		cbnz	r0, .L16
- 
 
 320 
 186 0022 0020     		movs	r0, #0
- 
 
 321 
 187              	.LVL21:
- 
 
 322 
 188              	.L13:
324 
  88:Core/Src/main.c ****
323 
  88:Core/Src/main.c ****
- 
 
 324 
 189              		.loc 1 88 1 discriminator 4 view .LVU34
- 
 
 325 
 190 0024 04B0     		add	sp, sp, #16
- 
 
 326 
 191              	.LCFI7:
- 
 
 327 
 192              		.cfi_remember_state
- 
 
 328 
 193              		.cfi_def_cfa_offset 8
- 
 
 329 
 194              		@ sp needed
- 
 
 330 
 195 0026 10BD     		pop	{r4, pc}
- 
 
 331 
 196              	.LVL22:
- 
 
 332 
 197              	.L16:
- 
 
 333 
 198              	.LCFI8:
- 
 
 334 
 199              		.cfi_restore_state
325 
  89:Core/Src/main.c ****
335 
  86:Core/Src/main.c ****
326 
  90:Core/Src/main.c **** struct bmp280_dev bmp =
 336 
 200              		.loc 1 86 44 view .LVU35
327 
  91:Core/Src/main.c ****   {
 337 
 201 0028 6FF00300 		mvn	r0, #3
- 
 
 338 
 202              	.LVL23:
328 
  92:Core/Src/main.c ****
339 
  86:Core/Src/main.c ****
- 
 
 340 
 203              		.loc 1 86 44 view .LVU36
- 
 
 341 
 204 002c FAE7     		b	.L13
- 
 
 342 
 205              	.L18:
- 
 
 343 
 206 002e 00BF     		.align	2
- 
 
 344 
 207              	.L17:
- 
 
 345 
 208 0030 00000000 		.word	hi2c2
- 
 
 346 
 209              		.cfi_endproc
- 
 
 347 
 210              	.LFE69:
329 
  93:Core/Src/main.c ****   .intf = BMP280_I2C_INTF, .read = user_i2c_read, .write = user_i2c_write,
 348 
 212              		.section	.text.MX_GPIO_Init,"ax",%progbits
- 
 
 349 
 213              		.align	1
330 
  94:Core/Src/main.c ****       .delay_ms = user_delay_ms,
 350 
 214              		.syntax unified
- 
 
 351 
 215              		.thumb
- 
 
 352 
 216              		.thumb_func
- 
 
 353 
 217              		.fpu softvfp
- 
 
 354 
 219              	MX_GPIO_Init:
- 
 
 355 
 220              	.LFB80:
331 
  95:Core/Src/main.c ****
356 
  95:Core/Src/main.c ****
332 
  96:Core/Src/main.c ****       /* Update interface pointer with the structure that contains both device address and file des
 - 
 
333 
  97:Core/Src/main.c ****      .dev_id =  BMP280_I2C_ADDR_PRIM };
 357 
  96:Core/Src/main.c ****
334 
  98:Core/Src/main.c ****
358 
  97:Core/Src/main.c ****
- 
 
 359 
  98:Core/Src/main.c **** struct bme280_dev dev;
335 
  99:Core/Src/main.c **** int8_t rslt;
 360 
  99:Core/Src/main.c ****
- 
 
 361 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 7
- 
 
 362 
 
- 
 
 363 
 
336 
 100:Core/Src/main.c **** struct bmp280_config conf;
 364 
 100:Core/Src/main.c **** struct identifier id;
337 
 101:Core/Src/main.c ****
365 
 101:Core/Src/main.c ****
338 
 102:Core/Src/main.c ****
366 
 102:Core/Src/main.c **** /* Variable to store minimum wait time between consecutive measurement in force mode */
339 
 103:Core/Src/main.c **** /* USER CODE END PV */
 367 
 103:Core/Src/main.c **** uint32_t req_delay;
340 
 104:Core/Src/main.c ****
368 
 104:Core/Src/main.c ****
- 
 
 369 
 105:Core/Src/main.c **** int8_t rslt;
- 
 
 370 
 106:Core/Src/main.c ****
- 
 
 371 
 107:Core/Src/main.c ****
- 
 
 372 
 108:Core/Src/main.c **** /* USER CODE END PV */
- 
 
 373 
 109:Core/Src/main.c ****
341 
 105:Core/Src/main.c **** /* Private function prototypes -----------------------------------------------*/
 374 
 110:Core/Src/main.c **** /* Private function prototypes -----------------------------------------------*/
342 
 106:Core/Src/main.c **** void SystemClock_Config(void);
 375 
 111:Core/Src/main.c **** void SystemClock_Config(void);
343 
 107:Core/Src/main.c **** static void MX_GPIO_Init(void);
 376 
 112:Core/Src/main.c **** static void MX_GPIO_Init(void);
344 
 108:Core/Src/main.c **** static void MX_SPI1_Init(void);
 377 
 113:Core/Src/main.c **** static void MX_SPI1_Init(void);
345 
 109:Core/Src/main.c **** static void MX_TIM4_Init(void);
 378 
 114:Core/Src/main.c **** static void MX_TIM4_Init(void);
346 
 110:Core/Src/main.c **** static void MX_USART1_UART_Init(void);
 379 
 115:Core/Src/main.c **** static void MX_USART1_UART_Init(void);
347 
 111:Core/Src/main.c **** static void MX_TIM3_Init(void);
 380 
 116:Core/Src/main.c **** static void MX_TIM3_Init(void);
348 
 112:Core/Src/main.c **** static void MX_I2C2_Init(void);
 381 
 117:Core/Src/main.c **** static void MX_I2C2_Init(void);
349 
 113:Core/Src/main.c **** static void MX_RTC_Init(void);
 382 
 118:Core/Src/main.c **** static void MX_RTC_Init(void);
350 
 114:Core/Src/main.c **** /* USER CODE BEGIN PFP */
 383 
 119:Core/Src/main.c **** /* USER CODE BEGIN PFP */
351 
 115:Core/Src/main.c ****
- 
 
352 
 116:Core/Src/main.c **** /* USER CODE END PFP */
 - 
 
353 
 117:Core/Src/main.c ****
- 
 
354 
 118:Core/Src/main.c **** /* Private user code ---------------------------------------------------------*/
 - 
 
355 
 119:Core/Src/main.c **** /* USER CODE BEGIN 0 */
 - 
 
356 
 120:Core/Src/main.c ****
384 
 120:Core/Src/main.c ****
357 
 121:Core/Src/main.c **** /* USER CODE END 0 */
 385 
 121:Core/Src/main.c **** /*!
- 
 
 386 
 122:Core/Src/main.c ****  * @brief This API reads the sensor temperature, pressure and humidity data in forced mode.
358 
 122:Core/Src/main.c ****
387 
 123:Core/Src/main.c ****  */
359 
 123:Core/Src/main.c **** /**
 388 
 124:Core/Src/main.c **** int8_t
360 
 124:Core/Src/main.c ****   * @brief  The application entry point.
 389 
 125:Core/Src/main.c **** stream_sensor_data_forced_mode (struct bme280_dev *dev)
361 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 7
 - 
 
362 
 
 - 
 
363 
 
 - 
 
364 
 125:Core/Src/main.c ****   * @retval int
 390 
 126:Core/Src/main.c **** {
365 
 126:Core/Src/main.c ****   */
 391 
 127:Core/Src/main.c ****   /* Variable to define the result */
366 
 127:Core/Src/main.c **** int main(void)
 392 
 128:Core/Src/main.c ****   int8_t rslt = BME280_OK;
367 
 128:Core/Src/main.c **** {
 393 
 129:Core/Src/main.c ****
368 
 129:Core/Src/main.c ****   /* USER CODE BEGIN 1 */
 394 
 130:Core/Src/main.c ****   /* Variable to define the selecting sensors */
369 
 130:Core/Src/main.c ****
- 
 
370 
 131:Core/Src/main.c ****   /* USER CODE END 1 */
 395 
 131:Core/Src/main.c ****   uint8_t settings_sel = 0;
371 
 132:Core/Src/main.c ****
396 
 132:Core/Src/main.c ****
372 
 133:Core/Src/main.c ****   /* MCU Configuration--------------------------------------------------------*/
 397 
 133:Core/Src/main.c ****   /* Structure to get the pressure, temperature and humidity values */
- 
 
 398 
 134:Core/Src/main.c ****   struct bme280_data comp_data;
373 
 134:Core/Src/main.c ****
399 
 135:Core/Src/main.c ****
374 
 135:Core/Src/main.c ****   /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
 400 
 136:Core/Src/main.c ****   /* Recommended mode of operation: Indoor navigation */
375 
 136:Core/Src/main.c ****   HAL_Init();
 401 
 137:Core/Src/main.c ****   dev->settings.osr_h = BME280_OVERSAMPLING_1X;
376 
 137:Core/Src/main.c ****
- 
 
377 
 138:Core/Src/main.c ****   /* USER CODE BEGIN Init */
 402 
 138:Core/Src/main.c ****   dev->settings.osr_p = BME280_OVERSAMPLING_16X;
378 
 139:Core/Src/main.c ****
403 
 139:Core/Src/main.c ****   dev->settings.osr_t = BME280_OVERSAMPLING_2X;
379 
 140:Core/Src/main.c ****   /* USER CODE END Init */
 404 
 140:Core/Src/main.c ****   dev->settings.filter = BME280_FILTER_COEFF_16;
380 
 141:Core/Src/main.c ****
405 
 141:Core/Src/main.c ****
381 
 142:Core/Src/main.c ****   /* Configure the system clock */
 406 
 142:Core/Src/main.c ****   settings_sel = BME280_OSR_PRESS_SEL | BME280_OSR_TEMP_SEL | BME280_OSR_HUM_SEL
382 
 143:Core/Src/main.c ****   SystemClock_Config();
 407 
 143:Core/Src/main.c ****       | BME280_FILTER_SEL;
383 
 144:Core/Src/main.c ****
408 
 144:Core/Src/main.c ****
384 
 145:Core/Src/main.c ****   /* USER CODE BEGIN SysInit */
 409 
 145:Core/Src/main.c ****   /* Set the sensor settings */
385 
 146:Core/Src/main.c ****
410 
 146:Core/Src/main.c ****   rslt = bme280_set_sensor_settings (settings_sel, dev);
386 
 147:Core/Src/main.c ****   /* USER CODE END SysInit */
 411 
 147:Core/Src/main.c ****   if (rslt != BME280_OK)
387 
 148:Core/Src/main.c ****
412 
 148:Core/Src/main.c ****     {
388 
 149:Core/Src/main.c ****   /* Initialize all configured peripherals */
 413 
 149:Core/Src/main.c **** //        fprintf(stderr, "Failed to set sensor settings (code %+d).", rslt);
389 
 150:Core/Src/main.c ****   MX_GPIO_Init();
 414 
 150:Core/Src/main.c ****
390 
 151:Core/Src/main.c ****   MX_SPI1_Init();
 415 
 151:Core/Src/main.c ****       return rslt;
391 
 152:Core/Src/main.c ****   MX_TIM4_Init();
 416 
 152:Core/Src/main.c ****     }
392 
 153:Core/Src/main.c ****   MX_USART1_UART_Init();
 417 
 153:Core/Src/main.c ****
- 
 
 418 
 154:Core/Src/main.c ****   /*Calculate the minimum delay required between consecutive measurement based upon the sensor enab
393 
 154:Core/Src/main.c ****   MX_TIM3_Init();
 419 
 155:Core/Src/main.c ****    *  and the oversampling configuration. */
394 
 155:Core/Src/main.c ****   MX_I2C2_Init();
 420 
 156:Core/Src/main.c ****   req_delay = bme280_cal_meas_delay (&dev->settings);
395 
 156:Core/Src/main.c ****   MX_RTC_Init();
 421 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 8
- 
 
 422 
 
- 
 
 423 
 
396 
 157:Core/Src/main.c ****   MX_USB_DEVICE_Init();
 424 
 157:Core/Src/main.c ****
397 
 158:Core/Src/main.c ****   /* USER CODE BEGIN 2 */
 425 
 158:Core/Src/main.c ****   /* Set the sensor to forced mode */
398 
 159:Core/Src/main.c ****
426 
 159:Core/Src/main.c ****   rslt = bme280_set_sensor_mode (BME280_FORCED_MODE, dev);
399 
 160:Core/Src/main.c ****   HAL_GPIO_WritePin ( USB_PULLUP_GPIO_Port, USB_PULLUP_Pin, GPIO_PIN_RESET);
 427 
 160:Core/Src/main.c ****   if (rslt != BME280_OK)
400 
 161:Core/Src/main.c ****   HAL_Delay (1000);
 428 
 161:Core/Src/main.c ****     {
401 
 162:Core/Src/main.c ****   HAL_GPIO_WritePin ( USB_PULLUP_GPIO_Port, USB_PULLUP_Pin, GPIO_PIN_SET);
 429 
 162:Core/Src/main.c ****       return rslt;
402 
 163:Core/Src/main.c ****
430 
 163:Core/Src/main.c ****     }
403 
 164:Core/Src/main.c ****   /* setup the USART control blocks */
 431 
 164:Core/Src/main.c ****
404 
 165:Core/Src/main.c ****   init_usart_ctl (&uc1, &huart1);
 432 
 165:Core/Src/main.c ****   return rslt;
405 
 166:Core/Src/main.c ****
433 
 166:Core/Src/main.c **** }
406 
 167:Core/Src/main.c ****   EnableSerialRxInterrupt (&uc1);
 434 
 167:Core/Src/main.c **** /* USER CODE END PFP */
407 
 168:Core/Src/main.c ****
435 
 168:Core/Src/main.c ****
408 
 169:Core/Src/main.c ****
436 
 169:Core/Src/main.c **** /* Private user code ---------------------------------------------------------*/
409 
 170:Core/Src/main.c ****   /* Initialize the bmp280 */
 437 
 170:Core/Src/main.c **** /* USER CODE BEGIN 0 */
410 
 171:Core/Src/main.c ****   rslt = bmp280_init(&bmp);
 438 
 171:Core/Src/main.c ****
411 
 172:Core/Src/main.c **** //  print_rslt(" bmp280_init status", rslt);
 439 
 172:Core/Src/main.c **** /* USER CODE END 0 */
412 
 173:Core/Src/main.c ****
440 
 173:Core/Src/main.c ****
413 
 174:Core/Src/main.c ****   /* Always read the current settings before writing, especially when
 441 
 174:Core/Src/main.c **** /**
414 
 175:Core/Src/main.c ****    * all the configuration is not modified
 442 
 175:Core/Src/main.c ****   * @brief  The application entry point.
415 
 176:Core/Src/main.c ****    */
 443 
 176:Core/Src/main.c ****   * @retval int
416 
 177:Core/Src/main.c ****   rslt = bmp280_get_config(&conf, &bmp);
 444 
 177:Core/Src/main.c ****   */
417 
 178:Core/Src/main.c ****  // print_rslt(" bmp280_get_config status", rslt);
 445 
 178:Core/Src/main.c **** int main(void)
418 
 179:Core/Src/main.c ****
446 
 179:Core/Src/main.c **** {
419 
 180:Core/Src/main.c ****   /* configuring the temperature oversampling, filter coefficient and output data rate */
 - 
 
420 
 181:Core/Src/main.c ****   /* Overwrite the desired settings */
 447 
 180:Core/Src/main.c ****   /* USER CODE BEGIN 1 */
421 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 8
 - 
 
422 
 
 - 
 
423 
 
 - 
 
424 
 182:Core/Src/main.c ****   conf.filter = BMP280_FILTER_COEFF_2;
 448 
 181:Core/Src/main.c ****
425 
 183:Core/Src/main.c ****
449 
 182:Core/Src/main.c ****
426 
 184:Core/Src/main.c ****   /* Temperature oversampling set at 4x */
 450 
 183:Core/Src/main.c ****   /* USER CODE END 1 */
427 
 185:Core/Src/main.c ****   conf.os_temp = BMP280_OS_4X;
 451 
 184:Core/Src/main.c ****
- 
 
 452 
 185:Core/Src/main.c ****   /* MCU Configuration--------------------------------------------------------*/
428 
 186:Core/Src/main.c ****
453 
 186:Core/Src/main.c ****
429 
 187:Core/Src/main.c ****   /* Pressure over sampling none (disabling pressure measurement) */
 454 
 187:Core/Src/main.c ****   /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
430 
 188:Core/Src/main.c ****   conf.os_pres = BMP280_OS_4X;
 455 
 188:Core/Src/main.c ****   HAL_Init();
431 
 189:Core/Src/main.c ****
456 
 189:Core/Src/main.c ****
432 
 190:Core/Src/main.c ****   /* Setting the output data rate as 2HZ(500ms) */
 457 
 190:Core/Src/main.c ****   /* USER CODE BEGIN Init */
433 
 191:Core/Src/main.c ****   conf.odr = BMP280_ODR_500_MS;
 458 
 191:Core/Src/main.c ****
434 
 192:Core/Src/main.c ****   rslt = bmp280_set_config(&conf, &bmp);
 459 
 192:Core/Src/main.c ****   /* USER CODE END Init */
435 
 193:Core/Src/main.c ****   //print_rslt(" bmp280_set_config status", rslt);
 - 
 
436 
 194:Core/Src/main.c ****
460 
 193:Core/Src/main.c ****
437 
 195:Core/Src/main.c ****   /* Always set the power mode after setting the configuration */
 461 
 194:Core/Src/main.c ****   /* Configure the system clock */
438 
 196:Core/Src/main.c ****   rslt = bmp280_set_power_mode(BMP280_NORMAL_MODE, &bmp);
 462 
 195:Core/Src/main.c ****   SystemClock_Config();
- 
 
 463 
 196:Core/Src/main.c ****
439 
 197:Core/Src/main.c ****   //print_rslt(" bmp280_set_power_mode status", rslt);
 464 
 197:Core/Src/main.c ****   /* USER CODE BEGIN SysInit */
440 
 198:Core/Src/main.c ****
465 
 198:Core/Src/main.c ****
441 
 199:Core/Src/main.c ****
466 
 199:Core/Src/main.c ****   /* USER CODE END SysInit */
442 
 200:Core/Src/main.c ****
467 
 200:Core/Src/main.c ****
443 
 201:Core/Src/main.c ****   cc_init ();
 468 
 201:Core/Src/main.c ****   /* Initialize all configured peripherals */
444 
 202:Core/Src/main.c ****   /* USER CODE END 2 */
 469 
 202:Core/Src/main.c ****   MX_GPIO_Init();
445 
 203:Core/Src/main.c ****
470 
 203:Core/Src/main.c ****   MX_SPI1_Init();
446 
 204:Core/Src/main.c ****   /* Infinite loop */
 471 
 204:Core/Src/main.c ****   MX_TIM4_Init();
447 
 205:Core/Src/main.c ****   /* USER CODE BEGIN WHILE */
 472 
 205:Core/Src/main.c ****   MX_USART1_UART_Init();
448 
 206:Core/Src/main.c ****   while (1)
 473 
 206:Core/Src/main.c ****   MX_TIM3_Init();
449 
 207:Core/Src/main.c ****     {
 474 
 207:Core/Src/main.c ****   MX_I2C2_Init();
450 
 208:Core/Src/main.c ****       cc_run (&bmp);
 475 
 208:Core/Src/main.c ****   MX_RTC_Init();
451 
 209:Core/Src/main.c ****
476 
 209:Core/Src/main.c ****   MX_USB_DEVICE_Init();
452 
 210:Core/Src/main.c ****
477 
 210:Core/Src/main.c ****   /* USER CODE BEGIN 2 */
453 
 211:Core/Src/main.c ****
478 
 211:Core/Src/main.c ****
- 
 
 479 
 212:Core/Src/main.c ****   HAL_GPIO_WritePin ( USB_PULLUP_GPIO_Port, USB_PULLUP_Pin, GPIO_PIN_RESET);
454 
 212:Core/Src/main.c ****       HAL_Delay (50);
 480 
 213:Core/Src/main.c ****   HAL_Delay (1000);
455 
 213:Core/Src/main.c ****
481 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 9
- 
 
 482 
 
- 
 
 483 
 
456 
 214:Core/Src/main.c ****     /* USER CODE END WHILE */
 484 
 214:Core/Src/main.c ****   HAL_GPIO_WritePin ( USB_PULLUP_GPIO_Port, USB_PULLUP_Pin, GPIO_PIN_SET);
457 
 215:Core/Src/main.c ****
485 
 215:Core/Src/main.c ****
458 
 216:Core/Src/main.c ****     /* USER CODE BEGIN 3 */
 486 
 216:Core/Src/main.c ****   /* setup the USART control blocks */
459 
 217:Core/Src/main.c ****     }
 487 
 217:Core/Src/main.c ****   init_usart_ctl (&uc1, &huart1);
460 
 218:Core/Src/main.c ****   /* USER CODE END 3 */
 488 
 218:Core/Src/main.c ****
461 
 219:Core/Src/main.c **** }
 489 
 219:Core/Src/main.c ****   EnableSerialRxInterrupt (&uc1);
462 
 220:Core/Src/main.c ****
490 
 220:Core/Src/main.c ****
463 
 221:Core/Src/main.c **** /**
 491 
 221:Core/Src/main.c ****   /* BME 280 */
464 
 222:Core/Src/main.c ****   * @brief System Clock Configuration
 - 
 
465 
 223:Core/Src/main.c ****   * @retval None
 492 
 222:Core/Src/main.c ****   struct bme280_dev dev;
466 
 224:Core/Src/main.c ****   */
 493 
 223:Core/Src/main.c ****
467 
 225:Core/Src/main.c **** void SystemClock_Config(void)
 494 
 224:Core/Src/main.c ****   struct identifier id;
468 
 226:Core/Src/main.c **** {
 495 
 225:Core/Src/main.c ****
469 
 227:Core/Src/main.c ****   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 496 
 226:Core/Src/main.c ****   /* Variable to define the result */
470 
 228:Core/Src/main.c ****   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 497 
 227:Core/Src/main.c ****   int8_t rslt = BME280_OK;
471 
 229:Core/Src/main.c ****   RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
 - 
 
472 
 230:Core/Src/main.c ****
498 
 228:Core/Src/main.c ****
473 
 231:Core/Src/main.c ****   /** Initializes the RCC Oscillators according to the specified parameters
 499 
 229:Core/Src/main.c ****   /* Make sure to select BME280_I2C_ADDR_PRIM or BME280_I2C_ADDR_SEC as needed */
474 
 232:Core/Src/main.c ****   * in the RCC_OscInitTypeDef structure.
 500 
 230:Core/Src/main.c ****   id.dev_addr = BME280_I2C_ADDR_PRIM >> 1;
475 
 233:Core/Src/main.c ****   */
 501 
 231:Core/Src/main.c ****
476 
 234:Core/Src/main.c ****   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE;
 502 
 232:Core/Src/main.c ****   dev.intf = BME280_I2C_INTF;
477 
 235:Core/Src/main.c ****   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
 503 
 233:Core/Src/main.c ****   dev.read = user_i2c_read;
478 
 236:Core/Src/main.c ****   RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
 504 
 234:Core/Src/main.c ****   dev.write = user_i2c_write;
479 
 237:Core/Src/main.c ****   RCC_OscInitStruct.LSEState = RCC_LSE_ON;
 505 
 235:Core/Src/main.c ****   dev.delay_us = user_delay_us;
480 
 238:Core/Src/main.c ****   RCC_OscInitStruct.HSIState = RCC_HSI_ON;
 506 
 236:Core/Src/main.c ****
481 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 9
 507 
 237:Core/Src/main.c ****   /* Update interface pointer with the structure that contains both device address and file descrip
482 
 
 - 
 
483 
 
 - 
 
484 
 239:Core/Src/main.c ****   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 508 
 238:Core/Src/main.c ****   dev.intf_ptr = &id;
- 
 
 509 
 239:Core/Src/main.c ****
485 
 240:Core/Src/main.c ****   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
 510 
 240:Core/Src/main.c ****   /* Initialize the bme280 */
486 
 241:Core/Src/main.c ****   RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
 511 
 241:Core/Src/main.c ****     rslt = bme280_init(&dev);
487 
 242:Core/Src/main.c ****   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 512 
 242:Core/Src/main.c ****     if (rslt != BME280_OK)
488 
 243:Core/Src/main.c ****   {
 513 
 243:Core/Src/main.c ****     {
- 
 
 514 
 244:Core/Src/main.c **** //        fprintf(stderr, "Failed to initialize the device (code %+d).\n", rslt);
489 
 244:Core/Src/main.c ****     Error_Handler();
 515 
 245:Core/Src/main.c ****         exit(1);
490 
 245:Core/Src/main.c ****   }
 516 
 246:Core/Src/main.c ****     }
491 
 246:Core/Src/main.c ****   /** Initializes the CPU, AHB and APB buses clocks
 517 
 247:Core/Src/main.c ****
492 
 247:Core/Src/main.c ****   */
 518 
 248:Core/Src/main.c ****
493 
 248:Core/Src/main.c ****   RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 519 
 249:Core/Src/main.c ****     rslt = stream_sensor_data_forced_mode(&dev);
494 
 249:Core/Src/main.c ****                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
 520 
 250:Core/Src/main.c ****     if (rslt != BME280_OK)
495 
 250:Core/Src/main.c ****   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
 521 
 251:Core/Src/main.c ****     {
496 
 251:Core/Src/main.c ****   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 522 
 252:Core/Src/main.c ****   //      fprintf(stderr, "Failed to stream sensor data (code %+d).\n", rslt);
497 
 252:Core/Src/main.c ****   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
 523 
 253:Core/Src/main.c ****         exit(1);
498 
 253:Core/Src/main.c ****   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 524 
 254:Core/Src/main.c ****     }
499 
 254:Core/Src/main.c ****
525 
 255:Core/Src/main.c ****
500 
 255:Core/Src/main.c ****   if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
 526 
 256:Core/Src/main.c ****
501 
 256:Core/Src/main.c ****   {
 527 
 257:Core/Src/main.c ****
502 
 257:Core/Src/main.c ****     Error_Handler();
 528 
 258:Core/Src/main.c ****
503 
 258:Core/Src/main.c ****   }
 529 
 259:Core/Src/main.c ****
504 
 259:Core/Src/main.c ****   PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_USB;
 530 
 260:Core/Src/main.c ****   cc_init ();
505 
 260:Core/Src/main.c ****   PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
 531 
 261:Core/Src/main.c ****   /* USER CODE END 2 */
- 
 
 532 
 262:Core/Src/main.c ****
506 
 261:Core/Src/main.c ****   PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
 533 
 263:Core/Src/main.c ****   /* Infinite loop */
507 
 262:Core/Src/main.c ****   if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
 534 
 264:Core/Src/main.c ****   /* USER CODE BEGIN WHILE */
508 
 263:Core/Src/main.c ****   {
 535 
 265:Core/Src/main.c ****   while (1)
509 
 264:Core/Src/main.c ****     Error_Handler();
 536 
 266:Core/Src/main.c ****     {
510 
 265:Core/Src/main.c ****   }
 537 
 267:Core/Src/main.c ****       cc_run (&dev);
511 
 266:Core/Src/main.c **** }
 538 
 268:Core/Src/main.c ****
512 
 267:Core/Src/main.c ****
539 
 269:Core/Src/main.c ****
513 
 268:Core/Src/main.c **** /**
 540 
 270:Core/Src/main.c ****
514 
 269:Core/Src/main.c ****   * @brief I2C2 Initialization Function
 541 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 10
515 
 270:Core/Src/main.c ****   * @param None
 - 
 
- 
 
 542 
 
- 
 
 543 
 
516 
 271:Core/Src/main.c ****   * @retval None
 544 
 271:Core/Src/main.c ****       HAL_Delay (50);
517 
 272:Core/Src/main.c ****   */
 545 
 272:Core/Src/main.c ****
518 
 273:Core/Src/main.c **** static void MX_I2C2_Init(void)
 546 
 273:Core/Src/main.c ****     /* USER CODE END WHILE */
519 
 274:Core/Src/main.c **** {
 547 
 274:Core/Src/main.c ****
- 
 
 548 
 275:Core/Src/main.c ****     /* USER CODE BEGIN 3 */
520 
 275:Core/Src/main.c ****
549 
 276:Core/Src/main.c ****     }
521 
 276:Core/Src/main.c ****   /* USER CODE BEGIN I2C2_Init 0 */
 550 
 277:Core/Src/main.c ****   /* USER CODE END 3 */
522 
 277:Core/Src/main.c ****
551 
 278:Core/Src/main.c **** }
523 
 278:Core/Src/main.c ****   /* USER CODE END I2C2_Init 0 */
 - 
 
524 
 279:Core/Src/main.c ****
552 
 279:Core/Src/main.c ****
525 
 280:Core/Src/main.c ****   /* USER CODE BEGIN I2C2_Init 1 */
 - 
 
526 
 281:Core/Src/main.c ****
553 
 280:Core/Src/main.c **** /**
527 
 282:Core/Src/main.c ****   /* USER CODE END I2C2_Init 1 */
 554 
 281:Core/Src/main.c ****   * @brief System Clock Configuration
528 
 283:Core/Src/main.c ****   hi2c2.Instance = I2C2;
 555 
 282:Core/Src/main.c ****   * @retval None
529 
 284:Core/Src/main.c ****   hi2c2.Init.ClockSpeed = 100000;
 556 
 283:Core/Src/main.c ****   */
530 
 285:Core/Src/main.c ****   hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2;
 557 
 284:Core/Src/main.c **** void SystemClock_Config(void)
531 
 286:Core/Src/main.c ****   hi2c2.Init.OwnAddress1 = 0;
 558 
 285:Core/Src/main.c **** {
532 
 287:Core/Src/main.c ****   hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
 559 
 286:Core/Src/main.c ****   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
533 
 288:Core/Src/main.c ****   hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
 560 
 287:Core/Src/main.c ****   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
534 
 289:Core/Src/main.c ****   hi2c2.Init.OwnAddress2 = 0;
 561 
 288:Core/Src/main.c ****   RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
535 
 290:Core/Src/main.c ****   hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
 562 
 289:Core/Src/main.c ****
536 
 291:Core/Src/main.c ****   hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
 563 
 290:Core/Src/main.c ****   /** Initializes the RCC Oscillators according to the specified parameters
537 
 292:Core/Src/main.c ****   if (HAL_I2C_Init(&hi2c2) != HAL_OK)
 564 
 291:Core/Src/main.c ****   * in the RCC_OscInitTypeDef structure.
538 
 293:Core/Src/main.c ****   {
 565 
 292:Core/Src/main.c ****   */
539 
 294:Core/Src/main.c ****     Error_Handler();
 566 
 293:Core/Src/main.c ****   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE;
540 
 295:Core/Src/main.c ****   }
 567 
 294:Core/Src/main.c ****   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
541 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 10
 568 
 295:Core/Src/main.c ****   RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
542 
 
 - 
 
543 
 
 - 
 
544 
 296:Core/Src/main.c ****   /* USER CODE BEGIN I2C2_Init 2 */
 569 
 296:Core/Src/main.c ****   RCC_OscInitStruct.LSEState = RCC_LSE_ON;
545 
 297:Core/Src/main.c ****
570 
 297:Core/Src/main.c ****   RCC_OscInitStruct.HSIState = RCC_HSI_ON;
546 
 298:Core/Src/main.c ****   /* USER CODE END I2C2_Init 2 */
 571 
 298:Core/Src/main.c ****   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
547 
 299:Core/Src/main.c ****
572 
 299:Core/Src/main.c ****   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
548 
 300:Core/Src/main.c **** }
 573 
 300:Core/Src/main.c ****   RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
549 
 301:Core/Src/main.c ****
574 
 301:Core/Src/main.c ****   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
550 
 302:Core/Src/main.c **** /**
 575 
 302:Core/Src/main.c ****   {
551 
 303:Core/Src/main.c ****   * @brief RTC Initialization Function
 576 
 303:Core/Src/main.c ****     Error_Handler();
552 
 304:Core/Src/main.c ****   * @param None
 577 
 304:Core/Src/main.c ****   }
553 
 305:Core/Src/main.c ****   * @retval None
 578 
 305:Core/Src/main.c ****   /** Initializes the CPU, AHB and APB buses clocks
554 
 306:Core/Src/main.c ****   */
 579 
 306:Core/Src/main.c ****   */
555 
 307:Core/Src/main.c **** static void MX_RTC_Init(void)
 580 
 307:Core/Src/main.c ****   RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
556 
 308:Core/Src/main.c **** {
 581 
 308:Core/Src/main.c ****                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
557 
 309:Core/Src/main.c ****
582 
 309:Core/Src/main.c ****   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
558 
 310:Core/Src/main.c ****   /* USER CODE BEGIN RTC_Init 0 */
 583 
 310:Core/Src/main.c ****   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
559 
 311:Core/Src/main.c ****
584 
 311:Core/Src/main.c ****   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
560 
 312:Core/Src/main.c ****   /* USER CODE END RTC_Init 0 */
 585 
 312:Core/Src/main.c ****   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
561 
 313:Core/Src/main.c ****
586 
 313:Core/Src/main.c ****
562 
 314:Core/Src/main.c ****   RTC_TimeTypeDef sTime = {0};
 - 
 
563 
 315:Core/Src/main.c ****   RTC_DateTypeDef DateToUpdate = {0};
 587 
 314:Core/Src/main.c ****   if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
564 
 316:Core/Src/main.c ****
588 
 315:Core/Src/main.c ****   {
565 
 317:Core/Src/main.c ****   /* USER CODE BEGIN RTC_Init 1 */
 589 
 316:Core/Src/main.c ****     Error_Handler();
566 
 318:Core/Src/main.c ****
590 
 317:Core/Src/main.c ****   }
567 
 319:Core/Src/main.c ****   /* USER CODE END RTC_Init 1 */
 591 
 318:Core/Src/main.c ****   PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_USB;
568 
 320:Core/Src/main.c ****   /** Initialize RTC Only
 592 
 319:Core/Src/main.c ****   PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
569 
 321:Core/Src/main.c ****   */
 - 
 
570 
 322:Core/Src/main.c ****   hrtc.Instance = RTC;
 593 
 320:Core/Src/main.c ****   PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
571 
 323:Core/Src/main.c ****   hrtc.Init.AsynchPrediv = RTC_AUTO_1_SECOND;
 594 
 321:Core/Src/main.c ****   if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
572 
 324:Core/Src/main.c ****   hrtc.Init.OutPut = RTC_OUTPUTSOURCE_ALARM;
 595 
 322:Core/Src/main.c ****   {
573 
 325:Core/Src/main.c ****   if (HAL_RTC_Init(&hrtc) != HAL_OK)
 596 
 323:Core/Src/main.c ****     Error_Handler();
574 
 326:Core/Src/main.c ****   {
 597 
 324:Core/Src/main.c ****   }
575 
 327:Core/Src/main.c ****     Error_Handler();
 598 
 325:Core/Src/main.c **** }
576 
 328:Core/Src/main.c ****   }
 599 
 326:Core/Src/main.c ****
577 
 329:Core/Src/main.c ****
600 
 327:Core/Src/main.c **** /**
- 
 
 601 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 11
- 
 
 602 
 
- 
 
 603 
 
578 
 330:Core/Src/main.c ****   /* USER CODE BEGIN Check_RTC_BKUP */
 604 
 328:Core/Src/main.c ****   * @brief I2C2 Initialization Function
579 
 331:Core/Src/main.c ****
605 
 329:Core/Src/main.c ****   * @param None
580 
 332:Core/Src/main.c ****   /* USER CODE END Check_RTC_BKUP */
 606 
 330:Core/Src/main.c ****   * @retval None
581 
 333:Core/Src/main.c ****
607 
 331:Core/Src/main.c ****   */
582 
 334:Core/Src/main.c ****   /** Initialize RTC and set the Time and Date
 608 
 332:Core/Src/main.c **** static void MX_I2C2_Init(void)
583 
 335:Core/Src/main.c ****   */
 609 
 333:Core/Src/main.c **** {
584 
 336:Core/Src/main.c ****   sTime.Hours = 0x0;
 610 
 334:Core/Src/main.c ****
585 
 337:Core/Src/main.c ****   sTime.Minutes = 0x0;
 611 
 335:Core/Src/main.c ****   /* USER CODE BEGIN I2C2_Init 0 */
- 
 
 612 
 336:Core/Src/main.c ****
586 
 338:Core/Src/main.c ****   sTime.Seconds = 0x0;
 613 
 337:Core/Src/main.c ****   /* USER CODE END I2C2_Init 0 */
587 
 339:Core/Src/main.c ****
614 
 338:Core/Src/main.c ****
588 
 340:Core/Src/main.c ****   if (HAL_RTC_SetTime(&hrtc, &sTime, RTC_FORMAT_BCD) != HAL_OK)
 615 
 339:Core/Src/main.c ****   /* USER CODE BEGIN I2C2_Init 1 */
589 
 341:Core/Src/main.c ****   {
 616 
 340:Core/Src/main.c ****
590 
 342:Core/Src/main.c ****     Error_Handler();
 617 
 341:Core/Src/main.c ****   /* USER CODE END I2C2_Init 1 */
591 
 343:Core/Src/main.c ****   }
 618 
 342:Core/Src/main.c ****   hi2c2.Instance = I2C2;
592 
 344:Core/Src/main.c ****   DateToUpdate.WeekDay = RTC_WEEKDAY_MONDAY;
 619 
 343:Core/Src/main.c ****   hi2c2.Init.ClockSpeed = 100000;
593 
 345:Core/Src/main.c ****   DateToUpdate.Month = RTC_MONTH_JANUARY;
 620 
 344:Core/Src/main.c ****   hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2;
594 
 346:Core/Src/main.c ****   DateToUpdate.Date = 0x1;
 621 
 345:Core/Src/main.c ****   hi2c2.Init.OwnAddress1 = 0;
- 
 
 622 
 346:Core/Src/main.c ****   hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
595 
 347:Core/Src/main.c ****   DateToUpdate.Year = 0x0;
 623 
 347:Core/Src/main.c ****   hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
596 
 348:Core/Src/main.c ****
624 
 348:Core/Src/main.c ****   hi2c2.Init.OwnAddress2 = 0;
597 
 349:Core/Src/main.c ****   if (HAL_RTC_SetDate(&hrtc, &DateToUpdate, RTC_FORMAT_BCD) != HAL_OK)
 625 
 349:Core/Src/main.c ****   hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
598 
 350:Core/Src/main.c ****   {
 626 
 350:Core/Src/main.c ****   hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
599 
 351:Core/Src/main.c ****     Error_Handler();
 627 
 351:Core/Src/main.c ****   if (HAL_I2C_Init(&hi2c2) != HAL_OK)
600 
 352:Core/Src/main.c ****   }
 628 
 352:Core/Src/main.c ****   {
601 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 11
 - 
 
602 
 
 - 
 
603 
 
 - 
 
604 
 353:Core/Src/main.c ****   /* USER CODE BEGIN RTC_Init 2 */
 629 
 353:Core/Src/main.c ****     Error_Handler();
605 
 354:Core/Src/main.c ****
630 
 354:Core/Src/main.c ****   }
606 
 355:Core/Src/main.c ****   /* USER CODE END RTC_Init 2 */
 631 
 355:Core/Src/main.c ****   /* USER CODE BEGIN I2C2_Init 2 */
607 
 356:Core/Src/main.c ****
632 
 356:Core/Src/main.c ****
608 
 357:Core/Src/main.c **** }
 633 
 357:Core/Src/main.c ****   /* USER CODE END I2C2_Init 2 */
609 
 358:Core/Src/main.c ****
634 
 358:Core/Src/main.c ****
- 
 
 635 
 359:Core/Src/main.c **** }
- 
 
 636 
 360:Core/Src/main.c ****
610 
 359:Core/Src/main.c **** /**
 637 
 361:Core/Src/main.c **** /**
611 
 360:Core/Src/main.c ****   * @brief SPI1 Initialization Function
 638 
 362:Core/Src/main.c ****   * @brief RTC Initialization Function
612 
 361:Core/Src/main.c ****   * @param None
 639 
 363:Core/Src/main.c ****   * @param None
613 
 362:Core/Src/main.c ****   * @retval None
 640 
 364:Core/Src/main.c ****   * @retval None
614 
 363:Core/Src/main.c ****   */
 641 
 365:Core/Src/main.c ****   */
615 
 364:Core/Src/main.c **** static void MX_SPI1_Init(void)
 642 
 366:Core/Src/main.c **** static void MX_RTC_Init(void)
616 
 365:Core/Src/main.c **** {
 643 
 367:Core/Src/main.c **** {
617 
 366:Core/Src/main.c ****
- 
 
618 
 367:Core/Src/main.c ****   /* USER CODE BEGIN SPI1_Init 0 */
 - 
 
619 
 368:Core/Src/main.c ****
644 
 368:Core/Src/main.c ****
620 
 369:Core/Src/main.c ****   /* USER CODE END SPI1_Init 0 */
 645 
 369:Core/Src/main.c ****   /* USER CODE BEGIN RTC_Init 0 */
621 
 370:Core/Src/main.c ****
646 
 370:Core/Src/main.c ****
622 
 371:Core/Src/main.c ****   /* USER CODE BEGIN SPI1_Init 1 */
 647 
 371:Core/Src/main.c ****   /* USER CODE END RTC_Init 0 */
623 
 372:Core/Src/main.c ****
648 
 372:Core/Src/main.c ****
624 
 373:Core/Src/main.c ****   /* USER CODE END SPI1_Init 1 */
 649 
 373:Core/Src/main.c ****   RTC_TimeTypeDef sTime = {0};
625 
 374:Core/Src/main.c ****   /* SPI1 parameter configuration*/
 650 
 374:Core/Src/main.c ****   RTC_DateTypeDef DateToUpdate = {0};
626 
 375:Core/Src/main.c ****   hspi1.Instance = SPI1;
 651 
 375:Core/Src/main.c ****
627 
 376:Core/Src/main.c ****   hspi1.Init.Mode = SPI_MODE_MASTER;
 652 
 376:Core/Src/main.c ****   /* USER CODE BEGIN RTC_Init 1 */
628 
 377:Core/Src/main.c ****   hspi1.Init.Direction = SPI_DIRECTION_1LINE;
 653 
 377:Core/Src/main.c ****
629 
 378:Core/Src/main.c ****   hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
 654 
 378:Core/Src/main.c ****   /* USER CODE END RTC_Init 1 */
630 
 379:Core/Src/main.c ****   hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH;
 655 
 379:Core/Src/main.c ****   /** Initialize RTC Only
631 
 380:Core/Src/main.c ****   hspi1.Init.CLKPhase = SPI_PHASE_2EDGE;
 656 
 380:Core/Src/main.c ****   */
632 
 381:Core/Src/main.c ****   hspi1.Init.NSS = SPI_NSS_SOFT;
 657 
 381:Core/Src/main.c ****   hrtc.Instance = RTC;
633 
 382:Core/Src/main.c ****   hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8;
 658 
 382:Core/Src/main.c ****   hrtc.Init.AsynchPrediv = RTC_AUTO_1_SECOND;
634 
 383:Core/Src/main.c ****   hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
 659 
 383:Core/Src/main.c ****   hrtc.Init.OutPut = RTC_OUTPUTSOURCE_ALARM;
635 
 384:Core/Src/main.c ****   hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
 660 
 384:Core/Src/main.c ****   if (HAL_RTC_Init(&hrtc) != HAL_OK)
- 
 
 661 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 12
- 
 
 662 
 
- 
 
 663 
 
636 
 385:Core/Src/main.c ****   hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
 664 
 385:Core/Src/main.c ****   {
637 
 386:Core/Src/main.c ****   hspi1.Init.CRCPolynomial = 10;
 665 
 386:Core/Src/main.c ****     Error_Handler();
638 
 387:Core/Src/main.c ****   if (HAL_SPI_Init(&hspi1) != HAL_OK)
 666 
 387:Core/Src/main.c ****   }
639 
 388:Core/Src/main.c ****   {
 667 
 388:Core/Src/main.c ****
640 
 389:Core/Src/main.c ****     Error_Handler();
 668 
 389:Core/Src/main.c ****   /* USER CODE BEGIN Check_RTC_BKUP */
641 
 390:Core/Src/main.c ****   }
 669 
 390:Core/Src/main.c ****
642 
 391:Core/Src/main.c ****   /* USER CODE BEGIN SPI1_Init 2 */
 670 
 391:Core/Src/main.c ****   /* USER CODE END Check_RTC_BKUP */
643 
 392:Core/Src/main.c ****
671 
 392:Core/Src/main.c ****
644 
 393:Core/Src/main.c ****   /* USER CODE END SPI1_Init 2 */
 672 
 393:Core/Src/main.c ****   /** Initialize RTC and set the Time and Date
645 
 394:Core/Src/main.c ****
673 
 394:Core/Src/main.c ****   */
646 
 395:Core/Src/main.c **** }
 674 
 395:Core/Src/main.c ****   sTime.Hours = 0x0;
647 
 396:Core/Src/main.c ****
675 
 396:Core/Src/main.c ****   sTime.Minutes = 0x0;
- 
 
 676 
 397:Core/Src/main.c ****   sTime.Seconds = 0x0;
648 
 397:Core/Src/main.c **** /**
 677 
 398:Core/Src/main.c ****
649 
 398:Core/Src/main.c ****   * @brief TIM3 Initialization Function
 678 
 399:Core/Src/main.c ****   if (HAL_RTC_SetTime(&hrtc, &sTime, RTC_FORMAT_BCD) != HAL_OK)
650 
 399:Core/Src/main.c ****   * @param None
 679 
 400:Core/Src/main.c ****   {
651 
 400:Core/Src/main.c ****   * @retval None
 680 
 401:Core/Src/main.c ****     Error_Handler();
652 
 401:Core/Src/main.c ****   */
 681 
 402:Core/Src/main.c ****   }
653 
 402:Core/Src/main.c **** static void MX_TIM3_Init(void)
 682 
 403:Core/Src/main.c ****   DateToUpdate.WeekDay = RTC_WEEKDAY_MONDAY;
654 
 403:Core/Src/main.c **** {
 683 
 404:Core/Src/main.c ****   DateToUpdate.Month = RTC_MONTH_JANUARY;
655 
 404:Core/Src/main.c ****
684 
 405:Core/Src/main.c ****   DateToUpdate.Date = 0x1;
656 
 405:Core/Src/main.c ****   /* USER CODE BEGIN TIM3_Init 0 */
 685 
 406:Core/Src/main.c ****   DateToUpdate.Year = 0x0;
657 
 406:Core/Src/main.c ****
686 
 407:Core/Src/main.c ****
658 
 407:Core/Src/main.c ****   /* USER CODE END TIM3_Init 0 */
 687 
 408:Core/Src/main.c ****   if (HAL_RTC_SetDate(&hrtc, &DateToUpdate, RTC_FORMAT_BCD) != HAL_OK)
659 
 408:Core/Src/main.c ****
688 
 409:Core/Src/main.c ****   {
660 
 409:Core/Src/main.c ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
 - 
 
661 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 12
 - 
 
662 
 
 - 
 
663 
 
 - 
 
664 
 410:Core/Src/main.c ****   TIM_OC_InitTypeDef sConfigOC = {0};
 689 
 410:Core/Src/main.c ****     Error_Handler();
665 
 411:Core/Src/main.c ****
690 
 411:Core/Src/main.c ****   }
666 
 412:Core/Src/main.c ****   /* USER CODE BEGIN TIM3_Init 1 */
 691 
 412:Core/Src/main.c ****   /* USER CODE BEGIN RTC_Init 2 */
667 
 413:Core/Src/main.c ****
692 
 413:Core/Src/main.c ****
668 
 414:Core/Src/main.c ****   /* USER CODE END TIM3_Init 1 */
 693 
 414:Core/Src/main.c ****   /* USER CODE END RTC_Init 2 */
669 
 415:Core/Src/main.c ****   htim3.Instance = TIM3;
 694 
 415:Core/Src/main.c ****
670 
 416:Core/Src/main.c ****   htim3.Init.Prescaler = 640;
 695 
 416:Core/Src/main.c **** }
671 
 417:Core/Src/main.c ****   htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
 696 
 417:Core/Src/main.c ****
672 
 418:Core/Src/main.c ****   htim3.Init.Period = 10000;
 697 
 418:Core/Src/main.c **** /**
673 
 419:Core/Src/main.c ****   htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
 698 
 419:Core/Src/main.c ****   * @brief SPI1 Initialization Function
674 
 420:Core/Src/main.c ****   htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 699 
 420:Core/Src/main.c ****   * @param None
675 
 421:Core/Src/main.c ****   if (HAL_TIM_OC_Init(&htim3) != HAL_OK)
 700 
 421:Core/Src/main.c ****   * @retval None
676 
 422:Core/Src/main.c ****   {
 701 
 422:Core/Src/main.c ****   */
677 
 423:Core/Src/main.c ****     Error_Handler();
 702 
 423:Core/Src/main.c **** static void MX_SPI1_Init(void)
678 
 424:Core/Src/main.c ****   }
 703 
 424:Core/Src/main.c **** {
679 
 425:Core/Src/main.c ****   if (HAL_TIM_OnePulse_Init(&htim3, TIM_OPMODE_SINGLE) != HAL_OK)
 - 
 
680 
 426:Core/Src/main.c ****   {
 704 
 425:Core/Src/main.c ****
681 
 427:Core/Src/main.c ****     Error_Handler();
 705 
 426:Core/Src/main.c ****   /* USER CODE BEGIN SPI1_Init 0 */
682 
 428:Core/Src/main.c ****   }
 706 
 427:Core/Src/main.c ****
683 
 429:Core/Src/main.c ****   sMasterConfig.MasterOutputTrigger = TIM_TRGO_ENABLE;
 707 
 428:Core/Src/main.c ****   /* USER CODE END SPI1_Init 0 */
684 
 430:Core/Src/main.c ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 708 
 429:Core/Src/main.c ****
685 
 431:Core/Src/main.c ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
 709 
 430:Core/Src/main.c ****   /* USER CODE BEGIN SPI1_Init 1 */
686 
 432:Core/Src/main.c ****   {
 710 
 431:Core/Src/main.c ****
- 
 
 711 
 432:Core/Src/main.c ****   /* USER CODE END SPI1_Init 1 */
687 
 433:Core/Src/main.c ****     Error_Handler();
 712 
 433:Core/Src/main.c ****   /* SPI1 parameter configuration*/
688 
 434:Core/Src/main.c ****   }
 713 
 434:Core/Src/main.c ****   hspi1.Instance = SPI1;
689 
 435:Core/Src/main.c ****   sConfigOC.OCMode = TIM_OCMODE_TIMING;
 714 
 435:Core/Src/main.c ****   hspi1.Init.Mode = SPI_MODE_MASTER;
690 
 436:Core/Src/main.c ****   sConfigOC.Pulse = 9999;
 715 
 436:Core/Src/main.c ****   hspi1.Init.Direction = SPI_DIRECTION_1LINE;
691 
 437:Core/Src/main.c ****   sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
 716 
 437:Core/Src/main.c ****   hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
692 
 438:Core/Src/main.c ****   sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
 717 
 438:Core/Src/main.c ****   hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH;
693 
 439:Core/Src/main.c ****   if (HAL_TIM_OC_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
 718 
 439:Core/Src/main.c ****   hspi1.Init.CLKPhase = SPI_PHASE_2EDGE;
694 
 440:Core/Src/main.c ****   {
 719 
 440:Core/Src/main.c ****   hspi1.Init.NSS = SPI_NSS_SOFT;
695 
 441:Core/Src/main.c ****     Error_Handler();
 720 
 441:Core/Src/main.c ****   hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8;
- 
 
 721 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 13
- 
 
 722 
 
- 
 
 723 
 
696 
 442:Core/Src/main.c ****   }
 724 
 442:Core/Src/main.c ****   hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
697 
 443:Core/Src/main.c ****   /* USER CODE BEGIN TIM3_Init 2 */
 725 
 443:Core/Src/main.c ****   hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
698 
 444:Core/Src/main.c ****
726 
 444:Core/Src/main.c ****   hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
699 
 445:Core/Src/main.c ****   /* USER CODE END TIM3_Init 2 */
 727 
 445:Core/Src/main.c ****   hspi1.Init.CRCPolynomial = 10;
700 
 446:Core/Src/main.c ****
728 
 446:Core/Src/main.c ****   if (HAL_SPI_Init(&hspi1) != HAL_OK)
701 
 447:Core/Src/main.c **** }
 729 
 447:Core/Src/main.c ****   {
702 
 448:Core/Src/main.c ****
730 
 448:Core/Src/main.c ****     Error_Handler();
703 
 449:Core/Src/main.c **** /**
 731 
 449:Core/Src/main.c ****   }
704 
 450:Core/Src/main.c ****   * @brief TIM4 Initialization Function
 732 
 450:Core/Src/main.c ****   /* USER CODE BEGIN SPI1_Init 2 */
705 
 451:Core/Src/main.c ****   * @param None
 733 
 451:Core/Src/main.c ****
706 
 452:Core/Src/main.c ****   * @retval None
 734 
 452:Core/Src/main.c ****   /* USER CODE END SPI1_Init 2 */
707 
 453:Core/Src/main.c ****   */
 735 
 453:Core/Src/main.c ****
708 
 454:Core/Src/main.c **** static void MX_TIM4_Init(void)
 736 
 454:Core/Src/main.c **** }
709 
 455:Core/Src/main.c **** {
 737 
 455:Core/Src/main.c ****
710 
 456:Core/Src/main.c ****
738 
 456:Core/Src/main.c **** /**
711 
 457:Core/Src/main.c ****   /* USER CODE BEGIN TIM4_Init 0 */
 739 
 457:Core/Src/main.c ****   * @brief TIM3 Initialization Function
712 
 458:Core/Src/main.c ****
740 
 458:Core/Src/main.c ****   * @param None
713 
 459:Core/Src/main.c ****   /* USER CODE END TIM4_Init 0 */
 741 
 459:Core/Src/main.c ****   * @retval None
714 
 460:Core/Src/main.c ****
742 
 460:Core/Src/main.c ****   */
715 
 461:Core/Src/main.c ****   TIM_Encoder_InitTypeDef sConfig = {0};
 743 
 461:Core/Src/main.c **** static void MX_TIM3_Init(void)
716 
 462:Core/Src/main.c ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
 744 
 462:Core/Src/main.c **** {
717 
 463:Core/Src/main.c ****
745 
 463:Core/Src/main.c ****
718 
 464:Core/Src/main.c ****   /* USER CODE BEGIN TIM4_Init 1 */
 746 
 464:Core/Src/main.c ****   /* USER CODE BEGIN TIM3_Init 0 */
719 
 465:Core/Src/main.c ****
747 
 465:Core/Src/main.c ****
720 
 466:Core/Src/main.c ****   /* USER CODE END TIM4_Init 1 */
 748 
 466:Core/Src/main.c ****   /* USER CODE END TIM3_Init 0 */
721 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 13
 - 
 
722 
 
 - 
 
723 
 
 - 
 
724 
 467:Core/Src/main.c ****   htim4.Instance = TIM4;
 749 
 467:Core/Src/main.c ****
725 
 468:Core/Src/main.c ****   htim4.Init.Prescaler = 0;
 750 
 468:Core/Src/main.c ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
726 
 469:Core/Src/main.c ****   htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
 751 
 469:Core/Src/main.c ****   TIM_OC_InitTypeDef sConfigOC = {0};
727 
 470:Core/Src/main.c ****   htim4.Init.Period = 65535;
 752 
 470:Core/Src/main.c ****
728 
 471:Core/Src/main.c ****   htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
 753 
 471:Core/Src/main.c ****   /* USER CODE BEGIN TIM3_Init 1 */
729 
 472:Core/Src/main.c ****   htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 754 
 472:Core/Src/main.c ****
730 
 473:Core/Src/main.c ****   sConfig.EncoderMode = TIM_ENCODERMODE_TI12;
 755 
 473:Core/Src/main.c ****   /* USER CODE END TIM3_Init 1 */
731 
 474:Core/Src/main.c ****   sConfig.IC1Polarity = TIM_ICPOLARITY_RISING;
 756 
 474:Core/Src/main.c ****   htim3.Instance = TIM3;
732 
 475:Core/Src/main.c ****   sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI;
 757 
 475:Core/Src/main.c ****   htim3.Init.Prescaler = 719;
733 
 476:Core/Src/main.c ****   sConfig.IC1Prescaler = TIM_ICPSC_DIV1;
 758 
 476:Core/Src/main.c ****   htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
734 
 477:Core/Src/main.c ****   sConfig.IC1Filter = 8;
 759 
 477:Core/Src/main.c ****   htim3.Init.Period = 10000;
735 
 478:Core/Src/main.c ****   sConfig.IC2Polarity = TIM_ICPOLARITY_RISING;
 760 
 478:Core/Src/main.c ****   htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
736 
 479:Core/Src/main.c ****   sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI;
 761 
 479:Core/Src/main.c ****   htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
737 
 480:Core/Src/main.c ****   sConfig.IC2Prescaler = TIM_ICPSC_DIV1;
 762 
 480:Core/Src/main.c ****   if (HAL_TIM_OC_Init(&htim3) != HAL_OK)
- 
 
 763 
 481:Core/Src/main.c ****   {
738 
 481:Core/Src/main.c ****   sConfig.IC2Filter = 8;
 764 
 482:Core/Src/main.c ****     Error_Handler();
- 
 
 765 
 483:Core/Src/main.c ****   }
739 
 482:Core/Src/main.c ****   if (HAL_TIM_Encoder_Init(&htim4, &sConfig) != HAL_OK)
 766 
 484:Core/Src/main.c ****   if (HAL_TIM_OnePulse_Init(&htim3, TIM_OPMODE_SINGLE) != HAL_OK)
740 
 483:Core/Src/main.c ****   {
 767 
 485:Core/Src/main.c ****   {
741 
 484:Core/Src/main.c ****     Error_Handler();
 768 
 486:Core/Src/main.c ****     Error_Handler();
742 
 485:Core/Src/main.c ****   }
 769 
 487:Core/Src/main.c ****   }
743 
 486:Core/Src/main.c ****   sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
 770 
 488:Core/Src/main.c ****   sMasterConfig.MasterOutputTrigger = TIM_TRGO_ENABLE;
744 
 487:Core/Src/main.c ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 771 
 489:Core/Src/main.c ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
745 
 488:Core/Src/main.c ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
 772 
 490:Core/Src/main.c ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
746 
 489:Core/Src/main.c ****   {
 773 
 491:Core/Src/main.c ****   {
747 
 490:Core/Src/main.c ****     Error_Handler();
 774 
 492:Core/Src/main.c ****     Error_Handler();
748 
 491:Core/Src/main.c ****   }
 775 
 493:Core/Src/main.c ****   }
749 
 492:Core/Src/main.c ****   /* USER CODE BEGIN TIM4_Init 2 */
 776 
 494:Core/Src/main.c ****   sConfigOC.OCMode = TIM_OCMODE_TIMING;
750 
 493:Core/Src/main.c ****
777 
 495:Core/Src/main.c ****   sConfigOC.Pulse = 9999;
751 
 494:Core/Src/main.c ****   /* USER CODE END TIM4_Init 2 */
 778 
 496:Core/Src/main.c ****   sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
752 
 495:Core/Src/main.c ****
779 
 497:Core/Src/main.c ****   sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
753 
 496:Core/Src/main.c **** }
 780 
 498:Core/Src/main.c ****   if (HAL_TIM_OC_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
754 
 497:Core/Src/main.c ****
781 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 14
- 
 
 782 
 
- 
 
 783 
 
755 
 498:Core/Src/main.c **** /**
 784 
 499:Core/Src/main.c ****   {
756 
 499:Core/Src/main.c ****   * @brief USART1 Initialization Function
 785 
 500:Core/Src/main.c ****     Error_Handler();
757 
 500:Core/Src/main.c ****   * @param None
 786 
 501:Core/Src/main.c ****   }
758 
 501:Core/Src/main.c ****   * @retval None
 787 
 502:Core/Src/main.c ****   /* USER CODE BEGIN TIM3_Init 2 */
759 
 502:Core/Src/main.c ****   */
 788 
 503:Core/Src/main.c ****
760 
 503:Core/Src/main.c **** static void MX_USART1_UART_Init(void)
 789 
 504:Core/Src/main.c ****   /* USER CODE END TIM3_Init 2 */
761 
 504:Core/Src/main.c **** {
 - 
 
762 
 505:Core/Src/main.c ****
790 
 505:Core/Src/main.c ****
763 
 506:Core/Src/main.c ****   /* USER CODE BEGIN USART1_Init 0 */
 791 
 506:Core/Src/main.c **** }
764 
 507:Core/Src/main.c ****
792 
 507:Core/Src/main.c ****
765 
 508:Core/Src/main.c ****   /* USER CODE END USART1_Init 0 */
 793 
 508:Core/Src/main.c **** /**
766 
 509:Core/Src/main.c ****
794 
 509:Core/Src/main.c ****   * @brief TIM4 Initialization Function
767 
 510:Core/Src/main.c ****   /* USER CODE BEGIN USART1_Init 1 */
 795 
 510:Core/Src/main.c ****   * @param None
768 
 511:Core/Src/main.c ****
796 
 511:Core/Src/main.c ****   * @retval None
769 
 512:Core/Src/main.c ****   /* USER CODE END USART1_Init 1 */
 797 
 512:Core/Src/main.c ****   */
770 
 513:Core/Src/main.c ****   huart1.Instance = USART1;
 798 
 513:Core/Src/main.c **** static void MX_TIM4_Init(void)
771 
 514:Core/Src/main.c ****   huart1.Init.BaudRate = 115200;
 799 
 514:Core/Src/main.c **** {
772 
 515:Core/Src/main.c ****   huart1.Init.WordLength = UART_WORDLENGTH_8B;
 800 
 515:Core/Src/main.c ****
773 
 516:Core/Src/main.c ****   huart1.Init.StopBits = UART_STOPBITS_1;
 801 
 516:Core/Src/main.c ****   /* USER CODE BEGIN TIM4_Init 0 */
774 
 517:Core/Src/main.c ****   huart1.Init.Parity = UART_PARITY_NONE;
 802 
 517:Core/Src/main.c ****
775 
 518:Core/Src/main.c ****   huart1.Init.Mode = UART_MODE_TX_RX;
 803 
 518:Core/Src/main.c ****   /* USER CODE END TIM4_Init 0 */
776 
 519:Core/Src/main.c ****   huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 804 
 519:Core/Src/main.c ****
777 
 520:Core/Src/main.c ****   huart1.Init.OverSampling = UART_OVERSAMPLING_16;
 805 
 520:Core/Src/main.c ****   TIM_Encoder_InitTypeDef sConfig = {0};
778 
 521:Core/Src/main.c ****   if (HAL_UART_Init(&huart1) != HAL_OK)
 806 
 521:Core/Src/main.c ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
779 
 522:Core/Src/main.c ****   {
 807 
 522:Core/Src/main.c ****
780 
 523:Core/Src/main.c ****     Error_Handler();
 808 
 523:Core/Src/main.c ****   /* USER CODE BEGIN TIM4_Init 1 */
781 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 14
 809 
 524:Core/Src/main.c ****
782 
 
 810 
 525:Core/Src/main.c ****   /* USER CODE END TIM4_Init 1 */
783 
 
 811 
 526:Core/Src/main.c ****   htim4.Instance = TIM4;
784 
 524:Core/Src/main.c ****   }
 812 
 527:Core/Src/main.c ****   htim4.Init.Prescaler = 0;
785 
 525:Core/Src/main.c ****   /* USER CODE BEGIN USART1_Init 2 */
 813 
 528:Core/Src/main.c ****   htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
786 
 526:Core/Src/main.c ****
814 
 529:Core/Src/main.c ****   htim4.Init.Period = 65535;
787 
 527:Core/Src/main.c ****   /* USER CODE END USART1_Init 2 */
 815 
 530:Core/Src/main.c ****   htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
788 
 528:Core/Src/main.c ****
816 
 531:Core/Src/main.c ****   htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
789 
 529:Core/Src/main.c **** }
 817 
 532:Core/Src/main.c ****   sConfig.EncoderMode = TIM_ENCODERMODE_TI12;
790 
 530:Core/Src/main.c ****
818 
 533:Core/Src/main.c ****   sConfig.IC1Polarity = TIM_ICPOLARITY_RISING;
791 
 531:Core/Src/main.c **** /**
 819 
 534:Core/Src/main.c ****   sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI;
792 
 532:Core/Src/main.c ****   * @brief GPIO Initialization Function
 820 
 535:Core/Src/main.c ****   sConfig.IC1Prescaler = TIM_ICPSC_DIV1;
793 
 533:Core/Src/main.c ****   * @param None
 821 
 536:Core/Src/main.c ****   sConfig.IC1Filter = 8;
794 
 534:Core/Src/main.c ****   * @retval None
 822 
 537:Core/Src/main.c ****   sConfig.IC2Polarity = TIM_ICPOLARITY_RISING;
795 
 535:Core/Src/main.c ****   */
 823 
 538:Core/Src/main.c ****   sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI;
796 
 536:Core/Src/main.c **** static void MX_GPIO_Init(void)
 824 
 539:Core/Src/main.c ****   sConfig.IC2Prescaler = TIM_ICPSC_DIV1;
797 
 537:Core/Src/main.c **** {
 825 
 540:Core/Src/main.c ****   sConfig.IC2Filter = 8;
798 
 200              		.loc 1 537 1 is_stmt 1 view -0
 826 
 541:Core/Src/main.c ****   if (HAL_TIM_Encoder_Init(&htim4, &sConfig) != HAL_OK)
799 
 201              		.cfi_startproc
 827 
 542:Core/Src/main.c ****   {
800 
 202              		@ args = 0, pretend = 0, frame = 32
 828 
 543:Core/Src/main.c ****     Error_Handler();
801 
 203              		@ frame_needed = 0, uses_anonymous_args = 0
 829 
 544:Core/Src/main.c ****   }
802 
 204 0000 2DE9F041 		push	{r4, r5, r6, r7, r8, lr}
 830 
 545:Core/Src/main.c ****   sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
803 
 205              	.LCFI9:
 831 
 546:Core/Src/main.c ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
804 
 206              		.cfi_def_cfa_offset 24
 832 
 547:Core/Src/main.c ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
805 
 207              		.cfi_offset 4, -24
 833 
 548:Core/Src/main.c ****   {
806 
 208              		.cfi_offset 5, -20
 834 
 549:Core/Src/main.c ****     Error_Handler();
807 
 209              		.cfi_offset 6, -16
 835 
 550:Core/Src/main.c ****   }
808 
 210              		.cfi_offset 7, -12
 836 
 551:Core/Src/main.c ****   /* USER CODE BEGIN TIM4_Init 2 */
809 
 211              		.cfi_offset 8, -8
 837 
 552:Core/Src/main.c ****
810 
 212              		.cfi_offset 14, -4
 838 
 553:Core/Src/main.c ****   /* USER CODE END TIM4_Init 2 */
811 
 213 0004 88B0     		sub	sp, sp, #32
 839 
 554:Core/Src/main.c ****
812 
 214              	.LCFI10:
 840 
 555:Core/Src/main.c **** }
813 
 215              		.cfi_def_cfa_offset 56
 841 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 15
814 
 538:Core/Src/main.c ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
 842 
 
815 
 216              		.loc 1 538 3 view .LVU31
 843 
 
816 
 217              		.loc 1 538 20 is_stmt 0 view .LVU32
 844 
 556:Core/Src/main.c ****
817 
 218 0006 0024     		movs	r4, #0
 845 
 557:Core/Src/main.c **** /**
818 
 219 0008 0494     		str	r4, [sp, #16]
 846 
 558:Core/Src/main.c ****   * @brief USART1 Initialization Function
819 
 220 000a 0594     		str	r4, [sp, #20]
 847 
 559:Core/Src/main.c ****   * @param None
820 
 221 000c 0694     		str	r4, [sp, #24]
 848 
 560:Core/Src/main.c ****   * @retval None
821 
 222 000e 0794     		str	r4, [sp, #28]
 849 
 561:Core/Src/main.c ****   */
822 
 539:Core/Src/main.c ****
850 
 562:Core/Src/main.c **** static void MX_USART1_UART_Init(void)
823 
 540:Core/Src/main.c ****   /* GPIO Ports Clock Enable */
 851 
 563:Core/Src/main.c **** {
824 
 541:Core/Src/main.c ****   __HAL_RCC_GPIOC_CLK_ENABLE();
 852 
 564:Core/Src/main.c ****
825 
 223              		.loc 1 541 3 is_stmt 1 view .LVU33
 853 
 565:Core/Src/main.c ****   /* USER CODE BEGIN USART1_Init 0 */
826 
 224              	.LBB2:
 854 
 566:Core/Src/main.c ****
827 
 225              		.loc 1 541 3 view .LVU34
 855 
 567:Core/Src/main.c ****   /* USER CODE END USART1_Init 0 */
828 
 226              		.loc 1 541 3 view .LVU35
 856 
 568:Core/Src/main.c ****
829 
 227 0010 244B     		ldr	r3, .L19
 857 
 569:Core/Src/main.c ****   /* USER CODE BEGIN USART1_Init 1 */
830 
 228 0012 9A69     		ldr	r2, [r3, #24]
 858 
 570:Core/Src/main.c ****
831 
 229 0014 42F01002 		orr	r2, r2, #16
 859 
 571:Core/Src/main.c ****   /* USER CODE END USART1_Init 1 */
832 
 230 0018 9A61     		str	r2, [r3, #24]
 860 
 572:Core/Src/main.c ****   huart1.Instance = USART1;
833 
 231              		.loc 1 541 3 view .LVU36
 861 
 573:Core/Src/main.c ****   huart1.Init.BaudRate = 115200;
834 
 232 001a 9A69     		ldr	r2, [r3, #24]
 862 
 574:Core/Src/main.c ****   huart1.Init.WordLength = UART_WORDLENGTH_8B;
835 
 233 001c 02F01002 		and	r2, r2, #16
 863 
 575:Core/Src/main.c ****   huart1.Init.StopBits = UART_STOPBITS_1;
836 
 234 0020 0092     		str	r2, [sp]
 864 
 576:Core/Src/main.c ****   huart1.Init.Parity = UART_PARITY_NONE;
837 
 235              		.loc 1 541 3 view .LVU37
 865 
 577:Core/Src/main.c ****   huart1.Init.Mode = UART_MODE_TX_RX;
838 
 236 0022 009A     		ldr	r2, [sp]
 866 
 578:Core/Src/main.c ****   huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
839 
 237              	.LBE2:
 867 
 579:Core/Src/main.c ****   huart1.Init.OverSampling = UART_OVERSAMPLING_16;
840 
 542:Core/Src/main.c ****   __HAL_RCC_GPIOD_CLK_ENABLE();
 868 
 580:Core/Src/main.c ****   if (HAL_UART_Init(&huart1) != HAL_OK)
841 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 15
 869 
 581:Core/Src/main.c ****   {
842 
 
 870 
 582:Core/Src/main.c ****     Error_Handler();
843 
 
 871 
 583:Core/Src/main.c ****   }
844 
 238              		.loc 1 542 3 view .LVU38
 872 
 584:Core/Src/main.c ****   /* USER CODE BEGIN USART1_Init 2 */
845 
 239              	.LBB3:
 873 
 585:Core/Src/main.c ****
846 
 240              		.loc 1 542 3 view .LVU39
 874 
 586:Core/Src/main.c ****   /* USER CODE END USART1_Init 2 */
847 
 241              		.loc 1 542 3 view .LVU40
 875 
 587:Core/Src/main.c ****
848 
 242 0024 9A69     		ldr	r2, [r3, #24]
 876 
 588:Core/Src/main.c **** }
849 
 243 0026 42F02002 		orr	r2, r2, #32
 877 
 589:Core/Src/main.c ****
850 
 244 002a 9A61     		str	r2, [r3, #24]
 878 
 590:Core/Src/main.c **** /**
851 
 245              		.loc 1 542 3 view .LVU41
 879 
 591:Core/Src/main.c ****   * @brief GPIO Initialization Function
852 
 246 002c 9A69     		ldr	r2, [r3, #24]
 880 
 592:Core/Src/main.c ****   * @param None
853 
 247 002e 02F02002 		and	r2, r2, #32
 881 
 593:Core/Src/main.c ****   * @retval None
854 
 248 0032 0192     		str	r2, [sp, #4]
 882 
 594:Core/Src/main.c ****   */
855 
 249              		.loc 1 542 3 view .LVU42
 883 
 595:Core/Src/main.c **** static void MX_GPIO_Init(void)
856 
 250 0034 019A     		ldr	r2, [sp, #4]
 884 
 596:Core/Src/main.c **** {
857 
 251              	.LBE3:
 885 
 221              		.loc 1 596 1 is_stmt 1 view -0
858 
 543:Core/Src/main.c ****   __HAL_RCC_GPIOA_CLK_ENABLE();
 886 
 222              		.cfi_startproc
859 
 252              		.loc 1 543 3 view .LVU43
 887 
 223              		@ args = 0, pretend = 0, frame = 32
860 
 253              	.LBB4:
 888 
 224              		@ frame_needed = 0, uses_anonymous_args = 0
861 
 254              		.loc 1 543 3 view .LVU44
 889 
 225 0000 2DE9F041 		push	{r4, r5, r6, r7, r8, lr}
862 
 255              		.loc 1 543 3 view .LVU45
 890 
 226              	.LCFI9:
863 
 256 0036 9A69     		ldr	r2, [r3, #24]
 891 
 227              		.cfi_def_cfa_offset 24
864 
 257 0038 42F00402 		orr	r2, r2, #4
 892 
 228              		.cfi_offset 4, -24
865 
 258 003c 9A61     		str	r2, [r3, #24]
 893 
 229              		.cfi_offset 5, -20
866 
 259              		.loc 1 543 3 view .LVU46
 894 
 230              		.cfi_offset 6, -16
867 
 260 003e 9A69     		ldr	r2, [r3, #24]
 895 
 231              		.cfi_offset 7, -12
868 
 261 0040 02F00402 		and	r2, r2, #4
 896 
 232              		.cfi_offset 8, -8
869 
 262 0044 0292     		str	r2, [sp, #8]
 897 
 233              		.cfi_offset 14, -4
870 
 263              		.loc 1 543 3 view .LVU47
 898 
 234 0004 88B0     		sub	sp, sp, #32
871 
 264 0046 029A     		ldr	r2, [sp, #8]
 899 
 235              	.LCFI10:
872 
 265              	.LBE4:
 900 
 236              		.cfi_def_cfa_offset 56
873 
 544:Core/Src/main.c ****   __HAL_RCC_GPIOB_CLK_ENABLE();
 901 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 16
874 
 266              		.loc 1 544 3 view .LVU48
 902 
 
875 
 267              	.LBB5:
 903 
 
876 
 268              		.loc 1 544 3 view .LVU49
 904 
 597:Core/Src/main.c ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
877 
 269              		.loc 1 544 3 view .LVU50
 905 
 237              		.loc 1 597 3 view .LVU38
878 
 270 0048 9A69     		ldr	r2, [r3, #24]
 906 
 238              		.loc 1 597 20 is_stmt 0 view .LVU39
879 
 271 004a 42F00802 		orr	r2, r2, #8
 907 
 239 0006 0024     		movs	r4, #0
880 
 272 004e 9A61     		str	r2, [r3, #24]
 908 
 240 0008 0494     		str	r4, [sp, #16]
881 
 273              		.loc 1 544 3 view .LVU51
 909 
 241 000a 0594     		str	r4, [sp, #20]
882 
 274 0050 9B69     		ldr	r3, [r3, #24]
 910 
 242 000c 0694     		str	r4, [sp, #24]
883 
 275 0052 03F00803 		and	r3, r3, #8
 911 
 243 000e 0794     		str	r4, [sp, #28]
884 
 276 0056 0393     		str	r3, [sp, #12]
 912 
 598:Core/Src/main.c ****
885 
 277              		.loc 1 544 3 view .LVU52
 913 
 599:Core/Src/main.c ****   /* GPIO Ports Clock Enable */
886 
 278 0058 039B     		ldr	r3, [sp, #12]
 914 
 600:Core/Src/main.c ****   __HAL_RCC_GPIOC_CLK_ENABLE();
887 
 279              	.LBE5:
 915 
 244              		.loc 1 600 3 is_stmt 1 view .LVU40
888 
 545:Core/Src/main.c ****
916 
 245              	.LBB2:
889 
 546:Core/Src/main.c ****   /*Configure GPIO pin Output Level */
 917 
 246              		.loc 1 600 3 view .LVU41
890 
 547:Core/Src/main.c ****   HAL_GPIO_WritePin(GPIOA, SPI_CD_Pin|SPI_RESET_Pin|SPI_NSS1_Pin, GPIO_PIN_RESET);
 918 
 247              		.loc 1 600 3 view .LVU42
891 
 280              		.loc 1 547 3 view .LVU53
 919 
 248 0010 244B     		ldr	r3, .L21
892 
 281 005a DFF85080 		ldr	r8, .L19+8
 920 
 249 0012 9A69     		ldr	r2, [r3, #24]
893 
 282 005e 2246     		mov	r2, r4
 921 
 250 0014 42F01002 		orr	r2, r2, #16
894 
 283 0060 5821     		movs	r1, #88
 922 
 251 0018 9A61     		str	r2, [r3, #24]
895 
 284 0062 4046     		mov	r0, r8
 923 
 252              		.loc 1 600 3 view .LVU43
896 
 285 0064 FFF7FEFF 		bl	HAL_GPIO_WritePin
 924 
 253 001a 9A69     		ldr	r2, [r3, #24]
897 
 286              	.LVL20:
 925 
 254 001c 02F01002 		and	r2, r2, #16
898 
 548:Core/Src/main.c ****
926 
 255 0020 0092     		str	r2, [sp]
899 
 549:Core/Src/main.c ****   /*Configure GPIO pin Output Level */
 927 
 256              		.loc 1 600 3 view .LVU44
900 
 550:Core/Src/main.c ****   HAL_GPIO_WritePin(USB_PULLUP_GPIO_Port, USB_PULLUP_Pin, GPIO_PIN_RESET);
 928 
 257 0022 009A     		ldr	r2, [sp]
901 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 16
 929 
 258              	.LBE2:
902 
 
 930 
 601:Core/Src/main.c ****   __HAL_RCC_GPIOD_CLK_ENABLE();
903 
 
 931 
 259              		.loc 1 601 3 view .LVU45
904 
 287              		.loc 1 550 3 view .LVU54
 932 
 260              	.LBB3:
905 
 288 0068 0F4D     		ldr	r5, .L19+4
 933 
 261              		.loc 1 601 3 view .LVU46
906 
 289 006a 2246     		mov	r2, r4
 934 
 262              		.loc 1 601 3 view .LVU47
907 
 290 006c 1021     		movs	r1, #16
 935 
 263 0024 9A69     		ldr	r2, [r3, #24]
908 
 291 006e 2846     		mov	r0, r5
 936 
 264 0026 42F02002 		orr	r2, r2, #32
909 
 292 0070 FFF7FEFF 		bl	HAL_GPIO_WritePin
 937 
 265 002a 9A61     		str	r2, [r3, #24]
910 
 293              	.LVL21:
 938 
 266              		.loc 1 601 3 view .LVU48
911 
 551:Core/Src/main.c ****
939 
 267 002c 9A69     		ldr	r2, [r3, #24]
912 
 552:Core/Src/main.c ****   /*Configure GPIO pins : SPI_CD_Pin SPI_RESET_Pin SPI_NSS1_Pin */
 940 
 268 002e 02F02002 		and	r2, r2, #32
913 
 553:Core/Src/main.c ****   GPIO_InitStruct.Pin = SPI_CD_Pin|SPI_RESET_Pin|SPI_NSS1_Pin;
 941 
 269 0032 0192     		str	r2, [sp, #4]
914 
 294              		.loc 1 553 3 view .LVU55
 942 
 270              		.loc 1 601 3 view .LVU49
915 
 295              		.loc 1 553 23 is_stmt 0 view .LVU56
 943 
 271 0034 019A     		ldr	r2, [sp, #4]
916 
 296 0074 5823     		movs	r3, #88
 944 
 272              	.LBE3:
917 
 297 0076 0493     		str	r3, [sp, #16]
 945 
 602:Core/Src/main.c ****   __HAL_RCC_GPIOA_CLK_ENABLE();
918 
 554:Core/Src/main.c ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 946 
 273              		.loc 1 602 3 view .LVU50
919 
 298              		.loc 1 554 3 is_stmt 1 view .LVU57
 947 
 274              	.LBB4:
920 
 299              		.loc 1 554 24 is_stmt 0 view .LVU58
 948 
 275              		.loc 1 602 3 view .LVU51
921 
 300 0078 0127     		movs	r7, #1
 949 
 276              		.loc 1 602 3 view .LVU52
922 
 301 007a 0597     		str	r7, [sp, #20]
 950 
 277 0036 9A69     		ldr	r2, [r3, #24]
923 
 555:Core/Src/main.c ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
 951 
 278 0038 42F00402 		orr	r2, r2, #4
924 
 302              		.loc 1 555 3 is_stmt 1 view .LVU59
 952 
 279 003c 9A61     		str	r2, [r3, #24]
925 
 303              		.loc 1 555 24 is_stmt 0 view .LVU60
 953 
 280              		.loc 1 602 3 view .LVU53
926 
 304 007c 0694     		str	r4, [sp, #24]
 954 
 281 003e 9A69     		ldr	r2, [r3, #24]
927 
 556:Core/Src/main.c ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 955 
 282 0040 02F00402 		and	r2, r2, #4
928 
 305              		.loc 1 556 3 is_stmt 1 view .LVU61
 956 
 283 0044 0292     		str	r2, [sp, #8]
929 
 306              		.loc 1 556 25 is_stmt 0 view .LVU62
 957 
 284              		.loc 1 602 3 view .LVU54
930 
 307 007e 0226     		movs	r6, #2
 958 
 285 0046 029A     		ldr	r2, [sp, #8]
931 
 308 0080 0796     		str	r6, [sp, #28]
 959 
 286              	.LBE4:
932 
 557:Core/Src/main.c ****   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 960 
 603:Core/Src/main.c ****   __HAL_RCC_GPIOB_CLK_ENABLE();
933 
 309              		.loc 1 557 3 is_stmt 1 view .LVU63
 961 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 17
934 
 310 0082 04A9     		add	r1, sp, #16
 962 
 
935 
 311 0084 4046     		mov	r0, r8
 963 
 
936 
 312 0086 FFF7FEFF 		bl	HAL_GPIO_Init
 964 
 287              		.loc 1 603 3 view .LVU55
937 
 313              	.LVL22:
 965 
 288              	.LBB5:
938 
 558:Core/Src/main.c ****
966 
 289              		.loc 1 603 3 view .LVU56
939 
 559:Core/Src/main.c ****   /*Configure GPIO pin : USB_PULLUP_Pin */
 967 
 290              		.loc 1 603 3 view .LVU57
940 
 560:Core/Src/main.c ****   GPIO_InitStruct.Pin = USB_PULLUP_Pin;
 968 
 291 0048 9A69     		ldr	r2, [r3, #24]
941 
 314              		.loc 1 560 3 view .LVU64
 969 
 292 004a 42F00802 		orr	r2, r2, #8
942 
 315              		.loc 1 560 23 is_stmt 0 view .LVU65
 970 
 293 004e 9A61     		str	r2, [r3, #24]
943 
 316 008a 1023     		movs	r3, #16
 971 
 294              		.loc 1 603 3 view .LVU58
944 
 317 008c 0493     		str	r3, [sp, #16]
 972 
 295 0050 9B69     		ldr	r3, [r3, #24]
945 
 561:Core/Src/main.c ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 973 
 296 0052 03F00803 		and	r3, r3, #8
946 
 318              		.loc 1 561 3 is_stmt 1 view .LVU66
 974 
 297 0056 0393     		str	r3, [sp, #12]
947 
 319              		.loc 1 561 24 is_stmt 0 view .LVU67
 975 
 298              		.loc 1 603 3 view .LVU59
948 
 320 008e 0597     		str	r7, [sp, #20]
 976 
 299 0058 039B     		ldr	r3, [sp, #12]
949 
 562:Core/Src/main.c ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
 977 
 300              	.LBE5:
950 
 321              		.loc 1 562 3 is_stmt 1 view .LVU68
 978 
 604:Core/Src/main.c ****
951 
 322              		.loc 1 562 24 is_stmt 0 view .LVU69
 979 
 605:Core/Src/main.c ****   /*Configure GPIO pin Output Level */
952 
 323 0090 0694     		str	r4, [sp, #24]
 980 
 606:Core/Src/main.c ****   HAL_GPIO_WritePin(GPIOA, SPI_CD_Pin|SPI_RESET_Pin|SPI_NSS1_Pin, GPIO_PIN_RESET);
953 
 563:Core/Src/main.c ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 981 
 301              		.loc 1 606 3 view .LVU60
954 
 324              		.loc 1 563 3 is_stmt 1 view .LVU70
 982 
 302 005a DFF85080 		ldr	r8, .L21+8
955 
 325              		.loc 1 563 25 is_stmt 0 view .LVU71
 983 
 303 005e 2246     		mov	r2, r4
956 
 326 0092 0796     		str	r6, [sp, #28]
 984 
 304 0060 5821     		movs	r1, #88
957 
 564:Core/Src/main.c ****   HAL_GPIO_Init(USB_PULLUP_GPIO_Port, &GPIO_InitStruct);
 985 
 305 0062 4046     		mov	r0, r8
958 
 327              		.loc 1 564 3 is_stmt 1 view .LVU72
 986 
 306 0064 FFF7FEFF 		bl	HAL_GPIO_WritePin
959 
 328 0094 0DEB0301 		add	r1, sp, r3
 987 
 307              	.LVL24:
960 
 329 0098 2846     		mov	r0, r5
 988 
 607:Core/Src/main.c ****
961 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 17
 989 
 608:Core/Src/main.c ****   /*Configure GPIO pin Output Level */
962 
 
 990 
 609:Core/Src/main.c ****   HAL_GPIO_WritePin(USB_PULLUP_GPIO_Port, USB_PULLUP_Pin, GPIO_PIN_RESET);
963 
 
 991 
 308              		.loc 1 609 3 view .LVU61
964 
 330 009a FFF7FEFF 		bl	HAL_GPIO_Init
 992 
 309 0068 0F4D     		ldr	r5, .L21+4
965 
 331              	.LVL23:
 993 
 310 006a 2246     		mov	r2, r4
966 
 565:Core/Src/main.c ****
994 
 311 006c 1021     		movs	r1, #16
967 
 566:Core/Src/main.c **** }
 995 
 312 006e 2846     		mov	r0, r5
968 
 332              		.loc 1 566 1 is_stmt 0 view .LVU73
 996 
 313 0070 FFF7FEFF 		bl	HAL_GPIO_WritePin
969 
 333 009e 08B0     		add	sp, sp, #32
 997 
 314              	.LVL25:
970 
 334              	.LCFI11:
 998 
 610:Core/Src/main.c ****
971 
 335              		.cfi_def_cfa_offset 24
 999 
 611:Core/Src/main.c ****   /*Configure GPIO pins : SPI_CD_Pin SPI_RESET_Pin SPI_NSS1_Pin */
972 
 336              		@ sp needed
 1000 
 612:Core/Src/main.c ****   GPIO_InitStruct.Pin = SPI_CD_Pin|SPI_RESET_Pin|SPI_NSS1_Pin;
973 
 337 00a0 BDE8F081 		pop	{r4, r5, r6, r7, r8, pc}
 1001 
 315              		.loc 1 612 3 view .LVU62
974 
 338              	.L20:
 1002 
 316              		.loc 1 612 23 is_stmt 0 view .LVU63
975 
 339              		.align	2
 1003 
 317 0074 5823     		movs	r3, #88
976 
 340              	.L19:
 1004 
 318 0076 0493     		str	r3, [sp, #16]
977 
 341 00a4 00100240 		.word	1073876992
 1005 
 613:Core/Src/main.c ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
978 
 342 00a8 000C0140 		.word	1073810432
 1006 
 319              		.loc 1 613 3 is_stmt 1 view .LVU64
979 
 343 00ac 00080140 		.word	1073809408
 1007 
 320              		.loc 1 613 24 is_stmt 0 view .LVU65
980 
 344              		.cfi_endproc
 1008 
 321 0078 0127     		movs	r7, #1
981 
 345              	.LFE79:
 1009 
 322 007a 0597     		str	r7, [sp, #20]
982 
 347              		.section	.text.MX_SPI1_Init,"ax",%progbits
 1010 
 614:Core/Src/main.c ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
983 
 348              		.align	1
 1011 
 323              		.loc 1 614 3 is_stmt 1 view .LVU66
984 
 349              		.syntax unified
 1012 
 324              		.loc 1 614 24 is_stmt 0 view .LVU67
985 
 350              		.thumb
 1013 
 325 007c 0694     		str	r4, [sp, #24]
986 
 351              		.thumb_func
 1014 
 615:Core/Src/main.c ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
987 
 352              		.fpu softvfp
 1015 
 326              		.loc 1 615 3 is_stmt 1 view .LVU68
988 
 354              	MX_SPI1_Init:
 1016 
 327              		.loc 1 615 25 is_stmt 0 view .LVU69
989 
 355              	.LFB75:
 1017 
 328 007e 0226     		movs	r6, #2
990 
 365:Core/Src/main.c ****
1018 
 329 0080 0796     		str	r6, [sp, #28]
991 
 356              		.loc 1 365 1 is_stmt 1 view -0
 1019 
 616:Core/Src/main.c ****   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
992 
 357              		.cfi_startproc
 1020 
 330              		.loc 1 616 3 is_stmt 1 view .LVU70
993 
 358              		@ args = 0, pretend = 0, frame = 0
 1021 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 18
994 
 359              		@ frame_needed = 0, uses_anonymous_args = 0
 1022 
 
995 
 360 0000 08B5     		push	{r3, lr}
 1023 
 
996 
 361              	.LCFI12:
 1024 
 331 0082 04A9     		add	r1, sp, #16
997 
 362              		.cfi_def_cfa_offset 8
 1025 
 332 0084 4046     		mov	r0, r8
998 
 363              		.cfi_offset 3, -8
 1026 
 333 0086 FFF7FEFF 		bl	HAL_GPIO_Init
999 
 364              		.cfi_offset 14, -4
 1027 
 334              	.LVL26:
1000 
 375:Core/Src/main.c ****   hspi1.Init.Mode = SPI_MODE_MASTER;
 1028 
 617:Core/Src/main.c ****
1001 
 365              		.loc 1 375 3 view .LVU75
 1029 
 618:Core/Src/main.c ****   /*Configure GPIO pin : USB_PULLUP_Pin */
1002 
 375:Core/Src/main.c ****   hspi1.Init.Mode = SPI_MODE_MASTER;
 1030 
 619:Core/Src/main.c ****   GPIO_InitStruct.Pin = USB_PULLUP_Pin;
1003 
 366              		.loc 1 375 18 is_stmt 0 view .LVU76
 1031 
 335              		.loc 1 619 3 view .LVU71
1004 
 367 0002 0E48     		ldr	r0, .L23
 1032 
 336              		.loc 1 619 23 is_stmt 0 view .LVU72
1005 
 368 0004 0E4B     		ldr	r3, .L23+4
 1033 
 337 008a 1023     		movs	r3, #16
1006 
 369 0006 0360     		str	r3, [r0]
 1034 
 338 008c 0493     		str	r3, [sp, #16]
1007 
 376:Core/Src/main.c ****   hspi1.Init.Direction = SPI_DIRECTION_1LINE;
 1035 
 620:Core/Src/main.c ****   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
1008 
 370              		.loc 1 376 3 is_stmt 1 view .LVU77
 1036 
 339              		.loc 1 620 3 is_stmt 1 view .LVU73
1009 
 376:Core/Src/main.c ****   hspi1.Init.Direction = SPI_DIRECTION_1LINE;
 1037 
 340              		.loc 1 620 24 is_stmt 0 view .LVU74
1010 
 371              		.loc 1 376 19 is_stmt 0 view .LVU78
 1038 
 341 008e 0597     		str	r7, [sp, #20]
1011 
 372 0008 4FF48273 		mov	r3, #260
 1039 
 621:Core/Src/main.c ****   GPIO_InitStruct.Pull = GPIO_NOPULL;
1012 
 373 000c 4360     		str	r3, [r0, #4]
 1040 
 342              		.loc 1 621 3 is_stmt 1 view .LVU75
1013 
 377:Core/Src/main.c ****   hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
 1041 
 343              		.loc 1 621 24 is_stmt 0 view .LVU76
1014 
 374              		.loc 1 377 3 is_stmt 1 view .LVU79
 1042 
 344 0090 0694     		str	r4, [sp, #24]
1015 
 377:Core/Src/main.c ****   hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
 1043 
 622:Core/Src/main.c ****   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
1016 
 375              		.loc 1 377 24 is_stmt 0 view .LVU80
 1044 
 345              		.loc 1 622 3 is_stmt 1 view .LVU77
1017 
 376 000e 4FF40043 		mov	r3, #32768
 1045 
 346              		.loc 1 622 25 is_stmt 0 view .LVU78
1018 
 377 0012 8360     		str	r3, [r0, #8]
 1046 
 347 0092 0796     		str	r6, [sp, #28]
1019 
 378:Core/Src/main.c ****   hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH;
 1047 
 623:Core/Src/main.c ****   HAL_GPIO_Init(USB_PULLUP_GPIO_Port, &GPIO_InitStruct);
1020 
 378              		.loc 1 378 3 is_stmt 1 view .LVU81
 1048 
 348              		.loc 1 623 3 is_stmt 1 view .LVU79
1021 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 18
 1049 
 349 0094 0DEB0301 		add	r1, sp, r3
1022 
 
 1050 
 350 0098 2846     		mov	r0, r5
1023 
 
 1051 
 351 009a FFF7FEFF 		bl	HAL_GPIO_Init
1024 
 378:Core/Src/main.c ****   hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH;
 1052 
 352              	.LVL27:
1025 
 379              		.loc 1 378 23 is_stmt 0 view .LVU82
 1053 
 624:Core/Src/main.c ****
1026 
 380 0014 0023     		movs	r3, #0
 1054 
 625:Core/Src/main.c **** }
1027 
 381 0016 C360     		str	r3, [r0, #12]
 1055 
 353              		.loc 1 625 1 is_stmt 0 view .LVU80
1028 
 379:Core/Src/main.c ****   hspi1.Init.CLKPhase = SPI_PHASE_2EDGE;
 1056 
 354 009e 08B0     		add	sp, sp, #32
1029 
 382              		.loc 1 379 3 is_stmt 1 view .LVU83
 1057 
 355              	.LCFI11:
1030 
 379:Core/Src/main.c ****   hspi1.Init.CLKPhase = SPI_PHASE_2EDGE;
 1058 
 356              		.cfi_def_cfa_offset 24
1031 
 383              		.loc 1 379 26 is_stmt 0 view .LVU84
 1059 
 357              		@ sp needed
1032 
 384 0018 0222     		movs	r2, #2
 1060 
 358 00a0 BDE8F081 		pop	{r4, r5, r6, r7, r8, pc}
1033 
 385 001a 0261     		str	r2, [r0, #16]
 1061 
 359              	.L22:
1034 
 380:Core/Src/main.c ****   hspi1.Init.NSS = SPI_NSS_SOFT;
 1062 
 360              		.align	2
1035 
 386              		.loc 1 380 3 is_stmt 1 view .LVU85
 1063 
 361              	.L21:
1036 
 380:Core/Src/main.c ****   hspi1.Init.NSS = SPI_NSS_SOFT;
 1064 
 362 00a4 00100240 		.word	1073876992
1037 
 387              		.loc 1 380 23 is_stmt 0 view .LVU86
 1065 
 363 00a8 000C0140 		.word	1073810432
1038 
 388 001c 0122     		movs	r2, #1
 1066 
 364 00ac 00080140 		.word	1073809408
1039 
 389 001e 4261     		str	r2, [r0, #20]
 1067 
 365              		.cfi_endproc
1040 
 381:Core/Src/main.c ****   hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8;
 1068 
 366              	.LFE80:
1041 
 390              		.loc 1 381 3 is_stmt 1 view .LVU87
 1069 
 368              		.section	.text.MX_SPI1_Init,"ax",%progbits
1042 
 381:Core/Src/main.c ****   hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8;
 1070 
 369              		.align	1
1043 
 391              		.loc 1 381 18 is_stmt 0 view .LVU88
 1071 
 370              		.syntax unified
1044 
 392 0020 4FF40072 		mov	r2, #512
 1072 
 371              		.thumb
1045 
 393 0024 8261     		str	r2, [r0, #24]
 1073 
 372              		.thumb_func
1046 
 382:Core/Src/main.c ****   hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
 1074 
 373              		.fpu softvfp
1047 
 394              		.loc 1 382 3 is_stmt 1 view .LVU89
 1075 
 375              	MX_SPI1_Init:
1048 
 382:Core/Src/main.c ****   hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
 1076 
 376              	.LFB76:
1049 
 395              		.loc 1 382 32 is_stmt 0 view .LVU90
 1077 
 424:Core/Src/main.c ****
1050 
 396 0026 1022     		movs	r2, #16
 1078 
 377              		.loc 1 424 1 is_stmt 1 view -0
1051 
 397 0028 C261     		str	r2, [r0, #28]
 1079 
 378              		.cfi_startproc
1052 
 383:Core/Src/main.c ****   hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
 1080 
 379              		@ args = 0, pretend = 0, frame = 0
1053 
 398              		.loc 1 383 3 is_stmt 1 view .LVU91
 1081 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 19
1054 
 383:Core/Src/main.c ****   hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
 1082 
 
1055 
 399              		.loc 1 383 23 is_stmt 0 view .LVU92
 1083 
 
1056 
 400 002a 0362     		str	r3, [r0, #32]
 1084 
 380              		@ frame_needed = 0, uses_anonymous_args = 0
1057 
 384:Core/Src/main.c ****   hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
 1085 
 381 0000 08B5     		push	{r3, lr}
1058 
 401              		.loc 1 384 3 is_stmt 1 view .LVU93
 1086 
 382              	.LCFI12:
1059 
 384:Core/Src/main.c ****   hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
 1087 
 383              		.cfi_def_cfa_offset 8
1060 
 402              		.loc 1 384 21 is_stmt 0 view .LVU94
 1088 
 384              		.cfi_offset 3, -8
1061 
 403 002c 4362     		str	r3, [r0, #36]
 1089 
 385              		.cfi_offset 14, -4
1062 
 385:Core/Src/main.c ****   hspi1.Init.CRCPolynomial = 10;
 1090 
 434:Core/Src/main.c ****   hspi1.Init.Mode = SPI_MODE_MASTER;
1063 
 404              		.loc 1 385 3 is_stmt 1 view .LVU95
 1091 
 386              		.loc 1 434 3 view .LVU82
1064 
 385:Core/Src/main.c ****   hspi1.Init.CRCPolynomial = 10;
 1092 
 434:Core/Src/main.c ****   hspi1.Init.Mode = SPI_MODE_MASTER;
1065 
 405              		.loc 1 385 29 is_stmt 0 view .LVU96
 1093 
 387              		.loc 1 434 18 is_stmt 0 view .LVU83
1066 
 406 002e 8362     		str	r3, [r0, #40]
 1094 
 388 0002 0E48     		ldr	r0, .L25
1067 
 386:Core/Src/main.c ****   if (HAL_SPI_Init(&hspi1) != HAL_OK)
 1095 
 389 0004 0E4B     		ldr	r3, .L25+4
1068 
 407              		.loc 1 386 3 is_stmt 1 view .LVU97
 1096 
 390 0006 0360     		str	r3, [r0]
1069 
 386:Core/Src/main.c ****   if (HAL_SPI_Init(&hspi1) != HAL_OK)
 1097 
 435:Core/Src/main.c ****   hspi1.Init.Direction = SPI_DIRECTION_1LINE;
1070 
 408              		.loc 1 386 28 is_stmt 0 view .LVU98
 1098 
 391              		.loc 1 435 3 is_stmt 1 view .LVU84
1071 
 409 0030 0A23     		movs	r3, #10
 1099 
 435:Core/Src/main.c ****   hspi1.Init.Direction = SPI_DIRECTION_1LINE;
1072 
 410 0032 C362     		str	r3, [r0, #44]
 1100 
 392              		.loc 1 435 19 is_stmt 0 view .LVU85
1073 
 387:Core/Src/main.c ****   {
 1101 
 393 0008 4FF48273 		mov	r3, #260
1074 
 411              		.loc 1 387 3 is_stmt 1 view .LVU99
 1102 
 394 000c 4360     		str	r3, [r0, #4]
1075 
 387:Core/Src/main.c ****   {
 1103 
 436:Core/Src/main.c ****   hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
1076 
 412              		.loc 1 387 7 is_stmt 0 view .LVU100
 1104 
 395              		.loc 1 436 3 is_stmt 1 view .LVU86
1077 
 413 0034 FFF7FEFF 		bl	HAL_SPI_Init
 1105 
 436:Core/Src/main.c ****   hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
1078 
 414              	.LVL24:
 1106 
 396              		.loc 1 436 24 is_stmt 0 view .LVU87
1079 
 395:Core/Src/main.c ****
1107 
 397 000e 4FF40043 		mov	r3, #32768
1080 
 415              		.loc 1 395 1 view .LVU101
 1108 
 398 0012 8360     		str	r3, [r0, #8]
1081 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 19
 1109 
 437:Core/Src/main.c ****   hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH;
1082 
 
 1110 
 399              		.loc 1 437 3 is_stmt 1 view .LVU88
1083 
 
 1111 
 437:Core/Src/main.c ****   hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH;
1084 
 416 0038 08BD     		pop	{r3, pc}
 1112 
 400              		.loc 1 437 23 is_stmt 0 view .LVU89
1085 
 417              	.L24:
 1113 
 401 0014 0023     		movs	r3, #0
1086 
 418 003a 00BF     		.align	2
 1114 
 402 0016 C360     		str	r3, [r0, #12]
1087 
 419              	.L23:
 1115 
 438:Core/Src/main.c ****   hspi1.Init.CLKPhase = SPI_PHASE_2EDGE;
1088 
 420 003c 00000000 		.word	hspi1
 1116 
 403              		.loc 1 438 3 is_stmt 1 view .LVU90
1089 
 421 0040 00300140 		.word	1073819648
 1117 
 438:Core/Src/main.c ****   hspi1.Init.CLKPhase = SPI_PHASE_2EDGE;
1090 
 422              		.cfi_endproc
 1118 
 404              		.loc 1 438 26 is_stmt 0 view .LVU91
1091 
 423              	.LFE75:
 1119 
 405 0018 0222     		movs	r2, #2
1092 
 425              		.section	.text.MX_TIM4_Init,"ax",%progbits
 1120 
 406 001a 0261     		str	r2, [r0, #16]
1093 
 426              		.align	1
 1121 
 439:Core/Src/main.c ****   hspi1.Init.NSS = SPI_NSS_SOFT;
1094 
 427              		.syntax unified
 1122 
 407              		.loc 1 439 3 is_stmt 1 view .LVU92
1095 
 428              		.thumb
 1123 
 439:Core/Src/main.c ****   hspi1.Init.NSS = SPI_NSS_SOFT;
1096 
 429              		.thumb_func
 1124 
 408              		.loc 1 439 23 is_stmt 0 view .LVU93
1097 
 430              		.fpu softvfp
 1125 
 409 001c 0122     		movs	r2, #1
1098 
 432              	MX_TIM4_Init:
 1126 
 410 001e 4261     		str	r2, [r0, #20]
1099 
 433              	.LFB77:
 1127 
 440:Core/Src/main.c ****   hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8;
1100 
 455:Core/Src/main.c ****
1128 
 411              		.loc 1 440 3 is_stmt 1 view .LVU94
1101 
 434              		.loc 1 455 1 is_stmt 1 view -0
 1129 
 440:Core/Src/main.c ****   hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8;
1102 
 435              		.cfi_startproc
 1130 
 412              		.loc 1 440 18 is_stmt 0 view .LVU95
1103 
 436              		@ args = 0, pretend = 0, frame = 48
 1131 
 413 0020 4FF40072 		mov	r2, #512
1104 
 437              		@ frame_needed = 0, uses_anonymous_args = 0
 1132 
 414 0024 8261     		str	r2, [r0, #24]
1105 
 438 0000 30B5     		push	{r4, r5, lr}
 1133 
 441:Core/Src/main.c ****   hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
1106 
 439              	.LCFI13:
 1134 
 415              		.loc 1 441 3 is_stmt 1 view .LVU96
1107 
 440              		.cfi_def_cfa_offset 12
 1135 
 441:Core/Src/main.c ****   hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
1108 
 441              		.cfi_offset 4, -12
 1136 
 416              		.loc 1 441 32 is_stmt 0 view .LVU97
1109 
 442              		.cfi_offset 5, -8
 1137 
 417 0026 1022     		movs	r2, #16
1110 
 443              		.cfi_offset 14, -4
 1138 
 418 0028 C261     		str	r2, [r0, #28]
1111 
 444 0002 8DB0     		sub	sp, sp, #52
 1139 
 442:Core/Src/main.c ****   hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
1112 
 445              	.LCFI14:
 1140 
 419              		.loc 1 442 3 is_stmt 1 view .LVU98
1113 
 446              		.cfi_def_cfa_offset 64
 1141 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 20
1114 
 461:Core/Src/main.c ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
 1142 
 
1115 
 447              		.loc 1 461 3 view .LVU103
 1143 
 
1116 
 461:Core/Src/main.c ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
 1144 
 442:Core/Src/main.c ****   hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
1117 
 448              		.loc 1 461 27 is_stmt 0 view .LVU104
 1145 
 420              		.loc 1 442 23 is_stmt 0 view .LVU99
1118 
 449 0004 0024     		movs	r4, #0
 1146 
 421 002a 0362     		str	r3, [r0, #32]
1119 
 450 0006 0494     		str	r4, [sp, #16]
 1147 
 443:Core/Src/main.c ****   hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
1120 
 451 0008 0694     		str	r4, [sp, #24]
 1148 
 422              		.loc 1 443 3 is_stmt 1 view .LVU100
1121 
 452 000a 0894     		str	r4, [sp, #32]
 1149 
 443:Core/Src/main.c ****   hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
1122 
 453 000c 0A94     		str	r4, [sp, #40]
 1150 
 423              		.loc 1 443 21 is_stmt 0 view .LVU101
- 
 
 1151 
 424 002c 4362     		str	r3, [r0, #36]
- 
 
 1152 
 444:Core/Src/main.c ****   hspi1.Init.CRCPolynomial = 10;
- 
 
 1153 
 425              		.loc 1 444 3 is_stmt 1 view .LVU102
- 
 
 1154 
 444:Core/Src/main.c ****   hspi1.Init.CRCPolynomial = 10;
- 
 
 1155 
 426              		.loc 1 444 29 is_stmt 0 view .LVU103
- 
 
 1156 
 427 002e 8362     		str	r3, [r0, #40]
- 
 
 1157 
 445:Core/Src/main.c ****   if (HAL_SPI_Init(&hspi1) != HAL_OK)
- 
 
 1158 
 428              		.loc 1 445 3 is_stmt 1 view .LVU104
- 
 
 1159 
 445:Core/Src/main.c ****   if (HAL_SPI_Init(&hspi1) != HAL_OK)
- 
 
 1160 
 429              		.loc 1 445 28 is_stmt 0 view .LVU105
- 
 
 1161 
 430 0030 0A23     		movs	r3, #10
- 
 
 1162 
 431 0032 C362     		str	r3, [r0, #44]
- 
 
 1163 
 446:Core/Src/main.c ****   {
- 
 
 1164 
 432              		.loc 1 446 3 is_stmt 1 view .LVU106
- 
 
 1165 
 446:Core/Src/main.c ****   {
- 
 
 1166 
 433              		.loc 1 446 7 is_stmt 0 view .LVU107
- 
 
 1167 
 434 0034 FFF7FEFF 		bl	HAL_SPI_Init
- 
 
 1168 
 435              	.LVL28:
- 
 
 1169 
 454:Core/Src/main.c ****
- 
 
 1170 
 436              		.loc 1 454 1 view .LVU108
- 
 
 1171 
 437 0038 08BD     		pop	{r3, pc}
- 
 
 1172 
 438              	.L26:
- 
 
 1173 
 439 003a 00BF     		.align	2
- 
 
 1174 
 440              	.L25:
- 
 
 1175 
 441 003c 00000000 		.word	hspi1
- 
 
 1176 
 442 0040 00300140 		.word	1073819648
- 
 
 1177 
 443              		.cfi_endproc
- 
 
 1178 
 444              	.LFE76:
- 
 
 1179 
 446              		.section	.text.MX_TIM4_Init,"ax",%progbits
- 
 
 1180 
 447              		.align	1
- 
 
 1181 
 448              		.syntax unified
- 
 
 1182 
 449              		.thumb
- 
 
 1183 
 450              		.thumb_func
- 
 
 1184 
 451              		.fpu softvfp
- 
 
 1185 
 453              	MX_TIM4_Init:
- 
 
 1186 
 454              	.LFB78:
- 
 
 1187 
 514:Core/Src/main.c ****
- 
 
 1188 
 455              		.loc 1 514 1 is_stmt 1 view -0
- 
 
 1189 
 456              		.cfi_startproc
- 
 
 1190 
 457              		@ args = 0, pretend = 0, frame = 48
- 
 
 1191 
 458              		@ frame_needed = 0, uses_anonymous_args = 0
- 
 
 1192 
 459 0000 30B5     		push	{r4, r5, lr}
- 
 
 1193 
 460              	.LCFI13:
- 
 
 1194 
 461              		.cfi_def_cfa_offset 12
- 
 
 1195 
 462              		.cfi_offset 4, -12
- 
 
 1196 
 463              		.cfi_offset 5, -8
- 
 
 1197 
 464              		.cfi_offset 14, -4
- 
 
 1198 
 465 0002 8DB0     		sub	sp, sp, #52
- 
 
 1199 
 466              	.LCFI14:
- 
 
 1200 
 467              		.cfi_def_cfa_offset 64
- 
 
 1201 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 21
- 
 
 1202 
 
- 
 
 1203 
 
- 
 
 1204 
 520:Core/Src/main.c ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
- 
 
 1205 
 468              		.loc 1 520 3 view .LVU110
- 
 
 1206 
 520:Core/Src/main.c ****   TIM_MasterConfigTypeDef sMasterConfig = {0};
- 
 
 1207 
 469              		.loc 1 520 27 is_stmt 0 view .LVU111
- 
 
 1208 
 470 0004 0024     		movs	r4, #0
- 
 
 1209 
 471 0006 0494     		str	r4, [sp, #16]
- 
 
 1210 
 472 0008 0694     		str	r4, [sp, #24]
- 
 
 1211 
 473 000a 0894     		str	r4, [sp, #32]
- 
 
 1212 
 474 000c 0A94     		str	r4, [sp, #40]
- 
 
 1213 
 521:Core/Src/main.c ****
- 
 
 1214 
 475              		.loc 1 521 3 is_stmt 1 view .LVU112
- 
 
 1215 
 521:Core/Src/main.c ****
- 
 
 1216 
 476              		.loc 1 521 27 is_stmt 0 view .LVU113
- 
 
 1217 
 477 000e 0194     		str	r4, [sp, #4]
- 
 
 1218 
 478 0010 0294     		str	r4, [sp, #8]
- 
 
 1219 
 526:Core/Src/main.c ****   htim4.Init.Prescaler = 0;
- 
 
 1220 
 479              		.loc 1 526 3 is_stmt 1 view .LVU114
- 
 
 1221 
 526:Core/Src/main.c ****   htim4.Init.Prescaler = 0;
- 
 
 1222 
 480              		.loc 1 526 18 is_stmt 0 view .LVU115
- 
 
 1223 
 481 0012 0F4D     		ldr	r5, .L29
- 
 
 1224 
 482 0014 0F4B     		ldr	r3, .L29+4
- 
 
 1225 
 483 0016 2B60     		str	r3, [r5]
- 
 
 1226 
 527:Core/Src/main.c ****   htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
- 
 
 1227 
 484              		.loc 1 527 3 is_stmt 1 view .LVU116
- 
 
 1228 
 527:Core/Src/main.c ****   htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
- 
 
 1229 
 485              		.loc 1 527 24 is_stmt 0 view .LVU117
- 
 
 1230 
 486 0018 6C60     		str	r4, [r5, #4]
- 
 
 1231 
 528:Core/Src/main.c ****   htim4.Init.Period = 65535;
- 
 
 1232 
 487              		.loc 1 528 3 is_stmt 1 view .LVU118
- 
 
 1233 
 528:Core/Src/main.c ****   htim4.Init.Period = 65535;
- 
 
 1234 
 488              		.loc 1 528 26 is_stmt 0 view .LVU119
- 
 
 1235 
 489 001a AC60     		str	r4, [r5, #8]
- 
 
 1236 
 529:Core/Src/main.c ****   htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 
 
 1237 
 490              		.loc 1 529 3 is_stmt 1 view .LVU120
- 
 
 1238 
 529:Core/Src/main.c ****   htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 
 
 1239 
 491              		.loc 1 529 21 is_stmt 0 view .LVU121
- 
 
 1240 
 492 001c 4FF6FF73 		movw	r3, #65535
- 
 
 1241 
 493 0020 EB60     		str	r3, [r5, #12]
- 
 
 1242 
 530:Core/Src/main.c ****   htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- 
 
 1243 
 494              		.loc 1 530 3 is_stmt 1 view .LVU122
- 
 
 1244 
 530:Core/Src/main.c ****   htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- 
 
 1245 
 495              		.loc 1 530 28 is_stmt 0 view .LVU123
- 
 
 1246 
 496 0022 2C61     		str	r4, [r5, #16]
- 
 
 1247 
 531:Core/Src/main.c ****   sConfig.EncoderMode = TIM_ENCODERMODE_TI12;
- 
 
 1248 
 497              		.loc 1 531 3 is_stmt 1 view .LVU124
- 
 
 1249 
 531:Core/Src/main.c ****   sConfig.EncoderMode = TIM_ENCODERMODE_TI12;
- 
 
 1250 
 498              		.loc 1 531 32 is_stmt 0 view .LVU125
- 
 
 1251 
 499 0024 AC61     		str	r4, [r5, #24]
- 
 
 1252 
 532:Core/Src/main.c ****   sConfig.IC1Polarity = TIM_ICPOLARITY_RISING;
- 
 
 1253 
 500              		.loc 1 532 3 is_stmt 1 view .LVU126
- 
 
 1254 
 532:Core/Src/main.c ****   sConfig.IC1Polarity = TIM_ICPOLARITY_RISING;
- 
 
 1255 
 501              		.loc 1 532 23 is_stmt 0 view .LVU127
- 
 
 1256 
 502 0026 0323     		movs	r3, #3
- 
 
 1257 
 503 0028 0393     		str	r3, [sp, #12]
- 
 
 1258 
 533:Core/Src/main.c ****   sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI;
- 
 
 1259 
 504              		.loc 1 533 3 is_stmt 1 view .LVU128
- 
 
 1260 
 534:Core/Src/main.c ****   sConfig.IC1Prescaler = TIM_ICPSC_DIV1;
- 
 
 1261 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 22
- 
 
 1262 
 
- 
 
 1263 
 
- 
 
 1264 
 505              		.loc 1 534 3 view .LVU129
- 
 
 1265 
 534:Core/Src/main.c ****   sConfig.IC1Prescaler = TIM_ICPSC_DIV1;
- 
 
 1266 
 506              		.loc 1 534 24 is_stmt 0 view .LVU130
- 
 
 1267 
 507 002a 0122     		movs	r2, #1
- 
 
 1268 
 508 002c 0592     		str	r2, [sp, #20]
- 
 
 1269 
 535:Core/Src/main.c ****   sConfig.IC1Filter = 8;
- 
 
 1270 
 509              		.loc 1 535 3 is_stmt 1 view .LVU131
- 
 
 1271 
 536:Core/Src/main.c ****   sConfig.IC2Polarity = TIM_ICPOLARITY_RISING;
- 
 
 1272 
 510              		.loc 1 536 3 view .LVU132
- 
 
 1273 
 536:Core/Src/main.c ****   sConfig.IC2Polarity = TIM_ICPOLARITY_RISING;
- 
 
 1274 
 511              		.loc 1 536 21 is_stmt 0 view .LVU133
- 
 
 1275 
 512 002e 0823     		movs	r3, #8
- 
 
 1276 
 513 0030 0793     		str	r3, [sp, #28]
- 
 
 1277 
 537:Core/Src/main.c ****   sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI;
- 
 
 1278 
 514              		.loc 1 537 3 is_stmt 1 view .LVU134
- 
 
 1279 
 538:Core/Src/main.c ****   sConfig.IC2Prescaler = TIM_ICPSC_DIV1;
- 
 
 1280 
 515              		.loc 1 538 3 view .LVU135
- 
 
 1281 
 538:Core/Src/main.c ****   sConfig.IC2Prescaler = TIM_ICPSC_DIV1;
- 
 
 1282 
 516              		.loc 1 538 24 is_stmt 0 view .LVU136
- 
 
 1283 
 517 0032 0992     		str	r2, [sp, #36]
- 
 
 1284 
 539:Core/Src/main.c ****   sConfig.IC2Filter = 8;
- 
 
 1285 
 518              		.loc 1 539 3 is_stmt 1 view .LVU137
- 
 
 1286 
 540:Core/Src/main.c ****   if (HAL_TIM_Encoder_Init(&htim4, &sConfig) != HAL_OK)
- 
 
 1287 
 519              		.loc 1 540 3 view .LVU138
- 
 
 1288 
 540:Core/Src/main.c ****   if (HAL_TIM_Encoder_Init(&htim4, &sConfig) != HAL_OK)
- 
 
 1289 
 520              		.loc 1 540 21 is_stmt 0 view .LVU139
- 
 
 1290 
 521 0034 0B93     		str	r3, [sp, #44]
- 
 
 1291 
 541:Core/Src/main.c ****   {
- 
 
 1292 
 522              		.loc 1 541 3 is_stmt 1 view .LVU140
- 
 
 1293 
 541:Core/Src/main.c ****   {
- 
 
 1294 
 523              		.loc 1 541 7 is_stmt 0 view .LVU141
- 
 
 1295 
 524 0036 03A9     		add	r1, sp, #12
- 
 
 1296 
 525 0038 2846     		mov	r0, r5
- 
 
 1297 
 526 003a FFF7FEFF 		bl	HAL_TIM_Encoder_Init
- 
 
 1298 
 527              	.LVL29:
- 
 
 1299 
 545:Core/Src/main.c ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- 
 
 1300 
 528              		.loc 1 545 3 is_stmt 1 view .LVU142
- 
 
 1301 
 545:Core/Src/main.c ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- 
 
 1302 
 529              		.loc 1 545 37 is_stmt 0 view .LVU143
- 
 
 1303 
 530 003e 0194     		str	r4, [sp, #4]
- 
 
 1304 
 546:Core/Src/main.c ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
- 
 
 1305 
 531              		.loc 1 546 3 is_stmt 1 view .LVU144
- 
 
 1306 
 546:Core/Src/main.c ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
- 
 
 1307 
 532              		.loc 1 546 33 is_stmt 0 view .LVU145
- 
 
 1308 
 533 0040 0294     		str	r4, [sp, #8]
- 
 
 1309 
 547:Core/Src/main.c ****   {
- 
 
 1310 
 534              		.loc 1 547 3 is_stmt 1 view .LVU146
- 
 
 1311 
 547:Core/Src/main.c ****   {
- 
 
 1312 
 535              		.loc 1 547 7 is_stmt 0 view .LVU147
- 
 
 1313 
 536 0042 01A9     		add	r1, sp, #4
- 
 
 1314 
 537 0044 2846     		mov	r0, r5
- 
 
 1315 
 538 0046 FFF7FEFF 		bl	HAL_TIMEx_MasterConfigSynchronization
- 
 
 1316 
 539              	.LVL30:
- 
 
 1317 
 555:Core/Src/main.c ****
- 
 
 1318 
 540              		.loc 1 555 1 view .LVU148
- 
 
 1319 
 541 004a 0DB0     		add	sp, sp, #52
- 
 
 1320 
 542              	.LCFI15:
- 
 
 1321 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 23
- 
 
 1322 
 
- 
 
 1323 
 
- 
 
 1324 
 543              		.cfi_def_cfa_offset 12
- 
 
 1325 
 544              		@ sp needed
- 
 
 1326 
 545 004c 30BD     		pop	{r4, r5, pc}
- 
 
 1327 
 546              	.L30:
- 
 
 1328 
 547 004e 00BF     		.align	2
- 
 
 1329 
 548              	.L29:
- 
 
 1330 
 549 0050 00000000 		.word	htim4
- 
 
 1331 
 550 0054 00080040 		.word	1073743872
- 
 
 1332 
 551              		.cfi_endproc
- 
 
 1333 
 552              	.LFE78:
- 
 
 1334 
 554              		.section	.text.MX_USART1_UART_Init,"ax",%progbits
- 
 
 1335 
 555              		.align	1
- 
 
 1336 
 556              		.syntax unified
- 
 
 1337 
 557              		.thumb
- 
 
 1338 
 558              		.thumb_func
- 
 
 1339 
 559              		.fpu softvfp
- 
 
 1340 
 561              	MX_USART1_UART_Init:
- 
 
 1341 
 562              	.LFB79:
- 
 
 1342 
 563:Core/Src/main.c ****
- 
 
 1343 
 563              		.loc 1 563 1 is_stmt 1 view -0
- 
 
 1344 
 564              		.cfi_startproc
- 
 
 1345 
 565              		@ args = 0, pretend = 0, frame = 0
- 
 
 1346 
 566              		@ frame_needed = 0, uses_anonymous_args = 0
- 
 
 1347 
 567 0000 08B5     		push	{r3, lr}
- 
 
 1348 
 568              	.LCFI16:
- 
 
 1349 
 569              		.cfi_def_cfa_offset 8
- 
 
 1350 
 570              		.cfi_offset 3, -8
- 
 
 1351 
 571              		.cfi_offset 14, -4
- 
 
 1352 
 572:Core/Src/main.c ****   huart1.Init.BaudRate = 115200;
- 
 
 1353 
 572              		.loc 1 572 3 view .LVU150
- 
 
 1354 
 572:Core/Src/main.c ****   huart1.Init.BaudRate = 115200;
- 
 
 1355 
 573              		.loc 1 572 19 is_stmt 0 view .LVU151
- 
 
 1356 
 574 0002 0848     		ldr	r0, .L33
- 
 
 1357 
 575 0004 084B     		ldr	r3, .L33+4
- 
 
 1358 
 576 0006 0360     		str	r3, [r0]
- 
 
 1359 
 573:Core/Src/main.c ****   huart1.Init.WordLength = UART_WORDLENGTH_8B;
- 
 
 1360 
 577              		.loc 1 573 3 is_stmt 1 view .LVU152
- 
 
 1361 
 573:Core/Src/main.c ****   huart1.Init.WordLength = UART_WORDLENGTH_8B;
- 
 
 1362 
 578              		.loc 1 573 24 is_stmt 0 view .LVU153
- 
 
 1363 
 579 0008 4FF4E133 		mov	r3, #115200
- 
 
 1364 
 580 000c 4360     		str	r3, [r0, #4]
- 
 
 1365 
 574:Core/Src/main.c ****   huart1.Init.StopBits = UART_STOPBITS_1;
- 
 
 1366 
 581              		.loc 1 574 3 is_stmt 1 view .LVU154
- 
 
 1367 
 574:Core/Src/main.c ****   huart1.Init.StopBits = UART_STOPBITS_1;
- 
 
 1368 
 582              		.loc 1 574 26 is_stmt 0 view .LVU155
- 
 
 1369 
 583 000e 0023     		movs	r3, #0
- 
 
 1370 
 584 0010 8360     		str	r3, [r0, #8]
- 
 
 1371 
 575:Core/Src/main.c ****   huart1.Init.Parity = UART_PARITY_NONE;
- 
 
 1372 
 585              		.loc 1 575 3 is_stmt 1 view .LVU156
- 
 
 1373 
 575:Core/Src/main.c ****   huart1.Init.Parity = UART_PARITY_NONE;
- 
 
 1374 
 586              		.loc 1 575 24 is_stmt 0 view .LVU157
- 
 
 1375 
 587 0012 C360     		str	r3, [r0, #12]
- 
 
 1376 
 576:Core/Src/main.c ****   huart1.Init.Mode = UART_MODE_TX_RX;
- 
 
 1377 
 588              		.loc 1 576 3 is_stmt 1 view .LVU158
- 
 
 1378 
 576:Core/Src/main.c ****   huart1.Init.Mode = UART_MODE_TX_RX;
- 
 
 1379 
 589              		.loc 1 576 22 is_stmt 0 view .LVU159
- 
 
 1380 
 590 0014 0361     		str	r3, [r0, #16]
- 
 
 1381 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 24
- 
 
 1382 
 
- 
 
 1383 
 
- 
 
 1384 
 577:Core/Src/main.c ****   huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
- 
 
 1385 
 591              		.loc 1 577 3 is_stmt 1 view .LVU160
- 
 
 1386 
 577:Core/Src/main.c ****   huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
- 
 
 1387 
 592              		.loc 1 577 20 is_stmt 0 view .LVU161
- 
 
 1388 
 593 0016 0C22     		movs	r2, #12
- 
 
 1389 
 594 0018 4261     		str	r2, [r0, #20]
- 
 
 1390 
 578:Core/Src/main.c ****   huart1.Init.OverSampling = UART_OVERSAMPLING_16;
- 
 
 1391 
 595              		.loc 1 578 3 is_stmt 1 view .LVU162
- 
 
 1392 
 578:Core/Src/main.c ****   huart1.Init.OverSampling = UART_OVERSAMPLING_16;
- 
 
 1393 
 596              		.loc 1 578 25 is_stmt 0 view .LVU163
- 
 
 1394 
 597 001a 8361     		str	r3, [r0, #24]
- 
 
 1395 
 579:Core/Src/main.c ****   if (HAL_UART_Init(&huart1) != HAL_OK)
- 
 
 1396 
 598              		.loc 1 579 3 is_stmt 1 view .LVU164
- 
 
 1397 
 579:Core/Src/main.c ****   if (HAL_UART_Init(&huart1) != HAL_OK)
- 
 
 1398 
 599              		.loc 1 579 28 is_stmt 0 view .LVU165
- 
 
 1399 
 600 001c C361     		str	r3, [r0, #28]
- 
 
 1400 
 580:Core/Src/main.c ****   {
- 
 
 1401 
 601              		.loc 1 580 3 is_stmt 1 view .LVU166
- 
 
 1402 
 580:Core/Src/main.c ****   {
- 
 
 1403 
 602              		.loc 1 580 7 is_stmt 0 view .LVU167
- 
 
 1404 
 603 001e FFF7FEFF 		bl	HAL_UART_Init
- 
 
 1405 
 604              	.LVL31:
- 
 
 1406 
 588:Core/Src/main.c ****
- 
 
 1407 
 605              		.loc 1 588 1 view .LVU168
- 
 
 1408 
 606 0022 08BD     		pop	{r3, pc}
- 
 
 1409 
 607              	.L34:
- 
 
 1410 
 608              		.align	2
- 
 
 1411 
 609              	.L33:
- 
 
 1412 
 610 0024 00000000 		.word	huart1
- 
 
 1413 
 611 0028 00380140 		.word	1073821696
- 
 
 1414 
 612              		.cfi_endproc
- 
 
 1415 
 613              	.LFE79:
- 
 
 1416 
 615              		.section	.text.MX_TIM3_Init,"ax",%progbits
- 
 
 1417 
 616              		.align	1
- 
 
 1418 
 617              		.syntax unified
- 
 
 1419 
 618              		.thumb
- 
 
 1420 
 619              		.thumb_func
- 
 
 1421 
 620              		.fpu softvfp
- 
 
 1422 
 622              	MX_TIM3_Init:
- 
 
 1423 
 623              	.LFB77:
1123 
 462:Core/Src/main.c ****
1424 
 462:Core/Src/main.c ****
1124 
 454              		.loc 1 462 3 is_stmt 1 view .LVU105
 1425 
 624              		.loc 1 462 1 is_stmt 1 view -0
1125 
 462:Core/Src/main.c ****
1426 
 625              		.cfi_startproc
1126 
 455              		.loc 1 462 27 is_stmt 0 view .LVU106
 1427 
 626              		@ args = 0, pretend = 0, frame = 40
1127 
 456 000e 0194     		str	r4, [sp, #4]
 1428 
 627              		@ frame_needed = 0, uses_anonymous_args = 0
1128 
 457 0010 0294     		str	r4, [sp, #8]
 1429 
 628 0000 30B5     		push	{r4, r5, lr}
1129 
 467:Core/Src/main.c ****   htim4.Init.Prescaler = 0;
 1430 
 629              	.LCFI17:
1130 
 458              		.loc 1 467 3 is_stmt 1 view .LVU107
 1431 
 630              		.cfi_def_cfa_offset 12
1131 
 467:Core/Src/main.c ****   htim4.Init.Prescaler = 0;
 1432 
 631              		.cfi_offset 4, -12
1132 
 459              		.loc 1 467 18 is_stmt 0 view .LVU108
 1433 
 632              		.cfi_offset 5, -8
1133 
 460 0012 0F4D     		ldr	r5, .L27
 1434 
 633              		.cfi_offset 14, -4
1134 
 461 0014 0F4B     		ldr	r3, .L27+4
 1435 
 634 0002 8BB0     		sub	sp, sp, #44
1135 
 462 0016 2B60     		str	r3, [r5]
 1436 
 635              	.LCFI18:
1136 
 468:Core/Src/main.c ****   htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
 1437 
 636              		.cfi_def_cfa_offset 56
1137 
 463              		.loc 1 468 3 is_stmt 1 view .LVU109
 1438 
 468:Core/Src/main.c ****   TIM_OC_InitTypeDef sConfigOC = {0};
1138 
 468:Core/Src/main.c ****   htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
 1439 
 637              		.loc 1 468 3 view .LVU170
1139 
 464              		.loc 1 468 24 is_stmt 0 view .LVU110
 1440 
 468:Core/Src/main.c ****   TIM_OC_InitTypeDef sConfigOC = {0};
1140 
 465 0018 6C60     		str	r4, [r5, #4]
 1441 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 25
1141 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 20
 1442 
 
1142 
 
 1443 
 
1143 
 
 1444 
 638              		.loc 1 468 27 is_stmt 0 view .LVU171
1144 
 469:Core/Src/main.c ****   htim4.Init.Period = 65535;
 1445 
 639 0004 0024     		movs	r4, #0
1145 
 466              		.loc 1 469 3 is_stmt 1 view .LVU111
 1446 
 640 0006 0894     		str	r4, [sp, #32]
1146 
 469:Core/Src/main.c ****   htim4.Init.Period = 65535;
 1447 
 641 0008 0994     		str	r4, [sp, #36]
1147 
 467              		.loc 1 469 26 is_stmt 0 view .LVU112
 1448 
 469:Core/Src/main.c ****
1148 
 468 001a AC60     		str	r4, [r5, #8]
 1449 
 642              		.loc 1 469 3 is_stmt 1 view .LVU172
1149 
 470:Core/Src/main.c ****   htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
 1450 
 469:Core/Src/main.c ****
1150 
 469              		.loc 1 470 3 is_stmt 1 view .LVU113
 1451 
 643              		.loc 1 469 22 is_stmt 0 view .LVU173
1151 
 470:Core/Src/main.c ****   htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
 1452 
 644 000a 0194     		str	r4, [sp, #4]
1152 
 470              		.loc 1 470 21 is_stmt 0 view .LVU114
 1453 
 645 000c 0294     		str	r4, [sp, #8]
1153 
 471 001c 4FF6FF73 		movw	r3, #65535
 1454 
 646 000e 0394     		str	r4, [sp, #12]
1154 
 472 0020 EB60     		str	r3, [r5, #12]
 1455 
 647 0010 0494     		str	r4, [sp, #16]
1155 
 471:Core/Src/main.c ****   htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 1456 
 648 0012 0594     		str	r4, [sp, #20]
1156 
 473              		.loc 1 471 3 is_stmt 1 view .LVU115
 1457 
 649 0014 0694     		str	r4, [sp, #24]
1157 
 471:Core/Src/main.c ****   htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 1458 
 650 0016 0794     		str	r4, [sp, #28]
1158 
 474              		.loc 1 471 28 is_stmt 0 view .LVU116
 1459 
 474:Core/Src/main.c ****   htim3.Init.Prescaler = 719;
1159 
 475 0022 2C61     		str	r4, [r5, #16]
 1460 
 651              		.loc 1 474 3 is_stmt 1 view .LVU174
1160 
 472:Core/Src/main.c ****   sConfig.EncoderMode = TIM_ENCODERMODE_TI12;
 1461 
 474:Core/Src/main.c ****   htim3.Init.Prescaler = 719;
1161 
 476              		.loc 1 472 3 is_stmt 1 view .LVU117
 1462 
 652              		.loc 1 474 18 is_stmt 0 view .LVU175
1162 
 472:Core/Src/main.c ****   sConfig.EncoderMode = TIM_ENCODERMODE_TI12;
 1463 
 653 0018 134D     		ldr	r5, .L37
1163 
 477              		.loc 1 472 32 is_stmt 0 view .LVU118
 1464 
 654 001a 144B     		ldr	r3, .L37+4
1164 
 478 0024 AC61     		str	r4, [r5, #24]
 1465 
 655 001c 2B60     		str	r3, [r5]
1165 
 473:Core/Src/main.c ****   sConfig.IC1Polarity = TIM_ICPOLARITY_RISING;
 1466 
 475:Core/Src/main.c ****   htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
1166 
 479              		.loc 1 473 3 is_stmt 1 view .LVU119
 1467 
 656              		.loc 1 475 3 is_stmt 1 view .LVU176
1167 
 473:Core/Src/main.c ****   sConfig.IC1Polarity = TIM_ICPOLARITY_RISING;
 1468 
 475:Core/Src/main.c ****   htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
1168 
 480              		.loc 1 473 23 is_stmt 0 view .LVU120
 1469 
 657              		.loc 1 475 24 is_stmt 0 view .LVU177
1169 
 481 0026 0323     		movs	r3, #3
 1470 
 658 001e 40F2CF23 		movw	r3, #719
1170 
 482 0028 0393     		str	r3, [sp, #12]
 1471 
 659 0022 6B60     		str	r3, [r5, #4]
1171 
 474:Core/Src/main.c ****   sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI;
 1472 
 476:Core/Src/main.c ****   htim3.Init.Period = 10000;
1172 
 483              		.loc 1 474 3 is_stmt 1 view .LVU121
 1473 
 660              		.loc 1 476 3 is_stmt 1 view .LVU178
1173 
 475:Core/Src/main.c ****   sConfig.IC1Prescaler = TIM_ICPSC_DIV1;
 1474 
 476:Core/Src/main.c ****   htim3.Init.Period = 10000;
1174 
 484              		.loc 1 475 3 view .LVU122
 1475 
 661              		.loc 1 476 26 is_stmt 0 view .LVU179
1175 
 475:Core/Src/main.c ****   sConfig.IC1Prescaler = TIM_ICPSC_DIV1;
 1476 
 662 0024 AC60     		str	r4, [r5, #8]
1176 
 485              		.loc 1 475 24 is_stmt 0 view .LVU123
 1477 
 477:Core/Src/main.c ****   htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
1177 
 486 002a 0122     		movs	r2, #1
 1478 
 663              		.loc 1 477 3 is_stmt 1 view .LVU180
1178 
 487 002c 0592     		str	r2, [sp, #20]
 1479 
 477:Core/Src/main.c ****   htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
1179 
 476:Core/Src/main.c ****   sConfig.IC1Filter = 8;
 1480 
 664              		.loc 1 477 21 is_stmt 0 view .LVU181
1180 
 488              		.loc 1 476 3 is_stmt 1 view .LVU124
 1481 
 665 0026 42F21073 		movw	r3, #10000
1181 
 477:Core/Src/main.c ****   sConfig.IC2Polarity = TIM_ICPOLARITY_RISING;
 1482 
 666 002a EB60     		str	r3, [r5, #12]
1182 
 489              		.loc 1 477 3 view .LVU125
 1483 
 478:Core/Src/main.c ****   htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
1183 
 477:Core/Src/main.c ****   sConfig.IC2Polarity = TIM_ICPOLARITY_RISING;
 1484 
 667              		.loc 1 478 3 is_stmt 1 view .LVU182
1184 
 490              		.loc 1 477 21 is_stmt 0 view .LVU126
 1485 
 478:Core/Src/main.c ****   htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
1185 
 491 002e 0823     		movs	r3, #8
 1486 
 668              		.loc 1 478 28 is_stmt 0 view .LVU183
1186 
 492 0030 0793     		str	r3, [sp, #28]
 1487 
 669 002c 2C61     		str	r4, [r5, #16]
1187 
 478:Core/Src/main.c ****   sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI;
 1488 
 479:Core/Src/main.c ****   if (HAL_TIM_OC_Init(&htim3) != HAL_OK)
1188 
 493              		.loc 1 478 3 is_stmt 1 view .LVU127
 1489 
 670              		.loc 1 479 3 is_stmt 1 view .LVU184
1189 
 479:Core/Src/main.c ****   sConfig.IC2Prescaler = TIM_ICPSC_DIV1;
 1490 
 479:Core/Src/main.c ****   if (HAL_TIM_OC_Init(&htim3) != HAL_OK)
1190 
 494              		.loc 1 479 3 view .LVU128
 1491 
 671              		.loc 1 479 32 is_stmt 0 view .LVU185
1191 
 479:Core/Src/main.c ****   sConfig.IC2Prescaler = TIM_ICPSC_DIV1;
 1492 
 672 002e AC61     		str	r4, [r5, #24]
1192 
 495              		.loc 1 479 24 is_stmt 0 view .LVU129
 1493 
 480:Core/Src/main.c ****   {
1193 
 496 0032 0992     		str	r2, [sp, #36]
 1494 
 673              		.loc 1 480 3 is_stmt 1 view .LVU186
1194 
 480:Core/Src/main.c ****   sConfig.IC2Filter = 8;
 1495 
 480:Core/Src/main.c ****   {
1195 
 497              		.loc 1 480 3 is_stmt 1 view .LVU130
 1496 
 674              		.loc 1 480 7 is_stmt 0 view .LVU187
1196 
 481:Core/Src/main.c ****   if (HAL_TIM_Encoder_Init(&htim4, &sConfig) != HAL_OK)
 1497 
 675 0030 2846     		mov	r0, r5
1197 
 498              		.loc 1 481 3 view .LVU131
 1498 
 676 0032 FFF7FEFF 		bl	HAL_TIM_OC_Init
1198 
 481:Core/Src/main.c ****   if (HAL_TIM_Encoder_Init(&htim4, &sConfig) != HAL_OK)
 1499 
 677              	.LVL32:
1199 
 499              		.loc 1 481 21 is_stmt 0 view .LVU132
 1500 
 484:Core/Src/main.c ****   {
1200 
 500 0034 0B93     		str	r3, [sp, #44]
 1501 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 26
1201 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 21
 1502 
 
1202 
 
 1503 
 
1203 
 
 1504 
 678              		.loc 1 484 3 is_stmt 1 view .LVU188
1204 
 482:Core/Src/main.c ****   {
 1505 
 484:Core/Src/main.c ****   {
1205 
 501              		.loc 1 482 3 is_stmt 1 view .LVU133
 1506 
 679              		.loc 1 484 7 is_stmt 0 view .LVU189
1206 
 482:Core/Src/main.c ****   {
 1507 
 680 0036 0821     		movs	r1, #8
1207 
 502              		.loc 1 482 7 is_stmt 0 view .LVU134
 1508 
 681 0038 2846     		mov	r0, r5
1208 
 503 0036 03A9     		add	r1, sp, #12
 1509 
 682 003a FFF7FEFF 		bl	HAL_TIM_OnePulse_Init
1209 
 504 0038 2846     		mov	r0, r5
 1510 
 683              	.LVL33:
1210 
 505 003a FFF7FEFF 		bl	HAL_TIM_Encoder_Init
 1511 
 488:Core/Src/main.c ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
1211 
 506              	.LVL25:
 1512 
 684              		.loc 1 488 3 is_stmt 1 view .LVU190
1212 
 486:Core/Src/main.c ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 1513 
 488:Core/Src/main.c ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
1213 
 507              		.loc 1 486 3 is_stmt 1 view .LVU135
 1514 
 685              		.loc 1 488 37 is_stmt 0 view .LVU191
1214 
 486:Core/Src/main.c ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 1515 
 686 003e 1023     		movs	r3, #16
1215 
 508              		.loc 1 486 37 is_stmt 0 view .LVU136
 1516 
 687 0040 0893     		str	r3, [sp, #32]
1216 
 509 003e 0194     		str	r4, [sp, #4]
 1517 
 489:Core/Src/main.c ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
1217 
 487:Core/Src/main.c ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
 1518 
 688              		.loc 1 489 3 is_stmt 1 view .LVU192
1218 
 510              		.loc 1 487 3 is_stmt 1 view .LVU137
 1519 
 489:Core/Src/main.c ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
1219 
 487:Core/Src/main.c ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
 1520 
 689              		.loc 1 489 33 is_stmt 0 view .LVU193
1220 
 511              		.loc 1 487 33 is_stmt 0 view .LVU138
 1521 
 690 0042 0994     		str	r4, [sp, #36]
1221 
 512 0040 0294     		str	r4, [sp, #8]
 1522 
 490:Core/Src/main.c ****   {
1222 
 488:Core/Src/main.c ****   {
 1523 
 691              		.loc 1 490 3 is_stmt 1 view .LVU194
1223 
 513              		.loc 1 488 3 is_stmt 1 view .LVU139
 1524 
 490:Core/Src/main.c ****   {
1224 
 488:Core/Src/main.c ****   {
 1525 
 692              		.loc 1 490 7 is_stmt 0 view .LVU195
1225 
 514              		.loc 1 488 7 is_stmt 0 view .LVU140
 1526 
 693 0044 08A9     		add	r1, sp, #32
1226 
 515 0042 01A9     		add	r1, sp, #4
 1527 
 694 0046 2846     		mov	r0, r5
1227 
 516 0044 2846     		mov	r0, r5
 1528 
 695 0048 FFF7FEFF 		bl	HAL_TIMEx_MasterConfigSynchronization
1228 
 517 0046 FFF7FEFF 		bl	HAL_TIMEx_MasterConfigSynchronization
 1529 
 696              	.LVL34:
1229 
 518              	.LVL26:
 1530 
 494:Core/Src/main.c ****   sConfigOC.Pulse = 9999;
1230 
 496:Core/Src/main.c ****
1531 
 697              		.loc 1 494 3 is_stmt 1 view .LVU196
1231 
 519              		.loc 1 496 1 view .LVU141
 1532 
 494:Core/Src/main.c ****   sConfigOC.Pulse = 9999;
1232 
 520 004a 0DB0     		add	sp, sp, #52
 1533 
 698              		.loc 1 494 20 is_stmt 0 view .LVU197
1233 
 521              	.LCFI15:
 1534 
 699 004c 0194     		str	r4, [sp, #4]
1234 
 522              		.cfi_def_cfa_offset 12
 1535 
 495:Core/Src/main.c ****   sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
1235 
 523              		@ sp needed
 1536 
 700              		.loc 1 495 3 is_stmt 1 view .LVU198
1236 
 524 004c 30BD     		pop	{r4, r5, pc}
 1537 
 495:Core/Src/main.c ****   sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
1237 
 525              	.L28:
 1538 
 701              		.loc 1 495 19 is_stmt 0 view .LVU199
1238 
 526 004e 00BF     		.align	2
 1539 
 702 004e 42F20F73 		movw	r3, #9999
1239 
 527              	.L27:
 1540 
 703 0052 0293     		str	r3, [sp, #8]
1240 
 528 0050 00000000 		.word	htim4
 1541 
 496:Core/Src/main.c ****   sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
1241 
 529 0054 00080040 		.word	1073743872
 1542 
 704              		.loc 1 496 3 is_stmt 1 view .LVU200
1242 
 530              		.cfi_endproc
 1543 
 496:Core/Src/main.c ****   sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
1243 
 531              	.LFE77:
 1544 
 705              		.loc 1 496 24 is_stmt 0 view .LVU201
1244 
 533              		.section	.text.MX_USART1_UART_Init,"ax",%progbits
 1545 
 706 0054 0394     		str	r4, [sp, #12]
1245 
 534              		.align	1
 1546 
 497:Core/Src/main.c ****   if (HAL_TIM_OC_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
1246 
 535              		.syntax unified
 1547 
 707              		.loc 1 497 3 is_stmt 1 view .LVU202
1247 
 536              		.thumb
 1548 
 497:Core/Src/main.c ****   if (HAL_TIM_OC_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
1248 
 537              		.thumb_func
 1549 
 708              		.loc 1 497 24 is_stmt 0 view .LVU203
1249 
 538              		.fpu softvfp
 1550 
 709 0056 0594     		str	r4, [sp, #20]
1250 
 540              	MX_USART1_UART_Init:
 1551 
 498:Core/Src/main.c ****   {
1251 
 541              	.LFB78:
 1552 
 710              		.loc 1 498 3 is_stmt 1 view .LVU204
1252 
 504:Core/Src/main.c ****
1553 
 498:Core/Src/main.c ****   {
1253 
 542              		.loc 1 504 1 is_stmt 1 view -0
 1554 
 711              		.loc 1 498 7 is_stmt 0 view .LVU205
1254 
 543              		.cfi_startproc
 1555 
 712 0058 2246     		mov	r2, r4
1255 
 544              		@ args = 0, pretend = 0, frame = 0
 1556 
 713 005a 01A9     		add	r1, sp, #4
1256 
 545              		@ frame_needed = 0, uses_anonymous_args = 0
 1557 
 714 005c 2846     		mov	r0, r5
1257 
 546 0000 08B5     		push	{r3, lr}
 1558 
 715 005e FFF7FEFF 		bl	HAL_TIM_OC_ConfigChannel
1258 
 547              	.LCFI16:
 1559 
 716              	.LVL35:
1259 
 548              		.cfi_def_cfa_offset 8
 1560 
 506:Core/Src/main.c ****
1260 
 549              		.cfi_offset 3, -8
 1561 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 27
1261 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 22
 1562 
 
1262 
 
 1563 
 
1263 
 
 1564 
 717              		.loc 1 506 1 view .LVU206
1264 
 550              		.cfi_offset 14, -4
 1565 
 718 0062 0BB0     		add	sp, sp, #44
1265 
 513:Core/Src/main.c ****   huart1.Init.BaudRate = 115200;
 1566 
 719              	.LCFI19:
1266 
 551              		.loc 1 513 3 view .LVU143
 1567 
 720              		.cfi_def_cfa_offset 12
1267 
 513:Core/Src/main.c ****   huart1.Init.BaudRate = 115200;
 1568 
 721              		@ sp needed
1268 
 552              		.loc 1 513 19 is_stmt 0 view .LVU144
 1569 
 722 0064 30BD     		pop	{r4, r5, pc}
1269 
 553 0002 0848     		ldr	r0, .L31
 1570 
 723              	.L38:
1270 
 554 0004 084B     		ldr	r3, .L31+4
 1571 
 724 0066 00BF     		.align	2
1271 
 555 0006 0360     		str	r3, [r0]
 1572 
 725              	.L37:
1272 
 514:Core/Src/main.c ****   huart1.Init.WordLength = UART_WORDLENGTH_8B;
 1573 
 726 0068 00000000 		.word	htim3
1273 
 556              		.loc 1 514 3 is_stmt 1 view .LVU145
 1574 
 727 006c 00040040 		.word	1073742848
1274 
 514:Core/Src/main.c ****   huart1.Init.WordLength = UART_WORDLENGTH_8B;
 1575 
 728              		.cfi_endproc
1275 
 557              		.loc 1 514 24 is_stmt 0 view .LVU146
 1576 
 729              	.LFE77:
1276 
 558 0008 4FF4E133 		mov	r3, #115200
 1577 
 731              		.section	.text.MX_I2C2_Init,"ax",%progbits
1277 
 559 000c 4360     		str	r3, [r0, #4]
 1578 
 732              		.align	1
1278 
 515:Core/Src/main.c ****   huart1.Init.StopBits = UART_STOPBITS_1;
 1579 
 733              		.syntax unified
1279 
 560              		.loc 1 515 3 is_stmt 1 view .LVU147
 1580 
 734              		.thumb
1280 
 515:Core/Src/main.c ****   huart1.Init.StopBits = UART_STOPBITS_1;
 1581 
 735              		.thumb_func
1281 
 561              		.loc 1 515 26 is_stmt 0 view .LVU148
 1582 
 736              		.fpu softvfp
1282 
 562 000e 0023     		movs	r3, #0
 1583 
 738              	MX_I2C2_Init:
1283 
 563 0010 8360     		str	r3, [r0, #8]
 1584 
 739              	.LFB74:
1284 
 516:Core/Src/main.c ****   huart1.Init.Parity = UART_PARITY_NONE;
 1585 
 333:Core/Src/main.c ****
1285 
 564              		.loc 1 516 3 is_stmt 1 view .LVU149
 1586 
 740              		.loc 1 333 1 is_stmt 1 view -0
1286 
 516:Core/Src/main.c ****   huart1.Init.Parity = UART_PARITY_NONE;
 1587 
 741              		.cfi_startproc
1287 
 565              		.loc 1 516 24 is_stmt 0 view .LVU150
 1588 
 742              		@ args = 0, pretend = 0, frame = 0
1288 
 566 0012 C360     		str	r3, [r0, #12]
 1589 
 743              		@ frame_needed = 0, uses_anonymous_args = 0
1289 
 517:Core/Src/main.c ****   huart1.Init.Mode = UART_MODE_TX_RX;
 1590 
 744 0000 08B5     		push	{r3, lr}
1290 
 567              		.loc 1 517 3 is_stmt 1 view .LVU151
 1591 
 745              	.LCFI20:
1291 
 517:Core/Src/main.c ****   huart1.Init.Mode = UART_MODE_TX_RX;
 1592 
 746              		.cfi_def_cfa_offset 8
1292 
 568              		.loc 1 517 22 is_stmt 0 view .LVU152
 1593 
 747              		.cfi_offset 3, -8
1293 
 569 0014 0361     		str	r3, [r0, #16]
 1594 
 748              		.cfi_offset 14, -4
1294 
 518:Core/Src/main.c ****   huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 1595 
 342:Core/Src/main.c ****   hi2c2.Init.ClockSpeed = 100000;
1295 
 570              		.loc 1 518 3 is_stmt 1 view .LVU153
 1596 
 749              		.loc 1 342 3 view .LVU208
1296 
 518:Core/Src/main.c ****   huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 1597 
 342:Core/Src/main.c ****   hi2c2.Init.ClockSpeed = 100000;
1297 
 571              		.loc 1 518 20 is_stmt 0 view .LVU154
 1598 
 750              		.loc 1 342 18 is_stmt 0 view .LVU209
1298 
 572 0016 0C22     		movs	r2, #12
 1599 
 751 0002 0948     		ldr	r0, .L41
1299 
 573 0018 4261     		str	r2, [r0, #20]
 1600 
 752 0004 094B     		ldr	r3, .L41+4
1300 
 519:Core/Src/main.c ****   huart1.Init.OverSampling = UART_OVERSAMPLING_16;
 1601 
 753 0006 0360     		str	r3, [r0]
1301 
 574              		.loc 1 519 3 is_stmt 1 view .LVU155
 1602 
 343:Core/Src/main.c ****   hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2;
1302 
 519:Core/Src/main.c ****   huart1.Init.OverSampling = UART_OVERSAMPLING_16;
 1603 
 754              		.loc 1 343 3 is_stmt 1 view .LVU210
1303 
 575              		.loc 1 519 25 is_stmt 0 view .LVU156
 1604 
 343:Core/Src/main.c ****   hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2;
1304 
 576 001a 8361     		str	r3, [r0, #24]
 1605 
 755              		.loc 1 343 25 is_stmt 0 view .LVU211
1305 
 520:Core/Src/main.c ****   if (HAL_UART_Init(&huart1) != HAL_OK)
 1606 
 756 0008 094B     		ldr	r3, .L41+8
1306 
 577              		.loc 1 520 3 is_stmt 1 view .LVU157
 1607 
 757 000a 4360     		str	r3, [r0, #4]
1307 
 520:Core/Src/main.c ****   if (HAL_UART_Init(&huart1) != HAL_OK)
 1608 
 344:Core/Src/main.c ****   hi2c2.Init.OwnAddress1 = 0;
1308 
 578              		.loc 1 520 28 is_stmt 0 view .LVU158
 1609 
 758              		.loc 1 344 3 is_stmt 1 view .LVU212
1309 
 579 001c C361     		str	r3, [r0, #28]
 1610 
 344:Core/Src/main.c ****   hi2c2.Init.OwnAddress1 = 0;
1310 
 521:Core/Src/main.c ****   {
 1611 
 759              		.loc 1 344 24 is_stmt 0 view .LVU213
1311 
 580              		.loc 1 521 3 is_stmt 1 view .LVU159
 1612 
 760 000c 0023     		movs	r3, #0
1312 
 521:Core/Src/main.c ****   {
 1613 
 761 000e 8360     		str	r3, [r0, #8]
1313 
 581              		.loc 1 521 7 is_stmt 0 view .LVU160
 1614 
 345:Core/Src/main.c ****   hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
1314 
 582 001e FFF7FEFF 		bl	HAL_UART_Init
 1615 
 762              		.loc 1 345 3 is_stmt 1 view .LVU214
1315 
 583              	.LVL27:
 1616 
 345:Core/Src/main.c ****   hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
1316 
 529:Core/Src/main.c ****
1617 
 763              		.loc 1 345 26 is_stmt 0 view .LVU215
1317 
 584              		.loc 1 529 1 view .LVU161
 1618 
 764 0010 C360     		str	r3, [r0, #12]
1318 
 585 0022 08BD     		pop	{r3, pc}
 1619 
 346:Core/Src/main.c ****   hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
1319 
 586              	.L32:
 1620 
 765              		.loc 1 346 3 is_stmt 1 view .LVU216
1320 
 587              		.align	2
 1621 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 28
1321 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 23
 1622 
 
1322 
 
 1623 
 
1323 
 
 1624 
 346:Core/Src/main.c ****   hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
1324 
 588              	.L31:
 1625 
 766              		.loc 1 346 29 is_stmt 0 view .LVU217
1325 
 589 0024 00000000 		.word	huart1
 1626 
 767 0012 4FF48042 		mov	r2, #16384
1326 
 590 0028 00380140 		.word	1073821696
 1627 
 768 0016 0261     		str	r2, [r0, #16]
1327 
 591              		.cfi_endproc
 1628 
 347:Core/Src/main.c ****   hi2c2.Init.OwnAddress2 = 0;
1328 
 592              	.LFE78:
 1629 
 769              		.loc 1 347 3 is_stmt 1 view .LVU218
1329 
 594              		.section	.text.MX_TIM3_Init,"ax",%progbits
 1630 
 347:Core/Src/main.c ****   hi2c2.Init.OwnAddress2 = 0;
1330 
 595              		.align	1
 1631 
 770              		.loc 1 347 30 is_stmt 0 view .LVU219
1331 
 596              		.syntax unified
 1632 
 771 0018 4361     		str	r3, [r0, #20]
1332 
 597              		.thumb
 1633 
 348:Core/Src/main.c ****   hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
1333 
 598              		.thumb_func
 1634 
 772              		.loc 1 348 3 is_stmt 1 view .LVU220
1334 
 599              		.fpu softvfp
 1635 
 348:Core/Src/main.c ****   hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
1335 
 601              	MX_TIM3_Init:
 1636 
 773              		.loc 1 348 26 is_stmt 0 view .LVU221
1336 
 602              	.LFB76:
 1637 
 774 001a 8361     		str	r3, [r0, #24]
1337 
 403:Core/Src/main.c ****
1638 
 349:Core/Src/main.c ****   hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
1338 
 603              		.loc 1 403 1 is_stmt 1 view -0
 1639 
 775              		.loc 1 349 3 is_stmt 1 view .LVU222
1339 
 604              		.cfi_startproc
 1640 
 349:Core/Src/main.c ****   hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
1340 
 605              		@ args = 0, pretend = 0, frame = 40
 1641 
 776              		.loc 1 349 30 is_stmt 0 view .LVU223
1341 
 606              		@ frame_needed = 0, uses_anonymous_args = 0
 1642 
 777 001c C361     		str	r3, [r0, #28]
1342 
 607 0000 30B5     		push	{r4, r5, lr}
 1643 
 350:Core/Src/main.c ****   if (HAL_I2C_Init(&hi2c2) != HAL_OK)
1343 
 608              	.LCFI17:
 1644 
 778              		.loc 1 350 3 is_stmt 1 view .LVU224
1344 
 609              		.cfi_def_cfa_offset 12
 1645 
 350:Core/Src/main.c ****   if (HAL_I2C_Init(&hi2c2) != HAL_OK)
1345 
 610              		.cfi_offset 4, -12
 1646 
 779              		.loc 1 350 28 is_stmt 0 view .LVU225
1346 
 611              		.cfi_offset 5, -8
 1647 
 780 001e 0362     		str	r3, [r0, #32]
1347 
 612              		.cfi_offset 14, -4
 1648 
 351:Core/Src/main.c ****   {
1348 
 613 0002 8BB0     		sub	sp, sp, #44
 1649 
 781              		.loc 1 351 3 is_stmt 1 view .LVU226
1349 
 614              	.LCFI18:
 1650 
 351:Core/Src/main.c ****   {
1350 
 615              		.cfi_def_cfa_offset 56
 1651 
 782              		.loc 1 351 7 is_stmt 0 view .LVU227
1351 
 409:Core/Src/main.c ****   TIM_OC_InitTypeDef sConfigOC = {0};
 1652 
 783 0020 FFF7FEFF 		bl	HAL_I2C_Init
1352 
 616              		.loc 1 409 3 view .LVU163
 1653 
 784              	.LVL36:
1353 
 409:Core/Src/main.c ****   TIM_OC_InitTypeDef sConfigOC = {0};
 1654 
 359:Core/Src/main.c ****
1354 
 617              		.loc 1 409 27 is_stmt 0 view .LVU164
 1655 
 785              		.loc 1 359 1 view .LVU228
1355 
 618 0004 0024     		movs	r4, #0
 1656 
 786 0024 08BD     		pop	{r3, pc}
1356 
 619 0006 0894     		str	r4, [sp, #32]
 1657 
 787              	.L42:
1357 
 620 0008 0994     		str	r4, [sp, #36]
 1658 
 788 0026 00BF     		.align	2
1358 
 410:Core/Src/main.c ****
1659 
 789              	.L41:
1359 
 621              		.loc 1 410 3 is_stmt 1 view .LVU165
 1660 
 790 0028 00000000 		.word	hi2c2
1360 
 410:Core/Src/main.c ****
1661 
 791 002c 00580040 		.word	1073764352
1361 
 622              		.loc 1 410 22 is_stmt 0 view .LVU166
 1662 
 792 0030 A0860100 		.word	100000
1362 
 623 000a 0194     		str	r4, [sp, #4]
 1663 
 793              		.cfi_endproc
1363 
 624 000c 0294     		str	r4, [sp, #8]
 1664 
 794              	.LFE74:
1364 
 625 000e 0394     		str	r4, [sp, #12]
 1665 
 796              		.section	.text.MX_RTC_Init,"ax",%progbits
1365 
 626 0010 0494     		str	r4, [sp, #16]
 1666 
 797              		.align	1
1366 
 627 0012 0594     		str	r4, [sp, #20]
 1667 
 798              		.syntax unified
1367 
 628 0014 0694     		str	r4, [sp, #24]
 1668 
 799              		.thumb
1368 
 629 0016 0794     		str	r4, [sp, #28]
 1669 
 800              		.thumb_func
1369 
 415:Core/Src/main.c ****   htim3.Init.Prescaler = 640;
 1670 
 801              		.fpu softvfp
1370 
 630              		.loc 1 415 3 is_stmt 1 view .LVU167
 1671 
 803              	MX_RTC_Init:
1371 
 415:Core/Src/main.c ****   htim3.Init.Prescaler = 640;
 1672 
 804              	.LFB75:
1372 
 631              		.loc 1 415 18 is_stmt 0 view .LVU168
 1673 
 367:Core/Src/main.c ****
1373 
 632 0018 134D     		ldr	r5, .L35
 1674 
 805              		.loc 1 367 1 is_stmt 1 view -0
1374 
 633 001a 144B     		ldr	r3, .L35+4
 1675 
 806              		.cfi_startproc
1375 
 634 001c 2B60     		str	r3, [r5]
 1676 
 807              		@ args = 0, pretend = 0, frame = 8
1376 
 416:Core/Src/main.c ****   htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
 1677 
 808              		@ frame_needed = 0, uses_anonymous_args = 0
1377 
 635              		.loc 1 416 3 is_stmt 1 view .LVU169
 1678 
 809 0000 30B5     		push	{r4, r5, lr}
1378 
 416:Core/Src/main.c ****   htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
 1679 
 810              	.LCFI21:
1379 
 636              		.loc 1 416 24 is_stmt 0 view .LVU170
 1680 
 811              		.cfi_def_cfa_offset 12
1380 
 637 001e 4FF42073 		mov	r3, #640
 1681 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 29
1381 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 24
 1682 
 
1382 
 
 1683 
 
1383 
 
 1684 
 812              		.cfi_offset 4, -12
1384 
 638 0022 6B60     		str	r3, [r5, #4]
 1685 
 813              		.cfi_offset 5, -8
1385 
 417:Core/Src/main.c ****   htim3.Init.Period = 10000;
 1686 
 814              		.cfi_offset 14, -4
1386 
 639              		.loc 1 417 3 is_stmt 1 view .LVU171
 1687 
 815 0002 83B0     		sub	sp, sp, #12
1387 
 417:Core/Src/main.c ****   htim3.Init.Period = 10000;
 1688 
 816              	.LCFI22:
1388 
 640              		.loc 1 417 26 is_stmt 0 view .LVU172
 1689 
 817              		.cfi_def_cfa_offset 24
1389 
 641 0024 AC60     		str	r4, [r5, #8]
 1690 
 373:Core/Src/main.c ****   RTC_DateTypeDef DateToUpdate = {0};
1390 
 418:Core/Src/main.c ****   htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
 1691 
 818              		.loc 1 373 3 view .LVU230
1391 
 642              		.loc 1 418 3 is_stmt 1 view .LVU173
 1692 
 373:Core/Src/main.c ****   RTC_DateTypeDef DateToUpdate = {0};
1392 
 418:Core/Src/main.c ****   htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
 1693 
 819              		.loc 1 373 19 is_stmt 0 view .LVU231
1393 
 643              		.loc 1 418 21 is_stmt 0 view .LVU174
 1694 
 820 0004 0024     		movs	r4, #0
1394 
 644 0026 42F21073 		movw	r3, #10000
 1695 
 821 0006 ADF80440 		strh	r4, [sp, #4]	@ movhi
1395 
 645 002a EB60     		str	r3, [r5, #12]
 1696 
 822 000a 8DF80640 		strb	r4, [sp, #6]
1396 
 419:Core/Src/main.c ****   htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 1697 
 374:Core/Src/main.c ****
1397 
 646              		.loc 1 419 3 is_stmt 1 view .LVU175
 1698 
 823              		.loc 1 374 3 is_stmt 1 view .LVU232
1398 
 419:Core/Src/main.c ****   htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
 1699 
 374:Core/Src/main.c ****
1399 
 647              		.loc 1 419 28 is_stmt 0 view .LVU176
 1700 
 824              		.loc 1 374 19 is_stmt 0 view .LVU233
1400 
 648 002c 2C61     		str	r4, [r5, #16]
 1701 
 825 000e 0094     		str	r4, [sp]
1401 
 420:Core/Src/main.c ****   if (HAL_TIM_OC_Init(&htim3) != HAL_OK)
 1702 
 381:Core/Src/main.c ****   hrtc.Init.AsynchPrediv = RTC_AUTO_1_SECOND;
1402 
 649              		.loc 1 420 3 is_stmt 1 view .LVU177
 1703 
 826              		.loc 1 381 3 is_stmt 1 view .LVU234
1403 
 420:Core/Src/main.c ****   if (HAL_TIM_OC_Init(&htim3) != HAL_OK)
 1704 
 381:Core/Src/main.c ****   hrtc.Init.AsynchPrediv = RTC_AUTO_1_SECOND;
1404 
 650              		.loc 1 420 32 is_stmt 0 view .LVU178
 1705 
 827              		.loc 1 381 17 is_stmt 0 view .LVU235
1405 
 651 002e AC61     		str	r4, [r5, #24]
 1706 
 828 0010 124D     		ldr	r5, .L45
1406 
 421:Core/Src/main.c ****   {
 1707 
 829 0012 134B     		ldr	r3, .L45+4
1407 
 652              		.loc 1 421 3 is_stmt 1 view .LVU179
 1708 
 830 0014 2B60     		str	r3, [r5]
1408 
 421:Core/Src/main.c ****   {
 1709 
 382:Core/Src/main.c ****   hrtc.Init.OutPut = RTC_OUTPUTSOURCE_ALARM;
1409 
 653              		.loc 1 421 7 is_stmt 0 view .LVU180
 1710 
 831              		.loc 1 382 3 is_stmt 1 view .LVU236
1410 
 654 0030 2846     		mov	r0, r5
 1711 
 382:Core/Src/main.c ****   hrtc.Init.OutPut = RTC_OUTPUTSOURCE_ALARM;
1411 
 655 0032 FFF7FEFF 		bl	HAL_TIM_OC_Init
 1712 
 832              		.loc 1 382 26 is_stmt 0 view .LVU237
1412 
 656              	.LVL28:
 1713 
 833 0016 4FF0FF33 		mov	r3, #-1
1413 
 425:Core/Src/main.c ****   {
 1714 
 834 001a 6B60     		str	r3, [r5, #4]
1414 
 657              		.loc 1 425 3 is_stmt 1 view .LVU181
 1715 
 383:Core/Src/main.c ****   if (HAL_RTC_Init(&hrtc) != HAL_OK)
1415 
 425:Core/Src/main.c ****   {
 1716 
 835              		.loc 1 383 3 is_stmt 1 view .LVU238
1416 
 658              		.loc 1 425 7 is_stmt 0 view .LVU182
 1717 
 383:Core/Src/main.c ****   if (HAL_RTC_Init(&hrtc) != HAL_OK)
1417 
 659 0036 0821     		movs	r1, #8
 1718 
 836              		.loc 1 383 20 is_stmt 0 view .LVU239
1418 
 660 0038 2846     		mov	r0, r5
 1719 
 837 001c 4FF48073 		mov	r3, #256
1419 
 661 003a FFF7FEFF 		bl	HAL_TIM_OnePulse_Init
 1720 
 838 0020 AB60     		str	r3, [r5, #8]
1420 
 662              	.LVL29:
 1721 
 384:Core/Src/main.c ****   {
1421 
 429:Core/Src/main.c ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 1722 
 839              		.loc 1 384 3 is_stmt 1 view .LVU240
1422 
 663              		.loc 1 429 3 is_stmt 1 view .LVU183
 1723 
 384:Core/Src/main.c ****   {
1423 
 429:Core/Src/main.c ****   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
 1724 
 840              		.loc 1 384 7 is_stmt 0 view .LVU241
1424 
 664              		.loc 1 429 37 is_stmt 0 view .LVU184
 1725 
 841 0022 2846     		mov	r0, r5
1425 
 665 003e 1023     		movs	r3, #16
 1726 
 842 0024 FFF7FEFF 		bl	HAL_RTC_Init
1426 
 666 0040 0893     		str	r3, [sp, #32]
 1727 
 843              	.LVL37:
1427 
 430:Core/Src/main.c ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
 1728 
 395:Core/Src/main.c ****   sTime.Minutes = 0x0;
1428 
 667              		.loc 1 430 3 is_stmt 1 view .LVU185
 1729 
 844              		.loc 1 395 3 is_stmt 1 view .LVU242
1429 
 430:Core/Src/main.c ****   if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
 1730 
 395:Core/Src/main.c ****   sTime.Minutes = 0x0;
1430 
 668              		.loc 1 430 33 is_stmt 0 view .LVU186
 1731 
 845              		.loc 1 395 15 is_stmt 0 view .LVU243
1431 
 669 0042 0994     		str	r4, [sp, #36]
 1732 
 846 0028 8DF80440 		strb	r4, [sp, #4]
1432 
 431:Core/Src/main.c ****   {
 1733 
 396:Core/Src/main.c ****   sTime.Seconds = 0x0;
1433 
 670              		.loc 1 431 3 is_stmt 1 view .LVU187
 1734 
 847              		.loc 1 396 3 is_stmt 1 view .LVU244
1434 
 431:Core/Src/main.c ****   {
 1735 
 396:Core/Src/main.c ****   sTime.Seconds = 0x0;
1435 
 671              		.loc 1 431 7 is_stmt 0 view .LVU188
 1736 
 848              		.loc 1 396 17 is_stmt 0 view .LVU245
1436 
 672 0044 08A9     		add	r1, sp, #32
 1737 
 849 002c 8DF80540 		strb	r4, [sp, #5]
1437 
 673 0046 2846     		mov	r0, r5
 1738 
 397:Core/Src/main.c ****
1438 
 674 0048 FFF7FEFF 		bl	HAL_TIMEx_MasterConfigSynchronization
 1739 
 850              		.loc 1 397 3 is_stmt 1 view .LVU246
1439 
 675              	.LVL30:
 1740 
 397:Core/Src/main.c ****
1440 
 435:Core/Src/main.c ****   sConfigOC.Pulse = 9999;
 1741 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 30
1441 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 25
 1742 
 
1442 
 
 1743 
 
1443 
 
 1744 
 851              		.loc 1 397 17 is_stmt 0 view .LVU247
1444 
 676              		.loc 1 435 3 is_stmt 1 view .LVU189
 1745 
 852 0030 8DF80640 		strb	r4, [sp, #6]
1445 
 435:Core/Src/main.c ****   sConfigOC.Pulse = 9999;
 1746 
 399:Core/Src/main.c ****   {
1446 
 677              		.loc 1 435 20 is_stmt 0 view .LVU190
 1747 
 853              		.loc 1 399 3 is_stmt 1 view .LVU248
1447 
 678 004c 0194     		str	r4, [sp, #4]
 1748 
 399:Core/Src/main.c ****   {
1448 
 436:Core/Src/main.c ****   sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
 1749 
 854              		.loc 1 399 7 is_stmt 0 view .LVU249
1449 
 679              		.loc 1 436 3 is_stmt 1 view .LVU191
 1750 
 855 0034 0122     		movs	r2, #1
1450 
 436:Core/Src/main.c ****   sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
 1751 
 856 0036 01A9     		add	r1, sp, #4
1451 
 680              		.loc 1 436 19 is_stmt 0 view .LVU192
 1752 
 857 0038 2846     		mov	r0, r5
1452 
 681 004e 42F20F73 		movw	r3, #9999
 1753 
 858 003a FFF7FEFF 		bl	HAL_RTC_SetTime
1453 
 682 0052 0293     		str	r3, [sp, #8]
 1754 
 859              	.LVL38:
1454 
 437:Core/Src/main.c ****   sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
 1755 
 403:Core/Src/main.c ****   DateToUpdate.Month = RTC_MONTH_JANUARY;
1455 
 683              		.loc 1 437 3 is_stmt 1 view .LVU193
 1756 
 860              		.loc 1 403 3 is_stmt 1 view .LVU250
1456 
 437:Core/Src/main.c ****   sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
 1757 
 403:Core/Src/main.c ****   DateToUpdate.Month = RTC_MONTH_JANUARY;
1457 
 684              		.loc 1 437 24 is_stmt 0 view .LVU194
 1758 
 861              		.loc 1 403 24 is_stmt 0 view .LVU251
1458 
 685 0054 0394     		str	r4, [sp, #12]
 1759 
 862 003e 0122     		movs	r2, #1
1459 
 438:Core/Src/main.c ****   if (HAL_TIM_OC_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
 1760 
 863 0040 8DF80020 		strb	r2, [sp]
1460 
 686              		.loc 1 438 3 is_stmt 1 view .LVU195
 1761 
 404:Core/Src/main.c ****   DateToUpdate.Date = 0x1;
1461 
 438:Core/Src/main.c ****   if (HAL_TIM_OC_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
 1762 
 864              		.loc 1 404 3 is_stmt 1 view .LVU252
1462 
 687              		.loc 1 438 24 is_stmt 0 view .LVU196
 1763 
 404:Core/Src/main.c ****   DateToUpdate.Date = 0x1;
1463 
 688 0056 0594     		str	r4, [sp, #20]
 1764 
 865              		.loc 1 404 22 is_stmt 0 view .LVU253
1464 
 439:Core/Src/main.c ****   {
 1765 
 866 0044 8DF80120 		strb	r2, [sp, #1]
1465 
 689              		.loc 1 439 3 is_stmt 1 view .LVU197
 1766 
 405:Core/Src/main.c ****   DateToUpdate.Year = 0x0;
1466 
 439:Core/Src/main.c ****   {
 1767 
 867              		.loc 1 405 3 is_stmt 1 view .LVU254
1467 
 690              		.loc 1 439 7 is_stmt 0 view .LVU198
 1768 
 405:Core/Src/main.c ****   DateToUpdate.Year = 0x0;
1468 
 691 0058 2246     		mov	r2, r4
 1769 
 868              		.loc 1 405 21 is_stmt 0 view .LVU255
1469 
 692 005a 01A9     		add	r1, sp, #4
 1770 
 869 0048 8DF80220 		strb	r2, [sp, #2]
1470 
 693 005c 2846     		mov	r0, r5
 1771 
 406:Core/Src/main.c ****
1471 
 694 005e FFF7FEFF 		bl	HAL_TIM_OC_ConfigChannel
 1772 
 870              		.loc 1 406 3 is_stmt 1 view .LVU256
1472 
 695              	.LVL31:
 1773 
 406:Core/Src/main.c ****
1473 
 447:Core/Src/main.c ****
1774 
 871              		.loc 1 406 21 is_stmt 0 view .LVU257
1474 
 696              		.loc 1 447 1 view .LVU199
 1775 
 872 004c 8DF80340 		strb	r4, [sp, #3]
1475 
 697 0062 0BB0     		add	sp, sp, #44
 1776 
 408:Core/Src/main.c ****   {
1476 
 698              	.LCFI19:
 1777 
 873              		.loc 1 408 3 is_stmt 1 view .LVU258
1477 
 699              		.cfi_def_cfa_offset 12
 1778 
 408:Core/Src/main.c ****   {
1478 
 700              		@ sp needed
 1779 
 874              		.loc 1 408 7 is_stmt 0 view .LVU259
1479 
 701 0064 30BD     		pop	{r4, r5, pc}
 1780 
 875 0050 6946     		mov	r1, sp
1480 
 702              	.L36:
 1781 
 876 0052 2846     		mov	r0, r5
1481 
 703 0066 00BF     		.align	2
 1782 
 877 0054 FFF7FEFF 		bl	HAL_RTC_SetDate
1482 
 704              	.L35:
 1783 
 878              	.LVL39:
1483 
 705 0068 00000000 		.word	htim3
 1784 
 416:Core/Src/main.c ****
1484 
 706 006c 00040040 		.word	1073742848
 1785 
 879              		.loc 1 416 1 view .LVU260
1485 
 707              		.cfi_endproc
 1786 
 880 0058 03B0     		add	sp, sp, #12
1486 
 708              	.LFE76:
 1787 
 881              	.LCFI23:
1487 
 710              		.section	.text.MX_I2C2_Init,"ax",%progbits
 1788 
 882              		.cfi_def_cfa_offset 12
1488 
 711              		.align	1
 1789 
 883              		@ sp needed
1489 
 712              		.syntax unified
 1790 
 884 005a 30BD     		pop	{r4, r5, pc}
1490 
 713              		.thumb
 1791 
 885              	.L46:
1491 
 714              		.thumb_func
 1792 
 886              		.align	2
1492 
 715              		.fpu softvfp
 1793 
 887              	.L45:
1493 
 717              	MX_I2C2_Init:
 1794 
 888 005c 00000000 		.word	hrtc
1494 
 718              	.LFB73:
 1795 
 889 0060 00280040 		.word	1073752064
1495 
 274:Core/Src/main.c ****
1796 
 890              		.cfi_endproc
1496 
 719              		.loc 1 274 1 is_stmt 1 view -0
 1797 
 891              	.LFE75:
1497 
 720              		.cfi_startproc
 1798 
 893              		.section	.text.stream_sensor_data_forced_mode,"ax",%progbits
1498 
 721              		@ args = 0, pretend = 0, frame = 0
 1799 
 894              		.align	1
1499 
 722              		@ frame_needed = 0, uses_anonymous_args = 0
 1800 
 895              		.global	stream_sensor_data_forced_mode
1500 
 723 0000 08B5     		push	{r3, lr}
 1801 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 31
1501 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 26
 1802 
 
1502 
 
 1803 
 
1503 
 
 1804 
 896              		.syntax unified
1504 
 724              	.LCFI20:
 1805 
 897              		.thumb
1505 
 725              		.cfi_def_cfa_offset 8
 1806 
 898              		.thumb_func
1506 
 726              		.cfi_offset 3, -8
 1807 
 899              		.fpu softvfp
1507 
 727              		.cfi_offset 14, -4
 1808 
 901              	stream_sensor_data_forced_mode:
1508 
 283:Core/Src/main.c ****   hi2c2.Init.ClockSpeed = 100000;
 1809 
 902              	.LVL40:
1509 
 728              		.loc 1 283 3 view .LVU201
 1810 
 903              	.LFB71:
1510 
 283:Core/Src/main.c ****   hi2c2.Init.ClockSpeed = 100000;
 1811 
 126:Core/Src/main.c ****   /* Variable to define the result */
1511 
 729              		.loc 1 283 18 is_stmt 0 view .LVU202
 1812 
 904              		.loc 1 126 1 is_stmt 1 view -0
1512 
 730 0002 0948     		ldr	r0, .L39
 1813 
 905              		.cfi_startproc
1513 
 731 0004 094B     		ldr	r3, .L39+4
 1814 
 906              		@ args = 0, pretend = 0, frame = 0
1514 
 732 0006 0360     		str	r3, [r0]
 1815 
 907              		@ frame_needed = 0, uses_anonymous_args = 0
1515 
 284:Core/Src/main.c ****   hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2;
 1816 
 126:Core/Src/main.c ****   /* Variable to define the result */
1516 
 733              		.loc 1 284 3 is_stmt 1 view .LVU203
 1817 
 908              		.loc 1 126 1 is_stmt 0 view .LVU262
1517 
 284:Core/Src/main.c ****   hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2;
 1818 
 909 0000 10B5     		push	{r4, lr}
1518 
 734              		.loc 1 284 25 is_stmt 0 view .LVU204
 1819 
 910              	.LCFI24:
1519 
 735 0008 094B     		ldr	r3, .L39+8
 1820 
 911              		.cfi_def_cfa_offset 8
1520 
 736 000a 4360     		str	r3, [r0, #4]
 1821 
 912              		.cfi_offset 4, -8
1521 
 285:Core/Src/main.c ****   hi2c2.Init.OwnAddress1 = 0;
 1822 
 913              		.cfi_offset 14, -4
1522 
 737              		.loc 1 285 3 is_stmt 1 view .LVU205
 1823 
 914 0002 0446     		mov	r4, r0
1523 
 285:Core/Src/main.c ****   hi2c2.Init.OwnAddress1 = 0;
 1824 
 128:Core/Src/main.c ****
1524 
 738              		.loc 1 285 24 is_stmt 0 view .LVU206
 1825 
 915              		.loc 1 128 3 is_stmt 1 view .LVU263
1525 
 739 000c 0023     		movs	r3, #0
 1826 
 916              	.LVL41:
1526 
 740 000e 8360     		str	r3, [r0, #8]
 1827 
 131:Core/Src/main.c ****
1527 
 286:Core/Src/main.c ****   hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
 1828 
 917              		.loc 1 131 3 view .LVU264
1528 
 741              		.loc 1 286 3 is_stmt 1 view .LVU207
 1829 
 134:Core/Src/main.c ****
1529 
 286:Core/Src/main.c ****   hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
 1830 
 918              		.loc 1 134 3 view .LVU265
1530 
 742              		.loc 1 286 26 is_stmt 0 view .LVU208
 1831 
 137:Core/Src/main.c ****   dev->settings.osr_p = BME280_OVERSAMPLING_16X;
1531 
 743 0010 C360     		str	r3, [r0, #12]
 1832 
 919              		.loc 1 137 3 view .LVU266
1532 
 287:Core/Src/main.c ****   hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
 1833 
 137:Core/Src/main.c ****   dev->settings.osr_p = BME280_OVERSAMPLING_16X;
1533 
 744              		.loc 1 287 3 is_stmt 1 view .LVU209
 1834 
 920              		.loc 1 137 23 is_stmt 0 view .LVU267
1534 
 287:Core/Src/main.c ****   hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
 1835 
 921 0004 0123     		movs	r3, #1
1535 
 745              		.loc 1 287 29 is_stmt 0 view .LVU210
 1836 
 922 0006 80F84230 		strb	r3, [r0, #66]
1536 
 746 0012 4FF48042 		mov	r2, #16384
 1837 
 138:Core/Src/main.c ****   dev->settings.osr_t = BME280_OVERSAMPLING_2X;
1537 
 747 0016 0261     		str	r2, [r0, #16]
 1838 
 923              		.loc 1 138 3 is_stmt 1 view .LVU268
1538 
 288:Core/Src/main.c ****   hi2c2.Init.OwnAddress2 = 0;
 1839 
 138:Core/Src/main.c ****   dev->settings.osr_t = BME280_OVERSAMPLING_2X;
1539 
 748              		.loc 1 288 3 is_stmt 1 view .LVU211
 1840 
 924              		.loc 1 138 23 is_stmt 0 view .LVU269
1540 
 288:Core/Src/main.c ****   hi2c2.Init.OwnAddress2 = 0;
 1841 
 925 000a 0523     		movs	r3, #5
1541 
 749              		.loc 1 288 30 is_stmt 0 view .LVU212
 1842 
 926 000c 80F84030 		strb	r3, [r0, #64]
1542 
 750 0018 4361     		str	r3, [r0, #20]
 1843 
 139:Core/Src/main.c ****   dev->settings.filter = BME280_FILTER_COEFF_16;
1543 
 289:Core/Src/main.c ****   hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
 1844 
 927              		.loc 1 139 3 is_stmt 1 view .LVU270
1544 
 751              		.loc 1 289 3 is_stmt 1 view .LVU213
 1845 
 139:Core/Src/main.c ****   dev->settings.filter = BME280_FILTER_COEFF_16;
1545 
 289:Core/Src/main.c ****   hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
 1846 
 928              		.loc 1 139 23 is_stmt 0 view .LVU271
1546 
 752              		.loc 1 289 26 is_stmt 0 view .LVU214
 1847 
 929 0010 0223     		movs	r3, #2
1547 
 753 001a 8361     		str	r3, [r0, #24]
 1848 
 930 0012 80F84130 		strb	r3, [r0, #65]
1548 
 290:Core/Src/main.c ****   hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
 1849 
 140:Core/Src/main.c ****
1549 
 754              		.loc 1 290 3 is_stmt 1 view .LVU215
 1850 
 931              		.loc 1 140 3 is_stmt 1 view .LVU272
1550 
 290:Core/Src/main.c ****   hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
 1851 
 140:Core/Src/main.c ****
1551 
 755              		.loc 1 290 30 is_stmt 0 view .LVU216
 1852 
 932              		.loc 1 140 24 is_stmt 0 view .LVU273
1552 
 756 001c C361     		str	r3, [r0, #28]
 1853 
 933 0016 0423     		movs	r3, #4
1553 
 291:Core/Src/main.c ****   if (HAL_I2C_Init(&hi2c2) != HAL_OK)
 1854 
 934 0018 80F84330 		strb	r3, [r0, #67]
1554 
 757              		.loc 1 291 3 is_stmt 1 view .LVU217
 1855 
 142:Core/Src/main.c ****       | BME280_FILTER_SEL;
1555 
 291:Core/Src/main.c ****   if (HAL_I2C_Init(&hi2c2) != HAL_OK)
 1856 
 935              		.loc 1 142 3 is_stmt 1 view .LVU274
1556 
 758              		.loc 1 291 28 is_stmt 0 view .LVU218
 1857 
 936              	.LVL42:
1557 
 759 001e 0362     		str	r3, [r0, #32]
 1858 
 146:Core/Src/main.c ****   if (rslt != BME280_OK)
1558 
 292:Core/Src/main.c ****   {
 1859 
 937              		.loc 1 146 3 view .LVU275
1559 
 760              		.loc 1 292 3 is_stmt 1 view .LVU219
 1860 
 146:Core/Src/main.c ****   if (rslt != BME280_OK)
1560 
 292:Core/Src/main.c ****   {
 1861 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 32
1561 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 27
 1862 
 
1562 
 
 1863 
 
1563 
 
 1864 
 938              		.loc 1 146 10 is_stmt 0 view .LVU276
1564 
 761              		.loc 1 292 7 is_stmt 0 view .LVU220
 1865 
 939 001c 0146     		mov	r1, r0
1565 
 762 0020 FFF7FEFF 		bl	HAL_I2C_Init
 1866 
 940 001e 0F20     		movs	r0, #15
1566 
 763              	.LVL32:
 1867 
 941              	.LVL43:
1567 
 300:Core/Src/main.c ****
1868 
 146:Core/Src/main.c ****   if (rslt != BME280_OK)
1568 
 764              		.loc 1 300 1 view .LVU221
 1869 
 942              		.loc 1 146 10 view .LVU277
1569 
 765 0024 08BD     		pop	{r3, pc}
 1870 
 943 0020 FFF7FEFF 		bl	bme280_set_sensor_settings
1570 
 766              	.L40:
 1871 
 944              	.LVL44:
1571 
 767 0026 00BF     		.align	2
 1872 
 147:Core/Src/main.c ****     {
1572 
 768              	.L39:
 1873 
 945              		.loc 1 147 3 is_stmt 1 view .LVU278
1573 
 769 0028 00000000 		.word	hi2c2
 1874 
 147:Core/Src/main.c ****     {
1574 
 770 002c 00580040 		.word	1073764352
 1875 
 946              		.loc 1 147 6 is_stmt 0 view .LVU279
1575 
 771 0030 A0860100 		.word	100000
 1876 
 947 0024 0346     		mov	r3, r0
1576 
 772              		.cfi_endproc
 1877 
 948 0026 08B1     		cbz	r0, .L50
1577 
 773              	.LFE73:
 1878 
 949              	.LVL45:
1578 
 775              		.section	.text.MX_RTC_Init,"ax",%progbits
 1879 
 950              	.L48:
1579 
 776              		.align	1
 1880 
 166:Core/Src/main.c **** /* USER CODE END PFP */
1580 
 777              		.syntax unified
 1881 
 951              		.loc 1 166 1 view .LVU280
1581 
 778              		.thumb
 1882 
 952 0028 1846     		mov	r0, r3
1582 
 779              		.thumb_func
 1883 
 953 002a 10BD     		pop	{r4, pc}
1583 
 780              		.fpu softvfp
 1884 
 954              	.LVL46:
1584 
 782              	MX_RTC_Init:
 1885 
 955              	.L50:
1585 
 783              	.LFB74:
 1886 
 156:Core/Src/main.c ****
1586 
 308:Core/Src/main.c ****
1887 
 956              		.loc 1 156 3 is_stmt 1 view .LVU281
1587 
 784              		.loc 1 308 1 is_stmt 1 view -0
 1888 
 156:Core/Src/main.c ****
1588 
 785              		.cfi_startproc
 1889 
 957              		.loc 1 156 15 is_stmt 0 view .LVU282
1589 
 786              		@ args = 0, pretend = 0, frame = 8
 1890 
 958 002c 04F14000 		add	r0, r4, #64
1590 
 787              		@ frame_needed = 0, uses_anonymous_args = 0
 1891 
 959              	.LVL47:
1591 
 788 0000 30B5     		push	{r4, r5, lr}
 1892 
 156:Core/Src/main.c ****
1592 
 789              	.LCFI21:
 1893 
 960              		.loc 1 156 15 view .LVU283
1593 
 790              		.cfi_def_cfa_offset 12
 1894 
 961 0030 FFF7FEFF 		bl	bme280_cal_meas_delay
1594 
 791              		.cfi_offset 4, -12
 1895 
 962              	.LVL48:
1595 
 792              		.cfi_offset 5, -8
 1896 
 156:Core/Src/main.c ****
1596 
 793              		.cfi_offset 14, -4
 1897 
 963              		.loc 1 156 13 view .LVU284
1597 
 794 0002 83B0     		sub	sp, sp, #12
 1898 
 964 0034 034B     		ldr	r3, .L51
1598 
 795              	.LCFI22:
 1899 
 965 0036 1860     		str	r0, [r3]
1599 
 796              		.cfi_def_cfa_offset 24
 1900 
 159:Core/Src/main.c ****   if (rslt != BME280_OK)
1600 
 314:Core/Src/main.c ****   RTC_DateTypeDef DateToUpdate = {0};
 1901 
 966              		.loc 1 159 3 is_stmt 1 view .LVU285
1601 
 797              		.loc 1 314 3 view .LVU223
 1902 
 159:Core/Src/main.c ****   if (rslt != BME280_OK)
1602 
 314:Core/Src/main.c ****   RTC_DateTypeDef DateToUpdate = {0};
 1903 
 967              		.loc 1 159 10 is_stmt 0 view .LVU286
1603 
 798              		.loc 1 314 19 is_stmt 0 view .LVU224
 1904 
 968 0038 2146     		mov	r1, r4
1604 
 799 0004 0024     		movs	r4, #0
 1905 
 969 003a 0120     		movs	r0, #1
1605 
 800 0006 ADF80440 		strh	r4, [sp, #4]	@ movhi
 1906 
 970 003c FFF7FEFF 		bl	bme280_set_sensor_mode
1606 
 801 000a 8DF80640 		strb	r4, [sp, #6]
 1907 
 971              	.LVL49:
1607 
 315:Core/Src/main.c ****
1908 
 972 0040 0346     		mov	r3, r0
1608 
 802              		.loc 1 315 3 is_stmt 1 view .LVU225
 1909 
 973              	.LVL50:
1609 
 315:Core/Src/main.c ****
1910 
 160:Core/Src/main.c ****     {
1610 
 803              		.loc 1 315 19 is_stmt 0 view .LVU226
 1911 
 974              		.loc 1 160 3 is_stmt 1 view .LVU287
1611 
 804 000e 0094     		str	r4, [sp]
 1912 
 975 0042 F1E7     		b	.L48
1612 
 322:Core/Src/main.c ****   hrtc.Init.AsynchPrediv = RTC_AUTO_1_SECOND;
 1913 
 976              	.L52:
1613 
 805              		.loc 1 322 3 is_stmt 1 view .LVU227
 1914 
 977              		.align	2
1614 
 322:Core/Src/main.c ****   hrtc.Init.AsynchPrediv = RTC_AUTO_1_SECOND;
 1915 
 978              	.L51:
1615 
 806              		.loc 1 322 17 is_stmt 0 view .LVU228
 1916 
 979 0044 00000000 		.word	req_delay
1616 
 807 0010 124D     		ldr	r5, .L43
 1917 
 980              		.cfi_endproc
1617 
 808 0012 134B     		ldr	r3, .L43+4
 1918 
 981              	.LFE71:
1618 
 809 0014 2B60     		str	r3, [r5]
 1919 
 983              		.section	.text.SystemClock_Config,"ax",%progbits
1619 
 323:Core/Src/main.c ****   hrtc.Init.OutPut = RTC_OUTPUTSOURCE_ALARM;
 1920 
 984              		.align	1
1620 
 810              		.loc 1 323 3 is_stmt 1 view .LVU229
 1921 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 33
1621 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 28
 1922 
 
1622 
 
 1923 
 
1623 
 
 1924 
 985              		.global	SystemClock_Config
1624 
 323:Core/Src/main.c ****   hrtc.Init.OutPut = RTC_OUTPUTSOURCE_ALARM;
 1925 
 986              		.syntax unified
1625 
 811              		.loc 1 323 26 is_stmt 0 view .LVU230
 1926 
 987              		.thumb
1626 
 812 0016 4FF0FF33 		mov	r3, #-1
 1927 
 988              		.thumb_func
1627 
 813 001a 6B60     		str	r3, [r5, #4]
 1928 
 989              		.fpu softvfp
1628 
 324:Core/Src/main.c ****   if (HAL_RTC_Init(&hrtc) != HAL_OK)
 1929 
 991              	SystemClock_Config:
1629 
 814              		.loc 1 324 3 is_stmt 1 view .LVU231
 1930 
 992              	.LFB73:
1630 
 324:Core/Src/main.c ****   if (HAL_RTC_Init(&hrtc) != HAL_OK)
 1931 
 285:Core/Src/main.c ****   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
1631 
 815              		.loc 1 324 20 is_stmt 0 view .LVU232
 1932 
 993              		.loc 1 285 1 view -0
1632 
 816 001c 4FF48073 		mov	r3, #256
 1933 
 994              		.cfi_startproc
1633 
 817 0020 AB60     		str	r3, [r5, #8]
 1934 
 995              		@ args = 0, pretend = 0, frame = 80
1634 
 325:Core/Src/main.c ****   {
 1935 
 996              		@ frame_needed = 0, uses_anonymous_args = 0
1635 
 818              		.loc 1 325 3 is_stmt 1 view .LVU233
 1936 
 997 0000 30B5     		push	{r4, r5, lr}
1636 
 325:Core/Src/main.c ****   {
 1937 
 998              	.LCFI25:
1637 
 819              		.loc 1 325 7 is_stmt 0 view .LVU234
 1938 
 999              		.cfi_def_cfa_offset 12
1638 
 820 0022 2846     		mov	r0, r5
 1939 
 1000              		.cfi_offset 4, -12
1639 
 821 0024 FFF7FEFF 		bl	HAL_RTC_Init
 1940 
 1001              		.cfi_offset 5, -8
1640 
 822              	.LVL33:
 1941 
 1002              		.cfi_offset 14, -4
1641 
 336:Core/Src/main.c ****   sTime.Minutes = 0x0;
 1942 
 1003 0002 95B0     		sub	sp, sp, #84
1642 
 823              		.loc 1 336 3 is_stmt 1 view .LVU235
 1943 
 1004              	.LCFI26:
1643 
 336:Core/Src/main.c ****   sTime.Minutes = 0x0;
 1944 
 1005              		.cfi_def_cfa_offset 96
1644 
 824              		.loc 1 336 15 is_stmt 0 view .LVU236
 1945 
 286:Core/Src/main.c ****   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
1645 
 825 0028 8DF80440 		strb	r4, [sp, #4]
 1946 
 1006              		.loc 1 286 3 view .LVU289
1646 
 337:Core/Src/main.c ****   sTime.Seconds = 0x0;
 1947 
 286:Core/Src/main.c ****   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
1647 
 826              		.loc 1 337 3 is_stmt 1 view .LVU237
 1948 
 1007              		.loc 1 286 22 is_stmt 0 view .LVU290
1648 
 337:Core/Src/main.c ****   sTime.Seconds = 0x0;
 1949 
 1008 0004 0024     		movs	r4, #0
1649 
 827              		.loc 1 337 17 is_stmt 0 view .LVU238
 1950 
 1009 0006 0C94     		str	r4, [sp, #48]
1650 
 828 002c 8DF80540 		strb	r4, [sp, #5]
 1951 
 1010 0008 0F94     		str	r4, [sp, #60]
1651 
 338:Core/Src/main.c ****
1952 
 1011 000a 1094     		str	r4, [sp, #64]
1652 
 829              		.loc 1 338 3 is_stmt 1 view .LVU239
 1953 
 287:Core/Src/main.c ****   RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
1653 
 338:Core/Src/main.c ****
1954 
 1012              		.loc 1 287 3 is_stmt 1 view .LVU291
1654 
 830              		.loc 1 338 17 is_stmt 0 view .LVU240
 1955 
 287:Core/Src/main.c ****   RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
1655 
 831 0030 8DF80640 		strb	r4, [sp, #6]
 1956 
 1013              		.loc 1 287 22 is_stmt 0 view .LVU292
1656 
 340:Core/Src/main.c ****   {
 1957 
 1014 000c 0594     		str	r4, [sp, #20]
1657 
 832              		.loc 1 340 3 is_stmt 1 view .LVU241
 1958 
 1015 000e 0694     		str	r4, [sp, #24]
1658 
 340:Core/Src/main.c ****   {
 1959 
 1016 0010 0794     		str	r4, [sp, #28]
1659 
 833              		.loc 1 340 7 is_stmt 0 view .LVU242
 1960 
 1017 0012 0894     		str	r4, [sp, #32]
1660 
 834 0034 0122     		movs	r2, #1
 1961 
 1018 0014 0994     		str	r4, [sp, #36]
1661 
 835 0036 01A9     		add	r1, sp, #4
 1962 
 288:Core/Src/main.c ****
1662 
 836 0038 2846     		mov	r0, r5
 1963 
 1019              		.loc 1 288 3 is_stmt 1 view .LVU293
1663 
 837 003a FFF7FEFF 		bl	HAL_RTC_SetTime
 1964 
 288:Core/Src/main.c ****
1664 
 838              	.LVL34:
 1965 
 1020              		.loc 1 288 28 is_stmt 0 view .LVU294
1665 
 344:Core/Src/main.c ****   DateToUpdate.Month = RTC_MONTH_JANUARY;
 1966 
 1021 0016 0194     		str	r4, [sp, #4]
1666 
 839              		.loc 1 344 3 is_stmt 1 view .LVU243
 1967 
 1022 0018 0294     		str	r4, [sp, #8]
1667 
 344:Core/Src/main.c ****   DateToUpdate.Month = RTC_MONTH_JANUARY;
 1968 
 1023 001a 0394     		str	r4, [sp, #12]
1668 
 840              		.loc 1 344 24 is_stmt 0 view .LVU244
 1969 
 1024 001c 0494     		str	r4, [sp, #16]
1669 
 841 003e 0122     		movs	r2, #1
 1970 
 293:Core/Src/main.c ****   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
1670 
 842 0040 8DF80020 		strb	r2, [sp]
 1971 
 1025              		.loc 1 293 3 is_stmt 1 view .LVU295
1671 
 345:Core/Src/main.c ****   DateToUpdate.Date = 0x1;
 1972 
 293:Core/Src/main.c ****   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
1672 
 843              		.loc 1 345 3 is_stmt 1 view .LVU245
 1973 
 1026              		.loc 1 293 36 is_stmt 0 view .LVU296
1673 
 345:Core/Src/main.c ****   DateToUpdate.Date = 0x1;
 1974 
 1027 001e 0523     		movs	r3, #5
1674 
 844              		.loc 1 345 22 is_stmt 0 view .LVU246
 1975 
 1028 0020 0A93     		str	r3, [sp, #40]
1675 
 845 0044 8DF80120 		strb	r2, [sp, #1]
 1976 
 294:Core/Src/main.c ****   RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
1676 
 346:Core/Src/main.c ****   DateToUpdate.Year = 0x0;
 1977 
 1029              		.loc 1 294 3 is_stmt 1 view .LVU297
1677 
 846              		.loc 1 346 3 is_stmt 1 view .LVU247
 1978 
 294:Core/Src/main.c ****   RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
1678 
 346:Core/Src/main.c ****   DateToUpdate.Year = 0x0;
 1979 
 1030              		.loc 1 294 30 is_stmt 0 view .LVU298
1679 
 847              		.loc 1 346 21 is_stmt 0 view .LVU248
 1980 
 1031 0022 4FF48033 		mov	r3, #65536
1680 
 848 0048 8DF80220 		strb	r2, [sp, #2]
 1981 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 34
1681 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 29
 1982 
 
1682 
 
 1983 
 
1683 
 
 1984 
 1032 0026 0B93     		str	r3, [sp, #44]
1684 
 347:Core/Src/main.c ****
1985 
 295:Core/Src/main.c ****   RCC_OscInitStruct.LSEState = RCC_LSE_ON;
1685 
 849              		.loc 1 347 3 is_stmt 1 view .LVU249
 1986 
 1033              		.loc 1 295 3 is_stmt 1 view .LVU299
1686 
 347:Core/Src/main.c ****
1987 
 296:Core/Src/main.c ****   RCC_OscInitStruct.HSIState = RCC_HSI_ON;
1687 
 850              		.loc 1 347 21 is_stmt 0 view .LVU250
 1988 
 1034              		.loc 1 296 3 view .LVU300
1688 
 851 004c 8DF80340 		strb	r4, [sp, #3]
 1989 
 296:Core/Src/main.c ****   RCC_OscInitStruct.HSIState = RCC_HSI_ON;
1689 
 349:Core/Src/main.c ****   {
 1990 
 1035              		.loc 1 296 30 is_stmt 0 view .LVU301
1690 
 852              		.loc 1 349 3 is_stmt 1 view .LVU251
 1991 
 1036 0028 0122     		movs	r2, #1
1691 
 349:Core/Src/main.c ****   {
 1992 
 1037 002a 0D92     		str	r2, [sp, #52]
1692 
 853              		.loc 1 349 7 is_stmt 0 view .LVU252
 1993 
 297:Core/Src/main.c ****   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
1693 
 854 0050 6946     		mov	r1, sp
 1994 
 1038              		.loc 1 297 3 is_stmt 1 view .LVU302
1694 
 855 0052 2846     		mov	r0, r5
 1995 
 297:Core/Src/main.c ****   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
1695 
 856 0054 FFF7FEFF 		bl	HAL_RTC_SetDate
 1996 
 1039              		.loc 1 297 30 is_stmt 0 view .LVU303
1696 
 857              	.LVL35:
 1997 
 1040 002c 0E92     		str	r2, [sp, #56]
1697 
 357:Core/Src/main.c ****
1998 
 298:Core/Src/main.c ****   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
1698 
 858              		.loc 1 357 1 view .LVU253
 1999 
 1041              		.loc 1 298 3 is_stmt 1 view .LVU304
1699 
 859 0058 03B0     		add	sp, sp, #12
 2000 
 298:Core/Src/main.c ****   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
1700 
 860              	.LCFI23:
 2001 
 1042              		.loc 1 298 34 is_stmt 0 view .LVU305
1701 
 861              		.cfi_def_cfa_offset 12
 2002 
 1043 002e 0225     		movs	r5, #2
1702 
 862              		@ sp needed
 2003 
 1044 0030 1195     		str	r5, [sp, #68]
1703 
 863 005a 30BD     		pop	{r4, r5, pc}
 2004 
 299:Core/Src/main.c ****   RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
1704 
 864              	.L44:
 2005 
 1045              		.loc 1 299 3 is_stmt 1 view .LVU306
1705 
 865              		.align	2
 2006 
 299:Core/Src/main.c ****   RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
1706 
 866              	.L43:
 2007 
 1046              		.loc 1 299 35 is_stmt 0 view .LVU307
1707 
 867 005c 00000000 		.word	hrtc
 2008 
 1047 0032 1293     		str	r3, [sp, #72]
1708 
 868 0060 00280040 		.word	1073752064
 2009 
 300:Core/Src/main.c ****   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
1709 
 869              		.cfi_endproc
 2010 
 1048              		.loc 1 300 3 is_stmt 1 view .LVU308
1710 
 870              	.LFE74:
 2011 
 300:Core/Src/main.c ****   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
1711 
 872              		.section	.text.SystemClock_Config,"ax",%progbits
 2012 
 1049              		.loc 1 300 32 is_stmt 0 view .LVU309
1712 
 873              		.align	1
 2013 
 1050 0034 4FF4E013 		mov	r3, #1835008
1713 
 874              		.global	SystemClock_Config
 2014 
 1051 0038 1393     		str	r3, [sp, #76]
1714 
 875              		.syntax unified
 2015 
 301:Core/Src/main.c ****   {
1715 
 876              		.thumb
 2016 
 1052              		.loc 1 301 3 is_stmt 1 view .LVU310
1716 
 877              		.thumb_func
 2017 
 301:Core/Src/main.c ****   {
1717 
 878              		.fpu softvfp
 2018 
 1053              		.loc 1 301 7 is_stmt 0 view .LVU311
1718 
 880              	SystemClock_Config:
 2019 
 1054 003a 0AA8     		add	r0, sp, #40
1719 
 881              	.LFB72:
 2020 
 1055 003c FFF7FEFF 		bl	HAL_RCC_OscConfig
1720 
 226:Core/Src/main.c ****   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 2021 
 1056              	.LVL51:
1721 
 882              		.loc 1 226 1 is_stmt 1 view -0
 2022 
 307:Core/Src/main.c ****                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
1722 
 883              		.cfi_startproc
 2023 
 1057              		.loc 1 307 3 is_stmt 1 view .LVU312
1723 
 884              		@ args = 0, pretend = 0, frame = 80
 2024 
 307:Core/Src/main.c ****                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
1724 
 885              		@ frame_needed = 0, uses_anonymous_args = 0
 2025 
 1058              		.loc 1 307 31 is_stmt 0 view .LVU313
1725 
 886 0000 30B5     		push	{r4, r5, lr}
 2026 
 1059 0040 0F23     		movs	r3, #15
1726 
 887              	.LCFI24:
 2027 
 1060 0042 0593     		str	r3, [sp, #20]
1727 
 888              		.cfi_def_cfa_offset 12
 2028 
 309:Core/Src/main.c ****   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
1728 
 889              		.cfi_offset 4, -12
 2029 
 1061              		.loc 1 309 3 is_stmt 1 view .LVU314
1729 
 890              		.cfi_offset 5, -8
 2030 
 309:Core/Src/main.c ****   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
1730 
 891              		.cfi_offset 14, -4
 2031 
 1062              		.loc 1 309 34 is_stmt 0 view .LVU315
1731 
 892 0002 95B0     		sub	sp, sp, #84
 2032 
 1063 0044 0695     		str	r5, [sp, #24]
1732 
 893              	.LCFI25:
 2033 
 310:Core/Src/main.c ****   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
1733 
 894              		.cfi_def_cfa_offset 96
 2034 
 1064              		.loc 1 310 3 is_stmt 1 view .LVU316
1734 
 227:Core/Src/main.c ****   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 2035 
 310:Core/Src/main.c ****   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
1735 
 895              		.loc 1 227 3 view .LVU255
 2036 
 1065              		.loc 1 310 35 is_stmt 0 view .LVU317
1736 
 227:Core/Src/main.c ****   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 2037 
 1066 0046 0794     		str	r4, [sp, #28]
1737 
 896              		.loc 1 227 22 is_stmt 0 view .LVU256
 2038 
 311:Core/Src/main.c ****   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
1738 
 897 0004 0024     		movs	r4, #0
 2039 
 1067              		.loc 1 311 3 is_stmt 1 view .LVU318
1739 
 898 0006 0C94     		str	r4, [sp, #48]
 2040 
 311:Core/Src/main.c ****   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
1740 
 899 0008 0F94     		str	r4, [sp, #60]
 2041 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 35
1741 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 30
 2042 
 
1742 
 
 2043 
 
1743 
 
 2044 
 1068              		.loc 1 311 36 is_stmt 0 view .LVU319
1744 
 900 000a 1094     		str	r4, [sp, #64]
 2045 
 1069 0048 4FF48063 		mov	r3, #1024
1745 
 228:Core/Src/main.c ****   RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
 2046 
 1070 004c 0893     		str	r3, [sp, #32]
1746 
 901              		.loc 1 228 3 is_stmt 1 view .LVU257
 2047 
 312:Core/Src/main.c ****
1747 
 228:Core/Src/main.c ****   RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
 2048 
 1071              		.loc 1 312 3 is_stmt 1 view .LVU320
1748 
 902              		.loc 1 228 22 is_stmt 0 view .LVU258
 2049 
 312:Core/Src/main.c ****
1749 
 903 000c 0594     		str	r4, [sp, #20]
 2050 
 1072              		.loc 1 312 36 is_stmt 0 view .LVU321
1750 
 904 000e 0694     		str	r4, [sp, #24]
 2051 
 1073 004e 0994     		str	r4, [sp, #36]
1751 
 905 0010 0794     		str	r4, [sp, #28]
 2052 
 314:Core/Src/main.c ****   {
1752 
 906 0012 0894     		str	r4, [sp, #32]
 2053 
 1074              		.loc 1 314 3 is_stmt 1 view .LVU322
1753 
 907 0014 0994     		str	r4, [sp, #36]
 2054 
 314:Core/Src/main.c ****   {
1754 
 229:Core/Src/main.c ****
2055 
 1075              		.loc 1 314 7 is_stmt 0 view .LVU323
1755 
 908              		.loc 1 229 3 is_stmt 1 view .LVU259
 2056 
 1076 0050 2946     		mov	r1, r5
1756 
 229:Core/Src/main.c ****
2057 
 1077 0052 05A8     		add	r0, sp, #20
1757 
 909              		.loc 1 229 28 is_stmt 0 view .LVU260
 2058 
 1078 0054 FFF7FEFF 		bl	HAL_RCC_ClockConfig
1758 
 910 0016 0194     		str	r4, [sp, #4]
 2059 
 1079              	.LVL52:
1759 
 911 0018 0294     		str	r4, [sp, #8]
 2060 
 318:Core/Src/main.c ****   PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
1760 
 912 001a 0394     		str	r4, [sp, #12]
 2061 
 1080              		.loc 1 318 3 is_stmt 1 view .LVU324
1761 
 913 001c 0494     		str	r4, [sp, #16]
 2062 
 318:Core/Src/main.c ****   PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
1762 
 234:Core/Src/main.c ****   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
 2063 
 1081              		.loc 1 318 38 is_stmt 0 view .LVU325
1763 
 914              		.loc 1 234 3 is_stmt 1 view .LVU261
 2064 
 1082 0058 1123     		movs	r3, #17
1764 
 234:Core/Src/main.c ****   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
 2065 
 1083 005a 0193     		str	r3, [sp, #4]
1765 
 915              		.loc 1 234 36 is_stmt 0 view .LVU262
 2066 
 319:Core/Src/main.c ****   PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
1766 
 916 001e 0523     		movs	r3, #5
 2067 
 1084              		.loc 1 319 3 is_stmt 1 view .LVU326
1767 
 917 0020 0A93     		str	r3, [sp, #40]
 2068 
 319:Core/Src/main.c ****   PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
1768 
 235:Core/Src/main.c ****   RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
 2069 
 1085              		.loc 1 319 35 is_stmt 0 view .LVU327
1769 
 918              		.loc 1 235 3 is_stmt 1 view .LVU263
 2070 
 1086 005c 4FF48073 		mov	r3, #256
1770 
 235:Core/Src/main.c ****   RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
 2071 
 1087 0060 0293     		str	r3, [sp, #8]
1771 
 919              		.loc 1 235 30 is_stmt 0 view .LVU264
 2072 
 320:Core/Src/main.c ****   if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
1772 
 920 0022 4FF48033 		mov	r3, #65536
 2073 
 1088              		.loc 1 320 3 is_stmt 1 view .LVU328
1773 
 921 0026 0B93     		str	r3, [sp, #44]
 2074 
 320:Core/Src/main.c ****   if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
1774 
 236:Core/Src/main.c ****   RCC_OscInitStruct.LSEState = RCC_LSE_ON;
 2075 
 1089              		.loc 1 320 35 is_stmt 0 view .LVU329
1775 
 922              		.loc 1 236 3 is_stmt 1 view .LVU265
 2076 
 1090 0062 0494     		str	r4, [sp, #16]
1776 
 237:Core/Src/main.c ****   RCC_OscInitStruct.HSIState = RCC_HSI_ON;
 2077 
 321:Core/Src/main.c ****   {
1777 
 923              		.loc 1 237 3 view .LVU266
 2078 
 1091              		.loc 1 321 3 is_stmt 1 view .LVU330
1778 
 237:Core/Src/main.c ****   RCC_OscInitStruct.HSIState = RCC_HSI_ON;
 2079 
 321:Core/Src/main.c ****   {
1779 
 924              		.loc 1 237 30 is_stmt 0 view .LVU267
 2080 
 1092              		.loc 1 321 7 is_stmt 0 view .LVU331
1780 
 925 0028 0122     		movs	r2, #1
 2081 
 1093 0064 01A8     		add	r0, sp, #4
1781 
 926 002a 0D92     		str	r2, [sp, #52]
 2082 
 1094 0066 FFF7FEFF 		bl	HAL_RCCEx_PeriphCLKConfig
1782 
 238:Core/Src/main.c ****   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 2083 
 1095              	.LVL53:
1783 
 927              		.loc 1 238 3 is_stmt 1 view .LVU268
 2084 
 325:Core/Src/main.c ****
1784 
 238:Core/Src/main.c ****   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 2085 
 1096              		.loc 1 325 1 view .LVU332
1785 
 928              		.loc 1 238 30 is_stmt 0 view .LVU269
 2086 
 1097 006a 15B0     		add	sp, sp, #84
1786 
 929 002c 0E92     		str	r2, [sp, #56]
 2087 
 1098              	.LCFI27:
1787 
 239:Core/Src/main.c ****   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
 2088 
 1099              		.cfi_def_cfa_offset 12
1788 
 930              		.loc 1 239 3 is_stmt 1 view .LVU270
 2089 
 1100              		@ sp needed
1789 
 239:Core/Src/main.c ****   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
 2090 
 1101 006c 30BD     		pop	{r4, r5, pc}
1790 
 931              		.loc 1 239 34 is_stmt 0 view .LVU271
 2091 
 1102              		.cfi_endproc
1791 
 932 002e 0225     		movs	r5, #2
 2092 
 1103              	.LFE73:
1792 
 933 0030 1195     		str	r5, [sp, #68]
 2093 
 1105              		.section	.text.main,"ax",%progbits
1793 
 240:Core/Src/main.c ****   RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
 2094 
 1106              		.align	1
1794 
 934              		.loc 1 240 3 is_stmt 1 view .LVU272
 2095 
 1107              		.global	main
1795 
 240:Core/Src/main.c ****   RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
 2096 
 1108              		.syntax unified
1796 
 935              		.loc 1 240 35 is_stmt 0 view .LVU273
 2097 
 1109              		.thumb
1797 
 936 0032 1293     		str	r3, [sp, #72]
 2098 
 1110              		.thumb_func
1798 
 241:Core/Src/main.c ****   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 2099 
 1111              		.fpu softvfp
1799 
 937              		.loc 1 241 3 is_stmt 1 view .LVU274
 2100 
 1113              	main:
1800 
 241:Core/Src/main.c ****   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 2101 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 36
1801 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 31
 2102 
 
1802 
 
 2103 
 
1803 
 
 2104 
 1114              	.LFB72:
1804 
 938              		.loc 1 241 32 is_stmt 0 view .LVU275
 2105 
 179:Core/Src/main.c ****   /* USER CODE BEGIN 1 */
1805 
 939 0034 4FF4E013 		mov	r3, #1835008
 2106 
 1115              		.loc 1 179 1 is_stmt 1 view -0
1806 
 940 0038 1393     		str	r3, [sp, #76]
 2107 
 1116              		.cfi_startproc
1807 
 242:Core/Src/main.c ****   {
 2108 
 1117              		@ args = 0, pretend = 0, frame = 80
1808 
 941              		.loc 1 242 3 is_stmt 1 view .LVU276
 2109 
 1118              		@ frame_needed = 0, uses_anonymous_args = 0
1809 
 242:Core/Src/main.c ****   {
 2110 
 1119 0000 10B5     		push	{r4, lr}
1810 
 942              		.loc 1 242 7 is_stmt 0 view .LVU277
 2111 
 1120              	.LCFI28:
1811 
 943 003a 0AA8     		add	r0, sp, #40
 2112 
 1121              		.cfi_def_cfa_offset 8
1812 
 944 003c FFF7FEFF 		bl	HAL_RCC_OscConfig
 2113 
 1122              		.cfi_offset 4, -8
1813 
 945              	.LVL36:
 2114 
 1123              		.cfi_offset 14, -4
1814 
 248:Core/Src/main.c ****                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
 2115 
 1124 0002 94B0     		sub	sp, sp, #80
1815 
 946              		.loc 1 248 3 is_stmt 1 view .LVU278
 2116 
 1125              	.LCFI29:
1816 
 248:Core/Src/main.c ****                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
 2117 
 1126              		.cfi_def_cfa_offset 88
1817 
 947              		.loc 1 248 31 is_stmt 0 view .LVU279
 - 
 
1818 
 948 0040 0F23     		movs	r3, #15
 - 
 
1819 
 949 0042 0593     		str	r3, [sp, #20]
 - 
 
1820 
 250:Core/Src/main.c ****   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 - 
 
1821 
 950              		.loc 1 250 3 is_stmt 1 view .LVU280
 - 
 
1822 
 250:Core/Src/main.c ****   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 - 
 
1823 
 951              		.loc 1 250 34 is_stmt 0 view .LVU281
 - 
 
1824 
 952 0044 0695     		str	r5, [sp, #24]
 - 
 
1825 
 251:Core/Src/main.c ****   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
 - 
 
1826 
 953              		.loc 1 251 3 is_stmt 1 view .LVU282
 - 
 
1827 
 251:Core/Src/main.c ****   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
 - 
 
1828 
 954              		.loc 1 251 35 is_stmt 0 view .LVU283
 - 
 
1829 
 955 0046 0794     		str	r4, [sp, #28]
 - 
 
1830 
 252:Core/Src/main.c ****   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 - 
 
1831 
 956              		.loc 1 252 3 is_stmt 1 view .LVU284
 - 
 
1832 
 252:Core/Src/main.c ****   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 - 
 
1833 
 957              		.loc 1 252 36 is_stmt 0 view .LVU285
 - 
 
1834 
 958 0048 4FF48063 		mov	r3, #1024
 - 
 
1835 
 959 004c 0893     		str	r3, [sp, #32]
 - 
 
1836 
 253:Core/Src/main.c ****
- 
 
1837 
 960              		.loc 1 253 3 is_stmt 1 view .LVU286
 - 
 
1838 
 253:Core/Src/main.c ****
- 
 
1839 
 961              		.loc 1 253 36 is_stmt 0 view .LVU287
 - 
 
1840 
 962 004e 0994     		str	r4, [sp, #36]
 - 
 
1841 
 255:Core/Src/main.c ****   {
 - 
 
1842 
 963              		.loc 1 255 3 is_stmt 1 view .LVU288
 - 
 
1843 
 255:Core/Src/main.c ****   {
 - 
 
1844 
 964              		.loc 1 255 7 is_stmt 0 view .LVU289
 - 
 
1845 
 965 0050 2946     		mov	r1, r5
 - 
 
1846 
 966 0052 05A8     		add	r0, sp, #20
 - 
 
1847 
 967 0054 FFF7FEFF 		bl	HAL_RCC_ClockConfig
 - 
 
1848 
 968              	.LVL37:
 - 
 
1849 
 259:Core/Src/main.c ****   PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
 - 
 
1850 
 969              		.loc 1 259 3 is_stmt 1 view .LVU290
 - 
 
1851 
 259:Core/Src/main.c ****   PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
 - 
 
1852 
 970              		.loc 1 259 38 is_stmt 0 view .LVU291
 - 
 
1853 
 971 0058 1123     		movs	r3, #17
 - 
 
1854 
 972 005a 0193     		str	r3, [sp, #4]
 - 
 
1855 
 260:Core/Src/main.c ****   PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
 - 
 
1856 
 973              		.loc 1 260 3 is_stmt 1 view .LVU292
 - 
 
1857 
 260:Core/Src/main.c ****   PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
 - 
 
1858 
 974              		.loc 1 260 35 is_stmt 0 view .LVU293
 - 
 
1859 
 975 005c 4FF48073 		mov	r3, #256
 - 
 
1860 
 976 0060 0293     		str	r3, [sp, #8]
 - 
 
1861 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 32
 - 
 
1862 
 
 - 
 
1863 
 
 - 
 
1864 
 261:Core/Src/main.c ****   if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
 - 
 
1865 
 977              		.loc 1 261 3 is_stmt 1 view .LVU294
 - 
 
1866 
 261:Core/Src/main.c ****   if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
 - 
 
1867 
 978              		.loc 1 261 35 is_stmt 0 view .LVU295
 - 
 
1868 
 979 0062 0494     		str	r4, [sp, #16]
 - 
 
1869 
 262:Core/Src/main.c ****   {
 - 
 
1870 
 980              		.loc 1 262 3 is_stmt 1 view .LVU296
 - 
 
1871 
 262:Core/Src/main.c ****   {
 - 
 
1872 
 981              		.loc 1 262 7 is_stmt 0 view .LVU297
 - 
 
1873 
 982 0064 01A8     		add	r0, sp, #4
 - 
 
1874 
 983 0066 FFF7FEFF 		bl	HAL_RCCEx_PeriphCLKConfig
 - 
 
1875 
 984              	.LVL38:
 - 
 
1876 
 266:Core/Src/main.c ****
- 
 
1877 
 985              		.loc 1 266 1 view .LVU298
 - 
 
1878 
 986 006a 15B0     		add	sp, sp, #84
 - 
 
1879 
 987              	.LCFI26:
 - 
 
1880 
 988              		.cfi_def_cfa_offset 12
 - 
 
1881 
 989              		@ sp needed
 - 
 
1882 
 990 006c 30BD     		pop	{r4, r5, pc}
 - 
 
1883 
 991              		.cfi_endproc
 - 
 
1884 
 992              	.LFE72:
 - 
 
1885 
 994              		.section	.text.main,"ax",%progbits
 - 
 
1886 
 995              		.align	1
 - 
 
1887 
 996              		.global	main
 - 
 
1888 
 997              		.syntax unified
 - 
 
1889 
 998              		.thumb
 - 
 
1890 
 999              		.thumb_func
 - 
 
1891 
 1000              		.fpu softvfp
 - 
 
1892 
 1002              	main:
 - 
 
1893 
 1003              	.LFB71:
 - 
 
1894 
 128:Core/Src/main.c ****   /* USER CODE BEGIN 1 */
 - 
 
1895 
 1004              		.loc 1 128 1 is_stmt 1 view -0
 - 
 
1896 
 1005              		.cfi_startproc
 - 
 
1897 
 1006              		@ Volatile: function does not return.
 - 
 
1898 
 1007              		@ args = 0, pretend = 0, frame = 0
 - 
 
1899 
 1008              		@ frame_needed = 0, uses_anonymous_args = 0
 - 
 
1900 
 1009 0000 80B5     		push	{r7, lr}
 - 
 
1901 
 1010              	.LCFI27:
 - 
 
1902 
 1011              		.cfi_def_cfa_offset 8
 - 
 
1903 
 1012              		.cfi_offset 7, -8
 - 
 
1904 
 1013              		.cfi_offset 14, -4
 - 
 
1905 
 136:Core/Src/main.c ****
- 
 
1906 
 1014              		.loc 1 136 3 view .LVU300
 - 
 
1907 
 1015 0002 FFF7FEFF 		bl	HAL_Init
 - 
 
1908 
 1016              	.LVL39:
 - 
 
1909 
 143:Core/Src/main.c ****
- 
 
1910 
 1017              		.loc 1 143 3 view .LVU301
 - 
 
1911 
 1018 0006 FFF7FEFF 		bl	SystemClock_Config
 - 
 
1912 
 1019              	.LVL40:
 - 
 
1913 
 150:Core/Src/main.c ****   MX_SPI1_Init();
 - 
 
1914 
 1020              		.loc 1 150 3 view .LVU302
 - 
 
1915 
 1021 000a FFF7FEFF 		bl	MX_GPIO_Init
 - 
 
1916 
 1022              	.LVL41:
 - 
 
1917 
 151:Core/Src/main.c ****   MX_TIM4_Init();
 - 
 
1918 
 1023              		.loc 1 151 3 view .LVU303
 - 
 
1919 
 1024 000e FFF7FEFF 		bl	MX_SPI1_Init
 - 
 
1920 
 1025              	.LVL42:
 - 
 
1921 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 33
 - 
 
1922 
 
 - 
 
1923 
 
 - 
 
1924 
 152:Core/Src/main.c ****   MX_USART1_UART_Init();
 - 
 
1925 
 1026              		.loc 1 152 3 view .LVU304
 - 
 
1926 
 1027 0012 FFF7FEFF 		bl	MX_TIM4_Init
 - 
 
1927 
 1028              	.LVL43:
 - 
 
1928 
 153:Core/Src/main.c ****   MX_TIM3_Init();
 - 
 
1929 
 1029              		.loc 1 153 3 view .LVU305
 - 
 
1930 
 1030 0016 FFF7FEFF 		bl	MX_USART1_UART_Init
 - 
 
1931 
 1031              	.LVL44:
 - 
 
1932 
 154:Core/Src/main.c ****   MX_I2C2_Init();
 - 
 
1933 
 1032              		.loc 1 154 3 view .LVU306
 - 
 
1934 
 1033 001a FFF7FEFF 		bl	MX_TIM3_Init
 - 
 
1935 
 1034              	.LVL45:
 - 
 
1936 
 155:Core/Src/main.c ****   MX_RTC_Init();
 - 
 
1937 
 1035              		.loc 1 155 3 view .LVU307
 - 
 
1938 
 1036 001e FFF7FEFF 		bl	MX_I2C2_Init
 - 
 
1939 
 1037              	.LVL46:
 - 
 
1940 
 156:Core/Src/main.c ****   MX_USB_DEVICE_Init();
 - 
 
1941 
 1038              		.loc 1 156 3 view .LVU308
 - 
 
1942 
 1039 0022 FFF7FEFF 		bl	MX_RTC_Init
 - 
 
1943 
 1040              	.LVL47:
 - 
 
1944 
 157:Core/Src/main.c ****   /* USER CODE BEGIN 2 */
 - 
 
1945 
 1041              		.loc 1 157 3 view .LVU309
 - 
 
1946 
 1042 0026 FFF7FEFF 		bl	MX_USB_DEVICE_Init
 - 
 
1947 
 1043              	.LVL48:
 - 
 
1948 
 160:Core/Src/main.c ****   HAL_Delay (1000);
 - 
 
1949 
 1044              		.loc 1 160 3 view .LVU310
 - 
 
1950 
 1045 002a 1E4C     		ldr	r4, .L50
 - 
 
1951 
 1046 002c 0022     		movs	r2, #0
 - 
 
1952 
 1047 002e 1021     		movs	r1, #16
 - 
 
1953 
 1048 0030 2046     		mov	r0, r4
 - 
 
1954 
 1049 0032 FFF7FEFF 		bl	HAL_GPIO_WritePin
 - 
 
1955 
 1050              	.LVL49:
 - 
 
1956 
 161:Core/Src/main.c ****   HAL_GPIO_WritePin ( USB_PULLUP_GPIO_Port, USB_PULLUP_Pin, GPIO_PIN_SET);
 - 
 
1957 
 1051              		.loc 1 161 3 view .LVU311
 - 
 
1958 
 1052 0036 4FF47A70 		mov	r0, #1000
 - 
 
1959 
 1053 003a FFF7FEFF 		bl	HAL_Delay
 - 
 
1960 
 1054              	.LVL50:
 - 
 
1961 
 162:Core/Src/main.c ****
- 
 
1962 
 1055              		.loc 1 162 3 view .LVU312
 - 
 
1963 
 1056 003e 0122     		movs	r2, #1
 - 
 
1964 
 1057 0040 1021     		movs	r1, #16
 - 
 
1965 
 1058 0042 2046     		mov	r0, r4
 - 
 
1966 
 1059 0044 FFF7FEFF 		bl	HAL_GPIO_WritePin
 - 
 
1967 
 1060              	.LVL51:
 - 
 
1968 
 165:Core/Src/main.c ****
- 
 
1969 
 1061              		.loc 1 165 3 view .LVU313
 - 
 
1970 
 1062 0048 174C     		ldr	r4, .L50+4
 - 
 
1971 
 1063 004a 1849     		ldr	r1, .L50+8
 - 
 
1972 
 1064 004c 2046     		mov	r0, r4
 - 
 
1973 
 1065 004e FFF7FEFF 		bl	init_usart_ctl
 - 
 
1974 
 1066              	.LVL52:
 - 
 
1975 
 167:Core/Src/main.c ****
- 
 
1976 
 1067              		.loc 1 167 3 view .LVU314
 - 
 
1977 
 1068 0052 2046     		mov	r0, r4
 - 
 
1978 
 1069 0054 FFF7FEFF 		bl	EnableSerialRxInterrupt
 - 
 
1979 
 1070              	.LVL53:
 - 
 
1980 
 171:Core/Src/main.c **** //  print_rslt(" bmp280_init status", rslt);
 - 
 
1981 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 34
 - 
 
1982 
 
 - 
 
1983 
 
 - 
 
1984 
 1071              		.loc 1 171 3 view .LVU315
 - 
 
1985 
 171:Core/Src/main.c **** //  print_rslt(" bmp280_init status", rslt);
 - 
 
1986 
 1072              		.loc 1 171 10 is_stmt 0 view .LVU316
 - 
 
1987 
 1073 0058 154E     		ldr	r6, .L50+12
 - 
 
1988 
 1074 005a 3046     		mov	r0, r6
 - 
 
1989 
 1075 005c FFF7FEFF 		bl	bmp280_init
 - 
 
1990 
 1076              	.LVL54:
 - 
 
1991 
 171:Core/Src/main.c **** //  print_rslt(" bmp280_init status", rslt);
 - 
 
1992 
 1077              		.loc 1 171 8 view .LVU317
 - 
 
1993 
 1078 0060 144D     		ldr	r5, .L50+16
 - 
 
1994 
 1079 0062 2870     		strb	r0, [r5]
 - 
 
1995 
 177:Core/Src/main.c ****  // print_rslt(" bmp280_get_config status", rslt);
 - 
 
1996 
 1080              		.loc 1 177 3 is_stmt 1 view .LVU318
 - 
 
1997 
 177:Core/Src/main.c ****  // print_rslt(" bmp280_get_config status", rslt);
 - 
 
1998 
 1081              		.loc 1 177 10 is_stmt 0 view .LVU319
 - 
 
1999 
 1082 0064 144C     		ldr	r4, .L50+20
 - 
 
2000 
 1083 0066 3146     		mov	r1, r6
 - 
 
2001 
 1084 0068 2046     		mov	r0, r4
 - 
 
2002 
 1085 006a FFF7FEFF 		bl	bmp280_get_config
 - 
 
2003 
 1086              	.LVL55:
 - 
 
2004 
 177:Core/Src/main.c ****  // print_rslt(" bmp280_get_config status", rslt);
 - 
 
2005 
 1087              		.loc 1 177 8 view .LVU320
 - 
 
2006 
 1088 006e 2870     		strb	r0, [r5]
 - 
 
2007 
 182:Core/Src/main.c ****
- 
 
2008 
 1089              		.loc 1 182 3 is_stmt 1 view .LVU321
 - 
 
2009 
 182:Core/Src/main.c ****
- 
 
2010 
 1090              		.loc 1 182 15 is_stmt 0 view .LVU322
 - 
 
2011 
 1091 0070 0123     		movs	r3, #1
 - 
 
2012 
 1092 0072 E370     		strb	r3, [r4, #3]
 - 
 
2013 
 185:Core/Src/main.c ****
- 
 
2014 
 1093              		.loc 1 185 3 is_stmt 1 view .LVU323
 - 
 
2015 
 185:Core/Src/main.c ****
- 
 
2016 
 1094              		.loc 1 185 16 is_stmt 0 view .LVU324
 - 
 
2017 
 1095 0074 0327     		movs	r7, #3
 - 
 
2018 
 1096 0076 2770     		strb	r7, [r4]
 - 
 
2019 
 188:Core/Src/main.c ****
- 
 
2020 
 1097              		.loc 1 188 3 is_stmt 1 view .LVU325
 - 
 
2021 
 188:Core/Src/main.c ****
2118 
 188:Core/Src/main.c ****
2022 
 1098              		.loc 1 188 16 is_stmt 0 view .LVU326
 2119 
 1127              		.loc 1 188 3 view .LVU334
2023 
 1099 0078 6770     		strb	r7, [r4, #1]
 2120 
 1128 0004 FFF7FEFF 		bl	HAL_Init
2024 
 191:Core/Src/main.c ****   rslt = bmp280_set_config(&conf, &bmp);
 2121 
 1129              	.LVL54:
2025 
 1100              		.loc 1 191 3 is_stmt 1 view .LVU327
 2122 
 195:Core/Src/main.c ****
2026 
 191:Core/Src/main.c ****   rslt = bmp280_set_config(&conf, &bmp);
 2123 
 1130              		.loc 1 195 3 view .LVU335
2027 
 1101              		.loc 1 191 12 is_stmt 0 view .LVU328
 2124 
 1131 0008 FFF7FEFF 		bl	SystemClock_Config
2028 
 1102 007a 0423     		movs	r3, #4
 2125 
 1132              	.LVL55:
2029 
 1103 007c A370     		strb	r3, [r4, #2]
 2126 
 202:Core/Src/main.c ****   MX_SPI1_Init();
2030 
 192:Core/Src/main.c ****   //print_rslt(" bmp280_set_config status", rslt);
 2127 
 1133              		.loc 1 202 3 view .LVU336
2031 
 1104              		.loc 1 192 3 is_stmt 1 view .LVU329
 2128 
 1134 000c FFF7FEFF 		bl	MX_GPIO_Init
2032 
 192:Core/Src/main.c ****   //print_rslt(" bmp280_set_config status", rslt);
 2129 
 1135              	.LVL56:
2033 
 1105              		.loc 1 192 10 is_stmt 0 view .LVU330
 2130 
 203:Core/Src/main.c ****   MX_TIM4_Init();
2034 
 1106 007e 3146     		mov	r1, r6
 2131 
 1136              		.loc 1 203 3 view .LVU337
2035 
 1107 0080 2046     		mov	r0, r4
 2132 
 1137 0010 FFF7FEFF 		bl	MX_SPI1_Init
2036 
 1108 0082 FFF7FEFF 		bl	bmp280_set_config
 2133 
 1138              	.LVL57:
2037 
 1109              	.LVL56:
 2134 
 204:Core/Src/main.c ****   MX_USART1_UART_Init();
2038 
 192:Core/Src/main.c ****   //print_rslt(" bmp280_set_config status", rslt);
 2135 
 1139              		.loc 1 204 3 view .LVU338
2039 
 1110              		.loc 1 192 8 view .LVU331
 2136 
 1140 0014 FFF7FEFF 		bl	MX_TIM4_Init
2040 
 1111 0086 2870     		strb	r0, [r5]
 2137 
 1141              	.LVL58:
2041 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 35
 2138 
 205:Core/Src/main.c ****   MX_TIM3_Init();
2042 
 
 2139 
 1142              		.loc 1 205 3 view .LVU339
2043 
 
 2140 
 1143 0018 FFF7FEFF 		bl	MX_USART1_UART_Init
2044 
 196:Core/Src/main.c ****   //print_rslt(" bmp280_set_power_mode status", rslt);
 2141 
 1144              	.LVL59:
2045 
 1112              		.loc 1 196 3 is_stmt 1 view .LVU332
 2142 
 206:Core/Src/main.c ****   MX_I2C2_Init();
2046 
 196:Core/Src/main.c ****   //print_rslt(" bmp280_set_power_mode status", rslt);
 2143 
 1145              		.loc 1 206 3 view .LVU340
2047 
 1113              		.loc 1 196 10 is_stmt 0 view .LVU333
 2144 
 1146 001c FFF7FEFF 		bl	MX_TIM3_Init
2048 
 1114 0088 3146     		mov	r1, r6
 2145 
 1147              	.LVL60:
2049 
 1115 008a 3846     		mov	r0, r7
 2146 
 207:Core/Src/main.c ****   MX_RTC_Init();
2050 
 1116 008c FFF7FEFF 		bl	bmp280_set_power_mode
 2147 
 1148              		.loc 1 207 3 view .LVU341
2051 
 1117              	.LVL57:
 2148 
 1149 0020 FFF7FEFF 		bl	MX_I2C2_Init
2052 
 196:Core/Src/main.c ****   //print_rslt(" bmp280_set_power_mode status", rslt);
 2149 
 1150              	.LVL61:
2053 
 1118              		.loc 1 196 8 view .LVU334
 2150 
 208:Core/Src/main.c ****   MX_USB_DEVICE_Init();
2054 
 1119 0090 2870     		strb	r0, [r5]
 2151 
 1151              		.loc 1 208 3 view .LVU342
2055 
 201:Core/Src/main.c ****   /* USER CODE END 2 */
 2152 
 1152 0024 FFF7FEFF 		bl	MX_RTC_Init
2056 
 1120              		.loc 1 201 3 is_stmt 1 view .LVU335
 2153 
 1153              	.LVL62:
2057 
 1121 0092 FFF7FEFF 		bl	cc_init
 2154 
 209:Core/Src/main.c ****   /* USER CODE BEGIN 2 */
2058 
 1122              	.LVL58:
 2155 
 1154              		.loc 1 209 3 view .LVU343
2059 
 1123              	.L48:
 2156 
 1155 0028 FFF7FEFF 		bl	MX_USB_DEVICE_Init
2060 
 206:Core/Src/main.c ****     {
 2157 
 1156              	.LVL63:
2061 
 1124              		.loc 1 206 3 discriminator 1 view .LVU336
 2158 
 212:Core/Src/main.c ****   HAL_Delay (1000);
2062 
 208:Core/Src/main.c ****
2159 
 1157              		.loc 1 212 3 view .LVU344
2063 
 1125              		.loc 1 208 7 discriminator 1 view .LVU337
 2160 
 1158 002c 1D4C     		ldr	r4, .L60
2064 
 1126 0096 0648     		ldr	r0, .L50+12
 2161 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 37
2065 
 1127 0098 FFF7FEFF 		bl	cc_run
 2162 
 
2066 
 1128              	.LVL59:
 2163 
 
2067 
 212:Core/Src/main.c ****
2164 
 1159 002e 0022     		movs	r2, #0
2068 
 1129              		.loc 1 212 7 discriminator 1 view .LVU338
 2165 
 1160 0030 1021     		movs	r1, #16
2069 
 1130 009c 3220     		movs	r0, #50
 2166 
 1161 0032 2046     		mov	r0, r4
2070 
 1131 009e FFF7FEFF 		bl	HAL_Delay
 2167 
 1162 0034 FFF7FEFF 		bl	HAL_GPIO_WritePin
2071 
 1132              	.LVL60:
 2168 
 1163              	.LVL64:
2072 
 1133 00a2 F8E7     		b	.L48
 2169 
 213:Core/Src/main.c ****   HAL_GPIO_WritePin ( USB_PULLUP_GPIO_Port, USB_PULLUP_Pin, GPIO_PIN_SET);
2073 
 1134              	.L51:
 2170 
 1164              		.loc 1 213 3 view .LVU345
2074 
 1135              		.align	2
 2171 
 1165 0038 4FF47A70 		mov	r0, #1000
2075 
 1136              	.L50:
 2172 
 1166 003c FFF7FEFF 		bl	HAL_Delay
2076 
 1137 00a4 000C0140 		.word	1073810432
 2173 
 1167              	.LVL65:
2077 
 1138 00a8 00000000 		.word	uc1
 2174 
 214:Core/Src/main.c ****
2078 
 1139 00ac 00000000 		.word	huart1
 2175 
 1168              		.loc 1 214 3 view .LVU346
2079 
 1140 00b0 00000000 		.word	.LANCHOR0
 2176 
 1169 0040 0122     		movs	r2, #1
2080 
 1141 00b4 00000000 		.word	rslt
 2177 
 1170 0042 1021     		movs	r1, #16
2081 
 1142 00b8 00000000 		.word	conf
 2178 
 1171 0044 2046     		mov	r0, r4
2082 
 1143              		.cfi_endproc
 2179 
 1172 0046 FFF7FEFF 		bl	HAL_GPIO_WritePin
2083 
 1144              	.LFE71:
 2180 
 1173              	.LVL66:
2084 
 1146              		.section	.text.Error_Handler,"ax",%progbits
 2181 
 217:Core/Src/main.c ****
2085 
 1147              		.align	1
 2182 
 1174              		.loc 1 217 3 view .LVU347
2086 
 1148              		.global	Error_Handler
 2183 
 1175 004a 174C     		ldr	r4, .L60+4
2087 
 1149              		.syntax unified
 2184 
 1176 004c 1749     		ldr	r1, .L60+8
2088 
 1150              		.thumb
 2185 
 1177 004e 2046     		mov	r0, r4
2089 
 1151              		.thumb_func
 2186 
 1178 0050 FFF7FEFF 		bl	init_usart_ctl
2090 
 1152              		.fpu softvfp
 2187 
 1179              	.LVL67:
2091 
 1154              	Error_Handler:
 2188 
 219:Core/Src/main.c ****
2092 
 1155              	.LFB80:
 2189 
 1180              		.loc 1 219 3 view .LVU348
2093 
 567:Core/Src/main.c ****
2190 
 1181 0054 2046     		mov	r0, r4
2094 
 568:Core/Src/main.c **** /* USER CODE BEGIN 4 */
 2191 
 1182 0056 FFF7FEFF 		bl	EnableSerialRxInterrupt
2095 
 569:Core/Src/main.c ****
2192 
 1183              	.LVL68:
2096 
 570:Core/Src/main.c **** /* USER CODE END 4 */
 2193 
 222:Core/Src/main.c ****
2097 
 571:Core/Src/main.c ****
2194 
 1184              		.loc 1 222 3 view .LVU349
2098 
 572:Core/Src/main.c **** /**
 2195 
 224:Core/Src/main.c ****
2099 
 573:Core/Src/main.c ****   * @brief  This function is executed in case of error occurrence.
 2196 
 1185              		.loc 1 224 3 view .LVU350
2100 
 574:Core/Src/main.c ****   * @retval None
 2197 
 227:Core/Src/main.c ****
2101 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 36
 2198 
 1186              		.loc 1 227 3 view .LVU351
2102 
 
 2199 
 230:Core/Src/main.c ****
2103 
 
 2200 
 1187              		.loc 1 230 3 view .LVU352
2104 
 575:Core/Src/main.c ****   */
 2201 
 230:Core/Src/main.c ****
2105 
 576:Core/Src/main.c **** void Error_Handler(void)
 2202 
 1188              		.loc 1 230 15 is_stmt 0 view .LVU353
2106 
 577:Core/Src/main.c **** {
 2203 
 1189 005a 3B23     		movs	r3, #59
2107 
 1156              		.loc 1 577 1 view -0
 2204 
 1190 005c 8DF80430 		strb	r3, [sp, #4]
2108 
 1157              		.cfi_startproc
 2205 
 232:Core/Src/main.c ****   dev.read = user_i2c_read;
2109 
 1158              		@ args = 0, pretend = 0, frame = 0
 2206 
 1191              		.loc 1 232 3 is_stmt 1 view .LVU354
2110 
 1159              		@ frame_needed = 0, uses_anonymous_args = 0
 2207 
 232:Core/Src/main.c ****   dev.read = user_i2c_read;
2111 
 1160              		@ link register save eliminated.
 2208 
 1192              		.loc 1 232 12 is_stmt 0 view .LVU355
2112 
 578:Core/Src/main.c ****   /* USER CODE BEGIN Error_Handler_Debug */
 2209 
 1193 0060 0123     		movs	r3, #1
2113 
 579:Core/Src/main.c ****   /* User can add his own implementation to report the HAL error return state */
 2210 
 1194 0062 8DF81030 		strb	r3, [sp, #16]
2114 
 580:Core/Src/main.c ****
2211 
 233:Core/Src/main.c ****   dev.write = user_i2c_write;
2115 
 581:Core/Src/main.c ****   /* USER CODE END Error_Handler_Debug */
 2212 
 1195              		.loc 1 233 3 is_stmt 1 view .LVU356
2116 
 582:Core/Src/main.c **** }
 2213 
 233:Core/Src/main.c ****   dev.write = user_i2c_write;
2117 
 1161              		.loc 1 582 1 view .LVU340
 2214 
 1196              		.loc 1 233 12 is_stmt 0 view .LVU357
2118 
 1162 0000 7047     		bx	lr
 2215 
 1197 0066 124B     		ldr	r3, .L60+12
2119 
 1163              		.cfi_endproc
 2216 
 1198 0068 0593     		str	r3, [sp, #20]
2120 
 1164              	.LFE80:
 2217 
 234:Core/Src/main.c ****   dev.delay_us = user_delay_us;
2121 
 1166              		.comm	conf,5,4
 2218 
 1199              		.loc 1 234 3 is_stmt 1 view .LVU358
2122 
 1167              		.comm	rslt,1,1
 2219 
 234:Core/Src/main.c ****   dev.delay_us = user_delay_us;
2123 
 1168              		.global	bmp
 2220 
 1200              		.loc 1 234 13 is_stmt 0 view .LVU359
2124 
 1169              		.comm	huart1,64,4
 2221 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 38
2125 
 1170              		.comm	htim4,64,4
 2222 
 
2126 
 1171              		.comm	htim3,64,4
 2223 
 
2127 
 1172              		.comm	hspi1,88,4
 2224 
 1201 006a 124B     		ldr	r3, .L60+16
2128 
 1173              		.comm	hrtc,20,4
 2225 
 1202 006c 0693     		str	r3, [sp, #24]
2129 
 1174              		.comm	hi2c2,84,4
 2226 
 235:Core/Src/main.c ****
2130 
 1175              		.section	.data.bmp,"aw"
 2227 
 1203              		.loc 1 235 3 is_stmt 1 view .LVU360
2131 
 1176              		.align	2
 2228 
 235:Core/Src/main.c ****
2132 
 1177              		.set	.LANCHOR0,. + 0
 2229 
 1204              		.loc 1 235 16 is_stmt 0 view .LVU361
2133 
 1180              	bmp:
 2230 
 1205 006e 124B     		ldr	r3, .L60+20
2134 
 1181 0000 00       		.space	1
 2231 
 1206 0070 0793     		str	r3, [sp, #28]
2135 
 1182 0001 76       		.byte	118
 2232 
 238:Core/Src/main.c ****
2136 
 1183 0002 01       		.byte	1
 2233 
 1207              		.loc 1 238 3 is_stmt 1 view .LVU362
2137 
 1184 0003 00       		.space	1
 2234 
 238:Core/Src/main.c ****
2138 
 1185 0004 00000000 		.word	user_i2c_read
 2235 
 1208              		.loc 1 238 16 is_stmt 0 view .LVU363
2139 
 1186 0008 00000000 		.word	user_i2c_write
 2236 
 1209 0072 01AB     		add	r3, sp, #4
2140 
 1187 000c 00000000 		.word	user_delay_ms
 2237 
 1210 0074 0393     		str	r3, [sp, #12]
2141 
 1188 0010 00000000 		.space	36
 2238 
 241:Core/Src/main.c ****     if (rslt != BME280_OK)
2142 
 1188      00000000
2239 
 1211              		.loc 1 241 5 is_stmt 1 view .LVU364
2143 
 1188      00000000
2240 
 241:Core/Src/main.c ****     if (rslt != BME280_OK)
2144 
 1188      00000000
2241 
 1212              		.loc 1 241 12 is_stmt 0 view .LVU365
2145 
 1188      00000000
2242 
 1213 0076 02A8     		add	r0, sp, #8
2146 
 1189              		.text
 2243 
 1214 0078 FFF7FEFF 		bl	bme280_init
2147 
 1190              	.Letext0:
 2244 
 1215              	.LVL69:
2148 
 1191              		.file 2 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.7
 2245 
 242:Core/Src/main.c ****     {
2149 
 1192              		.file 3 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.7
 2246 
 1216              		.loc 1 242 5 is_stmt 1 view .LVU366
2150 
 1193              		.file 4 "Drivers/CMSIS/Include/core_cm3.h"
 2247 
 242:Core/Src/main.c ****     {
2151 
 1194              		.file 5 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h"
 2248 
 1217              		.loc 1 242 8 is_stmt 0 view .LVU367
2152 
 1195              		.file 6 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h"
 2249 
 1218 007c 10B1     		cbz	r0, .L56
2153 
 1196              		.file 7 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h"
 2250 
 245:Core/Src/main.c ****     }
2154 
 1197              		.file 8 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h"
 2251 
 1219              		.loc 1 245 9 is_stmt 1 view .LVU368
2155 
 1198              		.file 9 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h"
 2252 
 1220 007e 0120     		movs	r0, #1
2156 
 1199              		.file 10 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h"
 2253 
 1221              	.LVL70:
2157 
 1200              		.file 11 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h"
 2254 
 245:Core/Src/main.c ****     }
2158 
 1201              		.file 12 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h"
 2255 
 1222              		.loc 1 245 9 is_stmt 0 view .LVU369
2159 
 1202              		.file 13 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rtc.h"
 2256 
 1223 0080 FFF7FEFF 		bl	exit
2160 
 1203              		.file 14 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h"
 2257 
 1224              	.LVL71:
2161 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 37
 2258 
 1225              	.L56:
2162 
 
 2259 
 249:Core/Src/main.c ****     if (rslt != BME280_OK)
2163 
 
 2260 
 1226              		.loc 1 249 5 is_stmt 1 view .LVU370
2164 
 1204              		.file 15 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h"
 2261 
 249:Core/Src/main.c ****     if (rslt != BME280_OK)
2165 
 1205              		.file 16 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h"
 2262 
 1227              		.loc 1 249 12 is_stmt 0 view .LVU371
2166 
 1206              		.file 17 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h"
 2263 
 1228 0084 02A8     		add	r0, sp, #8
2167 
 1207              		.file 18 "Core/Inc/main.h"
 2264 
 1229              	.LVL72:
2168 
 1208              		.file 19 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.
 2265 
 249:Core/Src/main.c ****     if (rslt != BME280_OK)
2169 
 1209              		.file 20 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.
 2266 
 1230              		.loc 1 249 12 view .LVU372
2170 
 1210              		.file 21 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.
 2267 
 1231 0086 FFF7FEFF 		bl	stream_sensor_data_forced_mode
2171 
 1211              		.file 22 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.
 2268 
 1232              	.LVL73:
2172 
 1212              		.file 23 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.
 2269 
 250:Core/Src/main.c ****     {
2173 
 1213              		.file 24 "../libSerial/inc/libSerial/serial.h"
 2270 
 1233              		.loc 1 250 5 is_stmt 1 view .LVU373
2174 
 1214              		.file 25 "../libBMP280/inc/libBMP280/bmp280_defs.h"
 2271 
 250:Core/Src/main.c ****     {
2175 
 1215              		.file 26 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h"
 2272 
 1234              		.loc 1 250 8 is_stmt 0 view .LVU374
2176 
 1216              		.file 27 "USB_DEVICE/App/usb_device.h"
 2273 
 1235 008a 10B1     		cbz	r0, .L57
2177 
 1217              		.file 28 "../libBMP280/inc/libBMP280/bmp280.h"
 2274 
 253:Core/Src/main.c ****     }
2178 
 1218              		.file 29 "inc/display.h"
 2275 
 1236              		.loc 1 253 9 is_stmt 1 view .LVU375
2179 
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 38
 2276 
 1237 008c 0120     		movs	r0, #1
- 
 
 2277 
 1238              	.LVL74:
- 
 
 2278 
 253:Core/Src/main.c ****     }
- 
 
 2279 
 1239              		.loc 1 253 9 is_stmt 0 view .LVU376
- 
 
 2280 
 1240 008e FFF7FEFF 		bl	exit
- 
 
 2281 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 39
- 
 
 2282 
 
- 
 
 2283 
 
- 
 
 2284 
 1241              	.LVL75:
- 
 
 2285 
 1242              	.L57:
- 
 
 2286 
 260:Core/Src/main.c ****   /* USER CODE END 2 */
- 
 
 2287 
 1243              		.loc 1 260 3 is_stmt 1 view .LVU377
- 
 
 2288 
 1244 0092 FFF7FEFF 		bl	cc_init
- 
 
 2289 
 1245              	.LVL76:
- 
 
 2290 
 1246              	.L58:
- 
 
 2291 
 265:Core/Src/main.c ****     {
- 
 
 2292 
 1247              		.loc 1 265 3 discriminator 1 view .LVU378
- 
 
 2293 
 267:Core/Src/main.c ****
- 
 
 2294 
 1248              		.loc 1 267 7 discriminator 1 view .LVU379
- 
 
 2295 
 1249 0096 02A8     		add	r0, sp, #8
- 
 
 2296 
 1250 0098 FFF7FEFF 		bl	cc_run
- 
 
 2297 
 1251              	.LVL77:
- 
 
 2298 
 271:Core/Src/main.c ****
- 
 
 2299 
 1252              		.loc 1 271 7 discriminator 1 view .LVU380
- 
 
 2300 
 1253 009c 3220     		movs	r0, #50
- 
 
 2301 
 1254 009e FFF7FEFF 		bl	HAL_Delay
- 
 
 2302 
 1255              	.LVL78:
- 
 
 2303 
 1256 00a2 F8E7     		b	.L58
- 
 
 2304 
 1257              	.L61:
- 
 
 2305 
 1258              		.align	2
- 
 
 2306 
 1259              	.L60:
- 
 
 2307 
 1260 00a4 000C0140 		.word	1073810432
- 
 
 2308 
 1261 00a8 00000000 		.word	uc1
- 
 
 2309 
 1262 00ac 00000000 		.word	huart1
- 
 
 2310 
 1263 00b0 00000000 		.word	user_i2c_read
- 
 
 2311 
 1264 00b4 00000000 		.word	user_i2c_write
- 
 
 2312 
 1265 00b8 00000000 		.word	user_delay_us
- 
 
 2313 
 1266              		.cfi_endproc
- 
 
 2314 
 1267              	.LFE72:
- 
 
 2315 
 1269              		.section	.text.Error_Handler,"ax",%progbits
- 
 
 2316 
 1270              		.align	1
- 
 
 2317 
 1271              		.global	Error_Handler
- 
 
 2318 
 1272              		.syntax unified
- 
 
 2319 
 1273              		.thumb
- 
 
 2320 
 1274              		.thumb_func
- 
 
 2321 
 1275              		.fpu softvfp
- 
 
 2322 
 1277              	Error_Handler:
- 
 
 2323 
 1278              	.LFB81:
- 
 
 2324 
 626:Core/Src/main.c ****
- 
 
 2325 
 627:Core/Src/main.c **** /* USER CODE BEGIN 4 */
- 
 
 2326 
 628:Core/Src/main.c ****
- 
 
 2327 
 629:Core/Src/main.c **** /* USER CODE END 4 */
- 
 
 2328 
 630:Core/Src/main.c ****
- 
 
 2329 
 631:Core/Src/main.c **** /**
- 
 
 2330 
 632:Core/Src/main.c ****   * @brief  This function is executed in case of error occurrence.
- 
 
 2331 
 633:Core/Src/main.c ****   * @retval None
- 
 
 2332 
 634:Core/Src/main.c ****   */
- 
 
 2333 
 635:Core/Src/main.c **** void Error_Handler(void)
- 
 
 2334 
 636:Core/Src/main.c **** {
- 
 
 2335 
 1279              		.loc 1 636 1 view -0
- 
 
 2336 
 1280              		.cfi_startproc
- 
 
 2337 
 1281              		@ args = 0, pretend = 0, frame = 0
- 
 
 2338 
 1282              		@ frame_needed = 0, uses_anonymous_args = 0
- 
 
 2339 
 1283              		@ link register save eliminated.
- 
 
 2340 
 637:Core/Src/main.c ****   /* USER CODE BEGIN Error_Handler_Debug */
- 
 
 2341 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 40
- 
 
 2342 
 
- 
 
 2343 
 
- 
 
 2344 
 638:Core/Src/main.c ****   /* User can add his own implementation to report the HAL error return state */
- 
 
 2345 
 639:Core/Src/main.c ****
- 
 
 2346 
 640:Core/Src/main.c ****   /* USER CODE END Error_Handler_Debug */
- 
 
 2347 
 641:Core/Src/main.c **** }
- 
 
 2348 
 1284              		.loc 1 641 1 view .LVU382
- 
 
 2349 
 1285 0000 7047     		bx	lr
- 
 
 2350 
 1286              		.cfi_endproc
- 
 
 2351 
 1287              	.LFE81:
- 
 
 2352 
 1289              		.comm	rslt,1,1
- 
 
 2353 
 1290              		.comm	req_delay,4,4
- 
 
 2354 
 1291              		.comm	id,2,4
- 
 
 2355 
 1292              		.comm	dev,72,4
- 
 
 2356 
 1293              		.comm	huart1,64,4
- 
 
 2357 
 1294              		.comm	htim4,64,4
- 
 
 2358 
 1295              		.comm	htim3,64,4
- 
 
 2359 
 1296              		.comm	hspi1,88,4
- 
 
 2360 
 1297              		.comm	hrtc,20,4
- 
 
 2361 
 1298              		.comm	hi2c2,84,4
- 
 
 2362 
 1299              		.text
- 
 
 2363 
 1300              	.Letext0:
- 
 
 2364 
 1301              		.file 2 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.7
- 
 
 2365 
 1302              		.file 3 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.7
- 
 
 2366 
 1303              		.file 4 "Drivers/CMSIS/Include/core_cm3.h"
- 
 
 2367 
 1304              		.file 5 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h"
- 
 
 2368 
 1305              		.file 6 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h"
- 
 
 2369 
 1306              		.file 7 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h"
- 
 
 2370 
 1307              		.file 8 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h"
- 
 
 2371 
 1308              		.file 9 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h"
- 
 
 2372 
 1309              		.file 10 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h"
- 
 
 2373 
 1310              		.file 11 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h"
- 
 
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 1311              		.file 12 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h"
- 
 
 2375 
 1312              		.file 13 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rtc.h"
- 
 
 2376 
 1313              		.file 14 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h"
- 
 
 2377 
 1314              		.file 15 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h"
- 
 
 2378 
 1315              		.file 16 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h"
- 
 
 2379 
 1316              		.file 17 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h"
- 
 
 2380 
 1317              		.file 18 "Core/Inc/main.h"
- 
 
 2381 
 1318              		.file 19 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.
- 
 
 2382 
 1319              		.file 20 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.
- 
 
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 1320              		.file 21 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.
- 
 
 2384 
 1321              		.file 22 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.
- 
 
 2385 
 1322              		.file 23 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.
- 
 
 2386 
 1323              		.file 24 "../libSerial/inc/libSerial/serial.h"
- 
 
 2387 
 1324              		.file 25 "../libBME280/inc/libBME280/bme280_defs.h"
- 
 
 2388 
 1325              		.file 26 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h"
- 
 
 2389 
 1326              		.file 27 "USB_DEVICE/App/usb_device.h"
- 
 
 2390 
 1327              		.file 28 "../libBME280/inc/libBME280/bme280.h"
- 
 
 2391 
 1328              		.file 29 "inc/display.h"
- 
 
 2392 
ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 41
2180 
 
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2182 
DEFINED SYMBOLS
 2395 
DEFINED SYMBOLS
2183 
                            *ABS*:0000000000000000 main.c
 2396 
                            *ABS*:0000000000000000 main.c
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C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:16     .text.user_delay_ms:0000000000000000 $t
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:16     .text.user_delay_us:0000000000000000 $t
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:23     .text.user_delay_us:0000000000000000 user_delay_us
- 
 
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:54     .text.user_delay_us:0000000000000014 $d
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C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:46     .text.user_i2c_write:0000000000000000 $t
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:59     .text.user_i2c_write:0000000000000000 $t
2187 
C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:52     .text.user_i2c_write:0000000000000000 user_i2c_write
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:65     .text.user_i2c_write:0000000000000000 user_i2c_write
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C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:114    .text.user_i2c_write:000000000000002c $d
 2402 
C:\Users\mike\AppData\Local\Temp\cchHSijx.s:131    .text.user_i2c_write:0000000000000030 $d
2189 
                            *COM*:0000000000000054 hi2c2
 2403 
                            *COM*:0000000000000054 hi2c2
2190 
C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:119    .text.user_i2c_read:0000000000000000 $t
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:136    .text.user_i2c_read:0000000000000000 $t
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C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:125    .text.user_i2c_read:0000000000000000 user_i2c_read
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C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:192    .text.MX_GPIO_Init:0000000000000000 $t
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:213    .text.MX_GPIO_Init:0000000000000000 $t
2194 
C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:198    .text.MX_GPIO_Init:0000000000000000 MX_GPIO_Init
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:219    .text.MX_GPIO_Init:0000000000000000 MX_GPIO_Init
2195 
C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:341    .text.MX_GPIO_Init:00000000000000a4 $d
 2409 
C:\Users\mike\AppData\Local\Temp\cchHSijx.s:362    .text.MX_GPIO_Init:00000000000000a4 $d
2196 
C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:348    .text.MX_SPI1_Init:0000000000000000 $t
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:369    .text.MX_SPI1_Init:0000000000000000 $t
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C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:354    .text.MX_SPI1_Init:0000000000000000 MX_SPI1_Init
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:375    .text.MX_SPI1_Init:0000000000000000 MX_SPI1_Init
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C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:420    .text.MX_SPI1_Init:000000000000003c $d
 2412 
C:\Users\mike\AppData\Local\Temp\cchHSijx.s:441    .text.MX_SPI1_Init:000000000000003c $d
2199 
                            *COM*:0000000000000058 hspi1
 2413 
                            *COM*:0000000000000058 hspi1
2200 
C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:426    .text.MX_TIM4_Init:0000000000000000 $t
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:447    .text.MX_TIM4_Init:0000000000000000 $t
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C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:432    .text.MX_TIM4_Init:0000000000000000 MX_TIM4_Init
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:453    .text.MX_TIM4_Init:0000000000000000 MX_TIM4_Init
2202 
C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:528    .text.MX_TIM4_Init:0000000000000050 $d
 2416 
C:\Users\mike\AppData\Local\Temp\cchHSijx.s:549    .text.MX_TIM4_Init:0000000000000050 $d
2203 
                            *COM*:0000000000000040 htim4
 2417 
                            *COM*:0000000000000040 htim4
2204 
C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:534    .text.MX_USART1_UART_Init:0000000000000000 $t
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:555    .text.MX_USART1_UART_Init:0000000000000000 $t
2205 
C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:540    .text.MX_USART1_UART_Init:0000000000000000 MX_USART1_UART_Init
 2419 
C:\Users\mike\AppData\Local\Temp\cchHSijx.s:561    .text.MX_USART1_UART_Init:0000000000000000 MX_USART1_UART_Init
2206 
C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:589    .text.MX_USART1_UART_Init:0000000000000024 $d
 2420 
C:\Users\mike\AppData\Local\Temp\cchHSijx.s:610    .text.MX_USART1_UART_Init:0000000000000024 $d
2207 
                            *COM*:0000000000000040 huart1
 2421 
                            *COM*:0000000000000040 huart1
2208 
C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:595    .text.MX_TIM3_Init:0000000000000000 $t
 2422 
C:\Users\mike\AppData\Local\Temp\cchHSijx.s:616    .text.MX_TIM3_Init:0000000000000000 $t
2209 
C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:601    .text.MX_TIM3_Init:0000000000000000 MX_TIM3_Init
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:622    .text.MX_TIM3_Init:0000000000000000 MX_TIM3_Init
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C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:705    .text.MX_TIM3_Init:0000000000000068 $d
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:726    .text.MX_TIM3_Init:0000000000000068 $d
2211 
                            *COM*:0000000000000040 htim3
 2425 
                            *COM*:0000000000000040 htim3
2212 
C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:711    .text.MX_I2C2_Init:0000000000000000 $t
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:732    .text.MX_I2C2_Init:0000000000000000 $t
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C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:717    .text.MX_I2C2_Init:0000000000000000 MX_I2C2_Init
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:738    .text.MX_I2C2_Init:0000000000000000 MX_I2C2_Init
2214 
C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:769    .text.MX_I2C2_Init:0000000000000028 $d
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:790    .text.MX_I2C2_Init:0000000000000028 $d
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C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:776    .text.MX_RTC_Init:0000000000000000 $t
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:797    .text.MX_RTC_Init:0000000000000000 $t
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C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:782    .text.MX_RTC_Init:0000000000000000 MX_RTC_Init
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:803    .text.MX_RTC_Init:0000000000000000 MX_RTC_Init
2217 
C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:867    .text.MX_RTC_Init:000000000000005c $d
 2431 
C:\Users\mike\AppData\Local\Temp\cchHSijx.s:888    .text.MX_RTC_Init:000000000000005c $d
2218 
                            *COM*:0000000000000014 hrtc
 2432 
                            *COM*:0000000000000014 hrtc
- 
 
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:894    .text.stream_sensor_data_forced_mode:0000000000000000 $t
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:901    .text.stream_sensor_data_forced_mode:0000000000000000 stream_sensor_data_forced_mode
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:979    .text.stream_sensor_data_forced_mode:0000000000000044 $d
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                            *COM*:0000000000000004 req_delay
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C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:873    .text.SystemClock_Config:0000000000000000 $t
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:984    .text.SystemClock_Config:0000000000000000 $t
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C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:880    .text.SystemClock_Config:0000000000000000 SystemClock_Config
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:991    .text.SystemClock_Config:0000000000000000 SystemClock_Config
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C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:995    .text.main:0000000000000000 $t
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:1106   .text.main:0000000000000000 $t
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C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:1002   .text.main:0000000000000000 main
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:1113   .text.main:0000000000000000 main
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C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:1137   .text.main:00000000000000a4 $d
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:1260   .text.main:00000000000000a4 $d
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:1270   .text.Error_Handler:0000000000000000 $t
- 
 
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C:\Users\mike\AppData\Local\Temp\cchHSijx.s:1277   .text.Error_Handler:0000000000000000 Error_Handler
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                            *COM*:0000000000000001 rslt
 2444 
                            *COM*:0000000000000001 rslt
2225 
                            *COM*:0000000000000005 conf
 2445 
                            *COM*:0000000000000002 id
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C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:1147   .text.Error_Handler:0000000000000000 $t
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C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:1154   .text.Error_Handler:0000000000000000 Error_Handler
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C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:1180   .data.bmp:0000000000000000 bmp
 2446 
                            *COM*:0000000000000048 dev
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C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:1176   .data.bmp:0000000000000000 $d
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 2447 
 
2231 
UNDEFINED SYMBOLS
 2448 
UNDEFINED SYMBOLS
2232 
HAL_Delay
 2449 
HAL_Delay
2233 
HAL_I2C_Mem_Write
 2450 
HAL_I2C_Mem_Write
2234 
HAL_I2C_Mem_Read
 2451 
HAL_I2C_Mem_Read
- 
 
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ARM GAS  C:\Users\mike\AppData\Local\Temp\cchHSijx.s 			page 42
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- 
 
 2454 
 
2235 
HAL_GPIO_WritePin
 2455 
HAL_GPIO_WritePin
2236 
HAL_GPIO_Init
 2456 
HAL_GPIO_Init
2237 
HAL_SPI_Init
 2457 
HAL_SPI_Init
2238 
HAL_TIM_Encoder_Init
 2458 
HAL_TIM_Encoder_Init
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ARM GAS  C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s 			page 39
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 - 
 
2241 
 
 - 
 
2242 
HAL_TIMEx_MasterConfigSynchronization
 2459 
HAL_TIMEx_MasterConfigSynchronization
2243 
HAL_UART_Init
 2460 
HAL_UART_Init
2244 
HAL_TIM_OC_Init
 2461 
HAL_TIM_OC_Init
2245 
HAL_TIM_OnePulse_Init
 2462 
HAL_TIM_OnePulse_Init
2246 
HAL_TIM_OC_ConfigChannel
 2463 
HAL_TIM_OC_ConfigChannel
2247 
HAL_I2C_Init
 2464 
HAL_I2C_Init
2248 
HAL_RTC_Init
 2465 
HAL_RTC_Init
2249 
HAL_RTC_SetTime
 2466 
HAL_RTC_SetTime
2250 
HAL_RTC_SetDate
 2467 
HAL_RTC_SetDate
- 
 
 2468 
bme280_set_sensor_settings
- 
 
 2469 
bme280_cal_meas_delay
- 
 
 2470 
bme280_set_sensor_mode
2251 
HAL_RCC_OscConfig
 2471 
HAL_RCC_OscConfig
2252 
HAL_RCC_ClockConfig
 2472 
HAL_RCC_ClockConfig
2253 
HAL_RCCEx_PeriphCLKConfig
 2473 
HAL_RCCEx_PeriphCLKConfig
2254 
HAL_Init
 2474 
HAL_Init
2255 
MX_USB_DEVICE_Init
 2475 
MX_USB_DEVICE_Init
2256 
init_usart_ctl
 2476 
init_usart_ctl
2257 
EnableSerialRxInterrupt
 2477 
EnableSerialRxInterrupt
2258 
bmp280_init
 2478 
bme280_init
2259 
bmp280_get_config
 - 
 
2260 
bmp280_set_config
 2479 
exit
2261 
bmp280_set_power_mode
 - 
 
2262 
cc_init
 2480 
cc_init
2263 
cc_run
 2481 
cc_run
2264 
uc1
 2482 
uc1