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#define SPI_MOSI_GPIO_Port GPIOA
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#define SPI_MOSI_GPIO_Port GPIOA
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#define SPI_RESET_Pin GPIO_PIN_4
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#define SPI_RESET_Pin GPIO_PIN_4
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#define SPI_RESET_GPIO_Port GPIOC
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#define SPI_RESET_GPIO_Port GPIOC
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#define SPI_NSS2_Pin GPIO_PIN_5
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#define SPI_NSS2_Pin GPIO_PIN_5
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#define SPI_NSS2_GPIO_Port GPIOC
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#define SPI_NSS2_GPIO_Port GPIOC
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#define BT_STATE_Pin GPIO_PIN_2
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#define BT_STATE_GPIO_Port GPIOB
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#define SW1_PUSH_Pin GPIO_PIN_12
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#define SW1_PUSH_Pin GPIO_PIN_12
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#define SW1_PUSH_GPIO_Port GPIOB
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#define SW1_PUSH_GPIO_Port GPIOB
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#define SW1_I_Pin GPIO_PIN_13
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#define SW1_I_Pin GPIO_PIN_13
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#define SW1_I_GPIO_Port GPIOB
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#define SW1_I_GPIO_Port GPIOB
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#define SW1_Q_Pin GPIO_PIN_14
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#define SW1_Q_Pin GPIO_PIN_14
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#ifdef __cplusplus
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#ifdef __cplusplus
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}
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}
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#endif
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#endif
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#endif /* __MAIN_H */
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#endif /* __MAIN_H */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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