Subversion Repositories DashDisplay

Rev

Rev 61 | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed

Rev 61 Rev 77
Line 1... Line 1...
1 
/**
 1 
/**
2 
  ******************************************************************************
 2 
  ******************************************************************************
3 
  * @file    stm32l1xx_ll_rcc.c
 3 
  * @file    stm32l1xx_ll_rcc.c
4 
  * @author  MCD Application Team
 4 
  * @author  MCD Application Team
5 
  * @brief   RCC LL module driver.
 5 
  * @brief   RCC LL module driver.
6 
  ******************************************************************************
 6 
  ******************************************************************************
7 
  * @attention
 7 
  * @attention
8 
  *
 8 
  *
9 
  * <h2><center>&copy; Copyright(c) 2017 STMicroelectronics.
 9 
  * Copyright (c) 2017 STMicroelectronics.
10 
  * All rights reserved.</center></h2>
 10 
  * All rights reserved.
11 
  *
 11 
  *
12 
  * This software component is licensed by ST under BSD 3-Clause license,
 12 
  * This software is licensed under terms that can be found in the LICENSE file in
13 
  * the "License"; You may not use this file except in compliance with the
 13 
  * the root directory of this software component.
14 
  * License. You may obtain a copy of the License at:
 14 
  * If no LICENSE file comes with this software, it is provided AS-IS.
15 
  *                        opensource.org/licenses/BSD-3-Clause
 15 
  ******************************************************************************
16 
  *
 16 
  */
17 
  ******************************************************************************
 17 
#if defined(USE_FULL_LL_DRIVER)
18 
  */
 18 
 
19 
#if defined(USE_FULL_LL_DRIVER)
 19 
/* Includes ------------------------------------------------------------------*/
20 
 
 20 
#include "stm32l1xx_ll_rcc.h"
21 
/* Includes ------------------------------------------------------------------*/
 21 
/** @addtogroup STM32L1xx_LL_Driver
22 
#include "stm32l1xx_ll_rcc.h"
 22 
  * @{
23 
/** @addtogroup STM32L1xx_LL_Driver
 23 
  */
24 
  * @{
 24 
 
25 
  */
 25 
#if defined(RCC)
26 
 
 26 
 
27 
#if defined(RCC)
 27 
/** @defgroup RCC_LL RCC
28 
 
 28 
  * @{
29 
/** @defgroup RCC_LL RCC
 29 
  */
30 
  * @{
 30 
 
31 
  */
 31 
/* Private types -------------------------------------------------------------*/
32 
 
 32 
/* Private variables ---------------------------------------------------------*/
33 
/* Private types -------------------------------------------------------------*/
 33 
 
34 
/* Private variables ---------------------------------------------------------*/
 34 
/* Private constants ---------------------------------------------------------*/
35 
 
 35 
/* Private macros ------------------------------------------------------------*/
36 
/* Private constants ---------------------------------------------------------*/
 36 
/* Private function prototypes -----------------------------------------------*/
37 
/* Private macros ------------------------------------------------------------*/
 37 
/** @defgroup RCC_LL_Private_Functions RCC Private functions
38 
/* Private function prototypes -----------------------------------------------*/
 38 
  * @{
39 
/** @defgroup RCC_LL_Private_Functions RCC Private functions
 39 
  */
40 
  * @{
 40 
static uint32_t RCC_GetSystemClockFreq(void);
41 
  */
 41 
static uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency);
42 
static uint32_t RCC_GetSystemClockFreq(void);
 42 
static uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency);
43 
static uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency);
 43 
static uint32_t RCC_GetPCLK2ClockFreq(uint32_t HCLK_Frequency);
44 
static uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency);
 44 
static uint32_t RCC_PLL_GetFreqDomain_SYS(void);
45 
static uint32_t RCC_GetPCLK2ClockFreq(uint32_t HCLK_Frequency);
 45 
/**
46 
static uint32_t RCC_PLL_GetFreqDomain_SYS(void);
 46 
  * @}
47 
/**
 47 
  */
48 
  * @}
 48 
 
49 
  */
 49 
 
50 
 
 50 
/* Exported functions --------------------------------------------------------*/
51 
 
 51 
/** @addtogroup RCC_LL_Exported_Functions
52 
/* Exported functions --------------------------------------------------------*/
 52 
  * @{
53 
/** @addtogroup RCC_LL_Exported_Functions
 53 
  */
54 
  * @{
 54 
 
55 
  */
 55 
/** @addtogroup RCC_LL_EF_Init
56 
 
 56 
  * @{
57 
/** @addtogroup RCC_LL_EF_Init
 57 
  */
58 
  * @{
 58 
 
59 
  */
 59 
/**
60 
 
 60 
  * @brief  Reset the RCC clock configuration to the default reset state.
61 
/**
 61 
  * @note   The default reset state of the clock configuration is given below:
62 
  * @brief  Reset the RCC clock configuration to the default reset state.
 62 
  *         - MSI  ON and used as system clock source
63 
  * @note   The default reset state of the clock configuration is given below:
 63 
  *         - HSE, HSI and PLL OFF
64 
  *         - MSI  ON and used as system clock source
 64 
  *         - AHB, APB1 and APB2 prescaler set to 1.
65 
  *         - HSE, HSI and PLL OFF
 65 
  *         - CSS, MCO OFF
66 
  *         - AHB, APB1 and APB2 prescaler set to 1.
 66 
  *         - All interrupts disabled
67 
  *         - CSS, MCO OFF
 67 
  * @note   This function doesn't modify the configuration of the
68 
  *         - All interrupts disabled
 68 
  *         - Peripheral clocks
69 
  * @note   This function doesn't modify the configuration of the
 69 
  *         - LSI, LSE and RTC clocks
70 
  *         - Peripheral clocks
 70 
  * @retval An ErrorStatus enumeration value:
71 
  *         - LSI, LSE and RTC clocks
 71 
  *          - SUCCESS: RCC registers are de-initialized
72 
  * @retval An ErrorStatus enumeration value:
 72 
  *          - ERROR: not applicable
73 
  *          - SUCCESS: RCC registers are de-initialized
 73 
  */
74 
  *          - ERROR: not applicable
 74 
ErrorStatus LL_RCC_DeInit(void)
75 
  */
 75 
{
76 
ErrorStatus LL_RCC_DeInit(void)
 76 
  __IO uint32_t vl_mask;
77 
{
 77 
 
78 
  __IO uint32_t vl_mask;
 78 
  /* Set MSION bit */
79 
 
 79 
  LL_RCC_MSI_Enable();
80 
  /* Set MSION bit */
 80 
 
81 
  LL_RCC_MSI_Enable();
 81 
  /* Insure MSIRDY bit is set before writing default MSIRANGE value */
82 
 
 82 
  while (LL_RCC_MSI_IsReady() == 0U)
83 
  /* Insure MSIRDY bit is set before writing default MSIRANGE value */
 83 
  {
84 
  while (LL_RCC_MSI_IsReady() == 0U)
 84 
    __NOP();
85 
  {
 85 
  }
86 
    __NOP();
 86 
 
87 
  }
 87 
  /* Set MSIRANGE default value */
88 
 
 88 
  LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_5);
89 
  /* Set MSIRANGE default value */
 89 
  /* Set MSITRIM bits to the reset value*/
90 
  LL_RCC_MSI_SetRange(LL_RCC_MSIRANGE_5);
 90 
  LL_RCC_MSI_SetCalibTrimming(0U);
91 
  /* Set MSITRIM bits to the reset value*/
 91 
 
92 
  LL_RCC_MSI_SetCalibTrimming(0U);
 92 
  /* Set HSITRIM bits to the reset value*/
93 
 
 93 
  LL_RCC_HSI_SetCalibTrimming(0x10U);
94 
  /* Set HSITRIM bits to the reset value*/
 94 
 
95 
  LL_RCC_HSI_SetCalibTrimming(0x10U);
 95 
  /* Reset SW, HPRE, PPRE and MCOSEL bits */
96 
 
 96 
  vl_mask = 0xFFFFFFFFU;
97 
  /* Reset SW, HPRE, PPRE and MCOSEL bits */
 97 
  CLEAR_BIT(vl_mask, (RCC_CFGR_SW | RCC_CFGR_HPRE | RCC_CFGR_PPRE1 | RCC_CFGR_PPRE2 | RCC_CFGR_MCOSEL));
98 
  vl_mask = 0xFFFFFFFFU;
 98 
  LL_RCC_WriteReg(CFGR, vl_mask);
99 
  CLEAR_BIT(vl_mask, (RCC_CFGR_SW | RCC_CFGR_HPRE | RCC_CFGR_PPRE1 | RCC_CFGR_PPRE2 | RCC_CFGR_MCOSEL));
 99 
 
100 
  LL_RCC_WriteReg(CFGR, vl_mask);
 100 
  /* Read CR register */
101 
 
 101 
  vl_mask = LL_RCC_ReadReg(CR);
102 
  /* Read CR register */
 102 
 
103 
  vl_mask = LL_RCC_ReadReg(CR);
 103 
  /* Reset HSION, HSEON, CSSON, PLLON bits */
104 
 
 104 
  CLEAR_BIT(vl_mask, (RCC_CR_PLLON | RCC_CR_CSSON | RCC_CR_HSEON | RCC_CR_HSION));
105 
  /* Reset HSION, HSEON, CSSON, PLLON bits */
 105 
  LL_RCC_WriteReg(CR, vl_mask);
106 
  CLEAR_BIT(vl_mask, (RCC_CR_PLLON | RCC_CR_CSSON | RCC_CR_HSEON | RCC_CR_HSION));
 106 
 
107 
  LL_RCC_WriteReg(CR, vl_mask);
 107 
  /* Reset HSEBYP bit */
108 
 
 108 
  LL_RCC_HSE_DisableBypass();
109 
  /* Reset HSEBYP bit */
 109 
 
110 
  LL_RCC_HSE_DisableBypass();
 110 
  /* Insure PLL is disabled before to reset PLLSRC/PLLMUL/PLLDIV in CFGR register */
111 
 
 111 
  while(LL_RCC_PLL_IsReady() != 0U) {};
112 
  /* Insure PLL is disabled before to reset PLLSRC/PLLMUL/PLLDIV in CFGR register */
 112 
 
113 
  while(LL_RCC_PLL_IsReady() != 0U) {};
 113 
  /* Reset CFGR register */
114 
 
 114 
  LL_RCC_WriteReg(CFGR, 0x00000000U);
115 
  /* Reset CFGR register */
 115 
 
116 
  LL_RCC_WriteReg(CFGR, 0x00000000U);
 116 
  /* Disable all interrupts */
117 
 
 117 
  LL_RCC_WriteReg(CIR, 0x00000000U);
118 
  /* Disable all interrupts */
 118 
 
119 
  LL_RCC_WriteReg(CIR, 0x00000000U);
 119 
  /* Clear pending flags */
120 
 
 120 
#if defined(RCC_LSECSS_SUPPORT)
121 
  /* Clear pending flags */
 121 
  vl_mask = (LL_RCC_CIR_LSIRDYC | LL_RCC_CIR_LSERDYC | LL_RCC_CIR_HSIRDYC | LL_RCC_CIR_HSERDYC | \
122 
#if defined(RCC_LSECSS_SUPPORT)
 122 
             LL_RCC_CIR_PLLRDYC | LL_RCC_CIR_MSIRDYC | LL_RCC_CIR_LSECSSC | LL_RCC_CIR_CSSC);
123 
  vl_mask = (LL_RCC_CIR_LSIRDYC | LL_RCC_CIR_LSERDYC | LL_RCC_CIR_HSIRDYC | LL_RCC_CIR_HSERDYC | \
 123 
#else
124 
             LL_RCC_CIR_PLLRDYC | LL_RCC_CIR_MSIRDYC | LL_RCC_CIR_LSECSSC | LL_RCC_CIR_CSSC);
 124 
  vl_mask = (LL_RCC_CIR_LSIRDYC | LL_RCC_CIR_LSERDYC | LL_RCC_CIR_HSIRDYC | LL_RCC_CIR_HSERDYC | \
125 
#else
 125 
             LL_RCC_CIR_PLLRDYC | LL_RCC_CIR_MSIRDYC | LL_RCC_CIR_CSSC);
126 
  vl_mask = (LL_RCC_CIR_LSIRDYC | LL_RCC_CIR_LSERDYC | LL_RCC_CIR_HSIRDYC | LL_RCC_CIR_HSERDYC | \
 126 
#endif /* RCC_LSECSS_SUPPORT */
127 
             LL_RCC_CIR_PLLRDYC | LL_RCC_CIR_MSIRDYC | LL_RCC_CIR_CSSC);
 127 
  LL_RCC_WriteReg(CIR, vl_mask);
128 
#endif /* RCC_LSECSS_SUPPORT */
 128 
 
129 
  LL_RCC_WriteReg(CIR, vl_mask);
 129 
  /* Clear reset flags */
130 
 
 130 
  LL_RCC_ClearResetFlags();
131 
  /* Clear reset flags */
 131 
 
132 
  LL_RCC_ClearResetFlags();
 132 
  return SUCCESS;
133 
 
 133 
}
134 
  return SUCCESS;
 134 
 
135 
}
 135 
/**
136 
 
 136 
  * @}
137 
/**
 137 
  */
138 
  * @}
 138 
 
139 
  */
 139 
/** @addtogroup RCC_LL_EF_Get_Freq
140 
 
 140 
  * @brief  Return the frequencies of different on chip clocks;  System, AHB, APB1 and APB2 buses clocks
141 
/** @addtogroup RCC_LL_EF_Get_Freq
 141 
  *         and different peripheral clocks available on the device.
142 
  * @brief  Return the frequencies of different on chip clocks;  System, AHB, APB1 and APB2 buses clocks
 142 
  * @note   If SYSCLK source is MSI, function returns values based on MSI clock(*)
143 
  *         and different peripheral clocks available on the device.
 143 
  * @note   If SYSCLK source is HSI, function returns values based on HSI_VALUE(**)
144 
  * @note   If SYSCLK source is MSI, function returns values based on MSI clock(*)
 144 
  * @note   If SYSCLK source is HSE, function returns values based on HSE_VALUE(***)
145 
  * @note   If SYSCLK source is HSI, function returns values based on HSI_VALUE(**)
 145 
  * @note   If SYSCLK source is PLL, function returns values based on
146 
  * @note   If SYSCLK source is HSE, function returns values based on HSE_VALUE(***)
 146 
  *         HSI_VALUE(**) or HSE_VALUE(***) multiplied/divided by the PLL factors.
147 
  * @note   If SYSCLK source is PLL, function returns values based on
 147 
  * @note   (*) MSI clock depends on the selected MSI range but the real value
148 
  *         HSI_VALUE(**) or HSE_VALUE(***) multiplied/divided by the PLL factors.
 148 
  *             may vary depending on the variations in voltage and temperature.
149 
  * @note   (*) MSI clock depends on the selected MSI range but the real value
 149 
  * @note   (**) HSI_VALUE is a defined constant but the real value may vary
150 
  *             may vary depending on the variations in voltage and temperature.
 150 
  *              depending on the variations in voltage and temperature.
151 
  * @note   (**) HSI_VALUE is a defined constant but the real value may vary
 151 
  * @note   (***) HSE_VALUE is a defined constant, user has to ensure that
152 
  *              depending on the variations in voltage and temperature.
 152 
  *               HSE_VALUE is same as the real frequency of the crystal used.
153 
  * @note   (***) HSE_VALUE is a defined constant, user has to ensure that
 153 
  *               Otherwise, this function may have wrong result.
154 
  *               HSE_VALUE is same as the real frequency of the crystal used.
 154 
  * @note   The result of this function could be incorrect when using fractional
155 
  *               Otherwise, this function may have wrong result.
 155 
  *         value for HSE crystal.
156 
  * @note   The result of this function could be incorrect when using fractional
 156 
  * @note   This function can be used by the user application to compute the
157 
  *         value for HSE crystal.
 157 
  *         baud-rate for the communication peripherals or configure other parameters.
158 
  * @note   This function can be used by the user application to compute the
 158 
  * @{
159 
  *         baud-rate for the communication peripherals or configure other parameters.
 159 
  */
160 
  * @{
 160 
 
161 
  */
 161 
/**
162 
 
 162 
  * @brief  Return the frequencies of different on chip clocks;  System, AHB, APB1 and APB2 buses clocks
163 
/**
 163 
  * @note   Each time SYSCLK, HCLK, PCLK1 and/or PCLK2 clock changes, this function
164 
  * @brief  Return the frequencies of different on chip clocks;  System, AHB, APB1 and APB2 buses clocks
 164 
  *         must be called to update structure fields. Otherwise, any
165 
  * @note   Each time SYSCLK, HCLK, PCLK1 and/or PCLK2 clock changes, this function
 165 
  *         configuration based on this function will be incorrect.
166 
  *         must be called to update structure fields. Otherwise, any
 166 
  * @param  RCC_Clocks pointer to a @ref LL_RCC_ClocksTypeDef structure which will hold the clocks frequencies
167 
  *         configuration based on this function will be incorrect.
 167 
  * @retval None
168 
  * @param  RCC_Clocks pointer to a @ref LL_RCC_ClocksTypeDef structure which will hold the clocks frequencies
 168 
  */
169 
  * @retval None
 169 
void LL_RCC_GetSystemClocksFreq(LL_RCC_ClocksTypeDef *RCC_Clocks)
170 
  */
 170 
{
171 
void LL_RCC_GetSystemClocksFreq(LL_RCC_ClocksTypeDef *RCC_Clocks)
 171 
  /* Get SYSCLK frequency */
172 
{
 172 
  RCC_Clocks->SYSCLK_Frequency = RCC_GetSystemClockFreq();
173 
  /* Get SYSCLK frequency */
 173 
 
174 
  RCC_Clocks->SYSCLK_Frequency = RCC_GetSystemClockFreq();
 174 
  /* HCLK clock frequency */
175 
 
 175 
  RCC_Clocks->HCLK_Frequency   = RCC_GetHCLKClockFreq(RCC_Clocks->SYSCLK_Frequency);
176 
  /* HCLK clock frequency */
 176 
 
177 
  RCC_Clocks->HCLK_Frequency   = RCC_GetHCLKClockFreq(RCC_Clocks->SYSCLK_Frequency);
 177 
  /* PCLK1 clock frequency */
178 
 
 178 
  RCC_Clocks->PCLK1_Frequency  = RCC_GetPCLK1ClockFreq(RCC_Clocks->HCLK_Frequency);
179 
  /* PCLK1 clock frequency */
 179 
 
180 
  RCC_Clocks->PCLK1_Frequency  = RCC_GetPCLK1ClockFreq(RCC_Clocks->HCLK_Frequency);
 180 
  /* PCLK2 clock frequency */
181 
 
 181 
  RCC_Clocks->PCLK2_Frequency  = RCC_GetPCLK2ClockFreq(RCC_Clocks->HCLK_Frequency);
182 
  /* PCLK2 clock frequency */
 182 
}
183 
  RCC_Clocks->PCLK2_Frequency  = RCC_GetPCLK2ClockFreq(RCC_Clocks->HCLK_Frequency);
 183 
 
184 
}
 184 
/**
185 
 
 185 
  * @}
186 
/**
 186 
  */
187 
  * @}
 187 
 
188 
  */
 188 
/**
189 
 
 189 
  * @}
190 
/**
 190 
  */
191 
  * @}
 191 
 
192 
  */
 192 
/** @addtogroup RCC_LL_Private_Functions
193 
 
 193 
  * @{
194 
/** @addtogroup RCC_LL_Private_Functions
 194 
  */
195 
  * @{
 195 
 
196 
  */
 196 
/**
197 
 
 197 
  * @brief  Return SYSTEM clock frequency
198 
/**
 198 
  * @retval SYSTEM clock frequency (in Hz)
199 
  * @brief  Return SYSTEM clock frequency
 199 
  */
200 
  * @retval SYSTEM clock frequency (in Hz)
 200 
static uint32_t RCC_GetSystemClockFreq(void)
201 
  */
 201 
{
202 
static uint32_t RCC_GetSystemClockFreq(void)
 202 
  uint32_t frequency;
203 
{
 203 
 
204 
  uint32_t frequency;
 204 
  /* Get SYSCLK source -------------------------------------------------------*/
205 
 
 205 
  switch (LL_RCC_GetSysClkSource())
206 
  /* Get SYSCLK source -------------------------------------------------------*/
 206 
  {
207 
  switch (LL_RCC_GetSysClkSource())
 207 
    case LL_RCC_SYS_CLKSOURCE_STATUS_MSI:  /* MSI used as system clock source */
208 
  {
 208 
      frequency = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_GetRange());
209 
    case LL_RCC_SYS_CLKSOURCE_STATUS_MSI:  /* MSI used as system clock source */
 209 
      break;
210 
      frequency = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_GetRange());
 210 
 
211 
      break;
 211 
    case LL_RCC_SYS_CLKSOURCE_STATUS_HSI:  /* HSI used as system clock  source */
212 
 
 212 
      frequency = HSI_VALUE;
213 
    case LL_RCC_SYS_CLKSOURCE_STATUS_HSI:  /* HSI used as system clock  source */
 213 
      break;
214 
      frequency = HSI_VALUE;
 214 
 
215 
      break;
 215 
    case LL_RCC_SYS_CLKSOURCE_STATUS_HSE:  /* HSE used as system clock  source */
216 
 
 216 
      frequency = HSE_VALUE;
217 
    case LL_RCC_SYS_CLKSOURCE_STATUS_HSE:  /* HSE used as system clock  source */
 217 
      break;
218 
      frequency = HSE_VALUE;
 218 
 
219 
      break;
 219 
    case LL_RCC_SYS_CLKSOURCE_STATUS_PLL:  /* PLL used as system clock  source */
220 
 
 220 
      frequency = RCC_PLL_GetFreqDomain_SYS();
221 
    case LL_RCC_SYS_CLKSOURCE_STATUS_PLL:  /* PLL used as system clock  source */
 221 
      break;
222 
      frequency = RCC_PLL_GetFreqDomain_SYS();
 222 
 
223 
      break;
 223 
    default:
224 
 
 224 
      frequency = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_GetRange());
225 
    default:
 225 
      break;
226 
      frequency = __LL_RCC_CALC_MSI_FREQ(LL_RCC_MSI_GetRange());
 226 
  }
227 
      break;
 227 
 
228 
  }
 228 
  return frequency;
229 
 
 229 
}
230 
  return frequency;
 230 
 
231 
}
 231 
/**
232 
 
 232 
  * @brief  Return HCLK clock frequency
233 
/**
 233 
  * @param  SYSCLK_Frequency SYSCLK clock frequency
234 
  * @brief  Return HCLK clock frequency
 234 
  * @retval HCLK clock frequency (in Hz)
235 
  * @param  SYSCLK_Frequency SYSCLK clock frequency
 235 
  */
236 
  * @retval HCLK clock frequency (in Hz)
 236 
static uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency)
237 
  */
 237 
{
238 
static uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency)
 238 
  /* HCLK clock frequency */
239 
{
 239 
  return __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, LL_RCC_GetAHBPrescaler());
240 
  /* HCLK clock frequency */
 240 
}
241 
  return __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, LL_RCC_GetAHBPrescaler());
 241 
 
242 
}
 242 
/**
243 
 
 243 
  * @brief  Return PCLK1 clock frequency
244 
/**
 244 
  * @param  HCLK_Frequency HCLK clock frequency
245 
  * @brief  Return PCLK1 clock frequency
 245 
  * @retval PCLK1 clock frequency (in Hz)
246 
  * @param  HCLK_Frequency HCLK clock frequency
 246 
  */
247 
  * @retval PCLK1 clock frequency (in Hz)
 247 
static uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency)
248 
  */
 248 
{
249 
static uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency)
 249 
  /* PCLK1 clock frequency */
250 
{
 250 
  return __LL_RCC_CALC_PCLK1_FREQ(HCLK_Frequency, LL_RCC_GetAPB1Prescaler());
251 
  /* PCLK1 clock frequency */
 251 
}
252 
  return __LL_RCC_CALC_PCLK1_FREQ(HCLK_Frequency, LL_RCC_GetAPB1Prescaler());
 252 
 
253 
}
 253 
/**
254 
 
 254 
  * @brief  Return PCLK2 clock frequency
255 
/**
 255 
  * @param  HCLK_Frequency HCLK clock frequency
256 
  * @brief  Return PCLK2 clock frequency
 256 
  * @retval PCLK2 clock frequency (in Hz)
257 
  * @param  HCLK_Frequency HCLK clock frequency
 257 
  */
258 
  * @retval PCLK2 clock frequency (in Hz)
 258 
static uint32_t RCC_GetPCLK2ClockFreq(uint32_t HCLK_Frequency)
259 
  */
 259 
{
260 
static uint32_t RCC_GetPCLK2ClockFreq(uint32_t HCLK_Frequency)
 260 
  /* PCLK2 clock frequency */
261 
{
 261 
  return __LL_RCC_CALC_PCLK2_FREQ(HCLK_Frequency, LL_RCC_GetAPB2Prescaler());
262 
  /* PCLK2 clock frequency */
 262 
}
263 
  return __LL_RCC_CALC_PCLK2_FREQ(HCLK_Frequency, LL_RCC_GetAPB2Prescaler());
 263 
 
264 
}
 264 
/**
265 
 
 265 
  * @brief  Return PLL clock frequency used for system domain
266 
/**
 266 
  * @retval PLL clock frequency (in Hz)
267 
  * @brief  Return PLL clock frequency used for system domain
 267 
  */
268 
  * @retval PLL clock frequency (in Hz)
 268 
static uint32_t RCC_PLL_GetFreqDomain_SYS(void)
269 
  */
 269 
{
270 
static uint32_t RCC_PLL_GetFreqDomain_SYS(void)
 270 
  uint32_t pllsource, pllinputfreq;
271 
{
 271 
 
272 
  uint32_t pllsource, pllinputfreq;
 272 
  /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL divider) * PLL Multiplicator */
273 
 
 273 
 
274 
  /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL divider) * PLL Multiplicator */
 274 
  /* Get PLL source */
275 
 
 275 
  pllsource = LL_RCC_PLL_GetMainSource();
276 
  /* Get PLL source */
 276 
 
277 
  pllsource = LL_RCC_PLL_GetMainSource();
 277 
  switch (pllsource)
278 
 
 278 
  {
279 
  switch (pllsource)
 279 
    case LL_RCC_PLLSOURCE_HSI:       /* HSI used as PLL clock source */
280 
  {
 280 
      pllinputfreq = HSI_VALUE;
281 
    case LL_RCC_PLLSOURCE_HSI:       /* HSI used as PLL clock source */
 281 
      break;
282 
      pllinputfreq = HSI_VALUE;
 282 
 
283 
      break;
 283 
    case LL_RCC_PLLSOURCE_HSE:       /* HSE used as PLL clock source */
284 
 
 284 
      pllinputfreq = HSE_VALUE;
285 
    case LL_RCC_PLLSOURCE_HSE:       /* HSE used as PLL clock source */
 285 
      break;
286 
      pllinputfreq = HSE_VALUE;
 286 
 
287 
      break;
 287 
    default:
288 
 
 288 
      pllinputfreq = HSI_VALUE;
289 
    default:
 289 
      break;
290 
      pllinputfreq = HSI_VALUE;
 290 
  }
291 
      break;
 291 
  return __LL_RCC_CALC_PLLCLK_FREQ(pllinputfreq, LL_RCC_PLL_GetMultiplicator(), LL_RCC_PLL_GetDivider());
292 
  }
 292 
}
293 
  return __LL_RCC_CALC_PLLCLK_FREQ(pllinputfreq, LL_RCC_PLL_GetMultiplicator(), LL_RCC_PLL_GetDivider());
 293 
/**
294 
}
 294 
  * @}
295 
/**
 295 
  */
296 
  * @}
 296 
 
297 
  */
 297 
/**
298 
 
 298 
  * @}
299 
/**
 299 
  */
300 
  * @}
 300 
 
301 
  */
 301 
#endif /* defined(RCC) */
302 
 
 302 
 
303 
#endif /* defined(RCC) */
 303 
/**
304 
 
 304 
  * @}
305 
/**
 305 
  */
306 
  * @}
 306 
 
307 
  */
 307 
#endif /* USE_FULL_LL_DRIVER */
308 
 
 308 
 
309 
#endif /* USE_FULL_LL_DRIVER */
 - 
 
310 
 
 - 
 
311 
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 -