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/**
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/**
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  ******************************************************************************
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  ******************************************************************************
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  * @file    stm32l1xx_hal_spi.c
 3 
  * @file    stm32l1xx_hal_spi.c
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  * @author  MCD Application Team
 4 
  * @author  MCD Application Team
5 
  * @version V1.2.0
 - 
 
6 
  * @date    01-July-2016
 - 
 
7 
  * @brief   SPI HAL module driver.
 5 
  * @brief   SPI HAL module driver.
8 
  *    
 - 
 
9 
  *          This file provides firmware functions to manage the following
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  *          This file provides firmware functions to manage the following
10 
  *          functionalities of the Serial Peripheral Interface (SPI) peripheral:
 7 
  *          functionalities of the Serial Peripheral Interface (SPI) peripheral:
11 
  *           + Initialization and de-initialization functions
 8 
  *           + Initialization and de-initialization functions
12 
  *           + IO operation functions
 9 
  *           + IO operation functions
13 
  *           + Peripheral Control functions
 10 
  *           + Peripheral Control functions
14 
  *           + Peripheral State functions
 11 
  *           + Peripheral State functions
- 
 
 12 
  *
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  @verbatim
 13 
  @verbatim
16 
  ==============================================================================
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  ==============================================================================
17 
                        ##### How to use this driver #####
 15 
                        ##### How to use this driver #####
18 
  ==============================================================================
 16 
  ==============================================================================
19 
    [..]
 17 
    [..]
20 
      The SPI HAL driver can be used as follows:
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      The SPI HAL driver can be used as follows:
21 
 
 19 
 
22 
      (#) Declare a SPI_HandleTypeDef handle structure, for example:
 20 
      (#) Declare a SPI_HandleTypeDef handle structure, for example:
23 
          SPI_HandleTypeDef  hspi;
 21 
          SPI_HandleTypeDef  hspi;
24 
 
 22 
 
25 
      (#)Initialize the SPI low level resources by implementing the HAL_SPI_MspInit ()API:
 23 
      (#)Initialize the SPI low level resources by implementing the HAL_SPI_MspInit() API:
26 
          (##) Enable the SPIx interface clock
 24 
          (##) Enable the SPIx interface clock
27 
          (##) SPI pins configuration
 25 
          (##) SPI pins configuration
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              (+++) Enable the clock for the SPI GPIOs
 26 
              (+++) Enable the clock for the SPI GPIOs
29 
              (+++) Configure these SPI pins as alternate function push-pull
 27 
              (+++) Configure these SPI pins as alternate function push-pull
30 
          (##) NVIC configuration if you need to use interrupt process
 28 
          (##) NVIC configuration if you need to use interrupt process
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              (+++) Configure the SPIx interrupt priority
 29 
              (+++) Configure the SPIx interrupt priority
32 
              (+++) Enable the NVIC SPI IRQ handle
 30 
              (+++) Enable the NVIC SPI IRQ handle
33 
          (##) DMA Configuration if you need to use DMA process
 31 
          (##) DMA Configuration if you need to use DMA process
34 
              (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive Channel
 32 
              (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive Stream/Channel
35 
              (+++) Enable the DMAx clock
 33 
              (+++) Enable the DMAx clock
36 
              (+++) Configure the DMA handle parameters
 34 
              (+++) Configure the DMA handle parameters
37 
              (+++) Configure the DMA Tx or Rx Channel
 35 
              (+++) Configure the DMA Tx or Rx Stream/Channel
38 
              (+++) Associate the initilalized hdma_tx(or _rx) handle to the hspi DMA Tx (or Rx) handle
 36 
              (+++) Associate the initialized hdma_tx(or _rx)  handle to the hspi DMA Tx or Rx handle
39 
              (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx Channel
 37 
              (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx Stream/Channel
40 
 
 38 
 
41 
      (#) Program the Mode, Direction , Data size, Baudrate Prescaler, NSS
 39 
      (#) Program the Mode, BidirectionalMode , Data size, Baudrate Prescaler, NSS
42 
          management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure.
 40 
          management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure.
43 
 
 41 
 
44 
      (#) Initialize the SPI registers by calling the HAL_SPI_Init() API:
 42 
      (#) Initialize the SPI registers by calling the HAL_SPI_Init() API:
45 
          (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
 43 
          (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
46 
              by calling the customed HAL_SPI_MspInit() API.
 44 
              by calling the customized HAL_SPI_MspInit() API.
47 
     [..]
 45 
     [..]
48 
       Circular mode restriction:
 46 
       Circular mode restriction:
49 
      (#) The DMA circular mode cannot be used when the SPI is configured in these modes:
 47 
      (#) The DMA circular mode cannot be used when the SPI is configured in these modes:
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          (##) Master 2Lines RxOnly
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          (##) Master 2Lines RxOnly
51 
          (##) Master 1Line Rx
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          (##) Master 1Line Rx
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      (#) The CRC feature is not managed when the DMA circular mode is enabled
 50 
      (#) The CRC feature is not managed when the DMA circular mode is enabled
53 
      (#) When the SPI DMA Pause/Stop features are used, we must use the following APIs
 51 
      (#) When the SPI DMA Pause/Stop features are used, we must use the following APIs
54 
          the HAL_SPI_DMAPause()/ HAL_SPI_DMAStop() only under the SPI callbacks
 52 
          the HAL_SPI_DMAPause()/ HAL_SPI_DMAStop() only under the SPI callbacks
- 
 
 53 
     [..]
- 
 
 54 
       Master Receive mode restriction:
- 
 
 55 
      (#) In Master unidirectional receive-only mode (MSTR =1, BIDIMODE=0, RXONLY=1) or
- 
 
 56 
          bidirectional receive mode (MSTR=1, BIDIMODE=1, BIDIOE=0), to ensure that the SPI
- 
 
 57 
          does not initiate a new transfer the following procedure has to be respected:
- 
 
 58 
          (##) HAL_SPI_DeInit()
- 
 
 59 
          (##) HAL_SPI_Init()
- 
 
 60 
     [..]
- 
 
 61 
       Callback registration:
55 
 
 62 
 
- 
 
 63 
      (#) The compilation flag USE_HAL_SPI_REGISTER_CALLBACKS when set to 1U
- 
 
 64 
          allows the user to configure dynamically the driver callbacks.
- 
 
 65 
          Use Functions HAL_SPI_RegisterCallback() to register an interrupt callback.
- 
 
 66 
 
- 
 
 67 
          Function HAL_SPI_RegisterCallback() allows to register following callbacks:
- 
 
 68 
            (++) TxCpltCallback        : SPI Tx Completed callback
- 
 
 69 
            (++) RxCpltCallback        : SPI Rx Completed callback
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 70 
            (++) TxRxCpltCallback      : SPI TxRx Completed callback
- 
 
 71 
            (++) TxHalfCpltCallback    : SPI Tx Half Completed callback
- 
 
 72 
            (++) RxHalfCpltCallback    : SPI Rx Half Completed callback
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 73 
            (++) TxRxHalfCpltCallback  : SPI TxRx Half Completed callback
- 
 
 74 
            (++) ErrorCallback         : SPI Error callback
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 75 
            (++) AbortCpltCallback     : SPI Abort callback
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 76 
            (++) MspInitCallback       : SPI Msp Init callback
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 77 
            (++) MspDeInitCallback     : SPI Msp DeInit callback
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 78 
          This function takes as parameters the HAL peripheral handle, the Callback ID
- 
 
 79 
          and a pointer to the user callback function.
- 
 
 80 
 
- 
 
 81 
 
- 
 
 82 
      (#) Use function HAL_SPI_UnRegisterCallback to reset a callback to the default
- 
 
 83 
          weak function.
- 
 
 84 
          HAL_SPI_UnRegisterCallback takes as parameters the HAL peripheral handle,
- 
 
 85 
          and the Callback ID.
- 
 
 86 
          This function allows to reset following callbacks:
- 
 
 87 
            (++) TxCpltCallback        : SPI Tx Completed callback
- 
 
 88 
            (++) RxCpltCallback        : SPI Rx Completed callback
- 
 
 89 
            (++) TxRxCpltCallback      : SPI TxRx Completed callback
- 
 
 90 
            (++) TxHalfCpltCallback    : SPI Tx Half Completed callback
- 
 
 91 
            (++) RxHalfCpltCallback    : SPI Rx Half Completed callback
- 
 
 92 
            (++) TxRxHalfCpltCallback  : SPI TxRx Half Completed callback
- 
 
 93 
            (++) ErrorCallback         : SPI Error callback
- 
 
 94 
            (++) AbortCpltCallback     : SPI Abort callback
- 
 
 95 
            (++) MspInitCallback       : SPI Msp Init callback
- 
 
 96 
            (++) MspDeInitCallback     : SPI Msp DeInit callback
- 
 
 97 
 
- 
 
 98 
       [..]
- 
 
 99 
       By default, after the HAL_SPI_Init() and when the state is HAL_SPI_STATE_RESET
- 
 
 100 
       all callbacks are set to the corresponding weak functions:
- 
 
 101 
       examples HAL_SPI_MasterTxCpltCallback(), HAL_SPI_MasterRxCpltCallback().
- 
 
 102 
       Exception done for MspInit and MspDeInit functions that are
- 
 
 103 
       reset to the legacy weak functions in the HAL_SPI_Init()/ HAL_SPI_DeInit() only when
- 
 
 104 
       these callbacks are null (not registered beforehand).
- 
 
 105 
       If MspInit or MspDeInit are not null, the HAL_SPI_Init()/ HAL_SPI_DeInit()
- 
 
 106 
       keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
- 
 
 107 
 
- 
 
 108 
       [..]
- 
 
 109 
       Callbacks can be registered/unregistered in HAL_SPI_STATE_READY state only.
- 
 
 110 
       Exception done MspInit/MspDeInit functions that can be registered/unregistered
- 
 
 111 
       in HAL_SPI_STATE_READY or HAL_SPI_STATE_RESET state,
- 
 
 112 
       thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
- 
 
 113 
       Then, the user first registers the MspInit/MspDeInit user callbacks
- 
 
 114 
       using HAL_SPI_RegisterCallback() before calling HAL_SPI_DeInit()
- 
 
 115 
       or HAL_SPI_Init() function.
- 
 
 116 
 
- 
 
 117 
       [..]
- 
 
 118 
       When the compilation define USE_HAL_PPP_REGISTER_CALLBACKS is set to 0 or
- 
 
 119 
       not defined, the callback registering feature is not available
- 
 
 120 
       and weak (surcharged) callbacks are used.
- 
 
 121 
 
- 
 
 122 
     [..]
- 
 
 123 
       Using the HAL it is not possible to reach all supported SPI frequency with the different SPI Modes,
- 
 
 124 
       the following table resume the max SPI frequency reached with data size 8bits/16bits,
- 
 
 125 
         according to frequency of the APBx Peripheral Clock (fPCLK) used by the SPI instance.
56 
 
 126 
 
57 
           
 - 
 
58 
  @endverbatim
 127 
  @endverbatim
- 
 
 128 
 
- 
 
 129 
  Additional table :
- 
 
 130 
 
- 
 
 131 
       DataSize = SPI_DATASIZE_8BIT:
- 
 
 132 
       +----------------------------------------------------------------------------------------------+
- 
 
 133 
       |         |                | 2Lines Fullduplex   |     2Lines RxOnly    |         1Line        |
- 
 
 134 
       | Process | Transfer mode  |---------------------|----------------------|----------------------|
- 
 
 135 
       |         |                |  Master  |  Slave   |  Master   |  Slave   |  Master   |  Slave   |
- 
 
 136 
       |==============================================================================================|
- 
 
 137 
       |    T    |     Polling    | Fpclk/2  | Fpclk/2  |    NA     |    NA    |    NA     |   NA     |
- 
 
 138 
       |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
- 
 
 139 
       |    /    |     Interrupt  | Fpclk/4  | Fpclk/8  |    NA     |    NA    |    NA     |   NA     |
- 
 
 140 
       |    R    |----------------|----------|----------|-----------|----------|-----------|----------|
- 
 
 141 
       |    X    |       DMA      | Fpclk/2  | Fpclk/2  |    NA     |    NA    |    NA     |   NA     |
- 
 
 142 
       |=========|================|==========|==========|===========|==========|===========|==========|
- 
 
 143 
       |         |     Polling    | Fpclk/2  | Fpclk/2  | Fpclk/64  | Fpclk/2  | Fpclk/64  | Fpclk/2  |
- 
 
 144 
       |         |----------------|----------|----------|-----------|----------|-----------|----------|
- 
 
 145 
       |    R    |     Interrupt  | Fpclk/8  | Fpclk/8  | Fpclk/64  | Fpclk/2  | Fpclk/64  | Fpclk/2  |
- 
 
 146 
       |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
- 
 
 147 
       |         |       DMA      | Fpclk/2  | Fpclk/2  | Fpclk/64  | Fpclk/2  | Fpclk/128 | Fpclk/2  |
- 
 
 148 
       |=========|================|==========|==========|===========|==========|===========|==========|
- 
 
 149 
       |         |     Polling    | Fpclk/2  | Fpclk/4  |     NA    |    NA    | Fpclk/2   | Fpclk/64 |
- 
 
 150 
       |         |----------------|----------|----------|-----------|----------|-----------|----------|
- 
 
 151 
       |    T    |     Interrupt  | Fpclk/2  | Fpclk/4  |     NA    |    NA    | Fpclk/2   | Fpclk/64 |
- 
 
 152 
       |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
- 
 
 153 
       |         |       DMA      | Fpclk/2  | Fpclk/2  |     NA    |    NA    | Fpclk/2   | Fpclk/128|
- 
 
 154 
       +----------------------------------------------------------------------------------------------+
- 
 
 155 
 
- 
 
 156 
       DataSize = SPI_DATASIZE_16BIT:
- 
 
 157 
       +----------------------------------------------------------------------------------------------+
- 
 
 158 
       |         |                | 2Lines Fullduplex   |     2Lines RxOnly    |         1Line        |
- 
 
 159 
       | Process | Transfer mode  |---------------------|----------------------|----------------------|
- 
 
 160 
       |         |                |  Master  |  Slave   |  Master   |  Slave   |  Master   |  Slave   |
- 
 
 161 
       |==============================================================================================|
- 
 
 162 
       |    T    |     Polling    | Fpclk/2  | Fpclk/2  |    NA     |    NA    |    NA     |   NA     |
- 
 
 163 
       |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
- 
 
 164 
       |    /    |     Interrupt  | Fpclk/4  | Fpclk/4  |    NA     |    NA    |    NA     |   NA     |
- 
 
 165 
       |    R    |----------------|----------|----------|-----------|----------|-----------|----------|
- 
 
 166 
       |    X    |       DMA      | Fpclk/2  | Fpclk/2  |    NA     |    NA    |    NA     |   NA     |
- 
 
 167 
       |=========|================|==========|==========|===========|==========|===========|==========|
- 
 
 168 
       |         |     Polling    | Fpclk/2  | Fpclk/2  | Fpclk/64  | Fpclk/2  | Fpclk/32  | Fpclk/2  |
- 
 
 169 
       |         |----------------|----------|----------|-----------|----------|-----------|----------|
- 
 
 170 
       |    R    |     Interrupt  | Fpclk/4  | Fpclk/4  | Fpclk/64  | Fpclk/2  | Fpclk/64  | Fpclk/2  |
- 
 
 171 
       |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
- 
 
 172 
       |         |       DMA      | Fpclk/2  | Fpclk/2  | Fpclk/64  | Fpclk/2  | Fpclk/128 | Fpclk/2  |
- 
 
 173 
       |=========|================|==========|==========|===========|==========|===========|==========|
- 
 
 174 
       |         |     Polling    | Fpclk/2  | Fpclk/2  |     NA    |    NA    | Fpclk/2   | Fpclk/32 |
- 
 
 175 
       |         |----------------|----------|----------|-----------|----------|-----------|----------|
- 
 
 176 
       |    T    |     Interrupt  | Fpclk/2  | Fpclk/2  |     NA    |    NA    | Fpclk/2   | Fpclk/64 |
- 
 
 177 
       |    X    |----------------|----------|----------|-----------|----------|-----------|----------|
- 
 
 178 
       |         |       DMA      | Fpclk/2  | Fpclk/2  |     NA    |    NA    | Fpclk/2   | Fpclk/128|
- 
 
 179 
       +----------------------------------------------------------------------------------------------+
- 
 
 180 
       @note The max SPI frequency depend on SPI data size (8bits, 16bits),
- 
 
 181 
             SPI mode(2 Lines fullduplex, 2 lines RxOnly, 1 line TX/RX) and Process mode (Polling, IT, DMA).
- 
 
 182 
       @note
- 
 
 183 
            (#) TX/RX processes are HAL_SPI_TransmitReceive(), HAL_SPI_TransmitReceive_IT() and HAL_SPI_TransmitReceive_DMA()
- 
 
 184 
            (#) RX processes are HAL_SPI_Receive(), HAL_SPI_Receive_IT() and HAL_SPI_Receive_DMA()
- 
 
 185 
            (#) TX processes are HAL_SPI_Transmit(), HAL_SPI_Transmit_IT() and HAL_SPI_Transmit_DMA()
- 
 
 186 
 
59 
  ******************************************************************************
 187 
  ******************************************************************************
60 
  * @attention
 188 
  * @attention
61 
  *
 189 
  *
62 
  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
 190 
  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
63 
  *
 - 
 
64 
  * Redistribution and use in source and binary forms, with or without modification,
 - 
 
65 
  * are permitted provided that the following conditions are met:
 - 
 
66 
  *   1. Redistributions of source code must retain the above copyright notice,
 - 
 
67 
  *      this list of conditions and the following disclaimer.
 - 
 
68 
  *   2. Redistributions in binary form must reproduce the above copyright notice,
 - 
 
69 
  *      this list of conditions and the following disclaimer in the documentation
 - 
 
70 
  *      and/or other materials provided with the distribution.
 - 
 
71 
  *   3. Neither the name of STMicroelectronics nor the names of its contributors
 - 
 
72 
  *      may be used to endorse or promote products derived from this software
 - 
 
73 
  *      without specific prior written permission.
 191 
  * All rights reserved.</center></h2>
74 
  *
 192 
  *
75 
  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 193 
  * This software component is licensed by ST under BSD 3-Clause license,
76 
  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 - 
 
77 
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 - 
 
78 
  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
 - 
 
79 
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 - 
 
80 
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 194 
  * the "License"; You may not use this file except in compliance with the
81 
  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
 195 
  * License. You may obtain a copy of the License at:
82 
  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
 - 
 
83 
  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 - 
 
84 
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 196 
  *                        opensource.org/licenses/BSD-3-Clause
85 
  *
 197 
  *
86 
  ******************************************************************************
 198 
  ******************************************************************************
87 
  */
 199 
  */
88 
 
 200 
 
89 
/* Includes ------------------------------------------------------------------*/
 201 
/* Includes ------------------------------------------------------------------*/
Line 95... Line 207...
95 
 
 207 
 
96 
/** @defgroup SPI SPI
 208 
/** @defgroup SPI SPI
97 
  * @brief SPI HAL module driver
 209 
  * @brief SPI HAL module driver
98 
  * @{
 210 
  * @{
99 
  */
 211 
  */
100 
 
 - 
 
101 
#ifdef HAL_SPI_MODULE_ENABLED
 212 
#ifdef HAL_SPI_MODULE_ENABLED
102 
 
 213 
 
103 
/* Private typedef -----------------------------------------------------------*/
 214 
/* Private typedef -----------------------------------------------------------*/
104 
/* Private define ------------------------------------------------------------*/
 215 
/* Private defines -----------------------------------------------------------*/
105 
/** @defgroup SPI_Private_Constants SPI Private Constants
 216 
/** @defgroup SPI_Private_Constants SPI Private Constants
106 
  * @{
 217 
  * @{
107 
  */
 218 
  */
108 
#define SPI_TIMEOUT_VALUE  10
 219 
#define SPI_DEFAULT_TIMEOUT 100U
- 
 
 220 
#define SPI_BSY_FLAG_WORKAROUND_TIMEOUT 1000U /*!< Timeout 1000 µs             */
109 
/**
 221 
/**
110 
  * @}
 222 
  * @}
111 
  */
 223 
  */
112 
 
 224 
 
113 
/* Private macro -------------------------------------------------------------*/
 225 
/* Private macros ------------------------------------------------------------*/
114 
/* Private variables ---------------------------------------------------------*/
 226 
/* Private variables ---------------------------------------------------------*/
115 
/* Private function prototypes -----------------------------------------------*/
 227 
/* Private function prototypes -----------------------------------------------*/
116 
/** @defgroup SPI_Private_Functions SPI Private Functions
 228 
/** @defgroup SPI_Private_Functions SPI Private Functions
117 
  * @{
 229 
  * @{
118 
  */
 230 
  */
- 
 
 231 
static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma);
- 
 
 232 
static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
- 
 
 233 
static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma);
- 
 
 234 
static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma);
- 
 
 235 
static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma);
- 
 
 236 
static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma);
119 
 
 - 
 
- 
 
 237 
static void SPI_DMAError(DMA_HandleTypeDef *hdma);
- 
 
 238 
static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma);
- 
 
 239 
static void SPI_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
- 
 
 240 
static void SPI_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
- 
 
 241 
static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus State,
- 
 
 242 
                                                       uint32_t Timeout, uint32_t Tickstart);
- 
 
 243 
static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
120 
static void SPI_TxCloseIRQHandler(struct __SPI_HandleTypeDef *hspi);
 244 
static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
121 
static void SPI_TxISR(struct __SPI_HandleTypeDef *hspi);
 245 
static void SPI_RxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
122 
static void SPI_RxCloseIRQHandler(struct __SPI_HandleTypeDef *hspi);
 246 
static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
123 
static void SPI_2LinesRxISR(struct __SPI_HandleTypeDef *hspi);
 247 
static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
124 
static void SPI_RxISR(struct __SPI_HandleTypeDef *hspi);
 248 
static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
125 
static void SPI_DMATransmitCplt(struct __DMA_HandleTypeDef *hdma);
 249 
static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
126 
static void SPI_DMAReceiveCplt(struct __DMA_HandleTypeDef *hdma);
 250 
static void SPI_2linesRxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
- 
 
 251 
#if (USE_SPI_CRC != 0U)
127 
static void SPI_DMATransmitReceiveCplt(struct __DMA_HandleTypeDef *hdma);
 252 
static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi);
128 
static void SPI_DMAHalfTransmitCplt(struct __DMA_HandleTypeDef *hdma);
 253 
static void SPI_RxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi);
129 
static void SPI_DMAHalfReceiveCplt(struct __DMA_HandleTypeDef *hdma);
 254 
static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi);
130 
static void SPI_DMAHalfTransmitReceiveCplt(struct __DMA_HandleTypeDef *hdma);
 255 
static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi);
- 
 
 256 
#endif /* USE_SPI_CRC */
- 
 
 257 
static void SPI_AbortRx_ISR(SPI_HandleTypeDef *hspi);
131 
static void SPI_DMAError(struct __DMA_HandleTypeDef *hdma);
 258 
static void SPI_AbortTx_ISR(SPI_HandleTypeDef *hspi);
- 
 
 259 
static void SPI_CloseRxTx_ISR(SPI_HandleTypeDef *hspi);
- 
 
 260 
static void SPI_CloseRx_ISR(SPI_HandleTypeDef *hspi);
- 
 
 261 
static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi);
132 
static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(struct __SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
 262 
static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart);
- 
 
 263 
static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart);
133 
/**
 264 
/**
134 
  * @}
 265 
  * @}
135 
  */
 266 
  */
136 
 
 267 
 
137 
/* Exported functions ---------------------------------------------------------*/
 268 
/* Exported functions --------------------------------------------------------*/
138 
 
 - 
 
139 
/** @defgroup SPI_Exported_Functions SPI Exported Functions
 269 
/** @defgroup SPI_Exported_Functions SPI Exported Functions
140 
  * @{
 270 
  * @{
141 
  */
 271 
  */
142 
 
 272 
 
143 
/** @defgroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions
 273 
/** @defgroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions
144 
 *  @brief    Initialization and Configuration functions
 274 
  *  @brief    Initialization and Configuration functions
145 
 *
 275 
  *
146 
@verbatim
 276 
@verbatim
147 
 ===============================================================================
 277 
 ===============================================================================
148 
              ##### Initialization and de-initialization functions #####
 278 
              ##### Initialization and de-initialization functions #####
149 
 ===============================================================================
 279 
 ===============================================================================
150 
    [..]  This subsection provides a set of functions allowing to initialize and
 280 
    [..]  This subsection provides a set of functions allowing to initialize and
151 
          de-initialiaze the SPIx peripheral:
 281 
          de-initialize the SPIx peripheral:
152 
 
 282 
 
153 
      (+) User must implement HAL_SPI_MspInit() function in which he configures
 283 
      (+) User must implement HAL_SPI_MspInit() function in which he configures
154 
          all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
 284 
          all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
155 
 
 285 
 
156 
      (+) Call the function HAL_SPI_Init() to configure the selected device with
 286 
      (+) Call the function HAL_SPI_Init() to configure the selected device with
157 
          the selected configuration:
 287 
          the selected configuration:
158 
        (++) Mode
 288 
        (++) Mode
159 
        (++) Direction
 289 
        (++) Direction
160 
        (++) Data Size
 290 
        (++) Data Size
161 
        (++) Clock Polarity and Phase
 291 
        (++) Clock Polarity and Phase
162 
        (++) NSS Management
 292 
        (++) NSS Management
163 
        (++) BaudRate Prescaler
 293 
        (++) BaudRate Prescaler
164 
        (++) FirstBit
 294 
        (++) FirstBit
165 
        (++) TIMode
 295 
        (++) TIMode
166 
        (++) CRC Calculation
 296 
        (++) CRC Calculation
167 
        (++) CRC Polynomial if CRC enabled
 297 
        (++) CRC Polynomial if CRC enabled
168 
 
 298 
 
169 
      (+) Call the function HAL_SPI_DeInit() to restore the default configuration
 299 
      (+) Call the function HAL_SPI_DeInit() to restore the default configuration
170 
          of the selected SPIx periperal.      
 300 
          of the selected SPIx peripheral.
171 
 
 301 
 
172 
@endverbatim
 302 
@endverbatim
173 
  * @{
 303 
  * @{
174 
  */
 304 
  */
175 
 
 305 
 
176 
/**
 306 
/**
177 
  * @brief  Initializes the SPI according to the specified parameters
 307 
  * @brief  Initialize the SPI according to the specified parameters
178 
  *         in the SPI_InitTypeDef and create the associated handle.
 308 
  *         in the SPI_InitTypeDef and initialize the associated handle.
179 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 309 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
180 
  *                the configuration information for SPI module.
 310 
  *               the configuration information for SPI module.
181 
  * @retval HAL status
 311 
  * @retval HAL status
182 
  */
 312 
  */
183 
__weak HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
 313 
HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
184 
{
 314 
{
185 
  /* Prevent unused argument(s) compilation warning */
 315 
  /* Check the SPI handle allocation */
- 
 
 316 
  if (hspi == NULL)
- 
 
 317 
  {
- 
 
 318 
    return HAL_ERROR;
- 
 
 319 
  }
- 
 
 320 
 
- 
 
 321 
  /* Check the parameters */
- 
 
 322 
  assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));
- 
 
 323 
  assert_param(IS_SPI_MODE(hspi->Init.Mode));
- 
 
 324 
  assert_param(IS_SPI_DIRECTION(hspi->Init.Direction));
- 
 
 325 
  assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize));
- 
 
 326 
  assert_param(IS_SPI_NSS(hspi->Init.NSS));
- 
 
 327 
  assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
- 
 
 328 
  assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit));
- 
 
 329 
  /* TI mode is not supported on all devices in stm32l1xx serie.
- 
 
 330 
     TIMode parameter is mandatory equal to SPI_TIMODE_DISABLE if TI mode is not supported */
- 
 
 331 
  assert_param(IS_SPI_TIMODE(hspi->Init.TIMode));
- 
 
 332 
  if (hspi->Init.TIMode == SPI_TIMODE_DISABLE)
- 
 
 333 
  {
- 
 
 334 
    assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
- 
 
 335 
    assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
- 
 
 336 
 
- 
 
 337 
    if (hspi->Init.Mode == SPI_MODE_MASTER)
- 
 
 338 
    {
- 
 
 339 
      assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
- 
 
 340 
    }
- 
 
 341 
    else
- 
 
 342 
    {
- 
 
 343 
      /* Baudrate prescaler not use in Motoraola Slave mode. force to default value */
- 
 
 344 
      hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
- 
 
 345 
    }
- 
 
 346 
  }
- 
 
 347 
  else
- 
 
 348 
  {
- 
 
 349 
    assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
- 
 
 350 
 
- 
 
 351 
    /* Force polarity and phase to TI protocaol requirements */
- 
 
 352 
    hspi->Init.CLKPolarity = SPI_POLARITY_LOW;
- 
 
 353 
    hspi->Init.CLKPhase    = SPI_PHASE_1EDGE;
- 
 
 354 
  }
- 
 
 355 
#if (USE_SPI_CRC != 0U)
- 
 
 356 
  assert_param(IS_SPI_CRC_CALCULATION(hspi->Init.CRCCalculation));
- 
 
 357 
  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
- 
 
 358 
  {
- 
 
 359 
    assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
- 
 
 360 
  }
- 
 
 361 
#else
- 
 
 362 
  hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
- 
 
 363 
#endif /* USE_SPI_CRC */
- 
 
 364 
 
- 
 
 365 
  if (hspi->State == HAL_SPI_STATE_RESET)
- 
 
 366 
  {
- 
 
 367 
    /* Allocate lock resource and initialize it */
- 
 
 368 
    hspi->Lock = HAL_UNLOCKED;
- 
 
 369 
 
- 
 
 370 
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
- 
 
 371 
    /* Init the SPI Callback settings */
- 
 
 372 
    hspi->TxCpltCallback       = HAL_SPI_TxCpltCallback;       /* Legacy weak TxCpltCallback       */
- 
 
 373 
    hspi->RxCpltCallback       = HAL_SPI_RxCpltCallback;       /* Legacy weak RxCpltCallback       */
- 
 
 374 
    hspi->TxRxCpltCallback     = HAL_SPI_TxRxCpltCallback;     /* Legacy weak TxRxCpltCallback     */
- 
 
 375 
    hspi->TxHalfCpltCallback   = HAL_SPI_TxHalfCpltCallback;   /* Legacy weak TxHalfCpltCallback   */
- 
 
 376 
    hspi->RxHalfCpltCallback   = HAL_SPI_RxHalfCpltCallback;   /* Legacy weak RxHalfCpltCallback   */
- 
 
 377 
    hspi->TxRxHalfCpltCallback = HAL_SPI_TxRxHalfCpltCallback; /* Legacy weak TxRxHalfCpltCallback */
- 
 
 378 
    hspi->ErrorCallback        = HAL_SPI_ErrorCallback;        /* Legacy weak ErrorCallback        */
- 
 
 379 
    hspi->AbortCpltCallback    = HAL_SPI_AbortCpltCallback;    /* Legacy weak AbortCpltCallback    */
- 
 
 380 
 
- 
 
 381 
    if (hspi->MspInitCallback == NULL)
- 
 
 382 
    {
- 
 
 383 
      hspi->MspInitCallback = HAL_SPI_MspInit; /* Legacy weak MspInit  */
- 
 
 384 
    }
- 
 
 385 
 
- 
 
 386 
    /* Init the low level hardware : GPIO, CLOCK, NVIC... */
- 
 
 387 
    hspi->MspInitCallback(hspi);
- 
 
 388 
#else
- 
 
 389 
    /* Init the low level hardware : GPIO, CLOCK, NVIC... */
- 
 
 390 
    HAL_SPI_MspInit(hspi);
- 
 
 391 
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
- 
 
 392 
  }
- 
 
 393 
 
- 
 
 394 
  hspi->State = HAL_SPI_STATE_BUSY;
- 
 
 395 
 
- 
 
 396 
  /* Disable the selected SPI peripheral */
186 
  UNUSED(hspi);
 397 
  __HAL_SPI_DISABLE(hspi);
- 
 
 398 
 
- 
 
 399 
  /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
- 
 
 400 
  /* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management,
- 
 
 401 
  Communication speed, First bit and CRC calculation state */
- 
 
 402 
  WRITE_REG(hspi->Instance->CR1, ((hspi->Init.Mode & (SPI_CR1_MSTR | SPI_CR1_SSI)) |
- 
 
 403 
                                  (hspi->Init.Direction & (SPI_CR1_RXONLY | SPI_CR1_BIDIMODE)) |
- 
 
 404 
                                  (hspi->Init.DataSize & SPI_CR1_DFF) |
- 
 
 405 
                                  (hspi->Init.CLKPolarity & SPI_CR1_CPOL) |
- 
 
 406 
                                  (hspi->Init.CLKPhase & SPI_CR1_CPHA) |
- 
 
 407 
                                  (hspi->Init.NSS & SPI_CR1_SSM) |
- 
 
 408 
                                  (hspi->Init.BaudRatePrescaler & SPI_CR1_BR_Msk) |
- 
 
 409 
                                  (hspi->Init.FirstBit  & SPI_CR1_LSBFIRST) |
- 
 
 410 
                                  (hspi->Init.CRCCalculation & SPI_CR1_CRCEN)));
- 
 
 411 
 
- 
 
 412 
#if defined(SPI_CR2_FRF)
- 
 
 413 
  /* Configure : NSS management, TI Mode */
- 
 
 414 
  WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | (hspi->Init.TIMode & SPI_CR2_FRF)));
- 
 
 415 
#else
- 
 
 416 
  /* Configure : NSS management */
- 
 
 417 
  WRITE_REG(hspi->Instance->CR2, ((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE));
- 
 
 418 
#endif
- 
 
 419 
 
- 
 
 420 
#if (USE_SPI_CRC != 0U)
- 
 
 421 
  /*---------------------------- SPIx CRCPOLY Configuration ------------------*/
- 
 
 422 
  /* Configure : CRC Polynomial */
- 
 
 423 
  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
- 
 
 424 
  {
- 
 
 425 
    WRITE_REG(hspi->Instance->CRCPR, (hspi->Init.CRCPolynomial & SPI_CRCPR_CRCPOLY_Msk));
- 
 
 426 
  }
- 
 
 427 
#endif /* USE_SPI_CRC */
- 
 
 428 
 
- 
 
 429 
#if defined(SPI_I2SCFGR_I2SMOD)
- 
 
 430 
  /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
- 
 
 431 
  CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
- 
 
 432 
#endif /* SPI_I2SCFGR_I2SMOD */
187 
 
 433 
 
- 
 
 434 
  hspi->ErrorCode = HAL_SPI_ERROR_NONE;
- 
 
 435 
  hspi->State     = HAL_SPI_STATE_READY;
- 
 
 436 
 
188 
  return HAL_ERROR;
 437 
  return HAL_OK;
189 
}
 438 
}
190 
 
 439 
 
191 
/**
 440 
/**
192 
  * @brief  DeInitializes the SPI peripheral
 441 
  * @brief  De-Initialize the SPI peripheral.
193 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 442 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
194 
  *                the configuration information for SPI module.
 443 
  *               the configuration information for SPI module.
195 
  * @retval HAL status
 444 
  * @retval HAL status
196 
  */
 445 
  */
197 
HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi)
 446 
HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi)
198 
{
 447 
{
199 
  /* Check the SPI handle allocation */
 448 
  /* Check the SPI handle allocation */
200 
  if(hspi == NULL)
 449 
  if (hspi == NULL)
201 
  {
 450 
  {
202 
    return HAL_ERROR;
 451 
    return HAL_ERROR;
203 
  }
 452 
  }
204 
 
 453 
 
- 
 
 454 
  /* Check SPI Instance parameter */
- 
 
 455 
  assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));
- 
 
 456 
 
- 
 
 457 
  hspi->State = HAL_SPI_STATE_BUSY;
- 
 
 458 
 
205 
  /* Disable the SPI Peripheral Clock */
 459 
  /* Disable the SPI Peripheral Clock */
206 
  __HAL_SPI_DISABLE(hspi);
 460 
  __HAL_SPI_DISABLE(hspi);
207 
 
 461 
 
- 
 
 462 
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
- 
 
 463 
  if (hspi->MspDeInitCallback == NULL)
- 
 
 464 
  {
- 
 
 465 
    hspi->MspDeInitCallback = HAL_SPI_MspDeInit; /* Legacy weak MspDeInit  */
- 
 
 466 
  }
- 
 
 467 
 
- 
 
 468 
  /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
- 
 
 469 
  hspi->MspDeInitCallback(hspi);
- 
 
 470 
#else
208 
  /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
 471 
  /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
209 
  HAL_SPI_MspDeInit(hspi);
 472 
  HAL_SPI_MspDeInit(hspi);
- 
 
 473 
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
210 
 
 474 
 
211 
  hspi->ErrorCode = HAL_SPI_ERROR_NONE;
 475 
  hspi->ErrorCode = HAL_SPI_ERROR_NONE;
212 
  hspi->State = HAL_SPI_STATE_RESET;
 476 
  hspi->State = HAL_SPI_STATE_RESET;
213 
 
 477 
 
214 
  /* Release Lock */
 478 
  /* Release Lock */
Line 216... Line 480...
216 
 
 480 
 
217 
  return HAL_OK;
 481 
  return HAL_OK;
218 
}
 482 
}
219 
 
 483 
 
220 
/**
 484 
/**
221 
  * @brief SPI MSP Init
 485 
  * @brief  Initialize the SPI MSP.
222 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 486 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
223 
  *                the configuration information for SPI module.
 487 
  *               the configuration information for SPI module.
224 
  * @retval None
 488 
  * @retval None
225 
  */
 489 
  */
226 
 __weak void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)
 490 
__weak void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)
227 
 {
 491 
{
228 
  /* Prevent unused argument(s) compilation warning */
 492 
  /* Prevent unused argument(s) compilation warning */
229 
  UNUSED(hspi);
 493 
  UNUSED(hspi);
230 
 
 494 
 
231 
   /* NOTE : This function Should not be modified, when the callback is needed,
 495 
  /* NOTE : This function should not be modified, when the callback is needed,
232 
            the HAL_SPI_MspInit could be implenetd in the user file
 496 
            the HAL_SPI_MspInit should be implemented in the user file
233 
   */
 497 
   */
234 
}
 498 
}
235 
 
 499 
 
236 
/**
 500 
/**
237 
  * @brief SPI MSP DeInit
 501 
  * @brief  De-Initialize the SPI MSP.
238 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 502 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
239 
  *                the configuration information for SPI module.
 503 
  *               the configuration information for SPI module.
240 
  * @retval None
 504 
  * @retval None
241 
  */
 505 
  */
242 
 __weak void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi)
 506 
__weak void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi)
243 
{
 507 
{
244 
  /* Prevent unused argument(s) compilation warning */
 508 
  /* Prevent unused argument(s) compilation warning */
245 
  UNUSED(hspi);
 509 
  UNUSED(hspi);
246 
 
 510 
 
247 
  /* NOTE : This function Should not be modified, when the callback is needed,
 511 
  /* NOTE : This function should not be modified, when the callback is needed,
248 
            the HAL_SPI_MspDeInit could be implenetd in the user file
 512 
            the HAL_SPI_MspDeInit should be implemented in the user file
249 
   */
 513 
   */
250 
}
 514 
}
251 
 
 515 
 
- 
 
 516 
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
- 
 
 517 
/**
- 
 
 518 
  * @brief  Register a User SPI Callback
- 
 
 519 
  *         To be used instead of the weak predefined callback
- 
 
 520 
  * @param  hspi Pointer to a SPI_HandleTypeDef structure that contains
- 
 
 521 
  *                the configuration information for the specified SPI.
- 
 
 522 
  * @param  CallbackID ID of the callback to be registered
- 
 
 523 
  * @param  pCallback pointer to the Callback function
- 
 
 524 
  * @retval HAL status
- 
 
 525 
  */
- 
 
 526 
HAL_StatusTypeDef HAL_SPI_RegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID,
- 
 
 527 
                                           pSPI_CallbackTypeDef pCallback)
- 
 
 528 
{
- 
 
 529 
  HAL_StatusTypeDef status = HAL_OK;
- 
 
 530 
 
- 
 
 531 
  if (pCallback == NULL)
- 
 
 532 
  {
- 
 
 533 
    /* Update the error code */
- 
 
 534 
    hspi->ErrorCode |= HAL_SPI_ERROR_INVALID_CALLBACK;
- 
 
 535 
 
- 
 
 536 
    return HAL_ERROR;
- 
 
 537 
  }
- 
 
 538 
  /* Process locked */
- 
 
 539 
  __HAL_LOCK(hspi);
- 
 
 540 
 
- 
 
 541 
  if (HAL_SPI_STATE_READY == hspi->State)
- 
 
 542 
  {
- 
 
 543 
    switch (CallbackID)
- 
 
 544 
    {
- 
 
 545 
      case HAL_SPI_TX_COMPLETE_CB_ID :
- 
 
 546 
        hspi->TxCpltCallback = pCallback;
- 
 
 547 
        break;
- 
 
 548 
 
- 
 
 549 
      case HAL_SPI_RX_COMPLETE_CB_ID :
- 
 
 550 
        hspi->RxCpltCallback = pCallback;
- 
 
 551 
        break;
- 
 
 552 
 
- 
 
 553 
      case HAL_SPI_TX_RX_COMPLETE_CB_ID :
- 
 
 554 
        hspi->TxRxCpltCallback = pCallback;
- 
 
 555 
        break;
- 
 
 556 
 
- 
 
 557 
      case HAL_SPI_TX_HALF_COMPLETE_CB_ID :
- 
 
 558 
        hspi->TxHalfCpltCallback = pCallback;
- 
 
 559 
        break;
- 
 
 560 
 
- 
 
 561 
      case HAL_SPI_RX_HALF_COMPLETE_CB_ID :
- 
 
 562 
        hspi->RxHalfCpltCallback = pCallback;
- 
 
 563 
        break;
- 
 
 564 
 
- 
 
 565 
      case HAL_SPI_TX_RX_HALF_COMPLETE_CB_ID :
- 
 
 566 
        hspi->TxRxHalfCpltCallback = pCallback;
- 
 
 567 
        break;
- 
 
 568 
 
- 
 
 569 
      case HAL_SPI_ERROR_CB_ID :
- 
 
 570 
        hspi->ErrorCallback = pCallback;
- 
 
 571 
        break;
- 
 
 572 
 
- 
 
 573 
      case HAL_SPI_ABORT_CB_ID :
- 
 
 574 
        hspi->AbortCpltCallback = pCallback;
- 
 
 575 
        break;
- 
 
 576 
 
- 
 
 577 
      case HAL_SPI_MSPINIT_CB_ID :
- 
 
 578 
        hspi->MspInitCallback = pCallback;
- 
 
 579 
        break;
- 
 
 580 
 
- 
 
 581 
      case HAL_SPI_MSPDEINIT_CB_ID :
- 
 
 582 
        hspi->MspDeInitCallback = pCallback;
- 
 
 583 
        break;
- 
 
 584 
 
- 
 
 585 
      default :
- 
 
 586 
        /* Update the error code */
- 
 
 587 
        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK);
- 
 
 588 
 
- 
 
 589 
        /* Return error status */
- 
 
 590 
        status =  HAL_ERROR;
- 
 
 591 
        break;
- 
 
 592 
    }
- 
 
 593 
  }
- 
 
 594 
  else if (HAL_SPI_STATE_RESET == hspi->State)
- 
 
 595 
  {
- 
 
 596 
    switch (CallbackID)
- 
 
 597 
    {
- 
 
 598 
      case HAL_SPI_MSPINIT_CB_ID :
- 
 
 599 
        hspi->MspInitCallback = pCallback;
- 
 
 600 
        break;
- 
 
 601 
 
- 
 
 602 
      case HAL_SPI_MSPDEINIT_CB_ID :
- 
 
 603 
        hspi->MspDeInitCallback = pCallback;
- 
 
 604 
        break;
- 
 
 605 
 
- 
 
 606 
      default :
- 
 
 607 
        /* Update the error code */
- 
 
 608 
        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK);
- 
 
 609 
 
- 
 
 610 
        /* Return error status */
- 
 
 611 
        status =  HAL_ERROR;
- 
 
 612 
        break;
- 
 
 613 
    }
- 
 
 614 
  }
- 
 
 615 
  else
- 
 
 616 
  {
- 
 
 617 
    /* Update the error code */
- 
 
 618 
    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK);
- 
 
 619 
 
- 
 
 620 
    /* Return error status */
- 
 
 621 
    status =  HAL_ERROR;
- 
 
 622 
  }
- 
 
 623 
 
- 
 
 624 
  /* Release Lock */
- 
 
 625 
  __HAL_UNLOCK(hspi);
- 
 
 626 
  return status;
- 
 
 627 
}
- 
 
 628 
 
- 
 
 629 
/**
- 
 
 630 
  * @brief  Unregister an SPI Callback
- 
 
 631 
  *         SPI callback is redirected to the weak predefined callback
- 
 
 632 
  * @param  hspi Pointer to a SPI_HandleTypeDef structure that contains
- 
 
 633 
  *                the configuration information for the specified SPI.
- 
 
 634 
  * @param  CallbackID ID of the callback to be unregistered
- 
 
 635 
  * @retval HAL status
- 
 
 636 
  */
- 
 
 637 
HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID)
- 
 
 638 
{
- 
 
 639 
  HAL_StatusTypeDef status = HAL_OK;
- 
 
 640 
 
- 
 
 641 
  /* Process locked */
- 
 
 642 
  __HAL_LOCK(hspi);
- 
 
 643 
 
- 
 
 644 
  if (HAL_SPI_STATE_READY == hspi->State)
- 
 
 645 
  {
- 
 
 646 
    switch (CallbackID)
- 
 
 647 
    {
- 
 
 648 
      case HAL_SPI_TX_COMPLETE_CB_ID :
- 
 
 649 
        hspi->TxCpltCallback = HAL_SPI_TxCpltCallback;             /* Legacy weak TxCpltCallback       */
- 
 
 650 
        break;
- 
 
 651 
 
- 
 
 652 
      case HAL_SPI_RX_COMPLETE_CB_ID :
- 
 
 653 
        hspi->RxCpltCallback = HAL_SPI_RxCpltCallback;             /* Legacy weak RxCpltCallback       */
- 
 
 654 
        break;
- 
 
 655 
 
- 
 
 656 
      case HAL_SPI_TX_RX_COMPLETE_CB_ID :
- 
 
 657 
        hspi->TxRxCpltCallback = HAL_SPI_TxRxCpltCallback;         /* Legacy weak TxRxCpltCallback     */
- 
 
 658 
        break;
- 
 
 659 
 
- 
 
 660 
      case HAL_SPI_TX_HALF_COMPLETE_CB_ID :
- 
 
 661 
        hspi->TxHalfCpltCallback = HAL_SPI_TxHalfCpltCallback;     /* Legacy weak TxHalfCpltCallback   */
- 
 
 662 
        break;
- 
 
 663 
 
- 
 
 664 
      case HAL_SPI_RX_HALF_COMPLETE_CB_ID :
- 
 
 665 
        hspi->RxHalfCpltCallback = HAL_SPI_RxHalfCpltCallback;     /* Legacy weak RxHalfCpltCallback   */
- 
 
 666 
        break;
- 
 
 667 
 
- 
 
 668 
      case HAL_SPI_TX_RX_HALF_COMPLETE_CB_ID :
- 
 
 669 
        hspi->TxRxHalfCpltCallback = HAL_SPI_TxRxHalfCpltCallback; /* Legacy weak TxRxHalfCpltCallback */
- 
 
 670 
        break;
- 
 
 671 
 
- 
 
 672 
      case HAL_SPI_ERROR_CB_ID :
- 
 
 673 
        hspi->ErrorCallback = HAL_SPI_ErrorCallback;               /* Legacy weak ErrorCallback        */
- 
 
 674 
        break;
- 
 
 675 
 
- 
 
 676 
      case HAL_SPI_ABORT_CB_ID :
- 
 
 677 
        hspi->AbortCpltCallback = HAL_SPI_AbortCpltCallback;       /* Legacy weak AbortCpltCallback    */
- 
 
 678 
        break;
- 
 
 679 
 
- 
 
 680 
      case HAL_SPI_MSPINIT_CB_ID :
- 
 
 681 
        hspi->MspInitCallback = HAL_SPI_MspInit;                   /* Legacy weak MspInit              */
- 
 
 682 
        break;
- 
 
 683 
 
- 
 
 684 
      case HAL_SPI_MSPDEINIT_CB_ID :
- 
 
 685 
        hspi->MspDeInitCallback = HAL_SPI_MspDeInit;               /* Legacy weak MspDeInit            */
- 
 
 686 
        break;
- 
 
 687 
 
- 
 
 688 
      default :
- 
 
 689 
        /* Update the error code */
- 
 
 690 
        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK);
- 
 
 691 
 
- 
 
 692 
        /* Return error status */
- 
 
 693 
        status =  HAL_ERROR;
- 
 
 694 
        break;
- 
 
 695 
    }
- 
 
 696 
  }
- 
 
 697 
  else if (HAL_SPI_STATE_RESET == hspi->State)
- 
 
 698 
  {
- 
 
 699 
    switch (CallbackID)
- 
 
 700 
    {
- 
 
 701 
      case HAL_SPI_MSPINIT_CB_ID :
- 
 
 702 
        hspi->MspInitCallback = HAL_SPI_MspInit;                   /* Legacy weak MspInit              */
- 
 
 703 
        break;
- 
 
 704 
 
- 
 
 705 
      case HAL_SPI_MSPDEINIT_CB_ID :
- 
 
 706 
        hspi->MspDeInitCallback = HAL_SPI_MspDeInit;               /* Legacy weak MspDeInit            */
- 
 
 707 
        break;
- 
 
 708 
 
- 
 
 709 
      default :
- 
 
 710 
        /* Update the error code */
- 
 
 711 
        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK);
- 
 
 712 
 
- 
 
 713 
        /* Return error status */
- 
 
 714 
        status =  HAL_ERROR;
- 
 
 715 
        break;
- 
 
 716 
    }
- 
 
 717 
  }
- 
 
 718 
  else
- 
 
 719 
  {
- 
 
 720 
    /* Update the error code */
- 
 
 721 
    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK);
- 
 
 722 
 
- 
 
 723 
    /* Return error status */
- 
 
 724 
    status =  HAL_ERROR;
- 
 
 725 
  }
- 
 
 726 
 
- 
 
 727 
  /* Release Lock */
- 
 
 728 
  __HAL_UNLOCK(hspi);
- 
 
 729 
  return status;
- 
 
 730 
}
- 
 
 731 
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
252 
/**
 732 
/**
253 
  * @}
 733 
  * @}
254 
  */
 734 
  */
255 
 
 735 
 
256 
/** @defgroup SPI_Exported_Functions_Group2 IO operation functions
 736 
/** @defgroup SPI_Exported_Functions_Group2 IO operation functions
257 
 *  @brief   Data transfers functions
 737 
  *  @brief   Data transfers functions
258 
 *
 738 
  *
259 
@verbatim
 739 
@verbatim
260 
  ==============================================================================
 740 
  ==============================================================================
261 
                      ##### IO operation functions #####
 741 
                      ##### IO operation functions #####
262 
 ===============================================================================
 742 
 ===============================================================================
- 
 
 743 
 [..]
263 
    This subsection provides a set of functions allowing to manage the SPI
 744 
    This subsection provides a set of functions allowing to manage the SPI
264 
    data transfers.
 745 
    data transfers.
265 
 
 746 
 
266 
    [..] The SPI supports master and slave mode :
 747 
    [..] The SPI supports master and slave mode :
267 
 
 748 
 
Line 269... Line 750...
269 
       (++) Blocking mode: The communication is performed in polling mode.
 750 
       (++) Blocking mode: The communication is performed in polling mode.
270 
            The HAL status of all data processing is returned by the same function
 751 
            The HAL status of all data processing is returned by the same function
271 
            after finishing transfer.
 752 
            after finishing transfer.
272 
       (++) No-Blocking mode: The communication is performed using Interrupts
 753 
       (++) No-Blocking mode: The communication is performed using Interrupts
273 
            or DMA, These APIs return the HAL status.
 754 
            or DMA, These APIs return the HAL status.
274 
            The end of the data processing will be indicated through the
 755 
            The end of the data processing will be indicated through the
275 
            dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when
 756 
            dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when
276 
            using DMA mode.
 757 
            using DMA mode.
277 
            The HAL_SPI_TxCpltCallback(), HAL_SPI_RxCpltCallback() and HAL_SPI_TxRxCpltCallback() user callbacks
 758 
            The HAL_SPI_TxCpltCallback(), HAL_SPI_RxCpltCallback() and HAL_SPI_TxRxCpltCallback() user callbacks
278 
            will be executed respectivelly at the end of the transmit or Receive process
 759 
            will be executed respectively at the end of the transmit or Receive process
279 
            The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is detected
 760 
            The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is detected
280 
 
 761 
 
281 
    (#) APIs provided for these 2 transfer modes (Blocking mode or Non blocking mode using either Interrupt or DMA)
 762 
    (#) APIs provided for these 2 transfer modes (Blocking mode or Non blocking mode using either Interrupt or DMA)
282 
        exist for 1Line (simplex) and 2Lines (full duplex) modes.
 763 
        exist for 1Line (simplex) and 2Lines (full duplex) modes.
283 
 
 764 
 
284 
@endverbatim
 765 
@endverbatim
285 
  * @{
 766 
  * @{
286 
  */
 767 
  */
287 
 
 768 
 
288 
/**
 769 
/**
289 
  * @brief  Transmit an amount of data in blocking mode
 770 
  * @brief  Transmit an amount of data in blocking mode.
290 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 771 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
291 
  *                the configuration information for SPI module.
 772 
  *               the configuration information for SPI module.
292 
  * @param  pData: pointer to data buffer
 773 
  * @param  pData pointer to data buffer
293 
  * @param  Size: amount of data to be sent
 774 
  * @param  Size amount of data to be sent
294 
  * @param  Timeout: Timeout duration
 775 
  * @param  Timeout Timeout duration
295 
  * @retval HAL status
 776 
  * @retval HAL status
296 
  */
 777 
  */
297 
HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
 778 
HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
298 
{
 779 
{
- 
 
 780 
  uint32_t tickstart;
- 
 
 781 
  HAL_StatusTypeDef errorcode = HAL_OK;
- 
 
 782 
  uint16_t initial_TxXferCount;
299 
 
 783 
 
300 
  if(hspi->State == HAL_SPI_STATE_READY)
 784 
  /* Check Direction parameter */
- 
 
 785 
  assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
301 
  {
 786 
 
302 
    if((pData == NULL ) || (Size == 0))
 787 
  /* Process Locked */
- 
 
 788 
  __HAL_LOCK(hspi);
303 
    {
 789 
 
- 
 
 790 
  /* Init tickstart for timeout management*/
304 
      return  HAL_ERROR;
 791 
  tickstart = HAL_GetTick();
305 
    }
 792 
  initial_TxXferCount = Size;
306 
 
 793 
 
- 
 
 794 
  if (hspi->State != HAL_SPI_STATE_READY)
- 
 
 795 
  {
307 
    /* Check the parameters */
 796 
    errorcode = HAL_BUSY;
308 
    assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
 797 
    goto error;
- 
 
 798 
  }
309 
 
 799 
 
- 
 
 800 
  if ((pData == NULL) || (Size == 0U))
- 
 
 801 
  {
310 
    /* Process Locked */
 802 
    errorcode = HAL_ERROR;
311 
    __HAL_LOCK(hspi);
 803 
    goto error;
- 
 
 804 
  }
312 
 
 805 
 
313 
    /* Configure communication */
 806 
  /* Set the transaction information */
314 
    hspi->State = HAL_SPI_STATE_BUSY_TX;
 807 
  hspi->State       = HAL_SPI_STATE_BUSY_TX;
315 
    hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
 808 
  hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
- 
 
 809 
  hspi->pTxBuffPtr  = (uint8_t *)pData;
- 
 
 810 
  hspi->TxXferSize  = Size;
- 
 
 811 
  hspi->TxXferCount = Size;
316 
 
 812 
 
- 
 
 813 
  /*Init field not used in handle to zero */
317 
    hspi->pTxBuffPtr  = pData;
 814 
  hspi->pRxBuffPtr  = (uint8_t *)NULL;
318 
    hspi->TxXferSize  = Size;
 815 
  hspi->RxXferSize  = 0U;
319 
    hspi->TxXferCount = Size;
 816 
  hspi->RxXferCount = 0U;
- 
 
 817 
  hspi->TxISR       = NULL;
- 
 
 818 
  hspi->RxISR       = NULL;
320 
 
 819 
 
321 
    /*Init field not used in handle to zero */
 820 
  /* Configure communication direction : 1Line */
322 
    hspi->TxISR = 0;
 821 
  if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
323 
    hspi->RxISR = 0;
 822 
  {
324 
    hspi->pRxBuffPtr  = NULL;
 823 
    /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */
325 
    hspi->RxXferSize  = 0;
 824 
    __HAL_SPI_DISABLE(hspi);
326 
    hspi->RxXferCount = 0;
 825 
    SPI_1LINE_TX(hspi);
- 
 
 826 
  }
327 
 
 827 
 
- 
 
 828 
#if (USE_SPI_CRC != 0U)
328 
    /* Reset CRC Calculation */
 829 
  /* Reset CRC Calculation */
329 
    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
 830 
  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
330 
    {
 831 
  {
331 
      SPI_RESET_CRC(hspi);
 832 
    SPI_RESET_CRC(hspi);
332 
    }
 833 
  }
- 
 
 834 
#endif /* USE_SPI_CRC */
333 
 
 835 
 
- 
 
 836 
  /* Check if the SPI is already enabled */
334 
    if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
 837 
  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
335 
    {
 838 
  {
336 
      /* Configure communication direction : 1Line */
 839 
    /* Enable SPI peripheral */
337 
      SPI_1LINE_TX(hspi);
 840 
    __HAL_SPI_ENABLE(hspi);
338 
    }
 841 
  }
339 
 
 842 
 
340 
    /* Check if the SPI is already enabled */
 843 
  /* Transmit data in 16 Bit mode */
341 
    if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
 844 
  if (hspi->Init.DataSize == SPI_DATASIZE_16BIT)
- 
 
 845 
  {
- 
 
 846 
    if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
342 
    {
 847 
    {
- 
 
 848 
      hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
343 
      /* Enable SPI peripheral */
 849 
      hspi->pTxBuffPtr += sizeof(uint16_t);
344 
      __HAL_SPI_ENABLE(hspi);
 850 
      hspi->TxXferCount--;
345 
    }
 851 
    }
346 
 
 - 
 
347 
    /* Transmit data in 8 Bit mode */
 852 
    /* Transmit data in 16 Bit mode */
348 
    if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
 853 
    while (hspi->TxXferCount > 0U)
349 
    {
 854 
    {
- 
 
 855 
      /* Wait until TXE flag is set to send data */
350 
      if((hspi->Init.Mode == SPI_MODE_SLAVE)|| (hspi->TxXferCount == 0x01))
 856 
      if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE))
351 
      {
 857 
      {
352 
        hspi->Instance->DR = (*hspi->pTxBuffPtr++);
 858 
        hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
- 
 
 859 
        hspi->pTxBuffPtr += sizeof(uint16_t);
353 
        hspi->TxXferCount--;
 860 
        hspi->TxXferCount--;
354 
      }
 861 
      }
355 
      while(hspi->TxXferCount > 0)
 862 
      else
356 
      {
 863 
      {
357 
        /* Wait until TXE flag is set to send data */
 864 
        /* Timeout management */
358 
        if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
 865 
        if ((((HAL_GetTick() - tickstart) >=  Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
359 
        {
 866 
        {
360 
          return HAL_TIMEOUT;
 867 
          errorcode = HAL_TIMEOUT;
- 
 
 868 
          goto error;
361 
        }
 869 
        }
362 
        hspi->Instance->DR = (*hspi->pTxBuffPtr++);
 - 
 
363 
        hspi->TxXferCount--;
 - 
 
364 
      }
 - 
 
365 
      /* Enable CRC Transmission */
 - 
 
366 
      if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
 - 
 
367 
      {
 - 
 
368 
        SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
 - 
 
369 
      }
 870 
      }
370 
    }
 871 
    }
- 
 
 872 
  }
371 
    /* Transmit data in 16 Bit mode */
 873 
  /* Transmit data in 8 Bit mode */
372 
    else
 874 
  else
- 
 
 875 
  {
- 
 
 876 
    if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
373 
    {
 877 
    {
374 
      if((hspi->Init.Mode == SPI_MODE_SLAVE) || (hspi->TxXferCount == 0x01))
 878 
      *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
- 
 
 879 
      hspi->pTxBuffPtr += sizeof(uint8_t);
- 
 
 880 
      hspi->TxXferCount--;
- 
 
 881 
    }
- 
 
 882 
    while (hspi->TxXferCount > 0U)
- 
 
 883 
    {
- 
 
 884 
      /* Wait until TXE flag is set to send data */
- 
 
 885 
      if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE))
375 
      {
 886 
      {
376 
        hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
 887 
        *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
377 
        hspi->pTxBuffPtr+=2;
 888 
        hspi->pTxBuffPtr += sizeof(uint8_t);
378 
        hspi->TxXferCount--;
 889 
        hspi->TxXferCount--;
379 
      }
 890 
      }
380 
      while(hspi->TxXferCount > 0)
 891 
      else
381 
      {
 892 
      {
382 
        /* Wait until TXE flag is set to send data */
 893 
        /* Timeout management */
383 
        if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
 894 
        if ((((HAL_GetTick() - tickstart) >=  Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
384 
        {
 895 
        {
385 
          return HAL_TIMEOUT;
 896 
          errorcode = HAL_TIMEOUT;
- 
 
 897 
          goto error;
386 
        }
 898 
        }
387 
        hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
 - 
 
388 
        hspi->pTxBuffPtr+=2;
 - 
 
389 
        hspi->TxXferCount--;
 - 
 
390 
      }
 - 
 
391 
      /* Enable CRC Transmission */
 - 
 
392 
      if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
 - 
 
393 
      {
 - 
 
394 
        SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
 - 
 
395 
      }
 899 
      }
396 
    }
 900 
    }
- 
 
 901 
  }
- 
 
 902 
#if (USE_SPI_CRC != 0U)
- 
 
 903 
  /* Enable CRC Transmission */
- 
 
 904 
  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
- 
 
 905 
  {
- 
 
 906 
    SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
- 
 
 907 
  }
- 
 
 908 
#endif /* USE_SPI_CRC */
397 
 
 909 
 
398 
    /* Wait until TXE flag is set to send data */
 910 
  /* Check the end of the transaction */
399 
    if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
 911 
  if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK)
400 
    {
 912 
  {
401 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
 - 
 
402 
      return HAL_TIMEOUT;
 - 
 
403 
    }
 - 
 
404 
 
 - 
 
405 
    /* Wait until Busy flag is reset before disabling SPI */
 - 
 
406 
    if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, Timeout) != HAL_OK)
 - 
 
407 
    {
 - 
 
408 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
 913 
    hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
409 
      return HAL_TIMEOUT;
 - 
 
410 
    }
 - 
 
411 
 
 - 
 
412 
    /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
 - 
 
413 
    if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
 - 
 
414 
    {
 - 
 
415 
      __HAL_SPI_CLEAR_OVRFLAG(hspi);
 - 
 
416 
    }
 914 
  }
417 
 
 - 
 
418 
    hspi->State = HAL_SPI_STATE_READY;
 - 
 
419 
 
 - 
 
420 
    /* Process Unlocked */
 - 
 
421 
    __HAL_UNLOCK(hspi);
 - 
 
422 
 
 915 
 
- 
 
 916 
  /* Clear overrun flag in 2 Lines communication mode because received is not read */
- 
 
 917 
  if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
- 
 
 918 
  {
423 
    return HAL_OK;
 919 
    __HAL_SPI_CLEAR_OVRFLAG(hspi);
424 
  }
 920 
  }
425 
  else
 921 
 
- 
 
 922 
  if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
426 
  {
 923 
  {
427 
    return HAL_BUSY;
 924 
    errorcode = HAL_ERROR;
428 
  }
 925 
  }
- 
 
 926 
 
- 
 
 927 
error:
- 
 
 928 
  hspi->State = HAL_SPI_STATE_READY;
- 
 
 929 
  /* Process Unlocked */
- 
 
 930 
  __HAL_UNLOCK(hspi);
- 
 
 931 
  return errorcode;
429 
}
 932 
}
430 
 
 933 
 
431 
/**
 934 
/**
432 
  * @brief  Receive an amount of data in blocking mode
 935 
  * @brief  Receive an amount of data in blocking mode.
433 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 936 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
434 
  *                the configuration information for SPI module.
 937 
  *               the configuration information for SPI module.
435 
  * @param  pData: pointer to data buffer
 938 
  * @param  pData pointer to data buffer
436 
  * @param  Size: amount of data to be sent
 939 
  * @param  Size amount of data to be received
437 
  * @param  Timeout: Timeout duration
 940 
  * @param  Timeout Timeout duration
438 
  * @retval HAL status
 941 
  * @retval HAL status
439 
  */
 942 
  */
440 
HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
 943 
HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
441 
{
 944 
{
442 
  __IO uint16_t tmpreg = 0;
 945 
  uint32_t tickstart;
- 
 
 946 
  HAL_StatusTypeDef errorcode = HAL_OK;
443 
 
 947 
 
444 
  if(hspi->State == HAL_SPI_STATE_READY)
 948 
  if ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
445 
  {
 949 
  {
446 
    if((pData == NULL ) || (Size == 0))
 950 
    hspi->State = HAL_SPI_STATE_BUSY_RX;
447 
    {
 - 
 
- 
 
 951 
    /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
448 
      return  HAL_ERROR;
 952 
    return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout);
449 
    }
 953 
  }
450 
 
 954 
 
451 
    /* Process Locked */
 955 
  /* Process Locked */
452 
    __HAL_LOCK(hspi);
 956 
  __HAL_LOCK(hspi);
453 
 
 957 
 
454 
    /* Configure communication */
 958 
  /* Init tickstart for timeout management*/
455 
    hspi->State       = HAL_SPI_STATE_BUSY_RX;
 959 
  tickstart = HAL_GetTick();
456 
    hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
 - 
 
457 
 
 960 
 
458 
    hspi->pRxBuffPtr  = pData;
 961 
  if (hspi->State != HAL_SPI_STATE_READY)
- 
 
 962 
  {
459 
    hspi->RxXferSize  = Size;
 963 
    errorcode = HAL_BUSY;
460 
    hspi->RxXferCount = Size;
 964 
    goto error;
- 
 
 965 
  }
461 
 
 966 
 
462 
    /*Init field not used in handle to zero */
 967 
  if ((pData == NULL) || (Size == 0U))
463 
    hspi->RxISR = 0;
 968 
  {
464 
    hspi->TxISR = 0;
 969 
    errorcode = HAL_ERROR;
465 
    hspi->pTxBuffPtr  = NULL;
 - 
 
466 
    hspi->TxXferSize  = 0;
 970 
    goto error;
467 
    hspi->TxXferCount = 0;
 971 
  }
468 
 
 972 
 
469 
    /* Configure communication direction : 1Line */
 973 
  /* Set the transaction information */
- 
 
 974 
  hspi->State       = HAL_SPI_STATE_BUSY_RX;
470 
    if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
 975 
  hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
471 
    {
 976 
  hspi->pRxBuffPtr  = (uint8_t *)pData;
472 
      SPI_1LINE_RX(hspi);
 977 
  hspi->RxXferSize  = Size;
473 
    }
 978 
  hspi->RxXferCount = Size;
474 
 
 979 
 
475 
    /* Reset CRC Calculation */
 980 
  /*Init field not used in handle to zero */
476 
    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
 981 
  hspi->pTxBuffPtr  = (uint8_t *)NULL;
477 
    {
 982 
  hspi->TxXferSize  = 0U;
478 
      SPI_RESET_CRC(hspi);
 983 
  hspi->TxXferCount = 0U;
479 
    }
 - 
 
480 
   
 - 
 
481 
    if((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
 - 
 
482 
    {
 - 
 
483 
      /* Process Unlocked */
 984 
  hspi->RxISR       = NULL;
484 
      __HAL_UNLOCK(hspi);
 985 
  hspi->TxISR       = NULL;
485 
 
 986 
 
- 
 
 987 
#if (USE_SPI_CRC != 0U)
- 
 
 988 
  /* Reset CRC Calculation */
486 
      /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
 989 
  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
- 
 
 990 
  {
- 
 
 991 
    SPI_RESET_CRC(hspi);
487 
      return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout);
 992 
    /* this is done to handle the CRCNEXT before the latest data */
- 
 
 993 
    hspi->RxXferCount--;
488 
    }
 994 
  }
- 
 
 995 
#endif /* USE_SPI_CRC */
489 
 
 996 
 
- 
 
 997 
  /* Configure communication direction: 1Line */
- 
 
 998 
  if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
- 
 
 999 
  {
- 
 
 1000 
    /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */
- 
 
 1001 
    __HAL_SPI_DISABLE(hspi);
- 
 
 1002 
    SPI_1LINE_RX(hspi);
- 
 
 1003 
  }
- 
 
 1004 
 
490 
    /* Check if the SPI is already enabled */
 1005 
  /* Check if the SPI is already enabled */
491 
    if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
 1006 
  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
492 
    {
 1007 
  {
493 
      /* Enable SPI peripheral */
 1008 
    /* Enable SPI peripheral */
494 
      __HAL_SPI_ENABLE(hspi);
 1009 
    __HAL_SPI_ENABLE(hspi);
495 
    }
 1010 
  }
496 
 
 1011 
 
497 
    /* Receive data in 8 Bit mode */
 1012 
  /* Receive data in 8 Bit mode */
498 
    if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
 1013 
  if (hspi->Init.DataSize == SPI_DATASIZE_8BIT)
- 
 
 1014 
  {
- 
 
 1015 
    /* Transfer loop */
- 
 
 1016 
    while (hspi->RxXferCount > 0U)
499 
    {
 1017 
    {
500 
      while(hspi->RxXferCount > 1)
 1018 
      /* Check the RXNE flag */
- 
 
 1019 
      if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE))
501 
      {
 1020 
      {
502 
        /* Wait until RXNE flag is set */
 1021 
        /* read the received data */
503 
        if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
 1022 
        (* (uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)&hspi->Instance->DR;
504 
        {
 - 
 
505 
          return HAL_TIMEOUT;
 - 
 
506 
        }
 - 
 
507 
 
 - 
 
508 
        (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
 1023 
        hspi->pRxBuffPtr += sizeof(uint8_t);
509 
        hspi->RxXferCount--;
 1024 
        hspi->RxXferCount--;
510 
      }
 1025 
      }
511 
      /* Enable CRC Transmission */
 1026 
      else
512 
      if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
 - 
 
513 
      {
 1027 
      {
- 
 
 1028 
        /* Timeout management */
- 
 
 1029 
        if ((((HAL_GetTick() - tickstart) >=  Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
- 
 
 1030 
        {
514 
        SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
 1031 
          errorcode = HAL_TIMEOUT;
- 
 
 1032 
          goto error;
- 
 
 1033 
        }
515 
      }
 1034 
      }
516 
    }
 1035 
    }
517 
    /* Receive data in 16 Bit mode */
 1036 
  }
518 
    else
 1037 
  else
- 
 
 1038 
  {
- 
 
 1039 
    /* Transfer loop */
- 
 
 1040 
    while (hspi->RxXferCount > 0U)
519 
    {
 1041 
    {
520 
      while(hspi->RxXferCount > 1)
 1042 
      /* Check the RXNE flag */
- 
 
 1043 
      if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE))
521 
      {
 1044 
      {
522 
        /* Wait until RXNE flag is set to read data */
 - 
 
523 
        if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
 - 
 
524 
        {
 - 
 
525 
          return HAL_TIMEOUT;
 - 
 
526 
        }
 - 
 
527 
 
 - 
 
528 
        *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
 1045 
        *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR;
529 
        hspi->pRxBuffPtr+=2;
 1046 
        hspi->pRxBuffPtr += sizeof(uint16_t);
530 
        hspi->RxXferCount--;
 1047 
        hspi->RxXferCount--;
531 
      }
 1048 
      }
532 
      /* Enable CRC Transmission */
 1049 
      else
533 
      if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
 - 
 
534 
      {
 1050 
      {
- 
 
 1051 
        /* Timeout management */
- 
 
 1052 
        if ((((HAL_GetTick() - tickstart) >=  Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
- 
 
 1053 
        {
535 
        SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
 1054 
          errorcode = HAL_TIMEOUT;
- 
 
 1055 
          goto error;
- 
 
 1056 
        }
536 
      }
 1057 
      }
537 
    }
 1058 
    }
- 
 
 1059 
  }
538 
 
 1060 
 
- 
 
 1061 
#if (USE_SPI_CRC != 0U)
539 
    /* Wait until RXNE flag is set */
 1062 
  /* Handle the CRC Transmission */
540 
    if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
 1063 
  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
541 
    {
 1064 
  {
542 
      return HAL_TIMEOUT;
 1065 
    /* freeze the CRC before the latest data */
543 
    }
 1066 
    SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
544 
 
 1067 
 
545 
    /* Receive last data in 8 Bit mode */
 1068 
    /* Read the latest data */
546 
    if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
 1069 
    if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK)
547 
    {
 1070 
    {
548 
      (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
 1071 
      /* the latest data has not been received */
- 
 
 1072 
      errorcode = HAL_TIMEOUT;
- 
 
 1073 
      goto error;
549 
    }
 1074 
    }
550 
    /* Receive last data in 16 Bit mode */
 - 
 
551 
    else
 - 
 
552 
    {
 - 
 
553 
      *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
 - 
 
554 
      hspi->pRxBuffPtr+=2;
 - 
 
555 
    }
 - 
 
556 
    hspi->RxXferCount--;
 - 
 
557 
 
 1075 
 
558 
    /* Wait until RXNE flag is set: CRC Received */
 1076 
    /* Receive last data in 16 Bit mode */
559 
    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
 1077 
    if (hspi->Init.DataSize == SPI_DATASIZE_16BIT)
560 
    {
 1078 
    {
561 
      if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
 - 
 
562 
      {
 - 
 
563 
        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
 - 
 
564 
        return HAL_TIMEOUT;
 - 
 
565 
      }
 - 
 
566 
 
 - 
 
567 
      /* Read CRC to Flush RXNE flag */
 - 
 
568 
      tmpreg = hspi->Instance->DR;
 1079 
      *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR;
569 
      UNUSED(tmpreg);
 - 
 
570 
    }
 1080 
    }
- 
 
 1081 
    /* Receive last data in 8 Bit mode */
571 
   
 1082 
    else
572 
    if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
 - 
 
573 
    {
 1083 
    {
574 
      /* Disable SPI peripheral */
 1084 
      (*(uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)&hspi->Instance->DR;
575 
      __HAL_SPI_DISABLE(hspi);
 - 
 
576 
    }
 1085 
    }
577 
 
 1086 
 
578 
    hspi->State = HAL_SPI_STATE_READY;
 - 
 
579 
 
 - 
 
580 
    /* Check if CRC error occurred */
 1087 
    /* Wait the CRC data */
581 
    if((hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET))
 1088 
    if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK)
582 
    {  
 1089 
    {
583 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
 1090 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
584 
 
 - 
 
585 
      /* Reset CRC Calculation */
 - 
 
586 
      SPI_RESET_CRC(hspi);
 - 
 
587 
 
 - 
 
588 
      /* Process Unlocked */
 1091 
      errorcode = HAL_TIMEOUT;
589 
      __HAL_UNLOCK(hspi);
 - 
 
590 
 
 - 
 
591 
      return HAL_ERROR;
 1092 
      goto error;
592 
    }
 1093 
    }
593 
 
 1094 
 
594 
    /* Process Unlocked */
 1095 
    /* Read CRC to Flush DR and RXNE flag */
595 
    __HAL_UNLOCK(hspi);
 1096 
    READ_REG(hspi->Instance->DR);
- 
 
 1097 
  }
- 
 
 1098 
#endif /* USE_SPI_CRC */
596 
 
 1099 
 
- 
 
 1100 
  /* Check the end of the transaction */
- 
 
 1101 
  if (SPI_EndRxTransaction(hspi, Timeout, tickstart) != HAL_OK)
- 
 
 1102 
  {
597 
    return HAL_OK;
 1103 
    hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
598 
  }
 1104 
  }
599 
  else
 1105 
 
- 
 
 1106 
#if (USE_SPI_CRC != 0U)
- 
 
 1107 
  /* Check if CRC error occurred */
- 
 
 1108 
  if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR))
600 
  {
 1109 
  {
- 
 
 1110 
    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
601 
    return HAL_BUSY;
 1111 
    __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
602 
  }
 1112 
  }
- 
 
 1113 
#endif /* USE_SPI_CRC */
- 
 
 1114 
 
- 
 
 1115 
  if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
- 
 
 1116 
  {
- 
 
 1117 
    errorcode = HAL_ERROR;
- 
 
 1118 
  }
- 
 
 1119 
 
- 
 
 1120 
error :
- 
 
 1121 
  hspi->State = HAL_SPI_STATE_READY;
- 
 
 1122 
  __HAL_UNLOCK(hspi);
- 
 
 1123 
  return errorcode;
603 
}
 1124 
}
604 
 
 1125 
 
605 
/**
 1126 
/**
606 
  * @brief  Transmit and Receive an amount of data in blocking mode
 1127 
  * @brief  Transmit and Receive an amount of data in blocking mode.
607 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 1128 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
608 
  *                the configuration information for SPI module.
 1129 
  *               the configuration information for SPI module.
609 
  * @param  pTxData: pointer to transmission data buffer
 1130 
  * @param  pTxData pointer to transmission data buffer
610 
  * @param  pRxData: pointer to reception data buffer to be
 1131 
  * @param  pRxData pointer to reception data buffer
611 
  * @param  Size: amount of data to be sent
 1132 
  * @param  Size amount of data to be sent and received
612 
  * @param  Timeout: Timeout duration
 1133 
  * @param  Timeout Timeout duration
613 
  * @retval HAL status
 1134 
  * @retval HAL status
614 
  */
 1135 
  */
615 
HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
 1136 
HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size,
- 
 
 1137 
                                          uint32_t Timeout)
616 
{
 1138 
{
- 
 
 1139 
  uint16_t             initial_TxXferCount;
- 
 
 1140 
  uint32_t             tmp_mode;
617 
  __IO uint16_t tmpreg = 0;
 1141 
  HAL_SPI_StateTypeDef tmp_state;
- 
 
 1142 
  uint32_t             tickstart;
- 
 
 1143 
 
- 
 
 1144 
  /* Variable used to alternate Rx and Tx during transfer */
- 
 
 1145 
  uint32_t             txallowed = 1U;
- 
 
 1146 
  HAL_StatusTypeDef    errorcode = HAL_OK;
- 
 
 1147 
 
- 
 
 1148 
  /* Check Direction parameter */
- 
 
 1149 
  assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
- 
 
 1150 
 
- 
 
 1151 
  /* Process Locked */
- 
 
 1152 
  __HAL_LOCK(hspi);
618 
 
 1153 
 
- 
 
 1154 
  /* Init tickstart for timeout management*/
- 
 
 1155 
  tickstart = HAL_GetTick();
- 
 
 1156 
 
- 
 
 1157 
  /* Init temporary variables */
- 
 
 1158 
  tmp_state           = hspi->State;
- 
 
 1159 
  tmp_mode            = hspi->Init.Mode;
- 
 
 1160 
  initial_TxXferCount = Size;
- 
 
 1161 
 
619 
  if((hspi->State == HAL_SPI_STATE_READY) || (hspi->State == HAL_SPI_STATE_BUSY_RX))
 1162 
  if (!((tmp_state == HAL_SPI_STATE_READY) || \
- 
 
 1163 
        ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX))))
620 
  {
 1164 
  {
621 
    if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
 1165 
    errorcode = HAL_BUSY;
622 
    {
 - 
 
623 
      return  HAL_ERROR;
 1166 
    goto error;
624 
    }
 1167 
  }
625 
 
 1168 
 
- 
 
 1169 
  if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
- 
 
 1170 
  {
626 
    /* Check the parameters */
 1171 
    errorcode = HAL_ERROR;
627 
    assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
 1172 
    goto error;
- 
 
 1173 
  }
628 
 
 1174 
 
629 
    /* Process Locked */
 - 
 
630 
    __HAL_LOCK(hspi);
 - 
 
631 
 
 - 
 
632 
    /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
 1175 
  /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
633 
    if(hspi->State == HAL_SPI_STATE_READY)
 1176 
  if (hspi->State != HAL_SPI_STATE_BUSY_RX)
634 
    {
 1177 
  {
635 
      hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
 1178 
    hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
636 
    }
 1179 
  }
637 
 
 1180 
 
638 
     /* Configure communication */  
 1181 
  /* Set the transaction information */
639 
    hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
 1182 
  hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
- 
 
 1183 
  hspi->pRxBuffPtr  = (uint8_t *)pRxData;
- 
 
 1184 
  hspi->RxXferCount = Size;
- 
 
 1185 
  hspi->RxXferSize  = Size;
- 
 
 1186 
  hspi->pTxBuffPtr  = (uint8_t *)pTxData;
- 
 
 1187 
  hspi->TxXferCount = Size;
- 
 
 1188 
  hspi->TxXferSize  = Size;
640 
 
 1189 
 
641 
    hspi->pRxBuffPtr  = pRxData;
 1190 
  /*Init field not used in handle to zero */
642 
    hspi->RxXferSize  = Size;
 1191 
  hspi->RxISR       = NULL;
643 
    hspi->RxXferCount = Size;  
 - 
 
644 
   
 - 
 
645 
    hspi->pTxBuffPtr  = pTxData;
 - 
 
646 
    hspi->TxXferSize  = Size;
 1192 
  hspi->TxISR       = NULL;
647 
    hspi->TxXferCount = Size;
 - 
 
648 
 
 1193 
 
- 
 
 1194 
#if (USE_SPI_CRC != 0U)
649 
    /*Init field not used in handle to zero */
 1195 
  /* Reset CRC Calculation */
- 
 
 1196 
  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
- 
 
 1197 
  {
650 
    hspi->RxISR = 0;
 1198 
    SPI_RESET_CRC(hspi);
- 
 
 1199 
  }
651 
    hspi->TxISR = 0;
 1200 
#endif /* USE_SPI_CRC */
652 
 
 1201 
 
653 
    /* Reset CRC Calculation */
 1202 
  /* Check if the SPI is already enabled */
654 
    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
 1203 
  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
655 
    {
 1204 
  {
- 
 
 1205 
    /* Enable SPI peripheral */
656 
      SPI_RESET_CRC(hspi);
 1206 
    __HAL_SPI_ENABLE(hspi);
657 
    }
 1207 
  }
658 
 
 1208 
 
659 
    /* Check if the SPI is already enabled */
 1209 
  /* Transmit and Receive data in 16 Bit mode */
660 
    if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
 1210 
  if (hspi->Init.DataSize == SPI_DATASIZE_16BIT)
- 
 
 1211 
  {
- 
 
 1212 
    if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
661 
    {
 1213 
    {
- 
 
 1214 
      hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
662 
      /* Enable SPI peripheral */
 1215 
      hspi->pTxBuffPtr += sizeof(uint16_t);
663 
      __HAL_SPI_ENABLE(hspi);
 1216 
      hspi->TxXferCount--;
664 
    }
 1217 
    }
665 
 
 - 
 
666 
    /* Transmit and Receive data in 16 Bit mode */
 - 
 
667 
    if(hspi->Init.DataSize == SPI_DATASIZE_16BIT)
 1218 
    while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
668 
    {
 1219 
    {
- 
 
 1220 
      /* Check TXE flag */
669 
      if((hspi->Init.Mode == SPI_MODE_SLAVE) || ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->TxXferCount == 0x01)))
 1221 
      if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U))
670 
      {
 1222 
      {
671 
        hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
 1223 
        hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
672 
        hspi->pTxBuffPtr+=2;
 1224 
        hspi->pTxBuffPtr += sizeof(uint16_t);
673 
        hspi->TxXferCount--;
 1225 
        hspi->TxXferCount--;
674 
      }
 1226 
        /* Next Data is a reception (Rx). Tx not allowed */
675 
      if(hspi->TxXferCount == 0)
 1227 
        txallowed = 0U;
- 
 
 1228 
 
676 
      {
 1229 
#if (USE_SPI_CRC != 0U)
677 
        /* Enable CRC Transmission */
 1230 
        /* Enable CRC Transmission */
678 
        if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
 1231 
        if ((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
679 
        {
 1232 
        {
680 
          SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
 1233 
          SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
681 
        }
 1234 
        }
- 
 
 1235 
#endif /* USE_SPI_CRC */
- 
 
 1236 
      }
682 
 
 1237 
 
683 
        /* Wait until RXNE flag is set */
 1238 
      /* Check RXNE flag */
684 
        if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
 1239 
      if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U))
685 
        {
 1240 
      {
686 
          return HAL_TIMEOUT;
 - 
 
687 
        }
 - 
 
688 
 
 - 
 
689 
        *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
 1241 
        *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR;
690 
        hspi->pRxBuffPtr+=2;
 1242 
        hspi->pRxBuffPtr += sizeof(uint16_t);
691 
        hspi->RxXferCount--;
 1243 
        hspi->RxXferCount--;
- 
 
 1244 
        /* Next Data is a Transmission (Tx). Tx is allowed */
- 
 
 1245 
        txallowed = 1U;
692 
      }
 1246 
      }
693 
      else
 1247 
      if (((HAL_GetTick() - tickstart) >=  Timeout) && (Timeout != HAL_MAX_DELAY))
694 
      {
 1248 
      {
695 
        while(hspi->TxXferCount > 0)
 - 
 
696 
        {
 - 
 
697 
          /* Wait until TXE flag is set to send data */
 - 
 
698 
          if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
 - 
 
699 
          {
 - 
 
700 
            return HAL_TIMEOUT;
 1249 
        errorcode = HAL_TIMEOUT;
701 
          }
 - 
 
702 
 
 - 
 
703 
          hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
 - 
 
704 
          hspi->pTxBuffPtr+=2;
 - 
 
705 
          hspi->TxXferCount--;
 - 
 
706 
 
 - 
 
707 
          /* Enable CRC Transmission */
 - 
 
708 
          if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
 - 
 
709 
          {
 - 
 
710 
            SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
 - 
 
711 
          }
 - 
 
712 
 
 - 
 
713 
          /* Wait until RXNE flag is set */
 - 
 
714 
          if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
 - 
 
715 
          {
 1250 
        goto error;
716 
            return HAL_TIMEOUT;
 - 
 
717 
          }
 - 
 
718 
 
 - 
 
719 
          *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
 - 
 
720 
          hspi->pRxBuffPtr+=2;
 - 
 
721 
          hspi->RxXferCount--;
 - 
 
722 
        }
 - 
 
723 
        /* Receive the last byte */
 - 
 
724 
        if(hspi->Init.Mode == SPI_MODE_SLAVE)
 - 
 
725 
        {
 - 
 
726 
          /* Wait until RXNE flag is set */
 - 
 
727 
          if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
 - 
 
728 
          {
 - 
 
729 
            return HAL_TIMEOUT;
 - 
 
730 
          }
 - 
 
731 
         
 - 
 
732 
          *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
 - 
 
733 
          hspi->pRxBuffPtr+=2;
 - 
 
734 
          hspi->RxXferCount--;
 - 
 
735 
        }
 - 
 
736 
      }
 1251 
      }
737 
    }
 1252 
    }
- 
 
 1253 
  }
738 
    /* Transmit and Receive data in 8 Bit mode */
 1254 
  /* Transmit and Receive data in 8 Bit mode */
739 
    else
 1255 
  else
- 
 
 1256 
  {
- 
 
 1257 
    if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
740 
    {
 1258 
    {
- 
 
 1259 
      *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
- 
 
 1260 
      hspi->pTxBuffPtr += sizeof(uint8_t);
- 
 
 1261 
      hspi->TxXferCount--;
- 
 
 1262 
    }
- 
 
 1263 
    while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
- 
 
 1264 
    {
- 
 
 1265 
      /* Check TXE flag */
741 
      if((hspi->Init.Mode == SPI_MODE_SLAVE) || ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->TxXferCount == 0x01)))
 1266 
      if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U))
742 
      {
 1267 
      {
743 
        hspi->Instance->DR = (*hspi->pTxBuffPtr++);
 1268 
        *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr);
- 
 
 1269 
        hspi->pTxBuffPtr++;
744 
        hspi->TxXferCount--;
 1270 
        hspi->TxXferCount--;
745 
      }
 1271 
        /* Next Data is a reception (Rx). Tx not allowed */
746 
      if(hspi->TxXferCount == 0)
 1272 
        txallowed = 0U;
- 
 
 1273 
 
747 
      {
 1274 
#if (USE_SPI_CRC != 0U)
748 
        /* Enable CRC Transmission */
 1275 
        /* Enable CRC Transmission */
749 
        if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
 1276 
        if ((hspi->TxXferCount == 0U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
750 
        {
 1277 
        {
751 
          SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
 1278 
          SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
752 
        }
 1279 
        }
753 
 
 - 
 
754 
        /* Wait until RXNE flag is set */
 - 
 
755 
        if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
 - 
 
756 
        {
 - 
 
757 
          return HAL_TIMEOUT;
 1280 
#endif /* USE_SPI_CRC */
758 
        }
 - 
 
759 
 
 - 
 
760 
        (*hspi->pRxBuffPtr) = hspi->Instance->DR;
 - 
 
761 
        hspi->RxXferCount--;
 - 
 
762 
      }
 1281 
      }
763 
      else
 - 
 
764 
      {
 - 
 
765 
        while(hspi->TxXferCount > 0)
 - 
 
766 
        {
 - 
 
767 
          /* Wait until TXE flag is set to send data */
 - 
 
768 
          if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
 - 
 
769 
          {
 - 
 
770 
            return HAL_TIMEOUT;
 - 
 
771 
          }
 - 
 
772 
 
 1282 
 
773 
          hspi->Instance->DR = (*hspi->pTxBuffPtr++);
 - 
 
774 
          hspi->TxXferCount--;
 - 
 
775 
 
 - 
 
776 
          /* Enable CRC Transmission */
 - 
 
777 
          if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
 - 
 
778 
          {
 - 
 
779 
            SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
 - 
 
780 
          }
 - 
 
781 
 
 - 
 
782 
          /* Wait until RXNE flag is set */
 1283 
      /* Wait until RXNE flag is reset */
783 
          if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
 1284 
      if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U))
784 
          {
 1285 
      {
785 
            return HAL_TIMEOUT;
 - 
 
786 
          }
 - 
 
787 
 
 - 
 
788 
          (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
 1286 
        (*(uint8_t *)hspi->pRxBuffPtr) = hspi->Instance->DR;
789 
          hspi->RxXferCount--;
 1287 
        hspi->pRxBuffPtr++;
790 
        }
 - 
 
791 
        if(hspi->Init.Mode == SPI_MODE_SLAVE)
 1288 
        hspi->RxXferCount--;
792 
        {
 - 
 
793 
          /* Wait until RXNE flag is set */
 1289 
        /* Next Data is a Transmission (Tx). Tx is allowed */
794 
          if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
 - 
 
795 
          {
 - 
 
796 
            return HAL_TIMEOUT;
 - 
 
797 
          }
 1290 
        txallowed = 1U;
798 
         
 - 
 
799 
          (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
 - 
 
800 
          hspi->RxXferCount--;
 - 
 
801 
        }
 - 
 
802 
      }
 1291 
      }
803 
    }
 - 
 
804 
 
 - 
 
805 
    /* Read CRC from DR to close CRC calculation process */
 - 
 
806 
    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
 - 
 
807 
    {
 - 
 
808 
      /* Wait until RXNE flag is set */
 - 
 
809 
      if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
 1292 
      if ((((HAL_GetTick() - tickstart) >=  Timeout) && ((Timeout != HAL_MAX_DELAY))) || (Timeout == 0U))
810 
      {
 1293 
      {
811 
        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
 1294 
        errorcode = HAL_TIMEOUT;
812 
        return HAL_TIMEOUT;
 1295 
        goto error;
813 
      }
 1296 
      }
814 
      /* Read CRC */
 - 
 
815 
      tmpreg = hspi->Instance->DR;
 - 
 
816 
      UNUSED(tmpreg);
 - 
 
817 
    }
 1297 
    }
- 
 
 1298 
  }
818 
 
 1299 
 
819 
    /* Wait until Busy flag is reset before disabling SPI */
 1300 
#if (USE_SPI_CRC != 0U)
820 
    if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, Timeout) != HAL_OK)
 1301 
  /* Read CRC from DR to close CRC calculation process */
821 
    {
 - 
 
822 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
 1302 
  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
823 
      return HAL_TIMEOUT;
 - 
 
824 
    }
 - 
 
825 
   
 1303 
  {
826 
    hspi->State = HAL_SPI_STATE_READY;
 - 
 
827 
 
 - 
 
828 
    /* Check if CRC error occurred */
 1304 
    /* Wait until TXE flag */
829 
    if((hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET))
 1305 
    if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, Timeout, tickstart) != HAL_OK)
830 
    {
 1306 
    {
- 
 
 1307 
      /* Error on the CRC reception */
831 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
 1308 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
832 
 
 - 
 
833 
      /* Reset CRC Calculation */
 - 
 
834 
      if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
 - 
 
835 
      {
 - 
 
836 
        SPI_RESET_CRC(hspi);
 - 
 
837 
      }
 - 
 
838 
 
 - 
 
839 
      /* Process Unlocked */
 1309 
      errorcode = HAL_TIMEOUT;
840 
      __HAL_UNLOCK(hspi);
 - 
 
841 
     
 - 
 
842 
      return HAL_ERROR;
 1310 
      goto error;
843 
    }
 1311 
    }
- 
 
 1312 
    /* Read CRC */
- 
 
 1313 
    READ_REG(hspi->Instance->DR);
- 
 
 1314 
  }
844 
 
 1315 
 
- 
 
 1316 
  /* Check if CRC error occurred */
- 
 
 1317 
  if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR))
- 
 
 1318 
  {
- 
 
 1319 
    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
845 
    /* Process Unlocked */
 1320 
    /* Clear CRC Flag */
846 
    __HAL_UNLOCK(hspi);
 1321 
    __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
847 
 
 1322 
 
848 
    return HAL_OK;
 1323 
    errorcode = HAL_ERROR;
849 
  }
 1324 
  }
- 
 
 1325 
#endif /* USE_SPI_CRC */
850 
  else
 1326 
 
- 
 
 1327 
  /* Check the end of the transaction */
- 
 
 1328 
  if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK)
851 
  {
 1329 
  {
852 
    return HAL_BUSY;
 1330 
    errorcode = HAL_ERROR;
- 
 
 1331 
    hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
- 
 
 1332 
    goto error;
- 
 
 1333 
  }
- 
 
 1334 
 
- 
 
 1335 
  /* Clear overrun flag in 2 Lines communication mode because received is not read */
- 
 
 1336 
  if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
- 
 
 1337 
  {
- 
 
 1338 
    __HAL_SPI_CLEAR_OVRFLAG(hspi);
853 
  }
 1339 
  }
- 
 
 1340 
 
- 
 
 1341 
error :
- 
 
 1342 
  hspi->State = HAL_SPI_STATE_READY;
- 
 
 1343 
  __HAL_UNLOCK(hspi);
- 
 
 1344 
  return errorcode;
854 
}
 1345 
}
855 
 
 1346 
 
856 
/**
 1347 
/**
857 
  * @brief  Transmit an amount of data in no-blocking mode with Interrupt
 1348 
  * @brief  Transmit an amount of data in non-blocking mode with Interrupt.
858 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 1349 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
859 
  *                the configuration information for SPI module.
 1350 
  *               the configuration information for SPI module.
860 
  * @param  pData: pointer to data buffer
 1351 
  * @param  pData pointer to data buffer
861 
  * @param  Size: amount of data to be sent
 1352 
  * @param  Size amount of data to be sent
862 
  * @retval HAL status
 1353 
  * @retval HAL status
863 
  */
 1354 
  */
864 
HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
 1355 
HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
865 
{
 1356 
{
866 
  if(hspi->State == HAL_SPI_STATE_READY)
 - 
 
867 
  {
 - 
 
868 
    if((pData == NULL) || (Size == 0))
 1357 
  HAL_StatusTypeDef errorcode = HAL_OK;
869 
    {
 - 
 
870 
      return  HAL_ERROR;
 - 
 
871 
    }
 - 
 
872 
 
 - 
 
873 
    /* Check the parameters */
 - 
 
874 
    assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
 - 
 
875 
 
 1358 
 
876 
    /* Process Locked */
 1359 
  /* Check Direction parameter */
877 
    __HAL_LOCK(hspi);
 1360 
  assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
878 
 
 1361 
 
879 
    /* Configure communication */
 1362 
  /* Process Locked */
880 
    hspi->State        = HAL_SPI_STATE_BUSY_TX;
 - 
 
881 
    hspi->ErrorCode    = HAL_SPI_ERROR_NONE;
 1363 
  __HAL_LOCK(hspi);
882 
 
 1364 
 
883 
    hspi->TxISR = &SPI_TxISR;
 1365 
  if ((pData == NULL) || (Size == 0U))
884 
    hspi->pTxBuffPtr   = pData;
 1366 
  {
885 
    hspi->TxXferSize   = Size;
 1367 
    errorcode = HAL_ERROR;
886 
    hspi->TxXferCount  = Size;
 1368 
    goto error;
- 
 
 1369 
  }
887 
 
 1370 
 
888 
    /*Init field not used in handle to zero */
 1371 
  if (hspi->State != HAL_SPI_STATE_READY)
889 
    hspi->RxISR = 0;
 1372 
  {
890 
    hspi->pRxBuffPtr   = NULL;
 1373 
    errorcode = HAL_BUSY;
891 
    hspi->RxXferSize   = 0;
 1374 
    goto error;
892 
    hspi->RxXferCount  = 0;
 1375 
  }
893 
 
 1376 
 
894 
    /* Configure communication direction : 1Line */
 1377 
  /* Set the transaction information */
- 
 
 1378 
  hspi->State       = HAL_SPI_STATE_BUSY_TX;
895 
    if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
 1379 
  hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
896 
    {
 1380 
  hspi->pTxBuffPtr  = (uint8_t *)pData;
897 
      SPI_1LINE_TX(hspi);
 1381 
  hspi->TxXferSize  = Size;
898 
    }
 1382 
  hspi->TxXferCount = Size;
899 
 
 1383 
 
900 
    /* Reset CRC Calculation */
 1384 
  /* Init field not used in handle to zero */
901 
    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
 1385 
  hspi->pRxBuffPtr  = (uint8_t *)NULL;
902 
    {
 1386 
  hspi->RxXferSize  = 0U;
903 
      SPI_RESET_CRC(hspi);
 1387 
  hspi->RxXferCount = 0U;
904 
    }
 1388 
  hspi->RxISR       = NULL;
905 
 
 1389 
 
- 
 
 1390 
  /* Set the function for IT treatment */
906 
    if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
 1391 
  if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
907 
    {
 1392 
  {
908 
      __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE));
 1393 
    hspi->TxISR = SPI_TxISR_16BIT;
- 
 
 1394 
  }
909 
    }else
 1395 
  else
910 
    {
 1396 
  {
911 
      /* Enable TXE and ERR interrupt */
 1397 
    hspi->TxISR = SPI_TxISR_8BIT;
912 
      __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
 - 
 
913 
    }
 1398 
  }
914 
    /* Process Unlocked */
 - 
 
915 
    __HAL_UNLOCK(hspi);
 - 
 
916 
 
 1399 
 
917 
    /* Check if the SPI is already enabled */
 1400 
  /* Configure communication direction : 1Line */
918 
    if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
 1401 
  if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
919 
    {
 1402 
  {
920 
      /* Enable SPI peripheral */
 1403 
    /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */
921 
      __HAL_SPI_ENABLE(hspi);
 1404 
    __HAL_SPI_DISABLE(hspi);
- 
 
 1405 
    SPI_1LINE_TX(hspi);
922 
    }
 1406 
  }
923 
 
 1407 
 
- 
 
 1408 
#if (USE_SPI_CRC != 0U)
- 
 
 1409 
  /* Reset CRC Calculation */
- 
 
 1410 
  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
- 
 
 1411 
  {
924 
    return HAL_OK;
 1412 
    SPI_RESET_CRC(hspi);
925 
  }
 1413 
  }
- 
 
 1414 
#endif /* USE_SPI_CRC */
- 
 
 1415 
 
- 
 
 1416 
  /* Enable TXE and ERR interrupt */
- 
 
 1417 
  __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
- 
 
 1418 
 
926 
  else
 1419 
 
- 
 
 1420 
  /* Check if the SPI is already enabled */
- 
 
 1421 
  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
927 
  {
 1422 
  {
- 
 
 1423 
    /* Enable SPI peripheral */
928 
    return HAL_BUSY;
 1424 
    __HAL_SPI_ENABLE(hspi);
929 
  }
 1425 
  }
- 
 
 1426 
 
- 
 
 1427 
error :
- 
 
 1428 
  __HAL_UNLOCK(hspi);
- 
 
 1429 
  return errorcode;
930 
}
 1430 
}
931 
 
 1431 
 
932 
/**
 1432 
/**
933 
  * @brief  Receive an amount of data in no-blocking mode with Interrupt
 1433 
  * @brief  Receive an amount of data in non-blocking mode with Interrupt.
934 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 1434 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
935 
  *                the configuration information for SPI module.
 1435 
  *               the configuration information for SPI module.
936 
  * @param  pData: pointer to data buffer
 1436 
  * @param  pData pointer to data buffer
937 
  * @param  Size: amount of data to be sent
 1437 
  * @param  Size amount of data to be sent
938 
  * @retval HAL status
 1438 
  * @retval HAL status
939 
  */
 1439 
  */
940 
HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
 1440 
HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
941 
{
 1441 
{
942 
  if(hspi->State == HAL_SPI_STATE_READY)
 1442 
  HAL_StatusTypeDef errorcode = HAL_OK;
- 
 
 1443 
 
- 
 
 1444 
  if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
943 
  {
 1445 
  {
944 
    if((pData == NULL) || (Size == 0))
 1446 
    hspi->State = HAL_SPI_STATE_BUSY_RX;
945 
    {
 - 
 
- 
 
 1447 
    /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
946 
      return  HAL_ERROR;
 1448 
    return HAL_SPI_TransmitReceive_IT(hspi, pData, pData, Size);
947 
    }
 1449 
  }
948 
 
 1450 
 
949 
    /* Process Locked */
 1451 
  /* Process Locked */
950 
    __HAL_LOCK(hspi);
 1452 
  __HAL_LOCK(hspi);
951 
 
 1453 
 
952 
    /* Configure communication */
 - 
 
953 
    hspi->State        = HAL_SPI_STATE_BUSY_RX;
 1454 
  if (hspi->State != HAL_SPI_STATE_READY)
- 
 
 1455 
  {
954 
    hspi->ErrorCode    = HAL_SPI_ERROR_NONE;
 1456 
    errorcode = HAL_BUSY;
- 
 
 1457 
    goto error;
- 
 
 1458 
  }
955 
 
 1459 
 
956 
    hspi->RxISR = &SPI_RxISR;
 1460 
  if ((pData == NULL) || (Size == 0U))
957 
    hspi->pRxBuffPtr   = pData;
 1461 
  {
958 
    hspi->RxXferSize   = Size;
 1462 
    errorcode = HAL_ERROR;
959 
    hspi->RxXferCount  = Size ;
 1463 
    goto error;
- 
 
 1464 
  }
960 
 
 1465 
 
961 
   /*Init field not used in handle to zero */
 1466 
  /* Set the transaction information */
- 
 
 1467 
  hspi->State       = HAL_SPI_STATE_BUSY_RX;
962 
    hspi->TxISR = 0;
 1468 
  hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
963 
    hspi->pTxBuffPtr   = NULL;
 1469 
  hspi->pRxBuffPtr  = (uint8_t *)pData;
964 
    hspi->TxXferSize   = 0;
 1470 
  hspi->RxXferSize  = Size;
965 
    hspi->TxXferCount  = 0;
 1471 
  hspi->RxXferCount = Size;
966 
 
 1472 
 
967 
    /* Configure communication direction : 1Line */
 1473 
  /* Init field not used in handle to zero */
968 
    if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
 1474 
  hspi->pTxBuffPtr  = (uint8_t *)NULL;
969 
    {
 - 
 
970 
       SPI_1LINE_RX(hspi);
 1475 
  hspi->TxXferSize  = 0U;
971 
    }
 - 
 
972 
    else if((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
 - 
 
973 
    {
 - 
 
974 
       /* Process Unlocked */
 1476 
  hspi->TxXferCount = 0U;
975 
       __HAL_UNLOCK(hspi);
 1477 
  hspi->TxISR       = NULL;
976 
 
 1478 
 
977 
       /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
 1479 
  /* Set the function for IT treatment */
978 
       return HAL_SPI_TransmitReceive_IT(hspi, pData, pData, Size);
 1480 
  if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
- 
 
 1481 
  {
- 
 
 1482 
    hspi->RxISR = SPI_RxISR_16BIT;
- 
 
 1483 
  }
- 
 
 1484 
  else
- 
 
 1485 
  {
- 
 
 1486 
    hspi->RxISR = SPI_RxISR_8BIT;
979 
    }
 1487 
  }
980 
 
 1488 
 
- 
 
 1489 
  /* Configure communication direction : 1Line */
- 
 
 1490 
  if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
- 
 
 1491 
  {
- 
 
 1492 
    /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */
- 
 
 1493 
    __HAL_SPI_DISABLE(hspi);
- 
 
 1494 
    SPI_1LINE_RX(hspi);
- 
 
 1495 
  }
- 
 
 1496 
 
- 
 
 1497 
#if (USE_SPI_CRC != 0U)
981 
    /* Reset CRC Calculation */
 1498 
  /* Reset CRC Calculation */
982 
    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
 1499 
  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
983 
    {
 1500 
  {
984 
      SPI_RESET_CRC(hspi);
 1501 
    SPI_RESET_CRC(hspi);
985 
    }
 1502 
  }
- 
 
 1503 
#endif /* USE_SPI_CRC */
986 
 
 1504 
 
987 
    /* Enable TXE and ERR interrupt */
 1505 
  /* Enable TXE and ERR interrupt */
988 
    __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
 1506 
  __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
989 
 
 1507 
 
990 
    /* Process Unlocked */
 1508 
  /* Note : The SPI must be enabled after unlocking current process
- 
 
 1509 
            to avoid the risk of SPI interrupt handle execution before current
991 
    __HAL_UNLOCK(hspi);
 1510 
            process unlock */
992 
 
 1511 
 
993 
    /* Note : The SPI must be enabled after unlocking current process
 1512 
  /* Check if the SPI is already enabled */
994 
              to avoid the risk of SPI interrupt handle execution before current
 1513 
  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
- 
 
 1514 
  {
995 
              process unlock */
 1515 
    /* Enable SPI peripheral */
- 
 
 1516 
    __HAL_SPI_ENABLE(hspi);
- 
 
 1517 
  }
996 
 
 1518 
 
- 
 
 1519 
error :
- 
 
 1520 
  /* Process Unlocked */
- 
 
 1521 
  __HAL_UNLOCK(hspi);
- 
 
 1522 
  return errorcode;
- 
 
 1523 
}
- 
 
 1524 
 
- 
 
 1525 
/**
- 
 
 1526 
  * @brief  Transmit and Receive an amount of data in non-blocking mode with Interrupt.
- 
 
 1527 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
997 
        /* Check if the SPI is already enabled */
 1528 
  *               the configuration information for SPI module.
998 
    if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
 1529 
  * @param  pTxData pointer to transmission data buffer
- 
 
 1530 
  * @param  pRxData pointer to reception data buffer
- 
 
 1531 
  * @param  Size amount of data to be sent and received
- 
 
 1532 
  * @retval HAL status
999 
    {
 1533 
  */
- 
 
 1534 
HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
- 
 
 1535 
{
- 
 
 1536 
  uint32_t             tmp_mode;
- 
 
 1537 
  HAL_SPI_StateTypeDef tmp_state;
- 
 
 1538 
  HAL_StatusTypeDef    errorcode = HAL_OK;
- 
 
 1539 
 
1000 
      /* Enable SPI peripheral */
 1540 
  /* Check Direction parameter */
- 
 
 1541 
  assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
- 
 
 1542 
 
- 
 
 1543 
  /* Process locked */
1001 
      __HAL_SPI_ENABLE(hspi);
 1544 
  __HAL_LOCK(hspi);
- 
 
 1545 
 
- 
 
 1546 
  /* Init temporary variables */
- 
 
 1547 
  tmp_state           = hspi->State;
- 
 
 1548 
  tmp_mode            = hspi->Init.Mode;
- 
 
 1549 
 
- 
 
 1550 
  if (!((tmp_state == HAL_SPI_STATE_READY) || \
- 
 
 1551 
        ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX))))
- 
 
 1552 
  {
- 
 
 1553 
    errorcode = HAL_BUSY;
- 
 
 1554 
    goto error;
- 
 
 1555 
  }
- 
 
 1556 
 
- 
 
 1557 
  if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
- 
 
 1558 
  {
- 
 
 1559 
    errorcode = HAL_ERROR;
- 
 
 1560 
    goto error;
1002 
    }
 1561 
  }
1003 
 
 1562 
 
- 
 
 1563 
  /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
- 
 
 1564 
  if (hspi->State != HAL_SPI_STATE_BUSY_RX)
- 
 
 1565 
  {
- 
 
 1566 
    hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
- 
 
 1567 
  }
- 
 
 1568 
 
- 
 
 1569 
  /* Set the transaction information */
- 
 
 1570 
  hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
- 
 
 1571 
  hspi->pTxBuffPtr  = (uint8_t *)pTxData;
- 
 
 1572 
  hspi->TxXferSize  = Size;
1004 
    return HAL_OK;
 1573 
  hspi->TxXferCount = Size;
- 
 
 1574 
  hspi->pRxBuffPtr  = (uint8_t *)pRxData;
- 
 
 1575 
  hspi->RxXferSize  = Size;
- 
 
 1576 
  hspi->RxXferCount = Size;
- 
 
 1577 
 
- 
 
 1578 
  /* Set the function for IT treatment */
- 
 
 1579 
  if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
- 
 
 1580 
  {
- 
 
 1581 
    hspi->RxISR     = SPI_2linesRxISR_16BIT;
- 
 
 1582 
    hspi->TxISR     = SPI_2linesTxISR_16BIT;
1005 
  }
 1583 
  }
1006 
  else
 1584 
  else
1007 
  {
 1585 
  {
- 
 
 1586 
    hspi->RxISR     = SPI_2linesRxISR_8BIT;
1008 
    return HAL_BUSY;
 1587 
    hspi->TxISR     = SPI_2linesTxISR_8BIT;
1009 
  }
 1588 
  }
- 
 
 1589 
 
- 
 
 1590 
#if (USE_SPI_CRC != 0U)
- 
 
 1591 
  /* Reset CRC Calculation */
- 
 
 1592 
  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
- 
 
 1593 
  {
- 
 
 1594 
    SPI_RESET_CRC(hspi);
- 
 
 1595 
  }
- 
 
 1596 
#endif /* USE_SPI_CRC */
- 
 
 1597 
 
- 
 
 1598 
  /* Enable TXE, RXNE and ERR interrupt */
- 
 
 1599 
  __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
- 
 
 1600 
 
- 
 
 1601 
  /* Check if the SPI is already enabled */
- 
 
 1602 
  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
- 
 
 1603 
  {
- 
 
 1604 
    /* Enable SPI peripheral */
- 
 
 1605 
    __HAL_SPI_ENABLE(hspi);
- 
 
 1606 
  }
- 
 
 1607 
 
- 
 
 1608 
error :
- 
 
 1609 
  /* Process Unlocked */
- 
 
 1610 
  __HAL_UNLOCK(hspi);
- 
 
 1611 
  return errorcode;
1010 
}
 1612 
}
1011 
 
 1613 
 
1012 
/**
 1614 
/**
1013 
  * @brief  Transmit and Receive an amount of data in no-blocking mode with Interrupt
 1615 
  * @brief  Transmit an amount of data in non-blocking mode with DMA.
1014 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 1616 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
1015 
  *                the configuration information for SPI module.
 1617 
  *               the configuration information for SPI module.
1016 
  * @param  pTxData: pointer to transmission data buffer
 1618 
  * @param  pData pointer to data buffer
1017 
  * @param  pRxData: pointer to reception data buffer to be
 - 
 
1018 
  * @param  Size: amount of data to be sent
 1619 
  * @param  Size amount of data to be sent
1019 
  * @retval HAL status
 1620 
  * @retval HAL status
1020 
  */
 1621 
  */
1021 
HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
 1622 
HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
1022 
{
 1623 
{
- 
 
 1624 
  HAL_StatusTypeDef errorcode = HAL_OK;
- 
 
 1625 
 
- 
 
 1626 
  /* Check tx dma handle */
- 
 
 1627 
  assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx));
- 
 
 1628 
 
- 
 
 1629 
  /* Check Direction parameter */
- 
 
 1630 
  assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
- 
 
 1631 
 
- 
 
 1632 
  /* Process Locked */
- 
 
 1633 
  __HAL_LOCK(hspi);
1023 
 
 1634 
 
1024 
  if((hspi->State == HAL_SPI_STATE_READY) || \
 1635 
  if (hspi->State != HAL_SPI_STATE_READY)
1025 
     ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX)))
 - 
 
1026 
  {
 1636 
  {
1027 
    if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
 1637 
    errorcode = HAL_BUSY;
1028 
    {
 - 
 
1029 
      return  HAL_ERROR;
 1638 
    goto error;
1030 
    }
 1639 
  }
1031 
 
 1640 
 
1032 
    /* Check the parameters */
 1641 
  if ((pData == NULL) || (Size == 0U))
- 
 
 1642 
  {
1033 
    assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
 1643 
    errorcode = HAL_ERROR;
- 
 
 1644 
    goto error;
- 
 
 1645 
  }
1034 
 
 1646 
 
1035 
    /* Process locked */
 1647 
  /* Set the transaction information */
- 
 
 1648 
  hspi->State       = HAL_SPI_STATE_BUSY_TX;
- 
 
 1649 
  hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
- 
 
 1650 
  hspi->pTxBuffPtr  = (uint8_t *)pData;
- 
 
 1651 
  hspi->TxXferSize  = Size;
1036 
    __HAL_LOCK(hspi);
 1652 
  hspi->TxXferCount = Size;
1037 
 
 1653 
 
1038 
    /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
 1654 
  /* Init field not used in handle to zero */
1039 
    if(hspi->State != HAL_SPI_STATE_BUSY_RX)
 1655 
  hspi->pRxBuffPtr  = (uint8_t *)NULL;
1040 
    {
 1656 
  hspi->TxISR       = NULL;
1041 
      hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
 1657 
  hspi->RxISR       = NULL;
- 
 
 1658 
  hspi->RxXferSize  = 0U;
1042 
    }
 1659 
  hspi->RxXferCount = 0U;
1043 
 
 1660 
 
1044 
    /* Configure communication */
 1661 
  /* Configure communication direction : 1Line */
1045 
    hspi->ErrorCode    = HAL_SPI_ERROR_NONE;
 1662 
  if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
- 
 
 1663 
  {
- 
 
 1664 
    /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */
- 
 
 1665 
    __HAL_SPI_DISABLE(hspi);
- 
 
 1666 
    SPI_1LINE_TX(hspi);
- 
 
 1667 
  }
1046 
 
 1668 
 
- 
 
 1669 
#if (USE_SPI_CRC != 0U)
1047 
    hspi->TxISR = &SPI_TxISR;
 1670 
  /* Reset CRC Calculation */
1048 
    hspi->pTxBuffPtr   = pTxData;
 1671 
  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
- 
 
 1672 
  {
1049 
    hspi->TxXferSize   = Size;
 1673 
    SPI_RESET_CRC(hspi);
- 
 
 1674 
  }
1050 
    hspi->TxXferCount  = Size;
 1675 
#endif /* USE_SPI_CRC */
1051 
 
 1676 
 
1052 
    hspi->RxISR = &SPI_2LinesRxISR;
 - 
 
1053 
    hspi->pRxBuffPtr   = pRxData;
 1677 
  /* Set the SPI TxDMA Half transfer complete callback */
1054 
    hspi->RxXferSize   = Size;
 - 
 
1055 
    hspi->RxXferCount  = Size;
 1678 
  hspi->hdmatx->XferHalfCpltCallback = SPI_DMAHalfTransmitCplt;
1056 
 
 1679 
 
1057 
    /* Reset CRC Calculation */
 1680 
  /* Set the SPI TxDMA transfer complete callback */
1058 
    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
 1681 
  hspi->hdmatx->XferCpltCallback = SPI_DMATransmitCplt;
1059 
    {
 - 
 
1060 
      SPI_RESET_CRC(hspi);
 - 
 
1061 
    }
 - 
 
1062 
 
 1682 
 
1063 
    /* Enable TXE, RXNE and ERR interrupt */
 1683 
  /* Set the DMA error callback */
1064 
    __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
 1684 
  hspi->hdmatx->XferErrorCallback = SPI_DMAError;
1065 
 
 1685 
 
1066 
    /* Process Unlocked */
 1686 
  /* Set the DMA AbortCpltCallback */
1067 
    __HAL_UNLOCK(hspi);
 1687 
  hspi->hdmatx->XferAbortCallback = NULL;
1068 
 
 1688 
 
1069 
    /* Check if the SPI is already enabled */
 1689 
  /* Enable the Tx DMA Stream/Channel */
- 
 
 1690 
  if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR,
1070 
    if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
 1691 
                                 hspi->TxXferCount))
1071 
    {
 1692 
  {
1072 
      /* Enable SPI peripheral */
 1693 
    /* Update SPI error code */
1073 
      __HAL_SPI_ENABLE(hspi);
 1694 
    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
1074 
    }
 1695 
    errorcode = HAL_ERROR;
1075 
 
 1696 
 
- 
 
 1697 
    hspi->State = HAL_SPI_STATE_READY;
1076 
    return HAL_OK;
 1698 
    goto error;
1077 
  }
 1699 
  }
1078 
  else
 1700 
 
- 
 
 1701 
  /* Check if the SPI is already enabled */
- 
 
 1702 
  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
1079 
  {
 1703 
  {
- 
 
 1704 
    /* Enable SPI peripheral */
1080 
    return HAL_BUSY;
 1705 
    __HAL_SPI_ENABLE(hspi);
1081 
  }
 1706 
  }
- 
 
 1707 
 
- 
 
 1708 
  /* Enable the SPI Error Interrupt Bit */
- 
 
 1709 
  __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR));
- 
 
 1710 
 
- 
 
 1711 
  /* Enable Tx DMA Request */
- 
 
 1712 
  SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
- 
 
 1713 
 
- 
 
 1714 
error :
- 
 
 1715 
  /* Process Unlocked */
- 
 
 1716 
  __HAL_UNLOCK(hspi);
- 
 
 1717 
  return errorcode;
1082 
}
 1718 
}
1083 
 
 1719 
 
1084 
/**
 1720 
/**
1085 
  * @brief  Transmit an amount of data in no-blocking mode with DMA
 1721 
  * @brief  Receive an amount of data in non-blocking mode with DMA.
- 
 
 1722 
  * @note   In case of MASTER mode and SPI_DIRECTION_2LINES direction, hdmatx shall be defined.
1086 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 1723 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
1087 
  *                the configuration information for SPI module.
 1724 
  *               the configuration information for SPI module.
1088 
  * @param  pData: pointer to data buffer
 1725 
  * @param  pData pointer to data buffer
- 
 
 1726 
  * @note   When the CRC feature is enabled the pData Length must be Size + 1.
1089 
  * @param  Size: amount of data to be sent
 1727 
  * @param  Size amount of data to be sent
1090 
  * @retval HAL status
 1728 
  * @retval HAL status
1091 
  */
 1729 
  */
1092 
HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
 1730 
HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
1093 
{
 1731 
{
1094 
  if(hspi->State == HAL_SPI_STATE_READY)
 1732 
  HAL_StatusTypeDef errorcode = HAL_OK;
- 
 
 1733 
 
- 
 
 1734 
  /* Check rx dma handle */
- 
 
 1735 
  assert_param(IS_SPI_DMA_HANDLE(hspi->hdmarx));
- 
 
 1736 
 
- 
 
 1737 
  if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
1095 
  {
 1738 
  {
1096 
    if((pData == NULL) || (Size == 0))
 1739 
    hspi->State = HAL_SPI_STATE_BUSY_RX;
1097 
    {
 - 
 
1098 
      return  HAL_ERROR;
 - 
 
1099 
    }
 - 
 
1100 
 
 1740 
 
1101 
    /* Check the parameters */
 1741 
    /* Check tx dma handle */
1102 
    assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
 1742 
    assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx));
1103 
 
 1743 
 
- 
 
 1744 
    /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
- 
 
 1745 
    return HAL_SPI_TransmitReceive_DMA(hspi, pData, pData, Size);
- 
 
 1746 
  }
- 
 
 1747 
 
1104 
    /* Process Locked */
 1748 
  /* Process Locked */
1105 
    __HAL_LOCK(hspi);
 1749 
  __HAL_LOCK(hspi);
1106 
 
 1750 
 
1107 
    /* Configure communication */
 - 
 
1108 
    hspi->State       = HAL_SPI_STATE_BUSY_TX;
 1751 
  if (hspi->State != HAL_SPI_STATE_READY)
- 
 
 1752 
  {
1109 
    hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
 1753 
    errorcode = HAL_BUSY;
- 
 
 1754 
    goto error;
- 
 
 1755 
  }
1110 
 
 1756 
 
1111 
    hspi->pTxBuffPtr  = pData;
 1757 
  if ((pData == NULL) || (Size == 0U))
- 
 
 1758 
  {
1112 
    hspi->TxXferSize  = Size;
 1759 
    errorcode = HAL_ERROR;
1113 
    hspi->TxXferCount = Size;
 1760 
    goto error;
- 
 
 1761 
  }
1114 
 
 1762 
 
1115 
    /*Init field not used in handle to zero */
 1763 
  /* Set the transaction information */
1116 
    hspi->TxISR = 0;
 1764 
  hspi->State       = HAL_SPI_STATE_BUSY_RX;
1117 
    hspi->RxISR = 0;
 1765 
  hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
1118 
    hspi->pRxBuffPtr  = NULL;
 1766 
  hspi->pRxBuffPtr  = (uint8_t *)pData;
1119 
    hspi->RxXferSize  = 0;
 1767 
  hspi->RxXferSize  = Size;
1120 
    hspi->RxXferCount = 0;
 1768 
  hspi->RxXferCount = Size;
1121 
 
 1769 
 
1122 
    /* Configure communication direction : 1Line */
 1770 
  /*Init field not used in handle to zero */
1123 
    if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
 1771 
  hspi->RxISR       = NULL;
1124 
    {
 1772 
  hspi->TxISR       = NULL;
1125 
      SPI_1LINE_TX(hspi);
 1773 
  hspi->TxXferSize  = 0U;
1126 
    }
 1774 
  hspi->TxXferCount = 0U;
1127 
 
 1775 
 
1128 
    /* Reset CRC Calculation */
 1776 
  /* Configure communication direction : 1Line */
1129 
    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
 1777 
  if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
1130 
    {
 1778 
  {
- 
 
 1779 
    /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */
- 
 
 1780 
    __HAL_SPI_DISABLE(hspi);
1131 
      SPI_RESET_CRC(hspi);
 1781 
    SPI_1LINE_RX(hspi);
1132 
    }
 1782 
  }
1133 
 
 1783 
 
- 
 
 1784 
#if (USE_SPI_CRC != 0U)
1134 
    /* Set the SPI TxDMA Half transfer complete callback */
 1785 
  /* Reset CRC Calculation */
1135 
    hspi->hdmatx->XferHalfCpltCallback = SPI_DMAHalfTransmitCplt;
 1786 
  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
1136 
   
 1787 
  {
1137 
    /* Set the SPI TxDMA transfer complete callback */
 1788 
    SPI_RESET_CRC(hspi);
- 
 
 1789 
  }
1138 
    hspi->hdmatx->XferCpltCallback = SPI_DMATransmitCplt;
 1790 
#endif /* USE_SPI_CRC */
1139 
 
 1791 
 
1140 
    /* Set the DMA error callback */
 1792 
  /* Set the SPI RxDMA Half transfer complete callback */
1141 
    hspi->hdmatx->XferErrorCallback = SPI_DMAError;
 1793 
  hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
1142 
 
 1794 
 
1143 
    /* Enable the Tx DMA Channel */
 1795 
  /* Set the SPI Rx DMA transfer complete callback */
1144 
    HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
 1796 
  hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
1145 
 
 1797 
 
1146 
    /* Enable Tx DMA Request */
 1798 
  /* Set the DMA error callback */
1147 
    SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
 1799 
  hspi->hdmarx->XferErrorCallback = SPI_DMAError;
1148 
 
 1800 
 
1149 
    /* Process Unlocked */
 1801 
  /* Set the DMA AbortCpltCallback */
1150 
    __HAL_UNLOCK(hspi);
 1802 
  hspi->hdmarx->XferAbortCallback = NULL;
1151 
 
 1803 
 
1152 
    /* Check if the SPI is already enabled */
 1804 
  /* Enable the Rx DMA Stream/Channel  */
- 
 
 1805 
  if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr,
1153 
    if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
 1806 
                                 hspi->RxXferCount))
1154 
    {
 1807 
  {
1155 
      /* Enable SPI peripheral */
 1808 
    /* Update SPI error code */
1156 
      __HAL_SPI_ENABLE(hspi);
 1809 
    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
1157 
    }
 1810 
    errorcode = HAL_ERROR;
1158 
 
 1811 
 
- 
 
 1812 
    hspi->State = HAL_SPI_STATE_READY;
1159 
    return HAL_OK;
 1813 
    goto error;
1160 
  }
 1814 
  }
1161 
  else
 1815 
 
- 
 
 1816 
  /* Check if the SPI is already enabled */
- 
 
 1817 
  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
1162 
  {
 1818 
  {
- 
 
 1819 
    /* Enable SPI peripheral */
1163 
    return HAL_BUSY;
 1820 
    __HAL_SPI_ENABLE(hspi);
1164 
  }
 1821 
  }
- 
 
 1822 
 
- 
 
 1823 
  /* Enable the SPI Error Interrupt Bit */
- 
 
 1824 
  __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR));
- 
 
 1825 
 
- 
 
 1826 
  /* Enable Rx DMA Request */
- 
 
 1827 
  SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
- 
 
 1828 
 
- 
 
 1829 
error:
- 
 
 1830 
  /* Process Unlocked */
- 
 
 1831 
  __HAL_UNLOCK(hspi);
- 
 
 1832 
  return errorcode;
1165 
}
 1833 
}
1166 
 
 1834 
 
1167 
/**
 1835 
/**
1168 
  * @brief  Receive an amount of data in no-blocking mode with DMA
 1836 
  * @brief  Transmit and Receive an amount of data in non-blocking mode with DMA.
1169 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 1837 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
1170 
  *                the configuration information for SPI module.
 1838 
  *               the configuration information for SPI module.
- 
 
 1839 
  * @param  pTxData pointer to transmission data buffer
1171 
  * @param  pData: pointer to data buffer
 1840 
  * @param  pRxData pointer to reception data buffer
1172 
  * @note  When the CRC feature is enabled the pData Length must be Size + 1.
 1841 
  * @note   When the CRC feature is enabled the pRxData Length must be Size + 1
1173 
  * @param  Size: amount of data to be sent
 1842 
  * @param  Size amount of data to be sent
1174 
  * @retval HAL status
 1843 
  * @retval HAL status
1175 
  */
 1844 
  */
1176 
HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
 1845 
HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData,
- 
 
 1846 
                                              uint16_t Size)
1177 
{
 1847 
{
- 
 
 1848 
  uint32_t             tmp_mode;
1178 
  if(hspi->State == HAL_SPI_STATE_READY)
 1849 
  HAL_SPI_StateTypeDef tmp_state;
- 
 
 1850 
  HAL_StatusTypeDef errorcode = HAL_OK;
1179 
  {
 1851 
 
1180 
    if((pData == NULL) || (Size == 0))
 1852 
  /* Check rx & tx dma handles */
1181 
    {
 - 
 
1182 
      return  HAL_ERROR;
 1853 
  assert_param(IS_SPI_DMA_HANDLE(hspi->hdmarx));
1183 
    }
 - 
 
- 
 
 1854 
  assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx));
1184 
 
 1855 
 
1185 
    /* Process Locked */
 1856 
  /* Check Direction parameter */
1186 
    __HAL_LOCK(hspi);
 1857 
  assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
1187 
 
 1858 
 
1188 
    /* Configure communication */
 1859 
  /* Process locked */
1189 
    hspi->State       = HAL_SPI_STATE_BUSY_RX;
 - 
 
1190 
    hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
 1860 
  __HAL_LOCK(hspi);
1191 
 
 1861 
 
1192 
    hspi->pRxBuffPtr  = pData;
 1862 
  /* Init temporary variables */
1193 
    hspi->RxXferSize  = Size;
 1863 
  tmp_state           = hspi->State;
1194 
    hspi->RxXferCount = Size;
 1864 
  tmp_mode            = hspi->Init.Mode;
1195 
 
 1865 
 
1196 
    /*Init field not used in handle to zero */
 1866 
  if (!((tmp_state == HAL_SPI_STATE_READY) ||
1197 
    hspi->RxISR = 0;
 1867 
        ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX))))
1198 
    hspi->TxISR = 0;
 1868 
  {
1199 
    hspi->pTxBuffPtr  = NULL;
 1869 
    errorcode = HAL_BUSY;
1200 
    hspi->TxXferSize  = 0;
 1870 
    goto error;
1201 
    hspi->TxXferCount = 0;
 1871 
  }
1202 
 
 1872 
 
1203 
    /* Configure communication direction : 1Line */
 1873 
  if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
1204 
    if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
 - 
 
1205 
    {
 1874 
  {
1206 
       SPI_1LINE_RX(hspi);
 1875 
    errorcode = HAL_ERROR;
1207 
    }
 1876 
    goto error;
1208 
    else if((hspi->Init.Direction == SPI_DIRECTION_2LINES)&&(hspi->Init.Mode == SPI_MODE_MASTER))
 - 
 
1209 
    {
 1877 
  }
1210 
       /* Process Unlocked */
 - 
 
1211 
       __HAL_UNLOCK(hspi);
 - 
 
1212 
 
 1878 
 
1213 
       /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
 1879 
  /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
- 
 
 1880 
  if (hspi->State != HAL_SPI_STATE_BUSY_RX)
- 
 
 1881 
  {
1214 
       return HAL_SPI_TransmitReceive_DMA(hspi, pData, pData, Size);
 1882 
    hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
1215 
    }
 1883 
  }
1216 
 
 1884 
 
- 
 
 1885 
  /* Set the transaction information */
- 
 
 1886 
  hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
- 
 
 1887 
  hspi->pTxBuffPtr  = (uint8_t *)pTxData;
- 
 
 1888 
  hspi->TxXferSize  = Size;
- 
 
 1889 
  hspi->TxXferCount = Size;
- 
 
 1890 
  hspi->pRxBuffPtr  = (uint8_t *)pRxData;
- 
 
 1891 
  hspi->RxXferSize  = Size;
- 
 
 1892 
  hspi->RxXferCount = Size;
- 
 
 1893 
 
- 
 
 1894 
  /* Init field not used in handle to zero */
- 
 
 1895 
  hspi->RxISR       = NULL;
- 
 
 1896 
  hspi->TxISR       = NULL;
- 
 
 1897 
 
- 
 
 1898 
#if (USE_SPI_CRC != 0U)
1217 
    /* Reset CRC Calculation */
 1899 
  /* Reset CRC Calculation */
1218 
    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
 1900 
  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
1219 
    {
 1901 
  {
1220 
      SPI_RESET_CRC(hspi);
 1902 
    SPI_RESET_CRC(hspi);
1221 
    }
 1903 
  }
- 
 
 1904 
#endif /* USE_SPI_CRC */
1222 
 
 1905 
 
- 
 
 1906 
  /* Check if we are in Rx only or in Rx/Tx Mode and configure the DMA transfer complete callback */
- 
 
 1907 
  if (hspi->State == HAL_SPI_STATE_BUSY_RX)
- 
 
 1908 
  {
1223 
    /* Set the SPI RxDMA Half transfer complete callback */
 1909 
    /* Set the SPI Rx DMA Half transfer complete callback */
1224 
    hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
 1910 
    hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
- 
 
 1911 
    hspi->hdmarx->XferCpltCallback     = SPI_DMAReceiveCplt;
- 
 
 1912 
  }
- 
 
 1913 
  else
1225 
   
 1914 
  {
1226 
    /* Set the SPI Rx DMA transfer complete callback */
 1915 
    /* Set the SPI Tx/Rx DMA Half transfer complete callback */
- 
 
 1916 
    hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfTransmitReceiveCplt;
1227 
    hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
 1917 
    hspi->hdmarx->XferCpltCallback     = SPI_DMATransmitReceiveCplt;
- 
 
 1918 
  }
1228 
 
 1919 
 
1229 
    /* Set the DMA error callback */
 1920 
  /* Set the DMA error callback */
1230 
    hspi->hdmarx->XferErrorCallback = SPI_DMAError;
 1921 
  hspi->hdmarx->XferErrorCallback = SPI_DMAError;
1231 
 
 1922 
 
1232 
    /* Enable the Rx DMA Channel */
 1923 
  /* Set the DMA AbortCpltCallback */
1233 
    HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
 1924 
  hspi->hdmarx->XferAbortCallback = NULL;
1234 
 
 1925 
 
1235 
    /* Enable Rx DMA Request */  
 1926 
  /* Enable the Rx DMA Stream/Channel  */
- 
 
 1927 
  if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr,
- 
 
 1928 
                                 hspi->RxXferCount))
- 
 
 1929 
  {
- 
 
 1930 
    /* Update SPI error code */
1236 
    SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
 1931 
    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
- 
 
 1932 
    errorcode = HAL_ERROR;
1237 
 
 1933 
 
1238 
    /* Process Unlocked */
 1934 
    hspi->State = HAL_SPI_STATE_READY;
1239 
    __HAL_UNLOCK(hspi);
 1935 
    goto error;
- 
 
 1936 
  }
1240 
 
 1937 
 
1241 
    /* Check if the SPI is already enabled */
 1938 
  /* Enable Rx DMA Request */
1242 
    if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
 1939 
  SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
- 
 
 1940 
 
- 
 
 1941 
  /* Set the SPI Tx DMA transfer complete callback as NULL because the communication closing
- 
 
 1942 
  is performed in DMA reception complete callback  */
- 
 
 1943 
  hspi->hdmatx->XferHalfCpltCallback = NULL;
- 
 
 1944 
  hspi->hdmatx->XferCpltCallback     = NULL;
- 
 
 1945 
  hspi->hdmatx->XferErrorCallback    = NULL;
- 
 
 1946 
  hspi->hdmatx->XferAbortCallback    = NULL;
- 
 
 1947 
 
- 
 
 1948 
  /* Enable the Tx DMA Stream/Channel  */
- 
 
 1949 
  if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR,
- 
 
 1950 
                                 hspi->TxXferCount))
1243 
    {
 1951 
  {
1244 
      /* Enable SPI peripheral */
 1952 
    /* Update SPI error code */
1245 
      __HAL_SPI_ENABLE(hspi);
 1953 
    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
1246 
    }
 1954 
    errorcode = HAL_ERROR;
1247 
 
 1955 
 
- 
 
 1956 
    hspi->State = HAL_SPI_STATE_READY;
1248 
    return HAL_OK;
 1957 
    goto error;
1249 
  }
 1958 
  }
1250 
  else
 1959 
 
- 
 
 1960 
  /* Check if the SPI is already enabled */
- 
 
 1961 
  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
1251 
  {
 1962 
  {
- 
 
 1963 
    /* Enable SPI peripheral */
1252 
    return HAL_BUSY;
 1964 
    __HAL_SPI_ENABLE(hspi);
1253 
  }
 1965 
  }
- 
 
 1966 
  /* Enable the SPI Error Interrupt Bit */
- 
 
 1967 
  __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR));
- 
 
 1968 
 
- 
 
 1969 
  /* Enable Tx DMA Request */
- 
 
 1970 
  SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
- 
 
 1971 
 
- 
 
 1972 
error :
- 
 
 1973 
  /* Process Unlocked */
- 
 
 1974 
  __HAL_UNLOCK(hspi);
- 
 
 1975 
  return errorcode;
1254 
}
 1976 
}
1255 
 
 1977 
 
1256 
/**
 1978 
/**
1257 
  * @brief  Transmit and Receive an amount of data in no-blocking mode with DMA
 1979 
  * @brief  Abort ongoing transfer (blocking mode).
- 
 
 1980 
  * @param  hspi SPI handle.
1258 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 1981 
  * @note   This procedure could be used for aborting any ongoing transfer (Tx and Rx),
1259 
  *                the configuration information for SPI module.
 1982 
  *         started in Interrupt or DMA mode.
1260 
  * @param  pTxData: pointer to transmission data buffer
 1983 
  *         This procedure performs following operations :
1261 
  * @param  pRxData: pointer to reception data buffer
 1984 
  *           - Disable SPI Interrupts (depending of transfer direction)
1262 
  * @note  When the CRC feature is enabled the pRxData Length must be Size + 1
 1985 
  *           - Disable the DMA transfer in the peripheral register (if enabled)
- 
 
 1986 
  *           - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
1263 
  * @param  Size: amount of data to be sent
 1987 
  *           - Set handle State to READY
- 
 
 1988 
  * @note   This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
1264 
  * @retval HAL status
 1989 
  * @retval HAL status
1265 
  */
 1990 
  */
1266 
HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
 1991 
HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi)
1267 
{
 1992 
{
- 
 
 1993 
  HAL_StatusTypeDef errorcode;
- 
 
 1994 
  __IO uint32_t count;
- 
 
 1995 
  __IO uint32_t resetcount;
- 
 
 1996 
 
- 
 
 1997 
  /* Initialized local variable  */
- 
 
 1998 
  errorcode = HAL_OK;
- 
 
 1999 
  resetcount = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
- 
 
 2000 
  count = resetcount;
- 
 
 2001 
 
- 
 
 2002 
  /* Clear ERRIE interrupt to avoid error interrupts generation during Abort procedure */
1268 
  if((hspi->State == HAL_SPI_STATE_READY) || \
 2003 
  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_ERRIE);
- 
 
 2004 
 
1269 
     ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX)))
 2005 
  /* Disable TXEIE, RXNEIE and ERRIE(mode fault event, overrun error, TI frame error) interrupts */
- 
 
 2006 
  if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXEIE))
1270 
  {
 2007 
  {
- 
 
 2008 
    hspi->TxISR = SPI_AbortTx_ISR;
1271 
    if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
 2009 
    /* Wait HAL_SPI_STATE_ABORT state */
- 
 
 2010 
    do
1272 
    {
 2011 
    {
- 
 
 2012 
      if (count == 0U)
- 
 
 2013 
      {
- 
 
 2014 
        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
- 
 
 2015 
        break;
- 
 
 2016 
      }
- 
 
 2017 
      count--;
- 
 
 2018 
    } while (hspi->State != HAL_SPI_STATE_ABORT);
- 
 
 2019 
    /* Reset Timeout Counter */
1273 
      return  HAL_ERROR;
 2020 
    count = resetcount;
- 
 
 2021 
  }
- 
 
 2022 
 
- 
 
 2023 
  if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE))
- 
 
 2024 
  {
- 
 
 2025 
    hspi->RxISR = SPI_AbortRx_ISR;
- 
 
 2026 
    /* Wait HAL_SPI_STATE_ABORT state */
- 
 
 2027 
    do
- 
 
 2028 
    {
- 
 
 2029 
      if (count == 0U)
- 
 
 2030 
      {
- 
 
 2031 
        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
- 
 
 2032 
        break;
- 
 
 2033 
      }
- 
 
 2034 
      count--;
- 
 
 2035 
    } while (hspi->State != HAL_SPI_STATE_ABORT);
- 
 
 2036 
    /* Reset Timeout Counter */
- 
 
 2037 
    count = resetcount;
- 
 
 2038 
  }
- 
 
 2039 
 
- 
 
 2040 
  /* Disable the SPI DMA Tx request if enabled */
- 
 
 2041 
  if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN))
- 
 
 2042 
  {
- 
 
 2043 
    /* Abort the SPI DMA Tx Stream/Channel : use blocking DMA Abort API (no callback) */
- 
 
 2044 
    if (hspi->hdmatx != NULL)
1274 
    }
 2045 
    {
- 
 
 2046 
      /* Set the SPI DMA Abort callback :
- 
 
 2047 
      will lead to call HAL_SPI_AbortCpltCallback() at end of DMA abort procedure */
- 
 
 2048 
      hspi->hdmatx->XferAbortCallback = NULL;
- 
 
 2049 
 
- 
 
 2050 
      /* Abort DMA Tx Handle linked to SPI Peripheral */
- 
 
 2051 
      if (HAL_DMA_Abort(hspi->hdmatx) != HAL_OK)
- 
 
 2052 
      {
- 
 
 2053 
        hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
- 
 
 2054 
      }
1275 
 
 2055 
 
1276 
    /* Check the parameters */
 2056 
      /* Disable Tx DMA Request */
1277 
    assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
 2057 
      CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXDMAEN));
- 
 
 2058 
 
- 
 
 2059 
      /* Wait until TXE flag is set */
- 
 
 2060 
      do
1278 
   
 2061 
      {
1279 
    /* Process locked */
 2062 
        if (count == 0U)
- 
 
 2063 
        {
- 
 
 2064 
          SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
- 
 
 2065 
          break;
- 
 
 2066 
        }
1280 
    __HAL_LOCK(hspi);
 2067 
        count--;
- 
 
 2068 
      } while ((hspi->Instance->SR & SPI_FLAG_TXE) == RESET);
- 
 
 2069 
    }
- 
 
 2070 
  }
1281 
 
 2071 
 
1282 
    /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
 2072 
  /* Disable the SPI DMA Rx request if enabled */
- 
 
 2073 
  if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN))
- 
 
 2074 
  {
- 
 
 2075 
    /* Abort the SPI DMA Rx Stream/Channel : use blocking DMA Abort API (no callback) */
1283 
    if(hspi->State != HAL_SPI_STATE_BUSY_RX)
 2076 
    if (hspi->hdmarx != NULL)
1284 
    {
 2077 
    {
- 
 
 2078 
      /* Set the SPI DMA Abort callback :
- 
 
 2079 
      will lead to call HAL_SPI_AbortCpltCallback() at end of DMA abort procedure */
- 
 
 2080 
      hspi->hdmarx->XferAbortCallback = NULL;
- 
 
 2081 
 
- 
 
 2082 
      /* Abort DMA Rx Handle linked to SPI Peripheral */
- 
 
 2083 
      if (HAL_DMA_Abort(hspi->hdmarx) != HAL_OK)
- 
 
 2084 
      {
1285 
      hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
 2085 
        hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
- 
 
 2086 
      }
- 
 
 2087 
 
- 
 
 2088 
      /* Disable peripheral */
- 
 
 2089 
      __HAL_SPI_DISABLE(hspi);
- 
 
 2090 
 
- 
 
 2091 
      /* Disable Rx DMA Request */
- 
 
 2092 
      CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_RXDMAEN));
1286 
    }
 2093 
    }
- 
 
 2094 
  }
- 
 
 2095 
  /* Reset Tx and Rx transfer counters */
- 
 
 2096 
  hspi->RxXferCount = 0U;
- 
 
 2097 
  hspi->TxXferCount = 0U;
- 
 
 2098 
 
- 
 
 2099 
  /* Check error during Abort procedure */
- 
 
 2100 
  if (hspi->ErrorCode == HAL_SPI_ERROR_ABORT)
- 
 
 2101 
  {
- 
 
 2102 
    /* return HAL_Error in case of error during Abort procedure */
- 
 
 2103 
    errorcode = HAL_ERROR;
- 
 
 2104 
  }
- 
 
 2105 
  else
- 
 
 2106 
  {
- 
 
 2107 
    /* Reset errorCode */
- 
 
 2108 
    hspi->ErrorCode = HAL_SPI_ERROR_NONE;
- 
 
 2109 
  }
- 
 
 2110 
 
- 
 
 2111 
  /* Clear the Error flags in the SR register */
- 
 
 2112 
  __HAL_SPI_CLEAR_OVRFLAG(hspi);
- 
 
 2113 
#if defined(SPI_CR2_FRF)
- 
 
 2114 
  __HAL_SPI_CLEAR_FREFLAG(hspi);
- 
 
 2115 
#endif
- 
 
 2116 
 
- 
 
 2117 
  /* Restore hspi->state to ready */
- 
 
 2118 
  hspi->State = HAL_SPI_STATE_READY;
- 
 
 2119 
 
- 
 
 2120 
  return errorcode;
- 
 
 2121 
}
1287 
 
 2122 
 
- 
 
 2123 
/**
- 
 
 2124 
  * @brief  Abort ongoing transfer (Interrupt mode).
- 
 
 2125 
  * @param  hspi SPI handle.
- 
 
 2126 
  * @note   This procedure could be used for aborting any ongoing transfer (Tx and Rx),
1288 
    /* Configure communication */
 2127 
  *         started in Interrupt or DMA mode.
- 
 
 2128 
  *         This procedure performs following operations :
- 
 
 2129 
  *           - Disable SPI Interrupts (depending of transfer direction)
- 
 
 2130 
  *           - Disable the DMA transfer in the peripheral register (if enabled)
- 
 
 2131 
  *           - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
1289 
    hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
 2132 
  *           - Set handle State to READY
- 
 
 2133 
  *           - At abort completion, call user abort complete callback
- 
 
 2134 
  * @note   This procedure is executed in Interrupt mode, meaning that abort procedure could be
- 
 
 2135 
  *         considered as completed only when user abort complete callback is executed (not when exiting function).
- 
 
 2136 
  * @retval HAL status
- 
 
 2137 
  */
- 
 
 2138 
HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi)
- 
 
 2139 
{
- 
 
 2140 
  HAL_StatusTypeDef errorcode;
- 
 
 2141 
  uint32_t abortcplt ;
- 
 
 2142 
  __IO uint32_t count;
- 
 
 2143 
  __IO uint32_t resetcount;
1290 
 
 2144 
 
1291 
    hspi->pTxBuffPtr  = (uint8_t*)pTxData;
 2145 
  /* Initialized local variable  */
1292 
    hspi->TxXferSize  = Size;
 2146 
  errorcode = HAL_OK;
- 
 
 2147 
  abortcplt = 1U;
- 
 
 2148 
  resetcount = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
1293 
    hspi->TxXferCount = Size;
 2149 
  count = resetcount;
1294 
 
 2150 
 
1295 
    hspi->pRxBuffPtr  = (uint8_t*)pRxData;
 2151 
  /* Clear ERRIE interrupt to avoid error interrupts generation during Abort procedure */
1296 
    hspi->RxXferSize  = Size;
 - 
 
1297 
    hspi->RxXferCount = Size;
 2152 
  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_ERRIE);
1298 
 
 2153 
 
1299 
    /*Init field not used in handle to zero */
 2154 
  /* Change Rx and Tx Irq Handler to Disable TXEIE, RXNEIE and ERRIE interrupts */
- 
 
 2155 
  if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXEIE))
- 
 
 2156 
  {
1300 
    hspi->RxISR = 0;
 2157 
    hspi->TxISR = SPI_AbortTx_ISR;
- 
 
 2158 
    /* Wait HAL_SPI_STATE_ABORT state */
- 
 
 2159 
    do
- 
 
 2160 
    {
1301 
    hspi->TxISR = 0;
 2161 
      if (count == 0U)
- 
 
 2162 
      {
- 
 
 2163 
        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
- 
 
 2164 
        break;
- 
 
 2165 
      }
- 
 
 2166 
      count--;
- 
 
 2167 
    } while (hspi->State != HAL_SPI_STATE_ABORT);
- 
 
 2168 
    /* Reset Timeout Counter */
- 
 
 2169 
    count = resetcount;
- 
 
 2170 
  }
1302 
 
 2171 
 
- 
 
 2172 
  if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE))
- 
 
 2173 
  {
1303 
    /* Reset CRC Calculation */
 2174 
    hspi->RxISR = SPI_AbortRx_ISR;
1304 
    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
 2175 
    /* Wait HAL_SPI_STATE_ABORT state */
- 
 
 2176 
    do
1305 
    {
 2177 
    {
1306 
      SPI_RESET_CRC(hspi);
 2178 
      if (count == 0U)
- 
 
 2179 
      {
- 
 
 2180 
        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
- 
 
 2181 
        break;
1307 
    }
 2182 
      }
- 
 
 2183 
      count--;
- 
 
 2184 
    } while (hspi->State != HAL_SPI_STATE_ABORT);
- 
 
 2185 
    /* Reset Timeout Counter */
- 
 
 2186 
    count = resetcount;
- 
 
 2187 
  }
1308 
 
 2188 
 
1309 
    /* Check if we are in Rx only or in Rx/Tx Mode and configure the DMA transfer complete callback */
 2189 
  /* If DMA Tx and/or DMA Rx Handles are associated to SPI Handle, DMA Abort complete callbacks should be initialised
- 
 
 2190 
     before any call to DMA Abort functions */
- 
 
 2191 
  /* DMA Tx Handle is valid */
1310 
    if(hspi->State == HAL_SPI_STATE_BUSY_RX)
 2192 
  if (hspi->hdmatx != NULL)
- 
 
 2193 
  {
- 
 
 2194 
    /* Set DMA Abort Complete callback if UART DMA Tx request if enabled.
- 
 
 2195 
       Otherwise, set it to NULL */
- 
 
 2196 
    if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN))
1311 
    {
 2197 
    {
1312 
      /* Set the SPI Rx DMA Half transfer complete callback */
 - 
 
1313 
      hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
 - 
 
1314 
     
 - 
 
1315 
      hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
 2198 
      hspi->hdmatx->XferAbortCallback = SPI_DMATxAbortCallback;
1316 
    }
 2199 
    }
1317 
    else
 2200 
    else
1318 
    {
 2201 
    {
1319 
      /* Set the SPI Tx/Rx DMA Half transfer complete callback */
 - 
 
1320 
      hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfTransmitReceiveCplt;
 - 
 
1321 
 
 - 
 
1322 
      hspi->hdmarx->XferCpltCallback = SPI_DMATransmitReceiveCplt;
 2202 
      hspi->hdmatx->XferAbortCallback = NULL;
1323 
    }
 2203 
    }
1324 
 
 2204 
  }
1325 
    /* Set the DMA error callback */
 2205 
  /* DMA Rx Handle is valid */
1326 
    hspi->hdmarx->XferErrorCallback = SPI_DMAError;
 2206 
  if (hspi->hdmarx != NULL)
1327 
 
 2207 
  {
1328 
    /* Enable the Rx DMA Channel */
 2208 
    /* Set DMA Abort Complete callback if UART DMA Rx request if enabled.
1329 
    HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
 - 
 
1330 
 
 - 
 
1331 
    /* Enable Rx DMA Request */  
 2209 
       Otherwise, set it to NULL */
1332 
    SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
 2210 
    if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN))
1333 
 
 - 
 
1334 
    /* Set the SPI Tx DMA transfer complete callback as NULL because the communication closing
 - 
 
1335 
    is performed in DMA reception complete callback  */
 - 
 
1336 
    if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
 - 
 
1337 
    {
 2211 
    {
1338 
      /* Set the DMA error callback */
 - 
 
1339 
      hspi->hdmatx->XferErrorCallback = SPI_DMAError;
 2212 
      hspi->hdmarx->XferAbortCallback = SPI_DMARxAbortCallback;
1340 
    }
 2213 
    }
1341 
    else
 2214 
    else
1342 
    {
 2215 
    {
1343 
      hspi->hdmatx->XferErrorCallback = NULL;
 2216 
      hspi->hdmarx->XferAbortCallback = NULL;
1344 
    }
 2217 
    }
- 
 
 2218 
  }
- 
 
 2219 
 
- 
 
 2220 
  /* Disable the SPI DMA Tx request if enabled */
- 
 
 2221 
  if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN))
- 
 
 2222 
  {
- 
 
 2223 
    /* Abort the SPI DMA Tx Stream/Channel */
- 
 
 2224 
    if (hspi->hdmatx != NULL)
1345 
   
 2225 
    {
- 
 
 2226 
      /* Abort DMA Tx Handle linked to SPI Peripheral */
- 
 
 2227 
      if (HAL_DMA_Abort_IT(hspi->hdmatx) != HAL_OK)
- 
 
 2228 
      {
- 
 
 2229 
        hspi->hdmatx->XferAbortCallback = NULL;
- 
 
 2230 
        hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
- 
 
 2231 
      }
- 
 
 2232 
      else
- 
 
 2233 
      {
- 
 
 2234 
        abortcplt = 0U;
- 
 
 2235 
      }
- 
 
 2236 
    }
- 
 
 2237 
  }
- 
 
 2238 
  /* Disable the SPI DMA Rx request if enabled */
- 
 
 2239 
  if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN))
- 
 
 2240 
  {
1346 
    /* Enable the Tx DMA Channel */
 2241 
    /* Abort the SPI DMA Rx Stream/Channel */
- 
 
 2242 
    if (hspi->hdmarx != NULL)
- 
 
 2243 
    {
- 
 
 2244 
      /* Abort DMA Rx Handle linked to SPI Peripheral */
1347 
    HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
 2245 
      if (HAL_DMA_Abort_IT(hspi->hdmarx) !=  HAL_OK)
- 
 
 2246 
      {
- 
 
 2247 
        hspi->hdmarx->XferAbortCallback = NULL;
- 
 
 2248 
        hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
- 
 
 2249 
      }
- 
 
 2250 
      else
- 
 
 2251 
      {
- 
 
 2252 
        abortcplt = 0U;
- 
 
 2253 
      }
- 
 
 2254 
    }
- 
 
 2255 
  }
1348 
 
 2256 
 
- 
 
 2257 
  if (abortcplt == 1U)
- 
 
 2258 
  {
- 
 
 2259 
    /* Reset Tx and Rx transfer counters */
- 
 
 2260 
    hspi->RxXferCount = 0U;
- 
 
 2261 
    hspi->TxXferCount = 0U;
- 
 
 2262 
 
1349 
    /* Check if the SPI is already enabled */
 2263 
    /* Check error during Abort procedure */
1350 
    if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
 2264 
    if (hspi->ErrorCode == HAL_SPI_ERROR_ABORT)
- 
 
 2265 
    {
- 
 
 2266 
      /* return HAL_Error in case of error during Abort procedure */
- 
 
 2267 
      errorcode = HAL_ERROR;
- 
 
 2268 
    }
- 
 
 2269 
    else
1351 
    {
 2270 
    {
1352 
      /* Enable SPI peripheral */
 2271 
      /* Reset errorCode */
1353 
      __HAL_SPI_ENABLE(hspi);
 2272 
      hspi->ErrorCode = HAL_SPI_ERROR_NONE;
1354 
    }
 2273 
    }
1355 
 
 2274 
 
1356 
    /* Enable Tx DMA Request */  
 2275 
    /* Clear the Error flags in the SR register */
- 
 
 2276 
    __HAL_SPI_CLEAR_OVRFLAG(hspi);
- 
 
 2277 
#if defined(SPI_CR2_FRF)
1357 
    SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
 2278 
    __HAL_SPI_CLEAR_FREFLAG(hspi);
- 
 
 2279 
#endif
1358 
 
 2280 
 
1359 
    /* Process Unlocked */
 2281 
    /* Restore hspi->State to Ready */
1360 
    __HAL_UNLOCK(hspi);
 2282 
    hspi->State = HAL_SPI_STATE_READY;
1361 
 
 2283 
 
- 
 
 2284 
    /* As no DMA to be aborted, call directly user Abort complete callback */
- 
 
 2285 
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
1362 
    return HAL_OK;
 2286 
    hspi->AbortCpltCallback(hspi);
- 
 
 2287 
#else
- 
 
 2288 
    HAL_SPI_AbortCpltCallback(hspi);
- 
 
 2289 
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
1363 
  }
 2290 
  }
1364 
  else
 - 
 
1365 
  {
 - 
 
1366 
    return HAL_BUSY;
 - 
 
1367 
  }
 - 
 
1368 
}
 - 
 
1369 
 
 2291 
 
- 
 
 2292 
  return errorcode;
- 
 
 2293 
}
1370 
 
 2294 
 
1371 
/**
 2295 
/**
1372 
  * @brief Pauses the DMA Transfer.
 2296 
  * @brief  Pause the DMA Transfer.
1373 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 2297 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
1374 
  *                the configuration information for the specified SPI module.
 2298 
  *               the configuration information for the specified SPI module.
1375 
  * @retval HAL status
 2299 
  * @retval HAL status
1376 
  */
 2300 
  */
1377 
HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi)
 2301 
HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi)
1378 
{
 2302 
{
1379 
  /* Process Locked */
 2303 
  /* Process Locked */
1380 
  __HAL_LOCK(hspi);
 2304 
  __HAL_LOCK(hspi);
1381 
 
 2305 
 
1382 
  /* Disable the SPI DMA Tx & Rx requests */
 2306 
  /* Disable the SPI DMA Tx & Rx requests */
1383 
  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
 - 
 
1384 
  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
 2307 
  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
1385 
 
 2308 
 
1386 
  /* Process Unlocked */
 2309 
  /* Process Unlocked */
1387 
  __HAL_UNLOCK(hspi);
 2310 
  __HAL_UNLOCK(hspi);
1388 
 
 2311 
 
1389 
  return HAL_OK;
 2312 
  return HAL_OK;
1390 
}
 2313 
}
1391 
 
 2314 
 
1392 
/**
 2315 
/**
1393 
  * @brief Resumes the DMA Transfer.
 2316 
  * @brief  Resume the DMA Transfer.
1394 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 2317 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
1395 
  *                the configuration information for the specified SPI module.
 2318 
  *               the configuration information for the specified SPI module.
1396 
  * @retval HAL status
 2319 
  * @retval HAL status
1397 
  */
 2320 
  */
1398 
HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi)
 2321 
HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi)
1399 
{
 2322 
{
1400 
  /* Process Locked */
 2323 
  /* Process Locked */
1401 
  __HAL_LOCK(hspi);
 2324 
  __HAL_LOCK(hspi);
1402 
 
 2325 
 
1403 
  /* Enable the SPI DMA Tx & Rx requests */
 2326 
  /* Enable the SPI DMA Tx & Rx requests */
1404 
  SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
 - 
 
1405 
  SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
 2327 
  SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
1406 
 
 2328 
 
1407 
  /* Process Unlocked */
 2329 
  /* Process Unlocked */
1408 
  __HAL_UNLOCK(hspi);
 2330 
  __HAL_UNLOCK(hspi);
1409 
 
 2331 
 
1410 
  return HAL_OK;
 2332 
  return HAL_OK;
1411 
}
 2333 
}
1412 
 
 2334 
 
1413 
/**
 2335 
/**
1414 
  * @brief Stops the DMA Transfer.
 2336 
  * @brief  Stop the DMA Transfer.
1415 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 2337 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
1416 
  *                the configuration information for the specified UART module.
 2338 
  *               the configuration information for the specified SPI module.
1417 
  * @retval HAL status
 2339 
  * @retval HAL status
1418 
  */
 2340 
  */
1419 
HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi)
 2341 
HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi)
1420 
{
 2342 
{
- 
 
 2343 
  HAL_StatusTypeDef errorcode = HAL_OK;
1421 
  /* The Lock is not implemented on this API to allow the user application
 2344 
  /* The Lock is not implemented on this API to allow the user application
1422 
     to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback():
 2345 
     to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback():
1423 
     when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
 2346 
     when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
1424 
     and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback()
 2347 
     and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback()
1425 
     */
 2348 
     */
1426 
 
 2349 
 
1427 
  /* Abort the SPI DMA tx Channel */
 2350 
  /* Abort the SPI DMA tx Stream/Channel  */
1428 
  if(hspi->hdmatx != NULL)
 2351 
  if (hspi->hdmatx != NULL)
1429 
  {
 2352 
  {
1430 
    HAL_DMA_Abort(hspi->hdmatx);
 2353 
    if (HAL_OK != HAL_DMA_Abort(hspi->hdmatx))
- 
 
 2354 
    {
- 
 
 2355 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
- 
 
 2356 
      errorcode = HAL_ERROR;
- 
 
 2357 
    }
1431 
  }
 2358 
  }
1432 
  /* Abort the SPI DMA rx Channel */
 2359 
  /* Abort the SPI DMA rx Stream/Channel  */
1433 
  if(hspi->hdmarx != NULL)
 2360 
  if (hspi->hdmarx != NULL)
1434 
  {
 2361 
  {
1435 
    HAL_DMA_Abort(hspi->hdmarx);
 2362 
    if (HAL_OK != HAL_DMA_Abort(hspi->hdmarx))
- 
 
 2363 
    {
- 
 
 2364 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
- 
 
 2365 
      errorcode = HAL_ERROR;
- 
 
 2366 
    }
1436 
  }
 2367 
  }
1437 
 
 2368 
 
1438 
  /* Disable the SPI DMA Tx & Rx requests */
 2369 
  /* Disable the SPI DMA Tx & Rx requests */
1439 
  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
 - 
 
1440 
  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
 2370 
  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
1441 
 
 - 
 
1442 
  hspi->State = HAL_SPI_STATE_READY;
 2371 
  hspi->State = HAL_SPI_STATE_READY;
1443 
 
 - 
 
1444 
  return HAL_OK;
 2372 
  return errorcode;
1445 
}
 2373 
}
1446 
 
 2374 
 
1447 
/**
 2375 
/**
1448 
  * @brief  This function handles SPI interrupt request.
 2376 
  * @brief  Handle SPI interrupt request.
1449 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 2377 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
1450 
  *                the configuration information for SPI module.
 2378 
  *               the configuration information for the specified SPI module.
1451 
  * @retval HAL status
 2379 
  * @retval None
1452 
  */
 2380 
  */
1453 
void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
 2381 
void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
1454 
{
 2382 
{
- 
 
 2383 
  uint32_t itsource = hspi->Instance->CR2;
- 
 
 2384 
  uint32_t itflag   = hspi->Instance->SR;
- 
 
 2385 
 
1455 
  /* SPI in mode Receiver and Overrun not occurred ---------------------------*/
 2386 
  /* SPI in mode Receiver ----------------------------------------------------*/
- 
 
 2387 
  if ((SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) == RESET) &&
1456 
  if((__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR) == RESET))
 2388 
      (SPI_CHECK_FLAG(itflag, SPI_FLAG_RXNE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_RXNE) != RESET))
1457 
  {
 2389 
  {
1458 
    hspi->RxISR(hspi);
 2390 
    hspi->RxISR(hspi);
1459 
    return;
 2391 
    return;
1460 
  }
 2392 
  }
1461 
 
 2393 
 
1462 
  /* SPI in mode Tramitter ---------------------------------------------------*/
 2394 
  /* SPI in mode Transmitter -------------------------------------------------*/
1463 
  if((__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE) != RESET))
 2395 
  if ((SPI_CHECK_FLAG(itflag, SPI_FLAG_TXE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_TXE) != RESET))
1464 
  {
 2396 
  {
1465 
    hspi->TxISR(hspi);
 2397 
    hspi->TxISR(hspi);
1466 
    return;
 2398 
    return;
1467 
  }
 2399 
  }
1468 
 
 2400 
 
- 
 
 2401 
  /* SPI in Error Treatment --------------------------------------------------*/
- 
 
 2402 
#if defined(SPI_CR2_FRF)
- 
 
 2403 
  if (((SPI_CHECK_FLAG(itflag, SPI_FLAG_MODF) != RESET) || (SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) != RESET)
- 
 
 2404 
       || (SPI_CHECK_FLAG(itflag, SPI_FLAG_FRE) != RESET)) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_ERR) != RESET))
- 
 
 2405 
#else
- 
 
 2406 
  if (((SPI_CHECK_FLAG(itflag, SPI_FLAG_MODF) != RESET) || (SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) != RESET))
1469 
  if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_ERR) != RESET)
 2407 
      && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_ERR) != RESET))
- 
 
 2408 
#endif
1470 
  {
 2409 
  {
1471 
    /* SPI CRC error interrupt occurred ---------------------------------------*/
 2410 
    /* SPI Overrun error interrupt occurred ----------------------------------*/
1472 
    if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
 2411 
    if (SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) != RESET)
1473 
    {
 2412 
    {
- 
 
 2413 
      if (hspi->State != HAL_SPI_STATE_BUSY_TX)
- 
 
 2414 
      {
1474 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
 2415 
        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_OVR);
- 
 
 2416 
        __HAL_SPI_CLEAR_OVRFLAG(hspi);
- 
 
 2417 
      }
- 
 
 2418 
      else
- 
 
 2419 
      {
1475 
      __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
 2420 
        __HAL_SPI_CLEAR_OVRFLAG(hspi);
- 
 
 2421 
        return;
- 
 
 2422 
      }
1476 
    }
 2423 
    }
- 
 
 2424 
 
1477 
    /* SPI Mode Fault error interrupt occurred --------------------------------*/
 2425 
    /* SPI Mode Fault error interrupt occurred -------------------------------*/
1478 
    if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_MODF) != RESET)
 2426 
    if (SPI_CHECK_FLAG(itflag, SPI_FLAG_MODF) != RESET)
1479 
    {
 2427 
    {
1480 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_MODF);
 2428 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_MODF);
1481 
      __HAL_SPI_CLEAR_MODFFLAG(hspi);
 2429 
      __HAL_SPI_CLEAR_MODFFLAG(hspi);
1482 
    }
 2430 
    }
1483 
   
 - 
 
1484 
    /* SPI Overrun error interrupt occurred -----------------------------------*/
 - 
 
1485 
    if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR) != RESET)
 - 
 
1486 
    {
 - 
 
1487 
      if(hspi->State != HAL_SPI_STATE_BUSY_TX)
 - 
 
1488 
      {
 - 
 
1489 
        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_OVR);
 - 
 
1490 
        __HAL_SPI_CLEAR_OVRFLAG(hspi);      
 - 
 
1491 
      }
 - 
 
1492 
    }
 - 
 
1493 
 
 2431 
 
1494 
    /* SPI Frame error interrupt occurred -------------------------------------*/
 2432 
    /* SPI Frame error interrupt occurred ------------------------------------*/
- 
 
 2433 
#if defined(SPI_CR2_FRF)
1495 
    if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_FRE) != RESET)
 2434 
    if (SPI_CHECK_FLAG(itflag, SPI_FLAG_FRE) != RESET)
1496 
    {
 2435 
    {
1497 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FRE);
 2436 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FRE);
1498 
      __HAL_SPI_CLEAR_FREFLAG(hspi);
 2437 
      __HAL_SPI_CLEAR_FREFLAG(hspi);
1499 
    }
 2438 
    }
- 
 
 2439 
#endif
1500 
 
 2440 
 
1501 
    /* Call the Error call Back in case of Errors */
 - 
 
1502 
    if(hspi->ErrorCode!=HAL_SPI_ERROR_NONE)
 2441 
    if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
1503 
    {
 2442 
    {
- 
 
 2443 
      /* Disable all interrupts */
1504 
      __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE | SPI_IT_TXE | SPI_IT_ERR);
 2444 
      __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE | SPI_IT_TXE | SPI_IT_ERR);
- 
 
 2445 
 
1505 
      hspi->State = HAL_SPI_STATE_READY;
 2446 
      hspi->State = HAL_SPI_STATE_READY;
- 
 
 2447 
      /* Disable the SPI DMA requests if enabled */
- 
 
 2448 
      if ((HAL_IS_BIT_SET(itsource, SPI_CR2_TXDMAEN)) || (HAL_IS_BIT_SET(itsource, SPI_CR2_RXDMAEN)))
- 
 
 2449 
      {
- 
 
 2450 
        CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN));
- 
 
 2451 
 
- 
 
 2452 
        /* Abort the SPI DMA Rx channel */
- 
 
 2453 
        if (hspi->hdmarx != NULL)
- 
 
 2454 
        {
- 
 
 2455 
          /* Set the SPI DMA Abort callback :
- 
 
 2456 
          will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */
- 
 
 2457 
          hspi->hdmarx->XferAbortCallback = SPI_DMAAbortOnError;
- 
 
 2458 
          if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmarx))
- 
 
 2459 
          {
- 
 
 2460 
            SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
- 
 
 2461 
          }
- 
 
 2462 
        }
- 
 
 2463 
        /* Abort the SPI DMA Tx channel */
- 
 
 2464 
        if (hspi->hdmatx != NULL)
- 
 
 2465 
        {
- 
 
 2466 
          /* Set the SPI DMA Abort callback :
- 
 
 2467 
          will lead to call HAL_SPI_ErrorCallback() at end of DMA abort procedure */
- 
 
 2468 
          hspi->hdmatx->XferAbortCallback = SPI_DMAAbortOnError;
- 
 
 2469 
          if (HAL_OK != HAL_DMA_Abort_IT(hspi->hdmatx))
- 
 
 2470 
          {
- 
 
 2471 
            SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
- 
 
 2472 
          }
- 
 
 2473 
        }
- 
 
 2474 
      }
- 
 
 2475 
      else
- 
 
 2476 
      {
- 
 
 2477 
        /* Call user error callback */
- 
 
 2478 
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
- 
 
 2479 
        hspi->ErrorCallback(hspi);
- 
 
 2480 
#else
1506 
      HAL_SPI_ErrorCallback(hspi);
 2481 
        HAL_SPI_ErrorCallback(hspi);
- 
 
 2482 
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
- 
 
 2483 
      }
1507 
    }
 2484 
    }
- 
 
 2485 
    return;
1508 
  }
 2486 
  }
1509 
}
 2487 
}
1510 
 
 2488 
 
1511 
/**
 2489 
/**
1512 
  * @brief Tx Transfer completed callbacks
 2490 
  * @brief  Tx Transfer completed callback.
1513 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 2491 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
1514 
  *                the configuration information for SPI module.
 2492 
  *               the configuration information for SPI module.
1515 
  * @retval None
 2493 
  * @retval None
1516 
  */
 2494 
  */
1517 
__weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
 2495 
__weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
1518 
{
 2496 
{
1519 
  /* Prevent unused argument(s) compilation warning */
 2497 
  /* Prevent unused argument(s) compilation warning */
1520 
  UNUSED(hspi);
 2498 
  UNUSED(hspi);
1521 
 
 2499 
 
1522 
  /* NOTE : This function Should not be modified, when the callback is needed,
 2500 
  /* NOTE : This function should not be modified, when the callback is needed,
1523 
            the HAL_SPI_TxCpltCallback could be implenetd in the user file
 2501 
            the HAL_SPI_TxCpltCallback should be implemented in the user file
1524 
   */
 2502 
   */
1525 
}
 2503 
}
1526 
 
 2504 
 
1527 
/**
 2505 
/**
1528 
  * @brief Rx Transfer completed callbacks
 2506 
  * @brief  Rx Transfer completed callback.
1529 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 2507 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
1530 
  *                the configuration information for SPI module.
 2508 
  *               the configuration information for SPI module.
1531 
  * @retval None
 2509 
  * @retval None
1532 
  */
 2510 
  */
1533 
__weak void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
 2511 
__weak void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
1534 
{
 2512 
{
1535 
  /* Prevent unused argument(s) compilation warning */
 2513 
  /* Prevent unused argument(s) compilation warning */
1536 
  UNUSED(hspi);
 2514 
  UNUSED(hspi);
1537 
 
 2515 
 
1538 
  /* NOTE : This function Should not be modified, when the callback is needed,
 2516 
  /* NOTE : This function should not be modified, when the callback is needed,
1539 
            the HAL_SPI_RxCpltCallback() could be implenetd in the user file
 2517 
            the HAL_SPI_RxCpltCallback should be implemented in the user file
1540 
   */
 2518 
   */
1541 
}
 2519 
}
1542 
 
 2520 
 
1543 
/**
 2521 
/**
1544 
  * @brief Tx and Rx Transfer completed callbacks
 2522 
  * @brief  Tx and Rx Transfer completed callback.
1545 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 2523 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
1546 
  *                the configuration information for SPI module.
 2524 
  *               the configuration information for SPI module.
1547 
  * @retval None
 2525 
  * @retval None
1548 
  */
 2526 
  */
1549 
__weak void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi)
 2527 
__weak void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi)
1550 
{
 2528 
{
1551 
  /* Prevent unused argument(s) compilation warning */
 2529 
  /* Prevent unused argument(s) compilation warning */
1552 
  UNUSED(hspi);
 2530 
  UNUSED(hspi);
1553 
 
 2531 
 
1554 
  /* NOTE : This function Should not be modified, when the callback is needed,
 2532 
  /* NOTE : This function should not be modified, when the callback is needed,
1555 
            the HAL_SPI_TxRxCpltCallback() could be implenetd in the user file
 2533 
            the HAL_SPI_TxRxCpltCallback should be implemented in the user file
1556 
   */
 2534 
   */
1557 
}
 2535 
}
1558 
 
 2536 
 
1559 
/**
 2537 
/**
1560 
  * @brief Tx Half Transfer completed callbacks
 2538 
  * @brief  Tx Half Transfer completed callback.
1561 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 2539 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
1562 
  *                the configuration information for SPI module.
 2540 
  *               the configuration information for SPI module.
1563 
  * @retval None
 2541 
  * @retval None
1564 
  */
 2542 
  */
1565 
__weak void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi)
 2543 
__weak void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi)
1566 
{
 2544 
{
1567 
  /* Prevent unused argument(s) compilation warning */
 2545 
  /* Prevent unused argument(s) compilation warning */
1568 
  UNUSED(hspi);
 2546 
  UNUSED(hspi);
1569 
 
 2547 
 
1570 
  /* NOTE : This function Should not be modified, when the callback is needed,
 2548 
  /* NOTE : This function should not be modified, when the callback is needed,
1571 
            the HAL_SPI_TxHalfCpltCallback could be implenetd in the user file
 2549 
            the HAL_SPI_TxHalfCpltCallback should be implemented in the user file
1572 
   */
 2550 
   */
1573 
}
 2551 
}
1574 
 
 2552 
 
1575 
/**
 2553 
/**
1576 
  * @brief Rx Half Transfer completed callbacks
 2554 
  * @brief  Rx Half Transfer completed callback.
1577 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 2555 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
1578 
  *                the configuration information for SPI module.
 2556 
  *               the configuration information for SPI module.
1579 
  * @retval None
 2557 
  * @retval None
1580 
  */
 2558 
  */
1581 
__weak void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi)
 2559 
__weak void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi)
1582 
{
 2560 
{
1583 
  /* Prevent unused argument(s) compilation warning */
 2561 
  /* Prevent unused argument(s) compilation warning */
1584 
  UNUSED(hspi);
 2562 
  UNUSED(hspi);
1585 
 
 2563 
 
1586 
  /* NOTE : This function Should not be modified, when the callback is needed,
 2564 
  /* NOTE : This function should not be modified, when the callback is needed,
1587 
            the HAL_SPI_RxHalfCpltCallback() could be implenetd in the user file
 2565 
            the HAL_SPI_RxHalfCpltCallback() should be implemented in the user file
1588 
   */
 2566 
   */
1589 
}
 2567 
}
1590 
 
 2568 
 
1591 
/**
 2569 
/**
1592 
  * @brief Tx and Rx Transfer completed callbacks
 2570 
  * @brief  Tx and Rx Half Transfer callback.
1593 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 2571 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
1594 
  *                the configuration information for SPI module.
 2572 
  *               the configuration information for SPI module.
1595 
  * @retval None
 2573 
  * @retval None
1596 
  */
 2574 
  */
1597 
__weak void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi)
 2575 
__weak void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi)
1598 
{
 2576 
{
1599 
  /* Prevent unused argument(s) compilation warning */
 2577 
  /* Prevent unused argument(s) compilation warning */
1600 
  UNUSED(hspi);
 2578 
  UNUSED(hspi);
1601 
 
 2579 
 
1602 
  /* NOTE : This function Should not be modified, when the callback is needed,
 2580 
  /* NOTE : This function should not be modified, when the callback is needed,
1603 
            the HAL_SPI_TxRxHalfCpltCallback() could be implenetd in the user file
 2581 
            the HAL_SPI_TxRxHalfCpltCallback() should be implemented in the user file
- 
 
 2582 
   */
- 
 
 2583 
}
- 
 
 2584 
 
- 
 
 2585 
/**
- 
 
 2586 
  * @brief  SPI error callback.
- 
 
 2587 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
- 
 
 2588 
  *               the configuration information for SPI module.
- 
 
 2589 
  * @retval None
- 
 
 2590 
  */
- 
 
 2591 
__weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
- 
 
 2592 
{
- 
 
 2593 
  /* Prevent unused argument(s) compilation warning */
- 
 
 2594 
  UNUSED(hspi);
- 
 
 2595 
 
- 
 
 2596 
  /* NOTE : This function should not be modified, when the callback is needed,
- 
 
 2597 
            the HAL_SPI_ErrorCallback should be implemented in the user file
- 
 
 2598 
   */
- 
 
 2599 
  /* NOTE : The ErrorCode parameter in the hspi handle is updated by the SPI processes
- 
 
 2600 
            and user can use HAL_SPI_GetError() API to check the latest error occurred
1604 
   */
 2601 
   */
1605 
}
 2602 
}
1606 
 
 2603 
 
1607 
/**
 2604 
/**
1608 
  * @brief SPI error callbacks
 2605 
  * @brief  SPI Abort Complete callback.
1609 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 2606 
  * @param  hspi SPI handle.
1610 
  *                the configuration information for SPI module.
 - 
 
1611 
  * @retval None
 2607 
  * @retval None
1612 
  */
 2608 
  */
1613 
 __weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
 2609 
__weak void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi)
1614 
{
 2610 
{
1615 
  /* Prevent unused argument(s) compilation warning */
 2611 
  /* Prevent unused argument(s) compilation warning */
1616 
  UNUSED(hspi);
 2612 
  UNUSED(hspi);
1617 
 
 2613 
 
1618 
  /* NOTE : - This function Should not be modified, when the callback is needed,
 2614 
  /* NOTE : This function should not be modified, when the callback is needed,
1619 
            the HAL_SPI_ErrorCallback() could be implenetd in the user file.
 2615 
            the HAL_SPI_AbortCpltCallback can be implemented in the user file.
1620 
            - The ErrorCode parameter in the hspi handle is updated by the SPI processes
 - 
 
1621 
            and user can use HAL_SPI_GetError() API to check the latest error occurred.
 - 
 
1622 
   */
 2616 
   */
1623 
}
 2617 
}
1624 
 
 2618 
 
1625 
/**
 2619 
/**
1626 
  * @}
 2620 
  * @}
1627 
  */
 2621 
  */
1628 
 
 2622 
 
1629 
/** @defgroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions
 2623 
/** @defgroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions
1630 
  *  @brief   SPI control functions
 2624 
  * @brief   SPI control functions
1631 
  *
 2625 
  *
1632 
@verbatim
 2626 
@verbatim
1633 
 ===============================================================================
 2627 
 ===============================================================================
1634 
                      ##### Peripheral State and Errors functions #####
 2628 
                      ##### Peripheral State and Errors functions #####
1635 
 ===============================================================================  
 2629 
 ===============================================================================
1636 
    [..]
 2630 
    [..]
1637 
    This subsection provides a set of functions allowing to control the SPI.
 2631 
    This subsection provides a set of functions allowing to control the SPI.
1638 
     (+) HAL_SPI_GetState() API can be helpful to check in run-time the state of the SPI peripheral
 2632 
     (+) HAL_SPI_GetState() API can be helpful to check in run-time the state of the SPI peripheral
1639 
     (+) HAL_SPI_GetError() check in run-time Errors occurring during communication
 2633 
     (+) HAL_SPI_GetError() check in run-time Errors occurring during communication
1640 
@endverbatim
 2634 
@endverbatim
1641 
  * @{
 2635 
  * @{
1642 
  */
 2636 
  */
1643 
 
 2637 
 
1644 
/**
 2638 
/**
1645 
  * @brief  Return the SPI state
 2639 
  * @brief  Return the SPI handle state.
1646 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 2640 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
1647 
  *                the configuration information for SPI module.
 2641 
  *               the configuration information for SPI module.
1648 
  * @retval HAL state
 2642 
  * @retval SPI state
1649 
  */
 2643 
  */
1650 
HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
 2644 
HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
1651 
{
 2645 
{
- 
 
 2646 
  /* Return SPI handle state */
1652 
  return hspi->State;
 2647 
  return hspi->State;
1653 
}
 2648 
}
1654 
 
 2649 
 
1655 
/**
 2650 
/**
1656 
  * @brief  Return the SPI error code
 2651 
  * @brief  Return the SPI error code.
1657 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 2652 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
1658 
  *                the configuration information for SPI module.
 2653 
  *               the configuration information for SPI module.
1659 
  * @retval SPI Error Code
 2654 
  * @retval SPI error code in bitmap format
1660 
  */
 2655 
  */
1661 
uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
 2656 
uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
1662 
{
 2657 
{
- 
 
 2658 
  /* Return SPI ErrorCode */
1663 
  return hspi->ErrorCode;
 2659 
  return hspi->ErrorCode;
1664 
}
 2660 
}
1665 
 
 2661 
 
1666 
/**
 2662 
/**
1667 
  * @}
 2663 
  * @}
1668 
  */
 2664 
  */
1669 
 
 - 
 
1670 
/**
 - 
 
1671 
    * @}
 - 
 
1672 
    */
 - 
 
1673 
 
 - 
 
1674 
 
 2665 
 
- 
 
 2666 
/**
- 
 
 2667 
  * @}
- 
 
 2668 
  */
1675 
 
 2669 
 
1676 
/** @addtogroup SPI_Private_Functions
 2670 
/** @addtogroup SPI_Private_Functions
- 
 
 2671 
  * @brief   Private functions
1677 
    * @{
 2672 
  * @{
1678 
    */
 2673 
  */
1679 
 
 - 
 
1680 
 
 2674 
 
1681 
  /**
 2675 
/**
1682 
  * @brief  Interrupt Handler to close Tx transfer
 2676 
  * @brief  DMA SPI transmit process complete callback.
1683 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 2677 
  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
1684 
  *                the configuration information for SPI module.
 2678 
  *               the configuration information for the specified DMA module.
1685 
  * @retval void
 2679 
  * @retval None
1686 
  */
 2680 
  */
1687 
static void SPI_TxCloseIRQHandler(struct __SPI_HandleTypeDef *hspi)
 2681 
static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma)
1688 
{
 2682 
{
1689 
  /* Wait until TXE flag is set to send data */
 - 
 
1690 
  if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
 2683 
  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
1691 
  {
 - 
 
1692 
    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
 2684 
  uint32_t tickstart;
1693 
  }
 - 
 
1694 
 
 2685 
 
1695 
  /* Disable TXE interrupt */
 2686 
  /* Init tickstart for timeout management*/
1696 
  __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE ));
 2687 
  tickstart = HAL_GetTick();
1697 
 
 2688 
 
1698 
  /* Disable ERR interrupt if Receive process is finished */
 2689 
  /* DMA Normal Mode */
1699 
  if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE) == RESET)
 2690 
  if ((hdma->Instance->CCR & DMA_CCR_CIRC) != DMA_CCR_CIRC)
1700 
  {
 2691 
  {
- 
 
 2692 
    /* Disable ERR interrupt */
1701 
    __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_ERR));
 2693 
    __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR);
- 
 
 2694 
 
- 
 
 2695 
    /* Disable Tx DMA Request */
- 
 
 2696 
    CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
1702 
 
 2697 
 
1703 
    /* Wait until Busy flag is reset before disabling SPI */
 2698 
    /* Check the end of the transaction */
1704 
    if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
 2699 
    if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
1705 
    {
 2700 
    {
1706 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
 2701 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
1707 
    }
 2702 
    }
1708 
 
 2703 
 
1709 
    /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
 2704 
    /* Clear overrun flag in 2 Lines communication mode because received data is not read */
1710 
    if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
 2705 
    if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
1711 
    {
 2706 
    {
1712 
      __HAL_SPI_CLEAR_OVRFLAG(hspi);
 2707 
      __HAL_SPI_CLEAR_OVRFLAG(hspi);
1713 
    }
 2708 
    }
1714 
   
 2709 
 
1715 
    /* Check if Errors has been detected during transfer */
 - 
 
1716 
    if(hspi->ErrorCode ==  HAL_SPI_ERROR_NONE)
 2710 
    hspi->TxXferCount = 0U;
1717 
    {
 - 
 
1718 
      /* Check if we are in Tx or in Rx/Tx Mode */
 - 
 
1719 
      if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
 - 
 
1720 
      {
 - 
 
1721 
        /* Set state to READY before run the Callback Complete */
 - 
 
1722 
        hspi->State = HAL_SPI_STATE_READY;
 2711 
    hspi->State = HAL_SPI_STATE_READY;
1723 
        HAL_SPI_TxRxCpltCallback(hspi);
 - 
 
1724 
      }
 - 
 
1725 
      else
 - 
 
1726 
      {
 2712 
 
1727 
        /* Set state to READY before run the Callback Complete */
 - 
 
1728 
        hspi->State = HAL_SPI_STATE_READY;
 2713 
    if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
1729 
        HAL_SPI_TxCpltCallback(hspi);
 - 
 
1730 
      }
 - 
 
1731 
    }
 - 
 
1732 
    else
 - 
 
1733 
    {
 2714 
    {
1734 
      /* Set state to READY before run the Callback Complete */
 2715 
      /* Call user error callback */
1735 
      hspi->State = HAL_SPI_STATE_READY;
 2716 
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
1736 
      /* Call Error call back in case of Error */
 2717 
      hspi->ErrorCallback(hspi);
- 
 
 2718 
#else
1737 
      HAL_SPI_ErrorCallback(hspi);
 2719 
      HAL_SPI_ErrorCallback(hspi);
- 
 
 2720 
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
- 
 
 2721 
      return;
1738 
    }
 2722 
    }
1739 
  }
 2723 
  }
- 
 
 2724 
  /* Call user Tx complete callback */
- 
 
 2725 
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
- 
 
 2726 
  hspi->TxCpltCallback(hspi);
- 
 
 2727 
#else
- 
 
 2728 
  HAL_SPI_TxCpltCallback(hspi);
- 
 
 2729 
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
1740 
}
 2730 
}
1741 
 
 2731 
 
1742 
/**
 2732 
/**
1743 
  * @brief  Interrupt Handler to transmit amount of data in no-blocking mode
 2733 
  * @brief  DMA SPI receive process complete callback.
1744 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 2734 
  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
1745 
  *                the configuration information for SPI module.
 2735 
  *               the configuration information for the specified DMA module.
1746 
  * @retval void
 2736 
  * @retval None
1747 
  */
 2737 
  */
1748 
static void SPI_TxISR(struct __SPI_HandleTypeDef *hspi)
 2738 
static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
1749 
{
 2739 
{
1750 
  /* Transmit data in 8 Bit mode */
 - 
 
1751 
  if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
 2740 
  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
1752 
  {
 - 
 
1753 
    hspi->Instance->DR = (*hspi->pTxBuffPtr++);
 2741 
  uint32_t tickstart;
1754 
  }
 2742 
 
1755 
  /* Transmit data in 16 Bit mode */
 2743 
  /* Init tickstart for timeout management*/
1756 
  else
 - 
 
1757 
  {
 - 
 
1758 
    hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
 - 
 
1759 
    hspi->pTxBuffPtr+=2;
 2744 
  tickstart = HAL_GetTick();
1760 
  }
 - 
 
1761 
  hspi->TxXferCount--;
 - 
 
1762 
 
 2745 
 
1763 
  if(hspi->TxXferCount == 0)
 2746 
  /* DMA Normal Mode */
- 
 
 2747 
  if ((hdma->Instance->CCR & DMA_CCR_CIRC) != DMA_CCR_CIRC)
1764 
  {
 2748 
  {
- 
 
 2749 
    /* Disable ERR interrupt */
- 
 
 2750 
    __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR);
- 
 
 2751 
 
- 
 
 2752 
#if (USE_SPI_CRC != 0U)
- 
 
 2753 
    /* CRC handling */
1765 
    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
 2754 
    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
1766 
    {
 2755 
    {
- 
 
 2756 
      /* Wait until RXNE flag */
- 
 
 2757 
      if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
- 
 
 2758 
      {
1767 
      /* calculate and transfer CRC on Tx line */
 2759 
        /* Error on the CRC reception */
1768 
      SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
 2760 
        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
- 
 
 2761 
      }
- 
 
 2762 
      /* Read CRC */
- 
 
 2763 
      READ_REG(hspi->Instance->DR);
1769 
    }
 2764 
    }
1770 
    SPI_TxCloseIRQHandler(hspi);
 - 
 
1771 
  }
 - 
 
1772 
}
 - 
 
1773 
 
 - 
 
1774 
/**
 - 
 
1775 
  * @brief  Interrupt Handler to close Rx transfer
 - 
 
1776 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 - 
 
1777 
  *                the configuration information for SPI module.
 - 
 
1778 
  * @retval void
 - 
 
1779 
  */
 - 
 
1780 
static void SPI_RxCloseIRQHandler(struct __SPI_HandleTypeDef *hspi)
 - 
 
1781 
{
 - 
 
1782 
  __IO uint16_t tmpreg = 0;
 2765 
#endif /* USE_SPI_CRC */
1783 
 
 2766 
 
1784 
  if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
 - 
 
1785 
  {
 - 
 
1786 
    /* Wait until RXNE flag is set to send data */
 2767 
    /* Check if we are in Master RX 2 line mode */
1787 
    if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
 2768 
    if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
1788 
    {
 2769 
    {
- 
 
 2770 
      /* Disable Rx/Tx DMA Request (done by default to handle the case master rx direction 2 lines) */
- 
 
 2771 
      CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
- 
 
 2772 
    }
- 
 
 2773 
    else
- 
 
 2774 
    {
- 
 
 2775 
      /* Normal case */
1789 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
 2776 
      CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
1790 
    }
 2777 
    }
1791 
 
 2778 
 
1792 
    /* Read CRC to reset RXNE flag */
 2779 
    /* Check the end of the transaction */
1793 
    tmpreg = hspi->Instance->DR;
 - 
 
1794 
    UNUSED(tmpreg);
 - 
 
1795 
 
 - 
 
1796 
    /* Wait until RXNE flag is set to send data */
 - 
 
1797 
    if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
 2780 
    if (SPI_EndRxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
1798 
    {
 2781 
    {
1799 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
 2782 
      hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
1800 
    }
 2783 
    }
1801 
 
 2784 
 
- 
 
 2785 
    hspi->RxXferCount = 0U;
- 
 
 2786 
    hspi->State = HAL_SPI_STATE_READY;
- 
 
 2787 
 
- 
 
 2788 
#if (USE_SPI_CRC != 0U)
1802 
    /* Check if CRC error occurred */
 2789 
    /* Check if CRC error occurred */
1803 
    if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
 2790 
    if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR))
1804 
    {
 2791 
    {
1805 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
 2792 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
- 
 
 2793 
      __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
- 
 
 2794 
    }
- 
 
 2795 
#endif /* USE_SPI_CRC */
1806 
 
 2796 
 
- 
 
 2797 
    if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
- 
 
 2798 
    {
1807 
      /* Reset CRC Calculation */
 2799 
      /* Call user error callback */
- 
 
 2800 
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
- 
 
 2801 
      hspi->ErrorCallback(hspi);
- 
 
 2802 
#else
1808 
      SPI_RESET_CRC(hspi);
 2803 
      HAL_SPI_ErrorCallback(hspi);
- 
 
 2804 
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
- 
 
 2805 
      return;
1809 
    }
 2806 
    }
1810 
  }
 2807 
  }
- 
 
 2808 
  /* Call user Rx complete callback */
- 
 
 2809 
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
- 
 
 2810 
  hspi->RxCpltCallback(hspi);
- 
 
 2811 
#else
- 
 
 2812 
  HAL_SPI_RxCpltCallback(hspi);
- 
 
 2813 
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
- 
 
 2814 
}
1811 
 
 2815 
 
- 
 
 2816 
/**
- 
 
 2817 
  * @brief  DMA SPI transmit receive process complete callback.
- 
 
 2818 
  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
- 
 
 2819 
  *               the configuration information for the specified DMA module.
- 
 
 2820 
  * @retval None
- 
 
 2821 
  */
- 
 
 2822 
static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)
- 
 
 2823 
{
- 
 
 2824 
  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
- 
 
 2825 
  uint32_t tickstart;
- 
 
 2826 
 
1812 
  /* Disable RXNE interrupt */
 2827 
  /* Init tickstart for timeout management*/
1813 
  __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE));
 2828 
  tickstart = HAL_GetTick();
1814 
 
 2829 
 
1815 
  /* if Transmit process is finished */
 2830 
  /* DMA Normal Mode */
1816 
  if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE) == RESET)
 2831 
  if ((hdma->Instance->CCR & DMA_CCR_CIRC) != DMA_CCR_CIRC)
1817 
  {
 2832 
  {
1818 
    /* Disable ERR interrupt */
 2833 
    /* Disable ERR interrupt */
1819 
    __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_ERR));
 2834 
    __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR);
1820 
 
 2835 
 
- 
 
 2836 
#if (USE_SPI_CRC != 0U)
- 
 
 2837 
    /* CRC handling */
1821 
    if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
 2838 
    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
1822 
    {
 2839 
    {
1823 
      /* Disable SPI peripheral */
 2840 
      /* Wait the CRC data */
1824 
      __HAL_SPI_DISABLE(hspi);
 - 
 
1825 
    }
 - 
 
1826 
   
 - 
 
1827 
    /* Check if Errors has been detected during transfer */
 - 
 
1828 
    if(hspi->ErrorCode ==  HAL_SPI_ERROR_NONE)
 - 
 
1829 
    {
 - 
 
1830 
      /* Check if we are in Rx or in Rx/Tx Mode */
 - 
 
1831 
      if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
 - 
 
1832 
      {
 - 
 
1833 
        /* Set state to READY before run the Callback Complete */
 2841 
      if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
1834 
        hspi->State = HAL_SPI_STATE_READY;
 - 
 
1835 
        HAL_SPI_TxRxCpltCallback(hspi);
 - 
 
1836 
      }
 - 
 
1837 
      else
 - 
 
1838 
      {
 2842 
      {
1839 
        /* Set state to READY before run the Callback Complete */
 - 
 
1840 
        hspi->State = HAL_SPI_STATE_READY;
 2843 
        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
1841 
        HAL_SPI_RxCpltCallback(hspi);
 - 
 
1842 
      }
 2844 
      }
- 
 
 2845 
      /* Read CRC to Flush DR and RXNE flag */
- 
 
 2846 
      READ_REG(hspi->Instance->DR);
1843 
    }
 2847 
    }
1844 
    else
 2848 
#endif /* USE_SPI_CRC */
- 
 
 2849 
 
- 
 
 2850 
    /* Check the end of the transaction */
- 
 
 2851 
    if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
1845 
    {
 2852 
    {
- 
 
 2853 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
- 
 
 2854 
    }
- 
 
 2855 
 
1846 
      /* Set state to READY before run the Callback Complete */
 2856 
    /* Disable Rx/Tx DMA Request */
- 
 
 2857 
    CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
- 
 
 2858 
 
- 
 
 2859 
    hspi->TxXferCount = 0U;
- 
 
 2860 
    hspi->RxXferCount = 0U;
1847 
      hspi->State = HAL_SPI_STATE_READY;
 2861 
    hspi->State = HAL_SPI_STATE_READY;
- 
 
 2862 
 
- 
 
 2863 
#if (USE_SPI_CRC != 0U)
- 
 
 2864 
    /* Check if CRC error occurred */
- 
 
 2865 
    if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR))
- 
 
 2866 
    {
- 
 
 2867 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
- 
 
 2868 
      __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
- 
 
 2869 
    }
- 
 
 2870 
#endif /* USE_SPI_CRC */
- 
 
 2871 
 
- 
 
 2872 
    if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
- 
 
 2873 
    {
1848 
      /* Call Error call back in case of Error */
 2874 
      /* Call user error callback */
- 
 
 2875 
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
- 
 
 2876 
      hspi->ErrorCallback(hspi);
- 
 
 2877 
#else
1849 
      HAL_SPI_ErrorCallback(hspi);
 2878 
      HAL_SPI_ErrorCallback(hspi);
- 
 
 2879 
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
- 
 
 2880 
      return;
1850 
    }
 2881 
    }
1851 
  }
 2882 
  }
- 
 
 2883 
  /* Call user TxRx complete callback */
- 
 
 2884 
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
- 
 
 2885 
  hspi->TxRxCpltCallback(hspi);
- 
 
 2886 
#else
- 
 
 2887 
  HAL_SPI_TxRxCpltCallback(hspi);
- 
 
 2888 
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
1852 
}
 2889 
}
1853 
 
 2890 
 
1854 
/**
 2891 
/**
1855 
  * @brief  Interrupt Handler to receive amount of data in 2Lines mode
 2892 
  * @brief  DMA SPI half transmit process complete callback.
1856 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 2893 
  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
1857 
  *                the configuration information for SPI module.
 2894 
  *               the configuration information for the specified DMA module.
1858 
  * @retval void
 2895 
  * @retval None
1859 
  */
 2896 
  */
1860 
static void SPI_2LinesRxISR(struct __SPI_HandleTypeDef *hspi)
 2897 
static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma)
1861 
{
 2898 
{
- 
 
 2899 
  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
- 
 
 2900 
 
- 
 
 2901 
  /* Call user Tx half complete callback */
- 
 
 2902 
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
- 
 
 2903 
  hspi->TxHalfCpltCallback(hspi);
- 
 
 2904 
#else
- 
 
 2905 
  HAL_SPI_TxHalfCpltCallback(hspi);
- 
 
 2906 
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
- 
 
 2907 
}
- 
 
 2908 
 
- 
 
 2909 
/**
- 
 
 2910 
  * @brief  DMA SPI half receive process complete callback
- 
 
 2911 
  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
- 
 
 2912 
  *               the configuration information for the specified DMA module.
- 
 
 2913 
  * @retval None
- 
 
 2914 
  */
- 
 
 2915 
static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma)
- 
 
 2916 
{
- 
 
 2917 
  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
- 
 
 2918 
 
- 
 
 2919 
  /* Call user Rx half complete callback */
- 
 
 2920 
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
- 
 
 2921 
  hspi->RxHalfCpltCallback(hspi);
- 
 
 2922 
#else
- 
 
 2923 
  HAL_SPI_RxHalfCpltCallback(hspi);
- 
 
 2924 
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
- 
 
 2925 
}
- 
 
 2926 
 
- 
 
 2927 
/**
- 
 
 2928 
  * @brief  DMA SPI half transmit receive process complete callback.
- 
 
 2929 
  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
- 
 
 2930 
  *               the configuration information for the specified DMA module.
- 
 
 2931 
  * @retval None
- 
 
 2932 
  */
- 
 
 2933 
static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma)
- 
 
 2934 
{
- 
 
 2935 
  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
- 
 
 2936 
 
- 
 
 2937 
  /* Call user TxRx half complete callback */
- 
 
 2938 
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
- 
 
 2939 
  hspi->TxRxHalfCpltCallback(hspi);
- 
 
 2940 
#else
- 
 
 2941 
  HAL_SPI_TxRxHalfCpltCallback(hspi);
- 
 
 2942 
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
- 
 
 2943 
}
- 
 
 2944 
 
- 
 
 2945 
/**
- 
 
 2946 
  * @brief  DMA SPI communication error callback.
- 
 
 2947 
  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
- 
 
 2948 
  *               the configuration information for the specified DMA module.
- 
 
 2949 
  * @retval None
- 
 
 2950 
  */
- 
 
 2951 
static void SPI_DMAError(DMA_HandleTypeDef *hdma)
- 
 
 2952 
{
- 
 
 2953 
  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
- 
 
 2954 
 
1862 
  /* Receive data in 8 Bit mode */
 2955 
  /* Stop the disable DMA transfer on SPI side */
- 
 
 2956 
  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);
- 
 
 2957 
 
- 
 
 2958 
  SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
1863 
  if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
 2959 
  hspi->State = HAL_SPI_STATE_READY;
- 
 
 2960 
  /* Call user error callback */
- 
 
 2961 
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
- 
 
 2962 
  hspi->ErrorCallback(hspi);
- 
 
 2963 
#else
- 
 
 2964 
  HAL_SPI_ErrorCallback(hspi);
- 
 
 2965 
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
- 
 
 2966 
}
- 
 
 2967 
 
- 
 
 2968 
/**
- 
 
 2969 
  * @brief  DMA SPI communication abort callback, when initiated by HAL services on Error
- 
 
 2970 
  *         (To be called at end of DMA Abort procedure following error occurrence).
- 
 
 2971 
  * @param  hdma DMA handle.
- 
 
 2972 
  * @retval None
- 
 
 2973 
  */
- 
 
 2974 
static void SPI_DMAAbortOnError(DMA_HandleTypeDef *hdma)
- 
 
 2975 
{
- 
 
 2976 
  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
- 
 
 2977 
  hspi->RxXferCount = 0U;
- 
 
 2978 
  hspi->TxXferCount = 0U;
- 
 
 2979 
 
- 
 
 2980 
  /* Call user error callback */
- 
 
 2981 
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
- 
 
 2982 
  hspi->ErrorCallback(hspi);
- 
 
 2983 
#else
- 
 
 2984 
  HAL_SPI_ErrorCallback(hspi);
- 
 
 2985 
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
- 
 
 2986 
}
- 
 
 2987 
 
- 
 
 2988 
/**
- 
 
 2989 
  * @brief  DMA SPI Tx communication abort callback, when initiated by user
- 
 
 2990 
  *         (To be called at end of DMA Tx Abort procedure following user abort request).
- 
 
 2991 
  * @note   When this callback is executed, User Abort complete call back is called only if no
- 
 
 2992 
  *         Abort still ongoing for Rx DMA Handle.
- 
 
 2993 
  * @param  hdma DMA handle.
- 
 
 2994 
  * @retval None
- 
 
 2995 
  */
- 
 
 2996 
static void SPI_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
- 
 
 2997 
{
- 
 
 2998 
  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
- 
 
 2999 
  __IO uint32_t count;
- 
 
 3000 
 
- 
 
 3001 
  hspi->hdmatx->XferAbortCallback = NULL;
- 
 
 3002 
  count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
- 
 
 3003 
 
- 
 
 3004 
  /* Disable Tx DMA Request */
- 
 
 3005 
  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
- 
 
 3006 
 
- 
 
 3007 
  /* Wait until TXE flag is set */
- 
 
 3008 
  do
1864 
  {
 3009 
  {
1865 
    (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
 3010 
    if (count == 0U)
1866 
  }
 3011 
    {
1867 
  /* Receive data in 16 Bit mode */
 3012 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
- 
 
 3013 
      break;
1868 
  else
 3014 
    }
- 
 
 3015 
    count--;
- 
 
 3016 
  } while ((hspi->Instance->SR & SPI_FLAG_TXE) == RESET);
- 
 
 3017 
 
- 
 
 3018 
  /* Check if an Abort process is still ongoing */
- 
 
 3019 
  if (hspi->hdmarx != NULL)
1869 
  {
 3020 
  {
1870 
    *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
 3021 
    if (hspi->hdmarx->XferAbortCallback != NULL)
- 
 
 3022 
    {
1871 
    hspi->pRxBuffPtr+=2;
 3023 
      return;
- 
 
 3024 
    }
1872 
  }
 3025 
  }
1873 
  hspi->RxXferCount--;
 - 
 
1874 
 
 3026 
 
- 
 
 3027 
  /* No Abort process still ongoing : All DMA Stream/Channel are aborted, call user Abort Complete callback */
1875 
  if(hspi->RxXferCount==0)
 3028 
  hspi->RxXferCount = 0U;
- 
 
 3029 
  hspi->TxXferCount = 0U;
- 
 
 3030 
 
- 
 
 3031 
  /* Check no error during Abort procedure */
- 
 
 3032 
  if (hspi->ErrorCode != HAL_SPI_ERROR_ABORT)
1876 
  {
 3033 
  {
1877 
    SPI_RxCloseIRQHandler(hspi);
 3034 
    /* Reset errorCode */
- 
 
 3035 
    hspi->ErrorCode = HAL_SPI_ERROR_NONE;
1878 
  }
 3036 
  }
- 
 
 3037 
 
- 
 
 3038 
  /* Clear the Error flags in the SR register */
- 
 
 3039 
  __HAL_SPI_CLEAR_OVRFLAG(hspi);
- 
 
 3040 
#if defined(SPI_CR2_FRF)
- 
 
 3041 
  __HAL_SPI_CLEAR_FREFLAG(hspi);
- 
 
 3042 
#endif
- 
 
 3043 
 
- 
 
 3044 
  /* Restore hspi->State to Ready */
- 
 
 3045 
  hspi->State  = HAL_SPI_STATE_READY;
- 
 
 3046 
 
- 
 
 3047 
  /* Call user Abort complete callback */
- 
 
 3048 
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
- 
 
 3049 
  hspi->AbortCpltCallback(hspi);
- 
 
 3050 
#else
- 
 
 3051 
  HAL_SPI_AbortCpltCallback(hspi);
- 
 
 3052 
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
1879 
}
 3053 
}
1880 
 
 3054 
 
1881 
/**
 3055 
/**
1882 
  * @brief  Interrupt Handler to receive amount of data in no-blocking mode
 3056 
  * @brief  DMA SPI Rx communication abort callback, when initiated by user
- 
 
 3057 
  *         (To be called at end of DMA Rx Abort procedure following user abort request).
1883 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 3058 
  * @note   When this callback is executed, User Abort complete call back is called only if no
1884 
  *                the configuration information for SPI module.
 3059 
  *         Abort still ongoing for Tx DMA Handle.
- 
 
 3060 
  * @param  hdma DMA handle.
1885 
  * @retval void
 3061 
  * @retval None
1886 
  */
 3062 
  */
1887 
static void SPI_RxISR(struct __SPI_HandleTypeDef *hspi)
 3063 
static void SPI_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
1888 
{
 3064 
{
- 
 
 3065 
  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
- 
 
 3066 
 
1889 
  /* Receive data in 8 Bit mode */
 3067 
  /* Disable SPI Peripheral */
1890 
  if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
 3068 
  __HAL_SPI_DISABLE(hspi);
1891 
  {
 3069 
 
1892 
    (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
 3070 
  hspi->hdmarx->XferAbortCallback = NULL;
1893 
  }
 3071 
 
1894 
  /* Receive data in 16 Bit mode */
 3072 
  /* Disable Rx DMA Request */
- 
 
 3073 
  CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
- 
 
 3074 
 
1895 
  else
 3075 
  /* Check Busy flag */
- 
 
 3076 
  if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
1896 
  {
 3077 
  {
1897 
    *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
 3078 
    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
1898 
    hspi->pRxBuffPtr+=2;
 - 
 
1899 
  }
 3079 
  }
1900 
    hspi->RxXferCount--;
 - 
 
1901 
 
 3080 
 
1902 
  /* Enable CRC Transmission */
 3081 
  /* Check if an Abort process is still ongoing */
1903 
  if((hspi->RxXferCount == 1) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
 3082 
  if (hspi->hdmatx != NULL)
1904 
  {
 3083 
  {
1905 
    /* Set CRC Next to calculate CRC on Rx side */
 3084 
    if (hspi->hdmatx->XferAbortCallback != NULL)
- 
 
 3085 
    {
1906 
    SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
 3086 
      return;
- 
 
 3087 
    }
1907 
  }
 3088 
  }
1908 
 
 3089 
 
- 
 
 3090 
  /* No Abort process still ongoing : All DMA Stream/Channel are aborted, call user Abort Complete callback */
1909 
  if(hspi->RxXferCount == 0)
 3091 
  hspi->RxXferCount = 0U;
- 
 
 3092 
  hspi->TxXferCount = 0U;
- 
 
 3093 
 
- 
 
 3094 
  /* Check no error during Abort procedure */
- 
 
 3095 
  if (hspi->ErrorCode != HAL_SPI_ERROR_ABORT)
1910 
  {
 3096 
  {
1911 
    SPI_RxCloseIRQHandler(hspi);
 3097 
    /* Reset errorCode */
- 
 
 3098 
    hspi->ErrorCode = HAL_SPI_ERROR_NONE;
1912 
  }
 3099 
  }
- 
 
 3100 
 
- 
 
 3101 
  /* Clear the Error flags in the SR register */
- 
 
 3102 
  __HAL_SPI_CLEAR_OVRFLAG(hspi);
- 
 
 3103 
#if defined(SPI_CR2_FRF)
- 
 
 3104 
  __HAL_SPI_CLEAR_FREFLAG(hspi);
- 
 
 3105 
#endif
- 
 
 3106 
 
- 
 
 3107 
  /* Restore hspi->State to Ready */
- 
 
 3108 
  hspi->State  = HAL_SPI_STATE_READY;
- 
 
 3109 
 
- 
 
 3110 
  /* Call user Abort complete callback */
- 
 
 3111 
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
- 
 
 3112 
  hspi->AbortCpltCallback(hspi);
- 
 
 3113 
#else
- 
 
 3114 
  HAL_SPI_AbortCpltCallback(hspi);
- 
 
 3115 
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
1913 
}
 3116 
}
1914 
 
 3117 
 
1915 
/**
 3118 
/**
1916 
  * @brief DMA SPI transmit process complete callback
 3119 
  * @brief  Rx 8-bit handler for Transmit and Receive in Interrupt mode.
1917 
  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
 3120 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
1918 
  *                the configuration information for the specified DMA module.
 3121 
  *               the configuration information for SPI module.
1919 
  * @retval None
 3122 
  * @retval None
1920 
  */
 3123 
  */
1921 
static void SPI_DMATransmitCplt(struct __DMA_HandleTypeDef *hdma)
 3124 
static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
1922 
{
 3125 
{
- 
 
 3126 
  /* Receive data in 8bit mode */
1923 
  SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 3127 
  *hspi->pRxBuffPtr = *((__IO uint8_t *)&hspi->Instance->DR);
- 
 
 3128 
  hspi->pRxBuffPtr++;
- 
 
 3129 
  hspi->RxXferCount--;
1924 
 
 3130 
 
1925 
  /* DMA Normal Mode */
 3131 
  /* Check end of the reception */
1926 
  if((hdma->Instance->CCR & DMA_CIRCULAR) == 0)
 3132 
  if (hspi->RxXferCount == 0U)
1927 
  {
 3133 
  {
1928 
    /* Wait until TXE flag is set to send data */
 3134 
#if (USE_SPI_CRC != 0U)
1929 
    if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
 3135 
    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
1930 
    {
 3136 
    {
1931 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
 3137 
      hspi->RxISR =  SPI_2linesRxISR_8BITCRC;
- 
 
 3138 
      return;
1932 
    }
 3139 
    }
- 
 
 3140 
#endif /* USE_SPI_CRC */
1933 
 
 3141 
 
1934 
    /* Disable Tx DMA Request */
 3142 
    /* Disable RXNE  and ERR interrupt */
1935 
    CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
 3143 
    __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
1936 
 
 3144 
 
1937 
    /* Wait until Busy flag is reset before disabling SPI */
 3145 
    if (hspi->TxXferCount == 0U)
1938 
    if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
 - 
 
1939 
    {
 3146 
    {
1940 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
 3147 
      SPI_CloseRxTx_ISR(hspi);
1941 
    }
 3148 
    }
1942 
 
 - 
 
1943 
    hspi->TxXferCount = 0;
 - 
 
1944 
    hspi->State = HAL_SPI_STATE_READY;
 - 
 
1945 
  }
 3149 
  }
- 
 
 3150 
}
1946 
 
 3151 
 
- 
 
 3152 
#if (USE_SPI_CRC != 0U)
- 
 
 3153 
/**
1947 
  /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
 3154 
  * @brief  Rx 8-bit handler for Transmit and Receive in Interrupt mode.
- 
 
 3155 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
1948 
  if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
 3156 
  *               the configuration information for SPI module.
- 
 
 3157 
  * @retval None
1949 
  {
 3158 
  */
1950 
    __HAL_SPI_CLEAR_OVRFLAG(hspi);
 3159 
static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi)
1951 
  }
 3160 
{
- 
 
 3161 
  /* Read 8bit CRC to flush Data Register */
- 
 
 3162 
  READ_REG(*(__IO uint8_t *)&hspi->Instance->DR);
1952 
 
 3163 
 
1953 
  /* Check if Errors has been detected during transfer */
 3164 
  /* Disable RXNE and ERR interrupt */
1954 
  if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
 3165 
  __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
1955 
  {
 3166 
 
1956 
    HAL_SPI_ErrorCallback(hspi);
 3167 
  if (hspi->TxXferCount == 0U)
1957 
  }
 - 
 
1958 
  else
 - 
 
1959 
  {
 3168 
  {
1960 
    HAL_SPI_TxCpltCallback(hspi);
 3169 
    SPI_CloseRxTx_ISR(hspi);
1961 
  }
 3170 
  }
1962 
}
 3171 
}
- 
 
 3172 
#endif /* USE_SPI_CRC */
1963 
 
 3173 
 
1964 
/**
 3174 
/**
1965 
  * @brief DMA SPI receive process complete callback
 3175 
  * @brief  Tx 8-bit handler for Transmit and Receive in Interrupt mode.
1966 
  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
 3176 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
1967 
  *                the configuration information for the specified DMA module.
 3177 
  *               the configuration information for SPI module.
1968 
  * @retval None
 3178 
  * @retval None
1969 
  */
 3179 
  */
1970 
static void SPI_DMAReceiveCplt(struct __DMA_HandleTypeDef *hdma)
 3180 
static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
1971 
{
 3181 
{
- 
 
 3182 
  *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr);
1972 
  __IO uint16_t tmpreg = 0;
 3183 
  hspi->pTxBuffPtr++;
1973 
 
 - 
 
1974 
  SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 3184 
  hspi->TxXferCount--;
1975 
 
 3185 
 
1976 
  /* DMA Normal mode */
 3186 
  /* Check the end of the transmission */
1977 
  if((hdma->Instance->CCR & DMA_CIRCULAR) == 0)
 3187 
  if (hspi->TxXferCount == 0U)
1978 
  {
 3188 
  {
- 
 
 3189 
#if (USE_SPI_CRC != 0U)
1979 
    if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
 3190 
    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
1980 
    {
 3191 
    {
- 
 
 3192 
      /* Set CRC Next Bit to send CRC */
- 
 
 3193 
      SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
1981 
      /* Disable SPI peripheral */
 3194 
      /* Disable TXE interrupt */
1982 
      __HAL_SPI_DISABLE(hspi);
 3195 
      __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);
- 
 
 3196 
      return;
1983 
    }
 3197 
    }
- 
 
 3198 
#endif /* USE_SPI_CRC */
1984 
 
 3199 
 
1985 
    /* Disable Rx DMA Request */
 3200 
    /* Disable TXE interrupt */
1986 
    CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
 3201 
    __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);
1987 
 
 3202 
 
1988 
    /* Disable Tx DMA Request (done by default to handle the case Master RX direction 2 lines) */
 - 
 
1989 
    CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
 - 
 
1990 
 
 - 
 
1991 
    /* Reset CRC Calculation */
 3203 
    if (hspi->RxXferCount == 0U)
1992 
    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
 - 
 
1993 
    {
 3204 
    {
1994 
      /* Wait until RXNE flag is set to send data */
 - 
 
1995 
      if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
 - 
 
1996 
      {
 - 
 
1997 
        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
 - 
 
1998 
      }
 - 
 
1999 
 
 - 
 
2000 
      /* Read CRC */
 - 
 
2001 
      tmpreg = hspi->Instance->DR;
 - 
 
2002 
      UNUSED(tmpreg);
 - 
 
2003 
 
 - 
 
2004 
      /* Wait until RXNE flag is set */
 - 
 
2005 
      if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
 - 
 
2006 
      {
 - 
 
2007 
        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
 - 
 
2008 
      }
 - 
 
2009 
 
 - 
 
2010 
      /* Check if CRC error occurred */
 - 
 
2011 
      if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
 - 
 
2012 
      {
 - 
 
2013 
        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
 - 
 
2014 
        __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
 3205 
      SPI_CloseRxTx_ISR(hspi);
2015 
      }
 - 
 
2016 
    }
 3206 
    }
- 
 
 3207 
  }
- 
 
 3208 
}
2017 
 
 3209 
 
- 
 
 3210 
/**
- 
 
 3211 
  * @brief  Rx 16-bit handler for Transmit and Receive in Interrupt mode.
- 
 
 3212 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
- 
 
 3213 
  *               the configuration information for SPI module.
- 
 
 3214 
  * @retval None
- 
 
 3215 
  */
- 
 
 3216 
static void SPI_2linesRxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
- 
 
 3217 
{
- 
 
 3218 
  /* Receive data in 16 Bit mode */
- 
 
 3219 
  *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)(hspi->Instance->DR);
2018 
    hspi->RxXferCount = 0;
 3220 
  hspi->pRxBuffPtr += sizeof(uint16_t);
2019 
    hspi->State = HAL_SPI_STATE_READY;
 3221 
  hspi->RxXferCount--;
2020 
 
 3222 
 
2021 
    /* Check if Errors has been detected during transfer */
 3223 
  if (hspi->RxXferCount == 0U)
- 
 
 3224 
  {
- 
 
 3225 
#if (USE_SPI_CRC != 0U)
2022 
    if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
 3226 
    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
2023 
    {
 3227 
    {
2024 
      HAL_SPI_ErrorCallback(hspi);
 3228 
      hspi->RxISR =  SPI_2linesRxISR_16BITCRC;
- 
 
 3229 
      return;
2025 
    }
 3230 
    }
- 
 
 3231 
#endif /* USE_SPI_CRC */
- 
 
 3232 
 
- 
 
 3233 
    /* Disable RXNE interrupt */
- 
 
 3234 
    __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
- 
 
 3235 
 
2026 
    else
 3236 
    if (hspi->TxXferCount == 0U)
2027 
    {
 3237 
    {
2028 
      HAL_SPI_RxCpltCallback(hspi);
 3238 
      SPI_CloseRxTx_ISR(hspi);
2029 
    }
 3239 
    }
2030 
  }
 3240 
  }
2031 
  else
 - 
 
2032 
  {
 - 
 
2033 
    HAL_SPI_RxCpltCallback(hspi);
 - 
 
2034 
  }
 - 
 
2035 
}
 3241 
}
2036 
 
 3242 
 
- 
 
 3243 
#if (USE_SPI_CRC != 0U)
2037 
/**
 3244 
/**
2038 
  * @brief DMA SPI transmit receive process complete callback
 3245 
  * @brief  Manage the CRC 16-bit receive for Transmit and Receive in Interrupt mode.
2039 
  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
 3246 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
2040 
  *                the configuration information for the specified DMA module.
 3247 
  *               the configuration information for SPI module.
2041 
  * @retval None
 3248 
  * @retval None
2042 
  */
 3249 
  */
2043 
static void SPI_DMATransmitReceiveCplt(struct __DMA_HandleTypeDef *hdma)  
 3250 
static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi)
2044 
{
 3251 
{
- 
 
 3252 
  /* Read 16bit CRC to flush Data Register */
2045 
  __IO uint16_t tmpreg = 0;
 3253 
  READ_REG(hspi->Instance->DR);
2046 
 
 3254 
 
- 
 
 3255 
  /* Disable RXNE interrupt */
2047 
  SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 3256 
  __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
2048 
 
 3257 
 
2049 
  if((hdma->Instance->CCR & DMA_CIRCULAR) == 0)
 3258 
  SPI_CloseRxTx_ISR(hspi);
2050 
  {
 3259 
}
2051 
    /* Reset CRC Calculation */
 - 
 
2052 
    if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
 - 
 
2053 
    {
 - 
 
2054 
      /* Check if CRC is done on going (RXNE flag set) */
 - 
 
2055 
      if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) == HAL_OK)
 - 
 
2056 
      {
 - 
 
2057 
        /* Wait until RXNE flag is set to send data */
 - 
 
2058 
        if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
 - 
 
2059 
        {
 - 
 
2060 
          SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
 - 
 
2061 
        }
 - 
 
2062 
      }
 - 
 
2063 
      /* Read CRC */
 3260 
#endif /* USE_SPI_CRC */
2064 
      tmpreg = hspi->Instance->DR;
 - 
 
2065 
      UNUSED(tmpreg);
 - 
 
2066 
 
 3261 
 
- 
 
 3262 
/**
2067 
      /* Check if CRC error occurred */
 3263 
  * @brief  Tx 16-bit handler for Transmit and Receive in Interrupt mode.
- 
 
 3264 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
2068 
      if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
 3265 
  *               the configuration information for SPI module.
- 
 
 3266 
  * @retval None
2069 
      {
 3267 
  */
2070 
        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
 3268 
static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
- 
 
 3269 
{
2071 
        __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
 3270 
  /* Transmit data in 16 Bit mode */
- 
 
 3271 
  hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
2072 
      }
 3272 
  hspi->pTxBuffPtr += sizeof(uint16_t);
2073 
    }
 3273 
  hspi->TxXferCount--;
2074 
 
 3274 
 
2075 
    /* Wait until TXE flag is set to send data */
 3275 
  /* Enable CRC Transmission */
- 
 
 3276 
  if (hspi->TxXferCount == 0U)
- 
 
 3277 
  {
- 
 
 3278 
#if (USE_SPI_CRC != 0U)
2076 
    if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
 3279 
    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
2077 
    {
 3280 
    {
- 
 
 3281 
      /* Set CRC Next Bit to send CRC */
2078 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
 3282 
      SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
- 
 
 3283 
      /* Disable TXE interrupt */
- 
 
 3284 
      __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);
- 
 
 3285 
      return;
2079 
    }
 3286 
    }
- 
 
 3287 
#endif /* USE_SPI_CRC */
2080 
 
 3288 
 
2081 
    /* Disable Tx DMA Request */
 3289 
    /* Disable TXE interrupt */
2082 
    CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
 3290 
    __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);
2083 
 
 3291 
 
2084 
    /* Wait until Busy flag is reset before disabling SPI */
 3292 
    if (hspi->RxXferCount == 0U)
2085 
    if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
 - 
 
2086 
    {
 3293 
    {
2087 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
 3294 
      SPI_CloseRxTx_ISR(hspi);
2088 
    }
 3295 
    }
- 
 
 3296 
  }
- 
 
 3297 
}
2089 
 
 3298 
 
- 
 
 3299 
#if (USE_SPI_CRC != 0U)
- 
 
 3300 
/**
- 
 
 3301 
  * @brief  Manage the CRC 8-bit receive in Interrupt context.
- 
 
 3302 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
- 
 
 3303 
  *               the configuration information for SPI module.
- 
 
 3304 
  * @retval None
- 
 
 3305 
  */
- 
 
 3306 
static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi)
- 
 
 3307 
{
2090 
    /* Disable Rx DMA Request */
 3308 
  /* Read 8bit CRC to flush Data Register */
2091 
    CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
 3309 
  READ_REG(*(__IO uint8_t *)&hspi->Instance->DR);
2092 
 
 3310 
 
2093 
    hspi->TxXferCount = 0;
 3311 
  SPI_CloseRx_ISR(hspi);
- 
 
 3312 
}
2094 
    hspi->RxXferCount = 0;
 3313 
#endif /* USE_SPI_CRC */
2095 
 
 3314 
 
- 
 
 3315 
/**
- 
 
 3316 
  * @brief  Manage the receive 8-bit in Interrupt context.
- 
 
 3317 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
- 
 
 3318 
  *               the configuration information for SPI module.
- 
 
 3319 
  * @retval None
- 
 
 3320 
  */
- 
 
 3321 
static void SPI_RxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
- 
 
 3322 
{
- 
 
 3323 
  *hspi->pRxBuffPtr = (*(__IO uint8_t *)&hspi->Instance->DR);
- 
 
 3324 
  hspi->pRxBuffPtr++;
2096 
    hspi->State = HAL_SPI_STATE_READY;
 3325 
  hspi->RxXferCount--;
2097 
 
 3326 
 
2098 
    /* Check if Errors has been detected during transfer */
 - 
 
2099 
    if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
 3327 
#if (USE_SPI_CRC != 0U)
2100 
    {
 - 
 
2101 
      HAL_SPI_ErrorCallback(hspi);
 3328 
  /* Enable CRC Transmission */
2102 
    }
 - 
 
2103 
    else
 - 
 
- 
 
 3329 
  if ((hspi->RxXferCount == 1U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
2104 
    {
 3330 
  {
2105 
      HAL_SPI_TxRxCpltCallback(hspi);
 3331 
    SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
2106 
    }
 - 
 
2107 
  }
 3332 
  }
- 
 
 3333 
#endif /* USE_SPI_CRC */
2108 
  else
 3334 
 
- 
 
 3335 
  if (hspi->RxXferCount == 0U)
2109 
  {
 3336 
  {
- 
 
 3337 
#if (USE_SPI_CRC != 0U)
- 
 
 3338 
    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
- 
 
 3339 
    {
- 
 
 3340 
      hspi->RxISR =  SPI_RxISR_8BITCRC;
- 
 
 3341 
      return;
- 
 
 3342 
    }
- 
 
 3343 
#endif /* USE_SPI_CRC */
2110 
    HAL_SPI_TxRxCpltCallback(hspi);
 3344 
    SPI_CloseRx_ISR(hspi);
2111 
  }
 3345 
  }
2112 
}
 3346 
}
2113 
 
 3347 
 
- 
 
 3348 
#if (USE_SPI_CRC != 0U)
2114 
/**
 3349 
/**
2115 
  * @brief DMA SPI half transmit process complete callback
 3350 
  * @brief  Manage the CRC 16-bit receive in Interrupt context.
2116 
  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
 3351 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
2117 
  *                the configuration information for the specified DMA module.
 3352 
  *               the configuration information for SPI module.
2118 
  * @retval None
 3353 
  * @retval None
2119 
  */
 3354 
  */
2120 
static void SPI_DMAHalfTransmitCplt(struct __DMA_HandleTypeDef *hdma)
 3355 
static void SPI_RxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi)
2121 
{
 3356 
{
2122 
  SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 3357 
  /* Read 16bit CRC to flush Data Register */
- 
 
 3358 
  READ_REG(hspi->Instance->DR);
2123 
 
 3359 
 
- 
 
 3360 
  /* Disable RXNE and ERR interrupt */
- 
 
 3361 
  __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
- 
 
 3362 
 
2124 
  HAL_SPI_TxHalfCpltCallback(hspi);
 3363 
  SPI_CloseRx_ISR(hspi);
2125 
}
 3364 
}
- 
 
 3365 
#endif /* USE_SPI_CRC */
2126 
 
 3366 
 
2127 
/**
 3367 
/**
2128 
  * @brief DMA SPI half receive process complete callback
 3368 
  * @brief  Manage the 16-bit receive in Interrupt context.
2129 
  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
 3369 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
2130 
  *                the configuration information for the specified DMA module.
 3370 
  *               the configuration information for SPI module.
2131 
  * @retval None
 3371 
  * @retval None
2132 
  */
 3372 
  */
2133 
static void SPI_DMAHalfReceiveCplt(struct __DMA_HandleTypeDef *hdma)
 3373 
static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
2134 
{
 3374 
{
2135 
  SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 3375 
  *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)(hspi->Instance->DR);
- 
 
 3376 
  hspi->pRxBuffPtr += sizeof(uint16_t);
- 
 
 3377 
  hspi->RxXferCount--;
2136 
 
 3378 
 
- 
 
 3379 
#if (USE_SPI_CRC != 0U)
- 
 
 3380 
  /* Enable CRC Transmission */
- 
 
 3381 
  if ((hspi->RxXferCount == 1U) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
- 
 
 3382 
  {
- 
 
 3383 
    SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
- 
 
 3384 
  }
- 
 
 3385 
#endif /* USE_SPI_CRC */
- 
 
 3386 
 
- 
 
 3387 
  if (hspi->RxXferCount == 0U)
- 
 
 3388 
  {
- 
 
 3389 
#if (USE_SPI_CRC != 0U)
- 
 
 3390 
    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
- 
 
 3391 
    {
- 
 
 3392 
      hspi->RxISR = SPI_RxISR_16BITCRC;
- 
 
 3393 
      return;
- 
 
 3394 
    }
- 
 
 3395 
#endif /* USE_SPI_CRC */
2137 
  HAL_SPI_RxHalfCpltCallback(hspi);
 3396 
    SPI_CloseRx_ISR(hspi);
- 
 
 3397 
  }
2138 
}
 3398 
}
2139 
 
 3399 
 
2140 
/**
 3400 
/**
2141 
  * @brief DMA SPI Half transmit receive process complete callback
 3401 
  * @brief  Handle the data 8-bit transmit in Interrupt mode.
2142 
  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
 3402 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
2143 
  *                the configuration information for the specified DMA module.
 3403 
  *               the configuration information for SPI module.
2144 
  * @retval None
 3404 
  * @retval None
2145 
  */
 3405 
  */
2146 
static void SPI_DMAHalfTransmitReceiveCplt(struct __DMA_HandleTypeDef *hdma)  
 3406 
static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
2147 
{
 3407 
{
2148 
  SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 3408 
  *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr);
- 
 
 3409 
  hspi->pTxBuffPtr++;
- 
 
 3410 
  hspi->TxXferCount--;
2149 
 
 3411 
 
- 
 
 3412 
  if (hspi->TxXferCount == 0U)
- 
 
 3413 
  {
- 
 
 3414 
#if (USE_SPI_CRC != 0U)
- 
 
 3415 
    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
- 
 
 3416 
    {
- 
 
 3417 
      /* Enable CRC Transmission */
- 
 
 3418 
      SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
- 
 
 3419 
    }
- 
 
 3420 
#endif /* USE_SPI_CRC */
2150 
  HAL_SPI_TxRxHalfCpltCallback(hspi);
 3421 
    SPI_CloseTx_ISR(hspi);
- 
 
 3422 
  }
2151 
}
 3423 
}
2152 
 
 3424 
 
2153 
/**
 3425 
/**
2154 
  * @brief DMA SPI communication error callback
 3426 
  * @brief  Handle the data 16-bit transmit in Interrupt mode.
2155 
  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
 3427 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
2156 
  *                the configuration information for the specified DMA module.
 3428 
  *               the configuration information for SPI module.
2157 
  * @retval None
 3429 
  * @retval None
2158 
  */
 3430 
  */
2159 
static void SPI_DMAError(struct __DMA_HandleTypeDef *hdma)
 3431 
static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
2160 
{
 3432 
{
- 
 
 3433 
  /* Transmit data in 16 Bit mode */
2161 
  SPI_HandleTypeDef* hspi = (SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
 3434 
  hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
- 
 
 3435 
  hspi->pTxBuffPtr += sizeof(uint16_t);
2162 
  hspi->TxXferCount = 0;
 3436 
  hspi->TxXferCount--;
- 
 
 3437 
 
2163 
  hspi->RxXferCount = 0;
 3438 
  if (hspi->TxXferCount == 0U)
- 
 
 3439 
  {
- 
 
 3440 
#if (USE_SPI_CRC != 0U)
2164 
  hspi->State= HAL_SPI_STATE_READY;
 3441 
    if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
- 
 
 3442 
    {
- 
 
 3443 
      /* Enable CRC Transmission */
2165 
  SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
 3444 
      SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
- 
 
 3445 
    }
- 
 
 3446 
#endif /* USE_SPI_CRC */
2166 
  HAL_SPI_ErrorCallback(hspi);
 3447 
    SPI_CloseTx_ISR(hspi);
- 
 
 3448 
  }
2167 
}
 3449 
}
2168 
 
 3450 
 
2169 
/**
 3451 
/**
2170 
  * @brief  This function handles SPI Communication Timeout.
 3452 
  * @brief  Handle SPI Communication Timeout.
2171 
  * @param  hspi: pointer to a SPI_HandleTypeDef structure that contains
 3453 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
2172 
  *                the configuration information for SPI module.
 3454 
  *              the configuration information for SPI module.
2173 
  * @param  Flag: SPI flag to check
 3455 
  * @param  Flag SPI flag to check
2174 
  * @param  Status: Flag status to check: RESET or set
 3456 
  * @param  State flag state to check
2175 
  * @param  Timeout: Timeout duration
 3457 
  * @param  Timeout Timeout duration
- 
 
 3458 
  * @param  Tickstart tick start value
2176 
  * @retval HAL status
 3459 
  * @retval HAL status
2177 
  */
 3460 
  */
2178 
static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(struct __SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout)  
 3461 
static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus State,
- 
 
 3462 
                                                       uint32_t Timeout, uint32_t Tickstart)
2179 
{
 3463 
{
- 
 
 3464 
  __IO uint32_t count;
- 
 
 3465 
  uint32_t tmp_timeout;
2180 
  uint32_t tickstart = 0;
 3466 
  uint32_t tmp_tickstart;
2181 
 
 3467 
 
2182 
  /* Get tick */
 3468 
  /* Adjust Timeout value  in case of end of transfer */
- 
 
 3469 
  tmp_timeout   = Timeout - (HAL_GetTick() - Tickstart);
2183 
  tickstart = HAL_GetTick();
 3470 
  tmp_tickstart = HAL_GetTick();
- 
 
 3471 
 
- 
 
 3472 
  /* Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled */
- 
 
 3473 
  count = tmp_timeout * ((SystemCoreClock * 32U) >> 20U);
2184 
 
 3474 
 
2185 
  /* Wait until flag is set */
 3475 
  while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State)
2186 
  if(Status == RESET)
 - 
 
2187 
  {
 3476 
  {
2188 
    while(__HAL_SPI_GET_FLAG(hspi, Flag) == RESET)
 3477 
    if (Timeout != HAL_MAX_DELAY)
2189 
    {
 3478 
    {
2190 
      if(Timeout != HAL_MAX_DELAY)
 3479 
      if (((HAL_GetTick() - tmp_tickstart) >= tmp_timeout) || (tmp_timeout == 0U))
2191 
      {
 3480 
      {
2192 
        if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
 - 
 
2193 
        {
 - 
 
2194 
          /* Disable the SPI and reset the CRC: the CRC value should be cleared
 3481 
        /* Disable the SPI and reset the CRC: the CRC value should be cleared
2195 
             on both master and slave sides in order to resynchronize the master
 3482 
           on both master and slave sides in order to resynchronize the master
2196 
             and slave for their respective CRC calculation */
 3483 
           and slave for their respective CRC calculation */
2197 
 
 3484 
 
2198 
          /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
 3485 
        /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
2199 
          __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
 3486 
        __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
2200 
 
 3487 
 
- 
 
 3488 
        if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE)
- 
 
 3489 
                                                     || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
- 
 
 3490 
        {
2201 
          /* Disable SPI peripheral */
 3491 
          /* Disable SPI peripheral */
2202 
          __HAL_SPI_DISABLE(hspi);
 3492 
          __HAL_SPI_DISABLE(hspi);
- 
 
 3493 
        }
2203 
 
 3494 
 
2204 
          /* Reset CRC Calculation */
 3495 
        /* Reset CRC Calculation */
2205 
          if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
 3496 
        if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
2206 
          {
 3497 
        {
2207 
            SPI_RESET_CRC(hspi);
 3498 
          SPI_RESET_CRC(hspi);
2208 
          }
 3499 
        }
2209 
 
 3500 
 
2210 
          hspi->State= HAL_SPI_STATE_READY;
 3501 
        hspi->State = HAL_SPI_STATE_READY;
2211 
 
 3502 
 
2212 
          /* Process Unlocked */
 3503 
        /* Process Unlocked */
2213 
          __HAL_UNLOCK(hspi);
 3504 
        __HAL_UNLOCK(hspi);
2214 
 
 3505 
 
- 
 
 3506 
        return HAL_TIMEOUT;
- 
 
 3507 
      }
- 
 
 3508 
      /* If Systick is disabled or not incremented, deactivate timeout to go in disable loop procedure */
- 
 
 3509 
      if(count == 0U)
- 
 
 3510 
      {
- 
 
 3511 
        tmp_timeout = 0U;
- 
 
 3512 
      }
- 
 
 3513 
      count--;
- 
 
 3514 
    }
- 
 
 3515 
  }
- 
 
 3516 
 
- 
 
 3517 
  return HAL_OK;
- 
 
 3518 
}
- 
 
 3519 
 
- 
 
 3520 
/**
- 
 
 3521 
  * @brief  Handle the check of the RX transaction complete.
- 
 
 3522 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
- 
 
 3523 
  *               the configuration information for SPI module.
- 
 
 3524 
  * @param  Timeout Timeout duration
- 
 
 3525 
  * @param  Tickstart tick start value
- 
 
 3526 
  * @retval HAL status
- 
 
 3527 
  */
- 
 
 3528 
static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi,  uint32_t Timeout, uint32_t Tickstart)
- 
 
 3529 
{
- 
 
 3530 
  if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE)
- 
 
 3531 
                                               || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
- 
 
 3532 
  {
- 
 
 3533 
    /* Disable SPI peripheral */
- 
 
 3534 
    __HAL_SPI_DISABLE(hspi);
- 
 
 3535 
  }
- 
 
 3536 
 
- 
 
 3537 
  /* Erratasheet: BSY bit may stay high at the end of a data transfer in Slave mode */
- 
 
 3538 
  if (hspi->Init.Mode == SPI_MODE_MASTER)
- 
 
 3539 
  {
- 
 
 3540 
    if (hspi->Init.Direction != SPI_DIRECTION_2LINES_RXONLY)
- 
 
 3541 
    {
- 
 
 3542 
      /* Control the BSY flag */
- 
 
 3543 
      if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK)
- 
 
 3544 
      {
- 
 
 3545 
        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
2215 
          return HAL_TIMEOUT;
 3546 
        return HAL_TIMEOUT;
2216 
        }
 3547 
      }
- 
 
 3548 
    }
- 
 
 3549 
    else
- 
 
 3550 
    {
- 
 
 3551 
      /* Wait the RXNE reset */
- 
 
 3552 
      if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout, Tickstart) != HAL_OK)
- 
 
 3553 
      {
- 
 
 3554 
        SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
- 
 
 3555 
        return HAL_TIMEOUT;
2217 
      }
 3556 
      }
2218 
    }
 3557 
    }
2219 
  }
 3558 
  }
2220 
  else
 3559 
  else
2221 
  {
 3560 
  {
- 
 
 3561 
    /* Wait the RXNE reset */
- 
 
 3562 
    if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout, Tickstart) != HAL_OK)
- 
 
 3563 
    {
2222 
    while(__HAL_SPI_GET_FLAG(hspi, Flag) != RESET)
 3564 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
- 
 
 3565 
      return HAL_TIMEOUT;
- 
 
 3566 
    }
- 
 
 3567 
  }
- 
 
 3568 
  return HAL_OK;
- 
 
 3569 
}
- 
 
 3570 
 
- 
 
 3571 
/**
- 
 
 3572 
  * @brief  Handle the check of the RXTX or TX transaction complete.
- 
 
 3573 
  * @param  hspi SPI handle
- 
 
 3574 
  * @param  Timeout Timeout duration
- 
 
 3575 
  * @param  Tickstart tick start value
- 
 
 3576 
  * @retval HAL status
- 
 
 3577 
  */
- 
 
 3578 
static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart)
- 
 
 3579 
{
- 
 
 3580 
  /* Timeout in µs */
- 
 
 3581 
  __IO uint32_t count = SPI_BSY_FLAG_WORKAROUND_TIMEOUT * (SystemCoreClock / 24U / 1000000U);
- 
 
 3582 
  /* Erratasheet: BSY bit may stay high at the end of a data transfer in Slave mode */
- 
 
 3583 
  if (hspi->Init.Mode == SPI_MODE_MASTER)
- 
 
 3584 
  {
- 
 
 3585 
    /* Control the BSY flag */
- 
 
 3586 
    if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK)
2223 
    {
 3587 
    {
- 
 
 3588 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
2224 
      if(Timeout != HAL_MAX_DELAY)
 3589 
      return HAL_TIMEOUT;
- 
 
 3590 
    }
- 
 
 3591 
  }
- 
 
 3592 
  else
- 
 
 3593 
  {
- 
 
 3594 
    /* Wait BSY flag during 1 Byte time transfer in case of Full-Duplex and Tx transfer
- 
 
 3595 
    * If Timeout is reached, the transfer is considered as finish.
- 
 
 3596 
    * User have to calculate the timeout value to fit with the time of 1 byte transfer.
- 
 
 3597 
    * This time is directly link with the SPI clock from Master device.
- 
 
 3598 
    */
- 
 
 3599 
    do
- 
 
 3600 
    {
- 
 
 3601 
      if (count == 0U)
2225 
      {
 3602 
      {
2226 
        if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
 3603 
        break;
2227 
        {
 3604 
      }
2228 
          /* Disable the SPI and reset the CRC: the CRC value should be cleared
 - 
 
2229 
             on both master and slave sides in order to resynchronize the master
 3605 
      count--;
2230 
             and slave for their respective CRC calculation */
 3606 
    } while (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_BSY) != RESET);
- 
 
 3607 
  }
2231 
 
 3608 
 
2232 
          /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
 - 
 
2233 
          __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
 3609 
  return HAL_OK;
- 
 
 3610 
}
2234 
 
 3611 
 
- 
 
 3612 
/**
- 
 
 3613 
  * @brief  Handle the end of the RXTX transaction.
- 
 
 3614 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
2235 
          /* Disable SPI peripheral */
 3615 
  *               the configuration information for SPI module.
- 
 
 3616 
  * @retval None
- 
 
 3617 
  */
2236 
          __HAL_SPI_DISABLE(hspi);
 3618 
static void SPI_CloseRxTx_ISR(SPI_HandleTypeDef *hspi)
- 
 
 3619 
{
- 
 
 3620 
  uint32_t tickstart;
- 
 
 3621 
  __IO uint32_t count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
2237 
 
 3622 
 
2238 
          /* Reset CRC Calculation */
 3623 
  /* Init tickstart for timeout management */
2239 
          if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
 - 
 
2240 
          {
 - 
 
2241 
            SPI_RESET_CRC(hspi);
 3624 
  tickstart = HAL_GetTick();
2242 
          }
 - 
 
2243 
 
 3625 
 
- 
 
 3626 
  /* Disable ERR interrupt */
2244 
          hspi->State= HAL_SPI_STATE_READY;
 3627 
  __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR);
2245 
 
 3628 
 
2246 
          /* Process Unlocked */
 3629 
  /* Wait until TXE flag is set */
- 
 
 3630 
  do
- 
 
 3631 
  {
2247 
          __HAL_UNLOCK(hspi);
 3632 
    if (count == 0U)
- 
 
 3633 
    {
- 
 
 3634 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
- 
 
 3635 
      break;
- 
 
 3636 
    }
- 
 
 3637 
    count--;
- 
 
 3638 
  } while ((hspi->Instance->SR & SPI_FLAG_TXE) == RESET);
2248 
 
 3639 
 
- 
 
 3640 
  /* Check the end of the transaction */
- 
 
 3641 
  if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
- 
 
 3642 
  {
- 
 
 3643 
    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
- 
 
 3644 
  }
- 
 
 3645 
 
- 
 
 3646 
  /* Clear overrun flag in 2 Lines communication mode because received is not read */
- 
 
 3647 
  if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
- 
 
 3648 
  {
- 
 
 3649 
    __HAL_SPI_CLEAR_OVRFLAG(hspi);
- 
 
 3650 
  }
- 
 
 3651 
 
- 
 
 3652 
#if (USE_SPI_CRC != 0U)
- 
 
 3653 
  /* Check if CRC error occurred */
- 
 
 3654 
  if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
- 
 
 3655 
  {
- 
 
 3656 
    hspi->State = HAL_SPI_STATE_READY;
- 
 
 3657 
    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
- 
 
 3658 
    __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
- 
 
 3659 
    /* Call user error callback */
- 
 
 3660 
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
- 
 
 3661 
    hspi->ErrorCallback(hspi);
- 
 
 3662 
#else
- 
 
 3663 
    HAL_SPI_ErrorCallback(hspi);
- 
 
 3664 
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
- 
 
 3665 
  }
- 
 
 3666 
  else
- 
 
 3667 
  {
- 
 
 3668 
#endif /* USE_SPI_CRC */
- 
 
 3669 
    if (hspi->ErrorCode == HAL_SPI_ERROR_NONE)
- 
 
 3670 
    {
- 
 
 3671 
      if (hspi->State == HAL_SPI_STATE_BUSY_RX)
- 
 
 3672 
      {
2249 
          return HAL_TIMEOUT;
 3673 
        hspi->State = HAL_SPI_STATE_READY;
- 
 
 3674 
        /* Call user Rx complete callback */
- 
 
 3675 
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
- 
 
 3676 
        hspi->RxCpltCallback(hspi);
- 
 
 3677 
#else
- 
 
 3678 
        HAL_SPI_RxCpltCallback(hspi);
- 
 
 3679 
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
2250 
        }
 3680 
      }
- 
 
 3681 
      else
- 
 
 3682 
      {
- 
 
 3683 
        hspi->State = HAL_SPI_STATE_READY;
- 
 
 3684 
        /* Call user TxRx complete callback */
- 
 
 3685 
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
- 
 
 3686 
        hspi->TxRxCpltCallback(hspi);
- 
 
 3687 
#else
- 
 
 3688 
        HAL_SPI_TxRxCpltCallback(hspi);
- 
 
 3689 
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
2251 
      }
 3690 
      }
2252 
    }
 3691 
    }
- 
 
 3692 
    else
- 
 
 3693 
    {
- 
 
 3694 
      hspi->State = HAL_SPI_STATE_READY;
- 
 
 3695 
      /* Call user error callback */
- 
 
 3696 
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
- 
 
 3697 
      hspi->ErrorCallback(hspi);
- 
 
 3698 
#else
- 
 
 3699 
      HAL_SPI_ErrorCallback(hspi);
- 
 
 3700 
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
- 
 
 3701 
    }
- 
 
 3702 
#if (USE_SPI_CRC != 0U)
2253 
  }
 3703 
  }
- 
 
 3704 
#endif /* USE_SPI_CRC */
- 
 
 3705 
}
- 
 
 3706 
 
- 
 
 3707 
/**
- 
 
 3708 
  * @brief  Handle the end of the RX transaction.
- 
 
 3709 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
- 
 
 3710 
  *               the configuration information for SPI module.
2254 
  return HAL_OK;
 3711 
  * @retval None
- 
 
 3712 
  */
- 
 
 3713 
static void SPI_CloseRx_ISR(SPI_HandleTypeDef *hspi)
- 
 
 3714 
{
- 
 
 3715 
  /* Disable RXNE and ERR interrupt */
- 
 
 3716 
  __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
- 
 
 3717 
 
- 
 
 3718 
  /* Check the end of the transaction */
- 
 
 3719 
  if (SPI_EndRxTransaction(hspi, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
- 
 
 3720 
  {
- 
 
 3721 
    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
- 
 
 3722 
  }
- 
 
 3723 
 
- 
 
 3724 
  /* Clear overrun flag in 2 Lines communication mode because received is not read */
- 
 
 3725 
  if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
- 
 
 3726 
  {
- 
 
 3727 
    __HAL_SPI_CLEAR_OVRFLAG(hspi);
- 
 
 3728 
  }
- 
 
 3729 
  hspi->State = HAL_SPI_STATE_READY;
- 
 
 3730 
 
- 
 
 3731 
#if (USE_SPI_CRC != 0U)
- 
 
 3732 
  /* Check if CRC error occurred */
- 
 
 3733 
  if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
- 
 
 3734 
  {
- 
 
 3735 
    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
- 
 
 3736 
    __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
- 
 
 3737 
    /* Call user error callback */
- 
 
 3738 
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
- 
 
 3739 
    hspi->ErrorCallback(hspi);
- 
 
 3740 
#else
- 
 
 3741 
    HAL_SPI_ErrorCallback(hspi);
- 
 
 3742 
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
- 
 
 3743 
  }
- 
 
 3744 
  else
- 
 
 3745 
  {
- 
 
 3746 
#endif /* USE_SPI_CRC */
- 
 
 3747 
    if (hspi->ErrorCode == HAL_SPI_ERROR_NONE)
- 
 
 3748 
    {
- 
 
 3749 
      /* Call user Rx complete callback */
- 
 
 3750 
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
- 
 
 3751 
      hspi->RxCpltCallback(hspi);
- 
 
 3752 
#else
- 
 
 3753 
      HAL_SPI_RxCpltCallback(hspi);
- 
 
 3754 
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
- 
 
 3755 
    }
- 
 
 3756 
    else
- 
 
 3757 
    {
- 
 
 3758 
      /* Call user error callback */
- 
 
 3759 
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
- 
 
 3760 
      hspi->ErrorCallback(hspi);
- 
 
 3761 
#else
- 
 
 3762 
      HAL_SPI_ErrorCallback(hspi);
- 
 
 3763 
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
- 
 
 3764 
    }
- 
 
 3765 
#if (USE_SPI_CRC != 0U)
- 
 
 3766 
  }
- 
 
 3767 
#endif /* USE_SPI_CRC */
2255 
}
 3768 
}
- 
 
 3769 
 
- 
 
 3770 
/**
- 
 
 3771 
  * @brief  Handle the end of the TX transaction.
- 
 
 3772 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
- 
 
 3773 
  *               the configuration information for SPI module.
- 
 
 3774 
  * @retval None
- 
 
 3775 
  */
- 
 
 3776 
static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi)
- 
 
 3777 
{
- 
 
 3778 
  uint32_t tickstart;
- 
 
 3779 
  __IO uint32_t count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
- 
 
 3780 
 
- 
 
 3781 
  /* Init tickstart for timeout management*/
- 
 
 3782 
  tickstart = HAL_GetTick();
- 
 
 3783 
 
- 
 
 3784 
  /* Wait until TXE flag is set */
- 
 
 3785 
  do
- 
 
 3786 
  {
- 
 
 3787 
    if (count == 0U)
- 
 
 3788 
    {
- 
 
 3789 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
- 
 
 3790 
      break;
- 
 
 3791 
    }
- 
 
 3792 
    count--;
- 
 
 3793 
  } while ((hspi->Instance->SR & SPI_FLAG_TXE) == RESET);
- 
 
 3794 
 
- 
 
 3795 
  /* Disable TXE and ERR interrupt */
- 
 
 3796 
  __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
- 
 
 3797 
 
- 
 
 3798 
  /* Check the end of the transaction */
- 
 
 3799 
  if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
- 
 
 3800 
  {
- 
 
 3801 
    SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
- 
 
 3802 
  }
- 
 
 3803 
 
- 
 
 3804 
  /* Clear overrun flag in 2 Lines communication mode because received is not read */
- 
 
 3805 
  if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
- 
 
 3806 
  {
- 
 
 3807 
    __HAL_SPI_CLEAR_OVRFLAG(hspi);
- 
 
 3808 
  }
- 
 
 3809 
 
- 
 
 3810 
  hspi->State = HAL_SPI_STATE_READY;
- 
 
 3811 
  if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
- 
 
 3812 
  {
- 
 
 3813 
    /* Call user error callback */
- 
 
 3814 
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
- 
 
 3815 
    hspi->ErrorCallback(hspi);
- 
 
 3816 
#else
- 
 
 3817 
    HAL_SPI_ErrorCallback(hspi);
- 
 
 3818 
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
- 
 
 3819 
  }
- 
 
 3820 
  else
- 
 
 3821 
  {
- 
 
 3822 
    /* Call user Rx complete callback */
- 
 
 3823 
#if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
- 
 
 3824 
    hspi->TxCpltCallback(hspi);
- 
 
 3825 
#else
- 
 
 3826 
    HAL_SPI_TxCpltCallback(hspi);
- 
 
 3827 
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
- 
 
 3828 
  }
- 
 
 3829 
}
- 
 
 3830 
 
- 
 
 3831 
/**
- 
 
 3832 
  * @brief  Handle abort a Rx transaction.
- 
 
 3833 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
- 
 
 3834 
  *               the configuration information for SPI module.
- 
 
 3835 
  * @retval None
- 
 
 3836 
  */
- 
 
 3837 
static void SPI_AbortRx_ISR(SPI_HandleTypeDef *hspi)
- 
 
 3838 
{
- 
 
 3839 
  __IO uint32_t count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
- 
 
 3840 
 
- 
 
 3841 
  /* Wait until TXE flag is set */
- 
 
 3842 
  do
- 
 
 3843 
  {
- 
 
 3844 
    if (count == 0U)
- 
 
 3845 
    {
- 
 
 3846 
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
- 
 
 3847 
      break;
- 
 
 3848 
    }
- 
 
 3849 
    count--;
- 
 
 3850 
  } while ((hspi->Instance->SR & SPI_FLAG_TXE) == RESET);
- 
 
 3851 
 
- 
 
 3852 
  /* Disable SPI Peripheral */
- 
 
 3853 
  __HAL_SPI_DISABLE(hspi);
- 
 
 3854 
 
- 
 
 3855 
  /* Disable TXEIE, RXNEIE and ERRIE(mode fault event, overrun error, TI frame error) interrupts */
- 
 
 3856 
  CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXEIE | SPI_CR2_RXNEIE | SPI_CR2_ERRIE));
- 
 
 3857 
 
- 
 
 3858 
  /* Read CRC to flush Data Register */
- 
 
 3859 
  READ_REG(hspi->Instance->DR);
- 
 
 3860 
 
- 
 
 3861 
  hspi->State = HAL_SPI_STATE_ABORT;
- 
 
 3862 
}
- 
 
 3863 
 
- 
 
 3864 
/**
- 
 
 3865 
  * @brief  Handle abort a Tx or Rx/Tx transaction.
- 
 
 3866 
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
- 
 
 3867 
  *               the configuration information for SPI module.
- 
 
 3868 
  * @retval None
- 
 
 3869 
  */
- 
 
 3870 
static void SPI_AbortTx_ISR(SPI_HandleTypeDef *hspi)
- 
 
 3871 
{
- 
 
 3872 
  /* Disable TXEIE interrupt */
- 
 
 3873 
  CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXEIE));
- 
 
 3874 
 
- 
 
 3875 
  /* Disable SPI Peripheral */
- 
 
 3876 
  __HAL_SPI_DISABLE(hspi);
- 
 
 3877 
 
- 
 
 3878 
  hspi->State = HAL_SPI_STATE_ABORT;
- 
 
 3879 
}
- 
 
 3880 
 
2256 
/**
 3881 
/**
2257 
  * @}
 3882 
  * @}
2258 
  */
 3883 
  */
2259 
 
 3884 
 
2260 
#endif /* HAL_SPI_MODULE_ENABLED */
 3885 
#endif /* HAL_SPI_MODULE_ENABLED */
- 
 
 3886 
 
2261 
/**
 3887 
/**
2262 
  * @}
 3888 
  * @}
2263 
  */
 3889 
  */
2264 
 
 3890 
 
2265 
/**
 3891 
/**