WebSVN – DashDisplay – Diff – /branches/Dashboard_L152_v2/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_nor.c

 /**
   ******************************************************************************
   * @file    stm32l1xx_hal_nor.c
   * @author  MCD Application Team
   * @brief   NOR HAL module driver.
   *          This file provides a generic firmware to drive NOR memories mounted
   *          as external device.
   *
-  @verbatim
+  ******************************************************************************
-  ==============================================================================
+  * @attention
-                     ##### How to use this driver #####
+  *
-  ==============================================================================
+  * Copyright (c) 2016 STMicroelectronics.
-    [..]
+  * All rights reserved.
-      This driver is a generic layered driver which contains a set of APIs used to
+  *
-      control NOR flash memories. It uses the FSMC layer functions to interface
+  * This software is licensed under terms that can be found in the LICENSE file
-      with NOR devices. This driver is used as follows:
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
-      (+) NOR flash memory configuration sequence using the function HAL_NOR_Init()
+  *
-          with control and timing parameters for both normal and extended mode.
+  ******************************************************************************
+  @verbatim
-      (+) Read NOR flash memory manufacturer code and device IDs using the function
+  ==============================================================================
-          HAL_NOR_Read_ID(). The read information is stored in the NOR_ID_TypeDef
+                     ##### How to use this driver #####
-          structure declared by the function caller.
+  ==============================================================================
+    [..]
-      (+) Access NOR flash memory by read/write data unit operations using the functions
+      This driver is a generic layered driver which contains a set of APIs used to
-          HAL_NOR_Read(), HAL_NOR_Program().
+      control NOR flash memories. It uses the FSMC layer functions to interface
+      with NOR devices. This driver is used as follows:
-      (+) Perform NOR flash erase block/chip operations using the functions
-          HAL_NOR_Erase_Block() and HAL_NOR_Erase_Chip().
+      (+) NOR flash memory configuration sequence using the function HAL_NOR_Init()
+          with control and timing parameters for both normal and extended mode.
-      (+) Read the NOR flash CFI (common flash interface) IDs using the function
-          HAL_NOR_Read_CFI(). The read information is stored in the NOR_CFI_TypeDef
+      (+) Read NOR flash memory manufacturer code and device IDs using the function
-          structure declared by the function caller.
+          HAL_NOR_Read_ID(). The read information is stored in the NOR_ID_TypeDef
+          structure declared by the function caller.
-      (+) You can also control the NOR device by calling the control APIs HAL_NOR_WriteOperation_Enable()/
-          HAL_NOR_WriteOperation_Disable() to respectively enable/disable the NOR write operation
+      (+) Access NOR flash memory by read/write data unit operations using the functions
+          HAL_NOR_Read(), HAL_NOR_Program().
-      (+) You can monitor the NOR device HAL state by calling the function
-          HAL_NOR_GetState()
+      (+) Perform NOR flash erase block/chip operations using the functions
-    [..]
+          HAL_NOR_Erase_Block() and HAL_NOR_Erase_Chip().
-     (@) This driver is a set of generic APIs which handle standard NOR flash operations.
-         If a NOR flash device contains different operations and/or implementations,
+      (+) Read the NOR flash CFI (common flash interface) IDs using the function
-         it should be implemented separately.
+          HAL_NOR_Read_CFI(). The read information is stored in the NOR_CFI_TypeDef
+          structure declared by the function caller.
-     *** NOR HAL driver macros list ***
-     =============================================
+      (+) You can also control the NOR device by calling the control APIs HAL_NOR_WriteOperation_Enable()/
-     [..]
+          HAL_NOR_WriteOperation_Disable() to respectively enable/disable the NOR write operation
-       Below the list of most used macros in NOR HAL driver.
+      (+) You can monitor the NOR device HAL state by calling the function
-      (+) NOR_WRITE : NOR memory write data to specified address
+          HAL_NOR_GetState()
+    [..]
-    *** Callback registration ***
+     (@) This driver is a set of generic APIs which handle standard NOR flash operations.
-    =============================================
+         If a NOR flash device contains different operations and/or implementations,
-    [..]
+         it should be implemented separately.
-      The compilation define  USE_HAL_NOR_REGISTER_CALLBACKS when set to 1
-      allows the user to configure dynamically the driver callbacks.
+     *** NOR HAL driver macros list ***
+     =============================================
-      Use Functions @ref HAL_NOR_RegisterCallback() to register a user callback,
+     [..]
-      it allows to register following callbacks:
+       Below the list of most used macros in NOR HAL driver.
-        (+) MspInitCallback    : NOR MspInit.
-        (+) MspDeInitCallback  : NOR MspDeInit.
+      (+) NOR_WRITE : NOR memory write data to specified address
-      This function takes as parameters the HAL peripheral handle, the Callback ID
-      and a pointer to the user callback function.
+    *** Callback registration ***
+    =============================================
-      Use function @ref HAL_NOR_UnRegisterCallback() to reset a callback to the default
+    [..]
-      weak (surcharged) function. It allows to reset following callbacks:
+      The compilation define  USE_HAL_NOR_REGISTER_CALLBACKS when set to 1
-        (+) MspInitCallback    : NOR MspInit.
+      allows the user to configure dynamically the driver callbacks.
-        (+) MspDeInitCallback  : NOR MspDeInit.
-      This function) takes as parameters the HAL peripheral handle and the Callback ID.
+      Use Functions HAL_NOR_RegisterCallback() to register a user callback,
+      it allows to register following callbacks:
-      By default, after the @ref HAL_NOR_Init and if the state is HAL_NOR_STATE_RESET
+        (+) MspInitCallback    : NOR MspInit.
-      all callbacks are reset to the corresponding legacy weak (surcharged) functions.
+        (+) MspDeInitCallback  : NOR MspDeInit.
-      Exception done for MspInit and MspDeInit callbacks that are respectively
+      This function takes as parameters the HAL peripheral handle, the Callback ID
-      reset to the legacy weak (surcharged) functions in the @ref HAL_NOR_Init
+      and a pointer to the user callback function.
-      and @ref  HAL_NOR_DeInit only when these callbacks are null (not registered beforehand).
-      If not, MspInit or MspDeInit are not null, the @ref HAL_NOR_Init and @ref HAL_NOR_DeInit
+      Use function HAL_NOR_UnRegisterCallback() to reset a callback to the default
-      keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
+      weak (surcharged) function. It allows to reset following callbacks:
+        (+) MspInitCallback    : NOR MspInit.
-      Callbacks can be registered/unregistered in READY state only.
+        (+) MspDeInitCallback  : NOR MspDeInit.
-      Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
+      This function) takes as parameters the HAL peripheral handle and the Callback ID.
-      in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
-      during the Init/DeInit.
+      By default, after the HAL_NOR_Init and if the state is HAL_NOR_STATE_RESET
-      In that case first register the MspInit/MspDeInit user callbacks
+      all callbacks are reset to the corresponding legacy weak (surcharged) functions.
-      using @ref HAL_NOR_RegisterCallback before calling @ref HAL_NOR_DeInit
+      Exception done for MspInit and MspDeInit callbacks that are respectively
-      or @ref HAL_NOR_Init function.
+      reset to the legacy weak (surcharged) functions in the HAL_NOR_Init
+      and  HAL_NOR_DeInit only when these callbacks are null (not registered beforehand).
-      When The compilation define USE_HAL_NOR_REGISTER_CALLBACKS is set to 0 or
+      If not, MspInit or MspDeInit are not null, the HAL_NOR_Init and HAL_NOR_DeInit
-      not defined, the callback registering feature is not available
+      keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
-      and weak (surcharged) callbacks are used.
+      Callbacks can be registered/unregistered in READY state only.
-  @endverbatim
+      Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
-  ******************************************************************************
+      in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
-  * @attention
+      during the Init/DeInit.
-  *
+      In that case first register the MspInit/MspDeInit user callbacks
-  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+      using HAL_NOR_RegisterCallback before calling HAL_NOR_DeInit
-  * All rights reserved.</center></h2>
+      or HAL_NOR_Init function.
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
+      When The compilation define USE_HAL_NOR_REGISTER_CALLBACKS is set to 0 or
-  * the "License"; You may not use this file except in compliance with the
+      not defined, the callback registering feature is not available
-  * License. You may obtain a copy of the License at:
+      and weak (surcharged) callbacks are used.
-  *                       opensource.org/licenses/BSD-3-Clause
-  *
+  @endverbatim
   ******************************************************************************
   */
 /* Includes ------------------------------------------------------------------*/
 #include "stm32l1xx_hal.h"
 #if defined(FSMC_BANK1)
 /** @addtogroup STM32L1xx_HAL_Driver
   * @{
   */
 #ifdef HAL_NOR_MODULE_ENABLED
 /** @defgroup NOR NOR
   * @brief NOR driver modules
   * @{
   */
 /* Private typedef -----------------------------------------------------------*/
 /* Private define ------------------------------------------------------------*/
 /** @defgroup NOR_Private_Defines NOR Private Defines
   * @{
   */
 /* Constants to define address to set to write a command */
 #define NOR_CMD_ADDRESS_FIRST                 (uint16_t)0x0555
 #define NOR_CMD_ADDRESS_FIRST_CFI             (uint16_t)0x0055
 #define NOR_CMD_ADDRESS_SECOND                (uint16_t)0x02AA
 #define NOR_CMD_ADDRESS_THIRD                 (uint16_t)0x0555
 #define NOR_CMD_ADDRESS_FOURTH                (uint16_t)0x0555
 #define NOR_CMD_ADDRESS_FIFTH                 (uint16_t)0x02AA
 #define NOR_CMD_ADDRESS_SIXTH                 (uint16_t)0x0555
 /* Constants to define data to program a command */
 #define NOR_CMD_DATA_READ_RESET               (uint16_t)0x00F0
 #define NOR_CMD_DATA_FIRST                    (uint16_t)0x00AA
 #define NOR_CMD_DATA_SECOND                   (uint16_t)0x0055
 #define NOR_CMD_DATA_AUTO_SELECT              (uint16_t)0x0090
 #define NOR_CMD_DATA_PROGRAM                  (uint16_t)0x00A0
 #define NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD   (uint16_t)0x0080
 #define NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH  (uint16_t)0x00AA
 #define NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH   (uint16_t)0x0055
 #define NOR_CMD_DATA_CHIP_ERASE               (uint16_t)0x0010
 #define NOR_CMD_DATA_CFI                      (uint16_t)0x0098
 #define NOR_CMD_DATA_BUFFER_AND_PROG          (uint8_t)0x25
 #define NOR_CMD_DATA_BUFFER_AND_PROG_CONFIRM  (uint8_t)0x29
 #define NOR_CMD_DATA_BLOCK_ERASE              (uint8_t)0x30
 #define NOR_CMD_READ_ARRAY                    (uint16_t)0x00FF
 #define NOR_CMD_WORD_PROGRAM                  (uint16_t)0x0040
 #define NOR_CMD_BUFFERED_PROGRAM              (uint16_t)0x00E8
 #define NOR_CMD_CONFIRM                       (uint16_t)0x00D0
 #define NOR_CMD_BLOCK_ERASE                   (uint16_t)0x0020
 #define NOR_CMD_BLOCK_UNLOCK                  (uint16_t)0x0060
 #define NOR_CMD_READ_STATUS_REG               (uint16_t)0x0070
 #define NOR_CMD_CLEAR_STATUS_REG              (uint16_t)0x0050
 /* Mask on NOR STATUS REGISTER */
 #define NOR_MASK_STATUS_DQ4                   (uint16_t)0x0010
 #define NOR_MASK_STATUS_DQ5                   (uint16_t)0x0020
 #define NOR_MASK_STATUS_DQ6                   (uint16_t)0x0040
 #define NOR_MASK_STATUS_DQ7                   (uint16_t)0x0080
 /* Address of the primary command set */
 #define NOR_ADDRESS_COMMAND_SET               (uint16_t)0x0013
 /* Command set code assignment (defined in JEDEC JEP137B version may 2004) */
 #define NOR_INTEL_SHARP_EXT_COMMAND_SET       (uint16_t)0x0001 /* Supported in this driver */
 #define NOR_AMD_FUJITSU_COMMAND_SET           (uint16_t)0x0002 /* Supported in this driver */
 #define NOR_INTEL_STANDARD_COMMAND_SET        (uint16_t)0x0003 /* Not Supported in this driver */
 #define NOR_AMD_FUJITSU_EXT_COMMAND_SET       (uint16_t)0x0004 /* Not Supported in this driver */
 #define NOR_WINDBOND_STANDARD_COMMAND_SET     (uint16_t)0x0006 /* Not Supported in this driver */
 #define NOR_MITSUBISHI_STANDARD_COMMAND_SET   (uint16_t)0x0100 /* Not Supported in this driver */
 #define NOR_MITSUBISHI_EXT_COMMAND_SET        (uint16_t)0x0101 /* Not Supported in this driver */
 #define NOR_PAGE_WRITE_COMMAND_SET            (uint16_t)0x0102 /* Not Supported in this driver */
 #define NOR_INTEL_PERFORMANCE_COMMAND_SET     (uint16_t)0x0200 /* Not Supported in this driver */
 #define NOR_INTEL_DATA_COMMAND_SET            (uint16_t)0x0210 /* Not Supported in this driver */
 /**
   * @}
   */
 /* Private macro -------------------------------------------------------------*/
 /* Private variables ---------------------------------------------------------*/
 /** @defgroup NOR_Private_Variables NOR Private Variables
   * @{
   */
 static uint32_t uwNORMemoryDataWidth  = NOR_MEMORY_8B;
 /**
   * @}
   */
 /* Private functions ---------------------------------------------------------*/
 /* Exported functions --------------------------------------------------------*/
 /** @defgroup NOR_Exported_Functions NOR Exported Functions
   * @{
   */
 /** @defgroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions
   * @brief    Initialization and Configuration functions
   *
   @verbatim
   ==============================================================================
            ##### NOR Initialization and de_initialization functions #####
   ==============================================================================
   [..]
     This section provides functions allowing to initialize/de-initialize
     the NOR memory
 @endverbatim
   * @{
   */
 /**
   * @brief  Perform the NOR memory Initialization sequence
   * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
   *                the configuration information for NOR module.
   * @param  Timing pointer to NOR control timing structure
   * @param  ExtTiming pointer to NOR extended mode timing structure
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FSMC_NORSRAM_TimingTypeDef *Timing,
                                FSMC_NORSRAM_TimingTypeDef *ExtTiming)
 {
   uint32_t deviceaddress;
+  HAL_StatusTypeDef status = HAL_OK;
-  /* Check the NOR handle parameter */
-  if (hnor == NULL)
+  /* Check the NOR handle parameter */
-  {
+  if (hnor == NULL)
-    return HAL_ERROR;
+  {
-  }
+    return HAL_ERROR;
+  }
-  if (hnor->State == HAL_NOR_STATE_RESET)
-  {
+  if (hnor->State == HAL_NOR_STATE_RESET)
-    /* Allocate lock resource and initialize it */
+  {
-    hnor->Lock = HAL_UNLOCKED;
+    /* Allocate lock resource and initialize it */
+    hnor->Lock = HAL_UNLOCKED;
-#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
-    if (hnor->MspInitCallback == NULL)
+#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
-    {
+    if (hnor->MspInitCallback == NULL)
-      hnor->MspInitCallback = HAL_NOR_MspInit;
+    {
-    }
+      hnor->MspInitCallback = HAL_NOR_MspInit;
+    }
-    /* Init the low level hardware */
-    hnor->MspInitCallback(hnor);
+    /* Init the low level hardware */
-#else
+    hnor->MspInitCallback(hnor);
-    /* Initialize the low level hardware (MSP) */
+#else
-    HAL_NOR_MspInit(hnor);
+    /* Initialize the low level hardware (MSP) */
-#endif /* (USE_HAL_NOR_REGISTER_CALLBACKS) */
+    HAL_NOR_MspInit(hnor);
-  }
+#endif /* (USE_HAL_NOR_REGISTER_CALLBACKS) */
+  }
-  /* Initialize NOR control Interface */
-  (void)FSMC_NORSRAM_Init(hnor->Instance, &(hnor->Init));
+  /* Initialize NOR control Interface */
+  (void)FSMC_NORSRAM_Init(hnor->Instance, &(hnor->Init));
-  /* Initialize NOR timing Interface */
-  (void)FSMC_NORSRAM_Timing_Init(hnor->Instance, Timing, hnor->Init.NSBank);
+  /* Initialize NOR timing Interface */
+  (void)FSMC_NORSRAM_Timing_Init(hnor->Instance, Timing, hnor->Init.NSBank);
-  /* Initialize NOR extended mode timing Interface */
-  (void)FSMC_NORSRAM_Extended_Timing_Init(hnor->Extended, ExtTiming, hnor->Init.NSBank, hnor->Init.ExtendedMode);
+  /* Initialize NOR extended mode timing Interface */
+  (void)FSMC_NORSRAM_Extended_Timing_Init(hnor->Extended, ExtTiming, hnor->Init.NSBank, hnor->Init.ExtendedMode);
-  /* Enable the NORSRAM device */
-  __FSMC_NORSRAM_ENABLE(hnor->Instance, hnor->Init.NSBank);
+  /* Enable the NORSRAM device */
+  __FSMC_NORSRAM_ENABLE(hnor->Instance, hnor->Init.NSBank);
-  /* Initialize NOR Memory Data Width*/
-  if (hnor->Init.MemoryDataWidth == FSMC_NORSRAM_MEM_BUS_WIDTH_8)
+  /* Initialize NOR Memory Data Width*/
-  {
+  if (hnor->Init.MemoryDataWidth == FSMC_NORSRAM_MEM_BUS_WIDTH_8)
-    uwNORMemoryDataWidth = NOR_MEMORY_8B;
+  {
-  }
+    uwNORMemoryDataWidth = NOR_MEMORY_8B;
-  else
+  }
-  {
+  else
-    uwNORMemoryDataWidth = NOR_MEMORY_16B;
+  {
-  }
+    uwNORMemoryDataWidth = NOR_MEMORY_16B;
+  }
-  /* Initialize the NOR controller state */
-  hnor->State = HAL_NOR_STATE_READY;
+  /* Initialize the NOR controller state */
+  hnor->State = HAL_NOR_STATE_READY;
-  /* Select the NOR device address */
-  if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)
+  /* Select the NOR device address */
-  {
+  if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)
-    deviceaddress = NOR_MEMORY_ADRESS1;
+  {
-  }
+    deviceaddress = NOR_MEMORY_ADRESS1;
-  else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)
+  }
-  {
+  else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)
-    deviceaddress = NOR_MEMORY_ADRESS2;
+  {
-  }
+    deviceaddress = NOR_MEMORY_ADRESS2;
-  else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)
+  }
-  {
+  else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)
-    deviceaddress = NOR_MEMORY_ADRESS3;
+  {
-  }
+    deviceaddress = NOR_MEMORY_ADRESS3;
-  else /* FSMC_NORSRAM_BANK4 */
+  }
-  {
+  else /* FSMC_NORSRAM_BANK4 */
-    deviceaddress = NOR_MEMORY_ADRESS4;
+  {
-  }
+    deviceaddress = NOR_MEMORY_ADRESS4;
+  }
-  /* Get the value of the command set */
-  NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST_CFI), NOR_CMD_DATA_CFI);
+  if (hnor->Init.WriteOperation == FSMC_WRITE_OPERATION_DISABLE)
-  hnor->CommandSet = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_ADDRESS_COMMAND_SET);
+  {
+    (void)FSMC_NORSRAM_WriteOperation_Disable(hnor->Instance, hnor->Init.NSBank);
-  return HAL_NOR_ReturnToReadMode(hnor);
-}
+    /* Update the NOR controller state */
+    hnor->State = HAL_NOR_STATE_PROTECTED;
-/**
+  }
-  * @brief  Perform NOR memory De-Initialization sequence
+  else
-  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
+  {
-  *                the configuration information for NOR module.
+    /* Get the value of the command set */
-  * @retval HAL status
+    NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST_CFI), NOR_CMD_DATA_CFI);
-  */
+    hnor->CommandSet = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_ADDRESS_COMMAND_SET);
-HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor)
-{
+    status = HAL_NOR_ReturnToReadMode(hnor);
-#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
+  }
-  if (hnor->MspDeInitCallback == NULL)
-  {
+  return status;
-    hnor->MspDeInitCallback = HAL_NOR_MspDeInit;
+}
-  }
+/**
-  /* DeInit the low level hardware */
+  * @brief  Perform NOR memory De-Initialization sequence
-  hnor->MspDeInitCallback(hnor);
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
-#else
+  *                the configuration information for NOR module.
-  /* De-Initialize the low level hardware (MSP) */
+  * @retval HAL status
-  HAL_NOR_MspDeInit(hnor);
+  */
-#endif /* (USE_HAL_NOR_REGISTER_CALLBACKS) */
+HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor)
+{
-  /* Configure the NOR registers with their reset values */
+#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
-  (void)FSMC_NORSRAM_DeInit(hnor->Instance, hnor->Extended, hnor->Init.NSBank);
+  if (hnor->MspDeInitCallback == NULL)
+  {
-  /* Reset the NOR controller state */
+    hnor->MspDeInitCallback = HAL_NOR_MspDeInit;
-  hnor->State = HAL_NOR_STATE_RESET;
+  }
-  /* Release Lock */
+  /* DeInit the low level hardware */
-  __HAL_UNLOCK(hnor);
+  hnor->MspDeInitCallback(hnor);
+#else
-  return HAL_OK;
+  /* De-Initialize the low level hardware (MSP) */
-}
+  HAL_NOR_MspDeInit(hnor);
+#endif /* (USE_HAL_NOR_REGISTER_CALLBACKS) */
-/**
-  * @brief  NOR MSP Init
+  /* Configure the NOR registers with their reset values */
-  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
+  (void)FSMC_NORSRAM_DeInit(hnor->Instance, hnor->Extended, hnor->Init.NSBank);
-  *                the configuration information for NOR module.
-  * @retval None
+  /* Reset the NOR controller state */
-  */
+  hnor->State = HAL_NOR_STATE_RESET;
-__weak void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor)
-{
+  /* Release Lock */
-  /* Prevent unused argument(s) compilation warning */
+  __HAL_UNLOCK(hnor);
-  UNUSED(hnor);
+  return HAL_OK;
-  /* NOTE : This function Should not be modified, when the callback is needed,
+}
-            the HAL_NOR_MspInit could be implemented in the user file
-   */
+/**
-}
+  * @brief  NOR MSP Init
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
-/**
+  *                the configuration information for NOR module.
-  * @brief  NOR MSP DeInit
+  * @retval None
-  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
+  */
-  *                the configuration information for NOR module.
+__weak void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor)
-  * @retval None
+{
-  */
+  /* Prevent unused argument(s) compilation warning */
-__weak void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor)
+  UNUSED(hnor);
-{
-  /* Prevent unused argument(s) compilation warning */
+  /* NOTE : This function Should not be modified, when the callback is needed,
-  UNUSED(hnor);
+            the HAL_NOR_MspInit could be implemented in the user file
+   */
-  /* NOTE : This function Should not be modified, when the callback is needed,
+}
-            the HAL_NOR_MspDeInit could be implemented in the user file
-   */
+/**
-}
+  * @brief  NOR MSP DeInit
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
-/**
+  *                the configuration information for NOR module.
-  * @brief  NOR MSP Wait for Ready/Busy signal
+  * @retval None
-  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
+  */
-  *                the configuration information for NOR module.
+__weak void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor)
-  * @param  Timeout Maximum timeout value
+{
-  * @retval None
+  /* Prevent unused argument(s) compilation warning */
-  */
+  UNUSED(hnor);
-__weak void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout)
-{
+  /* NOTE : This function Should not be modified, when the callback is needed,
-  /* Prevent unused argument(s) compilation warning */
+            the HAL_NOR_MspDeInit could be implemented in the user file
-  UNUSED(hnor);
+   */
-  UNUSED(Timeout);
+}
-  /* NOTE : This function Should not be modified, when the callback is needed,
+/**
-            the HAL_NOR_MspWait could be implemented in the user file
+  * @brief  NOR MSP Wait for Ready/Busy signal
-   */
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
-}
+  *                the configuration information for NOR module.
+  * @param  Timeout Maximum timeout value
-/**
+  * @retval None
-  * @}
+  */
-  */
+__weak void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout)
+{
-/** @defgroup NOR_Exported_Functions_Group2 Input and Output functions
+  /* Prevent unused argument(s) compilation warning */
-  * @brief    Input Output and memory control functions
+  UNUSED(hnor);
-  *
+  UNUSED(Timeout);
-  @verbatim
-  ==============================================================================
+  /* NOTE : This function Should not be modified, when the callback is needed,
-                ##### NOR Input and Output functions #####
+            the HAL_NOR_MspWait could be implemented in the user file
-  ==============================================================================
+   */
-  [..]
+}
-    This section provides functions allowing to use and control the NOR memory
+/**
-@endverbatim
+  * @}
-  * @{
+  */
-  */
+/** @defgroup NOR_Exported_Functions_Group2 Input and Output functions
-/**
+  * @brief    Input Output and memory control functions
-  * @brief  Read NOR flash IDs
+  *
-  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
+  @verbatim
-  *                the configuration information for NOR module.
+  ==============================================================================
-  * @param  pNOR_ID  pointer to NOR ID structure
+                ##### NOR Input and Output functions #####
-  * @retval HAL status
+  ==============================================================================
-  */
+  [..]
-HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID)
+    This section provides functions allowing to use and control the NOR memory
-{
-  uint32_t deviceaddress;
+@endverbatim
-  HAL_NOR_StateTypeDef state;
+  * @{
-  HAL_StatusTypeDef status = HAL_OK;
+  */
-  /* Check the NOR controller state */
+/**
-  state = hnor->State;
+  * @brief  Read NOR flash IDs
-  if (state == HAL_NOR_STATE_BUSY)
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
-  {
+  *                the configuration information for NOR module.
-    return HAL_BUSY;
+  * @param  pNOR_ID  pointer to NOR ID structure
-  }
+  * @retval HAL status
-  else if ((state == HAL_NOR_STATE_READY) || (state == HAL_NOR_STATE_PROTECTED))
+  */
-  {
+HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID)
-    /* Process Locked */
+{
-    __HAL_LOCK(hnor);
+  uint32_t deviceaddress;
+  HAL_NOR_StateTypeDef state;
-    /* Update the NOR controller state */
+  HAL_StatusTypeDef status = HAL_OK;
-    hnor->State = HAL_NOR_STATE_BUSY;
+  /* Check the NOR controller state */
-    /* Select the NOR device address */
+  state = hnor->State;
-    if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)
+  if (state == HAL_NOR_STATE_BUSY)
-    {
+  {
-      deviceaddress = NOR_MEMORY_ADRESS1;
+    return HAL_BUSY;
-    }
+  }
-    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)
+  else if (state == HAL_NOR_STATE_PROTECTED)
-    {
+  {
-      deviceaddress = NOR_MEMORY_ADRESS2;
+    return HAL_ERROR;
-    }
+  }
-    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)
+  else if (state == HAL_NOR_STATE_READY)
-    {
+  {
-      deviceaddress = NOR_MEMORY_ADRESS3;
+    /* Process Locked */
-    }
+    __HAL_LOCK(hnor);
-    else /* FSMC_NORSRAM_BANK4 */
-    {
+    /* Update the NOR controller state */
-      deviceaddress = NOR_MEMORY_ADRESS4;
+    hnor->State = HAL_NOR_STATE_BUSY;
-    }
+    /* Select the NOR device address */
-    /* Send read ID command */
+    if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)
-    if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)
+    {
-    {
+      deviceaddress = NOR_MEMORY_ADRESS1;
-      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
+    }
-      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
+    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)
-      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_AUTO_SELECT);
+    {
-    }
+      deviceaddress = NOR_MEMORY_ADRESS2;
-    else if (hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET)
+    }
-    {
+    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)
-      NOR_WRITE(deviceaddress, NOR_CMD_DATA_AUTO_SELECT);
+    {
-    }
+      deviceaddress = NOR_MEMORY_ADRESS3;
-    else
+    }
-    {
+    else /* FSMC_NORSRAM_BANK4 */
-      /* Primary command set not supported by the driver */
+    {
-      status = HAL_ERROR;
+      deviceaddress = NOR_MEMORY_ADRESS4;
     }
-    if (status != HAL_ERROR)
+    /* Send read ID command */
-    {
+    if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)
-      /* Read the NOR IDs */
+    {
-      pNOR_ID->Manufacturer_Code = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, MC_ADDRESS);
+      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
-      pNOR_ID->Device_Code1      = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth,
+      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
-                                                                     DEVICE_CODE1_ADDR);
+      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_AUTO_SELECT);
-      pNOR_ID->Device_Code2      = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth,
+    }
-                                                                     DEVICE_CODE2_ADDR);
+    else if (hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET)
-      pNOR_ID->Device_Code3      = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth,
+    {
-                                                                     DEVICE_CODE3_ADDR);
+      NOR_WRITE(deviceaddress, NOR_CMD_DATA_AUTO_SELECT);
     }
+    else
-    /* Check the NOR controller state */
+    {
-    hnor->State = state;
+      /* Primary command set not supported by the driver */
+      status = HAL_ERROR;
-    /* Process unlocked */
+    }
-    __HAL_UNLOCK(hnor);
-  }
+    if (status != HAL_ERROR)
-  else
+    {
-  {
+      /* Read the NOR IDs */
-    return HAL_ERROR;
+      pNOR_ID->Manufacturer_Code = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, MC_ADDRESS);
-  }
+      pNOR_ID->Device_Code1      = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth,
+                                                                     DEVICE_CODE1_ADDR);
-  return status;
+      pNOR_ID->Device_Code2      = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth,
-}
+                                                                     DEVICE_CODE2_ADDR);
+      pNOR_ID->Device_Code3      = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth,
-/**
+                                                                     DEVICE_CODE3_ADDR);
-  * @brief  Returns the NOR memory to Read mode.
+    }
-  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
-  *                the configuration information for NOR module.
+    /* Check the NOR controller state */
-  * @retval HAL status
+    hnor->State = state;
-  */
-HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor)
+    /* Process unlocked */
-{
+    __HAL_UNLOCK(hnor);
-  uint32_t deviceaddress;
+  }
-  HAL_NOR_StateTypeDef state;
+  else
-  HAL_StatusTypeDef status = HAL_OK;
+  {
+    return HAL_ERROR;
-  /* Check the NOR controller state */
+  }
-  state = hnor->State;
-  if (state == HAL_NOR_STATE_BUSY)
+  return status;
-  {
+}
-    return HAL_BUSY;
-  }
+/**
-  else if ((state == HAL_NOR_STATE_READY) || (state == HAL_NOR_STATE_PROTECTED))
+  * @brief  Returns the NOR memory to Read mode.
-  {
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
-    /* Process Locked */
+  *                the configuration information for NOR module.
-    __HAL_LOCK(hnor);
+  * @retval HAL status
+  */
-    /* Update the NOR controller state */
+HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor)
-    hnor->State = HAL_NOR_STATE_BUSY;
+{
+  uint32_t deviceaddress;
-    /* Select the NOR device address */
+  HAL_NOR_StateTypeDef state;
-    if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)
+  HAL_StatusTypeDef status = HAL_OK;
-    {
-      deviceaddress = NOR_MEMORY_ADRESS1;
+  /* Check the NOR controller state */
-    }
+  state = hnor->State;
-    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)
+  if (state == HAL_NOR_STATE_BUSY)
-    {
+  {
-      deviceaddress = NOR_MEMORY_ADRESS2;
+    return HAL_BUSY;
-    }
+  }
-    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)
+  else if (state == HAL_NOR_STATE_PROTECTED)
-    {
+  {
-      deviceaddress = NOR_MEMORY_ADRESS3;
+    return HAL_ERROR;
-    }
+  }
-    else /* FSMC_NORSRAM_BANK4 */
+  else if (state == HAL_NOR_STATE_READY)
-    {
+  {
-      deviceaddress = NOR_MEMORY_ADRESS4;
+    /* Process Locked */
-    }
+    __HAL_LOCK(hnor);
-    if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)
+    /* Update the NOR controller state */
-    {
+    hnor->State = HAL_NOR_STATE_BUSY;
-      NOR_WRITE(deviceaddress, NOR_CMD_DATA_READ_RESET);
-    }
+    /* Select the NOR device address */
-    else if (hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET)
+    if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)
     {
-      NOR_WRITE(deviceaddress, NOR_CMD_READ_ARRAY);
+      deviceaddress = NOR_MEMORY_ADRESS1;
     }
-    else
+    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)
     {
-      /* Primary command set not supported by the driver */
+      deviceaddress = NOR_MEMORY_ADRESS2;
-      status = HAL_ERROR;
+    }
-    }
+    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)
+    {
-    /* Check the NOR controller state */
+      deviceaddress = NOR_MEMORY_ADRESS3;
-    hnor->State = state;
+    }
+    else /* FSMC_NORSRAM_BANK4 */
-    /* Process unlocked */
+    {
-    __HAL_UNLOCK(hnor);
+      deviceaddress = NOR_MEMORY_ADRESS4;
-  }
+    }
-  else
-  {
+    if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)
-    return HAL_ERROR;
+    {
-  }
+      NOR_WRITE(deviceaddress, NOR_CMD_DATA_READ_RESET);
+    }
-  return status;
+    else if (hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET)
-}
+    {
+      NOR_WRITE(deviceaddress, NOR_CMD_READ_ARRAY);
-/**
+    }
-  * @brief  Read data from NOR memory
+    else
-  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
+    {
-  *                the configuration information for NOR module.
+      /* Primary command set not supported by the driver */
-  * @param  pAddress pointer to Device address
+      status = HAL_ERROR;
-  * @param  pData  pointer to read data
+    }
-  * @retval HAL status
-  */
+    /* Check the NOR controller state */
-HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData)
+    hnor->State = state;
-{
-  uint32_t deviceaddress;
+    /* Process unlocked */
-  HAL_NOR_StateTypeDef state;
+    __HAL_UNLOCK(hnor);
-  HAL_StatusTypeDef status = HAL_OK;
+  }
+  else
-  /* Check the NOR controller state */
+  {
-  state = hnor->State;
+    return HAL_ERROR;
-  if (state == HAL_NOR_STATE_BUSY)
+  }
-  {
-    return HAL_BUSY;
+  return status;
-  }
+}
-  else if ((state == HAL_NOR_STATE_READY) || (state == HAL_NOR_STATE_PROTECTED))
-  {
+/**
-    /* Process Locked */
+  * @brief  Read data from NOR memory
-    __HAL_LOCK(hnor);
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
+  *                the configuration information for NOR module.
-    /* Update the NOR controller state */
+  * @param  pAddress pointer to Device address
-    hnor->State = HAL_NOR_STATE_BUSY;
+  * @param  pData  pointer to read data
+  * @retval HAL status
-    /* Select the NOR device address */
+  */
-    if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)
+HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData)
-    {
+{
-      deviceaddress = NOR_MEMORY_ADRESS1;
+  uint32_t deviceaddress;
-    }
+  HAL_NOR_StateTypeDef state;
-    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)
+  HAL_StatusTypeDef status = HAL_OK;
-    {
-      deviceaddress = NOR_MEMORY_ADRESS2;
+  /* Check the NOR controller state */
-    }
+  state = hnor->State;
-    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)
+  if (state == HAL_NOR_STATE_BUSY)
-    {
+  {
-      deviceaddress = NOR_MEMORY_ADRESS3;
+    return HAL_BUSY;
-    }
+  }
-    else /* FSMC_NORSRAM_BANK4 */
+  else if (state == HAL_NOR_STATE_PROTECTED)
-    {
+  {
-      deviceaddress = NOR_MEMORY_ADRESS4;
+    return HAL_ERROR;
-    }
+  }
+  else if (state == HAL_NOR_STATE_READY)
-    /* Send read data command */
+  {
-    if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)
+    /* Process Locked */
-    {
+    __HAL_LOCK(hnor);
-      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
-      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
+    /* Update the NOR controller state */
-      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_READ_RESET);
+    hnor->State = HAL_NOR_STATE_BUSY;
-    }
-    else if (hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET)
+    /* Select the NOR device address */
-    {
+    if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)
-      NOR_WRITE(pAddress, NOR_CMD_READ_ARRAY);
+    {
-    }
+      deviceaddress = NOR_MEMORY_ADRESS1;
-    else
+    }
-    {
+    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)
-      /* Primary command set not supported by the driver */
+    {
-      status = HAL_ERROR;
+      deviceaddress = NOR_MEMORY_ADRESS2;
     }
+    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)
-    if (status != HAL_ERROR)
+    {
-    {
+      deviceaddress = NOR_MEMORY_ADRESS3;
-      /* Read the data */
+    }
-      *pData = (uint16_t)(*(__IO uint32_t *)pAddress);
+    else /* FSMC_NORSRAM_BANK4 */
-    }
+    {
+      deviceaddress = NOR_MEMORY_ADRESS4;
-    /* Check the NOR controller state */
+    }
-    hnor->State = state;
+    /* Send read data command */
-    /* Process unlocked */
+    if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)
-    __HAL_UNLOCK(hnor);
+    {
-  }
+      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
-  else
+      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
-  {
+      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_READ_RESET);
-    return HAL_ERROR;
+    }
-  }
+    else if (hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET)
+    {
-  return status;
+      NOR_WRITE(pAddress, NOR_CMD_READ_ARRAY);
-}
+    }
+    else
-/**
+    {
-  * @brief  Program data to NOR memory
+      /* Primary command set not supported by the driver */
-  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
+      status = HAL_ERROR;
-  *                the configuration information for NOR module.
+    }
-  * @param  pAddress Device address
-  * @param  pData  pointer to the data to write
+    if (status != HAL_ERROR)
-  * @retval HAL status
+    {
-  */
+      /* Read the data */
-HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData)
+      *pData = (uint16_t)(*(__IO uint32_t *)pAddress);
-{
+    }
-  uint32_t deviceaddress;
-  HAL_StatusTypeDef status = HAL_OK;
+    /* Check the NOR controller state */
+    hnor->State = state;
-  /* Check the NOR controller state */
-  if (hnor->State == HAL_NOR_STATE_BUSY)
+    /* Process unlocked */
-  {
+    __HAL_UNLOCK(hnor);
-    return HAL_BUSY;
+  }
-  }
+  else
-  else if (hnor->State == HAL_NOR_STATE_READY)
+  {
-  {
+    return HAL_ERROR;
-    /* Process Locked */
+  }
-    __HAL_LOCK(hnor);
+  return status;
-    /* Update the NOR controller state */
+}
-    hnor->State = HAL_NOR_STATE_BUSY;
+/**
-    /* Select the NOR device address */
+  * @brief  Program data to NOR memory
-    if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
-    {
+  *                the configuration information for NOR module.
-      deviceaddress = NOR_MEMORY_ADRESS1;
+  * @param  pAddress Device address
-    }
+  * @param  pData  pointer to the data to write
-    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)
+  * @retval HAL status
-    {
+  */
-      deviceaddress = NOR_MEMORY_ADRESS2;
+HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData)
-    }
+{
-    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)
+  uint32_t deviceaddress;
-    {
+  HAL_StatusTypeDef status = HAL_OK;
-      deviceaddress = NOR_MEMORY_ADRESS3;
-    }
+  /* Check the NOR controller state */
-    else /* FSMC_NORSRAM_BANK4 */
+  if (hnor->State == HAL_NOR_STATE_BUSY)
-    {
+  {
-      deviceaddress = NOR_MEMORY_ADRESS4;
+    return HAL_BUSY;
-    }
+  }
+  else if (hnor->State == HAL_NOR_STATE_READY)
-    /* Send program data command */
+  {
-    if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)
+    /* Process Locked */
-    {
+    __HAL_LOCK(hnor);
-      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
-      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
+    /* Update the NOR controller state */
-      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_PROGRAM);
+    hnor->State = HAL_NOR_STATE_BUSY;
-    }
-    else if (hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET)
+    /* Select the NOR device address */
-    {
+    if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)
-      NOR_WRITE(pAddress, NOR_CMD_WORD_PROGRAM);
+    {
-    }
+      deviceaddress = NOR_MEMORY_ADRESS1;
-    else
+    }
-    {
+    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)
-      /* Primary command set not supported by the driver */
+    {
-      status = HAL_ERROR;
+      deviceaddress = NOR_MEMORY_ADRESS2;
     }
+    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)
-    if (status != HAL_ERROR)
+    {
-    {
+      deviceaddress = NOR_MEMORY_ADRESS3;
-      /* Write the data */
+    }
-      NOR_WRITE(pAddress, *pData);
+    else /* FSMC_NORSRAM_BANK4 */
-    }
+    {
+      deviceaddress = NOR_MEMORY_ADRESS4;
-    /* Check the NOR controller state */
+    }
-    hnor->State = HAL_NOR_STATE_READY;
+    /* Send program data command */
-    /* Process unlocked */
+    if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)
-    __HAL_UNLOCK(hnor);
+    {
-  }
+      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
-  else
+      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
-  {
+      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_PROGRAM);
-    return HAL_ERROR;
+    }
-  }
+    else if (hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET)
+    {
-  return status;
+      NOR_WRITE(pAddress, NOR_CMD_WORD_PROGRAM);
-}
+    }
+    else
-/**
+    {
-  * @brief  Reads a half-word buffer from the NOR memory.
+      /* Primary command set not supported by the driver */
-  * @param  hnor pointer to the NOR handle
+      status = HAL_ERROR;
-  * @param  uwAddress NOR memory internal address to read from.
+    }
-  * @param  pData pointer to the buffer that receives the data read from the
-  *         NOR memory.
+    if (status != HAL_ERROR)
-  * @param  uwBufferSize  number of Half word to read.
+    {
-  * @retval HAL status
+      /* Write the data */
-  */
+      NOR_WRITE(pAddress, *pData);
-HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData,
+    }
-                                     uint32_t uwBufferSize)
-{
+    /* Check the NOR controller state */
-  uint32_t deviceaddress;
+    hnor->State = HAL_NOR_STATE_READY;
-  uint32_t size = uwBufferSize;
-  uint32_t address = uwAddress;
+    /* Process unlocked */
-  uint16_t *data = pData;
+    __HAL_UNLOCK(hnor);
-  HAL_NOR_StateTypeDef state;
+  }
-  HAL_StatusTypeDef status = HAL_OK;
+  else
+  {
-  /* Check the NOR controller state */
+    return HAL_ERROR;
-  state = hnor->State;
+  }
-  if (state == HAL_NOR_STATE_BUSY)
-  {
+  return status;
-    return HAL_BUSY;
+}
-  }
-  else if ((state == HAL_NOR_STATE_READY) || (state == HAL_NOR_STATE_PROTECTED))
+/**
-  {
+  * @brief  Reads a half-word buffer from the NOR memory.
-    /* Process Locked */
+  * @param  hnor pointer to the NOR handle
-    __HAL_LOCK(hnor);
+  * @param  uwAddress NOR memory internal address to read from.
+  * @param  pData pointer to the buffer that receives the data read from the
-    /* Update the NOR controller state */
+  *         NOR memory.
-    hnor->State = HAL_NOR_STATE_BUSY;
+  * @param  uwBufferSize  number of Half word to read.
+  * @retval HAL status
-    /* Select the NOR device address */
+  */
-    if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)
+HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData,
-    {
+                                     uint32_t uwBufferSize)
-      deviceaddress = NOR_MEMORY_ADRESS1;
+{
-    }
+  uint32_t deviceaddress;
-    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)
+  uint32_t size = uwBufferSize;
-    {
+  uint32_t address = uwAddress;
-      deviceaddress = NOR_MEMORY_ADRESS2;
+  uint16_t *data = pData;
-    }
+  HAL_NOR_StateTypeDef state;
-    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)
+  HAL_StatusTypeDef status = HAL_OK;
-    {
-      deviceaddress = NOR_MEMORY_ADRESS3;
+  /* Check the NOR controller state */
-    }
+  state = hnor->State;
-    else /* FSMC_NORSRAM_BANK4 */
+  if (state == HAL_NOR_STATE_BUSY)
-    {
+  {
-      deviceaddress = NOR_MEMORY_ADRESS4;
+    return HAL_BUSY;
-    }
+  }
+  else if (state == HAL_NOR_STATE_PROTECTED)
-    /* Send read data command */
+  {
-    if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)
+    return HAL_ERROR;
-    {
+  }
-      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
+  else if (state == HAL_NOR_STATE_READY)
-      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
+  {
-      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_READ_RESET);
+    /* Process Locked */
-    }
+    __HAL_LOCK(hnor);
-    else if (hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET)
-    {
+    /* Update the NOR controller state */
-      NOR_WRITE(deviceaddress, NOR_CMD_READ_ARRAY);
+    hnor->State = HAL_NOR_STATE_BUSY;
-    }
-    else
+    /* Select the NOR device address */
-    {
+    if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)
-      /* Primary command set not supported by the driver */
+    {
-      status = HAL_ERROR;
+      deviceaddress = NOR_MEMORY_ADRESS1;
     }
+    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)
-    if (status != HAL_ERROR)
+    {
-    {
+      deviceaddress = NOR_MEMORY_ADRESS2;
-      /* Read buffer */
+    }
-      while (size > 0U)
+    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)
-      {
+    {
-        *data = *(__IO uint16_t *)address;
+      deviceaddress = NOR_MEMORY_ADRESS3;
-        data++;
+    }
-        address += 2U;
+    else /* FSMC_NORSRAM_BANK4 */
-        size--;
+    {
-      }
+      deviceaddress = NOR_MEMORY_ADRESS4;
     }
-    /* Check the NOR controller state */
+    /* Send read data command */
-    hnor->State = state;
+    if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)
+    {
-    /* Process unlocked */
+      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
-    __HAL_UNLOCK(hnor);
+      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
-  }
+      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_READ_RESET);
-  else
+    }
-  {
+    else if (hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET)
-    return HAL_ERROR;
+    {
-  }
+      NOR_WRITE(deviceaddress, NOR_CMD_READ_ARRAY);
+    }
-  return status;
+    else
-}
+    {
+      /* Primary command set not supported by the driver */
-/**
+      status = HAL_ERROR;
-  * @brief  Writes a half-word buffer to the NOR memory. This function must be used
+    }
-            only with S29GL128P NOR memory.
-  * @param  hnor pointer to the NOR handle
+    if (status != HAL_ERROR)
-  * @param  uwAddress NOR memory internal start write address
+    {
-  * @param  pData pointer to source data buffer.
+      /* Read buffer */
-  * @param  uwBufferSize Size of the buffer to write
+      while (size > 0U)
-  * @retval HAL status
+      {
-  */
+        *data = *(__IO uint16_t *)address;
-HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData,
+        data++;
-                                        uint32_t uwBufferSize)
+        address += 2U;
-{
+        size--;
-  uint16_t *p_currentaddress;
+      }
-  const uint16_t *p_endaddress;
+    }
-  uint16_t *data = pData;
-  uint32_t deviceaddress;
+    /* Check the NOR controller state */
-  HAL_StatusTypeDef status = HAL_OK;
+    hnor->State = state;
-  /* Check the NOR controller state */
+    /* Process unlocked */
-  if (hnor->State == HAL_NOR_STATE_BUSY)
+    __HAL_UNLOCK(hnor);
-  {
+  }
-    return HAL_BUSY;
+  else
-  }
+  {
-  else if (hnor->State == HAL_NOR_STATE_READY)
+    return HAL_ERROR;
-  {
+  }
-    /* Process Locked */
-    __HAL_LOCK(hnor);
+  return status;
+}
-    /* Update the NOR controller state */
-    hnor->State = HAL_NOR_STATE_BUSY;
+/**
+  * @brief  Writes a half-word buffer to the NOR memory. This function must be used
-    /* Select the NOR device address */
+            only with S29GL128P NOR memory.
-    if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)
+  * @param  hnor pointer to the NOR handle
-    {
+  * @param  uwAddress NOR memory internal start write address
-      deviceaddress = NOR_MEMORY_ADRESS1;
+  * @param  pData pointer to source data buffer.
-    }
+  * @param  uwBufferSize Size of the buffer to write
-    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)
+  * @retval HAL status
-    {
+  */
-      deviceaddress = NOR_MEMORY_ADRESS2;
+HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData,
-    }
+                                        uint32_t uwBufferSize)
-    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)
+{
-    {
+  uint16_t *p_currentaddress;
-      deviceaddress = NOR_MEMORY_ADRESS3;
+  const uint16_t *p_endaddress;
-    }
+  uint16_t *data = pData;
-    else /* FSMC_NORSRAM_BANK4 */
+  uint32_t deviceaddress;
-    {
+  HAL_StatusTypeDef status = HAL_OK;
-      deviceaddress = NOR_MEMORY_ADRESS4;
-    }
+  /* Check the NOR controller state */
+  if (hnor->State == HAL_NOR_STATE_BUSY)
-    /* Initialize variables */
+  {
-    p_currentaddress  = (uint16_t *)(deviceaddress + uwAddress);
+    return HAL_BUSY;
-    p_endaddress      = (uint16_t *)(deviceaddress + uwAddress + (2U * (uwBufferSize - 1U)));
+  }
+  else if (hnor->State == HAL_NOR_STATE_READY)
-    if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)
+  {
-    {
+    /* Process Locked */
-      /* Issue unlock command sequence */
+    __HAL_LOCK(hnor);
-      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
-      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
+    /* Update the NOR controller state */
+    hnor->State = HAL_NOR_STATE_BUSY;
-      /* Write Buffer Load Command */
-      NOR_WRITE((deviceaddress + uwAddress), NOR_CMD_DATA_BUFFER_AND_PROG);
+    /* Select the NOR device address */
-      NOR_WRITE((deviceaddress + uwAddress), (uint16_t)(uwBufferSize - 1U));
+    if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)
-    }
+    {
-    else if (hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET)
+      deviceaddress = NOR_MEMORY_ADRESS1;
-    {
+    }
-      /* Write Buffer Load Command */
+    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)
-      NOR_WRITE((deviceaddress + uwAddress), NOR_CMD_BUFFERED_PROGRAM);
+    {
-      NOR_WRITE((deviceaddress + uwAddress), (uint16_t)(uwBufferSize - 1U));
+      deviceaddress = NOR_MEMORY_ADRESS2;
     }
-    else
+    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)
     {
-      /* Primary command set not supported by the driver */
+      deviceaddress = NOR_MEMORY_ADRESS3;
-      status = HAL_ERROR;
+    }
-    }
+    else /* FSMC_NORSRAM_BANK4 */
+    {
-    if (status != HAL_ERROR)
+      deviceaddress = NOR_MEMORY_ADRESS4;
-    {
+    }
-      /* Load Data into NOR Buffer */
-      while (p_currentaddress <= p_endaddress)
+    /* Initialize variables */
-      {
+    p_currentaddress  = (uint16_t *)(deviceaddress + uwAddress);
-        NOR_WRITE(p_currentaddress, *data);
+    p_endaddress      = (uint16_t *)(deviceaddress + uwAddress + (2U * (uwBufferSize - 1U)));
-        data++;
+    if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)
-        p_currentaddress ++;
+    {
-      }
+      /* Issue unlock command sequence */
+      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
-      if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)
+      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
-      {
-        NOR_WRITE((deviceaddress + uwAddress), NOR_CMD_DATA_BUFFER_AND_PROG_CONFIRM);
+      /* Write Buffer Load Command */
-      }
+      NOR_WRITE((deviceaddress + uwAddress), NOR_CMD_DATA_BUFFER_AND_PROG);
-      else /* => hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET */
+      NOR_WRITE((deviceaddress + uwAddress), (uint16_t)(uwBufferSize - 1U));
-      {
+    }
-        NOR_WRITE((deviceaddress + uwAddress), NOR_CMD_CONFIRM);
+    else if (hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET)
-      }
+    {
-    }
+      /* Write Buffer Load Command */
+      NOR_WRITE((deviceaddress + uwAddress), NOR_CMD_BUFFERED_PROGRAM);
-    /* Check the NOR controller state */
+      NOR_WRITE((deviceaddress + uwAddress), (uint16_t)(uwBufferSize - 1U));
-    hnor->State = HAL_NOR_STATE_READY;
+    }
+    else
-    /* Process unlocked */
+    {
-    __HAL_UNLOCK(hnor);
+      /* Primary command set not supported by the driver */
-  }
+      status = HAL_ERROR;
-  else
+    }
-  {
-    return HAL_ERROR;
+    if (status != HAL_ERROR)
-  }
+    {
+      /* Load Data into NOR Buffer */
-  return status;
+      while (p_currentaddress <= p_endaddress)
+      {
-}
+        NOR_WRITE(p_currentaddress, *data);
-/**
+        data++;
-  * @brief  Erase the specified block of the NOR memory
+        p_currentaddress ++;
-  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
+      }
-  *                the configuration information for NOR module.
-  * @param  BlockAddress  Block to erase address
+      if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)
-  * @param  Address Device address
+      {
-  * @retval HAL status
+        NOR_WRITE((deviceaddress + uwAddress), NOR_CMD_DATA_BUFFER_AND_PROG_CONFIRM);
-  */
+      }
-HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address)
+      else /* => hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET */
-{
+      {
-  uint32_t deviceaddress;
+        NOR_WRITE((deviceaddress + uwAddress), NOR_CMD_CONFIRM);
-  HAL_StatusTypeDef status = HAL_OK;
+      }
+    }
-  /* Check the NOR controller state */
-  if (hnor->State == HAL_NOR_STATE_BUSY)
+    /* Check the NOR controller state */
-  {
+    hnor->State = HAL_NOR_STATE_READY;
-    return HAL_BUSY;
-  }
+    /* Process unlocked */
-  else if (hnor->State == HAL_NOR_STATE_READY)
+    __HAL_UNLOCK(hnor);
-  {
+  }
-    /* Process Locked */
+  else
-    __HAL_LOCK(hnor);
+  {
+    return HAL_ERROR;
-    /* Update the NOR controller state */
+  }
-    hnor->State = HAL_NOR_STATE_BUSY;
+  return status;
-    /* Select the NOR device address */
-    if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)
+}
-    {
-      deviceaddress = NOR_MEMORY_ADRESS1;
+/**
-    }
+  * @brief  Erase the specified block of the NOR memory
-    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
-    {
+  *                the configuration information for NOR module.
-      deviceaddress = NOR_MEMORY_ADRESS2;
+  * @param  BlockAddress  Block to erase address
-    }
+  * @param  Address Device address
-    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)
+  * @retval HAL status
-    {
+  */
-      deviceaddress = NOR_MEMORY_ADRESS3;
+HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address)
-    }
+{
-    else /* FSMC_NORSRAM_BANK4 */
+  uint32_t deviceaddress;
-    {
+  HAL_StatusTypeDef status = HAL_OK;
-      deviceaddress = NOR_MEMORY_ADRESS4;
-    }
+  /* Check the NOR controller state */
+  if (hnor->State == HAL_NOR_STATE_BUSY)
-    /* Send block erase command sequence */
+  {
-    if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)
+    return HAL_BUSY;
-    {
+  }
-      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
+  else if (hnor->State == HAL_NOR_STATE_READY)
-      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
+  {
-      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD),
+    /* Process Locked */
-                NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD);
+    __HAL_LOCK(hnor);
-      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FOURTH),
-                NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH);
+    /* Update the NOR controller state */
-      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIFTH),
+    hnor->State = HAL_NOR_STATE_BUSY;
-                NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH);
-      NOR_WRITE((uint32_t)(BlockAddress + Address), NOR_CMD_DATA_BLOCK_ERASE);
+    /* Select the NOR device address */
-    }
+    if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)
-    else if (hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET)
+    {
-    {
+      deviceaddress = NOR_MEMORY_ADRESS1;
-      NOR_WRITE((BlockAddress + Address), NOR_CMD_BLOCK_UNLOCK);
+    }
-      NOR_WRITE((BlockAddress + Address), NOR_CMD_CONFIRM);
+    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)
-      NOR_WRITE((BlockAddress + Address), NOR_CMD_BLOCK_ERASE);
+    {
-      NOR_WRITE((BlockAddress + Address), NOR_CMD_CONFIRM);
+      deviceaddress = NOR_MEMORY_ADRESS2;
     }
-    else
+    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)
     {
-      /* Primary command set not supported by the driver */
+      deviceaddress = NOR_MEMORY_ADRESS3;
-      status = HAL_ERROR;
+    }
-    }
+    else /* FSMC_NORSRAM_BANK4 */
+    {
-    /* Check the NOR memory status and update the controller state */
+      deviceaddress = NOR_MEMORY_ADRESS4;
-    hnor->State = HAL_NOR_STATE_READY;
+    }
-    /* Process unlocked */
+    /* Send block erase command sequence */
-    __HAL_UNLOCK(hnor);
+    if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)
-  }
+    {
-  else
+      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
-  {
+      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
-    return HAL_ERROR;
+      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD),
-  }
+                NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD);
+      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FOURTH),
-  return status;
+                NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH);
+      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIFTH),
-}
+                NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH);
+      NOR_WRITE((uint32_t)(BlockAddress + Address), NOR_CMD_DATA_BLOCK_ERASE);
-/**
+    }
-  * @brief  Erase the entire NOR chip.
+    else if (hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET)
-  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
+    {
-  *                the configuration information for NOR module.
+      NOR_WRITE((BlockAddress + Address), NOR_CMD_BLOCK_UNLOCK);
-  * @param  Address  Device address
+      NOR_WRITE((BlockAddress + Address), NOR_CMD_CONFIRM);
-  * @retval HAL status
+      NOR_WRITE((BlockAddress + Address), NOR_CMD_BLOCK_ERASE);
-  */
+      NOR_WRITE((BlockAddress + Address), NOR_CMD_CONFIRM);
-HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address)
+    }
-{
+    else
-  uint32_t deviceaddress;
+    {
-  HAL_StatusTypeDef status = HAL_OK;
+      /* Primary command set not supported by the driver */
-  UNUSED(Address);
+      status = HAL_ERROR;
+    }
-  /* Check the NOR controller state */
-  if (hnor->State == HAL_NOR_STATE_BUSY)
+    /* Check the NOR memory status and update the controller state */
-  {
+    hnor->State = HAL_NOR_STATE_READY;
-    return HAL_BUSY;
-  }
+    /* Process unlocked */
-  else if (hnor->State == HAL_NOR_STATE_READY)
+    __HAL_UNLOCK(hnor);
-  {
+  }
-    /* Process Locked */
+  else
-    __HAL_LOCK(hnor);
+  {
+    return HAL_ERROR;
-    /* Update the NOR controller state */
+  }
-    hnor->State = HAL_NOR_STATE_BUSY;
+  return status;
-    /* Select the NOR device address */
-    if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)
+}
-    {
-      deviceaddress = NOR_MEMORY_ADRESS1;
+/**
-    }
+  * @brief  Erase the entire NOR chip.
-    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
-    {
+  *                the configuration information for NOR module.
-      deviceaddress = NOR_MEMORY_ADRESS2;
+  * @param  Address  Device address
-    }
+  * @retval HAL status
-    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)
+  */
-    {
+HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address)
-      deviceaddress = NOR_MEMORY_ADRESS3;
+{
-    }
+  uint32_t deviceaddress;
-    else /* FSMC_NORSRAM_BANK4 */
+  HAL_StatusTypeDef status = HAL_OK;
-    {
+  UNUSED(Address);
-      deviceaddress = NOR_MEMORY_ADRESS4;
-    }
+  /* Check the NOR controller state */
+  if (hnor->State == HAL_NOR_STATE_BUSY)
-    /* Send NOR chip erase command sequence */
+  {
-    if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)
+    return HAL_BUSY;
-    {
+  }
-      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
+  else if (hnor->State == HAL_NOR_STATE_READY)
-      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
+  {
-      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD),
+    /* Process Locked */
-                NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD);
+    __HAL_LOCK(hnor);
-      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FOURTH),
-                NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH);
+    /* Update the NOR controller state */
-      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIFTH),
+    hnor->State = HAL_NOR_STATE_BUSY;
-                NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH);
-      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SIXTH), NOR_CMD_DATA_CHIP_ERASE);
+    /* Select the NOR device address */
-    }
+    if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)
-    else
+    {
-    {
+      deviceaddress = NOR_MEMORY_ADRESS1;
-      /* Primary command set not supported by the driver */
+    }
-      status = HAL_ERROR;
+    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)
-    }
+    {
+      deviceaddress = NOR_MEMORY_ADRESS2;
-    /* Check the NOR memory status and update the controller state */
+    }
-    hnor->State = HAL_NOR_STATE_READY;
+    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)
+    {
-    /* Process unlocked */
+      deviceaddress = NOR_MEMORY_ADRESS3;
-    __HAL_UNLOCK(hnor);
+    }
-  }
+    else /* FSMC_NORSRAM_BANK4 */
-  else
+    {
-  {
+      deviceaddress = NOR_MEMORY_ADRESS4;
-    return HAL_ERROR;
+    }
-  }
+    /* Send NOR chip erase command sequence */
-  return status;
+    if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)
-}
+    {
+      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
-/**
+      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
-  * @brief  Read NOR flash CFI IDs
+      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD),
-  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
+                NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD);
-  *                the configuration information for NOR module.
+      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FOURTH),
-  * @param  pNOR_CFI  pointer to NOR CFI IDs structure
+                NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH);
-  * @retval HAL status
+      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIFTH),
-  */
+                NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH);
-HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI)
+      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SIXTH), NOR_CMD_DATA_CHIP_ERASE);
-{
+    }
-  uint32_t deviceaddress;
+    else
-  HAL_NOR_StateTypeDef state;
+    {
+      /* Primary command set not supported by the driver */
-  /* Check the NOR controller state */
+      status = HAL_ERROR;
-  state = hnor->State;
+    }
-  if (state == HAL_NOR_STATE_BUSY)
-  {
+    /* Check the NOR memory status and update the controller state */
-    return HAL_BUSY;
+    hnor->State = HAL_NOR_STATE_READY;
-  }
-  else if ((state == HAL_NOR_STATE_READY) || (state == HAL_NOR_STATE_PROTECTED))
+    /* Process unlocked */
-  {
+    __HAL_UNLOCK(hnor);
-    /* Process Locked */
+  }
-    __HAL_LOCK(hnor);
+  else
+  {
-    /* Update the NOR controller state */
+    return HAL_ERROR;
-    hnor->State = HAL_NOR_STATE_BUSY;
+  }
-    /* Select the NOR device address */
+  return status;
-    if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)
+}
-    {
-      deviceaddress = NOR_MEMORY_ADRESS1;
+/**
-    }
+  * @brief  Read NOR flash CFI IDs
-    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
-    {
+  *                the configuration information for NOR module.
-      deviceaddress = NOR_MEMORY_ADRESS2;
+  * @param  pNOR_CFI  pointer to NOR CFI IDs structure
-    }
+  * @retval HAL status
-    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)
+  */
-    {
+HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI)
-      deviceaddress = NOR_MEMORY_ADRESS3;
+{
-    }
+  uint32_t deviceaddress;
-    else /* FSMC_NORSRAM_BANK4 */
+  HAL_NOR_StateTypeDef state;
-    {
-      deviceaddress = NOR_MEMORY_ADRESS4;
+  /* Check the NOR controller state */
-    }
+  state = hnor->State;
+  if (state == HAL_NOR_STATE_BUSY)
-    /* Send read CFI query command */
+  {
-    NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST_CFI), NOR_CMD_DATA_CFI);
+    return HAL_BUSY;
+  }
-    /* read the NOR CFI information */
+  else if (state == HAL_NOR_STATE_PROTECTED)
-    pNOR_CFI->CFI_1 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, CFI1_ADDRESS);
+  {
-    pNOR_CFI->CFI_2 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, CFI2_ADDRESS);
+    return HAL_ERROR;
-    pNOR_CFI->CFI_3 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, CFI3_ADDRESS);
+  }
-    pNOR_CFI->CFI_4 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, CFI4_ADDRESS);
+  else if (state == HAL_NOR_STATE_READY)
+  {
-    /* Check the NOR controller state */
+    /* Process Locked */
-    hnor->State = state;
+    __HAL_LOCK(hnor);
-    /* Process unlocked */
+    /* Update the NOR controller state */
-    __HAL_UNLOCK(hnor);
+    hnor->State = HAL_NOR_STATE_BUSY;
-  }
-  else
+    /* Select the NOR device address */
-  {
+    if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)
-    return HAL_ERROR;
+    {
-  }
+      deviceaddress = NOR_MEMORY_ADRESS1;
+    }
-  return HAL_OK;
+    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)
-}
+    {
+      deviceaddress = NOR_MEMORY_ADRESS2;
-#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
+    }
-/**
+    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)
-  * @brief  Register a User NOR Callback
+    {
-  *         To be used instead of the weak (surcharged) predefined callback
+      deviceaddress = NOR_MEMORY_ADRESS3;
-  * @param hnor : NOR handle
+    }
-  * @param CallbackId : ID of the callback to be registered
+    else /* FSMC_NORSRAM_BANK4 */
-  *        This parameter can be one of the following values:
+    {
-  *          @arg @ref HAL_NOR_MSP_INIT_CB_ID       NOR MspInit callback ID
+      deviceaddress = NOR_MEMORY_ADRESS4;
-  *          @arg @ref HAL_NOR_MSP_DEINIT_CB_ID     NOR MspDeInit callback ID
+    }
-  * @param pCallback : pointer to the Callback function
-  * @retval status
+    /* Send read CFI query command */
-  */
+    NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST_CFI), NOR_CMD_DATA_CFI);
-HAL_StatusTypeDef HAL_NOR_RegisterCallback(NOR_HandleTypeDef *hnor, HAL_NOR_CallbackIDTypeDef CallbackId,
-                                           pNOR_CallbackTypeDef pCallback)
+    /* read the NOR CFI information */
-{
+    pNOR_CFI->CFI_1 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, CFI1_ADDRESS);
-  HAL_StatusTypeDef status = HAL_OK;
+    pNOR_CFI->CFI_2 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, CFI2_ADDRESS);
-  HAL_NOR_StateTypeDef state;
+    pNOR_CFI->CFI_3 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, CFI3_ADDRESS);
+    pNOR_CFI->CFI_4 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, CFI4_ADDRESS);
-  if (pCallback == NULL)
-  {
+    /* Check the NOR controller state */
-    return HAL_ERROR;
+    hnor->State = state;
-  }
+    /* Process unlocked */
-  /* Process locked */
+    __HAL_UNLOCK(hnor);
-  __HAL_LOCK(hnor);
+  }
+  else
-  state = hnor->State;
+  {
-  if ((state == HAL_NOR_STATE_READY) || (state == HAL_NOR_STATE_RESET) || (state == HAL_NOR_STATE_PROTECTED))
+    return HAL_ERROR;
-  {
+  }
-    switch (CallbackId)
-    {
+  return HAL_OK;
-      case HAL_NOR_MSP_INIT_CB_ID :
+}
-        hnor->MspInitCallback = pCallback;
-        break;
+#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
-      case HAL_NOR_MSP_DEINIT_CB_ID :
+/**
-        hnor->MspDeInitCallback = pCallback;
+  * @brief  Register a User NOR Callback
-        break;
+  *         To be used instead of the weak (surcharged) predefined callback
-      default :
+  * @param hnor : NOR handle
-        /* update return status */
+  * @param CallbackId : ID of the callback to be registered
-        status =  HAL_ERROR;
+  *        This parameter can be one of the following values:
-        break;
+  *          @arg @ref HAL_NOR_MSP_INIT_CB_ID       NOR MspInit callback ID
-    }
+  *          @arg @ref HAL_NOR_MSP_DEINIT_CB_ID     NOR MspDeInit callback ID
-  }
+  * @param pCallback : pointer to the Callback function
-  else
+  * @retval status
-  {
+  */
-    /* update return status */
+HAL_StatusTypeDef HAL_NOR_RegisterCallback(NOR_HandleTypeDef *hnor, HAL_NOR_CallbackIDTypeDef CallbackId,
-    status =  HAL_ERROR;
+                                           pNOR_CallbackTypeDef pCallback)
-  }
+{
+  HAL_StatusTypeDef status = HAL_OK;
-  /* Release Lock */
+  HAL_NOR_StateTypeDef state;
-  __HAL_UNLOCK(hnor);
-  return status;
+  if (pCallback == NULL)
-}
+  {
+    return HAL_ERROR;
-/**
+  }
-  * @brief  Unregister a User NOR Callback
-  *         NOR Callback is redirected to the weak (surcharged) predefined callback
+  /* Process locked */
-  * @param hnor : NOR handle
+  __HAL_LOCK(hnor);
-  * @param CallbackId : ID of the callback to be unregistered
-  *        This parameter can be one of the following values:
+  state = hnor->State;
-  *          @arg @ref HAL_NOR_MSP_INIT_CB_ID       NOR MspInit callback ID
+  if ((state == HAL_NOR_STATE_READY) || (state == HAL_NOR_STATE_RESET) || (state == HAL_NOR_STATE_PROTECTED))
-  *          @arg @ref HAL_NOR_MSP_DEINIT_CB_ID     NOR MspDeInit callback ID
+  {
-  * @retval status
+    switch (CallbackId)
-  */
+    {
-HAL_StatusTypeDef HAL_NOR_UnRegisterCallback(NOR_HandleTypeDef *hnor, HAL_NOR_CallbackIDTypeDef CallbackId)
+      case HAL_NOR_MSP_INIT_CB_ID :
-{
+        hnor->MspInitCallback = pCallback;
-  HAL_StatusTypeDef status = HAL_OK;
+        break;
-  HAL_NOR_StateTypeDef state;
+      case HAL_NOR_MSP_DEINIT_CB_ID :
+        hnor->MspDeInitCallback = pCallback;
-  /* Process locked */
+        break;
-  __HAL_LOCK(hnor);
+      default :
+        /* update return status */
-  state = hnor->State;
+        status =  HAL_ERROR;
-  if ((state == HAL_NOR_STATE_READY) || (state == HAL_NOR_STATE_RESET) || (state == HAL_NOR_STATE_PROTECTED))
+        break;
-  {
+    }
-    switch (CallbackId)
+  }
-    {
+  else
-      case HAL_NOR_MSP_INIT_CB_ID :
+  {
-        hnor->MspInitCallback = HAL_NOR_MspInit;
+    /* update return status */
-        break;
+    status =  HAL_ERROR;
-      case HAL_NOR_MSP_DEINIT_CB_ID :
+  }
-        hnor->MspDeInitCallback = HAL_NOR_MspDeInit;
-        break;
+  /* Release Lock */
-      default :
+  __HAL_UNLOCK(hnor);
-        /* update return status */
+  return status;
-        status =  HAL_ERROR;
+}
-        break;
-    }
+/**
-  }
+  * @brief  Unregister a User NOR Callback
-  else
+  *         NOR Callback is redirected to the weak (surcharged) predefined callback
-  {
+  * @param hnor : NOR handle
-    /* update return status */
+  * @param CallbackId : ID of the callback to be unregistered
-    status =  HAL_ERROR;
+  *        This parameter can be one of the following values:
-  }
+  *          @arg @ref HAL_NOR_MSP_INIT_CB_ID       NOR MspInit callback ID
+  *          @arg @ref HAL_NOR_MSP_DEINIT_CB_ID     NOR MspDeInit callback ID
-  /* Release Lock */
+  * @retval status
-  __HAL_UNLOCK(hnor);
+  */
-  return status;
+HAL_StatusTypeDef HAL_NOR_UnRegisterCallback(NOR_HandleTypeDef *hnor, HAL_NOR_CallbackIDTypeDef CallbackId)
-}
+{
-#endif /* (USE_HAL_NOR_REGISTER_CALLBACKS) */
+  HAL_StatusTypeDef status = HAL_OK;
+  HAL_NOR_StateTypeDef state;
-/**
-  * @}
+  /* Process locked */
-  */
+  __HAL_LOCK(hnor);
-/** @defgroup NOR_Exported_Functions_Group3 NOR Control functions
+  state = hnor->State;
-  *  @brief   management functions
+  if ((state == HAL_NOR_STATE_READY) || (state == HAL_NOR_STATE_RESET) || (state == HAL_NOR_STATE_PROTECTED))
-  *
+  {
-@verbatim
+    switch (CallbackId)
-  ==============================================================================
+    {
-                        ##### NOR Control functions #####
+      case HAL_NOR_MSP_INIT_CB_ID :
-  ==============================================================================
+        hnor->MspInitCallback = HAL_NOR_MspInit;
-  [..]
+        break;
-    This subsection provides a set of functions allowing to control dynamically
+      case HAL_NOR_MSP_DEINIT_CB_ID :
-    the NOR interface.
+        hnor->MspDeInitCallback = HAL_NOR_MspDeInit;
+        break;
-@endverbatim
+      default :
-  * @{
+        /* update return status */
-  */
+        status =  HAL_ERROR;
+        break;
-/**
+    }
-  * @brief  Enables dynamically NOR write operation.
+  }
-  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
+  else
-  *                the configuration information for NOR module.
+  {
-  * @retval HAL status
+    /* update return status */
-  */
+    status =  HAL_ERROR;
-HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor)
+  }
-{
-  /* Check the NOR controller state */
+  /* Release Lock */
-  if (hnor->State == HAL_NOR_STATE_PROTECTED)
+  __HAL_UNLOCK(hnor);
-  {
+  return status;
-    /* Process Locked */
+}
-    __HAL_LOCK(hnor);
+#endif /* (USE_HAL_NOR_REGISTER_CALLBACKS) */
-    /* Update the NOR controller state */
+/**
-    hnor->State = HAL_NOR_STATE_BUSY;
+  * @}
+  */
-    /* Enable write operation */
-    (void)FSMC_NORSRAM_WriteOperation_Enable(hnor->Instance, hnor->Init.NSBank);
+/** @defgroup NOR_Exported_Functions_Group3 NOR Control functions
+  *  @brief   management functions
-    /* Update the NOR controller state */
+  *
-    hnor->State = HAL_NOR_STATE_READY;
+@verbatim
+  ==============================================================================
-    /* Process unlocked */
+                        ##### NOR Control functions #####
-    __HAL_UNLOCK(hnor);
+  ==============================================================================
-  }
+  [..]
-  else
+    This subsection provides a set of functions allowing to control dynamically
-  {
+    the NOR interface.
-    return HAL_ERROR;
-  }
+@endverbatim
+  * @{
-  return HAL_OK;
+  */
-}
+/**
-/**
+  * @brief  Enables dynamically NOR write operation.
-  * @brief  Disables dynamically NOR write operation.
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
-  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
+  *                the configuration information for NOR module.
-  *                the configuration information for NOR module.
+  * @retval HAL status
-  * @retval HAL status
+  */
-  */
+HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor)
-HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor)
+{
-{
+  /* Check the NOR controller state */
-  /* Check the NOR controller state */
+  if (hnor->State == HAL_NOR_STATE_PROTECTED)
-  if (hnor->State == HAL_NOR_STATE_READY)
+  {
-  {
+    /* Process Locked */
-    /* Process Locked */
+    __HAL_LOCK(hnor);
-    __HAL_LOCK(hnor);
+    /* Update the NOR controller state */
-    /* Update the NOR controller state */
+    hnor->State = HAL_NOR_STATE_BUSY;
-    hnor->State = HAL_NOR_STATE_BUSY;
+    /* Enable write operation */
-    /* Disable write operation */
+    (void)FSMC_NORSRAM_WriteOperation_Enable(hnor->Instance, hnor->Init.NSBank);
-    (void)FSMC_NORSRAM_WriteOperation_Disable(hnor->Instance, hnor->Init.NSBank);
+    /* Update the NOR controller state */
-    /* Update the NOR controller state */
+    hnor->State = HAL_NOR_STATE_READY;
-    hnor->State = HAL_NOR_STATE_PROTECTED;
+    /* Process unlocked */
-    /* Process unlocked */
+    __HAL_UNLOCK(hnor);
-    __HAL_UNLOCK(hnor);
+  }
-  }
+  else
-  else
+  {
-  {
+    return HAL_ERROR;
-    return HAL_ERROR;
+  }
-  }
+  return HAL_OK;
-  return HAL_OK;
+}
-}
+/**
-/**
+  * @brief  Disables dynamically NOR write operation.
-  * @}
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
-  */
+  *                the configuration information for NOR module.
+  * @retval HAL status
-/** @defgroup NOR_Exported_Functions_Group4 NOR State functions
+  */
-  *  @brief   Peripheral State functions
+HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor)
-  *
+{
-@verbatim
+  /* Check the NOR controller state */
-  ==============================================================================
+  if (hnor->State == HAL_NOR_STATE_READY)
-                      ##### NOR State functions #####
+  {
-  ==============================================================================
+    /* Process Locked */
-  [..]
+    __HAL_LOCK(hnor);
-    This subsection permits to get in run-time the status of the NOR controller
-    and the data flow.
+    /* Update the NOR controller state */
+    hnor->State = HAL_NOR_STATE_BUSY;
-@endverbatim
-  * @{
+    /* Disable write operation */
-  */
+    (void)FSMC_NORSRAM_WriteOperation_Disable(hnor->Instance, hnor->Init.NSBank);
-/**
+    /* Update the NOR controller state */
-  * @brief  return the NOR controller state
+    hnor->State = HAL_NOR_STATE_PROTECTED;
-  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
-  *                the configuration information for NOR module.
+    /* Process unlocked */
-  * @retval NOR controller state
+    __HAL_UNLOCK(hnor);
-  */
+  }
-HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor)
+  else
-{
+  {
-  return hnor->State;
+    return HAL_ERROR;
-}
+  }
-/**
+  return HAL_OK;
-  * @brief  Returns the NOR operation status.
+}
-  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
-  *                the configuration information for NOR module.
+/**
-  * @param  Address Device address
+  * @}
-  * @param  Timeout NOR programming Timeout
+  */
-  * @retval NOR_Status The returned value can be: HAL_NOR_STATUS_SUCCESS, HAL_NOR_STATUS_ERROR
-  *         or HAL_NOR_STATUS_TIMEOUT
+/** @defgroup NOR_Exported_Functions_Group4 NOR State functions
-  */
+  *  @brief   Peripheral State functions
-HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout)
+  *
-{
+@verbatim
-  HAL_NOR_StatusTypeDef status = HAL_NOR_STATUS_ONGOING;
+  ==============================================================================
-  uint16_t tmpsr1;
+                      ##### NOR State functions #####
-  uint16_t tmpsr2;
+  ==============================================================================
-  uint32_t tickstart;
+  [..]
+    This subsection permits to get in run-time the status of the NOR controller
-  /* Poll on NOR memory Ready/Busy signal ------------------------------------*/
+    and the data flow.
-  HAL_NOR_MspWait(hnor, Timeout);
+@endverbatim
-  /* Get the NOR memory operation status -------------------------------------*/
+  * @{
+  */
-  /* Get tick */
-  tickstart = HAL_GetTick();
+/**
+  * @brief  return the NOR controller state
-  if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
-  {
+  *                the configuration information for NOR module.
-    while ((status != HAL_NOR_STATUS_SUCCESS) && (status != HAL_NOR_STATUS_TIMEOUT))
+  * @retval NOR controller state
-    {
+  */
-      /* Check for the Timeout */
+HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor)
-      if (Timeout != HAL_MAX_DELAY)
+{
-      {
+  return hnor->State;
-        if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
+}
-        {
-          status = HAL_NOR_STATUS_TIMEOUT;
+/**
-        }
+  * @brief  Returns the NOR operation status.
-      }
+  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains
+  *                the configuration information for NOR module.
-      /* Read NOR status register (DQ6 and DQ5) */
+  * @param  Address Device address
-      tmpsr1 = *(__IO uint16_t *)Address;
+  * @param  Timeout NOR programming Timeout
-      tmpsr2 = *(__IO uint16_t *)Address;
+  * @retval NOR_Status The returned value can be: HAL_NOR_STATUS_SUCCESS, HAL_NOR_STATUS_ERROR
+  *         or HAL_NOR_STATUS_TIMEOUT
-      /* If DQ6 did not toggle between the two reads then return HAL_NOR_STATUS_SUCCESS  */
+  */
-      if ((tmpsr1 & NOR_MASK_STATUS_DQ6) == (tmpsr2 & NOR_MASK_STATUS_DQ6))
+HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout)
-      {
+{
-        return HAL_NOR_STATUS_SUCCESS ;
+  HAL_NOR_StatusTypeDef status = HAL_NOR_STATUS_ONGOING;
-      }
+  uint16_t tmpsr1;
+  uint16_t tmpsr2;
-      if ((tmpsr1 & NOR_MASK_STATUS_DQ5) == NOR_MASK_STATUS_DQ5)
+  uint32_t tickstart;
-      {
-        status = HAL_NOR_STATUS_ONGOING;
+  /* Poll on NOR memory Ready/Busy signal ------------------------------------*/
-      }
+  HAL_NOR_MspWait(hnor, Timeout);
-      tmpsr1 = *(__IO uint16_t *)Address;
+  /* Get the NOR memory operation status -------------------------------------*/
-      tmpsr2 = *(__IO uint16_t *)Address;
+  /* Get tick */
-      /* If DQ6 did not toggle between the two reads then return HAL_NOR_STATUS_SUCCESS  */
+  tickstart = HAL_GetTick();
-      if ((tmpsr1 & NOR_MASK_STATUS_DQ6) == (tmpsr2 & NOR_MASK_STATUS_DQ6))
-      {
+  if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)
-        return HAL_NOR_STATUS_SUCCESS;
+  {
-      }
+    while ((status != HAL_NOR_STATUS_SUCCESS) && (status != HAL_NOR_STATUS_TIMEOUT))
-      if ((tmpsr1 & NOR_MASK_STATUS_DQ5) == NOR_MASK_STATUS_DQ5)
+    {
-      {
+      /* Check for the Timeout */
-        return HAL_NOR_STATUS_ERROR;
+      if (Timeout != HAL_MAX_DELAY)
-      }
+      {
-    }
+        if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
-  }
+        {
-  else if (hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET)
+          status = HAL_NOR_STATUS_TIMEOUT;
-  {
+        }
-    do
+      }
-    {
-      NOR_WRITE(Address, NOR_CMD_READ_STATUS_REG);
+      /* Read NOR status register (DQ6 and DQ5) */
-      tmpsr2 = *(__IO uint16_t *)(Address);
+      tmpsr1 = *(__IO uint16_t *)Address;
+      tmpsr2 = *(__IO uint16_t *)Address;
-      /* Check for the Timeout */
-      if (Timeout != HAL_MAX_DELAY)
+      /* If DQ6 did not toggle between the two reads then return HAL_NOR_STATUS_SUCCESS  */
-      {
+      if ((tmpsr1 & NOR_MASK_STATUS_DQ6) == (tmpsr2 & NOR_MASK_STATUS_DQ6))
-        if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
+      {
-        {
+        return HAL_NOR_STATUS_SUCCESS ;
-          return HAL_NOR_STATUS_TIMEOUT;
+      }
-        }
-      }
+      if ((tmpsr1 & NOR_MASK_STATUS_DQ5) == NOR_MASK_STATUS_DQ5)
-    } while ((tmpsr2 & NOR_MASK_STATUS_DQ7) == 0U);
+      {
+        status = HAL_NOR_STATUS_ONGOING;
-    NOR_WRITE(Address, NOR_CMD_READ_STATUS_REG);
+      }
-    tmpsr1 = *(__IO uint16_t *)(Address);
-    if ((tmpsr1  & (NOR_MASK_STATUS_DQ5 | NOR_MASK_STATUS_DQ4)) != 0U)
+      tmpsr1 = *(__IO uint16_t *)Address;
-    {
+      tmpsr2 = *(__IO uint16_t *)Address;
-      /* Clear the Status Register  */
-      NOR_WRITE(Address, NOR_CMD_READ_STATUS_REG);
+      /* If DQ6 did not toggle between the two reads then return HAL_NOR_STATUS_SUCCESS  */
-      status = HAL_NOR_STATUS_ERROR;
+      if ((tmpsr1 & NOR_MASK_STATUS_DQ6) == (tmpsr2 & NOR_MASK_STATUS_DQ6))
-    }
+      {
-    else
+        return HAL_NOR_STATUS_SUCCESS;
-    {
+      }
-      status = HAL_NOR_STATUS_SUCCESS;
+      if ((tmpsr1 & NOR_MASK_STATUS_DQ5) == NOR_MASK_STATUS_DQ5)
-    }
+      {
-  }
+        return HAL_NOR_STATUS_ERROR;
-  else
+      }
-  {
+    }
-    /* Primary command set not supported by the driver */
+  }
-    status = HAL_NOR_STATUS_ERROR;
+  else if (hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET)
-  }
+  {
+    do
-  /* Return the operation status */
+    {
-  return status;
+      NOR_WRITE(Address, NOR_CMD_READ_STATUS_REG);
-}
+      tmpsr2 = *(__IO uint16_t *)(Address);
-/**
+      /* Check for the Timeout */
-  * @}
+      if (Timeout != HAL_MAX_DELAY)
-  */
+      {
+        if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
-/**
+        {
-  * @}
+          return HAL_NOR_STATUS_TIMEOUT;
-  */
+        }
+      }
-/**
+    } while ((tmpsr2 & NOR_MASK_STATUS_DQ7) == 0U);
-  * @}
-  */
+    NOR_WRITE(Address, NOR_CMD_READ_STATUS_REG);
+    tmpsr1 = *(__IO uint16_t *)(Address);
-#endif /* HAL_NOR_MODULE_ENABLED */
+    if ((tmpsr1  & (NOR_MASK_STATUS_DQ5 | NOR_MASK_STATUS_DQ4)) != 0U)
+    {
-/**
+      /* Clear the Status Register  */
-  * @}
+      NOR_WRITE(Address, NOR_CMD_READ_STATUS_REG);
-  */
+      status = HAL_NOR_STATUS_ERROR;
+    }
-#endif /* FSMC_BANK1 */
+    else
+    {
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+      status = HAL_NOR_STATUS_SUCCESS;
+    }
+  }
+  else
+  {
+    /* Primary command set not supported by the driver */
+    status = HAL_NOR_STATUS_ERROR;
+  }
+  /* Return the operation status */
+  return status;
+}
+/**
+  * @}
+  */
+/**
+  * @}
+  */
+/**
+  * @}
+  */
+#endif /* HAL_NOR_MODULE_ENABLED */
+/**
+  * @}
+  */
+#endif /* FSMC_BANK1 */

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(root)/branches/Dashboard_L152_v2/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_nor.c – Rev 61 → 77