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Rev 56 | Rev 61 | ||
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Line 167... | Line 167... | ||
167 | not defined, the callback registration feature is not available |
167 | not defined, the callback registration feature is not available |
168 | and weak (surcharged) callbacks are used. |
168 | and weak (surcharged) callbacks are used. |
169 | 169 | ||
170 | @endverbatim |
170 | @endverbatim |
171 | [..] |
171 | [..] |
172 | (@) Additionnal remark: If the parity is enabled, then the MSB bit of the data written |
172 | (@) Additional remark: If the parity is enabled, then the MSB bit of the data written |
173 | in the data register is transmitted but is changed by the parity bit. |
173 | in the data register is transmitted but is changed by the parity bit. |
174 | Depending on the frame length defined by the M bit (8-bits or 9-bits), |
174 | Depending on the frame length defined by the M bit (8-bits or 9-bits), |
175 | the possible IRDA frame formats are as listed in the following table: |
175 | the possible IRDA frame formats are as listed in the following table: |
176 | +-------------------------------------------------------------+ |
176 | +-------------------------------------------------------------+ |
177 | | M bit | PCE bit | IRDA frame | |
177 | | M bit | PCE bit | IRDA frame | |
Line 784... | Line 784... | ||
784 | __HAL_LOCK(hirda); |
784 | __HAL_LOCK(hirda); |
785 | 785 | ||
786 | hirda->ErrorCode = HAL_IRDA_ERROR_NONE; |
786 | hirda->ErrorCode = HAL_IRDA_ERROR_NONE; |
787 | hirda->gState = HAL_IRDA_STATE_BUSY_TX; |
787 | hirda->gState = HAL_IRDA_STATE_BUSY_TX; |
788 | 788 | ||
789 | /* Init tickstart for timeout managment*/ |
789 | /* Init tickstart for timeout management*/ |
790 | tickstart = HAL_GetTick(); |
790 | tickstart = HAL_GetTick(); |
791 | 791 | ||
792 | hirda->TxXferSize = Size; |
792 | hirda->TxXferSize = Size; |
793 | hirda->TxXferCount = Size; |
793 | hirda->TxXferCount = Size; |
794 | while (hirda->TxXferCount > 0U) |
794 | while (hirda->TxXferCount > 0U) |
Line 869... | Line 869... | ||
869 | __HAL_LOCK(hirda); |
869 | __HAL_LOCK(hirda); |
870 | 870 | ||
871 | hirda->ErrorCode = HAL_IRDA_ERROR_NONE; |
871 | hirda->ErrorCode = HAL_IRDA_ERROR_NONE; |
872 | hirda->RxState = HAL_IRDA_STATE_BUSY_RX; |
872 | hirda->RxState = HAL_IRDA_STATE_BUSY_RX; |
873 | 873 | ||
874 | /* Init tickstart for timeout managment*/ |
874 | /* Init tickstart for timeout management*/ |
875 | tickstart = HAL_GetTick(); |
875 | tickstart = HAL_GetTick(); |
876 | 876 | ||
877 | hirda->RxXferSize = Size; |
877 | hirda->RxXferSize = Size; |
878 | hirda->RxXferCount = Size; |
878 | hirda->RxXferCount = Size; |
879 | 879 | ||
Line 1221... | Line 1221... | ||
1221 | if (hirda->RxState == HAL_IRDA_STATE_BUSY_RX) |
1221 | if (hirda->RxState == HAL_IRDA_STATE_BUSY_RX) |
1222 | { |
1222 | { |
1223 | /* Clear the Overrun flag before resuming the Rx transfer */ |
1223 | /* Clear the Overrun flag before resuming the Rx transfer */ |
1224 | __HAL_IRDA_CLEAR_OREFLAG(hirda); |
1224 | __HAL_IRDA_CLEAR_OREFLAG(hirda); |
1225 | 1225 | ||
1226 | /* Reenable PE and ERR (Frame error, noise error, overrun error) interrupts */ |
1226 | /* Re-enable PE and ERR (Frame error, noise error, overrun error) interrupts */ |
1227 | SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE); |
1227 | SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE); |
1228 | SET_BIT(hirda->Instance->CR3, USART_CR3_EIE); |
1228 | SET_BIT(hirda->Instance->CR3, USART_CR3_EIE); |
1229 | 1229 | ||
1230 | /* Enable the IRDA DMA Rx request */ |
1230 | /* Enable the IRDA DMA Rx request */ |
1231 | SET_BIT(hirda->Instance->CR3, USART_CR3_DMAR); |
1231 | SET_BIT(hirda->Instance->CR3, USART_CR3_DMAR); |