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Line 167... Line 167...
167
      not defined, the callback registration feature is not available
167
      not defined, the callback registration feature is not available
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      and weak (surcharged) callbacks are used.
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      and weak (surcharged) callbacks are used.
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169
 
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  @endverbatim
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  @endverbatim
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     [..]
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     [..]
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       (@) Additionnal remark: If the parity is enabled, then the MSB bit of the data written
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       (@) Additional remark: If the parity is enabled, then the MSB bit of the data written
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           in the data register is transmitted but is changed by the parity bit.
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           in the data register is transmitted but is changed by the parity bit.
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           Depending on the frame length defined by the M bit (8-bits or 9-bits),
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           Depending on the frame length defined by the M bit (8-bits or 9-bits),
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           the possible IRDA frame formats are as listed in the following table:
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           the possible IRDA frame formats are as listed in the following table:
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    +-------------------------------------------------------------+
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    +-------------------------------------------------------------+
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    |   M bit |  PCE bit  |            IRDA frame                 |
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    |   M bit |  PCE bit  |            IRDA frame                 |
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784
    __HAL_LOCK(hirda);
784
    __HAL_LOCK(hirda);
785
 
785
 
786
    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
786
    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
787
    hirda->gState = HAL_IRDA_STATE_BUSY_TX;
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    hirda->gState = HAL_IRDA_STATE_BUSY_TX;
788
 
788
 
789
    /* Init tickstart for timeout managment*/
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    /* Init tickstart for timeout management*/
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    tickstart = HAL_GetTick();
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    tickstart = HAL_GetTick();
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791
 
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    hirda->TxXferSize = Size;
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    hirda->TxXferSize = Size;
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    hirda->TxXferCount = Size;
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    hirda->TxXferCount = Size;
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    while (hirda->TxXferCount > 0U)
794
    while (hirda->TxXferCount > 0U)
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    __HAL_LOCK(hirda);
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    __HAL_LOCK(hirda);
870
 
870
 
871
    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
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    hirda->ErrorCode = HAL_IRDA_ERROR_NONE;
872
    hirda->RxState = HAL_IRDA_STATE_BUSY_RX;
872
    hirda->RxState = HAL_IRDA_STATE_BUSY_RX;
873
 
873
 
874
    /* Init tickstart for timeout managment*/
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    /* Init tickstart for timeout management*/
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    tickstart = HAL_GetTick();
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    tickstart = HAL_GetTick();
876
 
876
 
877
    hirda->RxXferSize = Size;
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    hirda->RxXferSize = Size;
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    hirda->RxXferCount = Size;
878
    hirda->RxXferCount = Size;
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879
 
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  if (hirda->RxState == HAL_IRDA_STATE_BUSY_RX)
1221
  if (hirda->RxState == HAL_IRDA_STATE_BUSY_RX)
1222
  {
1222
  {
1223
    /* Clear the Overrun flag before resuming the Rx transfer */
1223
    /* Clear the Overrun flag before resuming the Rx transfer */
1224
    __HAL_IRDA_CLEAR_OREFLAG(hirda);
1224
    __HAL_IRDA_CLEAR_OREFLAG(hirda);
1225
 
1225
 
1226
    /* Reenable PE and ERR (Frame error, noise error, overrun error) interrupts */
1226
    /* Re-enable PE and ERR (Frame error, noise error, overrun error) interrupts */
1227
    SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
1227
    SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE);
1228
    SET_BIT(hirda->Instance->CR3, USART_CR3_EIE);
1228
    SET_BIT(hirda->Instance->CR3, USART_CR3_EIE);
1229
 
1229
 
1230
    /* Enable the IRDA DMA Rx request */
1230
    /* Enable the IRDA DMA Rx request */
1231
    SET_BIT(hirda->Instance->CR3, USART_CR3_DMAR);
1231
    SET_BIT(hirda->Instance->CR3, USART_CR3_DMAR);