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Line 88... Line 88...
88
      (@) These interfaces allow to manage a sequential transfer with a repeated start condition
88
      (@) These interfaces allow to manage a sequential transfer with a repeated start condition
89
          when a direction change during transfer
89
          when a direction change during transfer
90
    [..]
90
    [..]
91
      (+) A specific option field manage the different steps of a sequential transfer
91
      (+) A specific option field manage the different steps of a sequential transfer
92
      (+) Option field values are defined through @ref I2C_XferOptions_definition and are listed below:
92
      (+) Option field values are defined through @ref I2C_XferOptions_definition and are listed below:
93
      (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfaces in no sequential mode
93
      (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functional is same as associated interfaces in no sequential mode
94
      (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address
94
      (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address
95
                            and data to transfer without a final stop condition
95
                            and data to transfer without a final stop condition
96
      (++) I2C_FIRST_AND_NEXT_FRAME: Sequential usage (Master only), this option allow to manage a sequence with start condition, address
96
      (++) I2C_FIRST_AND_NEXT_FRAME: Sequential usage (Master only), this option allow to manage a sequence with start condition, address
97
                            and data to transfer without a final stop condition, an then permit a call the same master sequential interface
97
                            and data to transfer without a final stop condition, an then permit a call the same master sequential interface
98
                            several times (like @ref HAL_I2C_Master_Seq_Transmit_IT() then @ref HAL_I2C_Master_Seq_Transmit_IT()
98
                            several times (like @ref HAL_I2C_Master_Seq_Transmit_IT() then @ref HAL_I2C_Master_Seq_Transmit_IT()
Line 107... Line 107...
107
                            interface several times (link with option I2C_FIRST_AND_NEXT_FRAME).
107
                            interface several times (link with option I2C_FIRST_AND_NEXT_FRAME).
108
                            Usage can, transfer several bytes one by one using HAL_I2C_Master_Seq_Transmit_IT(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME)
108
                            Usage can, transfer several bytes one by one using HAL_I2C_Master_Seq_Transmit_IT(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME)
109
                              or HAL_I2C_Master_Seq_Receive_IT(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME)
109
                              or HAL_I2C_Master_Seq_Receive_IT(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME)
110
                              or HAL_I2C_Master_Seq_Transmit_DMA(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME)
110
                              or HAL_I2C_Master_Seq_Transmit_DMA(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME)
111
                              or HAL_I2C_Master_Seq_Receive_DMA(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME).
111
                              or HAL_I2C_Master_Seq_Receive_DMA(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME).
112
                            Then usage of this option I2C_LAST_FRAME_NO_STOP at the last Transmit or Receive sequence permit to call the oposite interface Receive or Transmit
112
                            Then usage of this option I2C_LAST_FRAME_NO_STOP at the last Transmit or Receive sequence permit to call the opposite interface Receive or Transmit
113
                              without stopping the communication and so generate a restart condition.
113
                              without stopping the communication and so generate a restart condition.
114
      (++) I2C_OTHER_FRAME: Sequential usage (Master only), this option allow to manage a restart condition after each call of the same master sequential
114
      (++) I2C_OTHER_FRAME: Sequential usage (Master only), this option allow to manage a restart condition after each call of the same master sequential
115
                            interface.
115
                            interface.
116
                            Usage can, transfer several bytes one by one with a restart with slave address between each bytes using HAL_I2C_Master_Seq_Transmit_IT(option I2C_FIRST_FRAME then I2C_OTHER_FRAME)
116
                            Usage can, transfer several bytes one by one with a restart with slave address between each bytes using HAL_I2C_Master_Seq_Transmit_IT(option I2C_FIRST_FRAME then I2C_OTHER_FRAME)
117
                              or HAL_I2C_Master_Seq_Receive_IT(option I2C_FIRST_FRAME then I2C_OTHER_FRAME)
117
                              or HAL_I2C_Master_Seq_Receive_IT(option I2C_FIRST_FRAME then I2C_OTHER_FRAME)
118
                              or HAL_I2C_Master_Seq_Transmit_DMA(option I2C_FIRST_FRAME then I2C_OTHER_FRAME)
118
                              or HAL_I2C_Master_Seq_Transmit_DMA(option I2C_FIRST_FRAME then I2C_OTHER_FRAME)
119
                              or HAL_I2C_Master_Seq_Receive_DMA(option I2C_FIRST_FRAME then I2C_OTHER_FRAME).
119
                              or HAL_I2C_Master_Seq_Receive_DMA(option I2C_FIRST_FRAME then I2C_OTHER_FRAME).
120
                            Then usage of this option I2C_OTHER_AND_LAST_FRAME at the last frame to help automatic generation of STOP condition.
120
                            Then usage of this option I2C_OTHER_AND_LAST_FRAME at the last frame to help automatic generation of STOP condition.
121
 
121
 
122
      (+) Differents sequential I2C interfaces are listed below:
122
      (+) Different sequential I2C interfaces are listed below:
123
      (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Seq_Transmit_IT()
123
      (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Seq_Transmit_IT()
124
            or using @ref HAL_I2C_Master_Seq_Transmit_DMA()
124
            or using @ref HAL_I2C_Master_Seq_Transmit_DMA()
125
      (+++) At transmission end of current frame transfer, @ref HAL_I2C_MasterTxCpltCallback() is executed and user can
125
      (+++) At transmission end of current frame transfer, @ref HAL_I2C_MasterTxCpltCallback() is executed and user can
126
           add his own code by customization of function pointer @ref HAL_I2C_MasterTxCpltCallback()
126
           add his own code by customization of function pointer @ref HAL_I2C_MasterTxCpltCallback()
127
      (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Seq_Receive_IT()
127
      (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Seq_Receive_IT()
Line 1693... Line 1693...
1693
    hi2c->XferCount   = Size;
1693
    hi2c->XferCount   = Size;
1694
    hi2c->XferSize    = hi2c->XferCount;
1694
    hi2c->XferSize    = hi2c->XferCount;
1695
    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
1695
    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
1696
    hi2c->Devaddress  = DevAddress;
1696
    hi2c->Devaddress  = DevAddress;
1697
 
1697
 
1698
    /* Generate Start */
-
 
1699
    SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
-
 
1700
 
-
 
1701
    /* Process Unlocked */
1698
    /* Process Unlocked */
1702
    __HAL_UNLOCK(hi2c);
1699
    __HAL_UNLOCK(hi2c);
1703
 
1700
 
1704
    /* Note : The I2C interrupts must be enabled after unlocking current process
1701
    /* Note : The I2C interrupts must be enabled after unlocking current process
1705
              to avoid the risk of I2C interrupt handle execution before current
1702
              to avoid the risk of I2C interrupt handle execution before current
1706
              process unlock */
1703
              process unlock */
1707
    /* Enable EVT, BUF and ERR interrupt */
1704
    /* Enable EVT, BUF and ERR interrupt */
1708
    __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1705
    __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1709
 
1706
 
-
 
1707
    /* Generate Start */
-
 
1708
    SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
-
 
1709
 
1710
    return HAL_OK;
1710
    return HAL_OK;
1711
  }
1711
  }
1712
  else
1712
  else
1713
  {
1713
  {
1714
    return HAL_BUSY;
1714
    return HAL_BUSY;
Line 1773... Line 1773...
1773
    hi2c->XferCount   = Size;
1773
    hi2c->XferCount   = Size;
1774
    hi2c->XferSize    = hi2c->XferCount;
1774
    hi2c->XferSize    = hi2c->XferCount;
1775
    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
1775
    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
1776
    hi2c->Devaddress  = DevAddress;
1776
    hi2c->Devaddress  = DevAddress;
1777
 
1777
 
1778
    /* Enable Acknowledge */
-
 
1779
    SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
 
1780
 
-
 
1781
    /* Generate Start */
-
 
1782
    SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
-
 
1783
 
1778
 
1784
    /* Process Unlocked */
1779
    /* Process Unlocked */
1785
    __HAL_UNLOCK(hi2c);
1780
    __HAL_UNLOCK(hi2c);
1786
 
1781
 
1787
    /* Note : The I2C interrupts must be enabled after unlocking current process
1782
    /* Note : The I2C interrupts must be enabled after unlocking current process
Line 1789... Line 1784...
1789
    process unlock */
1784
    process unlock */
1790
 
1785
 
1791
    /* Enable EVT, BUF and ERR interrupt */
1786
    /* Enable EVT, BUF and ERR interrupt */
1792
    __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1787
    __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1793
 
1788
 
-
 
1789
    /* Enable Acknowledge */
-
 
1790
    SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
 
1791
 
-
 
1792
    /* Generate Start */
-
 
1793
    SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
-
 
1794
 
1794
    return HAL_OK;
1795
    return HAL_OK;
1795
  }
1796
  }
1796
  else
1797
  else
1797
  {
1798
  {
1798
    return HAL_BUSY;
1799
    return HAL_BUSY;
Line 1984... Line 1985...
1984
    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
1985
    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
1985
    hi2c->Devaddress  = DevAddress;
1986
    hi2c->Devaddress  = DevAddress;
1986
 
1987
 
1987
    if (hi2c->XferSize > 0U)
1988
    if (hi2c->XferSize > 0U)
1988
    {
1989
    {
1989
      /* Set the I2C DMA transfer complete callback */
-
 
1990
      hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
1990
      if (hi2c->hdmatx != NULL)
1991
 
1991
      {
1992
      /* Set the DMA error callback */
1992
        /* Set the I2C DMA transfer complete callback */
1993
      hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
1993
        hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
1994
 
1994
 
1995
      /* Set the unused DMA callbacks to NULL */
1995
        /* Set the DMA error callback */
1996
      hi2c->hdmatx->XferHalfCpltCallback = NULL;
-
 
1997
      hi2c->hdmatx->XferAbortCallback = NULL;
1996
        hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
1998
 
1997
 
1999
      /* Enable the DMA channel */
1998
        /* Set the unused DMA callbacks to NULL */
2000
      dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
1999
        hi2c->hdmatx->XferHalfCpltCallback = NULL;
-
 
2000
        hi2c->hdmatx->XferAbortCallback = NULL;
2001
 
2001
 
2002
      if (dmaxferstatus == HAL_OK)
2002
        /* Enable the DMA channel */
-
 
2003
        dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
-
 
2004
      }
-
 
2005
      else
2003
      {
2006
      {
2004
        /* Enable Acknowledge */
2007
        /* Update I2C state */
-
 
2008
        hi2c->State     = HAL_I2C_STATE_READY;
2005
        SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
2009
        hi2c->Mode      = HAL_I2C_MODE_NONE;
2006
 
2010
 
2007
        /* Generate Start */
2011
        /* Update I2C error code */
2008
        SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
2012
        hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
-
 
2013
 
-
 
2014
        /* Process Unlocked */
-
 
2015
        __HAL_UNLOCK(hi2c);
-
 
2016
 
-
 
2017
        return HAL_ERROR;
-
 
2018
      }
2009
 
2019
 
-
 
2020
      if (dmaxferstatus == HAL_OK)
-
 
2021
      {
2010
        /* Process Unlocked */
2022
        /* Process Unlocked */
2011
        __HAL_UNLOCK(hi2c);
2023
        __HAL_UNLOCK(hi2c);
2012
 
2024
 
2013
        /* Note : The I2C interrupts must be enabled after unlocking current process
2025
        /* Note : The I2C interrupts must be enabled after unlocking current process
2014
        to avoid the risk of I2C interrupt handle execution before current
2026
        to avoid the risk of I2C interrupt handle execution before current
Line 2017... Line 2029...
2017
        /* Enable EVT and ERR interrupt */
2029
        /* Enable EVT and ERR interrupt */
2018
        __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
2030
        __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
2019
 
2031
 
2020
        /* Enable DMA Request */
2032
        /* Enable DMA Request */
2021
        SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
2033
        SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
-
 
2034
 
-
 
2035
        /* Enable Acknowledge */
-
 
2036
        SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
 
2037
 
-
 
2038
        /* Generate Start */
-
 
2039
        SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
2022
      }
2040
      }
2023
      else
2041
      else
2024
      {
2042
      {
2025
        /* Update I2C state */
2043
        /* Update I2C state */
2026
        hi2c->State     = HAL_I2C_STATE_READY;
2044
        hi2c->State     = HAL_I2C_STATE_READY;
Line 2123... Line 2141...
2123
    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
2141
    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
2124
    hi2c->Devaddress  = DevAddress;
2142
    hi2c->Devaddress  = DevAddress;
2125
 
2143
 
2126
    if (hi2c->XferSize > 0U)
2144
    if (hi2c->XferSize > 0U)
2127
    {
2145
    {
-
 
2146
      if (hi2c->hdmarx != NULL)
-
 
2147
      {
2128
      /* Set the I2C DMA transfer complete callback */
2148
        /* Set the I2C DMA transfer complete callback */
2129
      hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
2149
        hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
2130
 
2150
 
2131
      /* Set the DMA error callback */
2151
        /* Set the DMA error callback */
2132
      hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
2152
        hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
2133
 
2153
 
2134
      /* Set the unused DMA callbacks to NULL */
2154
        /* Set the unused DMA callbacks to NULL */
2135
      hi2c->hdmarx->XferHalfCpltCallback = NULL;
2155
        hi2c->hdmarx->XferHalfCpltCallback = NULL;
2136
      hi2c->hdmarx->XferAbortCallback = NULL;
2156
        hi2c->hdmarx->XferAbortCallback = NULL;
2137
 
2157
 
2138
      /* Enable the DMA channel */
2158
        /* Enable the DMA channel */
2139
      dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
2159
        dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
-
 
2160
      }
-
 
2161
      else
-
 
2162
      {
-
 
2163
        /* Update I2C state */
-
 
2164
        hi2c->State     = HAL_I2C_STATE_READY;
-
 
2165
        hi2c->Mode      = HAL_I2C_MODE_NONE;
-
 
2166
 
-
 
2167
        /* Update I2C error code */
-
 
2168
        hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
-
 
2169
 
-
 
2170
        /* Process Unlocked */
-
 
2171
        __HAL_UNLOCK(hi2c);
-
 
2172
 
-
 
2173
        return HAL_ERROR;
-
 
2174
      }
2140
 
2175
 
2141
      if (dmaxferstatus == HAL_OK)
2176
      if (dmaxferstatus == HAL_OK)
2142
      {
2177
      {
2143
        /* Enable Acknowledge */
2178
        /* Enable Acknowledge */
2144
        SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
2179
        SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
Line 2174... Line 2209...
2174
        return HAL_ERROR;
2209
        return HAL_ERROR;
2175
      }
2210
      }
2176
    }
2211
    }
2177
    else
2212
    else
2178
    {
2213
    {
2179
      /* Enable Acknowledge */
-
 
2180
      SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
 
2181
 
-
 
2182
      /* Generate Start */
-
 
2183
      SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
-
 
2184
 
-
 
2185
      /* Process Unlocked */
2214
      /* Process Unlocked */
2186
      __HAL_UNLOCK(hi2c);
2215
      __HAL_UNLOCK(hi2c);
2187
 
2216
 
2188
      /* Note : The I2C interrupts must be enabled after unlocking current process
2217
      /* Note : The I2C interrupts must be enabled after unlocking current process
2189
      to avoid the risk of I2C interrupt handle execution before current
2218
      to avoid the risk of I2C interrupt handle execution before current
2190
      process unlock */
2219
      process unlock */
2191
 
2220
 
2192
      /* Enable EVT, BUF and ERR interrupt */
2221
      /* Enable EVT, BUF and ERR interrupt */
2193
      __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2222
      __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
-
 
2223
 
-
 
2224
      /* Enable Acknowledge */
-
 
2225
      SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
-
 
2226
 
-
 
2227
      /* Generate Start */
-
 
2228
      SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
2194
    }
2229
    }
2195
 
2230
 
2196
    return HAL_OK;
2231
    return HAL_OK;
2197
  }
2232
  }
2198
  else
2233
  else
Line 2241... Line 2276...
2241
    hi2c->pBuffPtr    = pData;
2276
    hi2c->pBuffPtr    = pData;
2242
    hi2c->XferCount   = Size;
2277
    hi2c->XferCount   = Size;
2243
    hi2c->XferSize    = hi2c->XferCount;
2278
    hi2c->XferSize    = hi2c->XferCount;
2244
    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
2279
    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
2245
 
2280
 
-
 
2281
    if (hi2c->hdmatx != NULL)
-
 
2282
    {
2246
    /* Set the I2C DMA transfer complete callback */
2283
      /* Set the I2C DMA transfer complete callback */
2247
    hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
2284
      hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
2248
 
2285
 
2249
    /* Set the DMA error callback */
2286
      /* Set the DMA error callback */
2250
    hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
2287
      hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
2251
 
2288
 
2252
    /* Set the unused DMA callbacks to NULL */
2289
      /* Set the unused DMA callbacks to NULL */
2253
    hi2c->hdmatx->XferHalfCpltCallback = NULL;
2290
      hi2c->hdmatx->XferHalfCpltCallback = NULL;
2254
    hi2c->hdmatx->XferAbortCallback = NULL;
2291
      hi2c->hdmatx->XferAbortCallback = NULL;
2255
 
2292
 
2256
    /* Enable the DMA channel */
2293
      /* Enable the DMA channel */
2257
    dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
2294
      dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
-
 
2295
    }
-
 
2296
    else
-
 
2297
    {
-
 
2298
      /* Update I2C state */
-
 
2299
      hi2c->State     = HAL_I2C_STATE_LISTEN;
-
 
2300
      hi2c->Mode      = HAL_I2C_MODE_NONE;
-
 
2301
 
-
 
2302
      /* Update I2C error code */
-
 
2303
      hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
-
 
2304
 
-
 
2305
      /* Process Unlocked */
-
 
2306
      __HAL_UNLOCK(hi2c);
-
 
2307
 
-
 
2308
      return HAL_ERROR;
-
 
2309
    }
2258
 
2310
 
2259
    if (dmaxferstatus == HAL_OK)
2311
    if (dmaxferstatus == HAL_OK)
2260
    {
2312
    {
2261
      /* Enable Address Acknowledge */
2313
      /* Enable Address Acknowledge */
2262
      SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
2314
      SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
Line 2336... Line 2388...
2336
    hi2c->pBuffPtr    = pData;
2388
    hi2c->pBuffPtr    = pData;
2337
    hi2c->XferCount   = Size;
2389
    hi2c->XferCount   = Size;
2338
    hi2c->XferSize    = hi2c->XferCount;
2390
    hi2c->XferSize    = hi2c->XferCount;
2339
    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
2391
    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
2340
 
2392
 
-
 
2393
    if (hi2c->hdmarx != NULL)
-
 
2394
    {
2341
    /* Set the I2C DMA transfer complete callback */
2395
      /* Set the I2C DMA transfer complete callback */
2342
    hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
2396
      hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
-
 
2397
 
-
 
2398
      /* Set the DMA error callback */
-
 
2399
      hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
2343
 
2400
 
2344
    /* Set the DMA error callback */
2401
      /* Set the unused DMA callbacks to NULL */
-
 
2402
      hi2c->hdmarx->XferHalfCpltCallback = NULL;
2345
    hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
2403
      hi2c->hdmarx->XferAbortCallback = NULL;
2346
 
2404
 
2347
    /* Set the unused DMA callbacks to NULL */
2405
      /* Enable the DMA channel */
-
 
2406
      dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
-
 
2407
    }
-
 
2408
    else
-
 
2409
    {
-
 
2410
      /* Update I2C state */
2348
    hi2c->hdmarx->XferHalfCpltCallback = NULL;
2411
      hi2c->State     = HAL_I2C_STATE_LISTEN;
2349
    hi2c->hdmarx->XferAbortCallback = NULL;
2412
      hi2c->Mode      = HAL_I2C_MODE_NONE;
-
 
2413
 
-
 
2414
      /* Update I2C error code */
-
 
2415
      hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
-
 
2416
 
-
 
2417
      /* Process Unlocked */
-
 
2418
      __HAL_UNLOCK(hi2c);
2350
 
2419
 
2351
    /* Enable the DMA channel */
2420
      return HAL_ERROR;
2352
    dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
-
 
-
 
2421
    }
2353
 
2422
 
2354
    if (dmaxferstatus == HAL_OK)
2423
    if (dmaxferstatus == HAL_OK)
2355
    {
2424
    {
2356
      /* Enable Address Acknowledge */
2425
      /* Enable Address Acknowledge */
2357
      SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
2426
      SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
Line 3012... Line 3081...
3012
    hi2c->XferSize    = hi2c->XferCount;
3081
    hi2c->XferSize    = hi2c->XferCount;
3013
    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
3082
    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
3014
 
3083
 
3015
    if (hi2c->XferSize > 0U)
3084
    if (hi2c->XferSize > 0U)
3016
    {
3085
    {
-
 
3086
      if (hi2c->hdmatx != NULL)
-
 
3087
      {
3017
      /* Set the I2C DMA transfer complete callback */
3088
        /* Set the I2C DMA transfer complete callback */
3018
      hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
3089
        hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
3019
 
3090
 
3020
      /* Set the DMA error callback */
3091
        /* Set the DMA error callback */
3021
      hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
3092
        hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
3022
 
3093
 
3023
      /* Set the unused DMA callbacks to NULL */
3094
        /* Set the unused DMA callbacks to NULL */
3024
      hi2c->hdmatx->XferHalfCpltCallback = NULL;
3095
        hi2c->hdmatx->XferHalfCpltCallback = NULL;
3025
      hi2c->hdmatx->XferAbortCallback = NULL;
3096
        hi2c->hdmatx->XferAbortCallback = NULL;
3026
 
3097
 
3027
      /* Enable the DMA channel */
3098
        /* Enable the DMA channel */
3028
      dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
3099
        dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
-
 
3100
      }
-
 
3101
      else
-
 
3102
      {
-
 
3103
        /* Update I2C state */
-
 
3104
        hi2c->State     = HAL_I2C_STATE_READY;
-
 
3105
        hi2c->Mode      = HAL_I2C_MODE_NONE;
-
 
3106
 
-
 
3107
        /* Update I2C error code */
-
 
3108
        hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
-
 
3109
 
-
 
3110
        /* Process Unlocked */
-
 
3111
        __HAL_UNLOCK(hi2c);
-
 
3112
 
-
 
3113
        return HAL_ERROR;
-
 
3114
      }
3029
 
3115
 
3030
      if (dmaxferstatus == HAL_OK)
3116
      if (dmaxferstatus == HAL_OK)
3031
      {
3117
      {
3032
        /* Send Slave Address and Memory Address */
3118
        /* Send Slave Address and Memory Address */
3033
        if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
3119
        if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
Line 3036... Line 3122...
3036
          dmaxferstatus = HAL_DMA_Abort_IT(hi2c->hdmatx);
3122
          dmaxferstatus = HAL_DMA_Abort_IT(hi2c->hdmatx);
3037
 
3123
 
3038
          /* Prevent unused argument(s) compilation and MISRA warning */
3124
          /* Prevent unused argument(s) compilation and MISRA warning */
3039
          UNUSED(dmaxferstatus);
3125
          UNUSED(dmaxferstatus);
3040
 
3126
 
3041
          /* Clear directly Complete callback as no XferAbortCallback is used to finalize Abort treatment */
3127
          /* Set the unused I2C DMA transfer complete callback to NULL */
3042
          if (hi2c->hdmatx != NULL)
-
 
3043
          {
-
 
3044
            hi2c->hdmatx->XferCpltCallback = NULL;
3128
          hi2c->hdmatx->XferCpltCallback = NULL;
3045
          }
-
 
3046
 
3129
 
3047
          /* Disable Acknowledge */
3130
          /* Disable Acknowledge */
3048
          CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
3131
          CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
3049
 
3132
 
3050
          hi2c->XferSize = 0U;
3133
          hi2c->XferSize = 0U;
Line 3176... Line 3259...
3176
    hi2c->XferSize    = hi2c->XferCount;
3259
    hi2c->XferSize    = hi2c->XferCount;
3177
    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
3260
    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
3178
 
3261
 
3179
    if (hi2c->XferSize > 0U)
3262
    if (hi2c->XferSize > 0U)
3180
    {
3263
    {
-
 
3264
      if (hi2c->hdmarx != NULL)
-
 
3265
      {
3181
      /* Set the I2C DMA transfer complete callback */
3266
        /* Set the I2C DMA transfer complete callback */
3182
      hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
3267
        hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
3183
 
3268
 
3184
      /* Set the DMA error callback */
3269
        /* Set the DMA error callback */
3185
      hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
3270
        hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
3186
 
3271
 
3187
      /* Set the unused DMA callbacks to NULL */
3272
        /* Set the unused DMA callbacks to NULL */
3188
      hi2c->hdmarx->XferHalfCpltCallback = NULL;
3273
        hi2c->hdmarx->XferHalfCpltCallback = NULL;
3189
      hi2c->hdmarx->XferAbortCallback = NULL;
3274
        hi2c->hdmarx->XferAbortCallback = NULL;
3190
 
3275
 
3191
      /* Enable the DMA channel */
3276
        /* Enable the DMA channel */
3192
      dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
3277
        dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
-
 
3278
      }
-
 
3279
      else
-
 
3280
      {
-
 
3281
        /* Update I2C state */
-
 
3282
        hi2c->State     = HAL_I2C_STATE_READY;
-
 
3283
        hi2c->Mode      = HAL_I2C_MODE_NONE;
-
 
3284
 
-
 
3285
        /* Update I2C error code */
-
 
3286
        hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
-
 
3287
 
-
 
3288
        /* Process Unlocked */
-
 
3289
        __HAL_UNLOCK(hi2c);
-
 
3290
 
-
 
3291
        return HAL_ERROR;
-
 
3292
      }
3193
 
3293
 
3194
      if (dmaxferstatus == HAL_OK)
3294
      if (dmaxferstatus == HAL_OK)
3195
      {
3295
      {
3196
        /* Send Slave Address and Memory Address */
3296
        /* Send Slave Address and Memory Address */
3197
        if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
3297
        if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
Line 3200... Line 3300...
3200
          dmaxferstatus = HAL_DMA_Abort_IT(hi2c->hdmarx);
3300
          dmaxferstatus = HAL_DMA_Abort_IT(hi2c->hdmarx);
3201
 
3301
 
3202
          /* Prevent unused argument(s) compilation and MISRA warning */
3302
          /* Prevent unused argument(s) compilation and MISRA warning */
3203
          UNUSED(dmaxferstatus);
3303
          UNUSED(dmaxferstatus);
3204
 
3304
 
3205
          /* Clear directly Complete callback as no XferAbortCallback is used to finalize Abort treatment */
3305
          /* Set the unused I2C DMA transfer complete callback to NULL */
3206
          if (hi2c->hdmarx != NULL)
-
 
3207
          {
-
 
3208
            hi2c->hdmarx->XferCpltCallback = NULL;
3306
          hi2c->hdmarx->XferCpltCallback = NULL;
3209
          }
-
 
3210
 
3307
 
3211
          /* Disable Acknowledge */
3308
          /* Disable Acknowledge */
3212
          CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
3309
          CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
3213
 
3310
 
3214
          hi2c->XferSize = 0U;
3311
          hi2c->XferSize = 0U;
Line 3595... Line 3692...
3595
 
3692
 
3596
    Prev_State = hi2c->PreviousState;
3693
    Prev_State = hi2c->PreviousState;
3597
 
3694
 
3598
    if (hi2c->XferSize > 0U)
3695
    if (hi2c->XferSize > 0U)
3599
    {
3696
    {
-
 
3697
      if (hi2c->hdmatx != NULL)
-
 
3698
      {
3600
      /* Set the I2C DMA transfer complete callback */
3699
        /* Set the I2C DMA transfer complete callback */
3601
      hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
3700
        hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
3602
 
3701
 
3603
      /* Set the DMA error callback */
3702
        /* Set the DMA error callback */
3604
      hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
3703
        hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
3605
 
3704
 
3606
      /* Set the unused DMA callbacks to NULL */
3705
        /* Set the unused DMA callbacks to NULL */
3607
      hi2c->hdmatx->XferHalfCpltCallback = NULL;
3706
        hi2c->hdmatx->XferHalfCpltCallback = NULL;
3608
      hi2c->hdmatx->XferAbortCallback = NULL;
3707
        hi2c->hdmatx->XferAbortCallback = NULL;
3609
 
3708
 
3610
      /* Enable the DMA channel */
3709
        /* Enable the DMA channel */
3611
      dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
3710
        dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
-
 
3711
      }
-
 
3712
      else
-
 
3713
      {
-
 
3714
        /* Update I2C state */
-
 
3715
        hi2c->State     = HAL_I2C_STATE_READY;
-
 
3716
        hi2c->Mode      = HAL_I2C_MODE_NONE;
-
 
3717
 
-
 
3718
        /* Update I2C error code */
-
 
3719
        hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
-
 
3720
 
-
 
3721
        /* Process Unlocked */
-
 
3722
        __HAL_UNLOCK(hi2c);
-
 
3723
 
-
 
3724
        return HAL_ERROR;
-
 
3725
      }
3612
 
3726
 
3613
      if (dmaxferstatus == HAL_OK)
3727
      if (dmaxferstatus == HAL_OK)
3614
      {
3728
      {
3615
        /* Enable Acknowledge */
3729
        /* Enable Acknowledge */
3616
        SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
3730
        SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
Line 3919... Line 4033...
3919
        {
4033
        {
3920
          /* Enable Last DMA bit */
4034
          /* Enable Last DMA bit */
3921
          SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
4035
          SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
3922
        }
4036
        }
3923
      }
4037
      }
-
 
4038
      if (hi2c->hdmarx != NULL)
-
 
4039
      {
-
 
4040
        /* Set the I2C DMA transfer complete callback */
-
 
4041
        hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
3924
 
4042
 
3925
      /* Set the I2C DMA transfer complete callback */
4043
        /* Set the DMA error callback */
3926
      hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
4044
        hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
3927
 
4045
 
3928
      /* Set the DMA error callback */
4046
        /* Set the unused DMA callbacks to NULL */
-
 
4047
        hi2c->hdmarx->XferHalfCpltCallback = NULL;
3929
      hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
4048
        hi2c->hdmarx->XferAbortCallback = NULL;
3930
 
4049
 
3931
      /* Set the unused DMA callbacks to NULL */
4050
        /* Enable the DMA channel */
-
 
4051
        dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
-
 
4052
      }
-
 
4053
      else
-
 
4054
      {
-
 
4055
        /* Update I2C state */
3932
      hi2c->hdmarx->XferHalfCpltCallback = NULL;
4056
        hi2c->State     = HAL_I2C_STATE_READY;
3933
      hi2c->hdmarx->XferAbortCallback = NULL;
4057
        hi2c->Mode      = HAL_I2C_MODE_NONE;
3934
 
4058
 
3935
      /* Enable the DMA channel */
4059
        /* Update I2C error code */
3936
      dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
4060
        hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
-
 
4061
 
-
 
4062
        /* Process Unlocked */
-
 
4063
        __HAL_UNLOCK(hi2c);
3937
 
4064
 
-
 
4065
        return HAL_ERROR;
-
 
4066
      }
3938
      if (dmaxferstatus == HAL_OK)
4067
      if (dmaxferstatus == HAL_OK)
3939
      {
4068
      {
3940
        /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */
4069
        /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */
3941
        /* Mean Previous state is same as current state */
4070
        /* Mean Previous state is same as current state */
3942
        if ((Prev_State != I2C_STATE_MASTER_BUSY_RX) || (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 1))
4071
        if ((Prev_State != I2C_STATE_MASTER_BUSY_RX) || (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 1))
Line 4182... Line 4311...
4182
    hi2c->pBuffPtr    = pData;
4311
    hi2c->pBuffPtr    = pData;
4183
    hi2c->XferCount   = Size;
4312
    hi2c->XferCount   = Size;
4184
    hi2c->XferSize    = hi2c->XferCount;
4313
    hi2c->XferSize    = hi2c->XferCount;
4185
    hi2c->XferOptions = XferOptions;
4314
    hi2c->XferOptions = XferOptions;
4186
 
4315
 
-
 
4316
    if (hi2c->hdmatx != NULL)
-
 
4317
    {
4187
    /* Set the I2C DMA transfer complete callback */
4318
      /* Set the I2C DMA transfer complete callback */
4188
    hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
4319
      hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
4189
 
4320
 
4190
    /* Set the DMA error callback */
4321
      /* Set the DMA error callback */
4191
    hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
4322
      hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
4192
 
4323
 
4193
    /* Set the unused DMA callbacks to NULL */
4324
      /* Set the unused DMA callbacks to NULL */
4194
    hi2c->hdmatx->XferHalfCpltCallback = NULL;
4325
      hi2c->hdmatx->XferHalfCpltCallback = NULL;
4195
    hi2c->hdmatx->XferAbortCallback = NULL;
4326
      hi2c->hdmatx->XferAbortCallback = NULL;
-
 
4327
 
-
 
4328
      /* Enable the DMA channel */
-
 
4329
      dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
-
 
4330
    }
-
 
4331
    else
-
 
4332
    {
-
 
4333
      /* Update I2C state */
-
 
4334
      hi2c->State     = HAL_I2C_STATE_LISTEN;
-
 
4335
      hi2c->Mode      = HAL_I2C_MODE_NONE;
4196
 
4336
 
4197
    /* Enable the DMA channel */
4337
      /* Update I2C error code */
4198
    dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
4338
      hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
-
 
4339
 
-
 
4340
      /* Process Unlocked */
-
 
4341
      __HAL_UNLOCK(hi2c);
-
 
4342
 
-
 
4343
      return HAL_ERROR;
-
 
4344
    }
4199
 
4345
 
4200
    if (dmaxferstatus == HAL_OK)
4346
    if (dmaxferstatus == HAL_OK)
4201
    {
4347
    {
4202
      /* Enable Address Acknowledge */
4348
      /* Enable Address Acknowledge */
4203
      SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
4349
      SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
Line 4405... Line 4551...
4405
    hi2c->pBuffPtr    = pData;
4551
    hi2c->pBuffPtr    = pData;
4406
    hi2c->XferCount   = Size;
4552
    hi2c->XferCount   = Size;
4407
    hi2c->XferSize    = hi2c->XferCount;
4553
    hi2c->XferSize    = hi2c->XferCount;
4408
    hi2c->XferOptions = XferOptions;
4554
    hi2c->XferOptions = XferOptions;
4409
 
4555
 
-
 
4556
    if (hi2c->hdmarx != NULL)
-
 
4557
    {
4410
    /* Set the I2C DMA transfer complete callback */
4558
      /* Set the I2C DMA transfer complete callback */
4411
    hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
4559
      hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
4412
 
4560
 
4413
    /* Set the DMA error callback */
4561
      /* Set the DMA error callback */
4414
    hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
4562
      hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
4415
 
4563
 
4416
    /* Set the unused DMA callbacks to NULL */
4564
      /* Set the unused DMA callbacks to NULL */
4417
    hi2c->hdmarx->XferHalfCpltCallback = NULL;
4565
      hi2c->hdmarx->XferHalfCpltCallback = NULL;
4418
    hi2c->hdmarx->XferAbortCallback = NULL;
4566
      hi2c->hdmarx->XferAbortCallback = NULL;
4419
 
4567
 
4420
    /* Enable the DMA channel */
4568
      /* Enable the DMA channel */
4421
    dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
4569
      dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
-
 
4570
    }
-
 
4571
    else
-
 
4572
    {
-
 
4573
      /* Update I2C state */
-
 
4574
      hi2c->State     = HAL_I2C_STATE_LISTEN;
-
 
4575
      hi2c->Mode      = HAL_I2C_MODE_NONE;
-
 
4576
 
-
 
4577
      /* Update I2C error code */
-
 
4578
      hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
-
 
4579
 
-
 
4580
      /* Process Unlocked */
-
 
4581
      __HAL_UNLOCK(hi2c);
-
 
4582
 
-
 
4583
      return HAL_ERROR;
-
 
4584
    }
4422
 
4585
 
4423
    if (dmaxferstatus == HAL_OK)
4586
    if (dmaxferstatus == HAL_OK)
4424
    {
4587
    {
4425
      /* Enable Address Acknowledge */
4588
      /* Enable Address Acknowledge */
4426
      SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
4589
      SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
Line 4647... Line 4810...
4647
          I2C_MasterTransmit_TXE(hi2c);
4810
          I2C_MasterTransmit_TXE(hi2c);
4648
        }
4811
        }
4649
        /* BTF set -------------------------------------------------------------*/
4812
        /* BTF set -------------------------------------------------------------*/
4650
        else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
4813
        else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
4651
        {
4814
        {
4652
          if (CurrentMode == HAL_I2C_MODE_MASTER)
4815
          if (CurrentState == HAL_I2C_STATE_BUSY_TX)
4653
          {
4816
          {
4654
            I2C_MasterTransmit_BTF(hi2c);
4817
            I2C_MasterTransmit_BTF(hi2c);
4655
          }
4818
          }
4656
          else /* HAL_I2C_MODE_MEM */
4819
          else /* HAL_I2C_MODE_MEM */
4657
          {
4820
          {
-
 
4821
            if (CurrentMode == HAL_I2C_MODE_MEM)
-
 
4822
            {
4658
            I2C_MemoryTransmit_TXE_BTF(hi2c);
4823
              I2C_MemoryTransmit_TXE_BTF(hi2c);
-
 
4824
            }
4659
          }
4825
          }
4660
        }
4826
        }
4661
        else
4827
        else
4662
        {
4828
        {
4663
          /* Do nothing */
4829
          /* Do nothing */
Line 5207... Line 5373...
5207
        /* Generate Stop */
5373
        /* Generate Stop */
5208
        SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
5374
        SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
5209
 
5375
 
5210
        hi2c->PreviousState = I2C_STATE_NONE;
5376
        hi2c->PreviousState = I2C_STATE_NONE;
5211
        hi2c->State = HAL_I2C_STATE_READY;
5377
        hi2c->State = HAL_I2C_STATE_READY;
-
 
5378
        if (hi2c->Mode == HAL_I2C_MODE_MEM)
-
 
5379
        {
5212
        hi2c->Mode = HAL_I2C_MODE_NONE;
5380
          hi2c->Mode = HAL_I2C_MODE_NONE;
-
 
5381
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
-
 
5382
          hi2c->MemTxCpltCallback(hi2c);
-
 
5383
#else
-
 
5384
          HAL_I2C_MemTxCpltCallback(hi2c);
-
 
5385
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
-
 
5386
        }
-
 
5387
        else
-
 
5388
        {
-
 
5389
          hi2c->Mode = HAL_I2C_MODE_NONE;
5213
 
5390
 
5214
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
5391
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
5215
        hi2c->MasterTxCpltCallback(hi2c);
5392
          hi2c->MasterTxCpltCallback(hi2c);
5216
#else
5393
#else
5217
        HAL_I2C_MasterTxCpltCallback(hi2c);
5394
          HAL_I2C_MasterTxCpltCallback(hi2c);
5218
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
5395
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
-
 
5396
        }
5219
      }
5397
      }
5220
    }
5398
    }
5221
  }
5399
  }
5222
  else
5400
  else
5223
  {
5401
  {
Line 5266... Line 5444...
5266
  {
5444
  {
5267
    if (CurrentState == HAL_I2C_STATE_BUSY_RX)
5445
    if (CurrentState == HAL_I2C_STATE_BUSY_RX)
5268
    {
5446
    {
5269
      /* Generate Restart */
5447
      /* Generate Restart */
5270
      hi2c->Instance->CR1 |= I2C_CR1_START;
5448
      hi2c->Instance->CR1 |= I2C_CR1_START;
-
 
5449
 
-
 
5450
      hi2c->EventCount++;
5271
    }
5451
    }
5272
    else if ((hi2c->XferCount > 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
5452
    else if ((hi2c->XferCount > 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
5273
    {
5453
    {
5274
      /* Write data to DR */
5454
      /* Write data to DR */
5275
      hi2c->Instance->DR = *hi2c->pBuffPtr;
5455
      hi2c->Instance->DR = *hi2c->pBuffPtr;
Line 5613... Line 5793...
5613
static void I2C_Master_ADD10(I2C_HandleTypeDef *hi2c)
5793
static void I2C_Master_ADD10(I2C_HandleTypeDef *hi2c)
5614
{
5794
{
5615
  /* Send slave address */
5795
  /* Send slave address */
5616
  hi2c->Instance->DR = I2C_10BIT_ADDRESS(hi2c->Devaddress);
5796
  hi2c->Instance->DR = I2C_10BIT_ADDRESS(hi2c->Devaddress);
5617
 
5797
 
5618
  if ((hi2c->hdmatx != NULL) || (hi2c->hdmarx != NULL))
5798
  if (((hi2c->hdmatx != NULL) && (hi2c->hdmatx->XferCpltCallback != NULL))
-
 
5799
      || ((hi2c->hdmarx != NULL) && (hi2c->hdmarx->XferCpltCallback != NULL)))
5619
  {
5800
  {
5620
    if ((hi2c->hdmatx->XferCpltCallback != NULL) || (hi2c->hdmarx->XferCpltCallback != NULL))
-
 
5621
    {
-
 
5622
      /* Enable DMA Request */
5801
    /* Enable DMA Request */
5623
      SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
5802
    SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
5624
    }
-
 
5625
  }
5803
  }
5626
}
5804
}
5627
 
5805
 
5628
/**
5806
/**
5629
  * @brief  Handle ADDR flag for Master
5807
  * @brief  Handle ADDR flag for Master
Line 5937... Line 6115...
5937
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
6115
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
5938
  }
6116
  }
5939
  else
6117
  else
5940
  {
6118
  {
5941
    /* Clear ADDR flag */
6119
    /* Clear ADDR flag */
5942
    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
6120
    __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
5943
 
6121
 
5944
    /* Process Unlocked */
6122
    /* Process Unlocked */
5945
    __HAL_UNLOCK(hi2c);
6123
    __HAL_UNLOCK(hi2c);
5946
  }
6124
  }
5947
}
6125
}
Line 7275... Line 7453...
7275
  }
7453
  }
7276
  return HAL_OK;
7454
  return HAL_OK;
7277
}
7455
}
7278
 
7456
 
7279
/**
7457
/**
7280
  * @brief  Convert I2Cx OTHER_xxx XferOptions to functionnal XferOptions.
7458
  * @brief  Convert I2Cx OTHER_xxx XferOptions to functional XferOptions.
7281
  * @param  hi2c I2C handle.
7459
  * @param  hi2c I2C handle.
7282
  * @retval None
7460
  * @retval None
7283
  */
7461
  */
7284
static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c)
7462
static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c)
7285
{
7463
{