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1 | /** |
1 | /** |
2 | ****************************************************************************** |
2 | ****************************************************************************** |
3 | * @file stm32l1xx_hal_gpio.c |
3 | * @file stm32l1xx_hal_gpio.c |
4 | * @author MCD Application Team |
4 | * @author MCD Application Team |
5 | * @version V1.2.0 |
- | |
6 | * @date 01-July-2016 |
- | |
7 | * @brief GPIO HAL module driver. |
5 | * @brief GPIO HAL module driver. |
8 | * This file provides firmware functions to manage the following |
6 | * This file provides firmware functions to manage the following |
9 | * functionalities of the General Purpose Input/Output (GPIO) peripheral: |
7 | * functionalities of the General Purpose Input/Output (GPIO) peripheral: |
10 | * + Initialization and de-initialization functions |
8 | * + Initialization and de-initialization functions |
11 | * + IO operation functions |
9 | * + IO operation functions |
12 | * |
10 | * |
13 | @verbatim |
11 | @verbatim |
14 | ============================================================================== |
12 | ============================================================================== |
15 | ##### GPIO Peripheral features ##### |
13 | ##### GPIO Peripheral features ##### |
16 | ============================================================================== |
14 | ============================================================================== |
17 | [..] |
15 | [..] |
18 | Each port bit of the general-purpose I/O (GPIO) ports can be individually |
16 | Each port bit of the general-purpose I/O (GPIO) ports can be individually |
19 | configured by software in several modes: |
17 | configured by software in several modes: |
20 | (+) Input mode |
18 | (+) Input mode |
21 | (+) Analog mode |
19 | (+) Analog mode |
22 | (+) Output mode |
20 | (+) Output mode |
23 | (+) Alternate function mode |
21 | (+) Alternate function mode |
24 | (+) External interrupt/event lines |
22 | (+) External interrupt/event lines |
25 | |
23 | |
26 | [..] |
24 | [..] |
27 | During and just after reset, the alternate functions and external interrupt |
25 | During and just after reset, the alternate functions and external interrupt |
28 | lines are not active and the I/O ports are configured in input floating mode. |
26 | lines are not active and the I/O ports are configured in input floating mode. |
29 | |
27 | |
30 | [..] |
28 | [..] |
31 | All GPIO pins have weak internal pull-up and pull-down resistors, which can be |
29 | All GPIO pins have weak internal pull-up and pull-down resistors, which can be |
32 | activated or not. |
30 | activated or not. |
33 | 31 | ||
34 | [..] |
32 | [..] |
35 | In Output or Alternate mode, each IO can be configured on open-drain or push-pull |
33 | In Output or Alternate mode, each IO can be configured on open-drain or push-pull |
36 | type and the IO speed can be selected depending on the VDD value. |
34 | type and the IO speed can be selected depending on the VDD value. |
- | 35 | ||
- | 36 | [..] |
|
- | 37 | The microcontroller IO pins are connected to onboard peripherals/modules through a |
|
- | 38 | multiplexer that allows only one peripheral s alternate function (AF) connected |
|
- | 39 | to an IO pin at a time. In this way, there can be no conflict between peripherals |
|
- | 40 | sharing the same IO pin. |
|
37 | |
41 | |
38 | [..] |
42 | [..] |
39 | The microcontroller IO pins are connected to onboard peripherals/modules through a |
- | |
40 | multiplexer that allows only one peripheral s alternate function (AF) connected |
- | |
41 | to an IO pin at a time. In this way, there can be no conflict between peripherals |
- | |
42 | sharing the same IO pin. |
- | |
43 | |
- | |
44 | [..] |
- | |
45 | All ports have external interrupt/event capability. To use external interrupt |
43 | All ports have external interrupt/event capability. To use external interrupt |
46 | lines, the port must be configured in input mode. All available GPIO pins are |
44 | lines, the port must be configured in input mode. All available GPIO pins are |
47 | connected to the 16 external interrupt/event lines from EXTI0 to EXTI15. |
45 | connected to the 16 external interrupt/event lines from EXTI0 to EXTI15. |
48 | |
46 | |
49 | [..] |
47 | [..] |
50 | The external interrupt/event controller consists of up to 28 edge detectors |
48 | The external interrupt/event controller consists of up to 28 edge detectors |
51 | (depending on products 16 lines are connected to GPIO) for generating event/interrupt |
49 | (depending on products 16 lines are connected to GPIO) for generating event/interrupt |
52 | requests (each input line can be independently configured to select the type |
50 | requests (each input line can be independently configured to select the type |
53 | (interrupt or event) and the corresponding trigger event (rising or falling or both). |
51 | (interrupt or event) and the corresponding trigger event (rising or falling or both). |
54 | Each line can also be masked independently. |
52 | Each line can also be masked independently. |
55 | |
53 | |
56 | ##### How to use this driver ##### |
54 | ##### How to use this driver ##### |
57 | ============================================================================== |
55 | ============================================================================== |
58 | [..] |
56 | [..] |
59 | (#) Enable the GPIO AHB clock using the following function : __GPIOx_CLK_ENABLE(). |
57 | (#) Enable the GPIO AHB clock using the following function : __GPIOx_CLK_ENABLE(). |
60 | |
- | |
- | 58 | ||
61 | (#) Configure the GPIO pin(s) using HAL_GPIO_Init(). |
59 | (#) Configure the GPIO pin(s) using HAL_GPIO_Init(). |
62 | (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure |
60 | (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure |
63 | (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef |
61 | (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef |
64 | structure. |
62 | structure. |
65 | (++) In case of Output or alternate function mode selection: the speed is |
63 | (++) In case of Output or alternate function mode selection: the speed is |
66 | configured through "Speed" member from GPIO_InitTypeDef structure, |
64 | configured through "Speed" member from GPIO_InitTypeDef structure, |
67 | the speed is configurable: Low, Medium and High. |
65 | the speed is configurable: Low, Medium and High. |
68 | (++) If alternate mode is selected, the alternate function connected to the IO |
66 | (++) If alternate mode is selected, the alternate function connected to the IO |
69 | is configured through "Alternate" member from GPIO_InitTypeDef structure |
67 | is configured through "Alternate" member from GPIO_InitTypeDef structure |
70 | (++) Analog mode is required when a pin is to be used as ADC channel |
68 | (++) Analog mode is required when a pin is to be used as ADC channel |
71 | or DAC output. |
69 | or DAC output. |
72 | (++) In case of external interrupt/event selection the "Mode" member from |
70 | (++) In case of external interrupt/event selection the "Mode" member from |
73 | GPIO_InitTypeDef structure select the type (interrupt or event) and |
71 | GPIO_InitTypeDef structure select the type (interrupt or event) and |
74 | the corresponding trigger event (rising or falling or both). |
72 | the corresponding trigger event (rising or falling or both). |
75 | |
73 | |
76 | (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority |
74 | (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority |
77 | mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using |
75 | mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using |
78 | HAL_NVIC_EnableIRQ(). |
76 | HAL_NVIC_EnableIRQ(). |
79 | |
77 | |
80 | (#) HAL_GPIO_DeInit allows to set register values to their reset value. It's also |
78 | (#) HAL_GPIO_DeInit allows to set register values to their reset value. It's also |
81 | recommended to use it to unconfigure pin which was used as an external interrupt |
79 | recommended to use it to unconfigure pin which was used as an external interrupt |
82 | or in event mode. That's the only way to reset corresponding bit in EXTI & SYSCFG |
80 | or in event mode. That's the only way to reset corresponding bit in EXTI & SYSCFG |
83 | registers. |
81 | registers. |
84 | |
82 | |
85 | (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin(). |
83 | (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin(). |
86 | |
84 | |
87 | (#) To set/reset the level of a pin configured in output mode use |
85 | (#) To set/reset the level of a pin configured in output mode use |
88 | HAL_GPIO_WritePin()/HAL_GPIO_TogglePin(). |
86 | HAL_GPIO_WritePin()/HAL_GPIO_TogglePin(). |
89 | |
87 | |
90 | (#) To lock pin configuration until next reset use HAL_GPIO_LockPin(). |
88 | (#) To lock pin configuration until next reset use HAL_GPIO_LockPin(). |
91 | |
89 | |
92 | (#) During and just after reset, the alternate functions are not |
90 | (#) During and just after reset, the alternate functions are not |
93 | active and the GPIO pins are configured in input floating mode (except JTAG |
91 | active and the GPIO pins are configured in input floating mode (except JTAG |
94 | pins). |
92 | pins). |
95 | |
93 | |
96 | (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose |
94 | (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose |
97 | (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has |
95 | (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has |
98 | priority over the GPIO function. |
96 | priority over the GPIO function. |
99 | |
97 | |
100 | (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as |
98 | (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as |
101 | general purpose PH0 and PH1, respectively, when the HSE oscillator is off. |
99 | general purpose PH0 and PH1, respectively, when the HSE oscillator is off. |
102 | The HSE has priority over the GPIO function. |
100 | The HSE has priority over the GPIO function. |
103 | |
101 | |
104 | @endverbatim |
102 | @endverbatim |
105 | ****************************************************************************** |
103 | ****************************************************************************** |
106 | * @attention |
104 | * @attention |
107 | * |
105 | * |
108 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
106 | * <h2><center>© Copyright (c) 2017 STMicroelectronics. |
109 | * |
- | |
110 | * Redistribution and use in source and binary forms, with or without modification, |
- | |
111 | * are permitted provided that the following conditions are met: |
- | |
112 | * 1. Redistributions of source code must retain the above copyright notice, |
- | |
113 | * this list of conditions and the following disclaimer. |
- | |
114 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
- | |
115 | * this list of conditions and the following disclaimer in the documentation |
- | |
116 | * and/or other materials provided with the distribution. |
- | |
117 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
- | |
118 | * may be used to endorse or promote products derived from this software |
- | |
119 | * without specific prior written permission. |
107 | * All rights reserved.</center></h2> |
120 | * |
108 | * |
121 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
109 | * This software component is licensed by ST under BSD 3-Clause license, |
122 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
- | |
123 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
- | |
124 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
- | |
125 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
- | |
126 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
110 | * the "License"; You may not use this file except in compliance with the |
127 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
111 | * License. You may obtain a copy of the License at: |
128 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
- | |
129 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
- | |
130 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
112 | * opensource.org/licenses/BSD-3-Clause |
131 | * |
113 | * |
132 | ****************************************************************************** |
114 | ****************************************************************************** |
133 | */ |
115 | */ |
134 | 116 | ||
135 | /* Includes ------------------------------------------------------------------*/ |
117 | /* Includes ------------------------------------------------------------------*/ |
136 | #include "stm32l1xx_hal.h" |
118 | #include "stm32l1xx_hal.h" |
137 | 119 | ||
Line 149... | Line 131... | ||
149 | /* Private typedef -----------------------------------------------------------*/ |
131 | /* Private typedef -----------------------------------------------------------*/ |
150 | /* Private define ------------------------------------------------------------*/ |
132 | /* Private define ------------------------------------------------------------*/ |
151 | /** @addtogroup GPIO_Private_Constants |
133 | /** @addtogroup GPIO_Private_Constants |
152 | * @{ |
134 | * @{ |
153 | */ |
135 | */ |
154 | #define GPIO_MODE ((uint32_t)0x00000003) |
136 | #define GPIO_MODE (0x00000003U) |
155 | #define EXTI_MODE ((uint32_t)0x10000000) |
137 | #define EXTI_MODE (0x10000000U) |
156 | #define GPIO_MODE_IT ((uint32_t)0x00010000) |
138 | #define GPIO_MODE_IT (0x00010000U) |
157 | #define GPIO_MODE_EVT ((uint32_t)0x00020000) |
139 | #define GPIO_MODE_EVT (0x00020000U) |
158 | #define RISING_EDGE ((uint32_t)0x00100000) |
140 | #define RISING_EDGE (0x00100000U) |
159 | #define FALLING_EDGE ((uint32_t)0x00200000) |
141 | #define FALLING_EDGE (0x00200000U) |
160 | #define GPIO_OUTPUT_TYPE ((uint32_t)0x00000010) |
142 | #define GPIO_OUTPUT_TYPE (0x00000010U) |
- | 143 | ||
- | 144 | #define GPIO_NUMBER (16U) |
|
161 | 145 | ||
162 | #define GPIO_NUMBER ((uint32_t)16) |
- | |
163 | - | ||
164 | /** |
146 | /** |
165 | * @} |
147 | * @} |
166 | */ |
148 | */ |
167 | 149 | ||
168 | /* Private macro -------------------------------------------------------------*/ |
150 | /* Private macro -------------------------------------------------------------*/ |
169 | /* Private variables ---------------------------------------------------------*/ |
151 | /* Private variables ---------------------------------------------------------*/ |
170 | /* Private function prototypes -----------------------------------------------*/ |
152 | /* Private function prototypes -----------------------------------------------*/ |
171 | /* Exported functions ---------------------------------------------------------*/ |
153 | /* Exported functions ---------------------------------------------------------*/ |
172 | 154 | ||
173 | /** @addtogroup GPIO_Exported_Functions |
155 | /** @addtogroup GPIO_Exported_Functions |
174 | * @{ |
156 | * @{ |
175 | */ |
157 | */ |
176 | 158 | ||
177 | /** @addtogroup GPIO_Exported_Functions_Group1 |
159 | /** @addtogroup GPIO_Exported_Functions_Group1 |
178 | * @brief Initialization and Configuration functions |
160 | * @brief Initialization and Configuration functions |
179 | * |
161 | * |
180 | @verbatim |
162 | @verbatim |
181 | =============================================================================== |
163 | =============================================================================== |
182 | ##### Initialization and Configuration functions ##### |
164 | ##### Initialization and Configuration functions ##### |
183 | =============================================================================== |
165 | =============================================================================== |
184 | |
166 | |
185 | @endverbatim |
167 | @endverbatim |
186 | * @{ |
168 | * @{ |
187 | */ |
169 | */ |
188 | 170 | ||
189 | /** |
171 | /** |
190 | * @brief Initializes the GPIOx peripheral according to the specified parameters in the GPIO_Init. |
172 | * @brief Initializes the GPIOx peripheral according to the specified parameters in the GPIO_Init. |
191 | * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices |
173 | * @param GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices |
192 | * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains |
174 | * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains |
193 | * the configuration information for the specified GPIO peripheral. |
175 | * the configuration information for the specified GPIO peripheral. |
194 | * @retval None |
176 | * @retval None |
195 | */ |
177 | */ |
196 | void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) |
178 | void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) |
197 | { |
179 | { |
198 | uint32_t position = 0x00; |
180 | uint32_t position = 0x00; |
199 | uint32_t iocurrent = 0x00; |
181 | uint32_t iocurrent = 0x00; |
200 | uint32_t temp = 0x00; |
182 | uint32_t temp = 0x00; |
201 | 183 | ||
202 | /* Check the parameters */ |
184 | /* Check the parameters */ |
203 | assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); |
185 | assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); |
204 | assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); |
186 | assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); |
205 | assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); |
187 | assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); |
206 | assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); |
188 | assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); |
207 | 189 | ||
208 | /* Configure the port pins */ |
190 | /* Configure the port pins */ |
209 | while (((GPIO_Init->Pin) >> position) != 0) |
191 | while (((GPIO_Init->Pin) >> position) != 0) |
210 | { |
192 | { |
211 | /* Get current io position */ |
193 | /* Get current io position */ |
212 | iocurrent = (GPIO_Init->Pin) & ((uint32_t)1 << position); |
194 | iocurrent = (GPIO_Init->Pin) & (1U << position); |
213 | 195 | ||
214 | if(iocurrent) |
196 | if (iocurrent) |
215 | { |
197 | { |
216 | /*--------------------- GPIO Mode Configuration ------------------------*/ |
198 | /*--------------------- GPIO Mode Configuration ------------------------*/ |
217 | /* In case of Alternate function mode selection */ |
- | |
218 | if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) |
- | |
219 | { |
- | |
220 | /* Check the Alternate function parameters */ |
- | |
221 | assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); |
- | |
222 | assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); |
- | |
223 | - | ||
224 | /* Configure Alternate function mapped with the current IO */ |
- | |
225 | /* Identify AFRL or AFRH register based on IO position*/ |
- | |
226 | temp = GPIOx->AFR[position >> 3]; |
- | |
227 | CLEAR_BIT(temp, (uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ; |
- | |
228 | SET_BIT(temp, (uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & (uint32_t)0x07) * 4)); |
- | |
229 | GPIOx->AFR[position >> 3] = temp; |
- | |
230 | } |
- | |
231 | - | ||
232 | /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ |
- | |
233 | temp = GPIOx->MODER; |
- | |
234 | CLEAR_BIT(temp, GPIO_MODER_MODER0 << (position * 2)); |
- | |
235 | SET_BIT(temp, (GPIO_Init->Mode & GPIO_MODE) << (position * 2)); |
- | |
236 | GPIOx->MODER = temp; |
- | |
237 | - | ||
238 | /* In case of Output or Alternate function mode selection */ |
199 | /* In case of Output or Alternate function mode selection */ |
239 | if ((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) || |
200 | if ((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) || |
240 | (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) |
201 | (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) |
241 | { |
202 | { |
242 | /* Check the Speed parameter */ |
203 | /* Check the Speed parameter */ |
243 | assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); |
204 | assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); |
244 | /* Configure the IO Speed */ |
205 | /* Configure the IO Speed */ |
245 | temp = GPIOx->OSPEEDR; |
206 | temp = GPIOx->OSPEEDR; |
246 | CLEAR_BIT(temp, GPIO_OSPEEDER_OSPEEDR0 << (position * 2)); |
207 | CLEAR_BIT(temp, GPIO_OSPEEDER_OSPEEDR0 << (position * 2)); |
247 | SET_BIT(temp, GPIO_Init->Speed << (position * 2)); |
208 | SET_BIT(temp, GPIO_Init->Speed << (position * 2)); |
248 | GPIOx->OSPEEDR = temp; |
209 | GPIOx->OSPEEDR = temp; |
249 | 210 | ||
250 | /* Configure the IO Output Type */ |
211 | /* Configure the IO Output Type */ |
Line 258... | Line 219... | ||
258 | temp = GPIOx->PUPDR; |
219 | temp = GPIOx->PUPDR; |
259 | CLEAR_BIT(temp, GPIO_PUPDR_PUPDR0 << (position * 2)); |
220 | CLEAR_BIT(temp, GPIO_PUPDR_PUPDR0 << (position * 2)); |
260 | SET_BIT(temp, (GPIO_Init->Pull) << (position * 2)); |
221 | SET_BIT(temp, (GPIO_Init->Pull) << (position * 2)); |
261 | GPIOx->PUPDR = temp; |
222 | GPIOx->PUPDR = temp; |
262 | 223 | ||
- | 224 | /* In case of Alternate function mode selection */ |
|
- | 225 | if ((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) |
|
- | 226 | { |
|
- | 227 | /* Check the Alternate function parameters */ |
|
- | 228 | assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); |
|
- | 229 | assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); |
|
- | 230 | ||
- | 231 | /* Configure Alternate function mapped with the current IO */ |
|
- | 232 | /* Identify AFRL or AFRH register based on IO position*/ |
|
- | 233 | temp = GPIOx->AFR[position >> 3]; |
|
- | 234 | CLEAR_BIT(temp, 0xFU << ((uint32_t)(position & 0x07U) * 4)); |
|
- | 235 | SET_BIT(temp, (uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4)); |
|
- | 236 | GPIOx->AFR[position >> 3] = temp; |
|
- | 237 | } |
|
- | 238 | ||
- | 239 | /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ |
|
- | 240 | temp = GPIOx->MODER; |
|
- | 241 | CLEAR_BIT(temp, GPIO_MODER_MODER0 << (position * 2)); |
|
- | 242 | SET_BIT(temp, (GPIO_Init->Mode & GPIO_MODE) << (position * 2)); |
|
- | 243 | GPIOx->MODER = temp; |
|
- | 244 | ||
263 | /*--------------------- EXTI Mode Configuration ------------------------*/ |
245 | /*--------------------- EXTI Mode Configuration ------------------------*/ |
264 | /* Configure the External Interrupt or event for the current IO */ |
246 | /* Configure the External Interrupt or event for the current IO */ |
265 | if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) |
247 | if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) |
266 | { |
248 | { |
267 | /* Enable SYSCFG Clock */ |
249 | /* Enable SYSCFG Clock */ |
268 | __HAL_RCC_SYSCFG_CLK_ENABLE(); |
250 | __HAL_RCC_SYSCFG_CLK_ENABLE(); |
269 | 251 | ||
270 | temp = SYSCFG->EXTICR[position >> 2]; |
252 | temp = SYSCFG->EXTICR[position >> 2]; |
271 | CLEAR_BIT(temp, ((uint32_t)0x0F) << (4 * (position & 0x03))); |
253 | CLEAR_BIT(temp, (0x0FU) << (4 * (position & 0x03))); |
272 | SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03))); |
254 | SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03))); |
273 | SYSCFG->EXTICR[position >> 2] = temp; |
255 | SYSCFG->EXTICR[position >> 2] = temp; |
274 | - | ||
- | 256 | ||
275 | /* Clear EXTI line configuration */ |
257 | /* Clear EXTI line configuration */ |
276 | temp = EXTI->IMR; |
258 | temp = EXTI->IMR; |
277 | CLEAR_BIT(temp, (uint32_t)iocurrent); |
259 | CLEAR_BIT(temp, (uint32_t)iocurrent); |
278 | if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) |
260 | if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) |
279 | { |
261 | { |
280 | SET_BIT(temp, iocurrent); |
262 | SET_BIT(temp, iocurrent); |
281 | } |
263 | } |
282 | EXTI->IMR = temp; |
264 | EXTI->IMR = temp; |
283 | 265 | ||
284 | temp = EXTI->EMR; |
266 | temp = EXTI->EMR; |
285 | CLEAR_BIT(temp, (uint32_t)iocurrent); |
267 | CLEAR_BIT(temp, (uint32_t)iocurrent); |
286 | if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) |
268 | if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) |
287 | { |
269 | { |
288 | SET_BIT(temp, iocurrent); |
270 | SET_BIT(temp, iocurrent); |
289 | } |
271 | } |
290 | EXTI->EMR = temp; |
272 | EXTI->EMR = temp; |
291 | 273 | ||
292 | /* Clear Rising Falling edge configuration */ |
274 | /* Clear Rising Falling edge configuration */ |
293 | temp = EXTI->RTSR; |
275 | temp = EXTI->RTSR; |
294 | CLEAR_BIT(temp, (uint32_t)iocurrent); |
276 | CLEAR_BIT(temp, (uint32_t)iocurrent); |
295 | if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) |
277 | if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) |
296 | { |
278 | { |
297 | SET_BIT(temp, iocurrent); |
279 | SET_BIT(temp, iocurrent); |
298 | } |
280 | } |
299 | EXTI->RTSR = temp; |
281 | EXTI->RTSR = temp; |
300 | 282 | ||
301 | temp = EXTI->FTSR; |
283 | temp = EXTI->FTSR; |
302 | CLEAR_BIT(temp, (uint32_t)iocurrent); |
284 | CLEAR_BIT(temp, (uint32_t)iocurrent); |
303 | if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) |
285 | if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) |
304 | { |
286 | { |
305 | SET_BIT(temp, iocurrent); |
287 | SET_BIT(temp, iocurrent); |
306 | } |
288 | } |
307 | EXTI->FTSR = temp; |
289 | EXTI->FTSR = temp; |
308 | } |
290 | } |
309 | } |
291 | } |
310 | 292 | ||
311 | position++; |
293 | position++; |
312 | } |
294 | } |
313 | } |
295 | } |
314 | 296 | ||
315 | /** |
297 | /** |
316 | * @brief De-initializes the GPIOx peripheral registers to their default reset values. |
298 | * @brief De-initializes the GPIOx peripheral registers to their default reset values. |
317 | * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices |
299 | * @param GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices |
318 | * @param GPIO_Pin: specifies the port bit to be written. |
300 | * @param GPIO_Pin specifies the port bit to be written. |
319 | * This parameter can be one of GPIO_PIN_x where x can be (0..15). |
301 | * This parameter can be one of GPIO_PIN_x where x can be (0..15). |
320 | * @retval None |
302 | * @retval None |
321 | */ |
303 | */ |
322 | void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) |
304 | void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) |
323 | { |
305 | { |
Line 331... | Line 313... | ||
331 | 313 | ||
332 | /* Configure the port pins */ |
314 | /* Configure the port pins */ |
333 | while ((GPIO_Pin >> position) != 0) |
315 | while ((GPIO_Pin >> position) != 0) |
334 | { |
316 | { |
335 | /* Get current io position */ |
317 | /* Get current io position */ |
336 | iocurrent = (GPIO_Pin) & ((uint32_t)1 << position); |
318 | iocurrent = (GPIO_Pin) & (1U << position); |
337 | 319 | ||
338 | if (iocurrent) |
320 | if (iocurrent) |
339 | { |
321 | { |
340 | /*------------------------- GPIO Mode Configuration --------------------*/ |
- | |
341 | /* Configure IO Direction in Input Floting Mode */ |
- | |
342 | CLEAR_BIT(GPIOx->MODER, GPIO_MODER_MODER0 << (position * 2)); |
- | |
343 | - | ||
344 | /* Configure the default Alternate Function in current IO */ |
- | |
345 | CLEAR_BIT(GPIOx->AFR[position >> 3], (uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ; |
- | |
346 | - | ||
347 | /* Configure the default value for IO Speed */ |
- | |
348 | CLEAR_BIT(GPIOx->OSPEEDR, GPIO_OSPEEDER_OSPEEDR0 << (position * 2)); |
- | |
349 | - | ||
350 | /* Configure the default value IO Output Type */ |
- | |
351 | CLEAR_BIT(GPIOx->OTYPER, GPIO_OTYPER_OT_0 << position) ; |
- | |
352 | - | ||
353 | /* Deactivate the Pull-up oand Pull-down resistor for the current IO */ |
- | |
354 | CLEAR_BIT(GPIOx->PUPDR, GPIO_PUPDR_PUPDR0 << (position * 2)); |
- | |
355 | - | ||
356 | /*------------------------- EXTI Mode Configuration --------------------*/ |
322 | /*------------------------- EXTI Mode Configuration --------------------*/ |
357 | /* Clear the External Interrupt or Event for the current IO */ |
323 | /* Clear the External Interrupt or Event for the current IO */ |
358 | 324 | ||
359 | tmp = SYSCFG->EXTICR[position >> 2]; |
325 | tmp = SYSCFG->EXTICR[position >> 2]; |
360 | tmp &= (((uint32_t)0x0F) << (4 * (position & 0x03))); |
326 | tmp &= ((0x0FU) << (4 * (position & 0x03))); |
361 | if(tmp == (GPIO_GET_INDEX(GPIOx) << (4 * (position & 0x03)))) |
327 | if (tmp == (GPIO_GET_INDEX(GPIOx) << (4 * (position & 0x03)))) |
362 | { |
328 | { |
363 | tmp = ((uint32_t)0x0F) << (4 * (position & 0x03)); |
- | |
364 | CLEAR_BIT(SYSCFG->EXTICR[position >> 2], tmp); |
- | |
365 | - | ||
366 | /* Clear EXTI line configuration */ |
329 | /* Clear EXTI line configuration */ |
367 | CLEAR_BIT(EXTI->IMR, (uint32_t)iocurrent); |
330 | CLEAR_BIT(EXTI->IMR, (uint32_t)iocurrent); |
368 | CLEAR_BIT(EXTI->EMR, (uint32_t)iocurrent); |
331 | CLEAR_BIT(EXTI->EMR, (uint32_t)iocurrent); |
369 | 332 | ||
370 | /* Clear Rising Falling edge configuration */ |
333 | /* Clear Rising Falling edge configuration */ |
371 | CLEAR_BIT(EXTI->RTSR, (uint32_t)iocurrent); |
334 | CLEAR_BIT(EXTI->RTSR, (uint32_t)iocurrent); |
372 | CLEAR_BIT(EXTI->FTSR, (uint32_t)iocurrent); |
335 | CLEAR_BIT(EXTI->FTSR, (uint32_t)iocurrent); |
- | 336 | ||
- | 337 | tmp = (0x0FU) << (4 * (position & 0x03)); |
|
- | 338 | CLEAR_BIT(SYSCFG->EXTICR[position >> 2], tmp); |
|
373 | } |
339 | } |
- | 340 | ||
- | 341 | /*------------------------- GPIO Mode Configuration --------------------*/ |
|
- | 342 | /* Configure IO Direction in Input Floting Mode */ |
|
- | 343 | CLEAR_BIT(GPIOx->MODER, GPIO_MODER_MODER0 << (position * 2)); |
|
- | 344 | ||
- | 345 | /* Configure the default Alternate Function in current IO */ |
|
- | 346 | CLEAR_BIT(GPIOx->AFR[position >> 3], 0xFU << ((uint32_t)(position & 0x07U) * 4)) ; |
|
- | 347 | /* Deactivate the Pull-up oand Pull-down resistor for the current IO */ |
|
- | 348 | CLEAR_BIT(GPIOx->PUPDR, GPIO_PUPDR_PUPDR0 << (position * 2)); |
|
- | 349 | ||
- | 350 | /* Configure the default value IO Output Type */ |
|
- | 351 | CLEAR_BIT(GPIOx->OTYPER, GPIO_OTYPER_OT_0 << position) ; |
|
- | 352 | ||
- | 353 | /* Configure the default value for IO Speed */ |
|
- | 354 | CLEAR_BIT(GPIOx->OSPEEDR, GPIO_OSPEEDER_OSPEEDR0 << (position * 2)); |
|
374 | } |
355 | } |
375 | 356 | ||
376 | position++; |
357 | position++; |
377 | } |
358 | } |
378 | } |
359 | } |
379 | 360 | ||
380 | /** |
361 | /** |
Line 382... | Line 363... | ||
382 | */ |
363 | */ |
383 | 364 | ||
384 | /** @addtogroup GPIO_Exported_Functions_Group2 |
365 | /** @addtogroup GPIO_Exported_Functions_Group2 |
385 | * @brief GPIO Read, Write, Toggle, Lock and EXTI management functions. |
366 | * @brief GPIO Read, Write, Toggle, Lock and EXTI management functions. |
386 | * |
367 | * |
387 | @verbatim |
368 | @verbatim |
388 | =============================================================================== |
369 | =============================================================================== |
389 | ##### IO operation functions ##### |
370 | ##### IO operation functions ##### |
390 | =============================================================================== |
371 | =============================================================================== |
391 | 372 | ||
392 | @endverbatim |
373 | @endverbatim |
393 | * @{ |
374 | * @{ |
394 | */ |
375 | */ |
395 | 376 | ||
396 | /** |
377 | /** |
397 | * @brief Reads the specified input port pin. |
378 | * @brief Reads the specified input port pin. |
398 | * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices |
379 | * @param GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices |
399 | * @param GPIO_Pin: specifies the port bit to read. |
380 | * @param GPIO_Pin specifies the port bit to read. |
400 | * This parameter can be GPIO_PIN_x where x can be (0..15). |
381 | * This parameter can be GPIO_PIN_x where x can be (0..15). |
401 | * @retval The input port pin value. |
382 | * @retval The input port pin value. |
402 | */ |
383 | */ |
403 | GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) |
384 | GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) |
404 | { |
385 | { |
405 | GPIO_PinState bitstatus; |
386 | GPIO_PinState bitstatus; |
406 | 387 | ||
407 | /* Check the parameters */ |
388 | /* Check the parameters */ |
408 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
389 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
Line 418... | Line 399... | ||
418 | return bitstatus; |
399 | return bitstatus; |
419 | } |
400 | } |
420 | 401 | ||
421 | /** |
402 | /** |
422 | * @brief Sets or clears the selected data port bit. |
403 | * @brief Sets or clears the selected data port bit. |
423 | * @note This function uses GPIOx_BSRR register to allow atomic read/modify |
404 | * @note This function uses GPIOx_BSRR register to allow atomic read/modify |
424 | * accesses. In this way, there is no risk of an IRQ occurring between |
405 | * accesses. In this way, there is no risk of an IRQ occurring between |
425 | * the read and the modify access. |
406 | * the read and the modify access. |
426 | * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices |
407 | * @param GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices |
427 | * @param GPIO_Pin: specifies the port bit to be written. |
408 | * @param GPIO_Pin specifies the port bit to be written. |
428 | * This parameter can be one of GPIO_PIN_x where x can be (0..15). |
409 | * This parameter can be one of GPIO_PIN_x where x can be (0..15). |
429 | * @param PinState: specifies the value to be written to the selected bit. |
410 | * @param PinState specifies the value to be written to the selected bit. |
430 | * This parameter can be one of the GPIO_PinState enum values: |
411 | * This parameter can be one of the GPIO_PinState enum values: |
431 | * @arg GPIO_PIN_RESET: to clear the port pin |
412 | * @arg GPIO_PIN_RESET: to clear the port pin |
432 | * @arg GPIO_PIN_SET: to set the port pin |
413 | * @arg GPIO_PIN_SET: to set the port pin |
433 | * @retval None |
414 | * @retval None |
434 | */ |
415 | */ |
435 | void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) |
416 | void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) |
436 | { |
417 | { |
437 | /* Check the parameters */ |
418 | /* Check the parameters */ |
438 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
419 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
439 | assert_param(IS_GPIO_PIN_ACTION(PinState)); |
420 | assert_param(IS_GPIO_PIN_ACTION(PinState)); |
440 | 421 | ||
Line 445... | Line 426... | ||
445 | else |
426 | else |
446 | { |
427 | { |
447 | GPIOx->BSRR = (uint32_t)GPIO_Pin << 16 ; |
428 | GPIOx->BSRR = (uint32_t)GPIO_Pin << 16 ; |
448 | } |
429 | } |
449 | } |
430 | } |
450 | 431 | ||
451 | /** |
432 | /** |
452 | * @brief Toggles the specified GPIO pin |
433 | * @brief Toggles the specified GPIO pin |
453 | * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices |
434 | * @param GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices |
454 | * @param GPIO_Pin: specifies the pins to be toggled. |
435 | * @param GPIO_Pin specifies the pins to be toggled. |
455 | * @retval None |
436 | * @retval None |
456 | */ |
437 | */ |
457 | void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) |
438 | void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) |
458 | { |
439 | { |
- | 440 | uint32_t odr; |
|
- | 441 | ||
459 | /* Check the parameters */ |
442 | /* Check the parameters */ |
460 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
443 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
461 | 444 | ||
- | 445 | /* get current Ouput Data Register value */ |
|
462 | GPIOx->ODR ^= GPIO_Pin; |
446 | odr = GPIOx->ODR; |
- | 447 | ||
- | 448 | /* Set selected pins that were at low level, and reset ones that were high */ |
|
- | 449 | GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin); |
|
463 | } |
450 | } |
464 | 451 | ||
465 | /** |
452 | /** |
466 | * @brief Locks GPIO Pins configuration registers. |
453 | * @brief Locks GPIO Pins configuration registers. |
467 | * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR, |
454 | * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR, |
Line 472... | Line 459... | ||
472 | * depends from setting of GPIOx_LCKR[i-8] and not from GPIOx_LCKR[i]. |
459 | * depends from setting of GPIOx_LCKR[i-8] and not from GPIOx_LCKR[i]. |
473 | * GPIOx_LCKR[i-8] is locking GPIOx_OTYPER[i] together with GPIOx_OTYPER[i-8]. |
460 | * GPIOx_LCKR[i-8] is locking GPIOx_OTYPER[i] together with GPIOx_OTYPER[i-8]. |
474 | * It is not possible to lock GPIOx_OTYPER[i] with i = 15..8, without locking also |
461 | * It is not possible to lock GPIOx_OTYPER[i] with i = 15..8, without locking also |
475 | * GPIOx_OTYPER[i-8]. |
462 | * GPIOx_OTYPER[i-8]. |
476 | * Workaround: When calling HAL_GPIO_LockPin with GPIO_Pin from GPIO_PIN_8 to GPIO_PIN_15, |
463 | * Workaround: When calling HAL_GPIO_LockPin with GPIO_Pin from GPIO_PIN_8 to GPIO_PIN_15, |
477 | * you must call also HAL_GPIO_LockPin with GPIO_Pin - 8. |
464 | * you must call also HAL_GPIO_LockPin with GPIO_Pin - 8. |
478 | * (When locking a pin from GPIO_PIN_8 to GPIO_PIN_15, you must lock also the corresponding |
465 | * (When locking a pin from GPIO_PIN_8 to GPIO_PIN_15, you must lock also the corresponding |
479 | * GPIO_PIN_0 to GPIO_PIN_7). |
466 | * GPIO_PIN_0 to GPIO_PIN_7). |
480 | * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices |
467 | * @param GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices |
481 | * @param GPIO_Pin: Specifies the port bit to be locked. |
468 | * @param GPIO_Pin Specifies the port bit to be locked. |
482 | * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). |
469 | * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). |
483 | * @retval None |
470 | * @retval None |
484 | */ |
471 | */ |
485 | HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) |
472 | HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) |
486 | { |
473 | { |
487 | __IO uint32_t tmp = GPIO_LCKR_LCKK; |
474 | __IO uint32_t tmp = GPIO_LCKR_LCKK; |
488 | 475 | ||
489 | /* Check the parameters */ |
476 | /* Check the parameters */ |
490 | assert_param(IS_GPIO_LOCK_INSTANCE(GPIOx)); |
477 | assert_param(IS_GPIO_LOCK_INSTANCE(GPIOx)); |
Line 496... | Line 483... | ||
496 | GPIOx->LCKR = tmp; |
483 | GPIOx->LCKR = tmp; |
497 | /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */ |
484 | /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */ |
498 | GPIOx->LCKR = GPIO_Pin; |
485 | GPIOx->LCKR = GPIO_Pin; |
499 | /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ |
486 | /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ |
500 | GPIOx->LCKR = tmp; |
487 | GPIOx->LCKR = tmp; |
501 | /* Read LCKK bit*/ |
488 | /* Read LCKK register. This read is mandatory to complete key lock sequence */ |
502 | tmp = GPIOx->LCKR; |
489 | tmp = GPIOx->LCKR; |
503 | 490 | ||
- | 491 | /* Read again in order to confirm lock is active */ |
|
504 | if((GPIOx->LCKR & GPIO_LCKR_LCKK) != RESET) |
492 | if ((GPIOx->LCKR & GPIO_LCKR_LCKK) != RESET) |
505 | { |
493 | { |
506 | return HAL_OK; |
494 | return HAL_OK; |
507 | } |
495 | } |
508 | else |
496 | else |
509 | { |
497 | { |
Line 511... | Line 499... | ||
511 | } |
499 | } |
512 | } |
500 | } |
513 | 501 | ||
514 | /** |
502 | /** |
515 | * @brief This function handles EXTI interrupt request. |
503 | * @brief This function handles EXTI interrupt request. |
516 | * @param GPIO_Pin: Specifies the port pin connected to corresponding EXTI line. |
504 | * @param GPIO_Pin Specifies the port pin connected to corresponding EXTI line. |
517 | * @retval None |
505 | * @retval None |
518 | */ |
506 | */ |
519 | void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin) |
507 | void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin) |
520 | { |
508 | { |
521 | /* EXTI line interrupt detected */ |
509 | /* EXTI line interrupt detected */ |
522 | if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET) |
510 | if (__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET) |
523 | { |
511 | { |
524 | __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin); |
512 | __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin); |
525 | HAL_GPIO_EXTI_Callback(GPIO_Pin); |
513 | HAL_GPIO_EXTI_Callback(GPIO_Pin); |
526 | } |
514 | } |
527 | } |
515 | } |
528 | 516 | ||
529 | /** |
517 | /** |
530 | * @brief EXTI line detection callbacks. |
518 | * @brief EXTI line detection callbacks. |
531 | * @param GPIO_Pin: Specifies the port pin connected to corresponding EXTI line. |
519 | * @param GPIO_Pin Specifies the port pin connected to corresponding EXTI line. |
532 | * @retval None |
520 | * @retval None |
533 | */ |
521 | */ |
534 | __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) |
522 | __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) |
535 | { |
523 | { |
536 | /* Prevent unused argument(s) compilation warning */ |
524 | /* Prevent unused argument(s) compilation warning */ |
537 | UNUSED(GPIO_Pin); |
525 | UNUSED(GPIO_Pin); |
538 | 526 | ||
539 | /* NOTE : This function Should not be modified, when the callback is needed, |
527 | /* NOTE : This function Should not be modified, when the callback is needed, |
540 | the HAL_GPIO_EXTI_Callback could be implemented in the user file |
528 | the HAL_GPIO_EXTI_Callback could be implemented in the user file |
541 | */ |
529 | */ |
542 | } |
530 | } |
543 | 531 | ||
544 | /** |
532 | /** |
545 | * @} |
533 | * @} |
546 | */ |
534 | */ |