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| 1 | /** |
1 | /** |
| 2 | ****************************************************************************** |
2 | ****************************************************************************** |
| 3 | * @file stm32l1xx_hal_flash_ramfunc.c |
3 | * @file stm32l1xx_hal_flash_ramfunc.c |
| 4 | * @author MCD Application Team |
4 | * @author MCD Application Team |
| 5 | * @brief FLASH RAMFUNC driver. |
5 | * @brief FLASH RAMFUNC driver. |
| 6 | * This file provides a Flash firmware functions which should be |
6 | * This file provides a Flash firmware functions which should be |
| 7 | * executed from internal SRAM |
7 | * executed from internal SRAM |
| 8 | * |
8 | * |
| 9 | * @verbatim |
9 | * @verbatim |
| 10 | 10 | ||
| 11 | *** ARM Compiler *** |
11 | *** ARM Compiler *** |
| 12 | -------------------- |
12 | -------------------- |
| 13 | [..] RAM functions are defined using the toolchain options. |
13 | [..] RAM functions are defined using the toolchain options. |
| 14 | Functions that are be executed in RAM should reside in a separate |
14 | Functions that are be executed in RAM should reside in a separate |
| 15 | source module. Using the 'Options for File' dialog you can simply change |
15 | source module. Using the 'Options for File' dialog you can simply change |
| 16 | the 'Code / Const' area of a module to a memory space in physical RAM. |
16 | the 'Code / Const' area of a module to a memory space in physical RAM. |
| 17 | Available memory areas are declared in the 'Target' tab of the |
17 | Available memory areas are declared in the 'Target' tab of the |
| 18 | Options for Target' dialog. |
18 | Options for Target' dialog. |
| 19 | 19 | ||
| 20 | *** ICCARM Compiler *** |
20 | *** ICCARM Compiler *** |
| 21 | ----------------------- |
21 | ----------------------- |
| 22 | [..] RAM functions are defined using a specific toolchain keyword "__ramfunc". |
22 | [..] RAM functions are defined using a specific toolchain keyword "__ramfunc". |
| 23 | 23 | ||
| 24 | *** GNU Compiler *** |
24 | *** GNU Compiler *** |
| 25 | -------------------- |
25 | -------------------- |
| 26 | [..] RAM functions are defined using a specific toolchain attribute |
26 | [..] RAM functions are defined using a specific toolchain attribute |
| 27 | "__attribute__((section(".RamFunc")))". |
27 | "__attribute__((section(".RamFunc")))". |
| 28 | 28 | ||
| 29 | @endverbatim |
29 | @endverbatim |
| 30 | ****************************************************************************** |
30 | ****************************************************************************** |
| 31 | * @attention |
31 | * @attention |
| 32 | * |
32 | * |
| 33 | * <h2><center>© Copyright (c) 2017 STMicroelectronics. |
33 | * Copyright (c) 2017 STMicroelectronics. |
| 34 | * All rights reserved.</center></h2> |
34 | * All rights reserved. |
| 35 | * |
35 | * |
| 36 | * This software component is licensed by ST under BSD 3-Clause license, |
36 | * This software is licensed under terms that can be found in the LICENSE file in |
| 37 | * the "License"; You may not use this file except in compliance with the |
37 | * the root directory of this software component. |
| 38 | * License. You may obtain a copy of the License at: |
38 | * If no LICENSE file comes with this software, it is provided AS-IS. |
| 39 | * opensource.org/licenses/BSD-3-Clause |
39 | ****************************************************************************** |
| 40 | * |
40 | */ |
| 41 | ****************************************************************************** |
41 | |
| 42 | */ |
42 | /* Includes ------------------------------------------------------------------*/ |
| 43 | 43 | #include "stm32l1xx_hal.h" |
|
| 44 | /* Includes ------------------------------------------------------------------*/ |
44 | |
| 45 | #include "stm32l1xx_hal.h" |
45 | /** @addtogroup STM32L1xx_HAL_Driver |
| 46 | 46 | * @{ |
|
| 47 | /** @addtogroup STM32L1xx_HAL_Driver |
47 | */ |
| 48 | * @{ |
48 | |
| 49 | */ |
49 | #ifdef HAL_FLASH_MODULE_ENABLED |
| 50 | 50 | ||
| 51 | #ifdef HAL_FLASH_MODULE_ENABLED |
51 | /** @addtogroup FLASH |
| 52 | 52 | * @{ |
|
| 53 | /** @addtogroup FLASH |
53 | */ |
| 54 | * @{ |
54 | /** @addtogroup FLASH_Private_Variables |
| 55 | */ |
55 | * @{ |
| 56 | /** @addtogroup FLASH_Private_Variables |
56 | */ |
| 57 | * @{ |
57 | extern FLASH_ProcessTypeDef pFlash; |
| 58 | */ |
58 | /** |
| 59 | extern FLASH_ProcessTypeDef pFlash; |
59 | * @} |
| 60 | /** |
60 | */ |
| 61 | * @} |
61 | |
| 62 | */ |
62 | /** |
| 63 | 63 | * @} |
|
| 64 | /** |
64 | */ |
| 65 | * @} |
65 | |
| 66 | */ |
66 | /** @defgroup FLASH_RAMFUNC FLASH_RAMFUNC |
| 67 | 67 | * @brief FLASH functions executed from RAM |
|
| 68 | /** @defgroup FLASH_RAMFUNC FLASH_RAMFUNC |
68 | * @{ |
| 69 | * @brief FLASH functions executed from RAM |
69 | */ |
| 70 | * @{ |
70 | |
| 71 | */ |
71 | |
| 72 | 72 | /* Private typedef -----------------------------------------------------------*/ |
|
| 73 | 73 | /* Private define ------------------------------------------------------------*/ |
|
| 74 | /* Private typedef -----------------------------------------------------------*/ |
74 | /* Private macro -------------------------------------------------------------*/ |
| 75 | /* Private define ------------------------------------------------------------*/ |
75 | /* Private variables ---------------------------------------------------------*/ |
| 76 | /* Private macro -------------------------------------------------------------*/ |
76 | /* Private function prototypes -----------------------------------------------*/ |
| 77 | /* Private variables ---------------------------------------------------------*/ |
77 | /** @defgroup FLASH_RAMFUNC_Private_Functions FLASH RAM Private Functions |
| 78 | /* Private function prototypes -----------------------------------------------*/ |
78 | * @{ |
| 79 | /** @defgroup FLASH_RAMFUNC_Private_Functions FLASH RAM Private Functions |
79 | */ |
| 80 | * @{ |
80 | |
| 81 | */ |
81 | static __RAM_FUNC HAL_StatusTypeDef FLASHRAM_WaitForLastOperation(uint32_t Timeout); |
| 82 | 82 | static __RAM_FUNC HAL_StatusTypeDef FLASHRAM_SetErrorCode(void); |
|
| 83 | static __RAM_FUNC HAL_StatusTypeDef FLASHRAM_WaitForLastOperation(uint32_t Timeout); |
83 | |
| 84 | static __RAM_FUNC HAL_StatusTypeDef FLASHRAM_SetErrorCode(void); |
84 | /** |
| 85 | 85 | * @} |
|
| 86 | /** |
86 | */ |
| 87 | * @} |
87 | |
| 88 | */ |
88 | /* Private functions ---------------------------------------------------------*/ |
| 89 | 89 | ||
| 90 | /* Private functions ---------------------------------------------------------*/ |
90 | /** @defgroup FLASH_RAMFUNC_Exported_Functions FLASH RAM Exported Functions |
| 91 | 91 | * |
|
| 92 | /** @defgroup FLASH_RAMFUNC_Exported_Functions FLASH RAM Exported Functions |
92 | @verbatim |
| 93 | * |
93 | =============================================================================== |
| 94 | @verbatim |
94 | ##### ramfunc functions ##### |
| 95 | =============================================================================== |
95 | =============================================================================== |
| 96 | ##### ramfunc functions ##### |
96 | [..] |
| 97 | =============================================================================== |
97 | This subsection provides a set of functions that should be executed from RAM |
| 98 | [..] |
98 | transfers. |
| 99 | This subsection provides a set of functions that should be executed from RAM |
99 | |
| 100 | transfers. |
100 | @endverbatim |
| 101 | 101 | * @{ |
|
| 102 | @endverbatim |
102 | */ |
| 103 | * @{ |
103 | |
| 104 | */ |
104 | /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group1 Peripheral features functions |
| 105 | 105 | * @{ |
|
| 106 | /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group1 Peripheral features functions |
106 | */ |
| 107 | * @{ |
107 | |
| 108 | */ |
108 | /** |
| 109 | 109 | * @brief Enable the power down mode during RUN mode. |
|
| 110 | /** |
110 | * @note This function can be used only when the user code is running from Internal SRAM. |
| 111 | * @brief Enable the power down mode during RUN mode. |
111 | * @retval HAL status |
| 112 | * @note This function can be used only when the user code is running from Internal SRAM. |
112 | */ |
| 113 | * @retval HAL status |
113 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EnableRunPowerDown(void) |
| 114 | */ |
114 | { |
| 115 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EnableRunPowerDown(void) |
115 | /* Enable the Power Down in Run mode*/ |
| 116 | { |
116 | __HAL_FLASH_POWER_DOWN_ENABLE(); |
| 117 | /* Enable the Power Down in Run mode*/ |
117 | |
| 118 | __HAL_FLASH_POWER_DOWN_ENABLE(); |
118 | return HAL_OK; |
| 119 | 119 | } |
|
| 120 | return HAL_OK; |
120 | |
| 121 | } |
121 | /** |
| 122 | 122 | * @brief Disable the power down mode during RUN mode. |
|
| 123 | /** |
123 | * @note This function can be used only when the user code is running from Internal SRAM. |
| 124 | * @brief Disable the power down mode during RUN mode. |
124 | * @retval HAL status |
| 125 | * @note This function can be used only when the user code is running from Internal SRAM. |
125 | */ |
| 126 | * @retval HAL status |
126 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DisableRunPowerDown(void) |
| 127 | */ |
127 | { |
| 128 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DisableRunPowerDown(void) |
128 | /* Disable the Power Down in Run mode*/ |
| 129 | { |
129 | __HAL_FLASH_POWER_DOWN_DISABLE(); |
| 130 | /* Disable the Power Down in Run mode*/ |
130 | |
| 131 | __HAL_FLASH_POWER_DOWN_DISABLE(); |
131 | return HAL_OK; |
| 132 | 132 | } |
|
| 133 | return HAL_OK; |
133 | |
| 134 | } |
134 | /** |
| 135 | 135 | * @} |
|
| 136 | /** |
136 | */ |
| 137 | * @} |
137 | |
| 138 | */ |
138 | /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group2 Programming and erasing operation functions |
| 139 | 139 | * |
|
| 140 | /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group2 Programming and erasing operation functions |
140 | @verbatim |
| 141 | * |
141 | @endverbatim |
| 142 | @verbatim |
142 | * @{ |
| 143 | @endverbatim |
143 | */ |
| 144 | * @{ |
144 | |
| 145 | */ |
145 | #if defined(FLASH_PECR_PARALLBANK) |
| 146 | 146 | /** |
|
| 147 | #if defined(FLASH_PECR_PARALLBANK) |
147 | * @brief Erases a specified 2 pages in program memory in parallel. |
| 148 | /** |
148 | * @note This function can be used only for STM32L151xD, STM32L152xD), STM32L162xD and Cat5 devices. |
| 149 | * @brief Erases a specified 2 pages in program memory in parallel. |
149 | * To correctly run this function, the @ref HAL_FLASH_Unlock() function |
| 150 | * @note This function can be used only for STM32L151xD, STM32L152xD), STM32L162xD and Cat5 devices. |
150 | * must be called before. |
| 151 | * To correctly run this function, the @ref HAL_FLASH_Unlock() function |
151 | * Call the @ref HAL_FLASH_Lock() to disable the flash memory access |
| 152 | * must be called before. |
152 | * (recommended to protect the FLASH memory against possible unwanted operation). |
| 153 | * Call the @ref HAL_FLASH_Lock() to disable the flash memory access |
153 | * @param Page_Address1: The page address in program memory to be erased in |
| 154 | * (recommended to protect the FLASH memory against possible unwanted operation). |
154 | * the first Bank (BANK1). This parameter should be between FLASH_BASE |
| 155 | * @param Page_Address1: The page address in program memory to be erased in |
155 | * and FLASH_BANK1_END. |
| 156 | * the first Bank (BANK1). This parameter should be between FLASH_BASE |
156 | * @param Page_Address2: The page address in program memory to be erased in |
| 157 | * and FLASH_BANK1_END. |
157 | * the second Bank (BANK2). This parameter should be between FLASH_BANK2_BASE |
| 158 | * @param Page_Address2: The page address in program memory to be erased in |
158 | * and FLASH_BANK2_END. |
| 159 | * the second Bank (BANK2). This parameter should be between FLASH_BANK2_BASE |
159 | * @note A Page is erased in the Program memory only if the address to load |
| 160 | * and FLASH_BANK2_END. |
160 | * is the start address of a page (multiple of @ref FLASH_PAGE_SIZE bytes). |
| 161 | * @note A Page is erased in the Program memory only if the address to load |
161 | * @retval HAL status |
| 162 | * is the start address of a page (multiple of @ref FLASH_PAGE_SIZE bytes). |
162 | */ |
| 163 | * @retval HAL status |
163 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EraseParallelPage(uint32_t Page_Address1, uint32_t Page_Address2) |
| 164 | */ |
164 | { |
| 165 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EraseParallelPage(uint32_t Page_Address1, uint32_t Page_Address2) |
165 | HAL_StatusTypeDef status = HAL_OK; |
| 166 | { |
166 | |
| 167 | HAL_StatusTypeDef status = HAL_OK; |
167 | /* Wait for last operation to be completed */ |
| 168 | 168 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
|
| 169 | /* Wait for last operation to be completed */ |
169 | |
| 170 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
170 | if(status == HAL_OK) |
| 171 | 171 | { |
|
| 172 | if(status == HAL_OK) |
172 | /* Proceed to erase the page */ |
| 173 | { |
173 | SET_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK); |
| 174 | /* Proceed to erase the page */ |
174 | SET_BIT(FLASH->PECR, FLASH_PECR_ERASE); |
| 175 | SET_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK); |
175 | SET_BIT(FLASH->PECR, FLASH_PECR_PROG); |
| 176 | SET_BIT(FLASH->PECR, FLASH_PECR_ERASE); |
176 | |
| 177 | SET_BIT(FLASH->PECR, FLASH_PECR_PROG); |
177 | /* Write 00000000h to the first word of the first program page to erase */ |
| 178 | 178 | *(__IO uint32_t *)Page_Address1 = 0x00000000U; |
|
| 179 | /* Write 00000000h to the first word of the first program page to erase */ |
179 | /* Write 00000000h to the first word of the second program page to erase */ |
| 180 | *(__IO uint32_t *)Page_Address1 = 0x00000000U; |
180 | *(__IO uint32_t *)Page_Address2 = 0x00000000U; |
| 181 | /* Write 00000000h to the first word of the second program page to erase */ |
181 | |
| 182 | *(__IO uint32_t *)Page_Address2 = 0x00000000U; |
182 | /* Wait for last operation to be completed */ |
| 183 | 183 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
|
| 184 | /* Wait for last operation to be completed */ |
184 | |
| 185 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
185 | /* If the erase operation is completed, disable the ERASE, PROG and PARALLBANK bits */ |
| 186 | 186 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG); |
|
| 187 | /* If the erase operation is completed, disable the ERASE, PROG and PARALLBANK bits */ |
187 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_ERASE); |
| 188 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG); |
188 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK); |
| 189 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_ERASE); |
189 | } |
| 190 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK); |
190 | /* Return the Erase Status */ |
| 191 | } |
191 | return status; |
| 192 | /* Return the Erase Status */ |
192 | } |
| 193 | return status; |
193 | |
| 194 | } |
194 | /** |
| 195 | 195 | * @brief Program 2 half pages in program memory in parallel (half page size is 32 Words). |
|
| 196 | /** |
196 | * @note This function can be used only for STM32L151xD, STM32L152xD), STM32L162xD and Cat5 devices. |
| 197 | * @brief Program 2 half pages in program memory in parallel (half page size is 32 Words). |
197 | * @param Address1: specifies the first address to be written in the first bank |
| 198 | * @note This function can be used only for STM32L151xD, STM32L152xD), STM32L162xD and Cat5 devices. |
198 | * (BANK1). This parameter should be between FLASH_BASE and (FLASH_BANK1_END - FLASH_PAGE_SIZE). |
| 199 | * @param Address1: specifies the first address to be written in the first bank |
199 | * @param pBuffer1: pointer to the buffer containing the data to be written |
| 200 | * (BANK1). This parameter should be between FLASH_BASE and (FLASH_BANK1_END - FLASH_PAGE_SIZE). |
200 | * to the first half page in the first bank. |
| 201 | * @param pBuffer1: pointer to the buffer containing the data to be written |
201 | * @param Address2: specifies the second address to be written in the second bank |
| 202 | * to the first half page in the first bank. |
202 | * (BANK2). This parameter should be between FLASH_BANK2_BASE and (FLASH_BANK2_END - FLASH_PAGE_SIZE). |
| 203 | * @param Address2: specifies the second address to be written in the second bank |
203 | * @param pBuffer2: pointer to the buffer containing the data to be written |
| 204 | * (BANK2). This parameter should be between FLASH_BANK2_BASE and (FLASH_BANK2_END - FLASH_PAGE_SIZE). |
204 | * to the second half page in the second bank. |
| 205 | * @param pBuffer2: pointer to the buffer containing the data to be written |
205 | * @note To correctly run this function, the @ref HAL_FLASH_Unlock() function |
| 206 | * to the second half page in the second bank. |
206 | * must be called before. |
| 207 | * @note To correctly run this function, the @ref HAL_FLASH_Unlock() function |
207 | * Call the @ref HAL_FLASH_Lock() to disable the flash memory access |
| 208 | * must be called before. |
208 | * (recommended to protect the FLASH memory against possible unwanted operation). |
| 209 | * Call the @ref HAL_FLASH_Lock() to disable the flash memory access |
209 | * @note Half page write is possible only from SRAM. |
| 210 | * (recommended to protect the FLASH memory against possible unwanted operation). |
210 | * @note If there are more than 32 words to write, after 32 words another |
| 211 | * @note Half page write is possible only from SRAM. |
211 | * Half Page programming operation starts and has to be finished. |
| 212 | * @note If there are more than 32 words to write, after 32 words another |
212 | * @note A half page is written to the program memory only if the first |
| 213 | * Half Page programming operation starts and has to be finished. |
213 | * address to load is the start address of a half page (multiple of 128 |
| 214 | * @note A half page is written to the program memory only if the first |
214 | * bytes) and the 31 remaining words to load are in the same half page. |
| 215 | * address to load is the start address of a half page (multiple of 128 |
215 | * @note During the Program memory half page write all read operations are |
| 216 | * bytes) and the 31 remaining words to load are in the same half page. |
216 | * forbidden (this includes DMA read operations and debugger read |
| 217 | * @note During the Program memory half page write all read operations are |
217 | * operations such as breakpoints, periodic updates, etc.). |
| 218 | * forbidden (this includes DMA read operations and debugger read |
218 | * @note If a PGAERR is set during a Program memory half page write, the |
| 219 | * operations such as breakpoints, periodic updates, etc.). |
219 | * complete write operation is aborted. Software should then reset the |
| 220 | * @note If a PGAERR is set during a Program memory half page write, the |
220 | * FPRG and PROG/DATA bits and restart the write operation from the |
| 221 | * complete write operation is aborted. Software should then reset the |
221 | * beginning. |
| 222 | * FPRG and PROG/DATA bits and restart the write operation from the |
222 | * @retval HAL status |
| 223 | * beginning. |
223 | */ |
| 224 | * @retval HAL status |
224 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_ProgramParallelHalfPage(uint32_t Address1, uint32_t* pBuffer1, uint32_t Address2, uint32_t* pBuffer2) |
| 225 | */ |
225 | { |
| 226 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_ProgramParallelHalfPage(uint32_t Address1, uint32_t* pBuffer1, uint32_t Address2, uint32_t* pBuffer2) |
226 | uint32_t primask_bit; |
| 227 | { |
227 | uint32_t count = 0U; |
| 228 | uint32_t primask_bit; |
228 | HAL_StatusTypeDef status = HAL_OK; |
| 229 | uint32_t count = 0U; |
229 | |
| 230 | HAL_StatusTypeDef status = HAL_OK; |
230 | /* Wait for last operation to be completed */ |
| 231 | 231 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
|
| 232 | /* Wait for last operation to be completed */ |
232 | |
| 233 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
233 | if(status == HAL_OK) |
| 234 | 234 | { |
|
| 235 | if(status == HAL_OK) |
235 | /* Disable all IRQs */ |
| 236 | { |
236 | primask_bit = __get_PRIMASK(); |
| 237 | /* Disable all IRQs */ |
237 | __disable_irq(); |
| 238 | primask_bit = __get_PRIMASK(); |
238 | |
| 239 | __disable_irq(); |
239 | /* Proceed to program the new half page */ |
| 240 | 240 | SET_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK); |
|
| 241 | /* Proceed to program the new half page */ |
241 | SET_BIT(FLASH->PECR, FLASH_PECR_FPRG); |
| 242 | SET_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK); |
242 | SET_BIT(FLASH->PECR, FLASH_PECR_PROG); |
| 243 | SET_BIT(FLASH->PECR, FLASH_PECR_FPRG); |
243 | |
| 244 | SET_BIT(FLASH->PECR, FLASH_PECR_PROG); |
244 | /* Write the first half page directly with 32 different words */ |
| 245 | 245 | while(count < 32U) |
|
| 246 | /* Write the first half page directly with 32 different words */ |
246 | { |
| 247 | while(count < 32U) |
247 | *(__IO uint32_t*) ((uint32_t)(Address1 + (4 * count))) = *pBuffer1; |
| 248 | { |
248 | pBuffer1++; |
| 249 | *(__IO uint32_t*) ((uint32_t)(Address1 + (4 * count))) = *pBuffer1; |
249 | count ++; |
| 250 | pBuffer1++; |
250 | } |
| 251 | count ++; |
251 | |
| 252 | } |
252 | /* Write the second half page directly with 32 different words */ |
| 253 | 253 | count = 0U; |
|
| 254 | /* Write the second half page directly with 32 different words */ |
254 | while(count < 32U) |
| 255 | count = 0U; |
255 | { |
| 256 | while(count < 32U) |
256 | *(__IO uint32_t*) ((uint32_t)(Address2 + (4 * count))) = *pBuffer2; |
| 257 | { |
257 | pBuffer2++; |
| 258 | *(__IO uint32_t*) ((uint32_t)(Address2 + (4 * count))) = *pBuffer2; |
258 | count ++; |
| 259 | pBuffer2++; |
259 | } |
| 260 | count ++; |
260 | |
| 261 | } |
261 | /* Wait for last operation to be completed */ |
| 262 | 262 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
|
| 263 | /* Wait for last operation to be completed */ |
263 | |
| 264 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
264 | /* if the write operation is completed, disable the PROG, FPRG and PARALLBANK bits */ |
| 265 | 265 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG); |
|
| 266 | /* if the write operation is completed, disable the PROG, FPRG and PARALLBANK bits */ |
266 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_FPRG); |
| 267 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG); |
267 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK); |
| 268 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_FPRG); |
268 | |
| 269 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK); |
269 | /* Enable IRQs */ |
| 270 | 270 | __set_PRIMASK(primask_bit); |
|
| 271 | /* Enable IRQs */ |
271 | } |
| 272 | __set_PRIMASK(primask_bit); |
272 | |
| 273 | } |
273 | /* Return the Write Status */ |
| 274 | 274 | return status; |
|
| 275 | /* Return the Write Status */ |
275 | } |
| 276 | return status; |
276 | #endif /* FLASH_PECR_PARALLBANK */ |
| 277 | } |
277 | |
| 278 | #endif /* FLASH_PECR_PARALLBANK */ |
278 | /** |
| 279 | 279 | * @brief Program a half page in program memory. |
|
| 280 | /** |
280 | * @param Address specifies the address to be written. |
| 281 | * @brief Program a half page in program memory. |
281 | * @param pBuffer pointer to the buffer containing the data to be written to |
| 282 | * @param Address specifies the address to be written. |
282 | * the half page. |
| 283 | * @param pBuffer pointer to the buffer containing the data to be written to |
283 | * @note To correctly run this function, the @ref HAL_FLASH_Unlock() function |
| 284 | * the half page. |
284 | * must be called before. |
| 285 | * @note To correctly run this function, the @ref HAL_FLASH_Unlock() function |
285 | * Call the @ref HAL_FLASH_Lock() to disable the flash memory access |
| 286 | * must be called before. |
286 | * (recommended to protect the FLASH memory against possible unwanted operation) |
| 287 | * Call the @ref HAL_FLASH_Lock() to disable the flash memory access |
287 | * @note Half page write is possible only from SRAM. |
| 288 | * (recommended to protect the FLASH memory against possible unwanted operation) |
288 | * @note If there are more than 32 words to write, after 32 words another |
| 289 | * @note Half page write is possible only from SRAM. |
289 | * Half Page programming operation starts and has to be finished. |
| 290 | * @note If there are more than 32 words to write, after 32 words another |
290 | * @note A half page is written to the program memory only if the first |
| 291 | * Half Page programming operation starts and has to be finished. |
291 | * address to load is the start address of a half page (multiple of 128 |
| 292 | * @note A half page is written to the program memory only if the first |
292 | * bytes) and the 31 remaining words to load are in the same half page. |
| 293 | * address to load is the start address of a half page (multiple of 128 |
293 | * @note During the Program memory half page write all read operations are |
| 294 | * bytes) and the 31 remaining words to load are in the same half page. |
294 | * forbidden (this includes DMA read operations and debugger read |
| 295 | * @note During the Program memory half page write all read operations are |
295 | * operations such as breakpoints, periodic updates, etc.). |
| 296 | * forbidden (this includes DMA read operations and debugger read |
296 | * @note If a PGAERR is set during a Program memory half page write, the |
| 297 | * operations such as breakpoints, periodic updates, etc.). |
297 | * complete write operation is aborted. Software should then reset the |
| 298 | * @note If a PGAERR is set during a Program memory half page write, the |
298 | * FPRG and PROG/DATA bits and restart the write operation from the |
| 299 | * complete write operation is aborted. Software should then reset the |
299 | * beginning. |
| 300 | * FPRG and PROG/DATA bits and restart the write operation from the |
300 | * @retval HAL status |
| 301 | * beginning. |
301 | */ |
| 302 | * @retval HAL status |
302 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_HalfPageProgram(uint32_t Address, uint32_t* pBuffer) |
| 303 | */ |
303 | { |
| 304 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_HalfPageProgram(uint32_t Address, uint32_t* pBuffer) |
304 | uint32_t primask_bit; |
| 305 | { |
305 | uint32_t count = 0U; |
| 306 | uint32_t primask_bit; |
306 | HAL_StatusTypeDef status = HAL_OK; |
| 307 | uint32_t count = 0U; |
307 | |
| 308 | HAL_StatusTypeDef status = HAL_OK; |
308 | /* Wait for last operation to be completed */ |
| 309 | 309 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
|
| 310 | /* Wait for last operation to be completed */ |
310 | |
| 311 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
311 | if(status == HAL_OK) |
| 312 | 312 | { |
|
| 313 | if(status == HAL_OK) |
313 | /* Disable all IRQs */ |
| 314 | { |
314 | primask_bit = __get_PRIMASK(); |
| 315 | /* Disable all IRQs */ |
315 | __disable_irq(); |
| 316 | primask_bit = __get_PRIMASK(); |
316 | |
| 317 | __disable_irq(); |
317 | /* Proceed to program the new half page */ |
| 318 | 318 | SET_BIT(FLASH->PECR, FLASH_PECR_FPRG); |
|
| 319 | /* Proceed to program the new half page */ |
319 | SET_BIT(FLASH->PECR, FLASH_PECR_PROG); |
| 320 | SET_BIT(FLASH->PECR, FLASH_PECR_FPRG); |
320 | |
| 321 | SET_BIT(FLASH->PECR, FLASH_PECR_PROG); |
321 | /* Write one half page directly with 32 different words */ |
| 322 | 322 | while(count < 32U) |
|
| 323 | /* Write one half page directly with 32 different words */ |
323 | { |
| 324 | while(count < 32U) |
324 | *(__IO uint32_t*) ((uint32_t)(Address + (4 * count))) = *pBuffer; |
| 325 | { |
325 | pBuffer++; |
| 326 | *(__IO uint32_t*) ((uint32_t)(Address + (4 * count))) = *pBuffer; |
326 | count ++; |
| 327 | pBuffer++; |
327 | } |
| 328 | count ++; |
328 | |
| 329 | } |
329 | /* Wait for last operation to be completed */ |
| 330 | 330 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
|
| 331 | /* Wait for last operation to be completed */ |
331 | |
| 332 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
332 | /* If the write operation is completed, disable the PROG and FPRG bits */ |
| 333 | 333 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG); |
|
| 334 | /* If the write operation is completed, disable the PROG and FPRG bits */ |
334 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_FPRG); |
| 335 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG); |
335 | |
| 336 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_FPRG); |
336 | /* Enable IRQs */ |
| 337 | 337 | __set_PRIMASK(primask_bit); |
|
| 338 | /* Enable IRQs */ |
338 | } |
| 339 | __set_PRIMASK(primask_bit); |
339 | |
| 340 | } |
340 | /* Return the Write Status */ |
| 341 | 341 | return status; |
|
| 342 | /* Return the Write Status */ |
342 | } |
| 343 | return status; |
343 | |
| 344 | } |
344 | /** |
| 345 | 345 | * @} |
|
| 346 | /** |
346 | */ |
| 347 | * @} |
347 | |
| 348 | */ |
348 | /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group3 Peripheral errors functions |
| 349 | 349 | * @brief Peripheral errors functions |
|
| 350 | /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group3 Peripheral errors functions |
350 | * |
| 351 | * @brief Peripheral errors functions |
351 | @verbatim |
| 352 | * |
352 | =============================================================================== |
| 353 | @verbatim |
353 | ##### Peripheral errors functions ##### |
| 354 | =============================================================================== |
354 | =============================================================================== |
| 355 | ##### Peripheral errors functions ##### |
355 | [..] |
| 356 | =============================================================================== |
356 | This subsection permit to get in run-time errors of the FLASH peripheral. |
| 357 | [..] |
357 | |
| 358 | This subsection permit to get in run-time errors of the FLASH peripheral. |
358 | @endverbatim |
| 359 | 359 | * @{ |
|
| 360 | @endverbatim |
360 | */ |
| 361 | * @{ |
361 | |
| 362 | */ |
362 | /** |
| 363 | 363 | * @brief Get the specific FLASH errors flag. |
|
| 364 | /** |
364 | * @param Error pointer is the error value. It can be a mixed of: |
| 365 | * @brief Get the specific FLASH errors flag. |
365 | @if STM32L100xB |
| 366 | * @param Error pointer is the error value. It can be a mixed of: |
366 | @elif STM32L100xBA |
| 367 | @if STM32L100xB |
367 | * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) |
| 368 | @elif STM32L100xBA |
368 | @elif STM32L151xB |
| 369 | * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) |
369 | @elif STM32L151xBA |
| 370 | @elif STM32L151xB |
370 | * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) |
| 371 | @elif STM32L151xBA |
371 | @elif STM32L152xB |
| 372 | * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) |
372 | @elif STM32L152xBA |
| 373 | @elif STM32L152xB |
373 | * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) |
| 374 | @elif STM32L152xBA |
374 | @elif STM32L100xC |
| 375 | * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) |
375 | * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) |
| 376 | @elif STM32L100xC |
376 | * @arg @ref HAL_FLASH_ERROR_OPTVUSR FLASH Option User validity error |
| 377 | * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) |
377 | @elif STM32L151xC |
| 378 | * @arg @ref HAL_FLASH_ERROR_OPTVUSR FLASH Option User validity error |
378 | * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) |
| 379 | @elif STM32L151xC |
379 | * @arg @ref HAL_FLASH_ERROR_OPTVUSR FLASH Option User validity error |
| 380 | * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) |
380 | @elif STM32L152xC |
| 381 | * @arg @ref HAL_FLASH_ERROR_OPTVUSR FLASH Option User validity error |
381 | * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) |
| 382 | @elif STM32L152xC |
382 | * @arg @ref HAL_FLASH_ERROR_OPTVUSR FLASH Option User validity error |
| 383 | * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) |
383 | @elif STM32L162xC |
| 384 | * @arg @ref HAL_FLASH_ERROR_OPTVUSR FLASH Option User validity error |
384 | * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) |
| 385 | @elif STM32L162xC |
385 | * @arg @ref HAL_FLASH_ERROR_OPTVUSR FLASH Option User validity error |
| 386 | * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) |
386 | @else |
| 387 | * @arg @ref HAL_FLASH_ERROR_OPTVUSR FLASH Option User validity error |
387 | * @arg @ref HAL_FLASH_ERROR_OPTVUSR FLASH Option User validity error |
| 388 | @else |
388 | @endif |
| 389 | * @arg @ref HAL_FLASH_ERROR_OPTVUSR FLASH Option User validity error |
389 | * @arg @ref HAL_FLASH_ERROR_PGA FLASH Programming Alignment error flag |
| 390 | @endif |
390 | * @arg @ref HAL_FLASH_ERROR_WRP FLASH Write protected error flag |
| 391 | * @arg @ref HAL_FLASH_ERROR_PGA FLASH Programming Alignment error flag |
391 | * @arg @ref HAL_FLASH_ERROR_OPTV FLASH Option valid error flag |
| 392 | * @arg @ref HAL_FLASH_ERROR_WRP FLASH Write protected error flag |
392 | * @retval HAL Status |
| 393 | * @arg @ref HAL_FLASH_ERROR_OPTV FLASH Option valid error flag |
393 | */ |
| 394 | * @retval HAL Status |
394 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_GetError(uint32_t * Error) |
| 395 | */ |
395 | { |
| 396 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_GetError(uint32_t * Error) |
396 | *Error = pFlash.ErrorCode; |
| 397 | { |
397 | return HAL_OK; |
| 398 | *Error = pFlash.ErrorCode; |
398 | } |
| 399 | return HAL_OK; |
399 | |
| 400 | } |
400 | /** |
| 401 | 401 | * @} |
|
| 402 | /** |
402 | */ |
| 403 | * @} |
403 | |
| 404 | */ |
404 | /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group4 DATA EEPROM functions |
| 405 | 405 | * |
|
| 406 | /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group4 DATA EEPROM functions |
406 | * @{ |
| 407 | * |
407 | */ |
| 408 | * @{ |
408 | |
| 409 | */ |
409 | /** |
| 410 | 410 | * @brief Erase a double word in data memory. |
|
| 411 | /** |
411 | * @param Address specifies the address to be erased. |
| 412 | * @brief Erase a double word in data memory. |
412 | * @note To correctly run this function, the HAL_FLASH_EEPROM_Unlock() function |
| 413 | * @param Address specifies the address to be erased. |
413 | * must be called before. |
| 414 | * @note To correctly run this function, the HAL_FLASH_EEPROM_Unlock() function |
414 | * Call the HAL_FLASH_EEPROM_Lock() to he data EEPROM access |
| 415 | * must be called before. |
415 | * and Flash program erase control register access(recommended to protect |
| 416 | * Call the HAL_FLASH_EEPROM_Lock() to he data EEPROM access |
416 | * the DATA_EEPROM against possible unwanted operation). |
| 417 | * and Flash program erase control register access(recommended to protect |
417 | * @note Data memory double word erase is possible only from SRAM. |
| 418 | * the DATA_EEPROM against possible unwanted operation). |
418 | * @note A double word is erased to the data memory only if the first address |
| 419 | * @note Data memory double word erase is possible only from SRAM. |
419 | * to load is the start address of a double word (multiple of 8 bytes). |
| 420 | * @note A double word is erased to the data memory only if the first address |
420 | * @note During the Data memory double word erase, all read operations are |
| 421 | * to load is the start address of a double word (multiple of 8 bytes). |
421 | * forbidden (this includes DMA read operations and debugger read |
| 422 | * @note During the Data memory double word erase, all read operations are |
422 | * operations such as breakpoints, periodic updates, etc.). |
| 423 | * forbidden (this includes DMA read operations and debugger read |
423 | * @retval HAL status |
| 424 | * operations such as breakpoints, periodic updates, etc.). |
424 | */ |
| 425 | * @retval HAL status |
425 | |
| 426 | */ |
426 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_EraseDoubleWord(uint32_t Address) |
| 427 | 427 | { |
|
| 428 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_EraseDoubleWord(uint32_t Address) |
428 | uint32_t primask_bit; |
| 429 | { |
429 | HAL_StatusTypeDef status = HAL_OK; |
| 430 | uint32_t primask_bit; |
430 | |
| 431 | HAL_StatusTypeDef status = HAL_OK; |
431 | /* Wait for last operation to be completed */ |
| 432 | 432 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
|
| 433 | /* Wait for last operation to be completed */ |
433 | |
| 434 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
434 | if(status == HAL_OK) |
| 435 | 435 | { |
|
| 436 | if(status == HAL_OK) |
436 | /* Disable all IRQs */ |
| 437 | { |
437 | primask_bit = __get_PRIMASK(); |
| 438 | /* Disable all IRQs */ |
438 | __disable_irq(); |
| 439 | primask_bit = __get_PRIMASK(); |
439 | |
| 440 | __disable_irq(); |
440 | /* If the previous operation is completed, proceed to erase the next double word */ |
| 441 | 441 | /* Set the ERASE bit */ |
|
| 442 | /* If the previous operation is completed, proceed to erase the next double word */ |
442 | SET_BIT(FLASH->PECR, FLASH_PECR_ERASE); |
| 443 | /* Set the ERASE bit */ |
443 | |
| 444 | SET_BIT(FLASH->PECR, FLASH_PECR_ERASE); |
444 | /* Set DATA bit */ |
| 445 | 445 | SET_BIT(FLASH->PECR, FLASH_PECR_DATA); |
|
| 446 | /* Set DATA bit */ |
446 | |
| 447 | SET_BIT(FLASH->PECR, FLASH_PECR_DATA); |
447 | /* Write 00000000h to the 2 words to erase */ |
| 448 | 448 | *(__IO uint32_t *)Address = 0x00000000U; |
|
| 449 | /* Write 00000000h to the 2 words to erase */ |
449 | Address += 4U; |
| 450 | *(__IO uint32_t *)Address = 0x00000000U; |
450 | *(__IO uint32_t *)Address = 0x00000000U; |
| 451 | Address += 4U; |
451 | |
| 452 | *(__IO uint32_t *)Address = 0x00000000U; |
452 | /* Wait for last operation to be completed */ |
| 453 | 453 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
|
| 454 | /* Wait for last operation to be completed */ |
454 | |
| 455 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
455 | /* If the erase operation is completed, disable the ERASE and DATA bits */ |
| 456 | 456 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_ERASE); |
|
| 457 | /* If the erase operation is completed, disable the ERASE and DATA bits */ |
457 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_DATA); |
| 458 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_ERASE); |
458 | |
| 459 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_DATA); |
459 | /* Enable IRQs */ |
| 460 | 460 | __set_PRIMASK(primask_bit); |
|
| 461 | /* Enable IRQs */ |
461 | |
| 462 | __set_PRIMASK(primask_bit); |
462 | } |
| 463 | 463 | ||
| 464 | } |
464 | /* Return the erase status */ |
| 465 | 465 | return status; |
|
| 466 | /* Return the erase status */ |
466 | } |
| 467 | return status; |
467 | |
| 468 | } |
468 | /** |
| 469 | 469 | * @brief Write a double word in data memory without erase. |
|
| 470 | /** |
470 | * @param Address specifies the address to be written. |
| 471 | * @brief Write a double word in data memory without erase. |
471 | * @param Data specifies the data to be written. |
| 472 | * @param Address specifies the address to be written. |
472 | * @note To correctly run this function, the HAL_FLASH_EEPROM_Unlock() function |
| 473 | * @param Data specifies the data to be written. |
473 | * must be called before. |
| 474 | * @note To correctly run this function, the HAL_FLASH_EEPROM_Unlock() function |
474 | * Call the HAL_FLASH_EEPROM_Lock() to he data EEPROM access |
| 475 | * must be called before. |
475 | * and Flash program erase control register access(recommended to protect |
| 476 | * Call the HAL_FLASH_EEPROM_Lock() to he data EEPROM access |
476 | * the DATA_EEPROM against possible unwanted operation). |
| 477 | * and Flash program erase control register access(recommended to protect |
477 | * @note Data memory double word write is possible only from SRAM. |
| 478 | * the DATA_EEPROM against possible unwanted operation). |
478 | * @note A data memory double word is written to the data memory only if the |
| 479 | * @note Data memory double word write is possible only from SRAM. |
479 | * first address to load is the start address of a double word (multiple |
| 480 | * @note A data memory double word is written to the data memory only if the |
480 | * of double word). |
| 481 | * first address to load is the start address of a double word (multiple |
481 | * @note During the Data memory double word write, all read operations are |
| 482 | * of double word). |
482 | * forbidden (this includes DMA read operations and debugger read |
| 483 | * @note During the Data memory double word write, all read operations are |
483 | * operations such as breakpoints, periodic updates, etc.). |
| 484 | * forbidden (this includes DMA read operations and debugger read |
484 | * @retval HAL status |
| 485 | * operations such as breakpoints, periodic updates, etc.). |
485 | */ |
| 486 | * @retval HAL status |
486 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_ProgramDoubleWord(uint32_t Address, uint64_t Data) |
| 487 | */ |
487 | { |
| 488 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_ProgramDoubleWord(uint32_t Address, uint64_t Data) |
488 | uint32_t primask_bit; |
| 489 | { |
489 | HAL_StatusTypeDef status = HAL_OK; |
| 490 | uint32_t primask_bit; |
490 | |
| 491 | HAL_StatusTypeDef status = HAL_OK; |
491 | /* Wait for last operation to be completed */ |
| 492 | 492 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
|
| 493 | /* Wait for last operation to be completed */ |
493 | |
| 494 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
494 | if(status == HAL_OK) |
| 495 | 495 | { |
|
| 496 | if(status == HAL_OK) |
496 | /* Disable all IRQs */ |
| 497 | { |
497 | primask_bit = __get_PRIMASK(); |
| 498 | /* Disable all IRQs */ |
498 | __disable_irq(); |
| 499 | primask_bit = __get_PRIMASK(); |
499 | |
| 500 | __disable_irq(); |
500 | /* If the previous operation is completed, proceed to program the new data*/ |
| 501 | 501 | SET_BIT(FLASH->PECR, FLASH_PECR_FPRG); |
|
| 502 | /* If the previous operation is completed, proceed to program the new data*/ |
502 | SET_BIT(FLASH->PECR, FLASH_PECR_DATA); |
| 503 | SET_BIT(FLASH->PECR, FLASH_PECR_FPRG); |
503 | |
| 504 | SET_BIT(FLASH->PECR, FLASH_PECR_DATA); |
504 | /* Write the 2 words */ |
| 505 | 505 | *(__IO uint32_t *)Address = (uint32_t) Data; |
|
| 506 | /* Write the 2 words */ |
506 | Address += 4U; |
| 507 | *(__IO uint32_t *)Address = (uint32_t) Data; |
507 | *(__IO uint32_t *)Address = (uint32_t) (Data >> 32); |
| 508 | Address += 4U; |
508 | |
| 509 | *(__IO uint32_t *)Address = (uint32_t) (Data >> 32); |
509 | /* Wait for last operation to be completed */ |
| 510 | 510 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
|
| 511 | /* Wait for last operation to be completed */ |
511 | |
| 512 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
512 | /* If the write operation is completed, disable the FPRG and DATA bits */ |
| 513 | 513 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_FPRG); |
|
| 514 | /* If the write operation is completed, disable the FPRG and DATA bits */ |
514 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_DATA); |
| 515 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_FPRG); |
515 | |
| 516 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_DATA); |
516 | /* Enable IRQs */ |
| 517 | 517 | __set_PRIMASK(primask_bit); |
|
| 518 | /* Enable IRQs */ |
518 | } |
| 519 | __set_PRIMASK(primask_bit); |
519 | |
| 520 | } |
520 | /* Return the Write Status */ |
| 521 | 521 | return status; |
|
| 522 | /* Return the Write Status */ |
522 | } |
| 523 | return status; |
523 | |
| 524 | } |
524 | /** |
| 525 | 525 | * @} |
|
| 526 | /** |
526 | */ |
| 527 | * @} |
527 | |
| 528 | */ |
528 | /** |
| 529 | 529 | * @} |
|
| 530 | /** |
530 | */ |
| 531 | * @} |
531 | |
| 532 | */ |
532 | /** @addtogroup FLASH_RAMFUNC_Private_Functions |
| 533 | 533 | * @{ |
|
| 534 | /** @addtogroup FLASH_RAMFUNC_Private_Functions |
534 | */ |
| 535 | * @{ |
535 | |
| 536 | */ |
536 | /** |
| 537 | 537 | * @brief Set the specific FLASH error flag. |
|
| 538 | /** |
538 | * @retval HAL Status |
| 539 | * @brief Set the specific FLASH error flag. |
539 | */ |
| 540 | * @retval HAL Status |
540 | static __RAM_FUNC HAL_StatusTypeDef FLASHRAM_SetErrorCode(void) |
| 541 | */ |
541 | { |
| 542 | static __RAM_FUNC HAL_StatusTypeDef FLASHRAM_SetErrorCode(void) |
542 | uint32_t flags = 0U; |
| 543 | { |
543 | |
| 544 | uint32_t flags = 0U; |
544 | if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) |
| 545 | 545 | { |
|
| 546 | if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) |
546 | pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; |
| 547 | { |
547 | flags |= FLASH_FLAG_WRPERR; |
| 548 | pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; |
548 | } |
| 549 | flags |= FLASH_FLAG_WRPERR; |
549 | if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR)) |
| 550 | } |
550 | { |
| 551 | if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR)) |
551 | pFlash.ErrorCode |= HAL_FLASH_ERROR_PGA; |
| 552 | { |
552 | flags |= FLASH_FLAG_PGAERR; |
| 553 | pFlash.ErrorCode |= HAL_FLASH_ERROR_PGA; |
553 | } |
| 554 | flags |= FLASH_FLAG_PGAERR; |
554 | if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) |
| 555 | } |
555 | { |
| 556 | if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) |
556 | pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV; |
| 557 | { |
557 | flags |= FLASH_FLAG_OPTVERR; |
| 558 | pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV; |
558 | } |
| 559 | flags |= FLASH_FLAG_OPTVERR; |
559 | |
| 560 | } |
560 | #if defined(FLASH_SR_RDERR) |
| 561 | 561 | if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR)) |
|
| 562 | #if defined(FLASH_SR_RDERR) |
562 | { |
| 563 | if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR)) |
563 | pFlash.ErrorCode |= HAL_FLASH_ERROR_RD; |
| 564 | { |
564 | flags |= FLASH_FLAG_RDERR; |
| 565 | pFlash.ErrorCode |= HAL_FLASH_ERROR_RD; |
565 | } |
| 566 | flags |= FLASH_FLAG_RDERR; |
566 | #endif /* FLASH_SR_RDERR */ |
| 567 | } |
567 | #if defined(FLASH_SR_OPTVERRUSR) |
| 568 | #endif /* FLASH_SR_RDERR */ |
568 | if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERRUSR)) |
| 569 | #if defined(FLASH_SR_OPTVERRUSR) |
569 | { |
| 570 | if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERRUSR)) |
570 | pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTVUSR; |
| 571 | { |
571 | flags |= FLASH_FLAG_OPTVERRUSR; |
| 572 | pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTVUSR; |
572 | } |
| 573 | flags |= FLASH_FLAG_OPTVERRUSR; |
573 | #endif /* FLASH_SR_OPTVERRUSR */ |
| 574 | } |
574 | |
| 575 | #endif /* FLASH_SR_OPTVERRUSR */ |
575 | /* Clear FLASH error pending bits */ |
| 576 | 576 | __HAL_FLASH_CLEAR_FLAG(flags); |
|
| 577 | /* Clear FLASH error pending bits */ |
577 | |
| 578 | __HAL_FLASH_CLEAR_FLAG(flags); |
578 | return HAL_OK; |
| 579 | 579 | } |
|
| 580 | return HAL_OK; |
580 | |
| 581 | } |
581 | /** |
| 582 | 582 | * @brief Wait for a FLASH operation to complete. |
|
| 583 | /** |
583 | * @param Timeout maximum flash operationtimeout |
| 584 | * @brief Wait for a FLASH operation to complete. |
584 | * @retval HAL status |
| 585 | * @param Timeout maximum flash operationtimeout |
585 | */ |
| 586 | * @retval HAL status |
586 | static __RAM_FUNC HAL_StatusTypeDef FLASHRAM_WaitForLastOperation(uint32_t Timeout) |
| 587 | */ |
587 | { |
| 588 | static __RAM_FUNC HAL_StatusTypeDef FLASHRAM_WaitForLastOperation(uint32_t Timeout) |
588 | /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. |
| 589 | { |
589 | Even if the FLASH operation fails, the BUSY flag will be reset and an error |
| 590 | /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. |
590 | flag will be set */ |
| 591 | Even if the FLASH operation fails, the BUSY flag will be reset and an error |
591 | |
| 592 | flag will be set */ |
592 | while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY) && (Timeout != 0x00U)) |
| 593 | 593 | { |
|
| 594 | while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY) && (Timeout != 0x00U)) |
594 | Timeout--; |
| 595 | { |
595 | } |
| 596 | Timeout--; |
596 | |
| 597 | } |
597 | if(Timeout == 0x00U) |
| 598 | 598 | { |
|
| 599 | if(Timeout == 0x00U) |
599 | return HAL_TIMEOUT; |
| 600 | { |
600 | } |
| 601 | return HAL_TIMEOUT; |
601 | |
| 602 | } |
602 | /* Check FLASH End of Operation flag */ |
| 603 | 603 | if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) |
|
| 604 | /* Check FLASH End of Operation flag */ |
604 | { |
| 605 | if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) |
605 | /* Clear FLASH End of Operation pending bit */ |
| 606 | { |
606 | __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); |
| 607 | /* Clear FLASH End of Operation pending bit */ |
607 | } |
| 608 | __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); |
608 | |
| 609 | } |
609 | if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || |
| 610 | 610 | __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || |
|
| 611 | if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || |
611 | #if defined(FLASH_SR_RDERR) |
| 612 | __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || |
612 | __HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR) || |
| 613 | #if defined(FLASH_SR_RDERR) |
613 | #endif /* FLASH_SR_RDERR */ |
| 614 | __HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR) || |
614 | #if defined(FLASH_SR_OPTVERRUSR) |
| 615 | #endif /* FLASH_SR_RDERR */ |
615 | __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERRUSR) || |
| 616 | #if defined(FLASH_SR_OPTVERRUSR) |
616 | #endif /* FLASH_SR_OPTVERRUSR */ |
| 617 | __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERRUSR) || |
617 | __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR)) |
| 618 | #endif /* FLASH_SR_OPTVERRUSR */ |
618 | { |
| 619 | __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR)) |
619 | /*Save the error code*/ |
| 620 | { |
620 | FLASHRAM_SetErrorCode(); |
| 621 | /*Save the error code*/ |
621 | return HAL_ERROR; |
| 622 | FLASHRAM_SetErrorCode(); |
622 | } |
| 623 | return HAL_ERROR; |
623 | |
| 624 | } |
624 | /* There is no error flag set */ |
| 625 | 625 | return HAL_OK; |
|
| 626 | /* There is no error flag set */ |
626 | } |
| 627 | return HAL_OK; |
627 | |
| 628 | } |
628 | /** |
| 629 | 629 | * @} |
|
| 630 | /** |
630 | */ |
| 631 | * @} |
631 | |
| 632 | */ |
632 | /** |
| 633 | 633 | * @} |
|
| 634 | /** |
634 | */ |
| 635 | * @} |
635 | |
| 636 | */ |
636 | #endif /* HAL_FLASH_MODULE_ENABLED */ |
| 637 | 637 | /** |
|
| 638 | #endif /* HAL_FLASH_MODULE_ENABLED */ |
638 | * @} |
| 639 | /** |
639 | */ |
| 640 | * @} |
640 | |
| 641 | */ |
- | |
| 642 | - | ||
| 643 | - | ||
| 644 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
- | |