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/**
1
/**
2
  ******************************************************************************
2
  ******************************************************************************
3
  * @file    stm32l1xx_hal_dma.c
3
  * @file    stm32l1xx_hal_dma.c
4
  * @author  MCD Application Team
4
  * @author  MCD Application Team
5
  * @version V1.2.0
-
 
6
  * @date    01-July-2016
-
 
7
  * @brief   DMA HAL module driver.
5
  * @brief   DMA HAL module driver.
8
  *          This file provides firmware functions to manage the following
6
  *          This file provides firmware functions to manage the following
9
  *          functionalities of the Direct Memory Access (DMA) peripheral:
7
  *          functionalities of the Direct Memory Access (DMA) peripheral:
10
  *           + Initialization and de-initialization functions
8
  *           + Initialization and de-initialization functions
11
  *           + IO operation functions
9
  *           + IO operation functions
12
  *           + Peripheral State and errors functions
10
  *           + Peripheral State and errors functions
13
  @verbatim    
11
  @verbatim
14
  ==============================================================================      
12
  ==============================================================================
15
                        ##### How to use this driver #####
13
                        ##### How to use this driver #####
16
  ==============================================================================
14
  ==============================================================================
17
  [..]
15
  [..]
18
   (#) Enable and configure the peripheral to be connected to the DMA Channel
16
   (#) Enable and configure the peripheral to be connected to the DMA Channel
19
       (except for internal SRAM / FLASH memories: no initialization is
17
       (except for internal SRAM / FLASH memories: no initialization is
20
       necessary). Please refer to the Reference manual for connection between peripherals
18
       necessary). Please refer to the Reference manual for connection between peripherals
21
       and DMA requests.
19
       and DMA requests.
22
 
20
 
23
   (#) For a given Channel, program the required configuration through the following parameters:  
21
   (#) For a given Channel, program the required configuration through the following parameters:
24
       Channel request, Transfer Direction, Source and Destination data formats,
22
       Channel request, Transfer Direction, Source and Destination data formats,
25
       Circular or Normal mode, Channel Priority level, Source and Destination Increment mode
23
       Circular or Normal mode, Channel Priority level, Source and Destination Increment mode
26
       using HAL_DMA_Init() function.
24
       using HAL_DMA_Init() function.
27
 
25
 
28
   (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error
26
   (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error
29
       detection.
27
       detection.
30
                   
-
 
-
 
28
 
31
   (#) Use HAL_DMA_Abort() function to abort the current transfer
29
   (#) Use HAL_DMA_Abort() function to abort the current transfer
32
                   
-
 
-
 
30
 
33
     -@-   In Memory-to-Memory transfer mode, Circular mode is not allowed.
31
     -@-   In Memory-to-Memory transfer mode, Circular mode is not allowed.
34
     *** Polling mode IO operation ***
32
     *** Polling mode IO operation ***
35
     =================================  
33
     =================================
36
    [..]
34
     [..]
37
      (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source
35
       (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source
38
          address and destination address and the Length of data to be transferred
36
           address and destination address and the Length of data to be transferred
39
      (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this  
37
       (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this
40
          case a fixed Timeout can be configured by User depending from his application.
38
           case a fixed Timeout can be configured by User depending from his application.
41
 
39
 
42
     *** Interrupt mode IO operation ***    
40
     *** Interrupt mode IO operation ***
43
     ===================================
41
     ===================================
44
    [..]
42
     [..]
45
      (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority()
43
       (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority()
46
      (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ()
44
       (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ()
47
      (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of  
45
       (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of
48
          Source address and destination address and the Length of data to be transferred.
46
           Source address and destination address and the Length of data to be transferred.
49
          In this case the DMA interrupt is configured
47
           In this case the DMA interrupt is configured
50
          (+) Use HAL_DMA_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine
48
       (+) Use HAL_DMA_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine
51
      (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can
49
       (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can
52
          add his own function by customization of function pointer XferCpltCallback and
50
              add his own function to register callbacks with HAL_DMA_RegisterCallback().
53
              XferErrorCallback (i.e. a member of DMA handle structure).
-
 
54
 
51
 
55
     *** DMA HAL driver macros list ***
52
     *** DMA HAL driver macros list ***
56
     =============================================
53
     =============================================
57
     [..]
54
     [..]
58
       Below the list of most used macros in DMA HAL driver.
55
       Below the list of macros in DMA HAL driver.
59
 
56
 
60
       (+) __HAL_DMA_ENABLE: Enable the specified DMA Channel.
57
       (+) __HAL_DMA_ENABLE: Enable the specified DMA Channel.
61
       (+) __HAL_DMA_DISABLE: Disable the specified DMA Channel.
58
       (+) __HAL_DMA_DISABLE: Disable the specified DMA Channel.
62
       (+) __HAL_DMA_GET_FLAG: Get the DMA Channel pending flags.
59
       (+) __HAL_DMA_GET_FLAG: Get the DMA Channel pending flags.
63
       (+) __HAL_DMA_CLEAR_FLAG: Clear the DMA Channel pending flags.
60
       (+) __HAL_DMA_CLEAR_FLAG: Clear the DMA Channel pending flags.
64
       (+) __HAL_DMA_ENABLE_IT: Enable the specified DMA Channel interrupts.
61
       (+) __HAL_DMA_ENABLE_IT: Enable the specified DMA Channel interrupts.
65
       (+) __HAL_DMA_DISABLE_IT: Disable the specified DMA Channel interrupts.
62
       (+) __HAL_DMA_DISABLE_IT: Disable the specified DMA Channel interrupts.
66
       (+) __HAL_DMA_GET_IT_SOURCE: Check whether the specified DMA Channel interrupt has occurred or not.
63
       (+) __HAL_DMA_GET_IT_SOURCE: Check whether the specified DMA Channel interrupt is enabled or not.
67
 
64
 
68
     [..]
65
     [..]
69
      (@) You can refer to the DMA HAL driver header file for more useful macros  
66
      (@) You can refer to the DMA HAL driver header file for more useful macros
70
 
67
 
71
  @endverbatim
68
  @endverbatim
72
  ******************************************************************************
69
  ******************************************************************************
73
  * @attention
70
  * @attention
74
  *
71
  *
75
  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
72
  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-
 
73
  * All rights reserved.</center></h2>
76
  *
74
  *
77
  * Redistribution and use in source and binary forms, with or without modification,
75
  * This software component is licensed by ST under BSD 3-Clause license,
78
  * are permitted provided that the following conditions are met:
76
  * the "License"; You may not use this file except in compliance with the
79
  *   1. Redistributions of source code must retain the above copyright notice,
-
 
80
  *      this list of conditions and the following disclaimer.
-
 
81
  *   2. Redistributions in binary form must reproduce the above copyright notice,
-
 
82
  *      this list of conditions and the following disclaimer in the documentation
-
 
83
  *      and/or other materials provided with the distribution.
77
  * License. You may obtain a copy of the License at:
84
  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-
 
85
  *      may be used to endorse or promote products derived from this software
78
  *                        opensource.org/licenses/BSD-3-Clause
86
  *      without specific prior written permission.
-
 
87
  *
-
 
88
  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-
 
89
  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-
 
90
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-
 
91
  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-
 
92
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-
 
93
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-
 
94
  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-
 
95
  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-
 
96
  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-
 
97
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
 
98
  *
79
  *
99
  ******************************************************************************
80
  ******************************************************************************
100
  */
81
  */
101
 
82
 
102
/* Includes ------------------------------------------------------------------*/
83
/* Includes ------------------------------------------------------------------*/
103
#include "stm32l1xx_hal.h"
84
#include "stm32l1xx_hal.h"
104
 
85
 
105
/** @addtogroup STM32L1xx_HAL_Driver
86
/** @addtogroup STM32L1xx_HAL_Driver
Line 119... Line 100...
119
/* Private variables ---------------------------------------------------------*/
100
/* Private variables ---------------------------------------------------------*/
120
/* Private function prototypes -----------------------------------------------*/
101
/* Private function prototypes -----------------------------------------------*/
121
/** @defgroup DMA_Private_Functions DMA Private Functions
102
/** @defgroup DMA_Private_Functions DMA Private Functions
122
  * @{
103
  * @{
123
  */
104
  */
124
static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
-
 
125
 
105
 
-
 
106
static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
126
/**
107
/**
127
  * @}
108
  * @}
128
  */
109
  */
129
 
110
 
130
/* Exported functions ---------------------------------------------------------*/
111
/* Exported functions ---------------------------------------------------------*/
Line 132... Line 113...
132
/** @defgroup DMA_Exported_Functions DMA Exported Functions
113
/** @defgroup DMA_Exported_Functions DMA Exported Functions
133
  * @{
114
  * @{
134
  */
115
  */
135
 
116
 
136
/** @defgroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions
117
/** @defgroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions
137
 *  @brief   Initialization and de-initialization functions
118
 *  @brief   Initialization and de-initialization functions
138
 *
119
 *
139
@verbatim  
120
@verbatim
140
 ===============================================================================
121
 ===============================================================================
141
             ##### Initialization and de-initialization functions  #####
122
             ##### Initialization and de-initialization functions  #####
142
 ===============================================================================  
123
 ===============================================================================
143
    [..]
124
    [..]
144
    This section provides functions allowing to initialize the DMA Channel source
125
    This section provides functions allowing to initialize the DMA Channel source
145
    and destination addresses, incrementation and data sizes, transfer direction,
126
    and destination addresses, incrementation and data sizes, transfer direction,
146
    circular/normal mode selection, memory-to-memory mode selection and Channel priority value.
127
    circular/normal mode selection, memory-to-memory mode selection and Channel priority value.
147
    [..]
128
    [..]
148
    The HAL_DMA_Init() function follows the DMA configuration procedures as described in
129
    The HAL_DMA_Init() function follows the DMA configuration procedures as described in
149
    reference manual.  
130
    reference manual.
150
 
131
 
151
@endverbatim
132
@endverbatim
152
  * @{
133
  * @{
153
  */
134
  */
154
 
135
 
155
/**
136
/**
156
  * @brief  Initialize the DMA according to the specified
137
  * @brief  Initialize the DMA according to the specified
157
  *         parameters in the DMA_InitTypeDef and initialize the associated handle.
138
  *         parameters in the DMA_InitTypeDef and initialize the associated handle.
158
  * @param  hdma: Pointer to a DMA_HandleTypeDef structure that contains
139
  * @param  hdma Pointer to a DMA_HandleTypeDef structure that contains
159
  *               the configuration information for the specified DMA Channel.  
140
  *               the configuration information for the specified DMA Channel.
160
  * @retval HAL status
141
  * @retval HAL status
161
  */
142
  */
162
HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
143
HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
163
{
144
{
164
  uint32_t tmp = 0;
145
  uint32_t tmp;
165
 
146
 
166
  /* Check the DMA handle allocation */
147
  /* Check the DMA handle allocation */
167
  if(hdma == NULL)
148
  if(hdma == NULL)
168
  {
149
  {
169
    return HAL_ERROR;
150
    return HAL_ERROR;
170
  }
151
  }
171
 
152
 
172
  /* Check the parameters */
153
  /* Check the parameters */
173
  assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
154
  assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
174
  assert_param(IS_DMA_DIRECTION(hdma->Init.Direction));
155
  assert_param(IS_DMA_DIRECTION(hdma->Init.Direction));
175
  assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc));
156
  assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc));
176
  assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc));
157
  assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc));
177
  assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
158
  assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
178
  assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
159
  assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
179
  assert_param(IS_DMA_MODE(hdma->Init.Mode));
160
  assert_param(IS_DMA_MODE(hdma->Init.Mode));
180
  assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));
161
  assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));
181
 
162
 
182
#if defined (DMA2)
163
#if defined (DMA2)
183
  /* calculation of the channel index */
164
  /* Compute the channel index */
184
  if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))
165
  if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))
185
  {
166
  {
186
    /* DMA1 */
167
    /* DMA1 */
187
    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
168
    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2U;
188
    hdma->DmaBaseAddress = DMA1;
169
    hdma->DmaBaseAddress = DMA1;
189
  }
170
  }
190
  else
171
  else
191
  {
172
  {
192
    /* DMA2 */
173
    /* DMA2 */
193
    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2;
174
    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2U;
194
    hdma->DmaBaseAddress = DMA2;
175
    hdma->DmaBaseAddress = DMA2;
195
  }
176
  }
196
#else
177
#else
197
  /* calculation of the channel index */
178
  /* calculation of the channel index */
198
  /* DMA1 */
179
  /* DMA1 */
199
  hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
180
  hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2U;
200
  hdma->DmaBaseAddress = DMA1;
181
  hdma->DmaBaseAddress = DMA1;
201
#endif
182
#endif
202
 
183
 
203
  /* Change DMA peripheral state */
184
  /* Change DMA peripheral state */
204
  hdma->State = HAL_DMA_STATE_BUSY;
185
  hdma->State = HAL_DMA_STATE_BUSY;
205
 
186
 
206
  /* Get the CR register value */
187
  /* Get the CR register value */
207
  tmp = hdma->Instance->CCR;
188
  tmp = hdma->Instance->CCR;
208
 
189
 
209
  /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR bits */
190
  /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR and MEM2MEM bits */
210
  tmp &= ((uint32_t)~(DMA_CCR_PL    | DMA_CCR_MSIZE  | DMA_CCR_PSIZE  | \
191
  tmp &= ((uint32_t)~(DMA_CCR_PL    | DMA_CCR_MSIZE   | DMA_CCR_PSIZE  |
211
                      DMA_CCR_MINC  | DMA_CCR_PINC   | DMA_CCR_CIRC   | \
192
                      DMA_CCR_MINC  | DMA_CCR_PINC    | DMA_CCR_CIRC   |
212
                      DMA_CCR_DIR));
193
                      DMA_CCR_DIR   | DMA_CCR_MEM2MEM));
213
 
194
 
214
  /* Prepare the DMA Channel configuration */
195
  /* Prepare the DMA Channel configuration */
215
  tmp |=  hdma->Init.Direction        |
196
  tmp |=  hdma->Init.Direction        |
216
          hdma->Init.PeriphInc           | hdma->Init.MemInc           |
197
          hdma->Init.PeriphInc           | hdma->Init.MemInc           |
217
          hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
198
          hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
218
          hdma->Init.Mode                | hdma->Init.Priority;
199
          hdma->Init.Mode                | hdma->Init.Priority;
219
 
200
 
220
  /* Write to DMA Channel CR register */
201
  /* Write to DMA Channel CR register */
221
  hdma->Instance->CCR = tmp;  
202
  hdma->Instance->CCR = tmp;
222
 
-
 
223
  /* Clean callbacks */
-
 
224
  hdma->XferCpltCallback = NULL;
-
 
225
  hdma->XferHalfCpltCallback = NULL;
-
 
226
  hdma->XferErrorCallback = NULL;
-
 
227
  hdma->XferAbortCallback = NULL;
-
 
228
 
203
 
229
  /* Initialise the error code */
204
  /* Initialise the error code */
230
  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
205
  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
231
 
206
 
232
  /* Initialize the DMA state*/
207
  /* Initialize the DMA state*/
233
  hdma->State = HAL_DMA_STATE_READY;
208
  hdma->State = HAL_DMA_STATE_READY;
234
 
209
 
235
  /* Allocate lock resource and initialize it */
210
  /* Allocate lock resource and initialize it */
236
  hdma->Lock = HAL_UNLOCKED;
211
  hdma->Lock = HAL_UNLOCKED;
237
 
212
 
238
  return HAL_OK;
213
  return HAL_OK;
239
}
214
}
240
 
215
 
241
/**
216
/**
242
  * @brief  DeInitialize the DMA peripheral.
217
  * @brief  DeInitialize the DMA peripheral.
243
  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
218
  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
244
  *               the configuration information for the specified DMA Channel.  
219
  *               the configuration information for the specified DMA Channel.
245
  * @retval HAL status
220
  * @retval HAL status
246
  */
221
  */
247
HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
222
HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
248
{
223
{
-
 
224
 
249
  /* Check the DMA handle allocation */
225
  /* Check the DMA handle allocation */
250
  if (NULL == hdma )
226
  if (NULL == hdma )
251
  {
227
  {
252
    return HAL_ERROR;
228
    return HAL_ERROR;
253
  }
229
  }
Line 257... Line 233...
257
 
233
 
258
  /* Disable the selected DMA Channelx */
234
  /* Disable the selected DMA Channelx */
259
  __HAL_DMA_DISABLE(hdma);
235
  __HAL_DMA_DISABLE(hdma);
260
 
236
 
261
#if defined (DMA2)
237
#if defined (DMA2)
262
  /* calculation of the channel index */
238
  /* Compute the channel index */
263
  if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))
239
  if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))
264
  {
240
  {
265
    /* DMA1 */
241
    /* DMA1 */
266
    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
242
    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2U;
267
    hdma->DmaBaseAddress = DMA1;
243
    hdma->DmaBaseAddress = DMA1;
268
  }
244
  }
269
  else
245
  else
270
  {
246
  {
271
    /* DMA2 */
247
    /* DMA2 */
272
    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2;
248
    hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2U;
273
    hdma->DmaBaseAddress = DMA2;
249
    hdma->DmaBaseAddress = DMA2;
274
  }
250
  }
275
#else
251
#else
276
  /* calculation of the channel index */
252
  /* calculation of the channel index */
277
  /* DMA1 */
253
  /* DMA1 */
278
  hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
254
  hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2U;
279
  hdma->DmaBaseAddress = DMA1;
255
  hdma->DmaBaseAddress = DMA1;
280
#endif
256
#endif
281
 
-
 
282
  /* Reset DMA Channel control register */
-
 
283
  hdma->Instance->CCR  = 0;
-
 
284
 
-
 
285
  /* Reset DMA Channel Number of Data to Transfer register */
-
 
286
  hdma->Instance->CNDTR = 0;
-
 
287
 
257
 
288
  /* Reset DMA Channel peripheral address register */
-
 
289
  hdma->Instance->CPAR  = 0;
-
 
290
 
-
 
291
  /* Reset DMA Channel memory address register */
258
  /* Reset DMA Channel CR register */
292
  hdma->Instance->CMAR = 0;
259
  hdma->Instance->CCR = 0U;
293
 
260
 
294
  /* Clear all flags */
261
  /* Clear all flags */
295
  hdma->DmaBaseAddress->IFCR = ((DMA_ISR_GIF1) << (hdma->ChannelIndex));
262
  hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU));
-
 
263
 
-
 
264
  /* Clean callbacks */
-
 
265
  hdma->XferCpltCallback = NULL;
-
 
266
  hdma->XferHalfCpltCallback = NULL;
-
 
267
  hdma->XferErrorCallback = NULL;
-
 
268
  hdma->XferAbortCallback = NULL;
296
 
269
 
297
/* Initialise the error code */
270
  /* Initialise the error code */
298
  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
271
  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
299
 
272
 
300
  /* Initialize the DMA state */
273
  /* Initialize the DMA state */
301
  hdma->State = HAL_DMA_STATE_RESET;
274
  hdma->State = HAL_DMA_STATE_RESET;
302
 
275
 
Line 308... Line 281...
308
 
281
 
309
/**
282
/**
310
  * @}
283
  * @}
311
  */
284
  */
312
 
285
 
313
/** @defgroup DMA_Exported_Functions_Group2 Input and Output operation functions
286
/** @defgroup DMA_Exported_Functions_Group2 Input and Output operation functions
314
 *  @brief   Input and Output operation functions
287
 *  @brief   Input and Output operation functions
315
 *
288
 *
316
@verbatim  
289
@verbatim
317
 ===============================================================================
290
 ===============================================================================
318
                      #####  IO operation functions  #####
291
                      #####  IO operation functions  #####
319
 ===============================================================================  
292
 ===============================================================================
320
    [..]  This section provides functions allowing to:
293
    [..]  This section provides functions allowing to:
321
      (+) Configure the source, destination address and data length and Start DMA transfer
294
      (+) Configure the source, destination address and data length and Start DMA transfer
322
      (+) Configure the source, destination address and data length and
295
      (+) Configure the source, destination address and data length and
323
          Start DMA transfer with interrupt
296
          Start DMA transfer with interrupt
324
      (+) Abort DMA transfer
297
      (+) Abort DMA transfer
325
      (+) Poll for transfer complete
298
      (+) Poll for transfer complete
326
      (+) Handle DMA interrupt request  
299
      (+) Handle DMA interrupt request
327
 
300
 
328
@endverbatim
301
@endverbatim
329
  * @{
302
  * @{
330
  */
303
  */
331
 
304
 
332
/**
305
/**
333
  * @brief  Start the DMA Transfer.
306
  * @brief  Start the DMA Transfer.
334
  * @param  hdma      : pointer to a DMA_HandleTypeDef structure that contains
307
  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
335
  *                     the configuration information for the specified DMA Channel.  
308
  *               the configuration information for the specified DMA Channel.
336
  * @param  SrcAddress: The source memory Buffer address
309
  * @param  SrcAddress The source memory Buffer address
337
  * @param  DstAddress: The destination memory Buffer address
310
  * @param  DstAddress The destination memory Buffer address
338
  * @param  DataLength: The length of data to be transferred from source to destination
311
  * @param  DataLength The length of data to be transferred from source to destination
339
  * @retval HAL status
312
  * @retval HAL status
340
  */
313
  */
341
HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
314
HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
342
{
315
{
343
  HAL_StatusTypeDef status = HAL_OK;
316
  HAL_StatusTypeDef status = HAL_OK;
Line 348... Line 321...
348
  /* Process locked */
321
  /* Process locked */
349
  __HAL_LOCK(hdma);
322
  __HAL_LOCK(hdma);
350
 
323
 
351
  if(HAL_DMA_STATE_READY == hdma->State)
324
  if(HAL_DMA_STATE_READY == hdma->State)
352
  {
325
  {
353
  /* Change DMA peripheral state */
326
    /* Change DMA peripheral state */
354
  hdma->State = HAL_DMA_STATE_BUSY;
327
    hdma->State = HAL_DMA_STATE_BUSY;
355
    hdma->ErrorCode = HAL_DMA_ERROR_NONE;
328
    hdma->ErrorCode = HAL_DMA_ERROR_NONE;
356
 
329
 
357
  /* Disable the peripheral */
330
    /* Disable the peripheral */
358
  __HAL_DMA_DISABLE(hdma);
331
    __HAL_DMA_DISABLE(hdma);
359
 
332
 
360
    /* Configure the source, destination address and the data length & clear flags*/
333
    /* Configure the source, destination address and the data length & clear flags*/
361
  DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
334
    DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
362
 
335
 
363
  /* Enable the Peripheral */
336
    /* Enable the Peripheral */
364
  __HAL_DMA_ENABLE(hdma);
337
    __HAL_DMA_ENABLE(hdma);
365
  }
338
  }
366
  else
339
  else
367
  {
340
  {
368
   /* Process Unlocked */
341
    /* Process Unlocked */
369
   __HAL_UNLOCK(hdma);  
342
    __HAL_UNLOCK(hdma);
370
   status = HAL_BUSY;
343
    status = HAL_BUSY;
371
  }  
344
  }
372
  return status;
345
  return status;
373
}
346
}
374
 
347
 
375
/**
348
/**
376
  * @brief  Start the DMA Transfer with interrupt enabled.
349
  * @brief  Start the DMA Transfer with interrupt enabled.
377
  * @param  hdma:       pointer to a DMA_HandleTypeDef structure that contains
350
  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
378
  *                     the configuration information for the specified DMA Channel.  
351
  *               the configuration information for the specified DMA Channel.
379
  * @param  SrcAddress: The source memory Buffer address
352
  * @param  SrcAddress The source memory Buffer address
380
  * @param  DstAddress: The destination memory Buffer address
353
  * @param  DstAddress The destination memory Buffer address
381
  * @param  DataLength: The length of data to be transferred from source to destination
354
  * @param  DataLength The length of data to be transferred from source to destination
382
  * @retval HAL status
355
  * @retval HAL status
383
  */
356
  */
384
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
357
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
385
{
358
{
386
  HAL_StatusTypeDef status = HAL_OK;
359
  HAL_StatusTypeDef status = HAL_OK;
Line 391... Line 364...
391
  /* Process locked */
364
  /* Process locked */
392
  __HAL_LOCK(hdma);
365
  __HAL_LOCK(hdma);
393
 
366
 
394
  if(HAL_DMA_STATE_READY == hdma->State)
367
  if(HAL_DMA_STATE_READY == hdma->State)
395
  {
368
  {
396
  /* Change DMA peripheral state */
369
    /* Change DMA peripheral state */
397
  hdma->State = HAL_DMA_STATE_BUSY;
370
    hdma->State = HAL_DMA_STATE_BUSY;
398
    hdma->ErrorCode = HAL_DMA_ERROR_NONE;
371
    hdma->ErrorCode = HAL_DMA_ERROR_NONE;
399
 
372
 
400
  /* Disable the peripheral */
373
    /* Disable the peripheral */
401
  __HAL_DMA_DISABLE(hdma);
374
    __HAL_DMA_DISABLE(hdma);
402
 
375
 
403
    /* Configure the source, destination address and the data length & clear flags*/
376
    /* Configure the source, destination address and the data length & clear flags*/
404
  DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
377
    DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
405
 
378
 
406
  /* Enable the transfer complete interrupt */
379
    /* Enable the transfer complete interrupt */
407
  /* Enable the transfer Error interrupt */
380
    /* Enable the transfer Error interrupt */
408
    if(NULL != hdma->XferHalfCpltCallback )
381
    if(NULL != hdma->XferHalfCpltCallback )
409
    {
382
    {
410
      /* Enable the Half transfer complete interrupt as well */
383
      /* Enable the Half transfer complete interrupt as well */
411
      __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
384
      __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
412
    }
385
    }
413
    else
386
    else
414
    {
387
    {
415
      __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
388
      __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
416
      __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
389
      __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
417
    }
390
    }
-
 
391
 
418
   /* Enable the Peripheral */
392
    /* Enable the Peripheral */
419
  __HAL_DMA_ENABLE(hdma);
393
    __HAL_DMA_ENABLE(hdma);
420
  }
394
  }
421
  else
395
  else
422
  {      
396
  {
423
    /* Process Unlocked */
397
    /* Process Unlocked */
424
    __HAL_UNLOCK(hdma);
398
    __HAL_UNLOCK(hdma);
425
 
399
 
426
    /* Remain BUSY */
400
    /* Remain BUSY */
427
    status = HAL_BUSY;
401
    status = HAL_BUSY;
428
  }    
402
  }
429
  return status;
403
  return status;
430
}
404
}
431
 
405
 
432
/**
406
/**
433
  * @brief  Abort the DMA Transfer.
407
  * @brief  Abort the DMA Transfer.
434
  * @param  hdma  : pointer to a DMA_HandleTypeDef structure that contains
408
  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
435
  *                 the configuration information for the specified DMA Channel.
409
  *               the configuration information for the specified DMA Channel.
436
  * @retval HAL status
410
  * @retval HAL status
437
  */
411
  */
438
HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
412
HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
439
{
413
{
440
  HAL_StatusTypeDef status = HAL_OK;
414
  HAL_StatusTypeDef status = HAL_OK;
441
 
415
 
-
 
416
  /* Check the DMA peripheral state */
-
 
417
  if(hdma->State != HAL_DMA_STATE_BUSY)
-
 
418
  {
-
 
419
    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
-
 
420
 
-
 
421
    /* Process Unlocked */
-
 
422
    __HAL_UNLOCK(hdma);
-
 
423
 
-
 
424
    return HAL_ERROR;
-
 
425
  }
-
 
426
  else
-
 
427
  {
442
    /* Disable DMA IT */
428
    /* Disable DMA IT */
443
    __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
429
    __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
444
 
430
 
445
  /* Disable the channel */
431
    /* Disable the channel */
446
  __HAL_DMA_DISABLE(hdma);
432
    __HAL_DMA_DISABLE(hdma);
447
 
433
 
448
    /* Clear all flags */
434
    /* Clear all flags */
449
    hdma->DmaBaseAddress->IFCR = ((DMA_ISR_GIF1) << (hdma->ChannelIndex));
435
    hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU));
450
 
436
 
451
  /* Change the DMA state */
437
    /* Change the DMA state */
452
  hdma->State = HAL_DMA_STATE_READY;
438
    hdma->State = HAL_DMA_STATE_READY;
453
 
439
 
454
  /* Process Unlocked */
440
    /* Process Unlocked */
455
  __HAL_UNLOCK(hdma);
441
    __HAL_UNLOCK(hdma);
456
 
442
 
457
  return status;
443
    return status;
-
 
444
  }
458
}
445
}
459
 
446
 
460
/**
447
/**
461
  * @brief  Aborts the DMA Transfer in Interrupt mode.
448
  * @brief  Aborts the DMA Transfer in Interrupt mode.
462
  * @param  hdma  : pointer to a DMA_HandleTypeDef structure that contains
449
  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
463
  *                 the configuration information for the specified DMA Stream.
450
  *                 the configuration information for the specified DMA Channel.
464
  * @retval HAL status
451
  * @retval HAL status
465
  */
452
  */
466
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
453
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
467
{  
454
{
468
  HAL_StatusTypeDef status = HAL_OK;
455
  HAL_StatusTypeDef status = HAL_OK;
469
 
456
 
470
  if(HAL_DMA_STATE_BUSY != hdma->State)
457
  if(HAL_DMA_STATE_BUSY != hdma->State)
471
  {
458
  {
472
    /* no transfer ongoing */
459
    /* no transfer ongoing */
473
    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
460
    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
474
 
461
 
Line 481... Line 468...
481
 
468
 
482
    /* Disable the channel */
469
    /* Disable the channel */
483
    __HAL_DMA_DISABLE(hdma);
470
    __HAL_DMA_DISABLE(hdma);
484
 
471
 
485
    /* Clear all flags */
472
    /* Clear all flags */
486
    hdma->DmaBaseAddress->IFCR = ((DMA_ISR_GIF1) << (hdma->ChannelIndex));
473
    hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU));
487
 
474
 
488
    /* Change the DMA state */
475
    /* Change the DMA state */
489
    hdma->State = HAL_DMA_STATE_READY;
476
    hdma->State = HAL_DMA_STATE_READY;
490
 
477
 
491
    /* Process Unlocked */
478
    /* Process Unlocked */
Line 493... Line 480...
493
 
480
 
494
    /* Call User Abort callback */
481
    /* Call User Abort callback */
495
    if(hdma->XferAbortCallback != NULL)
482
    if(hdma->XferAbortCallback != NULL)
496
    {
483
    {
497
      hdma->XferAbortCallback(hdma);
484
      hdma->XferAbortCallback(hdma);
498
    }
485
    }
499
  }
486
  }
500
  return status;
487
  return status;
501
}
488
}
502
 
489
 
503
/**
490
/**
504
  * @brief  Polling for transfer complete.
491
  * @brief  Polling for transfer complete.
505
  * @param  hdma:    pointer to a DMA_HandleTypeDef structure that contains
492
  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
506
  *                  the configuration information for the specified DMA Channel.
493
  *                  the configuration information for the specified DMA Channel.
507
  * @param  CompleteLevel: Specifies the DMA level complete.  
494
  * @param  CompleteLevel Specifies the DMA level complete.
508
  * @param  Timeout:       Timeout duration.
495
  * @param  Timeout       Timeout duration.
509
  * @retval HAL status
496
  * @retval HAL status
510
  */
497
  */
511
HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout)
498
HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_LevelCompleteTypeDef CompleteLevel, uint32_t Timeout)
512
{
499
{
513
  uint32_t temp;
500
  uint32_t temp;
514
  uint32_t tickstart = 0;
501
  uint32_t tickstart;
515
 
502
 
516
  if(HAL_DMA_STATE_BUSY != hdma->State)
503
  if(HAL_DMA_STATE_BUSY != hdma->State)
517
  {
504
  {
518
    /* no transfer ongoing */
505
    /* no transfer ongoing */
519
    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
506
    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
520
    __HAL_UNLOCK(hdma);
507
    __HAL_UNLOCK(hdma);
521
    return HAL_ERROR;
508
    return HAL_ERROR;
522
  }
509
  }
523
 
510
 
524
  /* Polling mode not supported in circular mode */
511
  /* Polling mode not supported in circular mode */
525
  if (RESET != (hdma->Instance->CCR & DMA_CCR_CIRC))
512
  if ((hdma->Instance->CCR & DMA_CCR_CIRC) != 0U)
526
  {
513
  {
527
    hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
514
    hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
528
    return HAL_ERROR;
515
    return HAL_ERROR;
529
  }
516
  }
530
 
517
 
531
  /* Get the level transfer complete flag */
518
  /* Get the level transfer complete flag */
532
  if (HAL_DMA_FULL_TRANSFER == CompleteLevel)
519
  if (HAL_DMA_FULL_TRANSFER == CompleteLevel)
533
  {
520
  {
534
    /* Transfer Complete flag */
521
    /* Transfer Complete flag */
535
    temp = DMA_FLAG_TC1 << hdma->ChannelIndex;
522
    temp = DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1CU);
536
  }
523
  }
537
  else
524
  else
538
  {
525
  {
539
    /* Half Transfer Complete flag */
526
    /* Half Transfer Complete flag */
540
    temp = DMA_FLAG_HT1 << hdma->ChannelIndex;
527
    temp = DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1CU);
541
  }
528
  }
542
 
529
 
543
  /* Get tick */
530
  /* Get tick */
544
  tickstart = HAL_GetTick();
531
  tickstart = HAL_GetTick();
545
 
532
 
546
  while(RESET == (hdma->DmaBaseAddress->ISR & temp))
533
  while((hdma->DmaBaseAddress->ISR & temp) == 0U)
547
  {
534
  {
548
    if((RESET != (hdma->DmaBaseAddress->ISR & (DMA_FLAG_TE1 << hdma->ChannelIndex))))    
535
    if((hdma->DmaBaseAddress->ISR & (DMA_FLAG_TE1 << (hdma->ChannelIndex& 0x1CU))) != 0U)
549
    {      
536
    {
550
      /* When a DMA transfer error occurs */
537
      /* When a DMA transfer error occurs */
551
      /* A hardware clear of its EN bits is performed */
538
      /* A hardware clear of its EN bits is performed */
552
      /* Clear all flags */
539
      /* Clear all flags */
553
      hdma->DmaBaseAddress->IFCR = ((DMA_ISR_GIF1) << (hdma->ChannelIndex));
540
      hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU));
554
     
541
 
555
      /* Update error code */
542
      /* Update error code */
556
      hdma->ErrorCode = HAL_DMA_ERROR_TE;
543
      hdma->ErrorCode = HAL_DMA_ERROR_TE;
557
 
544
 
558
      /* Change the DMA state */
545
      /* Change the DMA state */
559
      hdma->State= HAL_DMA_STATE_READY;
546
      hdma->State= HAL_DMA_STATE_READY;
560
     
547
 
561
      /* Process Unlocked */
548
      /* Process Unlocked */
562
      __HAL_UNLOCK(hdma);
549
      __HAL_UNLOCK(hdma);
563
     
550
 
564
      return HAL_ERROR;
551
      return HAL_ERROR;
565
    }
552
    }
566
    /* Check for the Timeout */
553
    /* Check for the Timeout */
567
    if(Timeout != HAL_MAX_DELAY)
554
    if(Timeout != HAL_MAX_DELAY)
568
    {
555
    {
569
      if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
556
      if(((HAL_GetTick() - tickstart) > Timeout) ||  (Timeout == 0U))
570
      {
557
      {
571
        /* Update error code */
558
        /* Update error code */
572
        hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
559
        hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
573
       
560
 
574
        /* Change the DMA state */
561
        /* Change the DMA state */
575
        hdma->State = HAL_DMA_STATE_READY;
562
        hdma->State = HAL_DMA_STATE_READY;
576
 
563
 
577
        /* Process Unlocked */
564
        /* Process Unlocked */
578
        __HAL_UNLOCK(hdma);
565
        __HAL_UNLOCK(hdma);
579
       
566
 
580
        return HAL_ERROR;
567
        return HAL_ERROR;
581
      }
568
      }
582
    }
569
    }
583
  }
570
  }
584
 
571
 
585
  if(HAL_DMA_FULL_TRANSFER == CompleteLevel)
572
  if(HAL_DMA_FULL_TRANSFER == CompleteLevel)
586
  {
573
  {
587
    /* Clear the transfer complete flag */
574
    /* Clear the transfer complete flag */
588
    hdma->DmaBaseAddress->IFCR  = (DMA_FLAG_TC1 << hdma->ChannelIndex);
575
    hdma->DmaBaseAddress->IFCR = (DMA_FLAG_TC1 << (hdma->ChannelIndex& 0x1CU));
589
 
576
 
590
    /* The selected Channelx EN bit is cleared (DMA is disabled and
577
    /* The selected Channelx EN bit is cleared (DMA is disabled and
591
    all transfers are complete) */
578
    all transfers are complete) */
592
    hdma->State = HAL_DMA_STATE_READY;
579
    hdma->State = HAL_DMA_STATE_READY;
593
  }
580
  }
594
  else
581
  else
595
  {
582
  {
596
    /* Clear the half transfer complete flag */
583
    /* Clear the half transfer complete flag */
597
    hdma->DmaBaseAddress->IFCR = (DMA_FLAG_HT1 << hdma->ChannelIndex);
584
    hdma->DmaBaseAddress->IFCR = (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1CU));
598
  }
585
  }
599
 
586
 
600
  /* Process unlocked */
587
  /* Process unlocked */
601
  __HAL_UNLOCK(hdma);
588
  __HAL_UNLOCK(hdma);
602
 
589
 
603
  return HAL_OK;
590
  return HAL_OK;
604
}
591
}
605
 
592
 
606
/**
593
/**
607
  * @brief  Handle DMA interrupt request.
594
  * @brief  Handle DMA interrupt request.
608
  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
595
  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
609
  *               the configuration information for the specified DMA Channel.  
596
  *               the configuration information for the specified DMA Channel.
610
  * @retval None
597
  * @retval None
611
  */
598
  */
612
void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
599
void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
613
{
600
{
614
  uint32_t flag_it = hdma->DmaBaseAddress->ISR;
601
  uint32_t flag_it = hdma->DmaBaseAddress->ISR;
615
  uint32_t source_it = hdma->Instance->CCR;
602
  uint32_t source_it = hdma->Instance->CCR;
616
     
603
 
617
  /* Half Transfer Complete Interrupt management ******************************/
604
  /* Half Transfer Complete Interrupt management ******************************/
618
  if ((RESET != (flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_HT)))
605
  if (((flag_it & (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1CU))) != 0U) && ((source_it & DMA_IT_HT) != 0U))
619
    {
606
  {
620
      /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
607
    /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
621
      if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
608
    if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
622
      {
609
    {
623
        /* Disable the half transfer interrupt */
610
      /* Disable the half transfer interrupt */
624
        __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
611
      __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
625
      }
612
    }
626
      /* Clear the half transfer complete flag */
613
    /* Clear the half transfer complete flag */
627
      hdma->DmaBaseAddress->IFCR  = (DMA_ISR_HTIF1 << hdma->ChannelIndex);
614
    hdma->DmaBaseAddress->IFCR = DMA_ISR_HTIF1 << (hdma->ChannelIndex & 0x1CU);
628
 
615
 
629
      /* DMA peripheral state is not updated in Half Transfer */
616
    /* DMA peripheral state is not updated in Half Transfer */
630
      /* but in Transfer Complete case */
617
    /* but in Transfer Complete case */
631
 
618
 
632
      if(hdma->XferHalfCpltCallback != NULL)
619
    if(hdma->XferHalfCpltCallback != NULL)
633
      {
620
    {
634
        /* Half transfer callback */
621
      /* Half transfer callback */
635
        hdma->XferHalfCpltCallback(hdma);
622
      hdma->XferHalfCpltCallback(hdma);
636
      }
-
 
637
    }
623
    }
638
 
624
  }
-
 
625
 
639
  /* Transfer Complete Interrupt management ***********************************/
626
  /* Transfer Complete Interrupt management ***********************************/
640
  else if ((RESET != (flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TC)))
627
  else if (((flag_it & (DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1CU))) != 0U) && ((source_it & DMA_IT_TC) != 0U))
641
  {
628
  {
-
 
629
   
642
    if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
630
    if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
643
    {
631
    {
-
 
632
      /* Disable the transfer complete interrupt if the DMA mode is not CIRCULAR */
-
 
633
      /* Disable the transfer complete and error interrupt */
644
    /* Disable TE & TC */
634
      /* if the DMA mode is not CIRCULAR  */
645
    __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);  
635
      __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);
646
 
636
 
647
    /* Change the DMA state */
637
      /* Change the DMA state */
648
    hdma->State = HAL_DMA_STATE_READY;
638
      hdma->State = HAL_DMA_STATE_READY;
649
    }
639
    }
650
   
-
 
651
    /* Clear the transfer complete flag */
640
    /* Clear the transfer complete flag */
652
    hdma->DmaBaseAddress->IFCR = (DMA_ISR_TCIF1 << hdma->ChannelIndex);
641
    hdma->DmaBaseAddress->IFCR = (DMA_ISR_TCIF1 << (hdma->ChannelIndex & 0x1CU));
653
 
642
 
654
    /* Process Unlocked */
643
    /* Process Unlocked */
655
    __HAL_UNLOCK(hdma);
644
    __HAL_UNLOCK(hdma);
656
 
645
 
657
    if(hdma->XferCpltCallback != NULL)
646
    if(hdma->XferCpltCallback != NULL)
658
    {
647
    {
Line 660... Line 649...
660
      hdma->XferCpltCallback(hdma);
649
      hdma->XferCpltCallback(hdma);
661
    }
650
    }
662
  }
651
  }
663
 
652
 
664
  /* Transfer Error Interrupt management **************************************/
653
  /* Transfer Error Interrupt management **************************************/
665
  else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE)))
654
  else if (((flag_it & (DMA_FLAG_TE1 << (hdma->ChannelIndex & 0x1CU))) != 0U) && ((source_it & DMA_IT_TE) !=  0U))
666
  {
655
  {
667
    /* When a DMA transfer error occurs */
656
    /* When a DMA transfer error occurs */
668
    /* A hardware clear of its EN bits is performed */
657
    /* A hardware clear of its EN bits is performed */
669
    /* Disable ALL DMA IT */
658
    /* Disable ALL DMA IT */
670
    __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
659
    __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
671
 
660
 
672
    /* Clear all flags */
661
    /* Clear all flags */
673
    hdma->DmaBaseAddress->IFCR  = (DMA_ISR_GIF1 << hdma->ChannelIndex);
662
    hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU));
674
 
663
 
675
      /* Update error code */
664
    /* Update error code */
676
    hdma->ErrorCode = HAL_DMA_ERROR_TE;
665
    hdma->ErrorCode = HAL_DMA_ERROR_TE;
677
 
666
 
678
      /* Change the DMA state */
667
    /* Change the DMA state */
679
      hdma->State = HAL_DMA_STATE_READY;
668
    hdma->State = HAL_DMA_STATE_READY;
680
   
669
 
681
      /* Process Unlocked */
670
    /* Process Unlocked */
682
      __HAL_UNLOCK(hdma);
671
    __HAL_UNLOCK(hdma);
683
   
672
 
684
    if (hdma->XferErrorCallback != NULL)
673
    if (hdma->XferErrorCallback != NULL)
685
      {      
674
    {
686
      /* Transfer error callback */
675
      /* Transfer error callback */
687
      hdma->XferErrorCallback(hdma);
676
      hdma->XferErrorCallback(hdma);
688
      }
-
 
689
    }
677
    }
-
 
678
  }
-
 
679
  else
-
 
680
  {
-
 
681
    /* Nothing To Do */
-
 
682
  }
690
  return;
683
  return;
691
}
684
}
692
 
685
 
693
/**
686
/**
694
  * @brief  Register callbacks
687
  * @brief  Register callbacks
695
  * @param  hdma:                 pointer to a DMA_HandleTypeDef structure that contains
688
  * @param  hdma                 pointer to a DMA_HandleTypeDef structure that contains
696
  *                               the configuration information for the specified DMA Stream.
689
  *                               the configuration information for the specified DMA Channel.
697
  * @param  CallbackID:           User Callback identifer
690
  * @param  CallbackID           User Callback identifer
698
  *                               a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
691
  *                               a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
699
  * @param  pCallback:            pointer to private callbacsk function which has pointer to
692
  * @param  pCallback            pointer to private callbacsk function which has pointer to
700
  *                               a DMA_HandleTypeDef structure as parameter.
693
  *                               a DMA_HandleTypeDef structure as parameter.
701
  * @retval HAL status
694
  * @retval HAL status
702
  */                          
695
  */
703
HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)( DMA_HandleTypeDef * _hdma))
696
HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)( DMA_HandleTypeDef * _hdma))
704
{
697
{
705
  HAL_StatusTypeDef status = HAL_OK;
698
  HAL_StatusTypeDef status = HAL_OK;
706
 
699
 
707
  /* Process locked */
700
  /* Process locked */
708
  __HAL_LOCK(hdma);
701
  __HAL_LOCK(hdma);
709
 
702
 
710
  if(HAL_DMA_STATE_READY == hdma->State)
703
  if(HAL_DMA_STATE_READY == hdma->State)
711
  {
704
  {
712
    switch (CallbackID)
705
    switch (CallbackID)
713
    {
706
    {
714
     case  HAL_DMA_XFER_CPLT_CB_ID:
707
     case  HAL_DMA_XFER_CPLT_CB_ID:
715
           hdma->XferCpltCallback = pCallback;
708
           hdma->XferCpltCallback = pCallback;
716
           break;
709
           break;
717
       
710
 
718
     case  HAL_DMA_XFER_HALFCPLT_CB_ID:
711
     case  HAL_DMA_XFER_HALFCPLT_CB_ID:
719
           hdma->XferHalfCpltCallback = pCallback;
712
           hdma->XferHalfCpltCallback = pCallback;
720
           break;        
713
           break;
721
 
714
 
722
     case  HAL_DMA_XFER_ERROR_CB_ID:
715
     case  HAL_DMA_XFER_ERROR_CB_ID:
723
           hdma->XferErrorCallback = pCallback;
716
           hdma->XferErrorCallback = pCallback;
724
           break;        
717
           break;
725
           
718
 
726
     case  HAL_DMA_XFER_ABORT_CB_ID:
719
     case  HAL_DMA_XFER_ABORT_CB_ID:
727
           hdma->XferAbortCallback = pCallback;
720
           hdma->XferAbortCallback = pCallback;
728
           break;
721
           break;
729
           
722
 
730
     default:
723
     default:
731
           status = HAL_ERROR;
724
           status = HAL_ERROR;
732
           break;                                                            
725
           break;
733
    }
726
    }
734
  }
727
  }
735
  else
728
  else
736
  {
729
  {
737
    status = HAL_ERROR;
730
    status = HAL_ERROR;
738
  }
731
  }
739
 
732
 
740
  /* Release Lock */
733
  /* Release Lock */
741
  __HAL_UNLOCK(hdma);
734
  __HAL_UNLOCK(hdma);
742
 
735
 
743
  return status;
736
  return status;
744
}
737
}
745
 
738
 
746
/**
739
/**
747
  * @brief  UnRegister callbacks
740
  * @brief  UnRegister callbacks
748
  * @param  hdma:                 pointer to a DMA_HandleTypeDef structure that contains
741
  * @param  hdma                 pointer to a DMA_HandleTypeDef structure that contains
749
  *                               the configuration information for the specified DMA Stream.
742
  *                               the configuration information for the specified DMA Channel.
750
  * @param  CallbackID:           User Callback identifer
743
  * @param  CallbackID           User Callback identifer
751
  *                               a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
744
  *                               a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
752
  * @retval HAL status
745
  * @retval HAL status
753
  */              
746
  */
754
HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID)
747
HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID)
755
{
748
{
756
  HAL_StatusTypeDef status = HAL_OK;
749
  HAL_StatusTypeDef status = HAL_OK;
757
 
750
 
758
    /* Process locked */
751
    /* Process locked */
759
  __HAL_LOCK(hdma);
752
  __HAL_LOCK(hdma);
760
 
753
 
761
  if(HAL_DMA_STATE_READY == hdma->State)
754
  if(HAL_DMA_STATE_READY == hdma->State)
762
  {
755
  {
763
    switch (CallbackID)
756
    switch (CallbackID)
764
    {
757
    {
765
     case  HAL_DMA_XFER_CPLT_CB_ID:
758
     case  HAL_DMA_XFER_CPLT_CB_ID:
766
           hdma->XferCpltCallback = NULL;
759
           hdma->XferCpltCallback = NULL;
767
           break;
760
           break;
768
       
761
 
769
     case  HAL_DMA_XFER_HALFCPLT_CB_ID:
762
     case  HAL_DMA_XFER_HALFCPLT_CB_ID:
770
           hdma->XferHalfCpltCallback = NULL;
763
           hdma->XferHalfCpltCallback = NULL;
771
           break;        
764
           break;
772
 
765
 
773
     case  HAL_DMA_XFER_ERROR_CB_ID:
766
     case  HAL_DMA_XFER_ERROR_CB_ID:
774
           hdma->XferErrorCallback = NULL;
767
           hdma->XferErrorCallback = NULL;
775
           break;        
768
           break;
776
           
769
 
777
     case  HAL_DMA_XFER_ABORT_CB_ID:
770
     case  HAL_DMA_XFER_ABORT_CB_ID:
778
           hdma->XferAbortCallback = NULL;
771
           hdma->XferAbortCallback = NULL;
779
           break;
772
           break;
780
     
773
 
781
    case   HAL_DMA_XFER_ALL_CB_ID:
774
    case   HAL_DMA_XFER_ALL_CB_ID:
782
           hdma->XferCpltCallback = NULL;
775
           hdma->XferCpltCallback = NULL;
783
           hdma->XferHalfCpltCallback = NULL;
776
           hdma->XferHalfCpltCallback = NULL;
784
           hdma->XferErrorCallback = NULL;
777
           hdma->XferErrorCallback = NULL;
785
           hdma->XferAbortCallback = NULL;
778
           hdma->XferAbortCallback = NULL;
786
           break;
779
           break;
787
     
780
 
788
    default:
781
    default:
789
           status = HAL_ERROR;
782
           status = HAL_ERROR;
790
           break;                                                            
783
           break;
791
    }
784
    }
792
  }
785
  }
793
  else
786
  else
794
  {
787
  {
795
    status = HAL_ERROR;
788
    status = HAL_ERROR;
796
  }
789
  }
797
 
790
 
798
  /* Release Lock */
791
  /* Release Lock */
799
  __HAL_UNLOCK(hdma);
792
  __HAL_UNLOCK(hdma);
800
 
793
 
801
  return status;
794
  return status;
802
}
795
}
803
 
796
 
804
/**
797
/**
805
  * @}
798
  * @}
Line 808... Line 801...
808
 
801
 
809
 
802
 
810
/** @defgroup DMA_Exported_Functions_Group3 Peripheral State and Errors functions
803
/** @defgroup DMA_Exported_Functions_Group3 Peripheral State and Errors functions
811
 *  @brief    Peripheral State and Errors functions
804
 *  @brief    Peripheral State and Errors functions
812
 *
805
 *
813
@verbatim  
806
@verbatim
814
 ===============================================================================
807
 ===============================================================================
815
            ##### Peripheral State and Errors functions #####
808
            ##### Peripheral State and Errors functions #####
816
 ===============================================================================
809
 ===============================================================================
817
    [..]
810
    [..]
818
    This subsection provides functions allowing to
811
    This subsection provides functions allowing to
Line 822... Line 815...
822
@endverbatim
815
@endverbatim
823
  * @{
816
  * @{
824
  */
817
  */
825
 
818
 
826
/**
819
/**
827
  * @brief  Return the DMA hande state.
820
  * @brief  Return the DMA handle state.
828
  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
821
  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
829
  *               the configuration information for the specified DMA Channel.  
822
  *               the configuration information for the specified DMA Channel.
830
  * @retval HAL state
823
  * @retval HAL state
831
  */
824
  */
832
HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma)
825
HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma)
833
{
826
{
834
  /* Return DMA handle state */
827
  /* Return DMA handle state */
835
  return hdma->State;
828
  return hdma->State;
836
}
829
}
837
 
830
 
838
/**
831
/**
839
  * @brief  Return the DMA error code.
832
  * @brief  Return the DMA error code.
840
  * @param  hdma : pointer to a DMA_HandleTypeDef structure that contains
833
  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
841
  *              the configuration information for the specified DMA Channel.
834
  *              the configuration information for the specified DMA Channel.
842
  * @retval DMA Error Code
835
  * @retval DMA Error Code
843
  */
836
  */
844
uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
837
uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
845
{
838
{
Line 858... Line 851...
858
  * @{
851
  * @{
859
  */
852
  */
860
 
853
 
861
/**
854
/**
862
  * @brief  Sets the DMA Transfer parameter.
855
  * @brief  Sets the DMA Transfer parameter.
863
  * @param  hdma:       pointer to a DMA_HandleTypeDef structure that contains
856
  * @param  hdma       pointer to a DMA_HandleTypeDef structure that contains
864
  *                     the configuration information for the specified DMA Channel.  
857
  *                     the configuration information for the specified DMA Channel.
865
  * @param  SrcAddress: The source memory Buffer address
858
  * @param  SrcAddress The source memory Buffer address
866
  * @param  DstAddress: The destination memory Buffer address
859
  * @param  DstAddress The destination memory Buffer address
867
  * @param  DataLength: The length of data to be transferred from source to destination
860
  * @param  DataLength The length of data to be transferred from source to destination
868
  * @retval HAL status
861
  * @retval HAL status
869
  */
862
  */
870
static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
863
static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
871
{
864
{
872
  /* Clear all flags */
865
  /* Clear all flags */
873
  hdma->DmaBaseAddress->IFCR  = (DMA_ISR_GIF1 << hdma->ChannelIndex);
866
  hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU));
874
 
867
 
875
  /* Configure DMA Channel data length */
868
  /* Configure DMA Channel data length */
876
  hdma->Instance->CNDTR = DataLength;
869
  hdma->Instance->CNDTR = DataLength;
877
 
870
 
878
  /* Peripheral to Memory */
871
  /* Memory to Peripheral */
879
  if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
872
  if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
880
  {
873
  {
881
    /* Configure DMA Channel destination address */
874
    /* Configure DMA Channel destination address */
882
    hdma->Instance->CPAR = DstAddress;
875
    hdma->Instance->CPAR = DstAddress;
883
   
876
 
884
    /* Configure DMA Channel source address */
877
    /* Configure DMA Channel source address */
885
    hdma->Instance->CMAR = SrcAddress;
878
    hdma->Instance->CMAR = SrcAddress;
886
  }
879
  }
887
  /* Memory to Peripheral */
880
  /* Peripheral to Memory */
888
  else
881
  else
889
  {
882
  {
890
    /* Configure DMA Channel source address */
883
    /* Configure DMA Channel source address */
891
    hdma->Instance->CPAR = SrcAddress;
884
    hdma->Instance->CPAR = SrcAddress;
892
   
885
 
893
    /* Configure DMA Channel destination address */
886
    /* Configure DMA Channel destination address */
894
    hdma->Instance->CMAR = DstAddress;
887
    hdma->Instance->CMAR = DstAddress;
895
  }
888
  }
896
}
889
}
897
 
890