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1 | /** |
1 | /** |
2 | ****************************************************************************** |
2 | ****************************************************************************** |
3 | * @file stm32l1xx_hal_dac.c |
3 | * @file stm32l1xx_hal_dac.c |
4 | * @author MCD Application Team |
4 | * @author MCD Application Team |
5 | * @brief DAC HAL module driver. |
5 | * @brief DAC HAL module driver. |
6 | * This file provides firmware functions to manage the following |
6 | * This file provides firmware functions to manage the following |
7 | * functionalities of the Digital to Analog Converter (DAC) peripheral: |
7 | * functionalities of the Digital to Analog Converter (DAC) peripheral: |
8 | * + Initialization and de-initialization functions |
8 | * + Initialization and de-initialization functions |
9 | * + IO operation functions |
9 | * + IO operation functions |
10 | * + Peripheral Control functions |
10 | * + Peripheral Control functions |
11 | * + Peripheral State and Errors functions |
11 | * + Peripheral State and Errors functions |
12 | * |
12 | * |
13 | * |
13 | * |
14 | @verbatim |
14 | ****************************************************************************** |
15 | ============================================================================== |
15 | * @attention |
16 | ##### DAC Peripheral features ##### |
16 | * |
17 | ============================================================================== |
17 | * Copyright (c) 2016 STMicroelectronics. |
18 | [..] |
18 | * All rights reserved. |
19 | *** DAC Channels *** |
19 | * |
20 | ==================== |
20 | * This software is licensed under terms that can be found in the LICENSE file |
21 | [..] |
21 | * in the root directory of this software component. |
22 | STM32L1 devices integrate two 12-bit Digital Analog Converters |
22 | * If no LICENSE file comes with this software, it is provided AS-IS. |
23 | 23 | * |
|
24 | The 2 converters (i.e. channel1 & channel2) |
24 | ****************************************************************************** |
25 | can be used independently or simultaneously (dual mode): |
25 | @verbatim |
26 | (#) DAC channel1 with DAC_OUT1 (PA4) as output or connected to on-chip |
26 | ============================================================================== |
27 | peripherals (ex. timers). |
27 | ##### DAC Peripheral features ##### |
28 | (#) DAC channel2 with DAC_OUT2 (PA5) as output or connected to on-chip |
28 | ============================================================================== |
29 | peripherals (ex. timers). |
29 | [..] |
30 | 30 | *** DAC Channels *** |
|
31 | *** DAC Triggers *** |
31 | ==================== |
32 | ==================== |
32 | [..] |
33 | [..] |
33 | STM32L1 devices integrate two 12-bit Digital Analog Converters |
34 | Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE |
34 | |
35 | and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register. |
35 | The 2 converters (i.e. channel1 & channel2) |
36 | [..] |
36 | can be used independently or simultaneously (dual mode): |
37 | Digital to Analog conversion can be triggered by: |
37 | (#) DAC channel1 with DAC_OUT1 (PA4) as output or connected to on-chip |
38 | (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9. |
38 | peripherals (ex. timers). |
39 | The used pin (GPIOx_PIN_9) must be configured in input mode. |
39 | (#) DAC channel2 with DAC_OUT2 (PA5) as output or connected to on-chip |
40 | 40 | peripherals (ex. timers). |
|
41 | (#) Timers TRGO: TIM2, TIM4, TIM6, TIM7, TIM9 |
41 | |
42 | (DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T4_TRGO...) |
42 | *** DAC Triggers *** |
43 | 43 | ==================== |
|
44 | (#) Software using DAC_TRIGGER_SOFTWARE |
44 | [..] |
45 | 45 | Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE |
|
46 | *** DAC Buffer mode feature *** |
46 | and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register. |
47 | =============================== |
47 | [..] |
48 | [..] |
48 | Digital to Analog conversion can be triggered by: |
49 | Each DAC channel integrates an output buffer that can be used to |
49 | (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9. |
50 | reduce the output impedance, and to drive external loads directly |
50 | The used pin (GPIOx_PIN_9) must be configured in input mode. |
51 | without having to add an external operational amplifier. |
51 | |
52 | To enable, the output buffer use |
52 | (#) Timers TRGO: TIM2, TIM4, TIM6, TIM7, TIM9 |
53 | sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE; |
53 | (DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T4_TRGO...) |
54 | [..] |
54 | |
55 | (@) Refer to the device datasheet for more details about output |
55 | (#) Software using DAC_TRIGGER_SOFTWARE |
56 | impedance value with and without output buffer. |
56 | |
57 | 57 | *** DAC Buffer mode feature *** |
|
58 | *** GPIO configurations guidelines *** |
58 | =============================== |
59 | ===================== |
59 | [..] |
60 | [..] |
60 | Each DAC channel integrates an output buffer that can be used to |
61 | When a DAC channel is used (ex channel1 on PA4) and the other is not |
61 | reduce the output impedance, and to drive external loads directly |
62 | (ex channel2 on PA5 is configured in Analog and disabled). |
62 | without having to add an external operational amplifier. |
63 | Channel1 may disturb channel2 as coupling effect. |
63 | To enable, the output buffer use |
64 | Note that there is no coupling on channel2 as soon as channel2 is turned on. |
64 | sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE; |
65 | Coupling on adjacent channel could be avoided as follows: |
65 | [..] |
66 | when unused PA5 is configured as INPUT PULL-UP or DOWN. |
66 | (@) Refer to the device datasheet for more details about output |
67 | PA5 is configured in ANALOG just before it is turned on. |
67 | impedance value with and without output buffer. |
68 | 68 | ||
69 | *** DAC wave generation feature *** |
69 | *** GPIO configurations guidelines *** |
70 | =================================== |
70 | ===================== |
71 | [..] |
71 | [..] |
72 | Both DAC channels can be used to generate |
72 | When a DAC channel is used (ex channel1 on PA4) and the other is not |
73 | (#) Noise wave |
73 | (ex channel2 on PA5 is configured in Analog and disabled). |
74 | (#) Triangle wave |
74 | Channel1 may disturb channel2 as coupling effect. |
75 | 75 | Note that there is no coupling on channel2 as soon as channel2 is turned on. |
|
76 | *** DAC data format *** |
76 | Coupling on adjacent channel could be avoided as follows: |
77 | ======================= |
77 | when unused PA5 is configured as INPUT PULL-UP or DOWN. |
78 | [..] |
78 | PA5 is configured in ANALOG just before it is turned on. |
79 | The DAC data format can be: |
79 | |
80 | (#) 8-bit right alignment using DAC_ALIGN_8B_R |
80 | *** DAC wave generation feature *** |
81 | (#) 12-bit left alignment using DAC_ALIGN_12B_L |
81 | =================================== |
82 | (#) 12-bit right alignment using DAC_ALIGN_12B_R |
82 | [..] |
83 | 83 | Both DAC channels can be used to generate |
|
84 | *** DAC data value to voltage correspondence *** |
84 | (#) Noise wave |
85 | ================================================ |
85 | (#) Triangle wave |
86 | [..] |
86 | |
87 | The analog output voltage on each DAC channel pin is determined |
87 | *** DAC data format *** |
88 | by the following equation: |
88 | ======================= |
89 | [..] |
89 | [..] |
90 | DAC_OUTx = VREF+ * DOR / 4095 |
90 | The DAC data format can be: |
91 | (+) with DOR is the Data Output Register |
91 | (#) 8-bit right alignment using DAC_ALIGN_8B_R |
92 | [..] |
92 | (#) 12-bit left alignment using DAC_ALIGN_12B_L |
93 | VREF+ is the input voltage reference (refer to the device datasheet) |
93 | (#) 12-bit right alignment using DAC_ALIGN_12B_R |
94 | [..] |
94 | |
95 | e.g. To set DAC_OUT1 to 0.7V, use |
95 | *** DAC data value to voltage correspondence *** |
96 | (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V |
96 | ================================================ |
97 | 97 | [..] |
|
98 | *** DMA requests *** |
98 | The analog output voltage on each DAC channel pin is determined |
99 | ===================== |
99 | by the following equation: |
100 | [..] |
100 | [..] |
101 | A DMA request can be generated when an external trigger (but not a software trigger) |
101 | DAC_OUTx = VREF+ * DOR / 4095 |
102 | occurs if DMA1 requests are enabled using HAL_DAC_Start_DMA(). |
102 | (+) with DOR is the Data Output Register |
103 | DMA1 requests are mapped as following: |
103 | [..] |
104 | (#) DAC channel1 mapped on (no request on STM32L1XX) / DMA1 channel2 |
104 | VREF+ is the input voltage reference (refer to the device datasheet) |
105 | (#) DAC channel2 mapped on (no request on STM32L1XX) / DMA1 channel3 |
105 | [..] |
106 | 106 | e.g. To set DAC_OUT1 to 0.7V, use |
|
107 | [..] |
107 | (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V |
108 | (@) For Dual mode and specific signal (Triangle and noise) generation please |
108 | |
109 | refer to Extended Features Driver description |
109 | *** DMA requests *** |
110 | 110 | ===================== |
|
111 | ##### How to use this driver ##### |
111 | [..] |
112 | ============================================================================== |
112 | A DMA request can be generated when an external trigger (but not a software trigger) |
113 | [..] |
113 | occurs if DMA1 requests are enabled using HAL_DAC_Start_DMA(). |
114 | (+) DAC APB clock must be enabled to get write access to DAC |
114 | DMA1 requests are mapped as following: |
115 | registers using HAL_DAC_Init() |
115 | (#) DAC channel1 mapped on (no request on STM32L1XX) / DMA1 channel2 |
116 | (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode. |
116 | (#) DAC channel2 mapped on (no request on STM32L1XX) / DMA1 channel3 |
117 | (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function. |
117 | |
118 | (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA() functions. |
118 | [..] |
119 | 119 | (@) For Dual mode and specific signal (Triangle and noise) generation please |
|
120 | 120 | refer to Extended Features Driver description |
|
121 | *** Polling mode IO operation *** |
121 | |
122 | ================================= |
122 | ##### How to use this driver ##### |
123 | [..] |
123 | ============================================================================== |
124 | (+) Start the DAC peripheral using HAL_DAC_Start() |
124 | [..] |
125 | (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function. |
125 | (+) DAC APB clock must be enabled to get write access to DAC |
126 | (+) Stop the DAC peripheral using HAL_DAC_Stop() |
126 | registers using HAL_DAC_Init() |
127 | 127 | (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode. |
|
128 | *** DMA mode IO operation *** |
128 | (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function. |
129 | ============================== |
129 | (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA() functions. |
130 | [..] |
130 | |
131 | (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length |
131 | |
132 | of data to be transferred at each end of conversion |
132 | *** Polling mode IO operation *** |
133 | First issued trigger will start the conversion of the value previously set by HAL_DAC_SetValue(). |
133 | ================================= |
134 | (+) At the middle of data transfer HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() |
134 | [..] |
135 | function is executed and user can add his own code by customization of function pointer |
135 | (+) Start the DAC peripheral using HAL_DAC_Start() |
136 | HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() |
136 | (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function. |
137 | (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() |
137 | (+) Stop the DAC peripheral using HAL_DAC_Stop() |
138 | function is executed and user can add his own code by customization of function pointer |
138 | |
139 | HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() |
139 | *** DMA mode IO operation *** |
140 | (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can |
140 | ============================== |
141 | add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1 |
141 | [..] |
142 | (+) In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler. |
142 | (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length |
143 | HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() |
143 | of data to be transferred at each end of conversion |
144 | function is executed and user can add his own code by customization of function pointer |
144 | First issued trigger will start the conversion of the value previously set by HAL_DAC_SetValue(). |
145 | HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() and |
145 | (+) At the middle of data transfer HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() |
146 | add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1() |
146 | function is executed and user can add his own code by customization of function pointer |
147 | (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA() |
147 | HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() |
148 | 148 | (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() |
|
149 | *** Callback registration *** |
149 | function is executed and user can add his own code by customization of function pointer |
150 | ============================================= |
150 | HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() |
151 | [..] |
151 | (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can |
152 | The compilation define USE_HAL_DAC_REGISTER_CALLBACKS when set to 1 |
152 | add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1 |
153 | allows the user to configure dynamically the driver callbacks. |
153 | (+) In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler. |
154 | 154 | HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() |
|
155 | Use Functions @ref HAL_DAC_RegisterCallback() to register a user callback, |
155 | function is executed and user can add his own code by customization of function pointer |
156 | it allows to register following callbacks: |
156 | HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() and |
157 | (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1. |
157 | add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1() |
158 | (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1. |
158 | (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA() |
159 | (+) ErrorCallbackCh1 : callback when an error occurs on Ch1. |
159 | |
160 | (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1. |
160 | *** Callback registration *** |
161 | (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2. |
161 | ============================================= |
162 | (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2. |
162 | [..] |
163 | (+) ErrorCallbackCh2 : callback when an error occurs on Ch2. |
163 | The compilation define USE_HAL_DAC_REGISTER_CALLBACKS when set to 1 |
164 | (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2. |
164 | allows the user to configure dynamically the driver callbacks. |
165 | (+) MspInitCallback : DAC MspInit. |
165 | |
166 | (+) MspDeInitCallback : DAC MspdeInit. |
166 | Use Functions HAL_DAC_RegisterCallback() to register a user callback, |
167 | This function takes as parameters the HAL peripheral handle, the Callback ID |
167 | it allows to register following callbacks: |
168 | and a pointer to the user callback function. |
168 | (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1. |
169 | 169 | (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1. |
|
170 | Use function @ref HAL_DAC_UnRegisterCallback() to reset a callback to the default |
170 | (+) ErrorCallbackCh1 : callback when an error occurs on Ch1. |
171 | weak (surcharged) function. It allows to reset following callbacks: |
171 | (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1. |
172 | (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1. |
172 | (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2. |
173 | (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1. |
173 | (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2. |
174 | (+) ErrorCallbackCh1 : callback when an error occurs on Ch1. |
174 | (+) ErrorCallbackCh2 : callback when an error occurs on Ch2. |
175 | (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1. |
175 | (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2. |
176 | (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2. |
176 | (+) MspInitCallback : DAC MspInit. |
177 | (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2. |
177 | (+) MspDeInitCallback : DAC MspdeInit. |
178 | (+) ErrorCallbackCh2 : callback when an error occurs on Ch2. |
178 | This function takes as parameters the HAL peripheral handle, the Callback ID |
179 | (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2. |
179 | and a pointer to the user callback function. |
180 | (+) MspInitCallback : DAC MspInit. |
180 | |
181 | (+) MspDeInitCallback : DAC MspdeInit. |
181 | Use function HAL_DAC_UnRegisterCallback() to reset a callback to the default |
182 | (+) All Callbacks |
182 | weak (overridden) function. It allows to reset following callbacks: |
183 | This function) takes as parameters the HAL peripheral handle and the Callback ID. |
183 | (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1. |
184 | 184 | (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1. |
|
185 | By default, after the @ref HAL_DAC_Init and if the state is HAL_DAC_STATE_RESET |
185 | (+) ErrorCallbackCh1 : callback when an error occurs on Ch1. |
186 | all callbacks are reset to the corresponding legacy weak (surcharged) functions. |
186 | (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1. |
187 | Exception done for MspInit and MspDeInit callbacks that are respectively |
187 | (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2. |
188 | reset to the legacy weak (surcharged) functions in the @ref HAL_DAC_Init |
188 | (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2. |
189 | and @ref HAL_DAC_DeInit only when these callbacks are null (not registered beforehand). |
189 | (+) ErrorCallbackCh2 : callback when an error occurs on Ch2. |
190 | If not, MspInit or MspDeInit are not null, the @ref HAL_DAC_Init and @ref HAL_DAC_DeInit |
190 | (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2. |
191 | keep and use the user MspInit/MspDeInit callbacks (registered beforehand) |
191 | (+) MspInitCallback : DAC MspInit. |
192 | 192 | (+) MspDeInitCallback : DAC MspdeInit. |
|
193 | Callbacks can be registered/unregistered in READY state only. |
193 | (+) All Callbacks |
194 | Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered |
194 | This function) takes as parameters the HAL peripheral handle and the Callback ID. |
195 | in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used |
195 | |
196 | during the Init/DeInit. |
196 | By default, after the HAL_DAC_Init and if the state is HAL_DAC_STATE_RESET |
197 | In that case first register the MspInit/MspDeInit user callbacks |
197 | all callbacks are reset to the corresponding legacy weak (overridden) functions. |
198 | using @ref HAL_DAC_RegisterCallback before calling @ref HAL_DAC_DeInit |
198 | Exception done for MspInit and MspDeInit callbacks that are respectively |
199 | or @ref HAL_DAC_Init function. |
199 | reset to the legacy weak (overridden) functions in the HAL_DAC_Init |
200 | 200 | and HAL_DAC_DeInit only when these callbacks are null (not registered beforehand). |
|
201 | When The compilation define USE_HAL_DAC_REGISTER_CALLBACKS is set to 0 or |
201 | If not, MspInit or MspDeInit are not null, the HAL_DAC_Init and HAL_DAC_DeInit |
202 | not defined, the callback registering feature is not available |
202 | keep and use the user MspInit/MspDeInit callbacks (registered beforehand) |
203 | and weak (surcharged) callbacks are used. |
203 | |
204 | 204 | Callbacks can be registered/unregistered in READY state only. |
|
205 | *** DAC HAL driver macros list *** |
205 | Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered |
206 | ============================================= |
206 | in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used |
207 | [..] |
207 | during the Init/DeInit. |
208 | Below the list of most used macros in DAC HAL driver. |
208 | In that case first register the MspInit/MspDeInit user callbacks |
209 | 209 | using HAL_DAC_RegisterCallback before calling HAL_DAC_DeInit |
|
210 | (+) __HAL_DAC_ENABLE : Enable the DAC peripheral |
210 | or HAL_DAC_Init function. |
211 | (+) __HAL_DAC_DISABLE : Disable the DAC peripheral |
211 | |
212 | (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags |
212 | When The compilation define USE_HAL_DAC_REGISTER_CALLBACKS is set to 0 or |
213 | (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status |
213 | not defined, the callback registering feature is not available |
214 | 214 | and weak (overridden) callbacks are used. |
|
215 | [..] |
215 | |
216 | (@) You can refer to the DAC HAL driver header file for more useful macros |
216 | *** DAC HAL driver macros list *** |
217 | 217 | ============================================= |
|
218 | @endverbatim |
218 | [..] |
219 | ****************************************************************************** |
219 | Below the list of most used macros in DAC HAL driver. |
220 | * @attention |
220 | |
221 | * |
221 | (+) __HAL_DAC_ENABLE : Enable the DAC peripheral |
222 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
222 | (+) __HAL_DAC_DISABLE : Disable the DAC peripheral |
223 | * All rights reserved.</center></h2> |
223 | (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags |
224 | * |
224 | (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status |
225 | * This software component is licensed by ST under BSD 3-Clause license, |
225 | |
226 | * the "License"; You may not use this file except in compliance with the |
226 | [..] |
227 | * License. You may obtain a copy of the License at: |
227 | (@) You can refer to the DAC HAL driver header file for more useful macros |
228 | * opensource.org/licenses/BSD-3-Clause |
228 | |
229 | * |
229 | @endverbatim |
230 | ****************************************************************************** |
230 | ****************************************************************************** |
231 | */ |
231 | */ |
232 | 232 | ||
233 | /* Includes ------------------------------------------------------------------*/ |
233 | /* Includes ------------------------------------------------------------------*/ |
234 | #include "stm32l1xx_hal.h" |
234 | #include "stm32l1xx_hal.h" |
235 | 235 | ||
236 | /** @addtogroup STM32L1xx_HAL_Driver |
236 | /** @addtogroup STM32L1xx_HAL_Driver |
237 | * @{ |
237 | * @{ |
238 | */ |
238 | */ |
239 | 239 | ||
240 | #ifdef HAL_DAC_MODULE_ENABLED |
240 | #ifdef HAL_DAC_MODULE_ENABLED |
241 | #if defined(DAC1) |
241 | #if defined(DAC1) |
242 | 242 | ||
243 | /** @defgroup DAC DAC |
243 | /** @defgroup DAC DAC |
244 | * @brief DAC driver modules |
244 | * @brief DAC driver modules |
245 | * @{ |
245 | * @{ |
246 | */ |
246 | */ |
247 | 247 | ||
248 | /* Private typedef -----------------------------------------------------------*/ |
248 | /* Private typedef -----------------------------------------------------------*/ |
249 | /* Private define ------------------------------------------------------------*/ |
249 | /* Private define ------------------------------------------------------------*/ |
250 | /* Private constants ---------------------------------------------------------*/ |
250 | /* Private constants ---------------------------------------------------------*/ |
251 | /* Private macro -------------------------------------------------------------*/ |
251 | /* Private macro -------------------------------------------------------------*/ |
252 | /* Private variables ---------------------------------------------------------*/ |
252 | /* Private variables ---------------------------------------------------------*/ |
253 | /* Private function prototypes -----------------------------------------------*/ |
253 | /* Private function prototypes -----------------------------------------------*/ |
254 | /* Exported functions -------------------------------------------------------*/ |
254 | /* Exported functions -------------------------------------------------------*/ |
255 | 255 | ||
256 | /** @defgroup DAC_Exported_Functions DAC Exported Functions |
256 | /** @defgroup DAC_Exported_Functions DAC Exported Functions |
257 | * @{ |
257 | * @{ |
258 | */ |
258 | */ |
259 | 259 | ||
260 | /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions |
260 | /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions |
261 | * @brief Initialization and Configuration functions |
261 | * @brief Initialization and Configuration functions |
262 | * |
262 | * |
263 | @verbatim |
263 | @verbatim |
264 | ============================================================================== |
264 | ============================================================================== |
265 | ##### Initialization and de-initialization functions ##### |
265 | ##### Initialization and de-initialization functions ##### |
266 | ============================================================================== |
266 | ============================================================================== |
267 | [..] This section provides functions allowing to: |
267 | [..] This section provides functions allowing to: |
268 | (+) Initialize and configure the DAC. |
268 | (+) Initialize and configure the DAC. |
269 | (+) De-initialize the DAC. |
269 | (+) De-initialize the DAC. |
270 | 270 | ||
271 | @endverbatim |
271 | @endverbatim |
272 | * @{ |
272 | * @{ |
273 | */ |
273 | */ |
274 | 274 | ||
275 | /** |
275 | /** |
276 | * @brief Initialize the DAC peripheral according to the specified parameters |
276 | * @brief Initialize the DAC peripheral according to the specified parameters |
277 | * in the DAC_InitStruct and initialize the associated handle. |
277 | * in the DAC_InitStruct and initialize the associated handle. |
278 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
278 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
279 | * the configuration information for the specified DAC. |
279 | * the configuration information for the specified DAC. |
280 | * @retval HAL status |
280 | * @retval HAL status |
281 | */ |
281 | */ |
282 | HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac) |
282 | HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac) |
283 | { |
283 | { |
284 | /* Check DAC handle */ |
284 | /* Check the DAC peripheral handle */ |
285 | if (hdac == NULL) |
285 | if (hdac == NULL) |
286 | { |
286 | { |
287 | return HAL_ERROR; |
287 | return HAL_ERROR; |
288 | } |
288 | } |
289 | /* Check the parameters */ |
289 | /* Check the parameters */ |
290 | assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); |
290 | assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); |
291 | 291 | ||
292 | if (hdac->State == HAL_DAC_STATE_RESET) |
292 | if (hdac->State == HAL_DAC_STATE_RESET) |
293 | { |
293 | { |
294 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
294 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
295 | /* Init the DAC Callback settings */ |
295 | /* Init the DAC Callback settings */ |
296 | hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1; |
296 | hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1; |
297 | hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1; |
297 | hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1; |
298 | hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1; |
298 | hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1; |
299 | hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1; |
299 | hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1; |
300 | 300 | ||
301 | hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2; |
301 | hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2; |
302 | hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2; |
302 | hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2; |
303 | hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2; |
303 | hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2; |
304 | hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2; |
304 | hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2; |
305 | 305 | ||
306 | if (hdac->MspInitCallback == NULL) |
306 | if (hdac->MspInitCallback == NULL) |
307 | { |
307 | { |
308 | hdac->MspInitCallback = HAL_DAC_MspInit; |
308 | hdac->MspInitCallback = HAL_DAC_MspInit; |
309 | } |
309 | } |
310 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
310 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
311 | 311 | ||
312 | /* Allocate lock resource and initialize it */ |
312 | /* Allocate lock resource and initialize it */ |
313 | hdac->Lock = HAL_UNLOCKED; |
313 | hdac->Lock = HAL_UNLOCKED; |
314 | 314 | ||
315 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
315 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
316 | /* Init the low level hardware */ |
316 | /* Init the low level hardware */ |
317 | hdac->MspInitCallback(hdac); |
317 | hdac->MspInitCallback(hdac); |
318 | #else |
318 | #else |
319 | /* Init the low level hardware */ |
319 | /* Init the low level hardware */ |
320 | HAL_DAC_MspInit(hdac); |
320 | HAL_DAC_MspInit(hdac); |
321 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
321 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
322 | } |
322 | } |
323 | 323 | ||
324 | /* Initialize the DAC state*/ |
324 | /* Initialize the DAC state*/ |
325 | hdac->State = HAL_DAC_STATE_BUSY; |
325 | hdac->State = HAL_DAC_STATE_BUSY; |
326 | 326 | ||
327 | /* Set DAC error code to none */ |
327 | /* Set DAC error code to none */ |
328 | hdac->ErrorCode = HAL_DAC_ERROR_NONE; |
328 | hdac->ErrorCode = HAL_DAC_ERROR_NONE; |
329 | 329 | ||
330 | /* Initialize the DAC state*/ |
330 | /* Initialize the DAC state*/ |
331 | hdac->State = HAL_DAC_STATE_READY; |
331 | hdac->State = HAL_DAC_STATE_READY; |
332 | 332 | ||
333 | /* Return function status */ |
333 | /* Return function status */ |
334 | return HAL_OK; |
334 | return HAL_OK; |
335 | } |
335 | } |
336 | 336 | ||
337 | /** |
337 | /** |
338 | * @brief Deinitialize the DAC peripheral registers to their default reset values. |
338 | * @brief Deinitialize the DAC peripheral registers to their default reset values. |
339 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
339 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
340 | * the configuration information for the specified DAC. |
340 | * the configuration information for the specified DAC. |
341 | * @retval HAL status |
341 | * @retval HAL status |
342 | */ |
342 | */ |
343 | HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac) |
343 | HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac) |
344 | { |
344 | { |
345 | /* Check DAC handle */ |
345 | /* Check the DAC peripheral handle */ |
346 | if (hdac == NULL) |
346 | if (hdac == NULL) |
347 | { |
347 | { |
348 | return HAL_ERROR; |
348 | return HAL_ERROR; |
349 | } |
349 | } |
350 | 350 | ||
351 | /* Check the parameters */ |
351 | /* Check the parameters */ |
352 | assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); |
352 | assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); |
353 | 353 | ||
354 | /* Change DAC state */ |
354 | /* Change DAC state */ |
355 | hdac->State = HAL_DAC_STATE_BUSY; |
355 | hdac->State = HAL_DAC_STATE_BUSY; |
356 | 356 | ||
357 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
357 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
358 | if (hdac->MspDeInitCallback == NULL) |
358 | if (hdac->MspDeInitCallback == NULL) |
359 | { |
359 | { |
360 | hdac->MspDeInitCallback = HAL_DAC_MspDeInit; |
360 | hdac->MspDeInitCallback = HAL_DAC_MspDeInit; |
361 | } |
361 | } |
362 | /* DeInit the low level hardware */ |
362 | /* DeInit the low level hardware */ |
363 | hdac->MspDeInitCallback(hdac); |
363 | hdac->MspDeInitCallback(hdac); |
364 | #else |
364 | #else |
365 | /* DeInit the low level hardware */ |
365 | /* DeInit the low level hardware */ |
366 | HAL_DAC_MspDeInit(hdac); |
366 | HAL_DAC_MspDeInit(hdac); |
367 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
367 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
368 | 368 | ||
369 | /* Set DAC error code to none */ |
369 | /* Set DAC error code to none */ |
370 | hdac->ErrorCode = HAL_DAC_ERROR_NONE; |
370 | hdac->ErrorCode = HAL_DAC_ERROR_NONE; |
371 | 371 | ||
372 | /* Change DAC state */ |
372 | /* Change DAC state */ |
373 | hdac->State = HAL_DAC_STATE_RESET; |
373 | hdac->State = HAL_DAC_STATE_RESET; |
374 | 374 | ||
375 | /* Release Lock */ |
375 | /* Release Lock */ |
376 | __HAL_UNLOCK(hdac); |
376 | __HAL_UNLOCK(hdac); |
377 | 377 | ||
378 | /* Return function status */ |
378 | /* Return function status */ |
379 | return HAL_OK; |
379 | return HAL_OK; |
380 | } |
380 | } |
381 | 381 | ||
382 | /** |
382 | /** |
383 | * @brief Initialize the DAC MSP. |
383 | * @brief Initialize the DAC MSP. |
384 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
384 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
385 | * the configuration information for the specified DAC. |
385 | * the configuration information for the specified DAC. |
386 | * @retval None |
386 | * @retval None |
387 | */ |
387 | */ |
388 | __weak void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac) |
388 | __weak void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac) |
389 | { |
389 | { |
390 | /* Prevent unused argument(s) compilation warning */ |
390 | /* Prevent unused argument(s) compilation warning */ |
391 | UNUSED(hdac); |
391 | UNUSED(hdac); |
392 | 392 | ||
393 | /* NOTE : This function should not be modified, when the callback is needed, |
393 | /* NOTE : This function should not be modified, when the callback is needed, |
394 | the HAL_DAC_MspInit could be implemented in the user file |
394 | the HAL_DAC_MspInit could be implemented in the user file |
395 | */ |
395 | */ |
396 | } |
396 | } |
397 | 397 | ||
398 | /** |
398 | /** |
399 | * @brief DeInitialize the DAC MSP. |
399 | * @brief DeInitialize the DAC MSP. |
400 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
400 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
401 | * the configuration information for the specified DAC. |
401 | * the configuration information for the specified DAC. |
402 | * @retval None |
402 | * @retval None |
403 | */ |
403 | */ |
404 | __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac) |
404 | __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac) |
405 | { |
405 | { |
406 | /* Prevent unused argument(s) compilation warning */ |
406 | /* Prevent unused argument(s) compilation warning */ |
407 | UNUSED(hdac); |
407 | UNUSED(hdac); |
408 | 408 | ||
409 | /* NOTE : This function should not be modified, when the callback is needed, |
409 | /* NOTE : This function should not be modified, when the callback is needed, |
410 | the HAL_DAC_MspDeInit could be implemented in the user file |
410 | the HAL_DAC_MspDeInit could be implemented in the user file |
411 | */ |
411 | */ |
412 | } |
412 | } |
413 | 413 | ||
414 | /** |
414 | /** |
415 | * @} |
415 | * @} |
416 | */ |
416 | */ |
417 | 417 | ||
418 | /** @defgroup DAC_Exported_Functions_Group2 IO operation functions |
418 | /** @defgroup DAC_Exported_Functions_Group2 IO operation functions |
419 | * @brief IO operation functions |
419 | * @brief IO operation functions |
420 | * |
420 | * |
421 | @verbatim |
421 | @verbatim |
422 | ============================================================================== |
422 | ============================================================================== |
423 | ##### IO operation functions ##### |
423 | ##### IO operation functions ##### |
424 | ============================================================================== |
424 | ============================================================================== |
425 | [..] This section provides functions allowing to: |
425 | [..] This section provides functions allowing to: |
426 | (+) Start conversion. |
426 | (+) Start conversion. |
427 | (+) Stop conversion. |
427 | (+) Stop conversion. |
428 | (+) Start conversion and enable DMA transfer. |
428 | (+) Start conversion and enable DMA transfer. |
429 | (+) Stop conversion and disable DMA transfer. |
429 | (+) Stop conversion and disable DMA transfer. |
430 | (+) Get result of conversion. |
430 | (+) Get result of conversion. |
431 | 431 | ||
432 | @endverbatim |
432 | @endverbatim |
433 | * @{ |
433 | * @{ |
434 | */ |
434 | */ |
435 | 435 | ||
436 | /** |
436 | /** |
437 | * @brief Enables DAC and starts conversion of channel. |
437 | * @brief Enables DAC and starts conversion of channel. |
438 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
438 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
439 | * the configuration information for the specified DAC. |
439 | * the configuration information for the specified DAC. |
440 | * @param Channel The selected DAC channel. |
440 | * @param Channel The selected DAC channel. |
441 | * This parameter can be one of the following values: |
441 | * This parameter can be one of the following values: |
442 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
442 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
443 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
443 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
444 | * @retval HAL status |
444 | * @retval HAL status |
445 | */ |
445 | */ |
446 | HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel) |
446 | HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel) |
447 | { |
447 | { |
448 | /* Check the parameters */ |
448 | /* Check the DAC peripheral handle */ |
449 | assert_param(IS_DAC_CHANNEL(Channel)); |
449 | if (hdac == NULL) |
450 | 450 | { |
|
451 | /* Process locked */ |
451 | return HAL_ERROR; |
452 | __HAL_LOCK(hdac); |
452 | } |
453 | 453 | ||
454 | /* Change DAC state */ |
454 | /* Check the parameters */ |
455 | hdac->State = HAL_DAC_STATE_BUSY; |
455 | assert_param(IS_DAC_CHANNEL(Channel)); |
456 | 456 | ||
457 | /* Enable the Peripheral */ |
457 | /* Process locked */ |
458 | __HAL_DAC_ENABLE(hdac, Channel); |
458 | __HAL_LOCK(hdac); |
459 | 459 | ||
460 | if (Channel == DAC_CHANNEL_1) |
460 | /* Change DAC state */ |
461 | { |
461 | hdac->State = HAL_DAC_STATE_BUSY; |
462 | /* Check if software trigger enabled */ |
462 | |
463 | if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_TRIGGER_SOFTWARE) |
463 | /* Enable the Peripheral */ |
464 | { |
464 | __HAL_DAC_ENABLE(hdac, Channel); |
465 | /* Enable the selected DAC software conversion */ |
465 | |
466 | SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1); |
466 | if (Channel == DAC_CHANNEL_1) |
467 | } |
467 | { |
468 | } |
468 | /* Check if software trigger enabled */ |
469 | 469 | if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_TRIGGER_SOFTWARE) |
|
470 | else |
470 | { |
471 | { |
471 | /* Enable the selected DAC software conversion */ |
472 | /* Check if software trigger enabled */ |
472 | SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1); |
473 | if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_TRIGGER_SOFTWARE << (Channel & 0x10UL))) |
473 | } |
474 | { |
474 | } |
475 | /* Enable the selected DAC software conversion*/ |
475 | |
476 | SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2); |
476 | else |
477 | } |
477 | { |
478 | } |
478 | /* Check if software trigger enabled */ |
479 | 479 | if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_TRIGGER_SOFTWARE << (Channel & 0x10UL))) |
|
480 | 480 | { |
|
481 | /* Change DAC state */ |
481 | /* Enable the selected DAC software conversion*/ |
482 | hdac->State = HAL_DAC_STATE_READY; |
482 | SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2); |
483 | 483 | } |
|
484 | /* Process unlocked */ |
484 | } |
485 | __HAL_UNLOCK(hdac); |
485 | |
486 | 486 | ||
487 | /* Return function status */ |
487 | /* Change DAC state */ |
488 | return HAL_OK; |
488 | hdac->State = HAL_DAC_STATE_READY; |
489 | } |
489 | |
490 | 490 | /* Process unlocked */ |
|
491 | /** |
491 | __HAL_UNLOCK(hdac); |
492 | * @brief Disables DAC and stop conversion of channel. |
492 | |
493 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
493 | /* Return function status */ |
494 | * the configuration information for the specified DAC. |
494 | return HAL_OK; |
495 | * @param Channel The selected DAC channel. |
495 | } |
496 | * This parameter can be one of the following values: |
496 | |
497 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
497 | /** |
498 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
498 | * @brief Disables DAC and stop conversion of channel. |
499 | * @retval HAL status |
499 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
500 | */ |
500 | * the configuration information for the specified DAC. |
501 | HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel) |
501 | * @param Channel The selected DAC channel. |
502 | { |
502 | * This parameter can be one of the following values: |
503 | /* Check the parameters */ |
503 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
504 | assert_param(IS_DAC_CHANNEL(Channel)); |
504 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
505 | 505 | * @retval HAL status |
|
506 | /* Disable the Peripheral */ |
506 | */ |
507 | __HAL_DAC_DISABLE(hdac, Channel); |
507 | HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel) |
508 | 508 | { |
|
509 | /* Change DAC state */ |
509 | /* Check the DAC peripheral handle */ |
510 | hdac->State = HAL_DAC_STATE_READY; |
510 | if (hdac == NULL) |
511 | 511 | { |
|
512 | /* Return function status */ |
512 | return HAL_ERROR; |
513 | return HAL_OK; |
513 | } |
514 | } |
514 | |
515 | 515 | /* Check the parameters */ |
|
516 | /** |
516 | assert_param(IS_DAC_CHANNEL(Channel)); |
517 | * @brief Enables DAC and starts conversion of channel. |
517 | |
518 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
518 | /* Disable the Peripheral */ |
519 | * the configuration information for the specified DAC. |
519 | __HAL_DAC_DISABLE(hdac, Channel); |
520 | * @param Channel The selected DAC channel. |
520 | |
521 | * This parameter can be one of the following values: |
521 | /* Change DAC state */ |
522 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
522 | hdac->State = HAL_DAC_STATE_READY; |
523 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
523 | |
524 | * @param pData The source Buffer address. |
524 | /* Return function status */ |
525 | * @param Length The length of data to be transferred from memory to DAC peripheral |
525 | return HAL_OK; |
526 | * @param Alignment Specifies the data alignment for DAC channel. |
526 | } |
527 | * This parameter can be one of the following values: |
527 | |
528 | * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected |
528 | /** |
529 | * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected |
529 | * @brief Enables DAC and starts conversion of channel. |
530 | * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected |
530 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
531 | * @retval HAL status |
531 | * the configuration information for the specified DAC. |
532 | */ |
532 | * @param Channel The selected DAC channel. |
533 | HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length, |
533 | * This parameter can be one of the following values: |
534 | uint32_t Alignment) |
534 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
535 | { |
535 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
536 | HAL_StatusTypeDef status; |
536 | * @param pData The source Buffer address. |
537 | uint32_t tmpreg = 0U; |
537 | * @param Length The length of data to be transferred from memory to DAC peripheral |
538 | 538 | * @param Alignment Specifies the data alignment for DAC channel. |
|
539 | /* Check the parameters */ |
539 | * This parameter can be one of the following values: |
540 | assert_param(IS_DAC_CHANNEL(Channel)); |
540 | * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected |
541 | assert_param(IS_DAC_ALIGN(Alignment)); |
541 | * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected |
542 | 542 | * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected |
|
543 | /* Process locked */ |
543 | * @retval HAL status |
544 | __HAL_LOCK(hdac); |
544 | */ |
545 | 545 | HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, const uint32_t *pData, uint32_t Length, |
|
546 | /* Change DAC state */ |
546 | uint32_t Alignment) |
547 | hdac->State = HAL_DAC_STATE_BUSY; |
547 | { |
548 | 548 | HAL_StatusTypeDef status; |
|
549 | if (Channel == DAC_CHANNEL_1) |
549 | uint32_t tmpreg; |
550 | { |
550 | |
551 | /* Set the DMA transfer complete callback for channel1 */ |
551 | /* Check the DAC peripheral handle */ |
552 | hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1; |
552 | if (hdac == NULL) |
553 | 553 | { |
|
554 | /* Set the DMA half transfer complete callback for channel1 */ |
554 | return HAL_ERROR; |
555 | hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1; |
555 | } |
556 | 556 | ||
557 | /* Set the DMA error callback for channel1 */ |
557 | /* Check the parameters */ |
558 | hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1; |
558 | assert_param(IS_DAC_CHANNEL(Channel)); |
559 | 559 | assert_param(IS_DAC_ALIGN(Alignment)); |
|
560 | /* Enable the selected DAC channel1 DMA request */ |
560 | |
561 | SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); |
561 | /* Process locked */ |
562 | 562 | __HAL_LOCK(hdac); |
|
563 | /* Case of use of channel 1 */ |
563 | |
564 | switch (Alignment) |
564 | /* Change DAC state */ |
565 | { |
565 | hdac->State = HAL_DAC_STATE_BUSY; |
566 | case DAC_ALIGN_12B_R: |
566 | |
567 | /* Get DHR12R1 address */ |
567 | if (Channel == DAC_CHANNEL_1) |
568 | tmpreg = (uint32_t)&hdac->Instance->DHR12R1; |
568 | { |
569 | break; |
569 | /* Set the DMA transfer complete callback for channel1 */ |
570 | case DAC_ALIGN_12B_L: |
570 | hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1; |
571 | /* Get DHR12L1 address */ |
571 | |
572 | tmpreg = (uint32_t)&hdac->Instance->DHR12L1; |
572 | /* Set the DMA half transfer complete callback for channel1 */ |
573 | break; |
573 | hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1; |
574 | case DAC_ALIGN_8B_R: |
574 | |
575 | /* Get DHR8R1 address */ |
575 | /* Set the DMA error callback for channel1 */ |
576 | tmpreg = (uint32_t)&hdac->Instance->DHR8R1; |
576 | hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1; |
577 | break; |
577 | |
578 | default: |
578 | /* Enable the selected DAC channel1 DMA request */ |
579 | break; |
579 | SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); |
580 | } |
580 | |
581 | } |
581 | /* Case of use of channel 1 */ |
582 | 582 | switch (Alignment) |
|
583 | else |
583 | { |
584 | { |
584 | case DAC_ALIGN_12B_R: |
585 | /* Set the DMA transfer complete callback for channel2 */ |
585 | /* Get DHR12R1 address */ |
586 | hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2; |
586 | tmpreg = (uint32_t)&hdac->Instance->DHR12R1; |
587 | 587 | break; |
|
588 | /* Set the DMA half transfer complete callback for channel2 */ |
588 | case DAC_ALIGN_12B_L: |
589 | hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2; |
589 | /* Get DHR12L1 address */ |
590 | 590 | tmpreg = (uint32_t)&hdac->Instance->DHR12L1; |
|
591 | /* Set the DMA error callback for channel2 */ |
591 | break; |
592 | hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2; |
592 | default: /* case DAC_ALIGN_8B_R */ |
593 | 593 | /* Get DHR8R1 address */ |
|
594 | /* Enable the selected DAC channel2 DMA request */ |
594 | tmpreg = (uint32_t)&hdac->Instance->DHR8R1; |
595 | SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2); |
595 | break; |
596 | 596 | } |
|
597 | /* Case of use of channel 2 */ |
597 | } |
598 | switch (Alignment) |
598 | |
599 | { |
599 | else |
600 | case DAC_ALIGN_12B_R: |
600 | { |
601 | /* Get DHR12R2 address */ |
601 | /* Set the DMA transfer complete callback for channel2 */ |
602 | tmpreg = (uint32_t)&hdac->Instance->DHR12R2; |
602 | hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2; |
603 | break; |
603 | |
604 | case DAC_ALIGN_12B_L: |
604 | /* Set the DMA half transfer complete callback for channel2 */ |
605 | /* Get DHR12L2 address */ |
605 | hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2; |
606 | tmpreg = (uint32_t)&hdac->Instance->DHR12L2; |
606 | |
607 | break; |
607 | /* Set the DMA error callback for channel2 */ |
608 | case DAC_ALIGN_8B_R: |
608 | hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2; |
609 | /* Get DHR8R2 address */ |
609 | |
610 | tmpreg = (uint32_t)&hdac->Instance->DHR8R2; |
610 | /* Enable the selected DAC channel2 DMA request */ |
611 | break; |
611 | SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2); |
612 | default: |
612 | |
613 | break; |
613 | /* Case of use of channel 2 */ |
614 | } |
614 | switch (Alignment) |
615 | } |
615 | { |
616 | 616 | case DAC_ALIGN_12B_R: |
|
617 | 617 | /* Get DHR12R2 address */ |
|
618 | /* Enable the DMA channel */ |
618 | tmpreg = (uint32_t)&hdac->Instance->DHR12R2; |
619 | if (Channel == DAC_CHANNEL_1) |
619 | break; |
620 | { |
620 | case DAC_ALIGN_12B_L: |
621 | /* Enable the DAC DMA underrun interrupt */ |
621 | /* Get DHR12L2 address */ |
622 | __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1); |
622 | tmpreg = (uint32_t)&hdac->Instance->DHR12L2; |
623 | 623 | break; |
|
624 | /* Enable the DMA channel */ |
624 | default: /* case DAC_ALIGN_8B_R */ |
625 | status = HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length); |
625 | /* Get DHR8R2 address */ |
626 | } |
626 | tmpreg = (uint32_t)&hdac->Instance->DHR8R2; |
627 | 627 | break; |
|
628 | else |
628 | } |
629 | { |
629 | } |
630 | /* Enable the DAC DMA underrun interrupt */ |
630 | |
631 | __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2); |
631 | if (Channel == DAC_CHANNEL_1) |
632 | 632 | { |
|
633 | /* Enable the DMA channel */ |
633 | /* Enable the DAC DMA underrun interrupt */ |
634 | status = HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length); |
634 | __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1); |
635 | } |
635 | |
636 | 636 | /* Enable the DMA channel */ |
|
637 | 637 | status = HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length); |
|
638 | /* Process Unlocked */ |
638 | } |
639 | __HAL_UNLOCK(hdac); |
639 | |
640 | 640 | else |
|
641 | if (status == HAL_OK) |
641 | { |
642 | { |
642 | /* Enable the DAC DMA underrun interrupt */ |
643 | /* Enable the Peripheral */ |
643 | __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2); |
644 | __HAL_DAC_ENABLE(hdac, Channel); |
644 | |
645 | } |
645 | /* Enable the DMA channel */ |
646 | else |
646 | status = HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length); |
647 | { |
647 | } |
648 | hdac->ErrorCode |= HAL_DAC_ERROR_DMA; |
648 | |
649 | } |
649 | |
650 | 650 | /* Process Unlocked */ |
|
651 | /* Return function status */ |
651 | __HAL_UNLOCK(hdac); |
652 | return status; |
652 | |
653 | } |
653 | if (status == HAL_OK) |
654 | 654 | { |
|
655 | /** |
655 | /* Enable the Peripheral */ |
656 | * @brief Disables DAC and stop conversion of channel. |
656 | __HAL_DAC_ENABLE(hdac, Channel); |
657 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
657 | } |
658 | * the configuration information for the specified DAC. |
658 | else |
659 | * @param Channel The selected DAC channel. |
659 | { |
660 | * This parameter can be one of the following values: |
660 | hdac->ErrorCode |= HAL_DAC_ERROR_DMA; |
661 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
661 | } |
662 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
662 | |
663 | * @retval HAL status |
663 | /* Return function status */ |
664 | */ |
664 | return status; |
665 | HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel) |
665 | } |
666 | { |
666 | |
667 | /* Check the parameters */ |
667 | /** |
668 | assert_param(IS_DAC_CHANNEL(Channel)); |
668 | * @brief Disables DAC and stop conversion of channel. |
669 | 669 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
|
670 | /* Disable the selected DAC channel DMA request */ |
670 | * the configuration information for the specified DAC. |
671 | hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << (Channel & 0x10UL)); |
671 | * @param Channel The selected DAC channel. |
672 | 672 | * This parameter can be one of the following values: |
|
673 | /* Disable the Peripheral */ |
673 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
674 | __HAL_DAC_DISABLE(hdac, Channel); |
674 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
675 | 675 | * @retval HAL status |
|
676 | /* Disable the DMA channel */ |
676 | */ |
677 | 677 | HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel) |
|
678 | /* Channel1 is used */ |
678 | { |
679 | if (Channel == DAC_CHANNEL_1) |
679 | /* Check the DAC peripheral handle */ |
680 | { |
680 | if (hdac == NULL) |
681 | /* Disable the DMA channel */ |
681 | { |
682 | (void)HAL_DMA_Abort(hdac->DMA_Handle1); |
682 | return HAL_ERROR; |
683 | 683 | } |
|
684 | /* Disable the DAC DMA underrun interrupt */ |
684 | |
685 | __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1); |
685 | /* Check the parameters */ |
686 | } |
686 | assert_param(IS_DAC_CHANNEL(Channel)); |
687 | 687 | ||
688 | else /* Channel2 is used for */ |
688 | /* Disable the selected DAC channel DMA request */ |
689 | { |
689 | hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << (Channel & 0x10UL)); |
690 | /* Disable the DMA channel */ |
690 | |
691 | (void)HAL_DMA_Abort(hdac->DMA_Handle2); |
691 | /* Disable the Peripheral */ |
692 | 692 | __HAL_DAC_DISABLE(hdac, Channel); |
|
693 | /* Disable the DAC DMA underrun interrupt */ |
693 | |
694 | __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2); |
694 | /* Disable the DMA channel */ |
695 | } |
695 | |
696 | 696 | /* Channel1 is used */ |
|
697 | 697 | if (Channel == DAC_CHANNEL_1) |
|
698 | /* Change DAC state */ |
698 | { |
699 | hdac->State = HAL_DAC_STATE_READY; |
699 | /* Disable the DMA channel */ |
700 | 700 | (void)HAL_DMA_Abort(hdac->DMA_Handle1); |
|
701 | /* Return function status */ |
701 | |
702 | return HAL_OK; |
702 | /* Disable the DAC DMA underrun interrupt */ |
703 | } |
703 | __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1); |
704 | 704 | } |
|
705 | /** |
705 | |
706 | * @brief Handles DAC interrupt request |
706 | else /* Channel2 is used for */ |
707 | * This function uses the interruption of DMA |
707 | { |
708 | * underrun. |
708 | /* Disable the DMA channel */ |
709 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
709 | (void)HAL_DMA_Abort(hdac->DMA_Handle2); |
710 | * the configuration information for the specified DAC. |
710 | |
711 | * @retval None |
711 | /* Disable the DAC DMA underrun interrupt */ |
712 | */ |
712 | __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2); |
713 | void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac) |
713 | } |
714 | { |
714 | |
715 | if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1)) |
715 | |
716 | { |
716 | /* Change DAC state */ |
717 | /* Check underrun flag of DAC channel 1 */ |
717 | hdac->State = HAL_DAC_STATE_READY; |
718 | if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1)) |
718 | |
719 | { |
719 | /* Return function status */ |
720 | /* Change DAC state to error state */ |
720 | return HAL_OK; |
721 | hdac->State = HAL_DAC_STATE_ERROR; |
721 | } |
722 | 722 | ||
723 | /* Set DAC error code to channel1 DMA underrun error */ |
723 | /** |
724 | SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1); |
724 | * @brief Handles DAC interrupt request |
725 | 725 | * This function uses the interruption of DMA |
|
726 | /* Clear the underrun flag */ |
726 | * underrun. |
727 | __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR1); |
727 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
728 | 728 | * the configuration information for the specified DAC. |
|
729 | /* Disable the selected DAC channel1 DMA request */ |
729 | * @retval None |
730 | CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); |
730 | */ |
731 | 731 | void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac) |
|
732 | /* Error callback */ |
732 | { |
733 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
733 | uint32_t itsource = hdac->Instance->CR; |
734 | hdac->DMAUnderrunCallbackCh1(hdac); |
734 | uint32_t itflag = hdac->Instance->SR; |
735 | #else |
735 | |
736 | HAL_DAC_DMAUnderrunCallbackCh1(hdac); |
736 | if ((itsource & DAC_IT_DMAUDR1) == DAC_IT_DMAUDR1) |
737 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
737 | { |
738 | } |
738 | /* Check underrun flag of DAC channel 1 */ |
739 | } |
739 | if ((itflag & DAC_FLAG_DMAUDR1) == DAC_FLAG_DMAUDR1) |
740 | 740 | { |
|
741 | 741 | /* Change DAC state to error state */ |
|
742 | if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2)) |
742 | hdac->State = HAL_DAC_STATE_ERROR; |
743 | { |
743 | |
744 | /* Check underrun flag of DAC channel 2 */ |
744 | /* Set DAC error code to channel1 DMA underrun error */ |
745 | if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2)) |
745 | SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1); |
746 | { |
746 | |
747 | /* Change DAC state to error state */ |
747 | /* Clear the underrun flag */ |
748 | hdac->State = HAL_DAC_STATE_ERROR; |
748 | __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR1); |
749 | 749 | ||
750 | /* Set DAC error code to channel2 DMA underrun error */ |
750 | /* Disable the selected DAC channel1 DMA request */ |
751 | SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2); |
751 | __HAL_DAC_DISABLE_IT(hdac, DAC_CR_DMAEN1); |
752 | 752 | ||
753 | /* Clear the underrun flag */ |
753 | /* Error callback */ |
754 | __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR2); |
754 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
755 | 755 | hdac->DMAUnderrunCallbackCh1(hdac); |
|
756 | /* Disable the selected DAC channel2 DMA request */ |
756 | #else |
757 | CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2); |
757 | HAL_DAC_DMAUnderrunCallbackCh1(hdac); |
758 | 758 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
|
759 | /* Error callback */ |
759 | } |
760 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
760 | } |
761 | hdac->DMAUnderrunCallbackCh2(hdac); |
761 | |
762 | #else |
762 | |
763 | HAL_DACEx_DMAUnderrunCallbackCh2(hdac); |
763 | if ((itsource & DAC_IT_DMAUDR2) == DAC_IT_DMAUDR2) |
764 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
764 | { |
765 | } |
765 | /* Check underrun flag of DAC channel 2 */ |
766 | } |
766 | if ((itflag & DAC_FLAG_DMAUDR2) == DAC_FLAG_DMAUDR2) |
767 | 767 | { |
|
768 | } |
768 | /* Change DAC state to error state */ |
769 | 769 | hdac->State = HAL_DAC_STATE_ERROR; |
|
770 | /** |
770 | |
771 | * @brief Set the specified data holding register value for DAC channel. |
771 | /* Set DAC error code to channel2 DMA underrun error */ |
772 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
772 | SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2); |
773 | * the configuration information for the specified DAC. |
773 | |
774 | * @param Channel The selected DAC channel. |
774 | /* Clear the underrun flag */ |
775 | * This parameter can be one of the following values: |
775 | __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR2); |
776 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
776 | |
777 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
777 | /* Disable the selected DAC channel2 DMA request */ |
778 | * @param Alignment Specifies the data alignment. |
778 | __HAL_DAC_DISABLE_IT(hdac, DAC_CR_DMAEN2); |
779 | * This parameter can be one of the following values: |
779 | |
780 | * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected |
780 | /* Error callback */ |
781 | * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected |
781 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
782 | * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected |
782 | hdac->DMAUnderrunCallbackCh2(hdac); |
783 | * @param Data Data to be loaded in the selected data holding register. |
783 | #else |
784 | * @retval HAL status |
784 | HAL_DACEx_DMAUnderrunCallbackCh2(hdac); |
785 | */ |
785 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
786 | HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data) |
786 | } |
787 | { |
787 | } |
788 | __IO uint32_t tmp = 0UL; |
788 | |
789 | 789 | } |
|
790 | /* Check the parameters */ |
790 | |
791 | assert_param(IS_DAC_CHANNEL(Channel)); |
791 | /** |
792 | assert_param(IS_DAC_ALIGN(Alignment)); |
792 | * @brief Set the specified data holding register value for DAC channel. |
793 | assert_param(IS_DAC_DATA(Data)); |
793 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
794 | 794 | * the configuration information for the specified DAC. |
|
795 | tmp = (uint32_t)hdac->Instance; |
795 | * @param Channel The selected DAC channel. |
796 | if (Channel == DAC_CHANNEL_1) |
796 | * This parameter can be one of the following values: |
797 | { |
797 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
798 | tmp += DAC_DHR12R1_ALIGNMENT(Alignment); |
798 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
799 | } |
799 | * @param Alignment Specifies the data alignment. |
800 | 800 | * This parameter can be one of the following values: |
|
801 | else |
801 | * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected |
802 | { |
802 | * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected |
803 | tmp += DAC_DHR12R2_ALIGNMENT(Alignment); |
803 | * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected |
804 | } |
804 | * @param Data Data to be loaded in the selected data holding register. |
805 | 805 | * @retval HAL status |
|
806 | 806 | */ |
|
807 | /* Set the DAC channel selected data holding register */ |
807 | HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data) |
808 | *(__IO uint32_t *) tmp = Data; |
808 | { |
809 | 809 | __IO uint32_t tmp = 0UL; |
|
810 | /* Return function status */ |
810 | |
811 | return HAL_OK; |
811 | /* Check the DAC peripheral handle */ |
812 | } |
812 | if (hdac == NULL) |
813 | 813 | { |
|
814 | /** |
814 | return HAL_ERROR; |
815 | * @brief Conversion complete callback in non-blocking mode for Channel1 |
815 | } |
816 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
816 | |
817 | * the configuration information for the specified DAC. |
817 | /* Check the parameters */ |
818 | * @retval None |
818 | assert_param(IS_DAC_CHANNEL(Channel)); |
819 | */ |
819 | assert_param(IS_DAC_ALIGN(Alignment)); |
820 | __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac) |
820 | assert_param(IS_DAC_DATA(Data)); |
821 | { |
821 | |
822 | /* Prevent unused argument(s) compilation warning */ |
822 | tmp = (uint32_t)hdac->Instance; |
823 | UNUSED(hdac); |
823 | if (Channel == DAC_CHANNEL_1) |
824 | 824 | { |
|
825 | /* NOTE : This function should not be modified, when the callback is needed, |
825 | tmp += DAC_DHR12R1_ALIGNMENT(Alignment); |
826 | the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file |
826 | } |
827 | */ |
827 | |
828 | } |
828 | else |
829 | 829 | { |
|
830 | /** |
830 | tmp += DAC_DHR12R2_ALIGNMENT(Alignment); |
831 | * @brief Conversion half DMA transfer callback in non-blocking mode for Channel1 |
831 | } |
832 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
832 | |
833 | * the configuration information for the specified DAC. |
833 | |
834 | * @retval None |
834 | /* Set the DAC channel selected data holding register */ |
835 | */ |
835 | *(__IO uint32_t *) tmp = Data; |
836 | __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac) |
836 | |
837 | { |
837 | /* Return function status */ |
838 | /* Prevent unused argument(s) compilation warning */ |
838 | return HAL_OK; |
839 | UNUSED(hdac); |
839 | } |
840 | 840 | ||
841 | /* NOTE : This function should not be modified, when the callback is needed, |
841 | /** |
842 | the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file |
842 | * @brief Conversion complete callback in non-blocking mode for Channel1 |
843 | */ |
843 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
844 | } |
844 | * the configuration information for the specified DAC. |
845 | 845 | * @retval None |
|
846 | /** |
846 | */ |
847 | * @brief Error DAC callback for Channel1. |
847 | __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac) |
848 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
848 | { |
849 | * the configuration information for the specified DAC. |
849 | /* Prevent unused argument(s) compilation warning */ |
850 | * @retval None |
850 | UNUSED(hdac); |
851 | */ |
851 | |
852 | __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac) |
852 | /* NOTE : This function should not be modified, when the callback is needed, |
853 | { |
853 | the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file |
854 | /* Prevent unused argument(s) compilation warning */ |
854 | */ |
855 | UNUSED(hdac); |
855 | } |
856 | 856 | ||
857 | /* NOTE : This function should not be modified, when the callback is needed, |
857 | /** |
858 | the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file |
858 | * @brief Conversion half DMA transfer callback in non-blocking mode for Channel1 |
859 | */ |
859 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
860 | } |
860 | * the configuration information for the specified DAC. |
861 | 861 | * @retval None |
|
862 | /** |
862 | */ |
863 | * @brief DMA underrun DAC callback for channel1. |
863 | __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac) |
864 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
864 | { |
865 | * the configuration information for the specified DAC. |
865 | /* Prevent unused argument(s) compilation warning */ |
866 | * @retval None |
866 | UNUSED(hdac); |
867 | */ |
867 | |
868 | __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac) |
868 | /* NOTE : This function should not be modified, when the callback is needed, |
869 | { |
869 | the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file |
870 | /* Prevent unused argument(s) compilation warning */ |
870 | */ |
871 | UNUSED(hdac); |
871 | } |
872 | 872 | ||
873 | /* NOTE : This function should not be modified, when the callback is needed, |
873 | /** |
874 | the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file |
874 | * @brief Error DAC callback for Channel1. |
875 | */ |
875 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
876 | } |
876 | * the configuration information for the specified DAC. |
877 | 877 | * @retval None |
|
878 | /** |
878 | */ |
879 | * @} |
879 | __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac) |
880 | */ |
880 | { |
881 | 881 | /* Prevent unused argument(s) compilation warning */ |
|
882 | /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions |
882 | UNUSED(hdac); |
883 | * @brief Peripheral Control functions |
883 | |
884 | * |
884 | /* NOTE : This function should not be modified, when the callback is needed, |
885 | @verbatim |
885 | the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file |
886 | ============================================================================== |
886 | */ |
887 | ##### Peripheral Control functions ##### |
887 | } |
888 | ============================================================================== |
888 | |
889 | [..] This section provides functions allowing to: |
889 | /** |
890 | (+) Configure channels. |
890 | * @brief DMA underrun DAC callback for channel1. |
891 | (+) Set the specified data holding register value for DAC channel. |
891 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
892 | 892 | * the configuration information for the specified DAC. |
|
893 | @endverbatim |
893 | * @retval None |
894 | * @{ |
894 | */ |
895 | */ |
895 | __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac) |
896 | 896 | { |
|
897 | /** |
897 | /* Prevent unused argument(s) compilation warning */ |
898 | * @brief Returns the last data output value of the selected DAC channel. |
898 | UNUSED(hdac); |
899 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
899 | |
900 | * the configuration information for the specified DAC. |
900 | /* NOTE : This function should not be modified, when the callback is needed, |
901 | * @param Channel The selected DAC channel. |
901 | the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file |
902 | * This parameter can be one of the following values: |
902 | */ |
903 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
903 | } |
904 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
904 | |
905 | * @retval The selected DAC channel data output value. |
905 | /** |
906 | */ |
906 | * @} |
907 | uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel) |
907 | */ |
908 | { |
908 | |
909 | uint32_t result; |
909 | /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions |
910 | 910 | * @brief Peripheral Control functions |
|
911 | /* Check the parameters */ |
911 | * |
912 | assert_param(IS_DAC_CHANNEL(Channel)); |
912 | @verbatim |
913 | 913 | ============================================================================== |
|
914 | if (Channel == DAC_CHANNEL_1) |
914 | ##### Peripheral Control functions ##### |
915 | { |
915 | ============================================================================== |
916 | result = hdac->Instance->DOR1; |
916 | [..] This section provides functions allowing to: |
917 | } |
917 | (+) Configure channels. |
918 | 918 | (+) Set the specified data holding register value for DAC channel. |
|
919 | else |
919 | |
920 | { |
920 | @endverbatim |
921 | result = hdac->Instance->DOR2; |
921 | * @{ |
922 | } |
922 | */ |
923 | 923 | ||
924 | /* Returns the DAC channel data output register value */ |
924 | /** |
925 | return result; |
925 | * @brief Returns the last data output value of the selected DAC channel. |
926 | } |
926 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
927 | 927 | * the configuration information for the specified DAC. |
|
928 | /** |
928 | * @param Channel The selected DAC channel. |
929 | * @brief Configures the selected DAC channel. |
929 | * This parameter can be one of the following values: |
930 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
930 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
931 | * the configuration information for the specified DAC. |
931 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
932 | * @param sConfig DAC configuration structure. |
932 | * @retval The selected DAC channel data output value. |
933 | * @param Channel The selected DAC channel. |
933 | */ |
934 | * This parameter can be one of the following values: |
934 | uint32_t HAL_DAC_GetValue(const DAC_HandleTypeDef *hdac, uint32_t Channel) |
935 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
935 | { |
936 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
936 | uint32_t result; |
937 | * @retval HAL status |
937 | |
938 | */ |
938 | /* Check the DAC peripheral handle */ |
939 | HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel) |
939 | if (hdac == NULL) |
940 | { |
940 | { |
941 | uint32_t tmpreg1; |
941 | return HAL_ERROR; |
942 | uint32_t tmpreg2; |
942 | } |
943 | 943 | ||
944 | /* Check the DAC parameters */ |
944 | /* Check the parameters */ |
945 | assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger)); |
945 | assert_param(IS_DAC_CHANNEL(Channel)); |
946 | assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer)); |
946 | |
947 | assert_param(IS_DAC_CHANNEL(Channel)); |
947 | if (Channel == DAC_CHANNEL_1) |
948 | 948 | { |
|
949 | /* Process locked */ |
949 | result = hdac->Instance->DOR1; |
950 | __HAL_LOCK(hdac); |
950 | } |
951 | 951 | ||
952 | /* Change DAC state */ |
952 | else |
953 | hdac->State = HAL_DAC_STATE_BUSY; |
953 | { |
954 | 954 | result = hdac->Instance->DOR2; |
|
955 | /* Get the DAC CR value */ |
955 | } |
956 | tmpreg1 = hdac->Instance->CR; |
956 | |
957 | /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */ |
957 | /* Returns the DAC channel data output register value */ |
958 | tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << (Channel & 0x10UL)); |
958 | return result; |
959 | /* Configure for the selected DAC channel: buffer output, trigger */ |
959 | } |
960 | /* Set TSELx and TENx bits according to DAC_Trigger value */ |
960 | |
961 | /* Set BOFFx bit according to DAC_OutputBuffer value */ |
961 | /** |
962 | tmpreg2 = (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer); |
962 | * @brief Configures the selected DAC channel. |
963 | /* Calculate CR register value depending on DAC_Channel */ |
963 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
964 | tmpreg1 |= tmpreg2 << (Channel & 0x10UL); |
964 | * the configuration information for the specified DAC. |
965 | /* Write to DAC CR */ |
965 | * @param sConfig DAC configuration structure. |
966 | hdac->Instance->CR = tmpreg1; |
966 | * @param Channel The selected DAC channel. |
967 | /* Disable wave generation */ |
967 | * This parameter can be one of the following values: |
968 | CLEAR_BIT(hdac->Instance->CR, (DAC_CR_WAVE1 << (Channel & 0x10UL))); |
968 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
969 | 969 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
|
970 | /* Change DAC state */ |
970 | * @retval HAL status |
971 | hdac->State = HAL_DAC_STATE_READY; |
971 | */ |
972 | 972 | HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, |
|
973 | /* Process unlocked */ |
973 | const DAC_ChannelConfTypeDef *sConfig, uint32_t Channel) |
974 | __HAL_UNLOCK(hdac); |
974 | { |
975 | 975 | HAL_StatusTypeDef status = HAL_OK; |
|
976 | /* Return function status */ |
976 | uint32_t tmpreg1; |
977 | return HAL_OK; |
977 | uint32_t tmpreg2; |
978 | } |
978 | |
979 | 979 | /* Check the DAC peripheral handle and channel configuration struct */ |
|
980 | /** |
980 | if ((hdac == NULL) || (sConfig == NULL)) |
981 | * @} |
981 | { |
982 | */ |
982 | return HAL_ERROR; |
983 | 983 | } |
|
984 | /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions |
984 | |
985 | * @brief Peripheral State and Errors functions |
985 | /* Check the DAC parameters */ |
986 | * |
986 | assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger)); |
987 | @verbatim |
987 | assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer)); |
988 | ============================================================================== |
988 | assert_param(IS_DAC_CHANNEL(Channel)); |
989 | ##### Peripheral State and Errors functions ##### |
989 | |
990 | ============================================================================== |
990 | /* Process locked */ |
991 | [..] |
991 | __HAL_LOCK(hdac); |
992 | This subsection provides functions allowing to |
992 | |
993 | (+) Check the DAC state. |
993 | /* Change DAC state */ |
994 | (+) Check the DAC Errors. |
994 | hdac->State = HAL_DAC_STATE_BUSY; |
995 | 995 | ||
996 | @endverbatim |
996 | /* Get the DAC CR value */ |
997 | * @{ |
997 | tmpreg1 = hdac->Instance->CR; |
998 | */ |
998 | /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */ |
999 | 999 | tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) |
|
1000 | /** |
1000 | << (Channel & 0x10UL)); |
1001 | * @brief return the DAC handle state |
1001 | /* Configure for the selected DAC channel: buffer output, trigger */ |
1002 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
1002 | /* Set TSELx and TENx bits according to DAC_Trigger value */ |
1003 | * the configuration information for the specified DAC. |
1003 | /* Set BOFFx bit according to DAC_OutputBuffer value */ |
1004 | * @retval HAL state |
1004 | tmpreg2 = (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer); |
1005 | */ |
1005 | /* Calculate CR register value depending on DAC_Channel */ |
1006 | HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac) |
1006 | tmpreg1 |= tmpreg2 << (Channel & 0x10UL); |
1007 | { |
1007 | /* Write to DAC CR */ |
1008 | /* Return DAC handle state */ |
1008 | hdac->Instance->CR = tmpreg1; |
1009 | return hdac->State; |
1009 | /* Disable wave generation */ |
1010 | } |
1010 | CLEAR_BIT(hdac->Instance->CR, (DAC_CR_WAVE1 << (Channel & 0x10UL))); |
1011 | 1011 | ||
1012 | 1012 | /* Change DAC state */ |
|
1013 | /** |
1013 | hdac->State = HAL_DAC_STATE_READY; |
1014 | * @brief Return the DAC error code |
1014 | |
1015 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
1015 | /* Process unlocked */ |
1016 | * the configuration information for the specified DAC. |
1016 | __HAL_UNLOCK(hdac); |
1017 | * @retval DAC Error Code |
1017 | |
1018 | */ |
1018 | /* Return function status */ |
1019 | uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac) |
1019 | return status; |
1020 | { |
1020 | } |
1021 | return hdac->ErrorCode; |
1021 | |
1022 | } |
1022 | /** |
1023 | 1023 | * @} |
|
1024 | /** |
1024 | */ |
1025 | * @} |
1025 | |
1026 | */ |
1026 | /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions |
1027 | 1027 | * @brief Peripheral State and Errors functions |
|
1028 | /** |
1028 | * |
1029 | * @} |
1029 | @verbatim |
1030 | */ |
1030 | ============================================================================== |
1031 | 1031 | ##### Peripheral State and Errors functions ##### |
|
1032 | /** @addtogroup DAC_Exported_Functions |
1032 | ============================================================================== |
1033 | * @{ |
1033 | [..] |
1034 | */ |
1034 | This subsection provides functions allowing to |
1035 | 1035 | (+) Check the DAC state. |
|
1036 | /** @addtogroup DAC_Exported_Functions_Group1 |
1036 | (+) Check the DAC Errors. |
1037 | * @{ |
1037 | |
1038 | */ |
1038 | @endverbatim |
1039 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
1039 | * @{ |
1040 | /** |
1040 | */ |
1041 | * @brief Register a User DAC Callback |
1041 | |
1042 | * To be used instead of the weak (surcharged) predefined callback |
1042 | /** |
1043 | * @param hdac DAC handle |
1043 | * @brief return the DAC handle state |
1044 | * @param CallbackID ID of the callback to be registered |
1044 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
1045 | * This parameter can be one of the following values: |
1045 | * the configuration information for the specified DAC. |
1046 | * @arg @ref HAL_DAC_ERROR_INVALID_CALLBACK DAC Error Callback ID |
1046 | * @retval HAL state |
1047 | * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 Complete Callback ID |
1047 | */ |
1048 | * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID |
1048 | HAL_DAC_StateTypeDef HAL_DAC_GetState(const DAC_HandleTypeDef *hdac) |
1049 | * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID |
1049 | { |
1050 | * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID |
1050 | /* Return DAC handle state */ |
1051 | * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID |
1051 | return hdac->State; |
1052 | * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID |
1052 | } |
1053 | * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID |
1053 | |
1054 | * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID |
1054 | |
1055 | * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID |
1055 | /** |
1056 | * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID |
1056 | * @brief Return the DAC error code |
1057 | * |
1057 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
1058 | * @param pCallback pointer to the Callback function |
1058 | * the configuration information for the specified DAC. |
1059 | * @retval status |
1059 | * @retval DAC Error Code |
1060 | */ |
1060 | */ |
1061 | HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID, |
1061 | uint32_t HAL_DAC_GetError(const DAC_HandleTypeDef *hdac) |
1062 | pDAC_CallbackTypeDef pCallback) |
1062 | { |
1063 | { |
1063 | return hdac->ErrorCode; |
1064 | HAL_StatusTypeDef status = HAL_OK; |
1064 | } |
1065 | 1065 | ||
1066 | if (pCallback == NULL) |
1066 | /** |
1067 | { |
1067 | * @} |
1068 | /* Update the error code */ |
1068 | */ |
1069 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
1069 | |
1070 | return HAL_ERROR; |
1070 | /** |
1071 | } |
1071 | * @} |
1072 | 1072 | */ |
|
1073 | /* Process locked */ |
1073 | |
1074 | __HAL_LOCK(hdac); |
1074 | /** @addtogroup DAC_Exported_Functions |
1075 | 1075 | * @{ |
|
1076 | if (hdac->State == HAL_DAC_STATE_READY) |
1076 | */ |
1077 | { |
1077 | |
1078 | switch (CallbackID) |
1078 | /** @addtogroup DAC_Exported_Functions_Group1 |
1079 | { |
1079 | * @{ |
1080 | case HAL_DAC_CH1_COMPLETE_CB_ID : |
1080 | */ |
1081 | hdac->ConvCpltCallbackCh1 = pCallback; |
1081 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
1082 | break; |
1082 | /** |
1083 | case HAL_DAC_CH1_HALF_COMPLETE_CB_ID : |
1083 | * @brief Register a User DAC Callback |
1084 | hdac->ConvHalfCpltCallbackCh1 = pCallback; |
1084 | * To be used instead of the weak (overridden) predefined callback |
1085 | break; |
1085 | * @note The HAL_DAC_RegisterCallback() may be called before HAL_DAC_Init() in HAL_DAC_STATE_RESET to register |
1086 | case HAL_DAC_CH1_ERROR_ID : |
1086 | * callbacks for HAL_DAC_MSPINIT_CB_ID and HAL_DAC_MSPDEINIT_CB_ID |
1087 | hdac->ErrorCallbackCh1 = pCallback; |
1087 | * @param hdac DAC handle |
1088 | break; |
1088 | * @param CallbackID ID of the callback to be registered |
1089 | case HAL_DAC_CH1_UNDERRUN_CB_ID : |
1089 | * This parameter can be one of the following values: |
1090 | hdac->DMAUnderrunCallbackCh1 = pCallback; |
1090 | * @arg @ref HAL_DAC_ERROR_INVALID_CALLBACK DAC Error Callback ID |
1091 | break; |
1091 | * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 Complete Callback ID |
1092 | 1092 | * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID |
|
1093 | case HAL_DAC_CH2_COMPLETE_CB_ID : |
1093 | * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID |
1094 | hdac->ConvCpltCallbackCh2 = pCallback; |
1094 | * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID |
1095 | break; |
1095 | * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID |
1096 | case HAL_DAC_CH2_HALF_COMPLETE_CB_ID : |
1096 | * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID |
1097 | hdac->ConvHalfCpltCallbackCh2 = pCallback; |
1097 | * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID |
1098 | break; |
1098 | * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID |
1099 | case HAL_DAC_CH2_ERROR_ID : |
1099 | * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID |
1100 | hdac->ErrorCallbackCh2 = pCallback; |
1100 | * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID |
1101 | break; |
1101 | * |
1102 | case HAL_DAC_CH2_UNDERRUN_CB_ID : |
1102 | * @param pCallback pointer to the Callback function |
1103 | hdac->DMAUnderrunCallbackCh2 = pCallback; |
1103 | * @retval status |
1104 | break; |
1104 | */ |
1105 | 1105 | HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID, |
|
1106 | case HAL_DAC_MSPINIT_CB_ID : |
1106 | pDAC_CallbackTypeDef pCallback) |
1107 | hdac->MspInitCallback = pCallback; |
1107 | { |
1108 | break; |
1108 | HAL_StatusTypeDef status = HAL_OK; |
1109 | case HAL_DAC_MSPDEINIT_CB_ID : |
1109 | |
1110 | hdac->MspDeInitCallback = pCallback; |
1110 | /* Check the DAC peripheral handle */ |
1111 | break; |
1111 | if (hdac == NULL) |
1112 | default : |
1112 | { |
1113 | /* Update the error code */ |
1113 | return HAL_ERROR; |
1114 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
1114 | } |
1115 | /* update return status */ |
1115 | |
1116 | status = HAL_ERROR; |
1116 | if (pCallback == NULL) |
1117 | break; |
1117 | { |
1118 | } |
1118 | /* Update the error code */ |
1119 | } |
1119 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
1120 | else if (hdac->State == HAL_DAC_STATE_RESET) |
1120 | return HAL_ERROR; |
1121 | { |
1121 | } |
1122 | switch (CallbackID) |
1122 | |
1123 | { |
1123 | if (hdac->State == HAL_DAC_STATE_READY) |
1124 | case HAL_DAC_MSPINIT_CB_ID : |
1124 | { |
1125 | hdac->MspInitCallback = pCallback; |
1125 | switch (CallbackID) |
1126 | break; |
1126 | { |
1127 | case HAL_DAC_MSPDEINIT_CB_ID : |
1127 | case HAL_DAC_CH1_COMPLETE_CB_ID : |
1128 | hdac->MspDeInitCallback = pCallback; |
1128 | hdac->ConvCpltCallbackCh1 = pCallback; |
1129 | break; |
1129 | break; |
1130 | default : |
1130 | case HAL_DAC_CH1_HALF_COMPLETE_CB_ID : |
1131 | /* Update the error code */ |
1131 | hdac->ConvHalfCpltCallbackCh1 = pCallback; |
1132 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
1132 | break; |
1133 | /* update return status */ |
1133 | case HAL_DAC_CH1_ERROR_ID : |
1134 | status = HAL_ERROR; |
1134 | hdac->ErrorCallbackCh1 = pCallback; |
1135 | break; |
1135 | break; |
1136 | } |
1136 | case HAL_DAC_CH1_UNDERRUN_CB_ID : |
1137 | } |
1137 | hdac->DMAUnderrunCallbackCh1 = pCallback; |
1138 | else |
1138 | break; |
1139 | { |
1139 | |
1140 | /* Update the error code */ |
1140 | case HAL_DAC_CH2_COMPLETE_CB_ID : |
1141 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
1141 | hdac->ConvCpltCallbackCh2 = pCallback; |
1142 | /* update return status */ |
1142 | break; |
1143 | status = HAL_ERROR; |
1143 | case HAL_DAC_CH2_HALF_COMPLETE_CB_ID : |
1144 | } |
1144 | hdac->ConvHalfCpltCallbackCh2 = pCallback; |
1145 | 1145 | break; |
|
1146 | /* Release Lock */ |
1146 | case HAL_DAC_CH2_ERROR_ID : |
1147 | __HAL_UNLOCK(hdac); |
1147 | hdac->ErrorCallbackCh2 = pCallback; |
1148 | return status; |
1148 | break; |
1149 | } |
1149 | case HAL_DAC_CH2_UNDERRUN_CB_ID : |
1150 | 1150 | hdac->DMAUnderrunCallbackCh2 = pCallback; |
|
1151 | /** |
1151 | break; |
1152 | * @brief Unregister a User DAC Callback |
1152 | |
1153 | * DAC Callback is redirected to the weak (surcharged) predefined callback |
1153 | case HAL_DAC_MSPINIT_CB_ID : |
1154 | * @param hdac DAC handle |
1154 | hdac->MspInitCallback = pCallback; |
1155 | * @param CallbackID ID of the callback to be unregistered |
1155 | break; |
1156 | * This parameter can be one of the following values: |
1156 | case HAL_DAC_MSPDEINIT_CB_ID : |
1157 | * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 transfer Complete Callback ID |
1157 | hdac->MspDeInitCallback = pCallback; |
1158 | * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID |
1158 | break; |
1159 | * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID |
1159 | default : |
1160 | * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID |
1160 | /* Update the error code */ |
1161 | * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID |
1161 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
1162 | * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID |
1162 | /* update return status */ |
1163 | * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID |
1163 | status = HAL_ERROR; |
1164 | * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID |
1164 | break; |
1165 | * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID |
1165 | } |
1166 | * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID |
1166 | } |
1167 | * @arg @ref HAL_DAC_ALL_CB_ID DAC All callbacks |
1167 | else if (hdac->State == HAL_DAC_STATE_RESET) |
1168 | * @retval status |
1168 | { |
1169 | */ |
1169 | switch (CallbackID) |
1170 | HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID) |
1170 | { |
1171 | { |
1171 | case HAL_DAC_MSPINIT_CB_ID : |
1172 | HAL_StatusTypeDef status = HAL_OK; |
1172 | hdac->MspInitCallback = pCallback; |
1173 | 1173 | break; |
|
1174 | /* Process locked */ |
1174 | case HAL_DAC_MSPDEINIT_CB_ID : |
1175 | __HAL_LOCK(hdac); |
1175 | hdac->MspDeInitCallback = pCallback; |
1176 | 1176 | break; |
|
1177 | if (hdac->State == HAL_DAC_STATE_READY) |
1177 | default : |
1178 | { |
1178 | /* Update the error code */ |
1179 | switch (CallbackID) |
1179 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
1180 | { |
1180 | /* update return status */ |
1181 | case HAL_DAC_CH1_COMPLETE_CB_ID : |
1181 | status = HAL_ERROR; |
1182 | hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1; |
1182 | break; |
1183 | break; |
1183 | } |
1184 | case HAL_DAC_CH1_HALF_COMPLETE_CB_ID : |
1184 | } |
1185 | hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1; |
1185 | else |
1186 | break; |
1186 | { |
1187 | case HAL_DAC_CH1_ERROR_ID : |
1187 | /* Update the error code */ |
1188 | hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1; |
1188 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
1189 | break; |
1189 | /* update return status */ |
1190 | case HAL_DAC_CH1_UNDERRUN_CB_ID : |
1190 | status = HAL_ERROR; |
1191 | hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1; |
1191 | } |
1192 | break; |
1192 | |
1193 | 1193 | return status; |
|
1194 | case HAL_DAC_CH2_COMPLETE_CB_ID : |
1194 | } |
1195 | hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2; |
1195 | |
1196 | break; |
1196 | /** |
1197 | case HAL_DAC_CH2_HALF_COMPLETE_CB_ID : |
1197 | * @brief Unregister a User DAC Callback |
1198 | hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2; |
1198 | * DAC Callback is redirected to the weak (overridden) predefined callback |
1199 | break; |
1199 | * @note The HAL_DAC_UnRegisterCallback() may be called before HAL_DAC_Init() in HAL_DAC_STATE_RESET to un-register |
1200 | case HAL_DAC_CH2_ERROR_ID : |
1200 | * callbacks for HAL_DAC_MSPINIT_CB_ID and HAL_DAC_MSPDEINIT_CB_ID |
1201 | hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2; |
1201 | * @param hdac DAC handle |
1202 | break; |
1202 | * @param CallbackID ID of the callback to be unregistered |
1203 | case HAL_DAC_CH2_UNDERRUN_CB_ID : |
1203 | * This parameter can be one of the following values: |
1204 | hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2; |
1204 | * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 transfer Complete Callback ID |
1205 | break; |
1205 | * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID |
1206 | 1206 | * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID |
|
1207 | case HAL_DAC_MSPINIT_CB_ID : |
1207 | * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID |
1208 | hdac->MspInitCallback = HAL_DAC_MspInit; |
1208 | * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID |
1209 | break; |
1209 | * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID |
1210 | case HAL_DAC_MSPDEINIT_CB_ID : |
1210 | * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID |
1211 | hdac->MspDeInitCallback = HAL_DAC_MspDeInit; |
1211 | * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID |
1212 | break; |
1212 | * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID |
1213 | case HAL_DAC_ALL_CB_ID : |
1213 | * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID |
1214 | hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1; |
1214 | * @arg @ref HAL_DAC_ALL_CB_ID DAC All callbacks |
1215 | hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1; |
1215 | * @retval status |
1216 | hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1; |
1216 | */ |
1217 | hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1; |
1217 | HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID) |
1218 | 1218 | { |
|
1219 | hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2; |
1219 | HAL_StatusTypeDef status = HAL_OK; |
1220 | hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2; |
1220 | |
1221 | hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2; |
1221 | /* Check the DAC peripheral handle */ |
1222 | hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2; |
1222 | if (hdac == NULL) |
1223 | 1223 | { |
|
1224 | hdac->MspInitCallback = HAL_DAC_MspInit; |
1224 | return HAL_ERROR; |
1225 | hdac->MspDeInitCallback = HAL_DAC_MspDeInit; |
1225 | } |
1226 | break; |
1226 | |
1227 | default : |
1227 | if (hdac->State == HAL_DAC_STATE_READY) |
1228 | /* Update the error code */ |
1228 | { |
1229 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
1229 | switch (CallbackID) |
1230 | /* update return status */ |
1230 | { |
1231 | status = HAL_ERROR; |
1231 | case HAL_DAC_CH1_COMPLETE_CB_ID : |
1232 | break; |
1232 | hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1; |
1233 | } |
1233 | break; |
1234 | } |
1234 | case HAL_DAC_CH1_HALF_COMPLETE_CB_ID : |
1235 | else if (hdac->State == HAL_DAC_STATE_RESET) |
1235 | hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1; |
1236 | { |
1236 | break; |
1237 | switch (CallbackID) |
1237 | case HAL_DAC_CH1_ERROR_ID : |
1238 | { |
1238 | hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1; |
1239 | case HAL_DAC_MSPINIT_CB_ID : |
1239 | break; |
1240 | hdac->MspInitCallback = HAL_DAC_MspInit; |
1240 | case HAL_DAC_CH1_UNDERRUN_CB_ID : |
1241 | break; |
1241 | hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1; |
1242 | case HAL_DAC_MSPDEINIT_CB_ID : |
1242 | break; |
1243 | hdac->MspDeInitCallback = HAL_DAC_MspDeInit; |
1243 | |
1244 | break; |
1244 | case HAL_DAC_CH2_COMPLETE_CB_ID : |
1245 | default : |
1245 | hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2; |
1246 | /* Update the error code */ |
1246 | break; |
1247 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
1247 | case HAL_DAC_CH2_HALF_COMPLETE_CB_ID : |
1248 | /* update return status */ |
1248 | hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2; |
1249 | status = HAL_ERROR; |
1249 | break; |
1250 | break; |
1250 | case HAL_DAC_CH2_ERROR_ID : |
1251 | } |
1251 | hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2; |
1252 | } |
1252 | break; |
1253 | else |
1253 | case HAL_DAC_CH2_UNDERRUN_CB_ID : |
1254 | { |
1254 | hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2; |
1255 | /* Update the error code */ |
1255 | break; |
1256 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
1256 | |
1257 | /* update return status */ |
1257 | case HAL_DAC_MSPINIT_CB_ID : |
1258 | status = HAL_ERROR; |
1258 | hdac->MspInitCallback = HAL_DAC_MspInit; |
1259 | } |
1259 | break; |
1260 | 1260 | case HAL_DAC_MSPDEINIT_CB_ID : |
|
1261 | /* Release Lock */ |
1261 | hdac->MspDeInitCallback = HAL_DAC_MspDeInit; |
1262 | __HAL_UNLOCK(hdac); |
1262 | break; |
1263 | return status; |
1263 | case HAL_DAC_ALL_CB_ID : |
1264 | } |
1264 | hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1; |
1265 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
1265 | hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1; |
1266 | 1266 | hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1; |
|
1267 | /** |
1267 | hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1; |
1268 | * @} |
1268 | |
1269 | */ |
1269 | hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2; |
1270 | 1270 | hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2; |
|
1271 | /** |
1271 | hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2; |
1272 | * @} |
1272 | hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2; |
1273 | */ |
1273 | |
1274 | 1274 | hdac->MspInitCallback = HAL_DAC_MspInit; |
|
1275 | /** @addtogroup DAC_Private_Functions |
1275 | hdac->MspDeInitCallback = HAL_DAC_MspDeInit; |
1276 | * @{ |
1276 | break; |
1277 | */ |
1277 | default : |
1278 | 1278 | /* Update the error code */ |
|
1279 | /** |
1279 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
1280 | * @brief DMA conversion complete callback. |
1280 | /* update return status */ |
1281 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
1281 | status = HAL_ERROR; |
1282 | * the configuration information for the specified DMA module. |
1282 | break; |
1283 | * @retval None |
1283 | } |
1284 | */ |
1284 | } |
1285 | void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma) |
1285 | else if (hdac->State == HAL_DAC_STATE_RESET) |
1286 | { |
1286 | { |
1287 | DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; |
1287 | switch (CallbackID) |
1288 | 1288 | { |
|
1289 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
1289 | case HAL_DAC_MSPINIT_CB_ID : |
1290 | hdac->ConvCpltCallbackCh1(hdac); |
1290 | hdac->MspInitCallback = HAL_DAC_MspInit; |
1291 | #else |
1291 | break; |
1292 | HAL_DAC_ConvCpltCallbackCh1(hdac); |
1292 | case HAL_DAC_MSPDEINIT_CB_ID : |
1293 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
1293 | hdac->MspDeInitCallback = HAL_DAC_MspDeInit; |
1294 | 1294 | break; |
|
1295 | hdac->State = HAL_DAC_STATE_READY; |
1295 | default : |
1296 | } |
1296 | /* Update the error code */ |
1297 | 1297 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
|
1298 | /** |
1298 | /* update return status */ |
1299 | * @brief DMA half transfer complete callback. |
1299 | status = HAL_ERROR; |
1300 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
1300 | break; |
1301 | * the configuration information for the specified DMA module. |
1301 | } |
1302 | * @retval None |
1302 | } |
1303 | */ |
1303 | else |
1304 | void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma) |
1304 | { |
1305 | { |
1305 | /* Update the error code */ |
1306 | DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; |
1306 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
1307 | /* Conversion complete callback */ |
1307 | /* update return status */ |
1308 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
1308 | status = HAL_ERROR; |
1309 | hdac->ConvHalfCpltCallbackCh1(hdac); |
1309 | } |
1310 | #else |
1310 | |
1311 | HAL_DAC_ConvHalfCpltCallbackCh1(hdac); |
1311 | return status; |
1312 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
1312 | } |
1313 | } |
1313 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
1314 | 1314 | ||
1315 | /** |
1315 | /** |
1316 | * @brief DMA error callback |
1316 | * @} |
1317 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
1317 | */ |
1318 | * the configuration information for the specified DMA module. |
1318 | |
1319 | * @retval None |
1319 | /** |
1320 | */ |
1320 | * @} |
1321 | void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma) |
1321 | */ |
1322 | { |
1322 | |
1323 | DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; |
1323 | /** @addtogroup DAC_Private_Functions |
1324 | 1324 | * @{ |
|
1325 | /* Set DAC error code to DMA error */ |
1325 | */ |
1326 | hdac->ErrorCode |= HAL_DAC_ERROR_DMA; |
1326 | |
1327 | 1327 | /** |
|
1328 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
1328 | * @brief DMA conversion complete callback. |
1329 | hdac->ErrorCallbackCh1(hdac); |
1329 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
1330 | #else |
1330 | * the configuration information for the specified DMA module. |
1331 | HAL_DAC_ErrorCallbackCh1(hdac); |
1331 | * @retval None |
1332 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
1332 | */ |
1333 | 1333 | void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma) |
|
1334 | hdac->State = HAL_DAC_STATE_READY; |
1334 | { |
1335 | } |
1335 | DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; |
1336 | 1336 | ||
1337 | /** |
1337 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
1338 | * @} |
1338 | hdac->ConvCpltCallbackCh1(hdac); |
1339 | */ |
1339 | #else |
1340 | 1340 | HAL_DAC_ConvCpltCallbackCh1(hdac); |
|
1341 | /** |
1341 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
1342 | * @} |
1342 | |
1343 | */ |
1343 | hdac->State = HAL_DAC_STATE_READY; |
1344 | 1344 | } |
|
1345 | #endif /* DAC1 */ |
1345 | |
1346 | 1346 | /** |
|
1347 | #endif /* HAL_DAC_MODULE_ENABLED */ |
1347 | * @brief DMA half transfer complete callback. |
1348 | 1348 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
|
1349 | /** |
1349 | * the configuration information for the specified DMA module. |
1350 | * @} |
1350 | * @retval None |
1351 | */ |
1351 | */ |
1352 | 1352 | void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma) |
|
1353 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
1353 | { |
- | 1354 | DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; |
|
- | 1355 | /* Conversion complete callback */ |
|
- | 1356 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
|
- | 1357 | hdac->ConvHalfCpltCallbackCh1(hdac); |
|
- | 1358 | #else |
|
- | 1359 | HAL_DAC_ConvHalfCpltCallbackCh1(hdac); |
|
- | 1360 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
|
- | 1361 | } |
|
- | 1362 | ||
- | 1363 | /** |
|
- | 1364 | * @brief DMA error callback |
|
- | 1365 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
|
- | 1366 | * the configuration information for the specified DMA module. |
|
- | 1367 | * @retval None |
|
- | 1368 | */ |
|
- | 1369 | void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma) |
|
- | 1370 | { |
|
- | 1371 | DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; |
|
- | 1372 | ||
- | 1373 | /* Set DAC error code to DMA error */ |
|
- | 1374 | hdac->ErrorCode |= HAL_DAC_ERROR_DMA; |
|
- | 1375 | ||
- | 1376 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
|
- | 1377 | hdac->ErrorCallbackCh1(hdac); |
|
- | 1378 | #else |
|
- | 1379 | HAL_DAC_ErrorCallbackCh1(hdac); |
|
- | 1380 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
|
- | 1381 | ||
- | 1382 | hdac->State = HAL_DAC_STATE_READY; |
|
- | 1383 | } |
|
- | 1384 | ||
- | 1385 | /** |
|
- | 1386 | * @} |
|
- | 1387 | */ |
|
- | 1388 | ||
- | 1389 | /** |
|
- | 1390 | * @} |
|
- | 1391 | */ |
|
- | 1392 | ||
- | 1393 | #endif /* DAC1 */ |
|
- | 1394 | ||
- | 1395 | #endif /* HAL_DAC_MODULE_ENABLED */ |
|
- | 1396 | /** |
|
- | 1397 | * @} |
|
- | 1398 | */ |