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1 | /** |
1 | /** |
2 | ****************************************************************************** |
2 | ****************************************************************************** |
3 | * @file stm32l1xx_hal_cryp.c |
3 | * @file stm32l1xx_hal_cryp.c |
4 | * @author MCD Application Team |
4 | * @author MCD Application Team |
5 | * @brief CRYP HAL module driver. |
5 | * @brief CRYP HAL module driver. |
6 | * |
6 | * |
7 | * This file provides firmware functions to manage the following |
7 | * This file provides firmware functions to manage the following |
8 | * functionalities of the Cryptography (CRYP) peripheral: |
8 | * functionalities of the Cryptography (CRYP) peripheral: |
9 | * + Initialization and de-initialization functions |
9 | * + Initialization and de-initialization functions |
10 | * + Processing functions by algorithm using polling mode |
10 | * + Processing functions by algorithm using polling mode |
11 | * + Processing functions by algorithm using interrupt mode |
11 | * + Processing functions by algorithm using interrupt mode |
12 | * + Processing functions by algorithm using DMA mode |
12 | * + Processing functions by algorithm using DMA mode |
13 | * + Peripheral State functions |
13 | * + Peripheral State functions |
14 | * |
14 | * |
15 | @verbatim |
15 | @verbatim |
16 | ============================================================================== |
16 | ============================================================================== |
17 | ##### How to use this driver ##### |
17 | ##### How to use this driver ##### |
18 | ============================================================================== |
18 | ============================================================================== |
19 | [..] |
19 | [..] |
20 | The CRYP HAL driver can be used as follows: |
20 | The CRYP HAL driver can be used as follows: |
21 | 21 | ||
22 | (#)Initialize the CRYP low level resources by implementing the HAL_CRYP_MspInit(): |
22 | (#)Initialize the CRYP low level resources by implementing the HAL_CRYP_MspInit(): |
23 | (##) Enable the CRYP interface clock using __HAL_RCC_CRYP_CLK_ENABLE() |
23 | (##) Enable the CRYP interface clock using __HAL_RCC_CRYP_CLK_ENABLE() |
24 | (##) In case of using interrupts (e.g. HAL_CRYP_AESECB_Encrypt_IT()) |
24 | (##) In case of using interrupts (e.g. HAL_CRYP_AESECB_Encrypt_IT()) |
25 | (+) Configure the CRYP interrupt priority using HAL_NVIC_SetPriority() |
25 | (+) Configure the CRYP interrupt priority using HAL_NVIC_SetPriority() |
26 | (+) Enable the CRYP IRQ handler using HAL_NVIC_EnableIRQ() |
26 | (+) Enable the CRYP IRQ handler using HAL_NVIC_EnableIRQ() |
27 | (+) In CRYP IRQ handler, call HAL_CRYP_IRQHandler() |
27 | (+) In CRYP IRQ handler, call HAL_CRYP_IRQHandler() |
28 | (##) In case of using DMA to control data transfer (e.g. HAL_CRYP_AESECB_Encrypt_DMA()) |
28 | (##) In case of using DMA to control data transfer (e.g. HAL_CRYP_AESECB_Encrypt_DMA()) |
29 | (+) Enable the DMA2 interface clock using |
29 | (+) Enable the DMA2 interface clock using |
30 | (++) __HAL_RCC_DMA2_CLK_ENABLE() |
30 | (++) __HAL_RCC_DMA2_CLK_ENABLE() |
31 | (+) Configure and enable two DMA Channels one for managing data transfer from |
31 | (+) Configure and enable two DMA Channels one for managing data transfer from |
32 | memory to peripheral (input channel) and another channel for managing data |
32 | memory to peripheral (input channel) and another channel for managing data |
33 | transfer from peripheral to memory (output channel) |
33 | transfer from peripheral to memory (output channel) |
34 | (+) Associate the initialized DMA handle to the CRYP DMA handle |
34 | (+) Associate the initialized DMA handle to the CRYP DMA handle |
35 | using __HAL_LINKDMA() |
35 | using __HAL_LINKDMA() |
36 | (+) Configure the priority and enable the NVIC for the transfer complete |
36 | (+) Configure the priority and enable the NVIC for the transfer complete |
37 | interrupt on the two DMA Streams. The output stream should have higher |
37 | interrupt on the two DMA Streams. The output stream should have higher |
38 | priority than the input stream. |
38 | priority than the input stream. |
39 | (++) HAL_NVIC_SetPriority() |
39 | (++) HAL_NVIC_SetPriority() |
40 | (++) HAL_NVIC_EnableIRQ() |
40 | (++) HAL_NVIC_EnableIRQ() |
41 | |
41 | |
42 | (#)Initialize the CRYP HAL using HAL_CRYP_Init(). This function configures mainly: |
42 | (#)Initialize the CRYP HAL using HAL_CRYP_Init(). This function configures mainly: |
43 | (##) The data type: 1-bit, 8-bit, 16-bit and 32-bit |
43 | (##) The data type: 1-bit, 8-bit, 16-bit and 32-bit |
44 | (##) The encryption/decryption key. |
44 | (##) The encryption/decryption key. |
45 | (##) The initialization vector (counter). It is not used ECB mode. |
45 | (##) The initialization vector (counter). It is not used ECB mode. |
46 | |
46 | |
47 | (#)Three processing (encryption/decryption) functions are available: |
47 | (#)Three processing (encryption/decryption) functions are available: |
48 | (##) Polling mode: encryption and decryption APIs are blocking functions |
48 | (##) Polling mode: encryption and decryption APIs are blocking functions |
49 | i.e. they process the data and wait till the processing is finished |
49 | i.e. they process the data and wait till the processing is finished |
50 | e.g. HAL_CRYP_AESCBC_Encrypt() |
50 | e.g. HAL_CRYP_AESCBC_Encrypt() |
51 | (##) Interrupt mode: encryption and decryption APIs are not blocking functions |
51 | (##) Interrupt mode: encryption and decryption APIs are not blocking functions |
52 | i.e. they process the data under interrupt |
52 | i.e. they process the data under interrupt |
53 | e.g. HAL_CRYP_AESCBC_Encrypt_IT() |
53 | e.g. HAL_CRYP_AESCBC_Encrypt_IT() |
54 | (##) DMA mode: encryption and decryption APIs are not blocking functions |
54 | (##) DMA mode: encryption and decryption APIs are not blocking functions |
55 | i.e. the data transfer is ensured by DMA |
55 | i.e. the data transfer is ensured by DMA |
56 | e.g. HAL_CRYP_AESCBC_Encrypt_DMA() |
56 | e.g. HAL_CRYP_AESCBC_Encrypt_DMA() |
57 | |
57 | |
58 | (#)When the processing function is called for the first time after HAL_CRYP_Init() |
58 | (#)When the processing function is called for the first time after HAL_CRYP_Init() |
59 | the CRYP peripheral is initialized and processes the buffer in input. |
59 | the CRYP peripheral is initialized and processes the buffer in input. |
60 | At second call, the processing function performs an append of the already |
60 | At second call, the processing function performs an append of the already |
61 | processed buffer. |
61 | processed buffer. |
62 | When a new data block is to be processed, call HAL_CRYP_Init() then the |
62 | When a new data block is to be processed, call HAL_CRYP_Init() then the |
63 | processing function. |
63 | processing function. |
64 | |
64 | |
65 | (#)Call HAL_CRYP_DeInit() to deinitialize the CRYP peripheral. |
65 | (#)Call HAL_CRYP_DeInit() to deinitialize the CRYP peripheral. |
66 | 66 | ||
67 | @endverbatim |
67 | @endverbatim |
68 | ****************************************************************************** |
68 | ****************************************************************************** |
69 | * @attention |
69 | * @attention |
70 | * |
70 | * |
71 | * <h2><center>© Copyright (c) 2017 STMicroelectronics. |
71 | * Copyright (c) 2017 STMicroelectronics. |
72 | * All rights reserved.</center></h2> |
72 | * All rights reserved. |
73 | * |
73 | * |
74 | * This software component is licensed by ST under BSD 3-Clause license, |
74 | * This software is licensed under terms that can be found in the LICENSE file |
75 | * the "License"; You may not use this file except in compliance with the |
75 | * in the root directory of this software component. |
76 | * License. You may obtain a copy of the License at: |
76 | * If no LICENSE file comes with this software, it is provided AS-IS. |
77 | * opensource.org/licenses/BSD-3-Clause |
77 | * |
78 | * |
78 | ****************************************************************************** |
79 | ****************************************************************************** |
79 | */ |
80 | */ |
80 | |
81 | 81 | /* Includes ------------------------------------------------------------------*/ |
|
82 | /* Includes ------------------------------------------------------------------*/ |
82 | #include "stm32l1xx_hal.h" |
83 | #include "stm32l1xx_hal.h" |
83 | |
84 | 84 | #ifdef HAL_CRYP_MODULE_ENABLED |
|
85 | #ifdef HAL_CRYP_MODULE_ENABLED |
85 | |
86 | 86 | /** @addtogroup STM32L1xx_HAL_Driver |
|
87 | /** @addtogroup STM32L1xx_HAL_Driver |
87 | * @{ |
88 | * @{ |
88 | */ |
89 | */ |
89 | |
90 | 90 | /** @defgroup CRYP CRYP |
|
91 | /** @defgroup CRYP CRYP |
91 | * @brief CRYP HAL module driver. |
92 | * @brief CRYP HAL module driver. |
92 | * @{ |
93 | * @{ |
93 | */ |
94 | */ |
94 | |
95 | 95 | #if defined(STM32L162xC) || defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L162xE) || defined(STM32L162xDX) |
|
96 | #if defined(STM32L162xC) || defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L162xE) || defined(STM32L162xDX) |
96 | |
97 | 97 | /* Private typedef -----------------------------------------------------------*/ |
|
98 | /* Private typedef -----------------------------------------------------------*/ |
98 | /* Private define ------------------------------------------------------------*/ |
99 | /* Private define ------------------------------------------------------------*/ |
99 | |
100 | 100 | /** @defgroup CRYP_Private_Defines CRYP Private Defines |
|
101 | /** @defgroup CRYP_Private_Defines CRYP Private Defines |
101 | * @{ |
102 | * @{ |
102 | */ |
103 | */ |
103 | |
104 | 104 | #define CRYP_ALGO_CHAIN_MASK (AES_CR_MODE | AES_CR_CHMOD) |
|
105 | #define CRYP_ALGO_CHAIN_MASK (AES_CR_MODE | AES_CR_CHMOD) |
105 | |
106 | 106 | /** |
|
107 | /** |
107 | * @} |
108 | * @} |
108 | */ |
109 | */ |
109 | |
110 | 110 | /* Private macro -------------------------------------------------------------*/ |
|
111 | /* Private macro -------------------------------------------------------------*/ |
111 | /* Private variables ---------------------------------------------------------*/ |
112 | /* Private variables ---------------------------------------------------------*/ |
112 | /* Private function prototypes -----------------------------------------------*/ |
113 | /* Private function prototypes -----------------------------------------------*/ |
113 | |
114 | 114 | /** @defgroup CRYP_Private_Functions CRYP Private Functions |
|
115 | /** @defgroup CRYP_Private_Functions CRYP Private Functions |
115 | * @{ |
116 | * @{ |
116 | */ |
117 | */ |
117 | |
118 | 118 | static HAL_StatusTypeDef CRYP_EncryptDecrypt_IT(CRYP_HandleTypeDef *hcryp); |
|
119 | static HAL_StatusTypeDef CRYP_EncryptDecrypt_IT(CRYP_HandleTypeDef *hcryp); |
119 | static void CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector); |
120 | static void CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector); |
120 | static void CRYP_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key); |
121 | static void CRYP_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key); |
121 | static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout); |
122 | static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout); |
122 | static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma); |
123 | static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma); |
123 | static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma); |
124 | static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma); |
124 | static void CRYP_DMAError(DMA_HandleTypeDef *hdma); |
125 | static void CRYP_DMAError(DMA_HandleTypeDef *hdma); |
125 | static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr); |
126 | static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr); |
126 | |
127 | 127 | /** |
|
128 | /** |
128 | * @} |
129 | * @} |
129 | */ |
130 | */ |
130 | |
131 | 131 | /* Private functions ---------------------------------------------------------*/ |
|
132 | /* Private functions ---------------------------------------------------------*/ |
132 | |
133 | 133 | /** @defgroup CRYP_Exported_Functions CRYP Exported Functions |
|
134 | /** @defgroup CRYP_Exported_Functions CRYP Exported Functions |
134 | * @{ |
135 | * @{ |
135 | */ |
136 | */ |
136 | |
137 | 137 | /** @defgroup CRYP_Exported_Functions_Group1 Initialization and de-initialization functions |
|
138 | /** @defgroup CRYP_Exported_Functions_Group1 Initialization and de-initialization functions |
138 | * @brief Initialization and Configuration functions. |
139 | * @brief Initialization and Configuration functions. |
139 | * |
140 | * |
140 | @verbatim |
141 | @verbatim |
141 | ============================================================================== |
142 | ============================================================================== |
142 | ##### Initialization and de-initialization functions ##### |
143 | ##### Initialization and de-initialization functions ##### |
143 | ============================================================================== |
144 | ============================================================================== |
144 | [..] This section provides functions allowing to: |
145 | [..] This section provides functions allowing to: |
145 | (+) Initialize the CRYP according to the specified parameters |
146 | (+) Initialize the CRYP according to the specified parameters |
146 | in the CRYP_InitTypeDef and creates the associated handle |
147 | in the CRYP_InitTypeDef and creates the associated handle |
147 | (+) DeInitialize the CRYP peripheral |
148 | (+) DeInitialize the CRYP peripheral |
148 | (+) Initialize the CRYP MSP |
149 | (+) Initialize the CRYP MSP |
149 | (+) DeInitialize CRYP MSP |
150 | (+) DeInitialize CRYP MSP |
150 | |
151 | |
151 | @endverbatim |
152 | @endverbatim |
152 | * @{ |
153 | * @{ |
153 | */ |
154 | */ |
154 | |
155 | 155 | /** |
|
156 | /** |
156 | * @brief Initializes the CRYP according to the specified |
157 | * @brief Initializes the CRYP according to the specified |
157 | * parameters in the CRYP_InitTypeDef and creates the associated handle. |
158 | * parameters in the CRYP_InitTypeDef and creates the associated handle. |
158 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
159 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
159 | * the configuration information for CRYP module |
160 | * the configuration information for CRYP module |
160 | * @retval HAL status |
161 | * @retval HAL status |
161 | */ |
162 | */ |
162 | HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp) |
163 | HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp) |
163 | { |
164 | { |
164 | /* Check the CRYP handle allocation */ |
165 | /* Check the CRYP handle allocation */ |
165 | if(hcryp == NULL) |
166 | if(hcryp == NULL) |
166 | { |
167 | { |
167 | return HAL_ERROR; |
168 | return HAL_ERROR; |
168 | } |
169 | } |
169 | |
170 | 170 | /* Check the parameters */ |
|
171 | /* Check the parameters */ |
171 | assert_param(IS_AES_ALL_INSTANCE(hcryp->Instance)); |
172 | assert_param(IS_AES_ALL_INSTANCE(hcryp->Instance)); |
172 | assert_param(IS_CRYP_DATATYPE(hcryp->Init.DataType)); |
173 | assert_param(IS_CRYP_DATATYPE(hcryp->Init.DataType)); |
173 | |
174 | 174 | if(hcryp->State == HAL_CRYP_STATE_RESET) |
|
175 | if(hcryp->State == HAL_CRYP_STATE_RESET) |
175 | { |
176 | { |
176 | /* Allocate lock resource and initialize it */ |
177 | /* Allocate lock resource and initialize it */ |
177 | hcryp->Lock = HAL_UNLOCKED; |
178 | hcryp->Lock = HAL_UNLOCKED; |
178 | |
179 | 179 | /* Init the low level hardware */ |
|
180 | /* Init the low level hardware */ |
180 | HAL_CRYP_MspInit(hcryp); |
181 | HAL_CRYP_MspInit(hcryp); |
181 | } |
182 | } |
182 | |
183 | 183 | /* Check if AES already enabled */ |
|
184 | /* Check if AES already enabled */ |
184 | if (HAL_IS_BIT_CLR(hcryp->Instance->CR, AES_CR_EN)) |
185 | if (HAL_IS_BIT_CLR(hcryp->Instance->CR, AES_CR_EN)) |
185 | { |
186 | { |
186 | /* Change the CRYP state */ |
187 | /* Change the CRYP state */ |
187 | hcryp->State = HAL_CRYP_STATE_BUSY; |
188 | hcryp->State = HAL_CRYP_STATE_BUSY; |
188 | |
189 | 189 | /* Set the data type*/ |
|
190 | /* Set the data type*/ |
190 | MODIFY_REG(hcryp->Instance->CR, AES_CR_DATATYPE, hcryp->Init.DataType); |
191 | MODIFY_REG(hcryp->Instance->CR, AES_CR_DATATYPE, hcryp->Init.DataType); |
191 | |
192 | 192 | /* Reset CrypInCount and CrypOutCount */ |
|
193 | /* Reset CrypInCount and CrypOutCount */ |
193 | hcryp->CrypInCount = 0; |
194 | hcryp->CrypInCount = 0; |
194 | hcryp->CrypOutCount = 0; |
195 | hcryp->CrypOutCount = 0; |
195 | |
196 | 196 | /* Change the CRYP state */ |
|
197 | /* Change the CRYP state */ |
197 | hcryp->State = HAL_CRYP_STATE_READY; |
198 | hcryp->State = HAL_CRYP_STATE_READY; |
198 | |
199 | 199 | /* Set the default CRYP phase */ |
|
200 | /* Set the default CRYP phase */ |
200 | hcryp->Phase = HAL_CRYP_PHASE_READY; |
201 | hcryp->Phase = HAL_CRYP_PHASE_READY; |
201 | |
202 | 202 | /* Return function status */ |
|
203 | /* Return function status */ |
203 | return HAL_OK; |
204 | return HAL_OK; |
204 | } |
205 | } |
205 | else |
206 | else |
206 | { |
207 | { |
207 | /* The Datatype selection must be changed if the AES is disabled. Writing these bits while the AES is */ |
208 | /* The Datatype selection must be changed if the AES is disabled. Writing these bits while the AES is */ |
208 | /* enabled is forbidden to avoid unpredictable AES behavior.*/ |
209 | /* enabled is forbidden to avoid unpredictable AES behavior.*/ |
209 | |
210 | 210 | /* Return function status */ |
|
211 | /* Return function status */ |
211 | return HAL_ERROR; |
212 | return HAL_ERROR; |
212 | } |
213 | } |
213 | |
214 | 214 | } |
|
215 | } |
215 | |
216 | 216 | /** |
|
217 | /** |
217 | * @brief DeInitializes the CRYP peripheral. |
218 | * @brief DeInitializes the CRYP peripheral. |
218 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
219 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
219 | * the configuration information for CRYP module |
220 | * the configuration information for CRYP module |
220 | * @retval HAL status |
221 | * @retval HAL status |
221 | */ |
222 | */ |
222 | HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp) |
223 | HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp) |
223 | { |
224 | { |
224 | /* Check the CRYP handle allocation */ |
225 | /* Check the CRYP handle allocation */ |
225 | if(hcryp == NULL) |
226 | if(hcryp == NULL) |
226 | { |
227 | { |
227 | return HAL_ERROR; |
228 | return HAL_ERROR; |
228 | } |
229 | } |
229 | |
230 | 230 | /* Change the CRYP state */ |
|
231 | /* Change the CRYP state */ |
231 | hcryp->State = HAL_CRYP_STATE_BUSY; |
232 | hcryp->State = HAL_CRYP_STATE_BUSY; |
232 | |
233 | 233 | /* Set the default CRYP phase */ |
|
234 | /* Set the default CRYP phase */ |
234 | hcryp->Phase = HAL_CRYP_PHASE_READY; |
235 | hcryp->Phase = HAL_CRYP_PHASE_READY; |
235 | |
236 | 236 | /* Reset CrypInCount and CrypOutCount */ |
|
237 | /* Reset CrypInCount and CrypOutCount */ |
237 | hcryp->CrypInCount = 0; |
238 | hcryp->CrypInCount = 0; |
238 | hcryp->CrypOutCount = 0; |
239 | hcryp->CrypOutCount = 0; |
239 | |
240 | 240 | /* Disable the CRYP Peripheral Clock */ |
|
241 | /* Disable the CRYP Peripheral Clock */ |
241 | __HAL_CRYP_DISABLE(hcryp); |
242 | __HAL_CRYP_DISABLE(hcryp); |
242 | |
243 | 243 | /* DeInit the low level hardware: CLOCK, NVIC.*/ |
|
244 | /* DeInit the low level hardware: CLOCK, NVIC.*/ |
244 | HAL_CRYP_MspDeInit(hcryp); |
245 | HAL_CRYP_MspDeInit(hcryp); |
245 | |
246 | 246 | /* Change the CRYP state */ |
|
247 | /* Change the CRYP state */ |
247 | hcryp->State = HAL_CRYP_STATE_RESET; |
248 | hcryp->State = HAL_CRYP_STATE_RESET; |
248 | |
249 | 249 | /* Release Lock */ |
|
250 | /* Release Lock */ |
250 | __HAL_UNLOCK(hcryp); |
251 | __HAL_UNLOCK(hcryp); |
251 | |
252 | 252 | /* Return function status */ |
|
253 | /* Return function status */ |
253 | return HAL_OK; |
254 | return HAL_OK; |
254 | } |
255 | } |
255 | |
256 | 256 | /** |
|
257 | /** |
257 | * @brief Initializes the CRYP MSP. |
258 | * @brief Initializes the CRYP MSP. |
258 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
259 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
259 | * the configuration information for CRYP module |
260 | * the configuration information for CRYP module |
260 | * @retval None |
261 | * @retval None |
261 | */ |
262 | */ |
262 | __weak void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp) |
263 | __weak void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp) |
263 | { |
264 | { |
264 | /* Prevent unused argument(s) compilation warning */ |
265 | /* Prevent unused argument(s) compilation warning */ |
265 | UNUSED(hcryp); |
266 | UNUSED(hcryp); |
266 | |
267 | 267 | /* NOTE : This function should not be modified; when the callback is needed, |
|
268 | /* NOTE : This function should not be modified; when the callback is needed, |
268 | the HAL_CRYP_MspInit can be implemented in the user file */ |
269 | the HAL_CRYP_MspInit can be implemented in the user file */ |
269 | } |
270 | } |
270 | |
271 | 271 | /** |
|
272 | /** |
272 | * @brief DeInitializes CRYP MSP. |
273 | * @brief DeInitializes CRYP MSP. |
273 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
274 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
274 | * the configuration information for CRYP module |
275 | * the configuration information for CRYP module |
275 | * @retval None |
276 | * @retval None |
276 | */ |
277 | */ |
277 | __weak void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp) |
278 | __weak void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp) |
278 | { |
279 | { |
279 | /* Prevent unused argument(s) compilation warning */ |
280 | /* Prevent unused argument(s) compilation warning */ |
280 | UNUSED(hcryp); |
281 | UNUSED(hcryp); |
281 | |
282 | 282 | /* NOTE : This function should not be modified; when the callback is needed, |
|
283 | /* NOTE : This function should not be modified; when the callback is needed, |
283 | the HAL_CRYP_MspDeInit can be implemented in the user file */ |
284 | the HAL_CRYP_MspDeInit can be implemented in the user file */ |
284 | } |
285 | } |
285 | |
286 | 286 | /** |
|
287 | /** |
287 | * @} |
288 | * @} |
288 | */ |
289 | */ |
289 | |
290 | 290 | /** @defgroup CRYP_Exported_Functions_Group2 AES processing functions |
|
291 | /** @defgroup CRYP_Exported_Functions_Group2 AES processing functions |
291 | * @brief processing functions. |
292 | * @brief processing functions. |
292 | * |
293 | * |
293 | @verbatim |
294 | @verbatim |
294 | ============================================================================== |
295 | ============================================================================== |
295 | ##### AES processing functions ##### |
296 | ##### AES processing functions ##### |
296 | ============================================================================== |
297 | ============================================================================== |
297 | [..] This section provides functions allowing to: |
298 | [..] This section provides functions allowing to: |
298 | (+) Encrypt plaintext using AES algorithm in different chaining modes |
299 | (+) Encrypt plaintext using AES algorithm in different chaining modes |
299 | (+) Decrypt cyphertext using AES algorithm in different chaining modes |
300 | (+) Decrypt cyphertext using AES algorithm in different chaining modes |
300 | [..] Three processing functions are available: |
301 | [..] Three processing functions are available: |
301 | (+) Polling mode |
302 | (+) Polling mode |
302 | (+) Interrupt mode |
303 | (+) Interrupt mode |
303 | (+) DMA mode |
304 | (+) DMA mode |
304 | |
305 | 305 | @endverbatim |
|
306 | @endverbatim |
306 | * @{ |
307 | * @{ |
307 | */ |
308 | */ |
308 | |
309 | 309 | /** |
|
310 | /** |
310 | * @brief Initializes the CRYP peripheral in AES ECB encryption mode |
311 | * @brief Initializes the CRYP peripheral in AES ECB encryption mode |
311 | * then encrypt pPlainData. The cypher data are available in pCypherData |
312 | * then encrypt pPlainData. The cypher data are available in pCypherData |
312 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
313 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
313 | * the configuration information for CRYP module |
314 | * the configuration information for CRYP module |
314 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
315 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
315 | * @param Size Length of the plaintext buffer, must be a multiple of 16. |
316 | * @param Size Length of the plaintext buffer, must be a multiple of 16. |
316 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
317 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
317 | * @param Timeout Specify Timeout value |
318 | * @param Timeout Specify Timeout value |
318 | * @retval HAL status |
319 | * @retval HAL status |
319 | */ |
320 | */ |
320 | HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout) |
321 | HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout) |
321 | { |
322 | { |
322 | /* Process Locked */ |
323 | /* Process Locked */ |
323 | __HAL_LOCK(hcryp); |
324 | __HAL_LOCK(hcryp); |
324 | |
325 | 325 | /* Check that data aligned on u32 and Size multiple of 16*/ |
|
326 | /* Check that data aligned on u32 and Size multiple of 16*/ |
326 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
327 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
327 | { |
328 | { |
328 | /* Process Locked */ |
329 | /* Process Locked */ |
329 | __HAL_UNLOCK(hcryp); |
330 | __HAL_UNLOCK(hcryp); |
330 | |
331 | 331 | /* Return function status */ |
|
332 | /* Return function status */ |
332 | return HAL_ERROR; |
333 | return HAL_ERROR; |
333 | } |
334 | } |
334 | |
335 | 335 | /* Check if HAL_CRYP_Init has been called */ |
|
336 | /* Check if HAL_CRYP_Init has been called */ |
336 | if(hcryp->State != HAL_CRYP_STATE_RESET) |
337 | if(hcryp->State != HAL_CRYP_STATE_RESET) |
337 | { |
338 | { |
338 | /* Change the CRYP state */ |
339 | /* Change the CRYP state */ |
339 | hcryp->State = HAL_CRYP_STATE_BUSY; |
340 | hcryp->State = HAL_CRYP_STATE_BUSY; |
340 | |
341 | 341 | /* Check if initialization phase has already been performed */ |
|
342 | /* Check if initialization phase has already been performed */ |
342 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
343 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
343 | { |
344 | { |
344 | /* Set the key */ |
345 | /* Set the key */ |
345 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
346 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
346 | |
347 | 347 | /* Reset the CHMOD & MODE bits */ |
|
348 | /* Reset the CHMOD & MODE bits */ |
348 | CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK); |
349 | CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK); |
349 | |
350 | 350 | /* Set the CRYP peripheral in AES ECB mode */ |
|
351 | /* Set the CRYP peripheral in AES ECB mode */ |
351 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT); |
352 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT); |
352 | |
353 | 353 | /* Enable CRYP */ |
|
354 | /* Enable CRYP */ |
354 | __HAL_CRYP_ENABLE(hcryp); |
355 | __HAL_CRYP_ENABLE(hcryp); |
355 | |
356 | 356 | /* Set the phase */ |
|
357 | /* Set the phase */ |
357 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
358 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
358 | } |
359 | } |
359 | |
360 | 360 | /* Write Plain Data and Get Cypher Data */ |
|
361 | /* Write Plain Data and Get Cypher Data */ |
361 | if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK) |
362 | if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK) |
362 | { |
363 | { |
363 | return HAL_TIMEOUT; |
364 | return HAL_TIMEOUT; |
364 | } |
365 | } |
365 | |
366 | 366 | /* Change the CRYP state */ |
|
367 | /* Change the CRYP state */ |
367 | hcryp->State = HAL_CRYP_STATE_READY; |
368 | hcryp->State = HAL_CRYP_STATE_READY; |
368 | |
369 | 369 | /* Process Unlocked */ |
|
370 | /* Process Unlocked */ |
370 | __HAL_UNLOCK(hcryp); |
371 | __HAL_UNLOCK(hcryp); |
371 | |
372 | 372 | /* Return function status */ |
|
373 | /* Return function status */ |
373 | return HAL_OK; |
374 | return HAL_OK; |
374 | } |
375 | } |
375 | else |
376 | else |
376 | { |
377 | { |
377 | /* Process Locked */ |
378 | /* Process Locked */ |
378 | __HAL_UNLOCK(hcryp); |
379 | __HAL_UNLOCK(hcryp); |
379 | |
380 | 380 | /* Return function status */ |
|
381 | /* Return function status */ |
381 | return HAL_ERROR; |
382 | return HAL_ERROR; |
382 | } |
383 | } |
383 | } |
384 | } |
384 | |
385 | 385 | /** |
|
386 | /** |
386 | * @brief Initializes the CRYP peripheral in AES CBC encryption mode |
387 | * @brief Initializes the CRYP peripheral in AES CBC encryption mode |
387 | * then encrypt pPlainData. The cypher data are available in pCypherData |
388 | * then encrypt pPlainData. The cypher data are available in pCypherData |
388 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
389 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
389 | * the configuration information for CRYP module |
390 | * the configuration information for CRYP module |
390 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
391 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
391 | * @param Size Length of the plaintext buffer, must be a multiple of 16. |
392 | * @param Size Length of the plaintext buffer, must be a multiple of 16. |
392 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
393 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
393 | * @param Timeout Specify Timeout value |
394 | * @param Timeout Specify Timeout value |
394 | * @retval HAL status |
395 | * @retval HAL status |
395 | */ |
396 | */ |
396 | HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout) |
397 | HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout) |
397 | { |
398 | { |
398 | /* Process Locked */ |
399 | /* Process Locked */ |
399 | __HAL_LOCK(hcryp); |
400 | __HAL_LOCK(hcryp); |
400 | |
401 | 401 | /* Check that data aligned on u32 */ |
|
402 | /* Check that data aligned on u32 */ |
402 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
403 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
403 | { |
404 | { |
404 | /* Process Locked */ |
405 | /* Process Locked */ |
405 | __HAL_UNLOCK(hcryp); |
406 | __HAL_UNLOCK(hcryp); |
406 | |
407 | 407 | /* Return function status */ |
|
408 | /* Return function status */ |
408 | return HAL_ERROR; |
409 | return HAL_ERROR; |
409 | } |
410 | } |
410 | |
411 | 411 | /* Check if HAL_CRYP_Init has been called */ |
|
412 | /* Check if HAL_CRYP_Init has been called */ |
412 | if(hcryp->State != HAL_CRYP_STATE_RESET) |
413 | if(hcryp->State != HAL_CRYP_STATE_RESET) |
413 | { |
414 | { |
414 | /* Change the CRYP state */ |
415 | /* Change the CRYP state */ |
415 | hcryp->State = HAL_CRYP_STATE_BUSY; |
416 | hcryp->State = HAL_CRYP_STATE_BUSY; |
416 | |
417 | 417 | /* Check if initialization phase has already been performed */ |
|
418 | /* Check if initialization phase has already been performed */ |
418 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
419 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
419 | { |
420 | { |
420 | /* Set the key */ |
421 | /* Set the key */ |
421 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
422 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
422 | |
423 | 423 | /* Reset the CHMOD & MODE bits */ |
|
424 | /* Reset the CHMOD & MODE bits */ |
424 | CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK); |
425 | CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK); |
425 | |
426 | 426 | /* Set the CRYP peripheral in AES CBC mode */ |
|
427 | /* Set the CRYP peripheral in AES CBC mode */ |
427 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT); |
428 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT); |
428 | |
429 | 429 | /* Set the Initialization Vector */ |
|
430 | /* Set the Initialization Vector */ |
430 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect); |
431 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect); |
431 | |
432 | 432 | /* Enable CRYP */ |
|
433 | /* Enable CRYP */ |
433 | __HAL_CRYP_ENABLE(hcryp); |
434 | __HAL_CRYP_ENABLE(hcryp); |
434 | |
435 | 435 | /* Set the phase */ |
|
436 | /* Set the phase */ |
436 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
437 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
437 | } |
438 | } |
438 | |
439 | 439 | /* Write Plain Data and Get Cypher Data */ |
|
440 | /* Write Plain Data and Get Cypher Data */ |
440 | if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK) |
441 | if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK) |
441 | { |
442 | { |
442 | return HAL_TIMEOUT; |
443 | return HAL_TIMEOUT; |
443 | } |
444 | } |
444 | |
445 | 445 | /* Change the CRYP state */ |
|
446 | /* Change the CRYP state */ |
446 | hcryp->State = HAL_CRYP_STATE_READY; |
447 | hcryp->State = HAL_CRYP_STATE_READY; |
447 | |
448 | 448 | /* Process Unlocked */ |
|
449 | /* Process Unlocked */ |
449 | __HAL_UNLOCK(hcryp); |
450 | __HAL_UNLOCK(hcryp); |
450 | |
451 | 451 | /* Return function status */ |
|
452 | /* Return function status */ |
452 | return HAL_OK; |
453 | return HAL_OK; |
453 | } |
454 | } |
454 | else |
455 | else |
455 | { |
456 | { |
456 | /* Process Locked */ |
457 | /* Process Locked */ |
457 | __HAL_UNLOCK(hcryp); |
458 | __HAL_UNLOCK(hcryp); |
458 | |
459 | 459 | /* Return function status */ |
|
460 | /* Return function status */ |
460 | return HAL_ERROR; |
461 | return HAL_ERROR; |
461 | } |
462 | } |
462 | } |
463 | } |
463 | |
464 | 464 | /** |
|
465 | /** |
465 | * @brief Initializes the CRYP peripheral in AES CTR encryption mode |
466 | * @brief Initializes the CRYP peripheral in AES CTR encryption mode |
466 | * then encrypt pPlainData. The cypher data are available in pCypherData |
467 | * then encrypt pPlainData. The cypher data are available in pCypherData |
467 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
468 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
468 | * the configuration information for CRYP module |
469 | * the configuration information for CRYP module |
469 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
470 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
470 | * @param Size Length of the plaintext buffer, must be a multiple of 16. |
471 | * @param Size Length of the plaintext buffer, must be a multiple of 16. |
471 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
472 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
472 | * @param Timeout Specify Timeout value |
473 | * @param Timeout Specify Timeout value |
473 | * @retval HAL status |
474 | * @retval HAL status |
474 | */ |
475 | */ |
475 | HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout) |
476 | HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout) |
476 | { |
477 | { |
477 | /* Process Locked */ |
478 | /* Process Locked */ |
478 | __HAL_LOCK(hcryp); |
479 | __HAL_LOCK(hcryp); |
479 | |
480 | 480 | /* Check that data aligned on u32 */ |
|
481 | /* Check that data aligned on u32 */ |
481 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
482 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
482 | { |
483 | { |
483 | /* Process Locked */ |
484 | /* Process Locked */ |
484 | __HAL_UNLOCK(hcryp); |
485 | __HAL_UNLOCK(hcryp); |
485 | |
486 | 486 | /* Return function status */ |
|
487 | /* Return function status */ |
487 | return HAL_ERROR; |
488 | return HAL_ERROR; |
488 | } |
489 | } |
489 | |
490 | 490 | /* Check if HAL_CRYP_Init has been called */ |
|
491 | /* Check if HAL_CRYP_Init has been called */ |
491 | if(hcryp->State != HAL_CRYP_STATE_RESET) |
492 | if(hcryp->State != HAL_CRYP_STATE_RESET) |
492 | { |
493 | { |
493 | /* Change the CRYP state */ |
494 | /* Change the CRYP state */ |
494 | hcryp->State = HAL_CRYP_STATE_BUSY; |
495 | hcryp->State = HAL_CRYP_STATE_BUSY; |
495 | |
496 | 496 | /* Check if initialization phase has already been performed */ |
|
497 | /* Check if initialization phase has already been performed */ |
497 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
498 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
498 | { |
499 | { |
499 | /* Set the key */ |
500 | /* Set the key */ |
500 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
501 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
501 | |
502 | 502 | /* Reset the CHMOD & MODE bits */ |
|
503 | /* Reset the CHMOD & MODE bits */ |
503 | CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK); |
504 | CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK); |
504 | |
505 | 505 | /* Set the CRYP peripheral in AES CTR mode */ |
|
506 | /* Set the CRYP peripheral in AES CTR mode */ |
506 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT); |
507 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT); |
507 | |
508 | 508 | /* Set the Initialization Vector */ |
|
509 | /* Set the Initialization Vector */ |
509 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect); |
510 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect); |
510 | |
511 | 511 | /* Enable CRYP */ |
|
512 | /* Enable CRYP */ |
512 | __HAL_CRYP_ENABLE(hcryp); |
513 | __HAL_CRYP_ENABLE(hcryp); |
513 | |
514 | 514 | /* Set the phase */ |
|
515 | /* Set the phase */ |
515 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
516 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
516 | } |
517 | } |
517 | |
518 | 518 | /* Write Plain Data and Get Cypher Data */ |
|
519 | /* Write Plain Data and Get Cypher Data */ |
519 | if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK) |
520 | if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK) |
520 | { |
521 | { |
521 | return HAL_TIMEOUT; |
522 | return HAL_TIMEOUT; |
522 | } |
523 | } |
523 | |
524 | 524 | /* Change the CRYP state */ |
|
525 | /* Change the CRYP state */ |
525 | hcryp->State = HAL_CRYP_STATE_READY; |
526 | hcryp->State = HAL_CRYP_STATE_READY; |
526 | |
527 | 527 | /* Process Unlocked */ |
|
528 | /* Process Unlocked */ |
528 | __HAL_UNLOCK(hcryp); |
529 | __HAL_UNLOCK(hcryp); |
529 | |
530 | 530 | /* Return function status */ |
|
531 | /* Return function status */ |
531 | return HAL_OK; |
532 | return HAL_OK; |
532 | } |
533 | } |
533 | else |
534 | else |
534 | { |
535 | { |
535 | /* Release Lock */ |
536 | /* Release Lock */ |
536 | __HAL_UNLOCK(hcryp); |
537 | __HAL_UNLOCK(hcryp); |
537 | |
538 | 538 | /* Return function status */ |
|
539 | /* Return function status */ |
539 | return HAL_ERROR; |
540 | return HAL_ERROR; |
540 | } |
541 | } |
541 | } |
542 | } |
542 | |
543 | 543 | /** |
|
544 | /** |
544 | * @brief Initializes the CRYP peripheral in AES ECB decryption mode |
545 | * @brief Initializes the CRYP peripheral in AES ECB decryption mode |
545 | * then decrypted pCypherData. The cypher data are available in pPlainData |
546 | * then decrypted pCypherData. The cypher data are available in pPlainData |
546 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
547 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
547 | * the configuration information for CRYP module |
548 | * the configuration information for CRYP module |
548 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
549 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
549 | * @param Size Length of the plaintext buffer, must be a multiple of 16. |
550 | * @param Size Length of the plaintext buffer, must be a multiple of 16. |
550 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
551 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
551 | * @param Timeout Specify Timeout value |
552 | * @param Timeout Specify Timeout value |
552 | * @retval HAL status |
553 | * @retval HAL status |
553 | */ |
554 | */ |
554 | HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout) |
555 | HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout) |
555 | { |
556 | { |
556 | /* Process Locked */ |
557 | /* Process Locked */ |
557 | __HAL_LOCK(hcryp); |
558 | __HAL_LOCK(hcryp); |
558 | |
559 | 559 | /* Check that data aligned on u32 */ |
|
560 | /* Check that data aligned on u32 */ |
560 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
561 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
561 | { |
562 | { |
562 | /* Process Locked */ |
563 | /* Process Locked */ |
563 | __HAL_UNLOCK(hcryp); |
564 | __HAL_UNLOCK(hcryp); |
564 | |
565 | 565 | /* Return function status */ |
|
566 | /* Return function status */ |
566 | return HAL_ERROR; |
567 | return HAL_ERROR; |
567 | } |
568 | } |
568 | |
569 | 569 | /* Check if HAL_CRYP_Init has been called */ |
|
570 | /* Check if HAL_CRYP_Init has been called */ |
570 | if(hcryp->State != HAL_CRYP_STATE_RESET) |
571 | if(hcryp->State != HAL_CRYP_STATE_RESET) |
571 | { |
572 | { |
572 | /* Change the CRYP state */ |
573 | /* Change the CRYP state */ |
573 | hcryp->State = HAL_CRYP_STATE_BUSY; |
574 | hcryp->State = HAL_CRYP_STATE_BUSY; |
574 | |
575 | 575 | /* Check if initialization phase has already been performed */ |
|
576 | /* Check if initialization phase has already been performed */ |
576 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
577 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
577 | { |
578 | { |
578 | /* Set the key */ |
579 | /* Set the key */ |
579 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
580 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
580 | |
581 | 581 | /* Reset the CHMOD & MODE bits */ |
|
582 | /* Reset the CHMOD & MODE bits */ |
582 | CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK); |
583 | CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK); |
583 | |
584 | 584 | /* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */ |
|
585 | /* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */ |
585 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT); |
586 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT); |
586 | |
587 | 587 | /* Enable CRYP */ |
|
588 | /* Enable CRYP */ |
588 | __HAL_CRYP_ENABLE(hcryp); |
589 | __HAL_CRYP_ENABLE(hcryp); |
589 | |
590 | 590 | /* Set the phase */ |
|
591 | /* Set the phase */ |
591 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
592 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
592 | } |
593 | } |
593 | |
594 | 594 | /* Write Cypher Data and Get Plain Data */ |
|
595 | /* Write Cypher Data and Get Plain Data */ |
595 | if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK) |
596 | if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK) |
596 | { |
597 | { |
597 | return HAL_TIMEOUT; |
598 | return HAL_TIMEOUT; |
598 | } |
599 | } |
599 | |
600 | 600 | /* Change the CRYP state */ |
|
601 | /* Change the CRYP state */ |
601 | hcryp->State = HAL_CRYP_STATE_READY; |
602 | hcryp->State = HAL_CRYP_STATE_READY; |
602 | |
603 | 603 | /* Process Unlocked */ |
|
604 | /* Process Unlocked */ |
604 | __HAL_UNLOCK(hcryp); |
605 | __HAL_UNLOCK(hcryp); |
605 | |
606 | 606 | /* Return function status */ |
|
607 | /* Return function status */ |
607 | return HAL_OK; |
608 | return HAL_OK; |
608 | } |
609 | } |
609 | else |
610 | else |
610 | { |
611 | { |
611 | /* Release Lock */ |
612 | /* Release Lock */ |
612 | __HAL_UNLOCK(hcryp); |
613 | __HAL_UNLOCK(hcryp); |
613 | |
614 | 614 | /* Return function status */ |
|
615 | /* Return function status */ |
615 | return HAL_ERROR; |
616 | return HAL_ERROR; |
616 | } |
617 | } |
617 | } |
618 | } |
618 | |
619 | 619 | /** |
|
620 | /** |
620 | * @brief Initializes the CRYP peripheral in AES ECB decryption mode |
621 | * @brief Initializes the CRYP peripheral in AES ECB decryption mode |
621 | * then decrypted pCypherData. The cypher data are available in pPlainData |
622 | * then decrypted pCypherData. The cypher data are available in pPlainData |
622 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
623 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
623 | * the configuration information for CRYP module |
624 | * the configuration information for CRYP module |
624 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
625 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
625 | * @param Size Length of the plaintext buffer, must be a multiple of 16. |
626 | * @param Size Length of the plaintext buffer, must be a multiple of 16. |
626 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
627 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
627 | * @param Timeout Specify Timeout value |
628 | * @param Timeout Specify Timeout value |
628 | * @retval HAL status |
629 | * @retval HAL status |
629 | */ |
630 | */ |
630 | HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout) |
631 | HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout) |
631 | { |
632 | { |
632 | /* Process Locked */ |
633 | /* Process Locked */ |
633 | __HAL_LOCK(hcryp); |
634 | __HAL_LOCK(hcryp); |
634 | |
635 | 635 | /* Check that data aligned on u32 */ |
|
636 | /* Check that data aligned on u32 */ |
636 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
637 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
637 | { |
638 | { |
638 | /* Process Locked */ |
639 | /* Process Locked */ |
639 | __HAL_UNLOCK(hcryp); |
640 | __HAL_UNLOCK(hcryp); |
640 | |
641 | 641 | /* Return function status */ |
|
642 | /* Return function status */ |
642 | return HAL_ERROR; |
643 | return HAL_ERROR; |
643 | } |
644 | } |
644 | |
645 | 645 | /* Check if HAL_CRYP_Init has been called */ |
|
646 | /* Check if HAL_CRYP_Init has been called */ |
646 | if(hcryp->State != HAL_CRYP_STATE_RESET) |
647 | if(hcryp->State != HAL_CRYP_STATE_RESET) |
647 | { |
648 | { |
648 | /* Change the CRYP state */ |
649 | /* Change the CRYP state */ |
649 | hcryp->State = HAL_CRYP_STATE_BUSY; |
650 | hcryp->State = HAL_CRYP_STATE_BUSY; |
650 | |
651 | 651 | /* Check if initialization phase has already been performed */ |
|
652 | /* Check if initialization phase has already been performed */ |
652 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
653 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
653 | { |
654 | { |
654 | /* Set the key */ |
655 | /* Set the key */ |
655 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
656 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
656 | |
657 | 657 | /* Reset the CHMOD & MODE bits */ |
|
658 | /* Reset the CHMOD & MODE bits */ |
658 | CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK); |
659 | CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK); |
659 | |
660 | 660 | /* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */ |
|
661 | /* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */ |
661 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT); |
662 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT); |
662 | |
663 | 663 | /* Set the Initialization Vector */ |
|
664 | /* Set the Initialization Vector */ |
664 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect); |
665 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect); |
665 | |
666 | 666 | /* Enable CRYP */ |
|
667 | /* Enable CRYP */ |
667 | __HAL_CRYP_ENABLE(hcryp); |
668 | __HAL_CRYP_ENABLE(hcryp); |
668 | |
669 | 669 | /* Set the phase */ |
|
670 | /* Set the phase */ |
670 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
671 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
671 | } |
672 | } |
672 | |
673 | 673 | /* Write Cypher Data and Get Plain Data */ |
|
674 | /* Write Cypher Data and Get Plain Data */ |
674 | if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK) |
675 | if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK) |
675 | { |
676 | { |
676 | return HAL_TIMEOUT; |
677 | return HAL_TIMEOUT; |
677 | } |
678 | } |
678 | |
679 | 679 | /* Change the CRYP state */ |
|
680 | /* Change the CRYP state */ |
680 | hcryp->State = HAL_CRYP_STATE_READY; |
681 | hcryp->State = HAL_CRYP_STATE_READY; |
681 | |
682 | 682 | /* Process Unlocked */ |
|
683 | /* Process Unlocked */ |
683 | __HAL_UNLOCK(hcryp); |
684 | __HAL_UNLOCK(hcryp); |
684 | |
685 | 685 | /* Return function status */ |
|
686 | /* Return function status */ |
686 | return HAL_OK; |
687 | return HAL_OK; |
687 | } |
688 | } |
688 | else |
689 | else |
689 | { |
690 | { |
690 | /* Release Lock */ |
691 | /* Release Lock */ |
691 | __HAL_UNLOCK(hcryp); |
692 | __HAL_UNLOCK(hcryp); |
692 | |
693 | 693 | /* Return function status */ |
|
694 | /* Return function status */ |
694 | return HAL_ERROR; |
695 | return HAL_ERROR; |
695 | } |
696 | } |
696 | } |
697 | } |
697 | |
698 | 698 | /** |
|
699 | /** |
699 | * @brief Initializes the CRYP peripheral in AES CTR decryption mode |
700 | * @brief Initializes the CRYP peripheral in AES CTR decryption mode |
700 | * then decrypted pCypherData. The cypher data are available in pPlainData |
701 | * then decrypted pCypherData. The cypher data are available in pPlainData |
701 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
702 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
702 | * the configuration information for CRYP module |
703 | * the configuration information for CRYP module |
703 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
704 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
704 | * @param Size Length of the plaintext buffer, must be a multiple of 16. |
705 | * @param Size Length of the plaintext buffer, must be a multiple of 16. |
705 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
706 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
706 | * @param Timeout Specify Timeout value |
707 | * @param Timeout Specify Timeout value |
707 | * @retval HAL status |
708 | * @retval HAL status |
708 | */ |
709 | */ |
709 | HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout) |
710 | HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout) |
710 | { |
711 | { |
711 | /* Process Locked */ |
712 | /* Process Locked */ |
712 | __HAL_LOCK(hcryp); |
713 | __HAL_LOCK(hcryp); |
713 | |
714 | 714 | /* Check that data aligned on u32 */ |
|
715 | /* Check that data aligned on u32 */ |
715 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
716 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
716 | { |
717 | { |
717 | /* Process Locked */ |
718 | /* Process Locked */ |
718 | __HAL_UNLOCK(hcryp); |
719 | __HAL_UNLOCK(hcryp); |
719 | |
720 | 720 | /* Return function status */ |
|
721 | /* Return function status */ |
721 | return HAL_ERROR; |
722 | return HAL_ERROR; |
722 | } |
723 | } |
723 | |
724 | 724 | /* Check if initialization phase has already been performed */ |
|
725 | /* Check if initialization phase has already been performed */ |
725 | if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->Phase == HAL_CRYP_PHASE_READY)) |
726 | if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->Phase == HAL_CRYP_PHASE_READY)) |
726 | { |
727 | { |
727 | /* Change the CRYP state */ |
728 | /* Change the CRYP state */ |
728 | hcryp->State = HAL_CRYP_STATE_BUSY; |
729 | hcryp->State = HAL_CRYP_STATE_BUSY; |
729 | |
730 | 730 | /* Set the key */ |
|
731 | /* Set the key */ |
731 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
732 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
732 | |
733 | 733 | /* Reset the CHMOD & MODE bits */ |
|
734 | /* Reset the CHMOD & MODE bits */ |
734 | CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK); |
735 | CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK); |
735 | |
736 | 736 | /* Set the CRYP peripheral in AES CTR decryption mode */ |
|
737 | /* Set the CRYP peripheral in AES CTR decryption mode */ |
737 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_DECRYPT); |
738 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_DECRYPT); |
738 | |
739 | 739 | /* Set the Initialization Vector */ |
|
740 | /* Set the Initialization Vector */ |
740 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect); |
741 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect); |
741 | |
742 | 742 | /* Enable CRYP */ |
|
743 | /* Enable CRYP */ |
743 | __HAL_CRYP_ENABLE(hcryp); |
744 | __HAL_CRYP_ENABLE(hcryp); |
744 | |
745 | 745 | /* Set the phase */ |
|
746 | /* Set the phase */ |
746 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
747 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
747 | } |
748 | } |
748 | |
749 | 749 | /* Write Cypher Data and Get Plain Data */ |
|
750 | /* Write Cypher Data and Get Plain Data */ |
750 | if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK) |
751 | if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK) |
751 | { |
752 | { |
752 | return HAL_TIMEOUT; |
753 | return HAL_TIMEOUT; |
753 | } |
754 | } |
754 | |
755 | 755 | /* Change the CRYP state */ |
|
756 | /* Change the CRYP state */ |
756 | hcryp->State = HAL_CRYP_STATE_READY; |
757 | hcryp->State = HAL_CRYP_STATE_READY; |
757 | |
758 | 758 | /* Process Unlocked */ |
|
759 | /* Process Unlocked */ |
759 | __HAL_UNLOCK(hcryp); |
760 | __HAL_UNLOCK(hcryp); |
760 | |
761 | 761 | /* Return function status */ |
|
762 | /* Return function status */ |
762 | return HAL_OK; |
763 | return HAL_OK; |
763 | } |
764 | } |
764 | |
765 | 765 | /** |
|
766 | /** |
766 | * @brief Initializes the CRYP peripheral in AES ECB encryption mode using Interrupt. |
767 | * @brief Initializes the CRYP peripheral in AES ECB encryption mode using Interrupt. |
767 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
768 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
768 | * the configuration information for CRYP module |
769 | * the configuration information for CRYP module |
769 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
770 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
770 | * @param Size Length of the plaintext buffer, must be a multiple of 16 bytes |
771 | * @param Size Length of the plaintext buffer, must be a multiple of 16 bytes |
771 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
772 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
772 | * @retval HAL status |
773 | * @retval HAL status |
773 | */ |
774 | */ |
774 | HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
775 | HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
775 | { |
776 | { |
776 | uint32_t inputaddr = 0; |
777 | uint32_t inputaddr = 0; |
777 | |
778 | 778 | /* Check that data aligned on u32 */ |
|
779 | /* Check that data aligned on u32 */ |
779 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
780 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
780 | { |
781 | { |
781 | /* Process Locked */ |
782 | /* Process Locked */ |
782 | __HAL_UNLOCK(hcryp); |
783 | __HAL_UNLOCK(hcryp); |
783 | |
784 | 784 | /* Return function status */ |
|
785 | /* Return function status */ |
785 | return HAL_ERROR; |
786 | return HAL_ERROR; |
786 | } |
787 | } |
787 | |
788 | 788 | if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY)) |
|
789 | if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY)) |
789 | { |
790 | { |
790 | /* Process Locked */ |
791 | /* Process Locked */ |
791 | __HAL_LOCK(hcryp); |
792 | __HAL_LOCK(hcryp); |
792 | |
793 | 793 | /* Get the buffer addresses and sizes */ |
|
794 | /* Get the buffer addresses and sizes */ |
794 | hcryp->CrypInCount = Size; |
795 | hcryp->CrypInCount = Size; |
795 | hcryp->pCrypInBuffPtr = pPlainData; |
796 | hcryp->pCrypInBuffPtr = pPlainData; |
796 | hcryp->pCrypOutBuffPtr = pCypherData; |
797 | hcryp->pCrypOutBuffPtr = pCypherData; |
797 | hcryp->CrypOutCount = Size; |
798 | hcryp->CrypOutCount = Size; |
798 | |
799 | 799 | /* Change the CRYP state */ |
|
800 | /* Change the CRYP state */ |
800 | hcryp->State = HAL_CRYP_STATE_BUSY; |
801 | hcryp->State = HAL_CRYP_STATE_BUSY; |
801 | |
802 | 802 | /* Check if initialization phase has already been performed */ |
|
803 | /* Check if initialization phase has already been performed */ |
803 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
804 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
804 | { |
805 | { |
805 | /* Set the key */ |
806 | /* Set the key */ |
806 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
807 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
807 | |
808 | 808 | /* Reset the CHMOD & MODE bits */ |
|
809 | /* Reset the CHMOD & MODE bits */ |
809 | CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK); |
810 | CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK); |
810 | |
811 | 811 | /* Set the CRYP peripheral in AES ECB mode */ |
|
812 | /* Set the CRYP peripheral in AES ECB mode */ |
812 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT); |
813 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT); |
813 | |
814 | 814 | /* Set the phase */ |
|
815 | /* Set the phase */ |
815 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
816 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
816 | } |
817 | } |
817 | |
818 | 818 | /* Enable Interrupts */ |
|
819 | /* Enable Interrupts */ |
819 | __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC); |
820 | __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC); |
820 | |
821 | 821 | /* Enable CRYP */ |
|
822 | /* Enable CRYP */ |
822 | __HAL_CRYP_ENABLE(hcryp); |
823 | __HAL_CRYP_ENABLE(hcryp); |
823 | |
824 | 824 | /* Get the last input data address */ |
|
825 | /* Get the last input data adress */ |
825 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
826 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
826 | |
827 | 827 | /* Increment the pointer before writing the input block in the IN FIFO to make sure that |
|
828 | /* Write the Input block in the Data Input register */ |
828 | when Computation Completed IRQ fires, the hcryp->CrypInCount has always a consistent value |
829 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
829 | and it is ready for the next operation. */ |
830 | inputaddr+=4; |
830 | hcryp->pCrypInBuffPtr += 16U; |
831 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
831 | hcryp->CrypInCount -= 16U; |
832 | inputaddr+=4; |
832 | |
833 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
833 | /* Write the Input block in the Data Input register */ |
834 | inputaddr+=4; |
834 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
835 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
835 | inputaddr+=4; |
836 | hcryp->pCrypInBuffPtr += 16; |
836 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
837 | hcryp->CrypInCount -= 16; |
837 | inputaddr+=4; |
838 | 838 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
|
839 | /* Return function status */ |
839 | inputaddr+=4; |
840 | return HAL_OK; |
840 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
841 | } |
841 | |
842 | else |
842 | /* Return function status */ |
843 | { |
843 | return HAL_OK; |
844 | /* Release Lock */ |
844 | } |
845 | __HAL_UNLOCK(hcryp); |
845 | else |
846 | 846 | { |
|
847 | /* Return function status */ |
847 | /* Release Lock */ |
848 | return HAL_ERROR; |
848 | __HAL_UNLOCK(hcryp); |
849 | } |
849 | |
850 | } |
850 | /* Return function status */ |
851 | 851 | return HAL_ERROR; |
|
852 | /** |
852 | } |
853 | * @brief Initializes the CRYP peripheral in AES CBC encryption mode using Interrupt. |
853 | } |
854 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
854 | |
855 | * the configuration information for CRYP module |
855 | /** |
856 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
856 | * @brief Initializes the CRYP peripheral in AES CBC encryption mode using Interrupt. |
857 | * @param Size Length of the plaintext buffer, must be a multiple of 16 bytes |
857 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
858 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
858 | * the configuration information for CRYP module |
859 | * @retval HAL status |
859 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
860 | */ |
860 | * @param Size Length of the plaintext buffer, must be a multiple of 16 bytes |
861 | HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
861 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
862 | { |
862 | * @retval HAL status |
863 | uint32_t inputaddr = 0; |
863 | */ |
864 | 864 | HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
|
865 | /* Check that data aligned on u32 */ |
865 | { |
866 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
866 | uint32_t inputaddr = 0; |
867 | { |
867 | |
868 | /* Process Locked */ |
868 | /* Check that data aligned on u32 */ |
869 | __HAL_UNLOCK(hcryp); |
869 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
870 | 870 | { |
|
871 | /* Return function status */ |
871 | /* Process Locked */ |
872 | return HAL_ERROR; |
872 | __HAL_UNLOCK(hcryp); |
873 | } |
873 | |
874 | 874 | /* Return function status */ |
|
875 | if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY)) |
875 | return HAL_ERROR; |
876 | { |
876 | } |
877 | /* Process Locked */ |
877 | |
878 | __HAL_LOCK(hcryp); |
878 | if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY)) |
879 | 879 | { |
|
880 | /* Get the buffer addresses and sizes */ |
880 | /* Process Locked */ |
881 | hcryp->CrypInCount = Size; |
881 | __HAL_LOCK(hcryp); |
882 | hcryp->pCrypInBuffPtr = pPlainData; |
882 | |
883 | hcryp->pCrypOutBuffPtr = pCypherData; |
883 | /* Get the buffer addresses and sizes */ |
884 | hcryp->CrypOutCount = Size; |
884 | hcryp->CrypInCount = Size; |
885 | 885 | hcryp->pCrypInBuffPtr = pPlainData; |
|
886 | /* Change the CRYP state */ |
886 | hcryp->pCrypOutBuffPtr = pCypherData; |
887 | hcryp->State = HAL_CRYP_STATE_BUSY; |
887 | hcryp->CrypOutCount = Size; |
888 | 888 | ||
889 | /* Check if initialization phase has already been performed */ |
889 | /* Change the CRYP state */ |
890 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
890 | hcryp->State = HAL_CRYP_STATE_BUSY; |
891 | { |
891 | |
892 | /* Set the key */ |
892 | /* Check if initialization phase has already been performed */ |
893 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
893 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
894 | 894 | { |
|
895 | /* Reset the CHMOD & MODE bits */ |
895 | /* Set the key */ |
896 | CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK); |
896 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
897 | 897 | ||
898 | /* Set the CRYP peripheral in AES CBC mode */ |
898 | /* Reset the CHMOD & MODE bits */ |
899 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT); |
899 | CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK); |
900 | 900 | ||
901 | /* Set the Initialization Vector */ |
901 | /* Set the CRYP peripheral in AES CBC mode */ |
902 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect); |
902 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT); |
903 | 903 | ||
904 | /* Set the phase */ |
904 | /* Set the Initialization Vector */ |
905 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
905 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect); |
906 | } |
906 | |
907 | 907 | /* Set the phase */ |
|
908 | /* Enable Interrupts */ |
908 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
909 | __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC); |
909 | } |
910 | 910 | ||
911 | /* Enable CRYP */ |
911 | /* Enable Interrupts */ |
912 | __HAL_CRYP_ENABLE(hcryp); |
912 | __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC); |
913 | 913 | ||
914 | /* Get the last input data adress */ |
914 | /* Enable CRYP */ |
915 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
915 | __HAL_CRYP_ENABLE(hcryp); |
916 | 916 | ||
917 | /* Write the Input block in the Data Input register */ |
917 | /* Get the last input data address */ |
918 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
918 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
919 | inputaddr+=4; |
919 | |
920 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
920 | /* Increment the pointer before writing the input block in the IN FIFO to make sure that |
921 | inputaddr+=4; |
921 | when Computation Completed IRQ fires, the hcryp->CrypInCount has always a consistent value |
922 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
922 | and it is ready for the next operation. */ |
923 | inputaddr+=4; |
923 | hcryp->pCrypInBuffPtr += 16U; |
924 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
924 | hcryp->CrypInCount -= 16U; |
925 | hcryp->pCrypInBuffPtr += 16; |
925 | |
926 | hcryp->CrypInCount -= 16; |
926 | /* Write the Input block in the Data Input register */ |
927 | 927 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
|
928 | /* Return function status */ |
928 | inputaddr+=4; |
929 | return HAL_OK; |
929 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
930 | } |
930 | inputaddr+=4; |
931 | else |
931 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
932 | { |
932 | inputaddr+=4; |
933 | /* Release Lock */ |
933 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
934 | __HAL_UNLOCK(hcryp); |
934 | |
935 | 935 | /* Return function status */ |
|
936 | /* Return function status */ |
936 | return HAL_OK; |
937 | return HAL_ERROR; |
937 | } |
938 | } |
938 | else |
939 | } |
939 | { |
940 | 940 | /* Release Lock */ |
|
941 | /** |
941 | __HAL_UNLOCK(hcryp); |
942 | * @brief Initializes the CRYP peripheral in AES CTR encryption mode using Interrupt. |
942 | |
943 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
943 | /* Return function status */ |
944 | * the configuration information for CRYP module |
944 | return HAL_ERROR; |
945 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
945 | } |
946 | * @param Size Length of the plaintext buffer, must be a multiple of 16 bytes |
946 | } |
947 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
947 | |
948 | * @retval HAL status |
948 | /** |
949 | */ |
949 | * @brief Initializes the CRYP peripheral in AES CTR encryption mode using Interrupt. |
950 | HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
950 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
951 | { |
951 | * the configuration information for CRYP module |
952 | uint32_t inputaddr = 0; |
952 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
953 | 953 | * @param Size Length of the plaintext buffer, must be a multiple of 16 bytes |
|
954 | /* Check that data aligned on u32 */ |
954 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
955 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
955 | * @retval HAL status |
956 | { |
956 | */ |
957 | /* Process Locked */ |
957 | HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
958 | __HAL_UNLOCK(hcryp); |
958 | { |
959 | 959 | uint32_t inputaddr = 0; |
|
960 | /* Return function status */ |
960 | |
961 | return HAL_ERROR; |
961 | /* Check that data aligned on u32 */ |
962 | } |
962 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
963 | 963 | { |
|
964 | if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY)) |
964 | /* Process Locked */ |
965 | { |
965 | __HAL_UNLOCK(hcryp); |
966 | /* Process Locked */ |
966 | |
967 | __HAL_LOCK(hcryp); |
967 | /* Return function status */ |
968 | 968 | return HAL_ERROR; |
|
969 | /* Get the buffer addresses and sizes */ |
969 | } |
970 | hcryp->CrypInCount = Size; |
970 | |
971 | hcryp->pCrypInBuffPtr = pPlainData; |
971 | if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY)) |
972 | hcryp->pCrypOutBuffPtr = pCypherData; |
972 | { |
973 | hcryp->CrypOutCount = Size; |
973 | /* Process Locked */ |
974 | 974 | __HAL_LOCK(hcryp); |
|
975 | /* Change the CRYP state */ |
975 | |
976 | hcryp->State = HAL_CRYP_STATE_BUSY; |
976 | /* Get the buffer addresses and sizes */ |
977 | 977 | hcryp->CrypInCount = Size; |
|
978 | /* Check if initialization phase has already been performed */ |
978 | hcryp->pCrypInBuffPtr = pPlainData; |
979 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
979 | hcryp->pCrypOutBuffPtr = pCypherData; |
980 | { |
980 | hcryp->CrypOutCount = Size; |
981 | /* Set the key */ |
981 | |
982 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
982 | /* Change the CRYP state */ |
983 | 983 | hcryp->State = HAL_CRYP_STATE_BUSY; |
|
984 | /* Reset the CHMOD & MODE bits */ |
984 | |
985 | CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK); |
985 | /* Check if initialization phase has already been performed */ |
986 | 986 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
|
987 | /* Set the CRYP peripheral in AES CTR mode */ |
987 | { |
988 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT); |
988 | /* Set the key */ |
989 | 989 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
|
990 | /* Set the Initialization Vector */ |
990 | |
991 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect); |
991 | /* Reset the CHMOD & MODE bits */ |
992 | 992 | CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK); |
|
993 | /* Set the phase */ |
993 | |
994 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
994 | /* Set the CRYP peripheral in AES CTR mode */ |
995 | } |
995 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT); |
996 | 996 | ||
997 | /* Enable Interrupts */ |
997 | /* Set the Initialization Vector */ |
998 | __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC); |
998 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect); |
999 | 999 | ||
1000 | /* Enable CRYP */ |
1000 | /* Set the phase */ |
1001 | __HAL_CRYP_ENABLE(hcryp); |
1001 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
1002 | 1002 | } |
|
1003 | /* Get the last input data adress */ |
1003 | |
1004 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
1004 | /* Enable Interrupts */ |
1005 | 1005 | __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC); |
|
1006 | /* Write the Input block in the Data Input register */ |
1006 | |
1007 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1007 | /* Enable CRYP */ |
1008 | inputaddr+=4; |
1008 | __HAL_CRYP_ENABLE(hcryp); |
1009 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1009 | |
1010 | inputaddr+=4; |
1010 | /* Get the last input data address */ |
1011 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1011 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
1012 | inputaddr+=4; |
1012 | |
1013 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1013 | /* Increment the pointer before writing the input block in the IN FIFO to make sure that |
1014 | hcryp->pCrypInBuffPtr += 16; |
1014 | when Computation Completed IRQ fires, the hcryp->CrypInCount has always a consistent value |
1015 | hcryp->CrypInCount -= 16; |
1015 | and it is ready for the next operation. */ |
1016 | 1016 | hcryp->pCrypInBuffPtr += 16U; |
|
1017 | /* Return function status */ |
1017 | hcryp->CrypInCount -= 16U; |
1018 | return HAL_OK; |
1018 | |
1019 | } |
1019 | /* Write the Input block in the Data Input register */ |
1020 | else |
1020 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1021 | { |
1021 | inputaddr+=4; |
1022 | /* Release Lock */ |
1022 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1023 | __HAL_UNLOCK(hcryp); |
1023 | inputaddr+=4; |
1024 | 1024 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
|
1025 | /* Return function status */ |
1025 | inputaddr+=4; |
1026 | return HAL_ERROR; |
1026 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1027 | } |
1027 | |
1028 | } |
1028 | /* Return function status */ |
1029 | 1029 | return HAL_OK; |
|
1030 | /** |
1030 | } |
1031 | * @brief Initializes the CRYP peripheral in AES ECB decryption mode using Interrupt. |
1031 | else |
1032 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1032 | { |
1033 | * the configuration information for CRYP module |
1033 | /* Release Lock */ |
1034 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
1034 | __HAL_UNLOCK(hcryp); |
1035 | * @param Size Length of the plaintext buffer, must be a multiple of 16. |
1035 | |
1036 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
1036 | /* Return function status */ |
1037 | * @retval HAL status |
1037 | return HAL_ERROR; |
1038 | */ |
1038 | } |
1039 | HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
1039 | } |
1040 | { |
1040 | |
1041 | uint32_t inputaddr = 0; |
1041 | /** |
1042 | 1042 | * @brief Initializes the CRYP peripheral in AES ECB decryption mode using Interrupt. |
|
1043 | /* Check that data aligned on u32 */ |
1043 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1044 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
1044 | * the configuration information for CRYP module |
1045 | { |
1045 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
1046 | /* Process Locked */ |
1046 | * @param Size Length of the plaintext buffer, must be a multiple of 16. |
1047 | __HAL_UNLOCK(hcryp); |
1047 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
1048 | 1048 | * @retval HAL status |
|
1049 | /* Return function status */ |
1049 | */ |
1050 | return HAL_ERROR; |
1050 | HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
1051 | } |
1051 | { |
1052 | 1052 | uint32_t inputaddr = 0; |
|
1053 | if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY)) |
1053 | |
1054 | { |
1054 | /* Check that data aligned on u32 */ |
1055 | /* Process Locked */ |
1055 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
1056 | __HAL_LOCK(hcryp); |
1056 | { |
1057 | 1057 | /* Process Locked */ |
|
1058 | /* Get the buffer addresses and sizes */ |
1058 | __HAL_UNLOCK(hcryp); |
1059 | hcryp->CrypInCount = Size; |
1059 | |
1060 | hcryp->pCrypInBuffPtr = pCypherData; |
1060 | /* Return function status */ |
1061 | hcryp->pCrypOutBuffPtr = pPlainData; |
1061 | return HAL_ERROR; |
1062 | hcryp->CrypOutCount = Size; |
1062 | } |
1063 | 1063 | ||
1064 | /* Change the CRYP state */ |
1064 | if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY)) |
1065 | hcryp->State = HAL_CRYP_STATE_BUSY; |
1065 | { |
1066 | 1066 | /* Process Locked */ |
|
1067 | /* Check if initialization phase has already been performed */ |
1067 | __HAL_LOCK(hcryp); |
1068 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
1068 | |
1069 | { |
1069 | /* Get the buffer addresses and sizes */ |
1070 | /* Set the key */ |
1070 | hcryp->CrypInCount = Size; |
1071 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
1071 | hcryp->pCrypInBuffPtr = pCypherData; |
1072 | 1072 | hcryp->pCrypOutBuffPtr = pPlainData; |
|
1073 | /* Reset the CHMOD & MODE bits */ |
1073 | hcryp->CrypOutCount = Size; |
1074 | CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK); |
1074 | |
1075 | 1075 | /* Change the CRYP state */ |
|
1076 | /* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */ |
1076 | hcryp->State = HAL_CRYP_STATE_BUSY; |
1077 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT); |
1077 | |
1078 | 1078 | /* Check if initialization phase has already been performed */ |
|
1079 | /* Set the phase */ |
1079 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
1080 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
1080 | { |
1081 | } |
1081 | /* Set the key */ |
1082 | 1082 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
|
1083 | /* Enable Interrupts */ |
1083 | |
1084 | __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC); |
1084 | /* Reset the CHMOD & MODE bits */ |
1085 | 1085 | CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK); |
|
1086 | /* Enable CRYP */ |
1086 | |
1087 | __HAL_CRYP_ENABLE(hcryp); |
1087 | /* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */ |
1088 | 1088 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT); |
|
1089 | /* Get the last input data adress */ |
1089 | |
1090 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
1090 | /* Set the phase */ |
1091 | 1091 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
|
1092 | /* Write the Input block in the Data Input register */ |
1092 | } |
1093 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1093 | |
1094 | inputaddr+=4; |
1094 | /* Enable Interrupts */ |
1095 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1095 | __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC); |
1096 | inputaddr+=4; |
1096 | |
1097 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1097 | /* Enable CRYP */ |
1098 | inputaddr+=4; |
1098 | __HAL_CRYP_ENABLE(hcryp); |
1099 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1099 | |
1100 | hcryp->pCrypInBuffPtr += 16; |
1100 | /* Get the last input data address */ |
1101 | hcryp->CrypInCount -= 16; |
1101 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
1102 | 1102 | ||
1103 | /* Return function status */ |
1103 | /* Increment the pointer before writing the input block in the IN FIFO to make sure that |
1104 | return HAL_OK; |
1104 | when Computation Completed IRQ fires, the hcryp->CrypInCount has always a consistent value |
1105 | } |
1105 | and it is ready for the next operation. */ |
1106 | else |
1106 | hcryp->pCrypInBuffPtr += 16U; |
1107 | { |
1107 | hcryp->CrypInCount -= 16U; |
1108 | /* Release Lock */ |
1108 | |
1109 | __HAL_UNLOCK(hcryp); |
1109 | /* Write the Input block in the Data Input register */ |
1110 | 1110 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
|
1111 | /* Return function status */ |
1111 | inputaddr+=4; |
1112 | return HAL_ERROR; |
1112 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1113 | } |
1113 | inputaddr+=4; |
1114 | } |
1114 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1115 | 1115 | inputaddr+=4; |
|
1116 | /** |
1116 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1117 | * @brief Initializes the CRYP peripheral in AES CBC decryption mode using IT. |
1117 | |
1118 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1118 | /* Return function status */ |
1119 | * the configuration information for CRYP module |
1119 | return HAL_OK; |
1120 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
1120 | } |
1121 | * @param Size Length of the plaintext buffer, must be a multiple of 16 |
1121 | else |
1122 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
1122 | { |
1123 | * @retval HAL status |
1123 | /* Release Lock */ |
1124 | */ |
1124 | __HAL_UNLOCK(hcryp); |
1125 | HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
1125 | |
1126 | { |
1126 | /* Return function status */ |
1127 | uint32_t inputaddr = 0; |
1127 | return HAL_ERROR; |
1128 | 1128 | } |
|
1129 | /* Check that data aligned on u32 */ |
1129 | } |
1130 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
1130 | |
1131 | { |
1131 | /** |
1132 | /* Process Locked */ |
1132 | * @brief Initializes the CRYP peripheral in AES CBC decryption mode using IT. |
1133 | __HAL_UNLOCK(hcryp); |
1133 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1134 | 1134 | * the configuration information for CRYP module |
|
1135 | /* Return function status */ |
1135 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
1136 | return HAL_ERROR; |
1136 | * @param Size Length of the plaintext buffer, must be a multiple of 16 |
1137 | } |
1137 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
1138 | 1138 | * @retval HAL status |
|
1139 | if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY)) |
1139 | */ |
1140 | { |
1140 | HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
1141 | /* Process Locked */ |
1141 | { |
1142 | __HAL_LOCK(hcryp); |
1142 | uint32_t inputaddr = 0; |
1143 | 1143 | ||
1144 | /* Get the buffer addresses and sizes */ |
1144 | /* Check that data aligned on u32 */ |
1145 | hcryp->CrypInCount = Size; |
1145 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
1146 | hcryp->pCrypInBuffPtr = pCypherData; |
1146 | { |
1147 | hcryp->pCrypOutBuffPtr = pPlainData; |
1147 | /* Process Locked */ |
1148 | hcryp->CrypOutCount = Size; |
1148 | __HAL_UNLOCK(hcryp); |
1149 | 1149 | ||
1150 | /* Change the CRYP state */ |
1150 | /* Return function status */ |
1151 | hcryp->State = HAL_CRYP_STATE_BUSY; |
1151 | return HAL_ERROR; |
1152 | 1152 | } |
|
1153 | /* Check if initialization phase has already been performed */ |
1153 | |
1154 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
1154 | if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY)) |
1155 | { |
1155 | { |
1156 | /* Set the key */ |
1156 | /* Process Locked */ |
1157 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
1157 | __HAL_LOCK(hcryp); |
1158 | 1158 | ||
1159 | /* Reset the CHMOD & MODE bits */ |
1159 | /* Get the buffer addresses and sizes */ |
1160 | CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK); |
1160 | hcryp->CrypInCount = Size; |
1161 | 1161 | hcryp->pCrypInBuffPtr = pCypherData; |
|
1162 | /* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */ |
1162 | hcryp->pCrypOutBuffPtr = pPlainData; |
1163 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT); |
1163 | hcryp->CrypOutCount = Size; |
1164 | 1164 | ||
1165 | /* Set the Initialization Vector */ |
1165 | /* Change the CRYP state */ |
1166 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect); |
1166 | hcryp->State = HAL_CRYP_STATE_BUSY; |
1167 | 1167 | ||
1168 | /* Set the phase */ |
1168 | /* Check if initialization phase has already been performed */ |
1169 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
1169 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
1170 | } |
1170 | { |
1171 | 1171 | /* Set the key */ |
|
1172 | /* Enable Interrupts */ |
1172 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
1173 | __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC); |
1173 | |
1174 | 1174 | /* Reset the CHMOD & MODE bits */ |
|
1175 | /* Enable CRYP */ |
1175 | CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK); |
1176 | __HAL_CRYP_ENABLE(hcryp); |
1176 | |
1177 | 1177 | /* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */ |
|
1178 | /* Get the last input data adress */ |
1178 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT); |
1179 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
1179 | |
1180 | 1180 | /* Set the Initialization Vector */ |
|
1181 | /* Write the Input block in the Data Input register */ |
1181 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect); |
1182 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1182 | |
1183 | inputaddr+=4; |
1183 | /* Set the phase */ |
1184 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1184 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
1185 | inputaddr+=4; |
1185 | } |
1186 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1186 | |
1187 | inputaddr+=4; |
1187 | /* Enable Interrupts */ |
1188 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1188 | __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC); |
1189 | hcryp->pCrypInBuffPtr += 16; |
1189 | |
1190 | hcryp->CrypInCount -= 16; |
1190 | /* Enable CRYP */ |
1191 | 1191 | __HAL_CRYP_ENABLE(hcryp); |
|
1192 | /* Return function status */ |
1192 | |
1193 | return HAL_OK; |
1193 | /* Get the last input data address */ |
1194 | } |
1194 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
1195 | else |
1195 | |
1196 | { |
1196 | /* Increment the pointer before writing the input block in the IN FIFO to make sure that |
1197 | /* Release Lock */ |
1197 | when Computation Completed IRQ fires, the hcryp->CrypInCount has always a consistent value |
1198 | __HAL_UNLOCK(hcryp); |
1198 | and it is ready for the next operation. */ |
1199 | 1199 | hcryp->pCrypInBuffPtr += 16U; |
|
1200 | /* Return function status */ |
1200 | hcryp->CrypInCount -= 16U; |
1201 | return HAL_ERROR; |
1201 | |
1202 | } |
1202 | /* Write the Input block in the Data Input register */ |
1203 | } |
1203 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1204 | 1204 | inputaddr+=4; |
|
1205 | /** |
1205 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1206 | * @brief Initializes the CRYP peripheral in AES CTR decryption mode using Interrupt. |
1206 | inputaddr+=4; |
1207 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1207 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1208 | * the configuration information for CRYP module |
1208 | inputaddr+=4; |
1209 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
1209 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1210 | * @param Size Length of the plaintext buffer, must be a multiple of 16 |
1210 | |
1211 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
1211 | /* Return function status */ |
1212 | * @retval HAL status |
1212 | return HAL_OK; |
1213 | */ |
1213 | } |
1214 | HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
1214 | else |
1215 | { |
1215 | { |
1216 | uint32_t inputaddr = 0; |
1216 | /* Release Lock */ |
1217 | 1217 | __HAL_UNLOCK(hcryp); |
|
1218 | /* Check that data aligned on u32 */ |
1218 | |
1219 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
1219 | /* Return function status */ |
1220 | { |
1220 | return HAL_ERROR; |
1221 | /* Process Locked */ |
1221 | } |
1222 | __HAL_UNLOCK(hcryp); |
1222 | } |
1223 | 1223 | ||
1224 | /* Return function status */ |
1224 | /** |
1225 | return HAL_ERROR; |
1225 | * @brief Initializes the CRYP peripheral in AES CTR decryption mode using Interrupt. |
1226 | } |
1226 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1227 | 1227 | * the configuration information for CRYP module |
|
1228 | if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY)) |
1228 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
1229 | { |
1229 | * @param Size Length of the plaintext buffer, must be a multiple of 16 |
1230 | /* Process Locked */ |
1230 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
1231 | __HAL_LOCK(hcryp); |
1231 | * @retval HAL status |
1232 | 1232 | */ |
|
1233 | /* Get the buffer addresses and sizes */ |
1233 | HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
1234 | hcryp->CrypInCount = Size; |
1234 | { |
1235 | hcryp->pCrypInBuffPtr = pCypherData; |
1235 | uint32_t inputaddr = 0; |
1236 | hcryp->pCrypOutBuffPtr = pPlainData; |
1236 | |
1237 | hcryp->CrypOutCount = Size; |
1237 | /* Check that data aligned on u32 */ |
1238 | 1238 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
|
1239 | /* Change the CRYP state */ |
1239 | { |
1240 | hcryp->State = HAL_CRYP_STATE_BUSY; |
1240 | /* Process Locked */ |
1241 | 1241 | __HAL_UNLOCK(hcryp); |
|
1242 | /* Check if initialization phase has already been performed */ |
1242 | |
1243 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
1243 | /* Return function status */ |
1244 | { |
1244 | return HAL_ERROR; |
1245 | /* Set the key */ |
1245 | } |
1246 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
1246 | |
1247 | 1247 | if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY)) |
|
1248 | /* Reset the CHMOD & MODE bits */ |
1248 | { |
1249 | CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK); |
1249 | /* Process Locked */ |
1250 | 1250 | __HAL_LOCK(hcryp); |
|
1251 | /* Set the CRYP peripheral in AES CTR decryption mode */ |
1251 | |
1252 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_DECRYPT); |
1252 | /* Get the buffer addresses and sizes */ |
1253 | 1253 | hcryp->CrypInCount = Size; |
|
1254 | /* Set the Initialization Vector */ |
1254 | hcryp->pCrypInBuffPtr = pCypherData; |
1255 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect); |
1255 | hcryp->pCrypOutBuffPtr = pPlainData; |
1256 | 1256 | hcryp->CrypOutCount = Size; |
|
1257 | /* Set the phase */ |
1257 | |
1258 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
1258 | /* Change the CRYP state */ |
1259 | } |
1259 | hcryp->State = HAL_CRYP_STATE_BUSY; |
1260 | 1260 | ||
1261 | /* Enable Interrupts */ |
1261 | /* Check if initialization phase has already been performed */ |
1262 | __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC); |
1262 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
1263 | 1263 | { |
|
1264 | /* Enable CRYP */ |
1264 | /* Set the key */ |
1265 | __HAL_CRYP_ENABLE(hcryp); |
1265 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
1266 | 1266 | ||
1267 | /* Get the last input data adress */ |
1267 | /* Reset the CHMOD & MODE bits */ |
1268 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
1268 | CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK); |
1269 | 1269 | ||
1270 | /* Write the Input block in the Data Input register */ |
1270 | /* Set the CRYP peripheral in AES CTR decryption mode */ |
1271 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1271 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_DECRYPT); |
1272 | inputaddr+=4; |
1272 | |
1273 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1273 | /* Set the Initialization Vector */ |
1274 | inputaddr+=4; |
1274 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect); |
1275 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1275 | |
1276 | inputaddr+=4; |
1276 | /* Set the phase */ |
1277 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1277 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
1278 | hcryp->pCrypInBuffPtr += 16; |
1278 | } |
1279 | hcryp->CrypInCount -= 16; |
1279 | |
1280 | 1280 | /* Enable Interrupts */ |
|
1281 | /* Return function status */ |
1281 | __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CC); |
1282 | return HAL_OK; |
1282 | |
1283 | } |
1283 | /* Enable CRYP */ |
1284 | else |
1284 | __HAL_CRYP_ENABLE(hcryp); |
1285 | { |
1285 | |
1286 | /* Release Lock */ |
1286 | /* Get the last input data address */ |
1287 | __HAL_UNLOCK(hcryp); |
1287 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
1288 | 1288 | ||
1289 | /* Return function status */ |
1289 | /* Increment the pointer before writing the input block in the IN FIFO to make sure that |
1290 | return HAL_ERROR; |
1290 | when Computation Completed IRQ fires, the hcryp->CrypInCount has always a consistent value |
1291 | } |
1291 | and it is ready for the next operation. */ |
1292 | } |
1292 | hcryp->pCrypInBuffPtr += 16U; |
1293 | 1293 | hcryp->CrypInCount -= 16U; |
|
1294 | /** |
1294 | |
1295 | * @brief Initializes the CRYP peripheral in AES ECB encryption mode using DMA. |
1295 | /* Write the Input block in the Data Input register */ |
1296 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1296 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1297 | * the configuration information for CRYP module |
1297 | inputaddr+=4; |
1298 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
1298 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1299 | * @param Size Length of the plaintext buffer, must be a multiple of 16 bytes |
1299 | inputaddr+=4; |
1300 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
1300 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1301 | * @retval HAL status |
1301 | inputaddr+=4; |
1302 | */ |
1302 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1303 | HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
1303 | |
1304 | { |
1304 | /* Return function status */ |
1305 | uint32_t inputaddr = 0, outputaddr = 0; |
1305 | return HAL_OK; |
1306 | 1306 | } |
|
1307 | /* Check that data aligned on u32 */ |
1307 | else |
1308 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
1308 | { |
1309 | { |
1309 | /* Release Lock */ |
1310 | /* Process Locked */ |
1310 | __HAL_UNLOCK(hcryp); |
1311 | __HAL_UNLOCK(hcryp); |
1311 | |
1312 | 1312 | /* Return function status */ |
|
1313 | /* Return function status */ |
1313 | return HAL_ERROR; |
1314 | return HAL_ERROR; |
1314 | } |
1315 | } |
1315 | } |
1316 | 1316 | ||
1317 | /* Check if HAL_CRYP_Init has been called */ |
1317 | /** |
1318 | if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY)) |
1318 | * @brief Initializes the CRYP peripheral in AES ECB encryption mode using DMA. |
1319 | { |
1319 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1320 | /* Process Locked */ |
1320 | * the configuration information for CRYP module |
1321 | __HAL_LOCK(hcryp); |
1321 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
1322 | 1322 | * @param Size Length of the plaintext buffer, must be a multiple of 16 bytes |
|
1323 | inputaddr = (uint32_t)pPlainData; |
1323 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
1324 | outputaddr = (uint32_t)pCypherData; |
1324 | * @retval HAL status |
1325 | 1325 | */ |
|
1326 | /* Change the CRYP state */ |
1326 | HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
1327 | hcryp->State = HAL_CRYP_STATE_BUSY; |
1327 | { |
1328 | 1328 | uint32_t inputaddr = 0, outputaddr = 0; |
|
1329 | /* Check if initialization phase has already been performed */ |
1329 | |
1330 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
1330 | /* Check that data aligned on u32 */ |
1331 | { |
1331 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
1332 | /* Set the key */ |
1332 | { |
1333 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
1333 | /* Process Locked */ |
1334 | 1334 | __HAL_UNLOCK(hcryp); |
|
1335 | /* Set the CRYP peripheral in AES ECB mode */ |
1335 | |
1336 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT); |
1336 | /* Return function status */ |
1337 | 1337 | return HAL_ERROR; |
|
1338 | /* Set the phase */ |
1338 | } |
1339 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
1339 | |
1340 | } |
1340 | /* Check if HAL_CRYP_Init has been called */ |
1341 | /* Set the input and output addresses and start DMA transfer */ |
1341 | if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY)) |
1342 | CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
1342 | { |
1343 | 1343 | /* Process Locked */ |
|
1344 | /* Process Unlocked */ |
1344 | __HAL_LOCK(hcryp); |
1345 | __HAL_UNLOCK(hcryp); |
1345 | |
1346 | 1346 | inputaddr = (uint32_t)pPlainData; |
|
1347 | /* Return function status */ |
1347 | outputaddr = (uint32_t)pCypherData; |
1348 | return HAL_OK; |
1348 | |
1349 | } |
1349 | /* Change the CRYP state */ |
1350 | else |
1350 | hcryp->State = HAL_CRYP_STATE_BUSY; |
1351 | { |
1351 | |
1352 | /* Release Lock */ |
1352 | /* Check if initialization phase has already been performed */ |
1353 | __HAL_UNLOCK(hcryp); |
1353 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
1354 | 1354 | { |
|
1355 | return HAL_ERROR; |
1355 | /* Set the key */ |
1356 | } |
1356 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
1357 | } |
1357 | |
1358 | 1358 | /* Set the CRYP peripheral in AES ECB mode */ |
|
1359 | /** |
1359 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT); |
1360 | * @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA. |
1360 | |
1361 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1361 | /* Set the phase */ |
1362 | * the configuration information for CRYP module |
1362 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
1363 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
1363 | } |
1364 | * @param Size Length of the plaintext buffer, must be a multiple of 16. |
1364 | /* Set the input and output addresses and start DMA transfer */ |
1365 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
1365 | CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
1366 | * @retval HAL status |
1366 | |
1367 | */ |
1367 | /* Process Unlocked */ |
1368 | HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
1368 | __HAL_UNLOCK(hcryp); |
1369 | { |
1369 | |
1370 | uint32_t inputaddr = 0, outputaddr = 0; |
1370 | /* Return function status */ |
1371 | 1371 | return HAL_OK; |
|
1372 | /* Check that data aligned on u32 */ |
1372 | } |
1373 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
1373 | else |
1374 | { |
1374 | { |
1375 | /* Process Locked */ |
1375 | /* Release Lock */ |
1376 | __HAL_UNLOCK(hcryp); |
1376 | __HAL_UNLOCK(hcryp); |
1377 | 1377 | ||
1378 | /* Return function status */ |
1378 | return HAL_ERROR; |
1379 | return HAL_ERROR; |
1379 | } |
1380 | } |
1380 | } |
1381 | 1381 | ||
1382 | /* Check if HAL_CRYP_Init has been called */ |
1382 | /** |
1383 | if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY)) |
1383 | * @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA. |
1384 | { |
1384 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1385 | /* Process Locked */ |
1385 | * the configuration information for CRYP module |
1386 | __HAL_LOCK(hcryp); |
1386 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
1387 | 1387 | * @param Size Length of the plaintext buffer, must be a multiple of 16. |
|
1388 | inputaddr = (uint32_t)pPlainData; |
1388 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
1389 | outputaddr = (uint32_t)pCypherData; |
1389 | * @retval HAL status |
1390 | 1390 | */ |
|
1391 | /* Change the CRYP state */ |
1391 | HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
1392 | hcryp->State = HAL_CRYP_STATE_BUSY; |
1392 | { |
1393 | 1393 | uint32_t inputaddr = 0, outputaddr = 0; |
|
1394 | /* Check if initialization phase has already been performed */ |
1394 | |
1395 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
1395 | /* Check that data aligned on u32 */ |
1396 | { |
1396 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
1397 | /* Set the key */ |
1397 | { |
1398 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
1398 | /* Process Locked */ |
1399 | 1399 | __HAL_UNLOCK(hcryp); |
|
1400 | /* Set the CRYP peripheral in AES CBC mode */ |
1400 | |
1401 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT); |
1401 | /* Return function status */ |
1402 | 1402 | return HAL_ERROR; |
|
1403 | /* Set the Initialization Vector */ |
1403 | } |
1404 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect); |
1404 | |
1405 | 1405 | /* Check if HAL_CRYP_Init has been called */ |
|
1406 | /* Set the phase */ |
1406 | if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY)) |
1407 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
1407 | { |
1408 | } |
1408 | /* Process Locked */ |
1409 | /* Set the input and output addresses and start DMA transfer */ |
1409 | __HAL_LOCK(hcryp); |
1410 | CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
1410 | |
1411 | 1411 | inputaddr = (uint32_t)pPlainData; |
|
1412 | /* Process Unlocked */ |
1412 | outputaddr = (uint32_t)pCypherData; |
1413 | __HAL_UNLOCK(hcryp); |
1413 | |
1414 | 1414 | /* Change the CRYP state */ |
|
1415 | /* Return function status */ |
1415 | hcryp->State = HAL_CRYP_STATE_BUSY; |
1416 | return HAL_OK; |
1416 | |
1417 | } |
1417 | /* Check if initialization phase has already been performed */ |
1418 | else |
1418 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
1419 | { |
1419 | { |
1420 | /* Release Lock */ |
1420 | /* Set the key */ |
1421 | __HAL_UNLOCK(hcryp); |
1421 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
1422 | 1422 | ||
1423 | return HAL_ERROR; |
1423 | /* Set the CRYP peripheral in AES CBC mode */ |
1424 | } |
1424 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT); |
1425 | } |
1425 | |
1426 | 1426 | /* Set the Initialization Vector */ |
|
1427 | /** |
1427 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect); |
1428 | * @brief Initializes the CRYP peripheral in AES CTR encryption mode using DMA. |
1428 | |
1429 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1429 | /* Set the phase */ |
1430 | * the configuration information for CRYP module |
1430 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
1431 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
1431 | } |
1432 | * @param Size Length of the plaintext buffer, must be a multiple of 16. |
1432 | /* Set the input and output addresses and start DMA transfer */ |
1433 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
1433 | CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
1434 | * @retval HAL status |
1434 | |
1435 | */ |
1435 | /* Process Unlocked */ |
1436 | HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
1436 | __HAL_UNLOCK(hcryp); |
1437 | { |
1437 | |
1438 | uint32_t inputaddr = 0, outputaddr = 0; |
1438 | /* Return function status */ |
1439 | 1439 | return HAL_OK; |
|
1440 | /* Check that data aligned on u32 */ |
1440 | } |
1441 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
1441 | else |
1442 | { |
1442 | { |
1443 | /* Process Locked */ |
1443 | /* Release Lock */ |
1444 | __HAL_UNLOCK(hcryp); |
1444 | __HAL_UNLOCK(hcryp); |
1445 | 1445 | ||
1446 | /* Return function status */ |
1446 | return HAL_ERROR; |
1447 | return HAL_ERROR; |
1447 | } |
1448 | } |
1448 | } |
1449 | 1449 | ||
1450 | /* Check if HAL_CRYP_Init has been called */ |
1450 | /** |
1451 | if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY)) |
1451 | * @brief Initializes the CRYP peripheral in AES CTR encryption mode using DMA. |
1452 | { |
1452 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1453 | /* Process Locked */ |
1453 | * the configuration information for CRYP module |
1454 | __HAL_LOCK(hcryp); |
1454 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
1455 | 1455 | * @param Size Length of the plaintext buffer, must be a multiple of 16. |
|
1456 | inputaddr = (uint32_t)pPlainData; |
1456 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
1457 | outputaddr = (uint32_t)pCypherData; |
1457 | * @retval HAL status |
1458 | 1458 | */ |
|
1459 | /* Change the CRYP state */ |
1459 | HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) |
1460 | hcryp->State = HAL_CRYP_STATE_BUSY; |
1460 | { |
1461 | 1461 | uint32_t inputaddr = 0, outputaddr = 0; |
|
1462 | /* Check if initialization phase has already been performed */ |
1462 | |
1463 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
1463 | /* Check that data aligned on u32 */ |
1464 | { |
1464 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
1465 | /* Set the key */ |
1465 | { |
1466 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
1466 | /* Process Locked */ |
1467 | 1467 | __HAL_UNLOCK(hcryp); |
|
1468 | /* Set the CRYP peripheral in AES CTR mode */ |
1468 | |
1469 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT); |
1469 | /* Return function status */ |
1470 | 1470 | return HAL_ERROR; |
|
1471 | /* Set the Initialization Vector */ |
1471 | } |
1472 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect); |
1472 | |
1473 | 1473 | /* Check if HAL_CRYP_Init has been called */ |
|
1474 | /* Set the phase */ |
1474 | if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY)) |
1475 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
1475 | { |
1476 | } |
1476 | /* Process Locked */ |
1477 | 1477 | __HAL_LOCK(hcryp); |
|
1478 | /* Set the input and output addresses and start DMA transfer */ |
1478 | |
1479 | CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
1479 | inputaddr = (uint32_t)pPlainData; |
1480 | 1480 | outputaddr = (uint32_t)pCypherData; |
|
1481 | /* Process Unlocked */ |
1481 | |
1482 | __HAL_UNLOCK(hcryp); |
1482 | /* Change the CRYP state */ |
1483 | 1483 | hcryp->State = HAL_CRYP_STATE_BUSY; |
|
1484 | /* Return function status */ |
1484 | |
1485 | return HAL_OK; |
1485 | /* Check if initialization phase has already been performed */ |
1486 | } |
1486 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
1487 | else |
1487 | { |
1488 | { |
1488 | /* Set the key */ |
1489 | /* Release Lock */ |
1489 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
1490 | __HAL_UNLOCK(hcryp); |
1490 | |
1491 | 1491 | /* Set the CRYP peripheral in AES CTR mode */ |
|
1492 | return HAL_ERROR; |
1492 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT); |
1493 | } |
1493 | |
1494 | } |
1494 | /* Set the Initialization Vector */ |
1495 | 1495 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect); |
|
1496 | /** |
1496 | |
1497 | * @brief Initializes the CRYP peripheral in AES ECB decryption mode using DMA. |
1497 | /* Set the phase */ |
1498 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1498 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
1499 | * the configuration information for CRYP module |
1499 | } |
1500 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
1500 | |
1501 | * @param Size Length of the plaintext buffer, must be a multiple of 16 bytes |
1501 | /* Set the input and output addresses and start DMA transfer */ |
1502 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
1502 | CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
1503 | * @retval HAL status |
1503 | |
1504 | */ |
1504 | /* Process Unlocked */ |
1505 | HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
1505 | __HAL_UNLOCK(hcryp); |
1506 | { |
1506 | |
1507 | uint32_t inputaddr = 0, outputaddr = 0; |
1507 | /* Return function status */ |
1508 | 1508 | return HAL_OK; |
|
1509 | /* Check that data aligned on u32 */ |
1509 | } |
1510 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
1510 | else |
1511 | { |
1511 | { |
1512 | /* Process Locked */ |
1512 | /* Release Lock */ |
1513 | __HAL_UNLOCK(hcryp); |
1513 | __HAL_UNLOCK(hcryp); |
1514 | 1514 | ||
1515 | /* Return function status */ |
1515 | return HAL_ERROR; |
1516 | return HAL_ERROR; |
1516 | } |
1517 | } |
1517 | } |
1518 | 1518 | ||
1519 | /* Check if HAL_CRYP_Init has been called */ |
1519 | /** |
1520 | if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY)) |
1520 | * @brief Initializes the CRYP peripheral in AES ECB decryption mode using DMA. |
1521 | { |
1521 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1522 | /* Process Locked */ |
1522 | * the configuration information for CRYP module |
1523 | __HAL_LOCK(hcryp); |
1523 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
1524 | 1524 | * @param Size Length of the plaintext buffer, must be a multiple of 16 bytes |
|
1525 | inputaddr = (uint32_t)pCypherData; |
1525 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
1526 | outputaddr = (uint32_t)pPlainData; |
1526 | * @retval HAL status |
1527 | 1527 | */ |
|
1528 | /* Change the CRYP state */ |
1528 | HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
1529 | hcryp->State = HAL_CRYP_STATE_BUSY; |
1529 | { |
1530 | 1530 | uint32_t inputaddr = 0, outputaddr = 0; |
|
1531 | /* Check if initialization phase has already been performed */ |
1531 | |
1532 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
1532 | /* Check that data aligned on u32 */ |
1533 | { |
1533 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
1534 | /* Set the key */ |
1534 | { |
1535 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
1535 | /* Process Locked */ |
1536 | 1536 | __HAL_UNLOCK(hcryp); |
|
1537 | /* Reset the CHMOD & MODE bits */ |
1537 | |
1538 | CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK); |
1538 | /* Return function status */ |
1539 | 1539 | return HAL_ERROR; |
|
1540 | /* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */ |
1540 | } |
1541 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT); |
1541 | |
1542 | 1542 | /* Check if HAL_CRYP_Init has been called */ |
|
1543 | /* Set the phase */ |
1543 | if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY)) |
1544 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
1544 | { |
1545 | } |
1545 | /* Process Locked */ |
1546 | 1546 | __HAL_LOCK(hcryp); |
|
1547 | /* Set the input and output addresses and start DMA transfer */ |
1547 | |
1548 | CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
1548 | inputaddr = (uint32_t)pCypherData; |
1549 | 1549 | outputaddr = (uint32_t)pPlainData; |
|
1550 | /* Process Unlocked */ |
1550 | |
1551 | __HAL_UNLOCK(hcryp); |
1551 | /* Change the CRYP state */ |
1552 | 1552 | hcryp->State = HAL_CRYP_STATE_BUSY; |
|
1553 | /* Return function status */ |
1553 | |
1554 | return HAL_OK; |
1554 | /* Check if initialization phase has already been performed */ |
1555 | } |
1555 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
1556 | else |
1556 | { |
1557 | { |
1557 | /* Set the key */ |
1558 | /* Release Lock */ |
1558 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
1559 | __HAL_UNLOCK(hcryp); |
1559 | |
1560 | 1560 | /* Reset the CHMOD & MODE bits */ |
|
1561 | return HAL_ERROR; |
1561 | CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK); |
1562 | } |
1562 | |
1563 | } |
1563 | /* Set the CRYP peripheral in AES ECB decryption mode (with key derivation) */ |
1564 | 1564 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB_KEYDERDECRYPT); |
|
1565 | /** |
1565 | |
1566 | * @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA. |
1566 | /* Set the phase */ |
1567 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1567 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
1568 | * the configuration information for CRYP module |
1568 | } |
1569 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
1569 | |
1570 | * @param Size Length of the plaintext buffer, must be a multiple of 16 bytes |
1570 | /* Set the input and output addresses and start DMA transfer */ |
1571 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
1571 | CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
1572 | * @retval HAL status |
1572 | |
1573 | */ |
1573 | /* Process Unlocked */ |
1574 | HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
1574 | __HAL_UNLOCK(hcryp); |
1575 | { |
1575 | |
1576 | uint32_t inputaddr = 0, outputaddr = 0; |
1576 | /* Return function status */ |
1577 | 1577 | return HAL_OK; |
|
1578 | /* Check that data aligned on u32 */ |
1578 | } |
1579 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
1579 | else |
1580 | { |
1580 | { |
1581 | /* Process Locked */ |
1581 | /* Release Lock */ |
1582 | __HAL_UNLOCK(hcryp); |
1582 | __HAL_UNLOCK(hcryp); |
1583 | 1583 | ||
1584 | /* Return function status */ |
1584 | return HAL_ERROR; |
1585 | return HAL_ERROR; |
1585 | } |
1586 | } |
1586 | } |
1587 | 1587 | ||
1588 | /* Check if HAL_CRYP_Init has been called */ |
1588 | /** |
1589 | if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY)) |
1589 | * @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA. |
1590 | { |
1590 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1591 | /* Process Locked */ |
1591 | * the configuration information for CRYP module |
1592 | __HAL_LOCK(hcryp); |
1592 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
1593 | 1593 | * @param Size Length of the plaintext buffer, must be a multiple of 16 bytes |
|
1594 | inputaddr = (uint32_t)pCypherData; |
1594 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
1595 | outputaddr = (uint32_t)pPlainData; |
1595 | * @retval HAL status |
1596 | 1596 | */ |
|
1597 | /* Change the CRYP state */ |
1597 | HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
1598 | hcryp->State = HAL_CRYP_STATE_BUSY; |
1598 | { |
1599 | 1599 | uint32_t inputaddr = 0, outputaddr = 0; |
|
1600 | /* Check if initialization phase has already been performed */ |
1600 | |
1601 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
1601 | /* Check that data aligned on u32 */ |
1602 | { |
1602 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
1603 | /* Set the key */ |
1603 | { |
1604 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
1604 | /* Process Locked */ |
1605 | 1605 | __HAL_UNLOCK(hcryp); |
|
1606 | /* Reset the CHMOD & MODE bits */ |
1606 | |
1607 | CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK); |
1607 | /* Return function status */ |
1608 | 1608 | return HAL_ERROR; |
|
1609 | /* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */ |
1609 | } |
1610 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT); |
1610 | |
1611 | 1611 | /* Check if HAL_CRYP_Init has been called */ |
|
1612 | /* Set the Initialization Vector */ |
1612 | if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY)) |
1613 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect); |
1613 | { |
1614 | 1614 | /* Process Locked */ |
|
1615 | /* Set the phase */ |
1615 | __HAL_LOCK(hcryp); |
1616 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
1616 | |
1617 | } |
1617 | inputaddr = (uint32_t)pCypherData; |
1618 | 1618 | outputaddr = (uint32_t)pPlainData; |
|
1619 | /* Set the input and output addresses and start DMA transfer */ |
1619 | |
1620 | CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
1620 | /* Change the CRYP state */ |
1621 | 1621 | hcryp->State = HAL_CRYP_STATE_BUSY; |
|
1622 | /* Process Unlocked */ |
1622 | |
1623 | __HAL_UNLOCK(hcryp); |
1623 | /* Check if initialization phase has already been performed */ |
1624 | 1624 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
|
1625 | /* Return function status */ |
1625 | { |
1626 | return HAL_OK; |
1626 | /* Set the key */ |
1627 | } |
1627 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
1628 | else |
1628 | |
1629 | { |
1629 | /* Reset the CHMOD & MODE bits */ |
1630 | /* Release Lock */ |
1630 | CLEAR_BIT(hcryp->Instance->CR, CRYP_ALGO_CHAIN_MASK); |
1631 | __HAL_UNLOCK(hcryp); |
1631 | |
1632 | 1632 | /* Set the CRYP peripheral in AES CBC decryption mode (with key derivation) */ |
|
1633 | return HAL_ERROR; |
1633 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC_KEYDERDECRYPT); |
1634 | } |
1634 | |
1635 | } |
1635 | /* Set the Initialization Vector */ |
1636 | 1636 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect); |
|
1637 | /** |
1637 | |
1638 | * @brief Initializes the CRYP peripheral in AES CTR decryption mode using DMA. |
1638 | /* Set the phase */ |
1639 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1639 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
1640 | * the configuration information for CRYP module |
1640 | } |
1641 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
1641 | |
1642 | * @param Size Length of the plaintext buffer, must be a multiple of 16 |
1642 | /* Set the input and output addresses and start DMA transfer */ |
1643 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
1643 | CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
1644 | * @retval HAL status |
1644 | |
1645 | */ |
1645 | /* Process Unlocked */ |
1646 | HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
1646 | __HAL_UNLOCK(hcryp); |
1647 | { |
1647 | |
1648 | uint32_t inputaddr = 0, outputaddr = 0; |
1648 | /* Return function status */ |
1649 | 1649 | return HAL_OK; |
|
1650 | /* Check that data aligned on u32 */ |
1650 | } |
1651 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
1651 | else |
1652 | { |
1652 | { |
1653 | /* Process Locked */ |
1653 | /* Release Lock */ |
1654 | __HAL_UNLOCK(hcryp); |
1654 | __HAL_UNLOCK(hcryp); |
1655 | 1655 | ||
1656 | /* Return function status */ |
1656 | return HAL_ERROR; |
1657 | return HAL_ERROR; |
1657 | } |
1658 | } |
1658 | } |
1659 | 1659 | ||
1660 | /* Check if HAL_CRYP_Init has been called */ |
1660 | /** |
1661 | if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY)) |
1661 | * @brief Initializes the CRYP peripheral in AES CTR decryption mode using DMA. |
1662 | { |
1662 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1663 | /* Process Locked */ |
1663 | * the configuration information for CRYP module |
1664 | __HAL_LOCK(hcryp); |
1664 | * @param pCypherData Pointer to the cyphertext buffer (aligned on u32) |
1665 | 1665 | * @param Size Length of the plaintext buffer, must be a multiple of 16 |
|
1666 | inputaddr = (uint32_t)pCypherData; |
1666 | * @param pPlainData Pointer to the plaintext buffer (aligned on u32) |
1667 | outputaddr = (uint32_t)pPlainData; |
1667 | * @retval HAL status |
1668 | 1668 | */ |
|
1669 | /* Change the CRYP state */ |
1669 | HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) |
1670 | hcryp->State = HAL_CRYP_STATE_BUSY; |
1670 | { |
1671 | 1671 | uint32_t inputaddr = 0, outputaddr = 0; |
|
1672 | /* Check if initialization phase has already been performed */ |
1672 | |
1673 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
1673 | /* Check that data aligned on u32 */ |
1674 | { |
1674 | if((((uint32_t)pPlainData & (uint32_t)0x00000003) != 0) || (((uint32_t)pCypherData & (uint32_t)0x00000003) != 0) || ((Size & (uint16_t)0x000F) != 0)) |
1675 | /* Set the key */ |
1675 | { |
1676 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
1676 | /* Process Locked */ |
1677 | 1677 | __HAL_UNLOCK(hcryp); |
|
1678 | /* Set the CRYP peripheral in AES CTR mode */ |
1678 | |
1679 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_DECRYPT); |
1679 | /* Return function status */ |
1680 | 1680 | return HAL_ERROR; |
|
1681 | /* Set the Initialization Vector */ |
1681 | } |
1682 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect); |
1682 | |
1683 | 1683 | /* Check if HAL_CRYP_Init has been called */ |
|
1684 | /* Set the phase */ |
1684 | if ((hcryp->State != HAL_CRYP_STATE_RESET) && (hcryp->State == HAL_CRYP_STATE_READY)) |
1685 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
1685 | { |
1686 | } |
1686 | /* Process Locked */ |
1687 | 1687 | __HAL_LOCK(hcryp); |
|
1688 | /* Set the input and output addresses and start DMA transfer */ |
1688 | |
1689 | CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
1689 | inputaddr = (uint32_t)pCypherData; |
1690 | 1690 | outputaddr = (uint32_t)pPlainData; |
|
1691 | /* Process Unlocked */ |
1691 | |
1692 | __HAL_UNLOCK(hcryp); |
1692 | /* Change the CRYP state */ |
1693 | 1693 | hcryp->State = HAL_CRYP_STATE_BUSY; |
|
1694 | /* Return function status */ |
1694 | |
1695 | return HAL_OK; |
1695 | /* Check if initialization phase has already been performed */ |
1696 | } |
1696 | if(hcryp->Phase == HAL_CRYP_PHASE_READY) |
1697 | else |
1697 | { |
1698 | { |
1698 | /* Set the key */ |
1699 | /* Release Lock */ |
1699 | CRYP_SetKey(hcryp, hcryp->Init.pKey); |
1700 | __HAL_UNLOCK(hcryp); |
1700 | |
1701 | 1701 | /* Set the CRYP peripheral in AES CTR mode */ |
|
1702 | return HAL_ERROR; |
1702 | __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR_DECRYPT); |
1703 | } |
1703 | |
1704 | } |
1704 | /* Set the Initialization Vector */ |
1705 | 1705 | CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect); |
|
1706 | /** |
1706 | |
1707 | * @} |
1707 | /* Set the phase */ |
1708 | */ |
1708 | hcryp->Phase = HAL_CRYP_PHASE_PROCESS; |
1709 | 1709 | } |
|
1710 | /** @defgroup CRYP_Exported_Functions_Group3 DMA callback functions |
1710 | |
1711 | * @brief DMA callback functions. |
1711 | /* Set the input and output addresses and start DMA transfer */ |
1712 | * |
1712 | CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); |
1713 | @verbatim |
1713 | |
1714 | ============================================================================== |
1714 | /* Process Unlocked */ |
1715 | ##### DMA callback functions ##### |
1715 | __HAL_UNLOCK(hcryp); |
1716 | ============================================================================== |
1716 | |
1717 | [..] This section provides DMA callback functions: |
1717 | /* Return function status */ |
1718 | (+) DMA Input data transfer complete |
1718 | return HAL_OK; |
1719 | (+) DMA Output data transfer complete |
1719 | } |
1720 | (+) DMA error |
1720 | else |
1721 | 1721 | { |
|
1722 | @endverbatim |
1722 | /* Release Lock */ |
1723 | * @{ |
1723 | __HAL_UNLOCK(hcryp); |
1724 | */ |
1724 | |
1725 | 1725 | return HAL_ERROR; |
|
1726 | /** |
1726 | } |
1727 | * @brief CRYP error callback. |
1727 | } |
1728 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1728 | |
1729 | * the configuration information for CRYP module |
1729 | /** |
1730 | * @retval None |
1730 | * @} |
1731 | */ |
1731 | */ |
1732 | __weak void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp) |
1732 | |
1733 | { |
1733 | /** @defgroup CRYP_Exported_Functions_Group3 DMA callback functions |
1734 | /* Prevent unused argument(s) compilation warning */ |
1734 | * @brief DMA callback functions. |
1735 | UNUSED(hcryp); |
1735 | * |
1736 | 1736 | @verbatim |
|
1737 | /* NOTE : This function should not be modified; when the callback is needed, |
1737 | ============================================================================== |
1738 | the HAL_CRYP_ErrorCallback can be implemented in the user file |
1738 | ##### DMA callback functions ##### |
1739 | */ |
1739 | ============================================================================== |
1740 | } |
1740 | [..] This section provides DMA callback functions: |
1741 | 1741 | (+) DMA Input data transfer complete |
|
1742 | /** |
1742 | (+) DMA Output data transfer complete |
1743 | * @brief Input transfer completed callback. |
1743 | (+) DMA error |
1744 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1744 | |
1745 | * the configuration information for CRYP module |
1745 | @endverbatim |
1746 | * @retval None |
1746 | * @{ |
1747 | */ |
1747 | */ |
1748 | __weak void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp) |
1748 | |
1749 | { |
1749 | /** |
1750 | /* Prevent unused argument(s) compilation warning */ |
1750 | * @brief CRYP error callback. |
1751 | UNUSED(hcryp); |
1751 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1752 | 1752 | * the configuration information for CRYP module |
|
1753 | /* NOTE : This function should not be modified; when the callback is needed, |
1753 | * @retval None |
1754 | the HAL_CRYP_InCpltCallback can be implemented in the user file |
1754 | */ |
1755 | */ |
1755 | __weak void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp) |
1756 | } |
1756 | { |
1757 | 1757 | /* Prevent unused argument(s) compilation warning */ |
|
1758 | /** |
1758 | UNUSED(hcryp); |
1759 | * @brief Output transfer completed callback. |
1759 | |
1760 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1760 | /* NOTE : This function should not be modified; when the callback is needed, |
1761 | * the configuration information for CRYP module |
1761 | the HAL_CRYP_ErrorCallback can be implemented in the user file |
1762 | * @retval None |
1762 | */ |
1763 | */ |
1763 | } |
1764 | __weak void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp) |
1764 | |
1765 | { |
1765 | /** |
1766 | /* Prevent unused argument(s) compilation warning */ |
1766 | * @brief Input transfer completed callback. |
1767 | UNUSED(hcryp); |
1767 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1768 | 1768 | * the configuration information for CRYP module |
|
1769 | /* NOTE : This function should not be modified; when the callback is needed, |
1769 | * @retval None |
1770 | the HAL_CRYP_OutCpltCallback can be implemented in the user file |
1770 | */ |
1771 | */ |
1771 | __weak void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp) |
1772 | } |
1772 | { |
1773 | 1773 | /* Prevent unused argument(s) compilation warning */ |
|
1774 | /** |
1774 | UNUSED(hcryp); |
1775 | * @} |
1775 | |
1776 | */ |
1776 | /* NOTE : This function should not be modified; when the callback is needed, |
1777 | 1777 | the HAL_CRYP_InCpltCallback can be implemented in the user file |
|
1778 | /** @defgroup CRYP_Exported_Functions_Group4 CRYP IRQ handler |
1778 | */ |
1779 | * @brief CRYP IRQ handler. |
1779 | } |
1780 | * |
1780 | |
1781 | @verbatim |
1781 | /** |
1782 | ============================================================================== |
1782 | * @brief Output transfer completed callback. |
1783 | ##### CRYP IRQ handler management ##### |
1783 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1784 | ============================================================================== |
1784 | * the configuration information for CRYP module |
1785 | [..] This section provides CRYP IRQ handler function. |
1785 | * @retval None |
1786 | 1786 | */ |
|
1787 | @endverbatim |
1787 | __weak void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp) |
1788 | * @{ |
1788 | { |
1789 | */ |
1789 | /* Prevent unused argument(s) compilation warning */ |
1790 | 1790 | UNUSED(hcryp); |
|
1791 | /** |
1791 | |
1792 | * @brief This function handles CRYP interrupt request. |
1792 | /* NOTE : This function should not be modified; when the callback is needed, |
1793 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1793 | the HAL_CRYP_OutCpltCallback can be implemented in the user file |
1794 | * the configuration information for CRYP module |
1794 | */ |
1795 | * @retval None |
1795 | } |
1796 | */ |
1796 | |
1797 | void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp) |
1797 | /** |
1798 | { |
1798 | * @} |
1799 | /* Check if error occurred*/ |
1799 | */ |
1800 | if (__HAL_CRYP_GET_IT_SOURCE(hcryp, CRYP_IT_ERR) != RESET) |
1800 | |
1801 | { |
1801 | /** @defgroup CRYP_Exported_Functions_Group4 CRYP IRQ handler |
1802 | if (__HAL_CRYP_GET_FLAG(hcryp,CRYP_FLAG_RDERR) != RESET) |
1802 | * @brief CRYP IRQ handler. |
1803 | { |
1803 | * |
1804 | __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_RDERR); |
1804 | @verbatim |
1805 | } |
1805 | ============================================================================== |
1806 | 1806 | ##### CRYP IRQ handler management ##### |
|
1807 | if (__HAL_CRYP_GET_FLAG(hcryp,CRYP_FLAG_WRERR) != RESET) |
1807 | ============================================================================== |
1808 | { |
1808 | [..] This section provides CRYP IRQ handler function. |
1809 | __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_WRERR); |
1809 | |
1810 | } |
1810 | @endverbatim |
1811 | 1811 | * @{ |
|
1812 | if (__HAL_CRYP_GET_FLAG(hcryp, CRYP_FLAG_CCF) != RESET) |
1812 | */ |
1813 | { |
1813 | |
1814 | __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_CCF); |
1814 | /** |
1815 | } |
1815 | * @brief This function handles CRYP interrupt request. |
1816 | 1816 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
|
1817 | hcryp->State= HAL_CRYP_STATE_ERROR; |
1817 | * the configuration information for CRYP module |
1818 | /* Disable Computation Complete Interrupt */ |
1818 | * @retval None |
1819 | __HAL_CRYP_DISABLE_IT(hcryp,CRYP_IT_CC); |
1819 | */ |
1820 | __HAL_CRYP_DISABLE_IT(hcryp,CRYP_IT_ERR); |
1820 | void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp) |
1821 | 1821 | { |
|
1822 | HAL_CRYP_ErrorCallback(hcryp); |
1822 | /* Check if error occurred*/ |
1823 | 1823 | if (__HAL_CRYP_GET_IT_SOURCE(hcryp, CRYP_IT_ERR) != RESET) |
|
1824 | /* Process Unlocked */ |
1824 | { |
1825 | __HAL_UNLOCK(hcryp); |
1825 | if (__HAL_CRYP_GET_FLAG(hcryp,CRYP_FLAG_RDERR) != RESET) |
1826 | 1826 | { |
|
1827 | return; |
1827 | __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_RDERR); |
1828 | } |
1828 | } |
1829 | 1829 | ||
1830 | /* Check if computation complete interrupt was enabled*/ |
1830 | if (__HAL_CRYP_GET_FLAG(hcryp,CRYP_FLAG_WRERR) != RESET) |
1831 | if (__HAL_CRYP_GET_IT_SOURCE(hcryp, CRYP_IT_CC) != RESET) |
1831 | { |
1832 | { |
1832 | __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_WRERR); |
1833 | /* Clear CCF Flag */ |
1833 | } |
1834 | __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_CCF); |
1834 | |
1835 | 1835 | if (__HAL_CRYP_GET_FLAG(hcryp, CRYP_FLAG_CCF) != RESET) |
|
1836 | CRYP_EncryptDecrypt_IT(hcryp); |
1836 | { |
1837 | } |
1837 | __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_CCF); |
1838 | } |
1838 | } |
1839 | 1839 | ||
1840 | /** |
1840 | hcryp->State= HAL_CRYP_STATE_ERROR; |
1841 | * @} |
1841 | /* Disable Computation Complete Interrupt */ |
1842 | */ |
1842 | __HAL_CRYP_DISABLE_IT(hcryp,CRYP_IT_CC); |
1843 | 1843 | __HAL_CRYP_DISABLE_IT(hcryp,CRYP_IT_ERR); |
|
1844 | /** @defgroup CRYP_Exported_Functions_Group5 Peripheral State functions |
1844 | |
1845 | * @brief Peripheral State functions. |
1845 | HAL_CRYP_ErrorCallback(hcryp); |
1846 | * |
1846 | |
1847 | @verbatim |
1847 | /* Process Unlocked */ |
1848 | ============================================================================== |
1848 | __HAL_UNLOCK(hcryp); |
1849 | ##### Peripheral State functions ##### |
1849 | |
1850 | ============================================================================== |
1850 | return; |
1851 | [..] |
1851 | } |
1852 | This subsection permits to get in run-time the status of the peripheral. |
1852 | |
1853 | 1853 | /* Check if computation complete interrupt was enabled*/ |
|
1854 | @endverbatim |
1854 | if (__HAL_CRYP_GET_IT_SOURCE(hcryp, CRYP_IT_CC) != RESET) |
1855 | * @{ |
1855 | { |
1856 | */ |
1856 | /* Clear CCF Flag */ |
1857 | 1857 | __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_CCF); |
|
1858 | /** |
1858 | |
1859 | * @brief Returns the CRYP state. |
1859 | CRYP_EncryptDecrypt_IT(hcryp); |
1860 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1860 | } |
1861 | * the configuration information for CRYP module |
1861 | } |
1862 | * @retval HAL state |
1862 | |
1863 | */ |
1863 | /** |
1864 | HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp) |
1864 | * @} |
1865 | { |
1865 | */ |
1866 | return hcryp->State; |
1866 | |
1867 | } |
1867 | /** @defgroup CRYP_Exported_Functions_Group5 Peripheral State functions |
1868 | 1868 | * @brief Peripheral State functions. |
|
1869 | /** |
1869 | * |
1870 | * @} |
1870 | @verbatim |
1871 | */ |
1871 | ============================================================================== |
1872 | 1872 | ##### Peripheral State functions ##### |
|
1873 | /** |
1873 | ============================================================================== |
1874 | * @} |
1874 | [..] |
1875 | */ |
1875 | This subsection permits to get in run-time the status of the peripheral. |
1876 | 1876 | ||
1877 | /** @addtogroup CRYP_Private_Functions |
1877 | @endverbatim |
1878 | * @{ |
1878 | * @{ |
1879 | */ |
1879 | */ |
1880 | 1880 | ||
1881 | /** |
1881 | /** |
1882 | * @brief IT function called under interruption context to continue encryption or decryption |
1882 | * @brief Returns the CRYP state. |
1883 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1883 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1884 | * the configuration information for CRYP module |
1884 | * the configuration information for CRYP module |
1885 | * @retval HAL status |
1885 | * @retval HAL state |
1886 | */ |
1886 | */ |
1887 | static HAL_StatusTypeDef CRYP_EncryptDecrypt_IT(CRYP_HandleTypeDef *hcryp) |
1887 | HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp) |
1888 | { |
1888 | { |
1889 | uint32_t inputaddr = 0, outputaddr = 0; |
1889 | return hcryp->State; |
1890 | 1890 | } |
|
1891 | /* Get the last Output data adress */ |
1891 | |
1892 | outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr; |
1892 | /** |
1893 | 1893 | * @} |
|
1894 | /* Read the Output block from the Output Register */ |
1894 | */ |
1895 | *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; |
1895 | |
1896 | outputaddr+=4; |
1896 | /** |
1897 | *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; |
1897 | * @} |
1898 | outputaddr+=4; |
1898 | */ |
1899 | *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; |
1899 | |
1900 | outputaddr+=4; |
1900 | /** @addtogroup CRYP_Private_Functions |
1901 | *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; |
1901 | * @{ |
1902 | 1902 | */ |
|
1903 | hcryp->pCrypOutBuffPtr += 16; |
1903 | |
1904 | hcryp->CrypOutCount -= 16; |
1904 | /** |
1905 | 1905 | * @brief IT function called under interruption context to continue encryption or decryption |
|
1906 | /* Check if all input text is encrypted or decrypted */ |
1906 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1907 | if(hcryp->CrypOutCount == 0) |
1907 | * the configuration information for CRYP module |
1908 | { |
1908 | * @retval HAL status |
1909 | /* Disable Computation Complete Interrupt */ |
1909 | */ |
1910 | __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_CC); |
1910 | static HAL_StatusTypeDef CRYP_EncryptDecrypt_IT(CRYP_HandleTypeDef *hcryp) |
1911 | __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_ERR); |
1911 | { |
1912 | 1912 | uint32_t inputaddr = 0, outputaddr = 0; |
|
1913 | /* Process Unlocked */ |
1913 | |
1914 | __HAL_UNLOCK(hcryp); |
1914 | /* Get the last Output data address */ |
1915 | 1915 | outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr; |
|
1916 | /* Change the CRYP state */ |
1916 | |
1917 | hcryp->State = HAL_CRYP_STATE_READY; |
1917 | /* Read the Output block from the Output Register */ |
1918 | 1918 | *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; |
|
1919 | /* Call computation complete callback */ |
1919 | outputaddr+=4; |
1920 | HAL_CRYPEx_ComputationCpltCallback(hcryp); |
1920 | *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; |
1921 | } |
1921 | outputaddr+=4; |
1922 | else /* Process the rest of input text */ |
1922 | *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; |
1923 | { |
1923 | outputaddr+=4; |
1924 | /* Get the last Intput data adress */ |
1924 | *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; |
1925 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
1925 | |
1926 | 1926 | hcryp->pCrypOutBuffPtr += 16; |
|
1927 | /* Write the Input block in the Data Input register */ |
1927 | hcryp->CrypOutCount -= 16; |
1928 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1928 | |
1929 | inputaddr+=4; |
1929 | /* Check if all input text is encrypted or decrypted */ |
1930 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1930 | if(hcryp->CrypOutCount == 0) |
1931 | inputaddr+=4; |
1931 | { |
1932 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1932 | /* Disable Computation Complete Interrupt */ |
1933 | inputaddr+=4; |
1933 | __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_CC); |
1934 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1934 | __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_ERR); |
1935 | hcryp->pCrypInBuffPtr += 16; |
1935 | |
1936 | hcryp->CrypInCount -= 16; |
1936 | /* Process Unlocked */ |
1937 | } |
1937 | __HAL_UNLOCK(hcryp); |
1938 | return HAL_OK; |
1938 | |
1939 | } |
1939 | /* Change the CRYP state */ |
1940 | /** |
1940 | hcryp->State = HAL_CRYP_STATE_READY; |
1941 | * @brief DMA CRYP Input Data process complete callback. |
1941 | |
1942 | * @param hdma DMA handle |
1942 | /* Call computation complete callback */ |
1943 | * @retval None |
1943 | HAL_CRYPEx_ComputationCpltCallback(hcryp); |
1944 | */ |
1944 | } |
1945 | static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma) |
1945 | else /* Process the rest of input text */ |
1946 | { |
1946 | { |
1947 | CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
1947 | /* Get the last Input data address */ |
1948 | 1948 | inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; |
|
1949 | /* Disable the DMA transfer for input request */ |
1949 | |
1950 | CLEAR_BIT(hcryp->Instance->CR, AES_CR_DMAINEN); |
1950 | /* Increment the pointer before writing the input block in the IN FIFO to make sure that |
1951 | 1951 | when Computation Completed IRQ fires, the hcryp->CrypInCount has always a consistent value |
|
1952 | /* Call input data transfer complete callback */ |
1952 | and it is ready for the next operation. */ |
1953 | HAL_CRYP_InCpltCallback(hcryp); |
1953 | hcryp->pCrypInBuffPtr += 16U; |
1954 | } |
1954 | hcryp->CrypInCount -= 16U; |
1955 | 1955 | ||
1956 | /** |
1956 | /* Write the Input block in the Data Input register */ |
1957 | * @brief DMA CRYP Output Data process complete callback. |
1957 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1958 | * @param hdma DMA handle |
1958 | inputaddr+=4; |
1959 | * @retval None |
1959 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1960 | */ |
1960 | inputaddr+=4; |
1961 | static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma) |
1961 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1962 | { |
1962 | inputaddr+=4; |
1963 | CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
1963 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
1964 | 1964 | } |
|
1965 | /* Disable the DMA transfer for output request by resetting the DMAOUTEN bit |
1965 | return HAL_OK; |
1966 | in the DMACR register */ |
1966 | } |
1967 | CLEAR_BIT(hcryp->Instance->CR, AES_CR_DMAOUTEN); |
1967 | /** |
1968 | 1968 | * @brief DMA CRYP Input Data process complete callback. |
|
1969 | /* Clear CCF Flag */ |
1969 | * @param hdma DMA handle |
1970 | __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_CCF); |
1970 | * @retval None |
1971 | 1971 | */ |
|
1972 | /* Disable CRYP */ |
1972 | static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma) |
1973 | __HAL_CRYP_DISABLE(hcryp); |
1973 | { |
1974 | 1974 | CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
|
1975 | /* Change the CRYP state to ready */ |
1975 | |
1976 | hcryp->State = HAL_CRYP_STATE_READY; |
1976 | /* Disable the DMA transfer for input request */ |
1977 | 1977 | CLEAR_BIT(hcryp->Instance->CR, AES_CR_DMAINEN); |
|
1978 | /* Call output data transfer complete callback */ |
1978 | |
1979 | HAL_CRYP_OutCpltCallback(hcryp); |
1979 | /* Call input data transfer complete callback */ |
1980 | } |
1980 | HAL_CRYP_InCpltCallback(hcryp); |
1981 | 1981 | } |
|
1982 | /** |
1982 | |
1983 | * @brief DMA CRYP communication error callback. |
1983 | /** |
1984 | * @param hdma DMA handle |
1984 | * @brief DMA CRYP Output Data process complete callback. |
1985 | * @retval None |
1985 | * @param hdma DMA handle |
1986 | */ |
1986 | * @retval None |
1987 | static void CRYP_DMAError(DMA_HandleTypeDef *hdma) |
1987 | */ |
1988 | { |
1988 | static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma) |
1989 | CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
1989 | { |
1990 | hcryp->State= HAL_CRYP_STATE_ERROR; |
1990 | CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
1991 | HAL_CRYP_ErrorCallback(hcryp); |
1991 | |
1992 | } |
1992 | /* Disable the DMA transfer for output request by resetting the DMAOUTEN bit |
1993 | 1993 | in the DMACR register */ |
|
1994 | /** |
1994 | CLEAR_BIT(hcryp->Instance->CR, AES_CR_DMAOUTEN); |
1995 | * @brief Writes the Key in Key registers. |
1995 | |
1996 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
1996 | /* Clear CCF Flag */ |
1997 | * the configuration information for CRYP module |
1997 | __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_CCF); |
1998 | * @param Key Pointer to Key buffer |
1998 | |
1999 | * @note Key must be written as little endian. |
1999 | /* Disable CRYP */ |
2000 | * If Key pointer points at address n, |
2000 | __HAL_CRYP_DISABLE(hcryp); |
2001 | * n[15:0] contains key[96:127], |
2001 | |
2002 | * (n+4)[15:0] contains key[64:95], |
2002 | /* Change the CRYP state to ready */ |
2003 | * (n+8)[15:0] contains key[32:63] and |
2003 | hcryp->State = HAL_CRYP_STATE_READY; |
2004 | * (n+12)[15:0] contains key[0:31] |
2004 | |
2005 | * @retval None |
2005 | /* Call output data transfer complete callback */ |
2006 | */ |
2006 | HAL_CRYP_OutCpltCallback(hcryp); |
2007 | static void CRYP_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key) |
2007 | } |
2008 | { |
2008 | |
2009 | uint32_t keyaddr = (uint32_t)Key; |
2009 | /** |
2010 | 2010 | * @brief DMA CRYP communication error callback. |
|
2011 | hcryp->Instance->KEYR3 = __REV(*(uint32_t*)(keyaddr)); |
2011 | * @param hdma DMA handle |
2012 | keyaddr+=4; |
2012 | * @retval None |
2013 | hcryp->Instance->KEYR2 = __REV(*(uint32_t*)(keyaddr)); |
2013 | */ |
2014 | keyaddr+=4; |
2014 | static void CRYP_DMAError(DMA_HandleTypeDef *hdma) |
2015 | hcryp->Instance->KEYR1 = __REV(*(uint32_t*)(keyaddr)); |
2015 | { |
2016 | keyaddr+=4; |
2016 | CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
2017 | hcryp->Instance->KEYR0 = __REV(*(uint32_t*)(keyaddr)); |
2017 | hcryp->State= HAL_CRYP_STATE_ERROR; |
2018 | } |
2018 | HAL_CRYP_ErrorCallback(hcryp); |
2019 | 2019 | } |
|
2020 | /** |
2020 | |
2021 | * @brief Writes the InitVector/InitCounter in IV registers. |
2021 | /** |
2022 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
2022 | * @brief Writes the Key in Key registers. |
2023 | * the configuration information for CRYP module |
2023 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
2024 | * @param InitVector Pointer to InitVector/InitCounter buffer |
2024 | * the configuration information for CRYP module |
2025 | * @note Init Vector must be written as little endian. |
2025 | * @param Key Pointer to Key buffer |
2026 | * If Init Vector pointer points at address n, |
2026 | * @note Key must be written as little endian. |
2027 | * n[15:0] contains Vector[96:127], |
2027 | * If Key pointer points at address n, |
2028 | * (n+4)[15:0] contains Vector[64:95], |
2028 | * n[15:0] contains key[96:127], |
2029 | * (n+8)[15:0] contains Vector[32:63] and |
2029 | * (n+4)[15:0] contains key[64:95], |
2030 | * (n+12)[15:0] contains Vector[0:31] |
2030 | * (n+8)[15:0] contains key[32:63] and |
2031 | * @retval None |
2031 | * (n+12)[15:0] contains key[0:31] |
2032 | */ |
2032 | * @retval None |
2033 | static void CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector) |
2033 | */ |
2034 | { |
2034 | static void CRYP_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key) |
2035 | uint32_t ivaddr = (uint32_t)InitVector; |
2035 | { |
2036 | 2036 | uint32_t keyaddr = (uint32_t)Key; |
|
2037 | hcryp->Instance->IVR3 = __REV(*(uint32_t*)(ivaddr)); |
2037 | |
2038 | ivaddr+=4; |
2038 | hcryp->Instance->KEYR3 = __REV(*(uint32_t*)(keyaddr)); |
2039 | hcryp->Instance->IVR2 = __REV(*(uint32_t*)(ivaddr)); |
2039 | keyaddr+=4; |
2040 | ivaddr+=4; |
2040 | hcryp->Instance->KEYR2 = __REV(*(uint32_t*)(keyaddr)); |
2041 | hcryp->Instance->IVR1 = __REV(*(uint32_t*)(ivaddr)); |
2041 | keyaddr+=4; |
2042 | ivaddr+=4; |
2042 | hcryp->Instance->KEYR1 = __REV(*(uint32_t*)(keyaddr)); |
2043 | hcryp->Instance->IVR0 = __REV(*(uint32_t*)(ivaddr)); |
2043 | keyaddr+=4; |
2044 | } |
2044 | hcryp->Instance->KEYR0 = __REV(*(uint32_t*)(keyaddr)); |
2045 | 2045 | } |
|
2046 | /** |
2046 | |
2047 | * @brief Process Data: Writes Input data in polling mode and reads the output data |
2047 | /** |
2048 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
2048 | * @brief Writes the InitVector/InitCounter in IV registers. |
2049 | * the configuration information for CRYP module |
2049 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
2050 | * @param Input Pointer to the Input buffer |
2050 | * the configuration information for CRYP module |
2051 | * @param Ilength Length of the Input buffer, must be a multiple of 16. |
2051 | * @param InitVector Pointer to InitVector/InitCounter buffer |
2052 | * @param Output Pointer to the returned buffer |
2052 | * @note Init Vector must be written as little endian. |
2053 | * @param Timeout Specify Timeout value |
2053 | * If Init Vector pointer points at address n, |
2054 | * @retval None |
2054 | * n[15:0] contains Vector[96:127], |
2055 | */ |
2055 | * (n+4)[15:0] contains Vector[64:95], |
2056 | static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout) |
2056 | * (n+8)[15:0] contains Vector[32:63] and |
2057 | { |
2057 | * (n+12)[15:0] contains Vector[0:31] |
2058 | uint32_t tickstart = 0; |
2058 | * @retval None |
2059 | 2059 | */ |
|
2060 | uint32_t index = 0; |
2060 | static void CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector) |
2061 | uint32_t inputaddr = (uint32_t)Input; |
2061 | { |
2062 | uint32_t outputaddr = (uint32_t)Output; |
2062 | uint32_t ivaddr = (uint32_t)InitVector; |
2063 | 2063 | ||
2064 | for(index=0; (index < Ilength); index += 16) |
2064 | hcryp->Instance->IVR3 = __REV(*(uint32_t*)(ivaddr)); |
2065 | { |
2065 | ivaddr+=4; |
2066 | /* Write the Input block in the Data Input register */ |
2066 | hcryp->Instance->IVR2 = __REV(*(uint32_t*)(ivaddr)); |
2067 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
2067 | ivaddr+=4; |
2068 | inputaddr+=4; |
2068 | hcryp->Instance->IVR1 = __REV(*(uint32_t*)(ivaddr)); |
2069 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
2069 | ivaddr+=4; |
2070 | inputaddr+=4; |
2070 | hcryp->Instance->IVR0 = __REV(*(uint32_t*)(ivaddr)); |
2071 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
2071 | } |
2072 | inputaddr+=4; |
2072 | |
2073 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
2073 | /** |
2074 | inputaddr+=4; |
2074 | * @brief Process Data: Writes Input data in polling mode and reads the output data |
2075 | 2075 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
|
2076 | /* Get timeout */ |
2076 | * the configuration information for CRYP module |
2077 | tickstart = HAL_GetTick(); |
2077 | * @param Input Pointer to the Input buffer |
2078 | 2078 | * @param Ilength Length of the Input buffer, must be a multiple of 16. |
|
2079 | while(HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)) |
2079 | * @param Output Pointer to the returned buffer |
2080 | { |
2080 | * @param Timeout Specify Timeout value |
2081 | /* Check for the Timeout */ |
2081 | * @retval None |
2082 | if(Timeout != HAL_MAX_DELAY) |
2082 | */ |
2083 | { |
2083 | static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout) |
2084 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
2084 | { |
2085 | { |
2085 | uint32_t tickstart = 0; |
2086 | /* Change state */ |
2086 | |
2087 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
2087 | uint32_t index = 0; |
2088 | 2088 | uint32_t inputaddr = (uint32_t)Input; |
|
2089 | /* Process Unlocked */ |
2089 | uint32_t outputaddr = (uint32_t)Output; |
2090 | __HAL_UNLOCK(hcryp); |
2090 | |
2091 | 2091 | for(index=0; (index < Ilength); index += 16) |
|
2092 | return HAL_TIMEOUT; |
2092 | { |
2093 | } |
2093 | /* Write the Input block in the Data Input register */ |
2094 | } |
2094 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
2095 | } |
2095 | inputaddr+=4; |
2096 | /* Clear CCF Flag */ |
2096 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
2097 | __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_CCF); |
2097 | inputaddr+=4; |
2098 | 2098 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
|
2099 | /* Read the Output block from the Data Output Register */ |
2099 | inputaddr+=4; |
2100 | *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; |
2100 | hcryp->Instance->DINR = *(uint32_t*)(inputaddr); |
2101 | outputaddr+=4; |
2101 | inputaddr+=4; |
2102 | *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; |
2102 | |
2103 | outputaddr+=4; |
2103 | /* Get timeout */ |
2104 | *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; |
2104 | tickstart = HAL_GetTick(); |
2105 | outputaddr+=4; |
2105 | |
2106 | *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; |
2106 | while(HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)) |
2107 | outputaddr+=4; |
2107 | { |
2108 | } |
2108 | /* Check for the Timeout */ |
2109 | /* Return function status */ |
2109 | if(Timeout != HAL_MAX_DELAY) |
2110 | return HAL_OK; |
2110 | { |
2111 | } |
2111 | if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) |
2112 | 2112 | { |
|
2113 | /** |
2113 | /* Change state */ |
2114 | * @brief Set the DMA configuration and start the DMA transfer |
2114 | hcryp->State = HAL_CRYP_STATE_TIMEOUT; |
2115 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
2115 | |
2116 | * the configuration information for CRYP module |
2116 | /* Process Unlocked */ |
2117 | * @param inputaddr address of the Input buffer |
2117 | __HAL_UNLOCK(hcryp); |
2118 | * @param Size Size of the Input buffer, must be a multiple of 16. |
2118 | |
2119 | * @param outputaddr address of the Output buffer |
2119 | return HAL_TIMEOUT; |
2120 | * @retval None |
2120 | } |
2121 | */ |
2121 | } |
2122 | static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr) |
2122 | } |
2123 | { |
2123 | /* Clear CCF Flag */ |
2124 | /* Set the CRYP DMA transfer complete callback */ |
2124 | __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CLEARFLAG_CCF); |
2125 | hcryp->hdmain->XferCpltCallback = CRYP_DMAInCplt; |
2125 | |
2126 | /* Set the DMA error callback */ |
2126 | /* Read the Output block from the Data Output Register */ |
2127 | hcryp->hdmain->XferErrorCallback = CRYP_DMAError; |
2127 | *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; |
2128 | 2128 | outputaddr+=4; |
|
2129 | /* Set the CRYP DMA transfer complete callback */ |
2129 | *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; |
2130 | hcryp->hdmaout->XferCpltCallback = CRYP_DMAOutCplt; |
2130 | outputaddr+=4; |
2131 | /* Set the DMA error callback */ |
2131 | *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; |
2132 | hcryp->hdmaout->XferErrorCallback = CRYP_DMAError; |
2132 | outputaddr+=4; |
2133 | 2133 | *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; |
|
2134 | /* Enable the DMA In DMA Stream */ |
2134 | outputaddr+=4; |
2135 | HAL_DMA_Start_IT(hcryp->hdmain, inputaddr, (uint32_t)&hcryp->Instance->DINR, Size/4); |
2135 | } |
2136 | 2136 | /* Return function status */ |
|
2137 | /* Enable the DMA Out DMA Stream */ |
2137 | return HAL_OK; |
2138 | HAL_DMA_Start_IT(hcryp->hdmaout, (uint32_t)&hcryp->Instance->DOUTR, outputaddr, Size/4); |
2138 | } |
2139 | 2139 | ||
2140 | /* Enable In and Out DMA requests */ |
2140 | /** |
2141 | SET_BIT(hcryp->Instance->CR, (AES_CR_DMAINEN | AES_CR_DMAOUTEN)); |
2141 | * @brief Set the DMA configuration and start the DMA transfer |
2142 | 2142 | * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains |
|
2143 | /* Enable CRYP */ |
2143 | * the configuration information for CRYP module |
2144 | __HAL_CRYP_ENABLE(hcryp); |
2144 | * @param inputaddr address of the Input buffer |
2145 | } |
2145 | * @param Size Size of the Input buffer, must be a multiple of 16. |
2146 | 2146 | * @param outputaddr address of the Output buffer |
|
2147 | /** |
2147 | * @retval None |
2148 | * @} |
2148 | */ |
2149 | */ |
2149 | static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr) |
2150 | 2150 | { |
|
2151 | #endif /* STM32L162xC || STM32L162xCA || STM32L162xD || STM32L162xE || STM32L162xDX*/ |
2151 | /* Set the CRYP DMA transfer complete callback */ |
2152 | 2152 | hcryp->hdmain->XferCpltCallback = CRYP_DMAInCplt; |
|
2153 | /** |
2153 | /* Set the DMA error callback */ |
2154 | * @} |
2154 | hcryp->hdmain->XferErrorCallback = CRYP_DMAError; |
2155 | */ |
2155 | |
2156 | 2156 | /* Set the CRYP DMA transfer complete callback */ |
|
2157 | /** |
2157 | hcryp->hdmaout->XferCpltCallback = CRYP_DMAOutCplt; |
2158 | * @} |
2158 | /* Set the DMA error callback */ |
2159 | */ |
2159 | hcryp->hdmaout->XferErrorCallback = CRYP_DMAError; |
2160 | 2160 | ||
2161 | #endif /* HAL_CRYP_MODULE_ENABLED */ |
2161 | /* Enable the DMA In DMA Stream */ |
2162 | 2162 | HAL_DMA_Start_IT(hcryp->hdmain, inputaddr, (uint32_t)&hcryp->Instance->DINR, Size/4); |
|
2163 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
2163 | |
- | 2164 | /* Enable the DMA Out DMA Stream */ |
|
- | 2165 | HAL_DMA_Start_IT(hcryp->hdmaout, (uint32_t)&hcryp->Instance->DOUTR, outputaddr, Size/4); |
|
- | 2166 | ||
- | 2167 | /* Enable In and Out DMA requests */ |
|
- | 2168 | SET_BIT(hcryp->Instance->CR, (AES_CR_DMAINEN | AES_CR_DMAOUTEN)); |
|
- | 2169 | ||
- | 2170 | /* Enable CRYP */ |
|
- | 2171 | __HAL_CRYP_ENABLE(hcryp); |
|
- | 2172 | } |
|
- | 2173 | ||
- | 2174 | /** |
|
- | 2175 | * @} |
|
- | 2176 | */ |
|
- | 2177 | ||
- | 2178 | #endif /* STM32L162xC || STM32L162xCA || STM32L162xD || STM32L162xE || STM32L162xDX*/ |
|
- | 2179 | ||
- | 2180 | /** |
|
- | 2181 | * @} |
|
- | 2182 | */ |
|
- | 2183 | ||
- | 2184 | /** |
|
- | 2185 | * @} |
|
- | 2186 | */ |
|
- | 2187 | ||
- | 2188 | #endif /* HAL_CRYP_MODULE_ENABLED */ |