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/**
 1 
/**
2 
  ******************************************************************************
 2 
  ******************************************************************************
3 
  * @file    stm32l1xx_hal_adc_ex.c
 3 
  * @file    stm32l1xx_hal_adc_ex.c
4 
  * @author  MCD Application Team
 4 
  * @author  MCD Application Team
5 
  * @brief   This file provides firmware functions to manage the following
 5 
  * @brief   This file provides firmware functions to manage the following
6 
  *          functionalities of the Analog to Digital Convertor (ADC)
 6 
  *          functionalities of the Analog to Digital Convertor (ADC)
7 
  *          peripheral:
 7 
  *          peripheral:
8 
  *           + Operation functions
 8 
  *           + Peripheral Control functions
9 
  *             ++ Start, stop, get result of conversions of injected
 9 
  *          Other functions (generic functions) are available in file
10 
  *                group, using 2 possible modes: polling, interruption.
 10 
  *          "stm32l1xx_hal_adc.c".
11 
  *           + Control functions
 11 
  *
12 
  *             ++ Channels configuration on injected group
 12 
  @verbatim
13 
  *          Other functions (generic functions) are available in file
 13 
  [..]
14 
  *          "stm32l1xx_hal_adc.c".
 14 
  (@) Sections "ADC peripheral features" and "How to use this driver" are
15 
  *
 15 
      available in file of generic functions "stm32l1xx_hal_adc.c".
16 
  @verbatim
 16 
  [..]
17 
  [..]
 17 
  @endverbatim
18 
  (@) Sections "ADC peripheral features" and "How to use this driver" are
 18 
  ******************************************************************************
19 
      available in file of generic functions "stm32l1xx_hal_adc.c".
 19 
  * @attention
20 
  [..]
 20 
  *
21 
  @endverbatim
 21 
  * Copyright (c) 2017 STMicroelectronics.
22 
  ******************************************************************************
 22 
  * All rights reserved.
23 
  * @attention
 23 
  *
24 
  *
 24 
  * This software is licensed under terms that can be found in the LICENSE file
25 
  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
 25 
  * in the root directory of this software component.
26 
  * All rights reserved.</center></h2>
 26 
  * If no LICENSE file comes with this software, it is provided AS-IS.
27 
  *
 27 
  *
28 
  * This software component is licensed by ST under BSD 3-Clause license,
 28 
  ******************************************************************************
29 
  * the "License"; You may not use this file except in compliance with the
 29 
  */
30 
  * License. You may obtain a copy of the License at:
 30 
 
31 
  *                        opensource.org/licenses/BSD-3-Clause
 31 
/* Includes ------------------------------------------------------------------*/
32 
  *
 32 
#include "stm32l1xx_hal.h"
33 
  ******************************************************************************
 33 
 
34 
  */
 34 
/** @addtogroup STM32L1xx_HAL_Driver
35 
 
 35 
  * @{
36 
/* Includes ------------------------------------------------------------------*/
 36 
  */
37 
#include "stm32l1xx_hal.h"
 37 
 
38 
 
 38 
/** @defgroup ADCEx ADCEx
39 
/** @addtogroup STM32L1xx_HAL_Driver
 39 
  * @brief ADC Extension HAL module driver
40 
  * @{
 40 
  * @{
41 
  */
 41 
  */
42 
 
 42 
 
43 
/** @defgroup ADCEx ADCEx
 43 
#ifdef HAL_ADC_MODULE_ENABLED
44 
  * @brief ADC Extension HAL module driver
 44 
 
45 
  * @{
 45 
/* Private typedef -----------------------------------------------------------*/
46 
  */
 46 
/* Private define ------------------------------------------------------------*/
47 
 
 47 
/** @defgroup ADCEx_Private_Constants ADCEx Private Constants
48 
#ifdef HAL_ADC_MODULE_ENABLED
 48 
  * @{
49 
 
 49 
  */
50 
/* Private typedef -----------------------------------------------------------*/
 50 
 
51 
/* Private define ------------------------------------------------------------*/
 51 
  /* ADC conversion cycles (unit: ADC clock cycles)                           */
52 
/** @defgroup ADCEx_Private_Constants ADCEx Private Constants
 52 
  /* (selected sampling time + conversion time of 12 ADC clock cycles, with   */
53 
  * @{
 53 
  /* resolution 12 bits)                                                      */
54 
  */
 54 
  #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_4CYCLE5   ( 16U)
55 
 
 55 
  #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_9CYCLES   ( 21U)
56 
  /* ADC conversion cycles (unit: ADC clock cycles)                           */
 56 
  #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_16CYCLES  ( 28U)
57 
  /* (selected sampling time + conversion time of 12 ADC clock cycles, with   */
 57 
  #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_24CYCLES  ( 36U)
58 
  /* resolution 12 bits)                                                      */
 58 
  #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_48CYCLES  ( 60U)
59 
  #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_4CYCLE5   ( 16U)
 59 
  #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_96CYCLES  (108U)
60 
  #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_9CYCLES   ( 21U)
 60 
  #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_192CYCLES (204U)
61 
  #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_16CYCLES  ( 28U)
 61 
  #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_384CYCLES (396U)
62 
  #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_24CYCLES  ( 36U)
 62 
 
63 
  #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_48CYCLES  ( 60U)
 63 
  /* Delay for temperature sensor stabilization time.                         */
64 
  #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_96CYCLES  (108U)
 64 
  /* Maximum delay is 10us (refer to device datasheet, parameter tSTART).     */
65 
  #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_192CYCLES (204U)
 65 
  /* Unit: us                                                                 */
66 
  #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_384CYCLES (396U)
 66 
  #define ADC_TEMPSENSOR_DELAY_US         (10U)
67 
 
 67 
 
68 
  /* Delay for temperature sensor stabilization time.                         */
 68 
/**
69 
  /* Maximum delay is 10us (refer to device datasheet, parameter tSTART).     */
 69 
  * @}
70 
  /* Unit: us                                                                 */
 70 
  */
71 
  #define ADC_TEMPSENSOR_DELAY_US         (10U)
 71 
 
72 
 
 72 
/* Private macro -------------------------------------------------------------*/
73 
/**
 73 
/* Private variables ---------------------------------------------------------*/
74 
  * @}
 74 
/* Private function prototypes -----------------------------------------------*/
75 
  */
 75 
/* Private functions ---------------------------------------------------------*/
76 
 
 76 
 
77 
/* Private macro -------------------------------------------------------------*/
 77 
/** @defgroup ADCEx_Exported_Functions ADCEx Exported Functions
78 
/* Private variables ---------------------------------------------------------*/
 78 
  * @{
79 
/* Private function prototypes -----------------------------------------------*/
 79 
  */
80 
/* Private functions ---------------------------------------------------------*/
 80 
 
81 
 
 81 
/** @defgroup ADCEx_Exported_Functions_Group1 ADC Extended IO operation functions
82 
/** @defgroup ADCEx_Exported_Functions ADCEx Exported Functions
 82 
 *  @brief    ADC Extended Input and Output operation functions
83 
  * @{
 83 
 *
84 
  */
 84 
@verbatim
85 
 
 85 
 ===============================================================================
86 
/** @defgroup ADCEx_Exported_Functions_Group1 ADC Extended IO operation functions
 86 
                      ##### IO operation functions #####
87 
 *  @brief    ADC Extended Input and Output operation functions
 87 
 ===============================================================================
88 
 *
 88 
    [..]  This section provides functions allowing to:
89 
@verbatim
 89 
      (+) Start conversion of injected group.
90 
 ===============================================================================
 90 
      (+) Stop conversion of injected group.
91 
                      ##### IO operation functions #####
 91 
      (+) Poll for conversion complete on injected group.
92 
 ===============================================================================
 92 
      (+) Get result of injected channel conversion.
93 
    [..]  This section provides functions allowing to:
 93 
      (+) Start conversion of injected group and enable interruptions.
94 
      (+) Start conversion of injected group.
 94 
      (+) Stop conversion of injected group and disable interruptions.
95 
      (+) Stop conversion of injected group.
 95 
     
96 
      (+) Poll for conversion complete on injected group.
 96 
@endverbatim
97 
      (+) Get result of injected channel conversion.
 97 
  * @{
98 
      (+) Start conversion of injected group and enable interruptions.
 98 
  */
99 
      (+) Stop conversion of injected group and disable interruptions.
 99 
 
100 
     
 100 
/**
101 
@endverbatim
 101 
  * @brief  Enables ADC, starts conversion of injected group.
102 
  * @{
 102 
  *         Interruptions enabled in this function: None.
103 
  */
 103 
  * @param  hadc ADC handle
104 
 
 104 
  * @retval HAL status
105 
/**
 105 
  */
106 
  * @brief  Enables ADC, starts conversion of injected group.
 106 
HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc)
107 
  *         Interruptions enabled in this function: None.
 107 
{
108 
  * @param  hadc ADC handle
 108 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
109 
  * @retval HAL status
 109 
 
110 
  */
 110 
  /* Check the parameters */
111 
HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc)
 111 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
112 
{
 112 
 
113 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
 113 
  /* Process locked */
114 
 
 114 
  __HAL_LOCK(hadc);
115 
  /* Check the parameters */
 115 
   
116 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
 116 
  /* Enable the ADC peripheral */
117 
 
 117 
  tmp_hal_status = ADC_Enable(hadc);
118 
  /* Process locked */
 118 
 
119 
  __HAL_LOCK(hadc);
 119 
  /* Start conversion if ADC is effectively enabled */
120 
   
 120 
  if (tmp_hal_status == HAL_OK)
121 
  /* Enable the ADC peripheral */
 121 
  {
122 
  tmp_hal_status = ADC_Enable(hadc);
 122 
    /* Set ADC state                                                          */
123 
 
 123 
    /* - Clear state bitfield related to injected group conversion results    */
124 
  /* Start conversion if ADC is effectively enabled */
 124 
    /* - Set state bitfield related to injected operation                     */
125 
  if (tmp_hal_status == HAL_OK)
 125 
    ADC_STATE_CLR_SET(hadc->State,
126 
  {
 126 
                      HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
127 
    /* Set ADC state                                                          */
 127 
                      HAL_ADC_STATE_INJ_BUSY);
128 
    /* - Clear state bitfield related to injected group conversion results    */
 128 
   
129 
    /* - Set state bitfield related to injected operation                     */
 129 
    /* Check if a regular conversion is ongoing */
130 
    ADC_STATE_CLR_SET(hadc->State,
 130 
    /* Note: On this device, there is no ADC error code fields related to     */
131 
                      HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
 131 
    /*       conversions on group injected only. In case of conversion on     */
132 
                      HAL_ADC_STATE_INJ_BUSY);
 132 
    /*       going on group regular, no error code is reset.                  */
133 
   
 133 
    if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
134 
    /* Check if a regular conversion is ongoing */
 134 
    {
135 
    /* Note: On this device, there is no ADC error code fields related to     */
 135 
      /* Reset ADC all error code fields */
136 
    /*       conversions on group injected only. In case of conversion on     */
 136 
      ADC_CLEAR_ERRORCODE(hadc);
137 
    /*       going on group regular, no error code is reset.                  */
 137 
    }
138 
    if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
 138 
   
139 
    {
 139 
    /* Process unlocked */
140 
      /* Reset ADC all error code fields */
 140 
    /* Unlock before starting ADC conversions: in case of potential           */
141 
      ADC_CLEAR_ERRORCODE(hadc);
 141 
    /* interruption, to let the process to ADC IRQ Handler.                   */
142 
    }
 142 
    __HAL_UNLOCK(hadc);
143 
   
 143 
   
144 
    /* Process unlocked */
 144 
    /* Clear injected group conversion flag */
145 
    /* Unlock before starting ADC conversions: in case of potential           */
 145 
    /* (To ensure of no unknown state from potential previous ADC operations) */
146 
    /* interruption, to let the process to ADC IRQ Handler.                   */
 146 
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
147 
    __HAL_UNLOCK(hadc);
 147 
   
148 
   
 148 
    /* Enable conversion of injected group.                                   */
149 
    /* Clear injected group conversion flag */
 149 
    /* If software start has been selected, conversion starts immediately.    */
150 
    /* (To ensure of no unknown state from potential previous ADC operations) */
 150 
    /* If external trigger has been selected, conversion will start at next   */
151 
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
 151 
    /* trigger event.                                                         */
152 
   
 152 
    /* If automatic injected conversion is enabled, conversion will start     */
153 
    /* Enable conversion of injected group.                                   */
 153 
    /* after next regular group conversion.                                   */
154 
    /* If software start has been selected, conversion starts immediately.    */
 154 
    if (ADC_IS_SOFTWARE_START_INJECTED(hadc)              &&
155 
    /* If external trigger has been selected, conversion will start at next   */
 155 
        HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO)  )
156 
    /* trigger event.                                                         */
 156 
    {
157 
    /* If automatic injected conversion is enabled, conversion will start     */
 157 
      /* Enable ADC software conversion for injected channels */
158 
    /* after next regular group conversion.                                   */
 158 
      SET_BIT(hadc->Instance->CR2, ADC_CR2_JSWSTART);
159 
    if (ADC_IS_SOFTWARE_START_INJECTED(hadc)              &&
 159 
    }
160 
        HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO)  )
 160 
  }
161 
    {
 161 
 
162 
      /* Enable ADC software conversion for injected channels */
 162 
  /* Return function status */
163 
      SET_BIT(hadc->Instance->CR2, ADC_CR2_JSWSTART);
 163 
  return tmp_hal_status;
164 
    }
 164 
}
165 
  }
 165 
 
166 
 
 166 
/**
167 
  /* Return function status */
 167 
  * @brief  Stop conversion of injected channels. Disable ADC peripheral if
168 
  return tmp_hal_status;
 168 
  *         no regular conversion is on going.
169 
}
 169 
  * @note   If ADC must be disabled and if conversion is on going on
170 
 
 170 
  *         regular group, function HAL_ADC_Stop must be used to stop both
171 
/**
 171 
  *         injected and regular groups, and disable the ADC.
172 
  * @brief  Stop conversion of injected channels. Disable ADC peripheral if
 172 
  * @note   If injected group mode auto-injection is enabled,
173 
  *         no regular conversion is on going.
 173 
  *         function HAL_ADC_Stop must be used.
174 
  * @note   If ADC must be disabled and if conversion is on going on
 174 
  * @note   In case of auto-injection mode, HAL_ADC_Stop must be used.
175 
  *         regular group, function HAL_ADC_Stop must be used to stop both
 175 
  * @param  hadc ADC handle
176 
  *         injected and regular groups, and disable the ADC.
 176 
  * @retval None
177 
  * @note   If injected group mode auto-injection is enabled,
 177 
  */
178 
  *         function HAL_ADC_Stop must be used.
 178 
HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc)
179 
  * @note   In case of auto-injection mode, HAL_ADC_Stop must be used.
 179 
{
180 
  * @param  hadc ADC handle
 180 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
181 
  * @retval None
 181 
 
182 
  */
 182 
  /* Check the parameters */
183 
HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc)
 183 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
184 
{
 184 
 
185 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
 185 
  /* Process locked */
186 
 
 186 
  __HAL_LOCK(hadc);
187 
  /* Check the parameters */
 187 
   
188 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
 188 
  /* Stop potential conversion and disable ADC peripheral                     */
189 
 
 189 
  /* Conditioned to:                                                          */
190 
  /* Process locked */
 190 
  /* - No conversion on the other group (regular group) is intended to        */
191 
  __HAL_LOCK(hadc);
 191 
  /*   continue (injected and regular groups stop conversion and ADC disable  */
192 
   
 192 
  /*   are common)                                                            */
193 
  /* Stop potential conversion and disable ADC peripheral                     */
 193 
  /* - In case of auto-injection mode, HAL_ADC_Stop must be used.             */
194 
  /* Conditioned to:                                                          */
 194 
  if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET)  &&
195 
  /* - No conversion on the other group (regular group) is intended to        */
 195 
     HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO)   )
196 
  /*   continue (injected and regular groups stop conversion and ADC disable  */
 196 
  {
197 
  /*   are common)                                                            */
 197 
    /* Stop potential conversion on going, on regular and injected groups */
198 
  /* - In case of auto-injection mode, HAL_ADC_Stop must be used.             */
 198 
    /* Disable ADC peripheral */
199 
  if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET)  &&
 199 
    tmp_hal_status = ADC_ConversionStop_Disable(hadc);
200 
     HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO)   )
 200 
   
201 
  {
 201 
    /* Check if ADC is effectively disabled */
202 
    /* Stop potential conversion on going, on regular and injected groups */
 202 
    if (tmp_hal_status == HAL_OK)
203 
    /* Disable ADC peripheral */
 203 
    {
204 
    tmp_hal_status = ADC_ConversionStop_Disable(hadc);
 204 
      /* Set ADC state */
205 
   
 205 
      ADC_STATE_CLR_SET(hadc->State,
206 
    /* Check if ADC is effectively disabled */
 206 
                        HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
207 
    if (tmp_hal_status == HAL_OK)
 207 
                        HAL_ADC_STATE_READY);
208 
    {
 208 
    }
209 
      /* Set ADC state */
 209 
  }
210 
      ADC_STATE_CLR_SET(hadc->State,
 210 
  else
211 
                        HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
 211 
  {
212 
                        HAL_ADC_STATE_READY);
 212 
    /* Update ADC state machine to error */
213 
    }
 213 
    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
214 
  }
 214 
     
215 
  else
 215 
    tmp_hal_status = HAL_ERROR;
216 
  {
 216 
  }
217 
    /* Update ADC state machine to error */
 217 
 
218 
    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
 218 
  /* Process unlocked */
219 
     
 219 
  __HAL_UNLOCK(hadc);
220 
    tmp_hal_status = HAL_ERROR;
 220 
 
221 
  }
 221 
  /* Return function status */
222 
 
 222 
  return tmp_hal_status;
223 
  /* Process unlocked */
 223 
}
224 
  __HAL_UNLOCK(hadc);
 224 
 
225 
 
 225 
/**
226 
  /* Return function status */
 226 
  * @brief  Wait for injected group conversion to be completed.
227 
  return tmp_hal_status;
 227 
  * @param  hadc ADC handle
228 
}
 228 
  * @param  Timeout Timeout value in millisecond.
229 
 
 229 
  * @retval HAL status
230 
/**
 230 
  */
231 
  * @brief  Wait for injected group conversion to be completed.
 231 
HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
232 
  * @param  hadc ADC handle
 232 
{
233 
  * @param  Timeout Timeout value in millisecond.
 233 
  uint32_t tickstart;
234 
  * @retval HAL status
 234 
 
235 
  */
 235 
  /* Variables for polling in case of scan mode enabled and polling for each  */
236 
HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
 236 
  /* conversion.                                                              */
237 
{
 237 
  /* Note: Variable "conversion_timeout_cpu_cycles" set to offset 28 CPU      */
238 
  uint32_t tickstart;
 238 
  /* cycles to compensate number of CPU cycles for processing of variable     */
239 
 
 239 
  /* "conversion_timeout_cpu_cycles_max"                                      */
240 
  /* Variables for polling in case of scan mode enabled and polling for each  */
 240 
  uint32_t conversion_timeout_cpu_cycles = 28;
241 
  /* conversion.                                                              */
 241 
  uint32_t conversion_timeout_cpu_cycles_max = 0;
242 
  /* Note: Variable "conversion_timeout_cpu_cycles" set to offset 28 CPU      */
 242 
 
243 
  /* cycles to compensate number of CPU cycles for processing of variable     */
 243 
  /* Check the parameters */
244 
  /* "conversion_timeout_cpu_cycles_max"                                      */
 244 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
245 
  uint32_t conversion_timeout_cpu_cycles = 28;
 245 
 
246 
  uint32_t conversion_timeout_cpu_cycles_max = 0;
 246 
  /* Get timeout */
247 
 
 247 
  tickstart = HAL_GetTick();  
248 
  /* Check the parameters */
 248 
     
249 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
 249 
  /* Polling for end of conversion: differentiation if single/sequence        */
250 
 
 250 
  /* conversion.                                                              */
251 
  /* Get timeout */
 251 
  /* For injected group, flag JEOC is set only at the end of the sequence,    */
252 
  tickstart = HAL_GetTick();  
 252 
  /* not for each conversion within the sequence.                             */
253 
     
 253 
  /* If setting "EOCSelection" is set to poll for each single conversion,     */
254 
  /* Polling for end of conversion: differentiation if single/sequence        */
 254 
  /* management of polling depends on setting of injected group sequencer:    */
255 
  /* conversion.                                                              */
 255 
  /*  - If single conversion for injected group (scan mode disabled or        */
256 
  /* For injected group, flag JEOC is set only at the end of the sequence,    */
 256 
  /*    InjectedNbrOfConversion ==1), flag JEOC is used to determine the      */
257 
  /* not for each conversion within the sequence.                             */
 257 
  /*    conversion completion.                                                */
258 
  /* If setting "EOCSelection" is set to poll for each single conversion,     */
 258 
  /*  - If sequence conversion for injected group (scan mode enabled and      */
259 
  /* management of polling depends on setting of injected group sequencer:    */
 259 
  /*    InjectedNbrOfConversion >=2), flag JEOC is set only at the end of the */
260 
  /*  - If single conversion for injected group (scan mode disabled or        */
 260 
  /*    sequence.                                                             */
261 
  /*    InjectedNbrOfConversion ==1), flag JEOC is used to determine the      */
 261 
  /*    To poll for each conversion, the maximum conversion time is computed  */
262 
  /*    conversion completion.                                                */
 262 
  /*    from ADC conversion time (selected sampling time + conversion time of */
263 
  /*  - If sequence conversion for injected group (scan mode enabled and      */
 263 
  /*    12 ADC clock cycles) and APB2/ADC clock prescalers (depending on      */
264 
  /*    InjectedNbrOfConversion >=2), flag JEOC is set only at the end of the */
 264 
  /*    settings, conversion time range can vary from 8 to several thousands  */
265 
  /*    sequence.                                                             */
 265 
  /*    of CPU cycles).                                                       */
266 
  /*    To poll for each conversion, the maximum conversion time is computed  */
 266 
 
267 
  /*    from ADC conversion time (selected sampling time + conversion time of */
 267 
  /* Note: On STM32L1, setting "EOCSelection" is related to regular group     */
268 
  /*    12 ADC clock cycles) and APB2/ADC clock prescalers (depending on      */
 268 
  /*       only, by hardware. For compatibility with other STM32 devices,     */
269 
  /*    settings, conversion time range can vary from 8 to several thousands  */
 269 
  /*       this setting is related also to injected group by software.        */
270 
  /*    of CPU cycles).                                                       */
 270 
  if (((hadc->Instance->JSQR & ADC_JSQR_JL) == RESET)  ||
271 
 
 271 
      (hadc->Init.EOCSelection != ADC_EOC_SINGLE_CONV)   )
272 
  /* Note: On STM32L1, setting "EOCSelection" is related to regular group     */
 272 
  {
273 
  /*       only, by hardware. For compatibility with other STM32 devices,     */
 273 
    /* Wait until End of Conversion flag is raised */
274 
  /*       this setting is related also to injected group by software.        */
 274 
    while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_JEOC))
275 
  if (((hadc->Instance->JSQR & ADC_JSQR_JL) == RESET)  ||
 275 
    {
276 
      (hadc->Init.EOCSelection != ADC_EOC_SINGLE_CONV)   )
 276 
      /* Check if timeout is disabled (set to infinite wait) */
277 
  {
 277 
      if(Timeout != HAL_MAX_DELAY)
278 
    /* Wait until End of Conversion flag is raised */
 278 
      {
279 
    while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_JEOC))
 279 
        if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
280 
    {
 280 
        {
281 
      /* Check if timeout is disabled (set to infinite wait) */
 281 
          /* New check to avoid false timeout detection in case of preemption */
282 
      if(Timeout != HAL_MAX_DELAY)
 282 
          if(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_JEOC))
283 
      {
 283 
          {
284 
        if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
 284 
            /* Update ADC state machine to timeout */
285 
        {
 285 
            SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
286 
          /* New check to avoid false timeout detection in case of preemption */
 286 
 
287 
          if(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_JEOC))
 287 
            /* Process unlocked */
288 
          {
 288 
            __HAL_UNLOCK(hadc);
289 
            /* Update ADC state machine to timeout */
 289 
 
290 
            SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
 290 
            return HAL_TIMEOUT;
291 
 
 291 
          }
292 
            /* Process unlocked */
 292 
        }
293 
            __HAL_UNLOCK(hadc);
 293 
      }
294 
 
 294 
    }
295 
            return HAL_TIMEOUT;
 295 
  }
296 
          }
 296 
  else
297 
        }
 297 
  {
298 
      }
 298 
    /* Computation of CPU cycles corresponding to ADC conversion cycles.      */
299 
    }
 299 
    /* Retrieve ADC clock prescaler and ADC maximum conversion cycles on all  */
300 
  }
 300 
    /* channels.                                                              */
301 
  else
 301 
    conversion_timeout_cpu_cycles_max = ADC_GET_CLOCK_PRESCALER_DECIMAL(hadc);
302 
  {
 302 
    conversion_timeout_cpu_cycles_max *= ADC_CONVCYCLES_MAX_RANGE(hadc);
303 
    /* Computation of CPU cycles corresponding to ADC conversion cycles.      */
 303 
 
304 
    /* Retrieve ADC clock prescaler and ADC maximum conversion cycles on all  */
 304 
    /* Poll with maximum conversion time */
305 
    /* channels.                                                              */
 305 
    while(conversion_timeout_cpu_cycles < conversion_timeout_cpu_cycles_max)
306 
    conversion_timeout_cpu_cycles_max = ADC_GET_CLOCK_PRESCALER_DECIMAL(hadc);
 306 
    {
307 
    conversion_timeout_cpu_cycles_max *= ADC_CONVCYCLES_MAX_RANGE(hadc);
 307 
      /* Check if timeout is disabled (set to infinite wait) */
308 
 
 308 
      if(Timeout != HAL_MAX_DELAY)
309 
    /* Poll with maximum conversion time */
 309 
      {
310 
    while(conversion_timeout_cpu_cycles < conversion_timeout_cpu_cycles_max)
 310 
        if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
311 
    {
 311 
        {
312 
      /* Check if timeout is disabled (set to infinite wait) */
 312 
          /* New check to avoid false timeout detection in case of preemption */
313 
      if(Timeout != HAL_MAX_DELAY)
 313 
          if(conversion_timeout_cpu_cycles < conversion_timeout_cpu_cycles_max)
314 
      {
 314 
          {
315 
        if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
 315 
            /* Update ADC state machine to timeout */
316 
        {
 316 
            SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
317 
          /* New check to avoid false timeout detection in case of preemption */
 317 
 
318 
          if(conversion_timeout_cpu_cycles < conversion_timeout_cpu_cycles_max)
 318 
            /* Process unlocked */
319 
          {
 319 
            __HAL_UNLOCK(hadc);
320 
            /* Update ADC state machine to timeout */
 320 
 
321 
            SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
 321 
            return HAL_TIMEOUT;
322 
 
 322 
          }
323 
            /* Process unlocked */
 323 
        }
324 
            __HAL_UNLOCK(hadc);
 324 
      }
325 
 
 325 
      conversion_timeout_cpu_cycles ++;
326 
            return HAL_TIMEOUT;
 326 
    }
327 
          }
 327 
  }
328 
        }
 328 
 
329 
      }
 329 
  /* Clear end of conversion flag of injected group if low power feature      */
330 
      conversion_timeout_cpu_cycles ++;
 330 
  /* "Auto Wait" is disabled, to not interfere with this feature until data   */
331 
    }
 331 
  /* register is read using function HAL_ADCEx_InjectedGetValue().            */
332 
  }
 332 
  if (hadc->Init.LowPowerAutoWait == DISABLE)
333 
 
 333 
  {
334 
  /* Clear end of conversion flag of injected group if low power feature      */
 334 
    /* Clear injected group conversion flag */
335 
  /* "Auto Wait" is disabled, to not interfere with this feature until data   */
 335 
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JSTRT | ADC_FLAG_JEOC);
336 
  /* register is read using function HAL_ADCEx_InjectedGetValue().            */
 336 
  }
337 
  if (hadc->Init.LowPowerAutoWait == DISABLE)
 337 
 
338 
  {
 338 
  /* Update ADC state machine */
339 
    /* Clear injected group conversion flag */
 339 
  SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
340 
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JSTRT | ADC_FLAG_JEOC);
 340 
 
341 
  }
 341 
  /* Determine whether any further conversion upcoming on group injected      */
342 
 
 342 
  /* by external trigger, continuous mode or scan sequence on going.          */
343 
  /* Update ADC state machine */
 343 
  /* Note: On STM32L1, there is no independent flag of end of sequence.       */
344 
  SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
 344 
  /*       The test of scan sequence on going is done either with scan        */
345 
 
 345 
  /*       sequence disabled or with end of conversion flag set to            */
346 
  /* Determine whether any further conversion upcoming on group injected      */
 346 
  /*       of end of sequence.                                                */
347 
  /* by external trigger, continuous mode or scan sequence on going.          */
 347 
  if(ADC_IS_SOFTWARE_START_INJECTED(hadc)                    &&
348 
  /* Note: On STM32L1, there is no independent flag of end of sequence.       */
 348 
     (HAL_IS_BIT_CLR(hadc->Instance->JSQR, ADC_JSQR_JL)  ||
349 
  /*       The test of scan sequence on going is done either with scan        */
 349 
      HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS)    ) &&
350 
  /*       sequence disabled or with end of conversion flag set to            */
 350 
     (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) &&
351 
  /*       of end of sequence.                                                */
 351 
      (ADC_IS_SOFTWARE_START_REGULAR(hadc)       &&
352 
  if(ADC_IS_SOFTWARE_START_INJECTED(hadc)                    &&
 352 
      (hadc->Init.ContinuousConvMode == DISABLE)   )       )   )
353 
     (HAL_IS_BIT_CLR(hadc->Instance->JSQR, ADC_JSQR_JL)  ||
 353 
  {
354 
      HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS)    ) &&
 354 
    /* Set ADC state */
355 
     (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) &&
 355 
    CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
356 
      (ADC_IS_SOFTWARE_START_REGULAR(hadc)       &&
 356 
   
357 
      (hadc->Init.ContinuousConvMode == DISABLE)   )       )   )
 357 
    if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
358 
  {
 358 
    {
359 
    /* Set ADC state */
 359 
      SET_BIT(hadc->State, HAL_ADC_STATE_READY);
360 
    CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
 360 
    }
361 
   
 361 
  }
362 
    if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
 362 
 
363 
    {
 363 
  /* Return ADC state */
364 
      SET_BIT(hadc->State, HAL_ADC_STATE_READY);
 364 
  return HAL_OK;
365 
    }
 365 
}
366 
  }
 366 
 
367 
 
 367 
/**
368 
  /* Return ADC state */
 368 
  * @brief  Enables ADC, starts conversion of injected group with interruption.
369 
  return HAL_OK;
 369 
  *          - JEOC (end of conversion of injected group)
370 
}
 370 
  *         Each of these interruptions has its dedicated callback function.
371 
 
 371 
  * @param  hadc ADC handle
372 
/**
 372 
  * @retval HAL status.
373 
  * @brief  Enables ADC, starts conversion of injected group with interruption.
 373 
  */
374 
  *          - JEOC (end of conversion of injected group)
 374 
HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc)
375 
  *         Each of these interruptions has its dedicated callback function.
 375 
{
376 
  * @param  hadc ADC handle
 376 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
377 
  * @retval HAL status.
 377 
 
378 
  */
 378 
  /* Check the parameters */
379 
HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc)
 379 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
380 
{
 380 
 
381 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
 381 
  /* Process locked */
382 
 
 382 
  __HAL_LOCK(hadc);
383 
  /* Check the parameters */
 383 
   
384 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
 384 
  /* Enable the ADC peripheral */
385 
 
 385 
  tmp_hal_status = ADC_Enable(hadc);
386 
  /* Process locked */
 386 
 
387 
  __HAL_LOCK(hadc);
 387 
  /* Start conversion if ADC is effectively enabled */
388 
   
 388 
  if (tmp_hal_status == HAL_OK)
389 
  /* Enable the ADC peripheral */
 389 
  {
390 
  tmp_hal_status = ADC_Enable(hadc);
 390 
    /* Set ADC state                                                          */
391 
 
 391 
    /* - Clear state bitfield related to injected group conversion results    */
392 
  /* Start conversion if ADC is effectively enabled */
 392 
    /* - Set state bitfield related to injected operation                     */
393 
  if (tmp_hal_status == HAL_OK)
 393 
    ADC_STATE_CLR_SET(hadc->State,
394 
  {
 394 
                      HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
395 
    /* Set ADC state                                                          */
 395 
                      HAL_ADC_STATE_INJ_BUSY);
396 
    /* - Clear state bitfield related to injected group conversion results    */
 396 
   
397 
    /* - Set state bitfield related to injected operation                     */
 397 
    /* Check if a regular conversion is ongoing */
398 
    ADC_STATE_CLR_SET(hadc->State,
 398 
    /* Note: On this device, there is no ADC error code fields related to     */
399 
                      HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
 399 
    /*       conversions on group injected only. In case of conversion on     */
400 
                      HAL_ADC_STATE_INJ_BUSY);
 400 
    /*       going on group regular, no error code is reset.                  */
401 
   
 401 
    if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
402 
    /* Check if a regular conversion is ongoing */
 402 
    {
403 
    /* Note: On this device, there is no ADC error code fields related to     */
 403 
      /* Reset ADC all error code fields */
404 
    /*       conversions on group injected only. In case of conversion on     */
 404 
      ADC_CLEAR_ERRORCODE(hadc);
405 
    /*       going on group regular, no error code is reset.                  */
 405 
    }
406 
    if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
 406 
   
407 
    {
 407 
    /* Process unlocked */
408 
      /* Reset ADC all error code fields */
 408 
    /* Unlock before starting ADC conversions: in case of potential           */
409 
      ADC_CLEAR_ERRORCODE(hadc);
 409 
    /* interruption, to let the process to ADC IRQ Handler.                   */
410 
    }
 410 
    __HAL_UNLOCK(hadc);
411 
   
 411 
   
412 
    /* Process unlocked */
 412 
    /* Clear injected group conversion flag */
413 
    /* Unlock before starting ADC conversions: in case of potential           */
 413 
    /* (To ensure of no unknown state from potential previous ADC operations) */
414 
    /* interruption, to let the process to ADC IRQ Handler.                   */
 414 
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
415 
    __HAL_UNLOCK(hadc);
 415 
   
416 
   
 416 
    /* Enable end of conversion interrupt for injected channels */
417 
    /* Clear injected group conversion flag */
 417 
    __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC);
418 
    /* (To ensure of no unknown state from potential previous ADC operations) */
 418 
   
419 
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
 419 
    /* Enable conversion of injected group.                                   */
420 
   
 420 
    /* If software start has been selected, conversion starts immediately.    */
421 
    /* Enable end of conversion interrupt for injected channels */
 421 
    /* If external trigger has been selected, conversion will start at next   */
422 
    __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC);
 422 
    /* trigger event.                                                         */
423 
   
 423 
    /* If automatic injected conversion is enabled, conversion will start     */
424 
    /* Enable conversion of injected group.                                   */
 424 
    /* after next regular group conversion.                                   */
425 
    /* If software start has been selected, conversion starts immediately.    */
 425 
    if (ADC_IS_SOFTWARE_START_INJECTED(hadc)              &&
426 
    /* If external trigger has been selected, conversion will start at next   */
 426 
        HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO)  )
427 
    /* trigger event.                                                         */
 427 
    {
428 
    /* If automatic injected conversion is enabled, conversion will start     */
 428 
      /* Enable ADC software conversion for injected channels */
429 
    /* after next regular group conversion.                                   */
 429 
      SET_BIT(hadc->Instance->CR2, ADC_CR2_JSWSTART);
430 
    if (ADC_IS_SOFTWARE_START_INJECTED(hadc)              &&
 430 
    }
431 
        HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO)  )
 431 
  }
432 
    {
 432 
 
433 
      /* Enable ADC software conversion for injected channels */
 433 
  /* Return function status */
434 
      SET_BIT(hadc->Instance->CR2, ADC_CR2_JSWSTART);
 434 
  return tmp_hal_status;
435 
    }
 435 
}
436 
  }
 436 
 
437 
 
 437 
/**
438 
  /* Return function status */
 438 
  * @brief  Stop conversion of injected channels, disable interruption of
439 
  return tmp_hal_status;
 439 
  *         end-of-conversion. Disable ADC peripheral if no regular conversion
440 
}
 440 
  *         is on going.
441 
 
 441 
  * @note   If ADC must be disabled and if conversion is on going on
442 
/**
 442 
  *         regular group, function HAL_ADC_Stop must be used to stop both
443 
  * @brief  Stop conversion of injected channels, disable interruption of
 443 
  *         injected and regular groups, and disable the ADC.
444 
  *         end-of-conversion. Disable ADC peripheral if no regular conversion
 444 
  * @note   If injected group mode auto-injection is enabled,
445 
  *         is on going.
 445 
  *         function HAL_ADC_Stop must be used.
446 
  * @note   If ADC must be disabled and if conversion is on going on
 446 
  * @param  hadc ADC handle
447 
  *         regular group, function HAL_ADC_Stop must be used to stop both
 447 
  * @retval None
448 
  *         injected and regular groups, and disable the ADC.
 448 
  */
449 
  * @note   If injected group mode auto-injection is enabled,
 449 
HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
450 
  *         function HAL_ADC_Stop must be used.
 450 
{
451 
  * @param  hadc ADC handle
 451 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
452 
  * @retval None
 452 
 
453 
  */
 453 
  /* Check the parameters */
454 
HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
 454 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
455 
{
 455 
 
456 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
 456 
  /* Process locked */
457 
 
 457 
  __HAL_LOCK(hadc);
458 
  /* Check the parameters */
 458 
   
459 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
 459 
  /* Stop potential conversion and disable ADC peripheral                     */
460 
 
 460 
  /* Conditioned to:                                                          */
461 
  /* Process locked */
 461 
  /* - No conversion on the other group (regular group) is intended to        */
462 
  __HAL_LOCK(hadc);
 462 
  /*   continue (injected and regular groups stop conversion and ADC disable  */
463 
   
 463 
  /*   are common)                                                            */
464 
  /* Stop potential conversion and disable ADC peripheral                     */
 464 
  /* - In case of auto-injection mode, HAL_ADC_Stop must be used.             */
465 
  /* Conditioned to:                                                          */
 465 
  if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET)  &&
466 
  /* - No conversion on the other group (regular group) is intended to        */
 466 
     HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO)   )
467 
  /*   continue (injected and regular groups stop conversion and ADC disable  */
 467 
  {
468 
  /*   are common)                                                            */
 468 
    /* Stop potential conversion on going, on regular and injected groups */
469 
  /* - In case of auto-injection mode, HAL_ADC_Stop must be used.             */
 469 
    /* Disable ADC peripheral */
470 
  if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET)  &&
 470 
    tmp_hal_status = ADC_ConversionStop_Disable(hadc);
471 
     HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO)   )
 471 
   
472 
  {
 472 
    /* Check if ADC is effectively disabled */
473 
    /* Stop potential conversion on going, on regular and injected groups */
 473 
    if (tmp_hal_status == HAL_OK)
474 
    /* Disable ADC peripheral */
 474 
    {
475 
    tmp_hal_status = ADC_ConversionStop_Disable(hadc);
 475 
      /* Disable ADC end of conversion interrupt for injected channels */
476 
   
 476 
      __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
477 
    /* Check if ADC is effectively disabled */
 477 
     
478 
    if (tmp_hal_status == HAL_OK)
 478 
      /* Set ADC state */
479 
    {
 479 
      ADC_STATE_CLR_SET(hadc->State,
480 
      /* Disable ADC end of conversion interrupt for injected channels */
 480 
                        HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
481 
      __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
 481 
                        HAL_ADC_STATE_READY);
482 
     
 482 
    }
483 
      /* Set ADC state */
 483 
  }
484 
      ADC_STATE_CLR_SET(hadc->State,
 484 
  else
485 
                        HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
 485 
  {
486 
                        HAL_ADC_STATE_READY);
 486 
    /* Update ADC state machine to error */
487 
    }
 487 
    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
488 
  }
 488 
     
489 
  else
 489 
    tmp_hal_status = HAL_ERROR;
490 
  {
 490 
  }
491 
    /* Update ADC state machine to error */
 491 
 
492 
    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
 492 
  /* Process unlocked */
493 
     
 493 
  __HAL_UNLOCK(hadc);
494 
    tmp_hal_status = HAL_ERROR;
 494 
 
495 
  }
 495 
  /* Return function status */
496 
 
 496 
  return tmp_hal_status;
497 
  /* Process unlocked */
 497 
}
498 
  __HAL_UNLOCK(hadc);
 498 
 
499 
 
 499 
/**
500 
  /* Return function status */
 500 
  * @brief  Get ADC injected group conversion result.
501 
  return tmp_hal_status;
 501 
  * @note   Reading register JDRx automatically clears ADC flag JEOC
502 
}
 502 
  *         (ADC group injected end of unitary conversion).
503 
 
 503 
  * @note   This function does not clear ADC flag JEOS
504 
/**
 504 
  *         (ADC group injected end of sequence conversion)
505 
  * @brief  Get ADC injected group conversion result.
 505 
  *         Occurrence of flag JEOS rising:
506 
  * @note   Reading register JDRx automatically clears ADC flag JEOC
 506 
  *          - If sequencer is composed of 1 rank, flag JEOS is equivalent
507 
  *         (ADC group injected end of unitary conversion).
 507 
  *            to flag JEOC.
508 
  * @note   This function does not clear ADC flag JEOS
 508 
  *          - If sequencer is composed of several ranks, during the scan
509 
  *         (ADC group injected end of sequence conversion)
 509 
  *            sequence flag JEOC only is raised, at the end of the scan sequence
510 
  *         Occurrence of flag JEOS rising:
 510 
  *            both flags JEOC and EOS are raised.
511 
  *          - If sequencer is composed of 1 rank, flag JEOS is equivalent
 511 
  *         Flag JEOS must not be cleared by this function because
512 
  *            to flag JEOC.
 512 
  *         it would not be compliant with low power features
513 
  *          - If sequencer is composed of several ranks, during the scan
 513 
  *         (feature low power auto-wait, not available on all STM32 families).
514 
  *            sequence flag JEOC only is raised, at the end of the scan sequence
 514 
  *         To clear this flag, either use function:
515 
  *            both flags JEOC and EOS are raised.
 515 
  *         in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
516 
  *         Flag JEOS must not be cleared by this function because
 516 
  *         model polling: @ref HAL_ADCEx_InjectedPollForConversion()
517 
  *         it would not be compliant with low power features
 517 
  *         or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_JEOS).
518 
  *         (feature low power auto-wait, not available on all STM32 families).
 518 
  * @param  hadc ADC handle
519 
  *         To clear this flag, either use function:
 519 
  * @param  InjectedRank the converted ADC injected rank.
520 
  *         in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
 520 
  *          This parameter can be one of the following values:
521 
  *         model polling: @ref HAL_ADCEx_InjectedPollForConversion()
 521 
  *            @arg ADC_INJECTED_RANK_1: Injected Channel1 selected
522 
  *         or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_JEOS).
 522 
  *            @arg ADC_INJECTED_RANK_2: Injected Channel2 selected
523 
  * @param  hadc ADC handle
 523 
  *            @arg ADC_INJECTED_RANK_3: Injected Channel3 selected
524 
  * @param  InjectedRank the converted ADC injected rank.
 524 
  *            @arg ADC_INJECTED_RANK_4: Injected Channel4 selected
525 
  *          This parameter can be one of the following values:
 525 
  * @retval ADC group injected conversion data
526 
  *            @arg ADC_INJECTED_RANK_1: Injected Channel1 selected
 526 
  */
527 
  *            @arg ADC_INJECTED_RANK_2: Injected Channel2 selected
 527 
uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank)
528 
  *            @arg ADC_INJECTED_RANK_3: Injected Channel3 selected
 528 
{
529 
  *            @arg ADC_INJECTED_RANK_4: Injected Channel4 selected
 529 
  uint32_t tmp_jdr = 0;
530 
  * @retval ADC group injected conversion data
 530 
 
531 
  */
 531 
  /* Check the parameters */
532 
uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank)
 532 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
533 
{
 533 
  assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
534 
  uint32_t tmp_jdr = 0;
 534 
 
535 
 
 535 
  /* Get ADC converted value */
536 
  /* Check the parameters */
 536 
  switch(InjectedRank)
537 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
 537 
  {  
538 
  assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
 538 
    case ADC_INJECTED_RANK_4:
539 
 
 539 
      tmp_jdr = hadc->Instance->JDR4;
540 
  /* Get ADC converted value */
 540 
      break;
541 
  switch(InjectedRank)
 541 
    case ADC_INJECTED_RANK_3:
542 
  {  
 542 
      tmp_jdr = hadc->Instance->JDR3;
543 
    case ADC_INJECTED_RANK_4:
 543 
      break;
544 
      tmp_jdr = hadc->Instance->JDR4;
 544 
    case ADC_INJECTED_RANK_2:
545 
      break;
 545 
      tmp_jdr = hadc->Instance->JDR2;
546 
    case ADC_INJECTED_RANK_3:
 546 
      break;
547 
      tmp_jdr = hadc->Instance->JDR3;
 547 
    case ADC_INJECTED_RANK_1:
548 
      break;
 548 
    default:
549 
    case ADC_INJECTED_RANK_2:
 549 
      tmp_jdr = hadc->Instance->JDR1;
550 
      tmp_jdr = hadc->Instance->JDR2;
 550 
      break;
551 
      break;
 551 
  }
552 
    case ADC_INJECTED_RANK_1:
 552 
 
553 
    default:
 553 
  /* Return ADC converted value */
554 
      tmp_jdr = hadc->Instance->JDR1;
 554 
  return tmp_jdr;
555 
      break;
 555 
}
556 
  }
 556 
 
557 
 
 557 
/**
558 
  /* Return ADC converted value */
 558 
  * @brief  Injected conversion complete callback in non blocking mode
559 
  return tmp_jdr;
 559 
  * @param  hadc ADC handle
560 
}
 560 
  * @retval None
561 
 
 561 
  */
562 
/**
 562 
__weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
563 
  * @brief  Injected conversion complete callback in non blocking mode
 563 
{
564 
  * @param  hadc ADC handle
 564 
  /* Prevent unused argument(s) compilation warning */
565 
  * @retval None
 565 
  UNUSED(hadc);
566 
  */
 566 
 
567 
__weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
 567 
  /* NOTE : This function Should not be modified, when the callback is needed,
568 
{
 568 
            the HAL_ADCEx_InjectedConvCpltCallback could be implemented in the user file
569 
  /* Prevent unused argument(s) compilation warning */
 569 
  */
570 
  UNUSED(hadc);
 570 
}
571 
 
 571 
 
572 
  /* NOTE : This function Should not be modified, when the callback is needed,
 572 
/**
573 
            the HAL_ADCEx_InjectedConvCpltCallback could be implemented in the user file
 573 
  * @}
574 
  */
 574 
  */
575 
}
 575 
 
576 
 
 576 
/** @defgroup ADCEx_Exported_Functions_Group2 ADC Extended Peripheral Control functions
577 
/**
 577 
  * @brief    ADC Extended Peripheral Control functions
578 
  * @}
 578 
  *
579 
  */
 579 
@verbatim  
580 
 
 580 
 ===============================================================================
581 
/** @defgroup ADCEx_Exported_Functions_Group2 ADC Extended Peripheral Control functions
 581 
             ##### Peripheral Control functions #####
582 
  * @brief    ADC Extended Peripheral Control functions
 582 
 ===============================================================================  
583 
  *
 583 
    [..]  This section provides functions allowing to:
584 
@verbatim  
 584 
      (+) Configure channels on injected group
585 
 ===============================================================================
 585 
     
586 
             ##### Peripheral Control functions #####
 586 
@endverbatim
587 
 ===============================================================================  
 587 
  * @{
588 
    [..]  This section provides functions allowing to:
 588 
  */
589 
      (+) Configure channels on injected group
 589 
 
590 
     
 590 
/**
591 
@endverbatim
 591 
  * @brief  Configures the ADC injected group and the selected channel to be
592 
  * @{
 592 
  *         linked to the injected group.
593 
  */
 593 
  * @note   Possibility to update parameters on the fly:
594 
 
 594 
  *         This function initializes injected group, following calls to this
595 
/**
 595 
  *         function can be used to reconfigure some parameters of structure
596 
  * @brief  Configures the ADC injected group and the selected channel to be
 596 
  *         "ADC_InjectionConfTypeDef" on the fly, without resetting the ADC.
597 
  *         linked to the injected group.
 597 
  *         The setting of these parameters is conditioned to ADC state:
598 
  * @note   Possibility to update parameters on the fly:
 598 
  *         this function must be called when ADC is not under conversion.
599 
  *         This function initializes injected group, following calls to this
 599 
  * @param  hadc ADC handle
600 
  *         function can be used to reconfigure some parameters of structure
 600 
  * @param  sConfigInjected Structure of ADC injected group and ADC channel for
601 
  *         "ADC_InjectionConfTypeDef" on the fly, without reseting the ADC.
 601 
  *         injected group.
602 
  *         The setting of these parameters is conditioned to ADC state:
 602 
  * @retval None
603 
  *         this function must be called when ADC is not under conversion.
 603 
  */
604 
  * @param  hadc ADC handle
 604 
HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected)
605 
  * @param  sConfigInjected Structure of ADC injected group and ADC channel for
 605 
{  
606 
  *         injected group.
 606 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
607 
  * @retval None
 607 
  __IO uint32_t wait_loop_index = 0;
608 
  */
 608 
 
609 
HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected)
 609 
  /* Check the parameters */
610 
{  
 610 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
611 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
 611 
  assert_param(IS_ADC_CHANNEL(sConfigInjected->InjectedChannel));
612 
  __IO uint32_t wait_loop_index = 0;
 612 
  assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
613 
 
 613 
  assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
614 
  /* Check the parameters */
 614 
  assert_param(IS_ADC_EXTTRIGINJEC(sConfigInjected->ExternalTrigInjecConv));
615 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
 615 
  assert_param(IS_ADC_RANGE(ADC_RESOLUTION_12B, sConfigInjected->InjectedOffset));
616 
  assert_param(IS_ADC_CHANNEL(sConfigInjected->InjectedChannel));
 616 
 
617 
  assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
 617 
  if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
618 
  assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
 618 
  {
619 
  assert_param(IS_ADC_EXTTRIGINJEC(sConfigInjected->ExternalTrigInjecConv));
 619 
    assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
620 
  assert_param(IS_ADC_RANGE(ADC_RESOLUTION_12B, sConfigInjected->InjectedOffset));
 620 
    assert_param(IS_ADC_INJECTED_NB_CONV(sConfigInjected->InjectedNbrOfConversion));
621 
 
 621 
    assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
622 
  if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
 622 
  }
623 
  {
 623 
 
624 
    assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
 624 
  if(sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
625 
    assert_param(IS_ADC_INJECTED_NB_CONV(sConfigInjected->InjectedNbrOfConversion));
 625 
  {
626 
    assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
 626 
    assert_param(IS_ADC_EXTTRIGINJEC_EDGE(sConfigInjected->ExternalTrigInjecConvEdge));
627 
  }
 627 
  }
628 
 
 628 
 
629 
  if(sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
 629 
  /* Process locked */
630 
  {
 630 
  __HAL_LOCK(hadc);
631 
    assert_param(IS_ADC_EXTTRIGINJEC_EDGE(sConfigInjected->ExternalTrigInjecConvEdge));
 631 
 
632 
  }
 632 
  /* Configuration of injected group sequencer:                               */
633 
 
 633 
  /* - if scan mode is disabled, injected channels sequence length is set to  */
634 
  /* Process locked */
 634 
  /*   0x00: 1 channel converted (channel on regular rank 1)                  */
635 
  __HAL_LOCK(hadc);
 635 
  /*   Parameter "InjectedNbrOfConversion" is discarded.                      */
636 
 
 636 
  /*   Note: Scan mode is present by hardware on this device and, if          */
637 
  /* Configuration of injected group sequencer:                               */
 637 
  /*   disabled, discards automatically nb of conversions. Anyway, nb of      */
638 
  /* - if scan mode is disabled, injected channels sequence length is set to  */
 638 
  /*   conversions is forced to 0x00 for alignment over all STM32 devices.    */
639 
  /*   0x00: 1 channel converted (channel on regular rank 1)                  */
 639 
  /* - if scan mode is enabled, injected channels sequence length is set to   */
640 
  /*   Parameter "InjectedNbrOfConversion" is discarded.                      */
 640 
  /*   parameter ""InjectedNbrOfConversion".                                  */
641 
  /*   Note: Scan mode is present by hardware on this device and, if          */
 641 
  if (hadc->Init.ScanConvMode == ADC_SCAN_DISABLE)
642 
  /*   disabled, discards automatically nb of conversions. Anyway, nb of      */
 642 
  {
643 
  /*   conversions is forced to 0x00 for alignment over all STM32 devices.    */
 643 
    if (sConfigInjected->InjectedRank == ADC_INJECTED_RANK_1)
644 
  /* - if scan mode is enabled, injected channels sequence length is set to   */
 644 
    {
645 
  /*   parameter ""InjectedNbrOfConversion".                                  */
 645 
      /* Clear the old SQx bits for all injected ranks */
646 
  if (hadc->Init.ScanConvMode == ADC_SCAN_DISABLE)
 646 
        MODIFY_REG(hadc->Instance->JSQR                              ,
647 
  {
 647 
                   ADC_JSQR_JL   |
648 
    if (sConfigInjected->InjectedRank == ADC_INJECTED_RANK_1)
 648 
                   ADC_JSQR_JSQ4 |
649 
    {
 649 
                   ADC_JSQR_JSQ3 |
650 
      /* Clear the old SQx bits for all injected ranks */
 650 
                   ADC_JSQR_JSQ2 |
651 
        MODIFY_REG(hadc->Instance->JSQR                              ,
 651 
                   ADC_JSQR_JSQ1                                     ,
652 
                   ADC_JSQR_JL   |
 652 
                   ADC_JSQR_RK_JL(sConfigInjected->InjectedChannel,
653 
                   ADC_JSQR_JSQ4 |
 653 
                                    ADC_INJECTED_RANK_1,
654 
                   ADC_JSQR_JSQ3 |
 654 
                                    0x01)                             );
655 
                   ADC_JSQR_JSQ2 |
 655 
    }
656 
                   ADC_JSQR_JSQ1                                     ,
 656 
    /* If another injected rank than rank1 was intended to be set, and could  */
657 
                   ADC_JSQR_RK_JL(sConfigInjected->InjectedChannel,
 657 
    /* not due to ScanConvMode disabled, error is reported.                   */
658 
                                    ADC_INJECTED_RANK_1,
 658 
    else
659 
                                    0x01)                             );
 659 
    {
660 
    }
 660 
      /* Update ADC state machine to error */
661 
    /* If another injected rank than rank1 was intended to be set, and could  */
 661 
      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
662 
    /* not due to ScanConvMode disabled, error is reported.                   */
 662 
       
663 
    else
 663 
      tmp_hal_status = HAL_ERROR;
664 
    {
 664 
    }
665 
      /* Update ADC state machine to error */
 665 
  }
666 
      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
 666 
  else
667 
       
 667 
  {  
668 
      tmp_hal_status = HAL_ERROR;
 668 
    /* Since injected channels rank conv. order depends on total number of   */
669 
    }
 669 
    /* injected conversions, selected rank must be below or equal to total   */
670 
  }
 670 
    /* number of injected conversions to be updated.                         */
671 
  else
 671 
    if (sConfigInjected->InjectedRank <= sConfigInjected->InjectedNbrOfConversion)
672 
  {  
 672 
    {
673 
    /* Since injected channels rank conv. order depends on total number of   */
 673 
      /* Clear the old SQx bits for the selected rank */
674 
    /* injected conversions, selected rank must be below or equal to total   */
 674 
      /* Set the SQx bits for the selected rank */
675 
    /* number of injected conversions to be updated.                         */
 675 
      MODIFY_REG(hadc->Instance->JSQR                                                     ,
676 
    if (sConfigInjected->InjectedRank <= sConfigInjected->InjectedNbrOfConversion)
 676 
                 
677 
    {
 677 
                 ADC_JSQR_JL                                               |
678 
      /* Clear the old SQx bits for the selected rank */
 678 
                 ADC_JSQR_RK_JL(ADC_JSQR_JSQ1,                        
679 
      /* Set the SQx bits for the selected rank */
 679 
                                  sConfigInjected->InjectedRank,        
680 
      MODIFY_REG(hadc->Instance->JSQR                                                     ,
 680 
                                  sConfigInjected->InjectedNbrOfConversion)               ,
681 
                 
 681 
                 
682 
                 ADC_JSQR_JL                                               |
 682 
                 ADC_JSQR_JL_SHIFT(sConfigInjected->InjectedNbrOfConversion)             |
683 
                 ADC_JSQR_RK_JL(ADC_JSQR_JSQ1,                        
 683 
                 ADC_JSQR_RK_JL(sConfigInjected->InjectedChannel,      
684 
                                  sConfigInjected->InjectedRank,        
 684 
                                                sConfigInjected->InjectedRank,        
685 
                                  sConfigInjected->InjectedNbrOfConversion)               ,
 685 
                                                sConfigInjected->InjectedNbrOfConversion)  );
686 
                 
 686 
    }
687 
                 ADC_JSQR_JL_SHIFT(sConfigInjected->InjectedNbrOfConversion)             |
 687 
    else
688 
                 ADC_JSQR_RK_JL(sConfigInjected->InjectedChannel,      
 688 
    {
689 
                                                sConfigInjected->InjectedRank,        
 689 
      /* Clear the old SQx bits for the selected rank */
690 
                                                sConfigInjected->InjectedNbrOfConversion)  );
 690 
      MODIFY_REG(hadc->Instance->JSQR                                       ,
691 
    }
 691 
                 
692 
    else
 692 
                 ADC_JSQR_JL                                               |
693 
    {
 693 
                 ADC_JSQR_RK_JL(ADC_JSQR_JSQ1,                        
694 
      /* Clear the old SQx bits for the selected rank */
 694 
                                  sConfigInjected->InjectedRank,        
695 
      MODIFY_REG(hadc->Instance->JSQR                                       ,
 695 
                                  sConfigInjected->InjectedNbrOfConversion) ,
696 
                 
 696 
                 
697 
                 ADC_JSQR_JL                                               |
 697 
                 0x00000000                                                  );
698 
                 ADC_JSQR_RK_JL(ADC_JSQR_JSQ1,                        
 698 
    }
699 
                                  sConfigInjected->InjectedRank,        
 699 
  }
700 
                                  sConfigInjected->InjectedNbrOfConversion) ,
 700 
   
701 
                 
 701 
  /* Enable external trigger if trigger selection is different of software    */
702 
                 0x00000000                                                  );
 702 
  /* start.                                                                   */
703 
    }
 703 
  /* Note: This configuration keeps the hardware feature of parameter         */
704 
  }
 704 
  /*       ExternalTrigConvEdge "trigger edge none" equivalent to             */
705 
   
 705 
  /*       software start.                                                    */
706 
  /* Enable external trigger if trigger selection is different of software    */
 706 
 
707 
  /* start.                                                                   */
 707 
  if (sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
708 
  /* Note: This configuration keeps the hardware feature of parameter         */
 708 
  {    
709 
  /*       ExternalTrigConvEdge "trigger edge none" equivalent to             */
 709 
    MODIFY_REG(hadc->Instance->CR2                        ,
710 
  /*       software start.                                                    */
 710 
               ADC_CR2_JEXTEN  |
711 
 
 711 
               ADC_CR2_JEXTSEL                            ,
712 
  if (sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
 712 
               sConfigInjected->ExternalTrigInjecConv    |
713 
  {    
 713 
               sConfigInjected->ExternalTrigInjecConvEdge  );
714 
    MODIFY_REG(hadc->Instance->CR2                        ,
 714 
  }
715 
               ADC_CR2_JEXTEN  |
 715 
  else
716 
               ADC_CR2_JEXTSEL                            ,
 716 
  {
717 
               sConfigInjected->ExternalTrigInjecConv    |
 717 
    MODIFY_REG(hadc->Instance->CR2,
718 
               sConfigInjected->ExternalTrigInjecConvEdge  );
 718 
               ADC_CR2_JEXTEN  |
719 
  }
 719 
               ADC_CR2_JEXTSEL    ,
720 
  else
 720 
               0x00000000          );
721 
  {
 721 
  }
722 
    MODIFY_REG(hadc->Instance->CR2,
 722 
 
723 
               ADC_CR2_JEXTEN  |
 723 
  /* Configuration of injected group                                          */
724 
               ADC_CR2_JEXTSEL    ,
 724 
  /* Parameters update conditioned to ADC state:                              */
725 
               0x00000000          );
 725 
  /* Parameters that can be updated only when ADC is disabled:                */
726 
  }
 726 
  /*  - Automatic injected conversion                                         */
727 
 
 727 
  /*  - Injected discontinuous mode                                           */
728 
  /* Configuration of injected group                                          */
 728 
  if ((ADC_IS_ENABLE(hadc) == RESET))
729 
  /* Parameters update conditioned to ADC state:                              */
 729 
  {
730 
  /* Parameters that can be updated only when ADC is disabled:                */
 730 
    hadc->Instance->CR1 &= ~(ADC_CR1_JAUTO   |
731 
  /*  - Automatic injected conversion                                         */
 731 
                             ADC_CR1_JDISCEN  );
732 
  /*  - Injected discontinuous mode                                           */
 732 
   
733 
  if ((ADC_IS_ENABLE(hadc) == RESET))
 733 
    /* Automatic injected conversion can be enabled if injected group         */
734 
  {
 734 
    /* external triggers are disabled.                                        */
735 
    hadc->Instance->CR1 &= ~(ADC_CR1_JAUTO   |
 735 
    if (sConfigInjected->AutoInjectedConv == ENABLE)
736 
                             ADC_CR1_JDISCEN  );
 736 
    {
737 
   
 737 
      if (sConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START)
738 
    /* Automatic injected conversion can be enabled if injected group         */
 738 
      {
739 
    /* external triggers are disabled.                                        */
 739 
        SET_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO);
740 
    if (sConfigInjected->AutoInjectedConv == ENABLE)
 740 
      }
741 
    {
 741 
      else
742 
      if (sConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START)
 742 
      {
743 
      {
 743 
        /* Update ADC state machine to error */
744 
        SET_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO);
 744 
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
745 
      }
 745 
       
746 
      else
 746 
        tmp_hal_status = HAL_ERROR;
747 
      {
 747 
      }
748 
        /* Update ADC state machine to error */
 748 
    }
749 
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
 749 
   
750 
       
 750 
    /* Injected discontinuous can be enabled only if auto-injected mode is    */
751 
        tmp_hal_status = HAL_ERROR;
 751 
    /* disabled.                                                              */  
752 
      }
 752 
    if (sConfigInjected->InjectedDiscontinuousConvMode == ENABLE)
753 
    }
 753 
    {
754 
   
 754 
      if (sConfigInjected->AutoInjectedConv == DISABLE)
755 
    /* Injected discontinuous can be enabled only if auto-injected mode is    */
 755 
      {
756 
    /* disabled.                                                              */  
 756 
        SET_BIT(hadc->Instance->CR1, ADC_CR1_JDISCEN);
757 
    if (sConfigInjected->InjectedDiscontinuousConvMode == ENABLE)
 757 
      }
758 
    {
 758 
      else
759 
      if (sConfigInjected->AutoInjectedConv == DISABLE)
 759 
      {
760 
      {
 760 
        /* Update ADC state machine to error */
761 
        SET_BIT(hadc->Instance->CR1, ADC_CR1_JDISCEN);
 761 
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
762 
      }
 762 
       
763 
      else
 763 
        tmp_hal_status = HAL_ERROR;
764 
      {
 764 
      }
765 
        /* Update ADC state machine to error */
 765 
    }
766 
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
 766 
  }
767 
       
 767 
 
768 
        tmp_hal_status = HAL_ERROR;
 768 
  /* Channel sampling time configuration */
769 
      }
 769 
  /* For InjectedChannels 0 to 9 */
770 
    }
 770 
  if (sConfigInjected->InjectedChannel < ADC_CHANNEL_10)
771 
  }
 771 
  {
772 
 
 772 
    MODIFY_REG(hadc->Instance->SMPR3,
773 
  /* Channel sampling time configuration */
 773 
               ADC_SMPR3(ADC_SMPR3_SMP0, sConfigInjected->InjectedChannel),
774 
  /* For InjectedChannels 0 to 9 */
 774 
               ADC_SMPR3(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
775 
  if (sConfigInjected->InjectedChannel < ADC_CHANNEL_10)
 775 
  }
776 
  {
 776 
  /* For InjectedChannels 10 to 19 */
777 
    MODIFY_REG(hadc->Instance->SMPR3,
 777 
  else if (sConfigInjected->InjectedChannel < ADC_CHANNEL_20)
778 
               ADC_SMPR3(ADC_SMPR3_SMP0, sConfigInjected->InjectedChannel),
 778 
  {
779 
               ADC_SMPR3(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
 779 
    MODIFY_REG(hadc->Instance->SMPR2,
780 
  }
 780 
               ADC_SMPR2(ADC_SMPR2_SMP10, sConfigInjected->InjectedChannel),
781 
  /* For InjectedChannels 10 to 19 */
 781 
               ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
782 
  else if (sConfigInjected->InjectedChannel < ADC_CHANNEL_20)
 782 
  }
783 
  {
 783 
  /* For InjectedChannels 20 to 26 for devices Cat.1, Cat.2, Cat.3 */
784 
    MODIFY_REG(hadc->Instance->SMPR2,
 784 
  /* For InjectedChannels 20 to 29 for devices Cat4, Cat.5 */
785 
               ADC_SMPR2(ADC_SMPR2_SMP10, sConfigInjected->InjectedChannel),
 785 
  else if (sConfigInjected->InjectedChannel <= ADC_SMPR1_CHANNEL_MAX)
786 
               ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
 786 
  {  
787 
  }
 787 
    MODIFY_REG(hadc->Instance->SMPR1,
788 
  /* For InjectedChannels 20 to 26 for devices Cat.1, Cat.2, Cat.3 */
 788 
               ADC_SMPR1(ADC_SMPR1_SMP20, sConfigInjected->InjectedChannel),
789 
  /* For InjectedChannels 20 to 29 for devices Cat4, Cat.5 */
 789 
               ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
790 
  else if (sConfigInjected->InjectedChannel <= ADC_SMPR1_CHANNEL_MAX)
 790 
  }
791 
  {  
 791 
  /* For InjectedChannels 30 to 31 for devices Cat4, Cat.5 */
792 
    MODIFY_REG(hadc->Instance->SMPR1,
 792 
  else
793 
               ADC_SMPR1(ADC_SMPR1_SMP20, sConfigInjected->InjectedChannel),
 793 
  {
794 
               ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
 794 
    ADC_SMPR0_CHANNEL_SET(hadc, sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
795 
  }
 795 
  }
796 
  /* For InjectedChannels 30 to 31 for devices Cat4, Cat.5 */
 796 
 
797 
  else
 797 
 
798 
  {
 798 
  /* Configure the offset: offset enable/disable, InjectedChannel, offset value */
799 
    ADC_SMPR0_CHANNEL_SET(hadc, sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
 799 
  switch(sConfigInjected->InjectedRank)
800 
  }
 800 
  {
801 
 
 801 
    case 1:
802 
 
 802 
      /* Set injected channel 1 offset */
803 
  /* Configure the offset: offset enable/disable, InjectedChannel, offset value */
 803 
      MODIFY_REG(hadc->Instance->JOFR1,
804 
  switch(sConfigInjected->InjectedRank)
 804 
                 ADC_JOFR1_JOFFSET1,
805 
  {
 805 
                 sConfigInjected->InjectedOffset);
806 
    case 1:
 806 
      break;
807 
      /* Set injected channel 1 offset */
 807 
    case 2:
808 
      MODIFY_REG(hadc->Instance->JOFR1,
 808 
      /* Set injected channel 2 offset */
809 
                 ADC_JOFR1_JOFFSET1,
 809 
      MODIFY_REG(hadc->Instance->JOFR2,
810 
                 sConfigInjected->InjectedOffset);
 810 
                 ADC_JOFR2_JOFFSET2,
811 
      break;
 811 
                 sConfigInjected->InjectedOffset);
812 
    case 2:
 812 
      break;
813 
      /* Set injected channel 2 offset */
 813 
    case 3:
814 
      MODIFY_REG(hadc->Instance->JOFR2,
 814 
      /* Set injected channel 3 offset */
815 
                 ADC_JOFR2_JOFFSET2,
 815 
      MODIFY_REG(hadc->Instance->JOFR3,
816 
                 sConfigInjected->InjectedOffset);
 816 
                 ADC_JOFR3_JOFFSET3,
817 
      break;
 817 
                 sConfigInjected->InjectedOffset);
818 
    case 3:
 818 
      break;
819 
      /* Set injected channel 3 offset */
 819 
    case 4:
820 
      MODIFY_REG(hadc->Instance->JOFR3,
 820 
    default:
821 
                 ADC_JOFR3_JOFFSET3,
 821 
      MODIFY_REG(hadc->Instance->JOFR4,
822 
                 sConfigInjected->InjectedOffset);
 822 
                 ADC_JOFR4_JOFFSET4,
823 
      break;
 823 
                 sConfigInjected->InjectedOffset);
824 
    case 4:
 824 
      break;
825 
    default:
 825 
  }
826 
      MODIFY_REG(hadc->Instance->JOFR4,
 826 
 
827 
                 ADC_JOFR4_JOFFSET4,
 827 
  /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor  */
828 
                 sConfigInjected->InjectedOffset);
 828 
  /* and VREFINT measurement path.                                            */
829 
      break;
 829 
  if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) ||
830 
  }
 830 
      (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT)      )
831 
 
 831 
  {
832 
  /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor  */
 832 
    SET_BIT(ADC->CCR, ADC_CCR_TSVREFE);
833 
  /* and VREFINT measurement path.                                            */
 833 
   
834 
  if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) ||
 834 
    if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR))
835 
      (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT)      )
 835 
    {
836 
  {
 836 
      /* Delay for temperature sensor stabilization time */
837 
    SET_BIT(ADC->CCR, ADC_CCR_TSVREFE);
 837 
      /* Compute number of CPU cycles to wait for */
838 
   
 838 
      wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000));
839 
    if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR))
 839 
      while(wait_loop_index != 0)
840 
    {
 840 
      {
841 
      /* Delay for temperature sensor stabilization time */
 841 
        wait_loop_index--;
842 
      /* Compute number of CPU cycles to wait for */
 842 
      }
843 
      wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000));
 843 
    }
844 
      while(wait_loop_index != 0)
 844 
  }
845 
      {
 845 
 
846 
        wait_loop_index--;
 846 
  /* Process unlocked */
847 
      }
 847 
  __HAL_UNLOCK(hadc);
848 
    }
 848 
 
849 
  }
 849 
  /* Return function status */
850 
 
 850 
  return tmp_hal_status;
851 
  /* Process unlocked */
 851 
}
852 
  __HAL_UNLOCK(hadc);
 852 
 
853 
 
 853 
/**
854 
  /* Return function status */
 854 
  * @}
855 
  return tmp_hal_status;
 855 
  */  
856 
}
 856 
 
857 
 
 857 
/**
858 
/**
 858 
  * @}
859 
  * @}
 859 
  */
860 
  */  
 860 
 
861 
 
 861 
#endif /* HAL_ADC_MODULE_ENABLED */
862 
/**
 862 
/**
863 
  * @}
 863 
  * @}
864 
  */
 864 
  */
865 
 
 865 
 
866 
#endif /* HAL_ADC_MODULE_ENABLED */
 866 
/**
867 
/**
 867 
  * @}
868 
  * @}
 868 
  */
869 
  */
 - 
 
870 
 
 - 
 
871 
/**
 - 
 
872 
  * @}
 - 
 
873 
  */
 - 
 
874 
 
 - 
 
875 
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 -