WebSVN – DashDisplay – Diff – /branches/Dashboard_L152_v2/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.c



    /* Check if timeout is disabled (set to infinite wait) */
    if(Timeout != HAL_MAX_DELAY)
    {
      if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
      {
        /* New check to avoid false timeout detection in case of preemption */
        if(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_EOC))
        {
          /* Update ADC state machine to timeout */
          SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
 
          /* Process unlocked */
          __HAL_UNLOCK(hadc);
 
          return HAL_TIMEOUT;
        }
      }
    }
  }
 
  /* Clear end of conversion flag of regular group if low power feature     */

    /* Check if timeout is disabled (set to infinite wait) */
    if(Timeout != HAL_MAX_DELAY)
    {
      if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
      {
        /* New check to avoid false timeout detection in case of preemption */
        if(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET)
        {
          /* Update ADC state machine to timeout */
          SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
 
          /* Process unlocked */
          __HAL_UNLOCK(hadc);
 
          return HAL_TIMEOUT;
        }
      }
    }
  }
 
  switch(EventType)

    /* Disable ADC DMA mode */
    hadc->Instance->CR2 &= ~ADC_CR2_DMA;
   
    /* Disable the DMA channel (in case of DMA in circular mode or stop while */
    /* DMA transfer is on going)                                              */
    if (hadc->DMA_Handle->State == HAL_DMA_STATE_BUSY)
    {
      HAL_DMA_Abort(hadc->DMA_Handle);
     
      /* Check if DMA channel effectively disabled */
      if (tmp_hal_status != HAL_OK)
      {
        /* Update ADC state machine to error */
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
      }
    }
   
    /* Set ADC state */
    ADC_STATE_CLR_SET(hadc->State,
                      HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
                      HAL_ADC_STATE_READY);

  {
      if (READ_BIT(ADC->CCR, ADC_CCR_TSVREFE) == RESET)
      {
        SET_BIT(ADC->CCR, ADC_CCR_TSVREFE);
       
        if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
        {
          /* Delay for temperature sensor stabilization time */
          /* Compute number of CPU cycles to wait for */
          wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000));
          while(wait_loop_index != 0)

    /* Wait for ADC effectively enabled */
    while(ADC_IS_ENABLE(hadc) == RESET)
    {
      if((HAL_GetTick() - tickstart ) > ADC_ENABLE_TIMEOUT)
      {
        /* New check to avoid false timeout detection in case of preemption */
        if(ADC_IS_ENABLE(hadc) == RESET)
        {
          /* Update ADC state machine to error */
          SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
 
          /* Set ADC error code to ADC IP internal error */
          SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
 
          /* Process unlocked */
          __HAL_UNLOCK(hadc);
 
          return HAL_ERROR;
        }
      }
    }
  }
   
  /* Return HAL status */

    /* Wait for ADC effectively disabled */    
    while(ADC_IS_ENABLE(hadc) != RESET)
    {
      if((HAL_GetTick() - tickstart ) > ADC_DISABLE_TIMEOUT)
      {
        /* New check to avoid false timeout detection in case of preemption */
        if(ADC_IS_ENABLE(hadc) != RESET)
        {
          /* Update ADC state machine to error */
          SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
 
          /* Set ADC error code to ADC IP internal error */
          SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
 
          return HAL_ERROR;
        }
      }
    }
  }
 
  /* Return HAL status */

Rev 56	Rev 61
Line 1245...	Line 1245...
1245	/* Check if timeout is disabled (set to infinite wait) */	1245	/* Check if timeout is disabled (set to infinite wait) */
1246	if(Timeout != HAL_MAX_DELAY)	1246	if(Timeout != HAL_MAX_DELAY)
1247	{	1247	{
1248	if((Timeout == 0) \|\| ((HAL_GetTick() - tickstart ) > Timeout))	1248	if((Timeout == 0) \|\| ((HAL_GetTick() - tickstart ) > Timeout))
1249	{	1249	{
-		1250	/* New check to avoid false timeout detection in case of preemption */
-		1251	if(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_EOC))
-		1252	{
1250	/* Update ADC state machine to timeout */	1253	/* Update ADC state machine to timeout */
1251	SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);	1254	SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
1252		1255
1253	/* Process unlocked */	1256	/* Process unlocked */
1254	__HAL_UNLOCK(hadc);	1257	__HAL_UNLOCK(hadc);
1255		1258
1256	return HAL_TIMEOUT;	1259	return HAL_TIMEOUT;
-		1260	}
1257	}	1261	}
1258	}	1262	}
1259	}	1263	}
1260		1264
1261	/* Clear end of conversion flag of regular group if low power feature */	1265	/* Clear end of conversion flag of regular group if low power feature */
Line 1321...	Line 1325...
1321	/* Check if timeout is disabled (set to infinite wait) */	1325	/* Check if timeout is disabled (set to infinite wait) */
1322	if(Timeout != HAL_MAX_DELAY)	1326	if(Timeout != HAL_MAX_DELAY)
1323	{	1327	{
1324	if((Timeout == 0) \|\| ((HAL_GetTick() - tickstart ) > Timeout))	1328	if((Timeout == 0) \|\| ((HAL_GetTick() - tickstart ) > Timeout))
1325	{	1329	{
-		1330	/* New check to avoid false timeout detection in case of preemption */
-		1331	if(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET)
-		1332	{
1326	/* Update ADC state machine to timeout */	1333	/* Update ADC state machine to timeout */
1327	SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);	1334	SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
1328		1335
1329	/* Process unlocked */	1336	/* Process unlocked */
1330	__HAL_UNLOCK(hadc);	1337	__HAL_UNLOCK(hadc);
1331		1338
1332	return HAL_TIMEOUT;	1339	return HAL_TIMEOUT;
-		1340	}
1333	}	1341	}
1334	}	1342	}
1335	}	1343	}
1336		1344
1337	switch(EventType)	1345	switch(EventType)
Line 1616...	Line 1624...
1616	/* Disable ADC DMA mode */	1624	/* Disable ADC DMA mode */
1617	hadc->Instance->CR2 &= ~ADC_CR2_DMA;	1625	hadc->Instance->CR2 &= ~ADC_CR2_DMA;
1618		1626
1619	/* Disable the DMA channel (in case of DMA in circular mode or stop while */	1627	/* Disable the DMA channel (in case of DMA in circular mode or stop while */
1620	/* DMA transfer is on going) */	1628	/* DMA transfer is on going) */
-		1629	if (hadc->DMA_Handle->State == HAL_DMA_STATE_BUSY)
-		1630	{
1621	HAL_DMA_Abort(hadc->DMA_Handle);	1631	HAL_DMA_Abort(hadc->DMA_Handle);
-		1632
-		1633	/* Check if DMA channel effectively disabled */
-		1634	if (tmp_hal_status != HAL_OK)
-		1635	{
-		1636	/* Update ADC state machine to error */
-		1637	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
-		1638	}
-		1639	}
1622		1640
1623	/* Set ADC state */	1641	/* Set ADC state */
1624	ADC_STATE_CLR_SET(hadc->State,	1642	ADC_STATE_CLR_SET(hadc->State,
1625	HAL_ADC_STATE_REG_BUSY \| HAL_ADC_STATE_INJ_BUSY,	1643	HAL_ADC_STATE_REG_BUSY \| HAL_ADC_STATE_INJ_BUSY,
1626	HAL_ADC_STATE_READY);	1644	HAL_ADC_STATE_READY);
Line 2017...	Line 2035...
2017	{	2035	{
2018	if (READ_BIT(ADC->CCR, ADC_CCR_TSVREFE) == RESET)	2036	if (READ_BIT(ADC->CCR, ADC_CCR_TSVREFE) == RESET)
2019	{	2037	{
2020	SET_BIT(ADC->CCR, ADC_CCR_TSVREFE);	2038	SET_BIT(ADC->CCR, ADC_CCR_TSVREFE);
2021		2039
2022	if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))	2040	if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
2023	{	2041	{
2024	/* Delay for temperature sensor stabilization time */	2042	/* Delay for temperature sensor stabilization time */
2025	/* Compute number of CPU cycles to wait for */	2043	/* Compute number of CPU cycles to wait for */
2026	wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000));	2044	wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000));
2027	while(wait_loop_index != 0)	2045	while(wait_loop_index != 0)
Line 2209...	Line 2227...
2209	/* Wait for ADC effectively enabled */	2227	/* Wait for ADC effectively enabled */
2210	while(ADC_IS_ENABLE(hadc) == RESET)	2228	while(ADC_IS_ENABLE(hadc) == RESET)
2211	{	2229	{
2212	if((HAL_GetTick() - tickstart ) > ADC_ENABLE_TIMEOUT)	2230	if((HAL_GetTick() - tickstart ) > ADC_ENABLE_TIMEOUT)
2213	{	2231	{
-		2232	/* New check to avoid false timeout detection in case of preemption */
-		2233	if(ADC_IS_ENABLE(hadc) == RESET)
-		2234	{
2214	/* Update ADC state machine to error */	2235	/* Update ADC state machine to error */
2215	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);	2236	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
2216		2237
2217	/* Set ADC error code to ADC IP internal error */	2238	/* Set ADC error code to ADC IP internal error */
2218	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);	2239	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
2219		2240
2220	/* Process unlocked */	2241	/* Process unlocked */
2221	__HAL_UNLOCK(hadc);	2242	__HAL_UNLOCK(hadc);
2222		2243
2223	return HAL_ERROR;	2244	return HAL_ERROR;
-		2245	}
2224	}	2246	}
2225	}	2247	}
2226	}	2248	}
2227		2249
2228	/* Return HAL status */	2250	/* Return HAL status */
Line 2252...	Line 2274...
2252	/* Wait for ADC effectively disabled */	2274	/* Wait for ADC effectively disabled */
2253	while(ADC_IS_ENABLE(hadc) != RESET)	2275	while(ADC_IS_ENABLE(hadc) != RESET)
2254	{	2276	{
2255	if((HAL_GetTick() - tickstart ) > ADC_DISABLE_TIMEOUT)	2277	if((HAL_GetTick() - tickstart ) > ADC_DISABLE_TIMEOUT)
2256	{	2278	{
-		2279	/* New check to avoid false timeout detection in case of preemption */
-		2280	if(ADC_IS_ENABLE(hadc) != RESET)
-		2281	{
2257	/* Update ADC state machine to error */	2282	/* Update ADC state machine to error */
2258	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);	2283	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
2259		2284
2260	/* Set ADC error code to ADC IP internal error */	2285	/* Set ADC error code to ADC IP internal error */
2261	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);	2286	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
2262		2287
2263	return HAL_ERROR;	2288	return HAL_ERROR;
-		2289	}
2264	}	2290	}
2265	}	2291	}
2266	}	2292	}
2267		2293
2268	/* Return HAL status */	2294	/* Return HAL status */

Subversion Repositories DashDisplay

(root)/branches/Dashboard_L152_v2/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_adc.c – Rev 56 → 61