Rev 61 | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed
| Rev 61 | Rev 77 | ||
|---|---|---|---|
| Line 1... | Line 1... | ||
| 1 | /** |
1 | /** |
| 2 | ****************************************************************************** |
2 | ****************************************************************************** |
| 3 | * @file stm32l1xx_hal_uart.h |
3 | * @file stm32l1xx_hal_uart.h |
| 4 | * @author MCD Application Team |
4 | * @author MCD Application Team |
| 5 | * @brief Header file of UART HAL module. |
5 | * @brief Header file of UART HAL module. |
| 6 | ****************************************************************************** |
6 | ****************************************************************************** |
| 7 | * @attention |
7 | * @attention |
| 8 | * |
8 | * |
| 9 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
9 | * Copyright (c) 2016 STMicroelectronics. |
| 10 | * All rights reserved.</center></h2> |
10 | * All rights reserved. |
| 11 | * |
11 | * |
| 12 | * This software component is licensed by ST under BSD 3-Clause license, |
12 | * This software is licensed under terms that can be found in the LICENSE file |
| 13 | * the "License"; You may not use this file except in compliance with the |
13 | * in the root directory of this software component. |
| 14 | * License. You may obtain a copy of the License at: |
14 | * If no LICENSE file comes with this software, it is provided AS-IS. |
| 15 | * opensource.org/licenses/BSD-3-Clause |
15 | * |
| 16 | * |
16 | ****************************************************************************** |
| 17 | ****************************************************************************** |
17 | */ |
| 18 | */ |
18 | |
| 19 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ |
|
| 20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
20 | #ifndef __STM32L1xx_HAL_UART_H |
| 21 | #ifndef __STM32L1xx_HAL_UART_H |
21 | #define __STM32L1xx_HAL_UART_H |
| 22 | #define __STM32L1xx_HAL_UART_H |
22 | |
| 23 | 23 | #ifdef __cplusplus |
|
| 24 | #ifdef __cplusplus |
24 | extern "C" { |
| 25 | extern "C" { |
25 | #endif |
| 26 | #endif |
26 | |
| 27 | 27 | /* Includes ------------------------------------------------------------------*/ |
|
| 28 | /* Includes ------------------------------------------------------------------*/ |
28 | #include "stm32l1xx_hal_def.h" |
| 29 | #include "stm32l1xx_hal_def.h" |
29 | |
| 30 | 30 | /** @addtogroup STM32L1xx_HAL_Driver |
|
| 31 | /** @addtogroup STM32L1xx_HAL_Driver |
31 | * @{ |
| 32 | * @{ |
32 | */ |
| 33 | */ |
33 | |
| 34 | 34 | /** @addtogroup UART |
|
| 35 | /** @addtogroup UART |
35 | * @{ |
| 36 | * @{ |
36 | */ |
| 37 | */ |
37 | |
| 38 | 38 | /* Exported types ------------------------------------------------------------*/ |
|
| 39 | /* Exported types ------------------------------------------------------------*/ |
39 | /** @defgroup UART_Exported_Types UART Exported Types |
| 40 | /** @defgroup UART_Exported_Types UART Exported Types |
40 | * @{ |
| 41 | * @{ |
41 | */ |
| 42 | */ |
42 | |
| 43 | 43 | /** |
|
| 44 | /** |
44 | * @brief UART Init Structure definition |
| 45 | * @brief UART Init Structure definition |
45 | */ |
| 46 | */ |
46 | typedef struct |
| 47 | typedef struct |
47 | { |
| 48 | { |
48 | uint32_t BaudRate; /*!< This member configures the UART communication baud rate. |
| 49 | uint32_t BaudRate; /*!< This member configures the UART communication baud rate. |
49 | The baud rate is computed using the following formula: |
| 50 | The baud rate is computed using the following formula: |
50 | - IntegerDivider = ((PCLKx) / (8 * (OVR8+1) * (huart->Init.BaudRate))) |
| 51 | - IntegerDivider = ((PCLKx) / (8 * (OVR8+1) * (huart->Init.BaudRate))) |
51 | - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8 * (OVR8+1)) + 0.5 |
| 52 | - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8 * (OVR8+1)) + 0.5 |
52 | Where OVR8 is the "oversampling by 8 mode" configuration bit in the CR1 register. */ |
| 53 | Where OVR8 is the "oversampling by 8 mode" configuration bit in the CR1 register. */ |
53 | |
| 54 | 54 | uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. |
|
| 55 | uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. |
55 | This parameter can be a value of @ref UART_Word_Length */ |
| 56 | This parameter can be a value of @ref UART_Word_Length */ |
56 | |
| 57 | 57 | uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. |
|
| 58 | uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. |
58 | This parameter can be a value of @ref UART_Stop_Bits */ |
| 59 | This parameter can be a value of @ref UART_Stop_Bits */ |
59 | |
| 60 | 60 | uint32_t Parity; /*!< Specifies the parity mode. |
|
| 61 | uint32_t Parity; /*!< Specifies the parity mode. |
61 | This parameter can be a value of @ref UART_Parity |
| 62 | This parameter can be a value of @ref UART_Parity |
62 | @note When parity is enabled, the computed parity is inserted |
| 63 | @note When parity is enabled, the computed parity is inserted |
63 | at the MSB position of the transmitted data (9th bit when |
| 64 | at the MSB position of the transmitted data (9th bit when |
64 | the word length is set to 9 data bits; 8th bit when the |
| 65 | the word length is set to 9 data bits; 8th bit when the |
65 | word length is set to 8 data bits). */ |
| 66 | word length is set to 8 data bits). */ |
66 | |
| 67 | 67 | uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. |
|
| 68 | uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. |
68 | This parameter can be a value of @ref UART_Mode */ |
| 69 | This parameter can be a value of @ref UART_Mode */ |
69 | |
| 70 | 70 | uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled or disabled. |
|
| 71 | uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled or disabled. |
71 | This parameter can be a value of @ref UART_Hardware_Flow_Control */ |
| 72 | This parameter can be a value of @ref UART_Hardware_Flow_Control */ |
72 | |
| 73 | 73 | uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8). |
|
| 74 | uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8). |
74 | This parameter can be a value of @ref UART_Over_Sampling */ |
| 75 | This parameter can be a value of @ref UART_Over_Sampling */ |
75 | } UART_InitTypeDef; |
| 76 | } UART_InitTypeDef; |
76 | |
| 77 | 77 | /** |
|
| 78 | /** |
78 | * @brief HAL UART State structures definition |
| 79 | * @brief HAL UART State structures definition |
79 | * @note HAL UART State value is a combination of 2 different substates: gState and RxState. |
| 80 | * @note HAL UART State value is a combination of 2 different substates: gState and RxState. |
80 | * - gState contains UART state information related to global Handle management |
| 81 | * - gState contains UART state information related to global Handle management |
81 | * and also information related to Tx operations. |
| 82 | * and also information related to Tx operations. |
82 | * gState value coding follow below described bitmap : |
| 83 | * gState value coding follow below described bitmap : |
83 | * b7-b6 Error information |
| 84 | * b7-b6 Error information |
84 | * 00 : No Error |
| 85 | * 00 : No Error |
85 | * 01 : (Not Used) |
| 86 | * 01 : (Not Used) |
86 | * 10 : Timeout |
| 87 | * 10 : Timeout |
87 | * 11 : Error |
| 88 | * 11 : Error |
88 | * b5 Peripheral initialization status |
| 89 | * b5 Peripheral initialization status |
89 | * 0 : Reset (Peripheral not initialized) |
| 90 | * 0 : Reset (Peripheral not initialized) |
90 | * 1 : Init done (Peripheral initialized. HAL UART Init function already called) |
| 91 | * 1 : Init done (Peripheral initialized. HAL UART Init function already called) |
91 | * b4-b3 (not used) |
| 92 | * b4-b3 (not used) |
92 | * xx : Should be set to 00 |
| 93 | * xx : Should be set to 00 |
93 | * b2 Intrinsic process state |
| 94 | * b2 Intrinsic process state |
94 | * 0 : Ready |
| 95 | * 0 : Ready |
95 | * 1 : Busy (Peripheral busy with some configuration or internal operations) |
| 96 | * 1 : Busy (Peripheral busy with some configuration or internal operations) |
96 | * b1 (not used) |
| 97 | * b1 (not used) |
97 | * x : Should be set to 0 |
| 98 | * x : Should be set to 0 |
98 | * b0 Tx state |
| 99 | * b0 Tx state |
99 | * 0 : Ready (no Tx operation ongoing) |
| 100 | * 0 : Ready (no Tx operation ongoing) |
100 | * 1 : Busy (Tx operation ongoing) |
| 101 | * 1 : Busy (Tx operation ongoing) |
101 | * - RxState contains information related to Rx operations. |
| 102 | * - RxState contains information related to Rx operations. |
102 | * RxState value coding follow below described bitmap : |
| 103 | * RxState value coding follow below described bitmap : |
103 | * b7-b6 (not used) |
| 104 | * b7-b6 (not used) |
104 | * xx : Should be set to 00 |
| 105 | * xx : Should be set to 00 |
105 | * b5 Peripheral initialization status |
| 106 | * b5 Peripheral initialization status |
106 | * 0 : Reset (Peripheral not initialized) |
| 107 | * 0 : Reset (Peripheral not initialized) |
107 | * 1 : Init done (Peripheral initialized) |
| 108 | * 1 : Init done (Peripheral initialized) |
108 | * b4-b2 (not used) |
| 109 | * b4-b2 (not used) |
109 | * xxx : Should be set to 000 |
| 110 | * xxx : Should be set to 000 |
110 | * b1 Rx state |
| 111 | * b1 Rx state |
111 | * 0 : Ready (no Rx operation ongoing) |
| 112 | * 0 : Ready (no Rx operation ongoing) |
112 | * 1 : Busy (Rx operation ongoing) |
| 113 | * 1 : Busy (Rx operation ongoing) |
113 | * b0 (not used) |
| 114 | * b0 (not used) |
114 | * x : Should be set to 0. |
| 115 | * x : Should be set to 0. |
115 | */ |
| 116 | */ |
116 | typedef enum |
| 117 | typedef enum |
117 | { |
| 118 | { |
118 | HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized |
| 119 | HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized |
119 | Value is allowed for gState and RxState */ |
| 120 | Value is allowed for gState and RxState */ |
120 | HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use |
| 121 | HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use |
121 | Value is allowed for gState and RxState */ |
| 122 | Value is allowed for gState and RxState */ |
122 | HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing |
| 123 | HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing |
123 | Value is allowed for gState only */ |
| 124 | Value is allowed for gState only */ |
124 | HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing |
| 125 | HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing |
125 | Value is allowed for gState only */ |
| 126 | Value is allowed for gState only */ |
126 | HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing |
| 127 | HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing |
127 | Value is allowed for RxState only */ |
| 128 | Value is allowed for RxState only */ |
128 | HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing |
| 129 | HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing |
129 | Not to be used for neither gState nor RxState. |
| 130 | Not to be used for neither gState nor RxState. |
130 | Value is result of combination (Or) between gState and RxState values */ |
| 131 | Value is result of combination (Or) between gState and RxState values */ |
131 | HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state |
| 132 | HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state |
132 | Value is allowed for gState only */ |
| 133 | Value is allowed for gState only */ |
133 | HAL_UART_STATE_ERROR = 0xE0U /*!< Error |
| 134 | HAL_UART_STATE_ERROR = 0xE0U /*!< Error |
134 | Value is allowed for gState only */ |
| 135 | Value is allowed for gState only */ |
135 | } HAL_UART_StateTypeDef; |
| 136 | } HAL_UART_StateTypeDef; |
136 | |
| 137 | 137 | /** |
|
| 138 | /** |
138 | * @brief HAL UART Reception type definition |
| 139 | * @brief HAL UART Reception type definition |
139 | * @note HAL UART Reception type value aims to identify which type of Reception is ongoing. |
| 140 | * @note HAL UART Reception type value aims to identify which type of Reception is ongoing. |
140 | * This parameter can be a value of @ref UART_Reception_Type_Values : |
| 141 | * It is expected to admit following values : |
141 | * HAL_UART_RECEPTION_STANDARD = 0x00U, |
| 142 | * HAL_UART_RECEPTION_STANDARD = 0x00U, |
142 | * HAL_UART_RECEPTION_TOIDLE = 0x01U, |
| 143 | * HAL_UART_RECEPTION_TOIDLE = 0x01U, |
143 | */ |
| 144 | */ |
144 | typedef uint32_t HAL_UART_RxTypeTypeDef; |
| 145 | typedef uint32_t HAL_UART_RxTypeTypeDef; |
145 | |
| 146 | 146 | /** |
|
| 147 | /** |
147 | * @brief HAL UART Rx Event type definition |
| 148 | * @brief UART handle Structure definition |
148 | * @note HAL UART Rx Event type value aims to identify which type of Event has occurred |
| 149 | */ |
149 | * leading to call of the RxEvent callback. |
| 150 | typedef struct __UART_HandleTypeDef |
150 | * This parameter can be a value of @ref UART_RxEvent_Type_Values : |
| 151 | { |
151 | * HAL_UART_RXEVENT_TC = 0x00U, |
| 152 | USART_TypeDef *Instance; /*!< UART registers base address */ |
152 | * HAL_UART_RXEVENT_HT = 0x01U, |
| 153 | 153 | * HAL_UART_RXEVENT_IDLE = 0x02U, |
|
| 154 | UART_InitTypeDef Init; /*!< UART communication parameters */ |
154 | */ |
| 155 | 155 | typedef uint32_t HAL_UART_RxEventTypeTypeDef; |
|
| 156 | uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ |
156 | |
| 157 | 157 | /** |
|
| 158 | uint16_t TxXferSize; /*!< UART Tx Transfer size */ |
158 | * @brief UART handle Structure definition |
| 159 | 159 | */ |
|
| 160 | __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ |
160 | typedef struct __UART_HandleTypeDef |
| 161 | 161 | { |
|
| 162 | uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ |
162 | USART_TypeDef *Instance; /*!< UART registers base address */ |
| 163 | 163 | ||
| 164 | uint16_t RxXferSize; /*!< UART Rx Transfer size */ |
164 | UART_InitTypeDef Init; /*!< UART communication parameters */ |
| 165 | 165 | ||
| 166 | __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ |
166 | const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ |
| 167 | 167 | ||
| 168 | __IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */ |
168 | uint16_t TxXferSize; /*!< UART Tx Transfer size */ |
| 169 | 169 | ||
| 170 | DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ |
170 | __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ |
| 171 | 171 | ||
| 172 | DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ |
172 | uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ |
| 173 | 173 | ||
| 174 | HAL_LockTypeDef Lock; /*!< Locking object */ |
174 | uint16_t RxXferSize; /*!< UART Rx Transfer size */ |
| 175 | 175 | ||
| 176 | __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management |
176 | __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ |
| 177 | and also related to Tx operations. |
177 | |
| 178 | This parameter can be a value of @ref HAL_UART_StateTypeDef */ |
178 | __IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */ |
| 179 | 179 | ||
| 180 | __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. |
180 | __IO HAL_UART_RxEventTypeTypeDef RxEventType; /*!< Type of Rx Event */ |
| 181 | This parameter can be a value of @ref HAL_UART_StateTypeDef */ |
181 | |
| 182 | 182 | DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ |
|
| 183 | __IO uint32_t ErrorCode; /*!< UART Error code */ |
183 | |
| 184 | 184 | DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ |
|
| 185 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
185 | |
| 186 | void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ |
186 | HAL_LockTypeDef Lock; /*!< Locking object */ |
| 187 | void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ |
187 | |
| 188 | void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ |
188 | __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management |
| 189 | void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ |
189 | and also related to Tx operations. |
| 190 | void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ |
190 | This parameter can be a value of @ref HAL_UART_StateTypeDef */ |
| 191 | void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ |
191 | |
| 192 | void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ |
192 | __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. |
| 193 | void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ |
193 | This parameter can be a value of @ref HAL_UART_StateTypeDef */ |
| 194 | void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ |
194 | |
| 195 | void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */ |
195 | __IO uint32_t ErrorCode; /*!< UART Error code */ |
| 196 | 196 | ||
| 197 | void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ |
197 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
| 198 | void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ |
198 | void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ |
| 199 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
199 | void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ |
| 200 | 200 | void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ |
|
| 201 | } UART_HandleTypeDef; |
201 | void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ |
| 202 | 202 | void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ |
|
| 203 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
203 | void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ |
| 204 | /** |
204 | void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ |
| 205 | * @brief HAL UART Callback ID enumeration definition |
205 | void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ |
| 206 | */ |
206 | void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ |
| 207 | typedef enum |
207 | void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */ |
| 208 | { |
208 | |
| 209 | HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ |
209 | void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ |
| 210 | HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ |
210 | void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ |
| 211 | HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ |
211 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
| 212 | HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ |
212 | |
| 213 | HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ |
213 | } UART_HandleTypeDef; |
| 214 | HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ |
214 | |
| 215 | HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ |
215 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
| 216 | HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ |
216 | /** |
| 217 | HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ |
217 | * @brief HAL UART Callback ID enumeration definition |
| 218 | 218 | */ |
|
| 219 | HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ |
219 | typedef enum |
| 220 | HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ |
220 | { |
| 221 | 221 | HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ |
|
| 222 | } HAL_UART_CallbackIDTypeDef; |
222 | HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ |
| 223 | 223 | HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ |
|
| 224 | /** |
224 | HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ |
| 225 | * @brief HAL UART Callback pointer definition |
225 | HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ |
| 226 | */ |
226 | HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ |
| 227 | typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ |
227 | HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ |
| 228 | typedef void (*pUART_RxEventCallbackTypeDef)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */ |
228 | HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ |
| 229 | 229 | HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ |
|
| 230 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
230 | |
| 231 | 231 | HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ |
|
| 232 | /** |
232 | HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ |
| 233 | * @} |
233 | |
| 234 | */ |
234 | } HAL_UART_CallbackIDTypeDef; |
| 235 | 235 | ||
| 236 | /* Exported constants --------------------------------------------------------*/ |
236 | /** |
| 237 | /** @defgroup UART_Exported_Constants UART Exported Constants |
237 | * @brief HAL UART Callback pointer definition |
| 238 | * @{ |
238 | */ |
| 239 | */ |
239 | typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ |
| 240 | 240 | typedef void (*pUART_RxEventCallbackTypeDef)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */ |
|
| 241 | /** @defgroup UART_Error_Code UART Error Code |
241 | |
| 242 | * @{ |
242 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
| 243 | */ |
243 | |
| 244 | #define HAL_UART_ERROR_NONE 0x00000000U /*!< No error */ |
244 | /** |
| 245 | #define HAL_UART_ERROR_PE 0x00000001U /*!< Parity error */ |
245 | * @} |
| 246 | #define HAL_UART_ERROR_NE 0x00000002U /*!< Noise error */ |
246 | */ |
| 247 | #define HAL_UART_ERROR_FE 0x00000004U /*!< Frame error */ |
247 | |
| 248 | #define HAL_UART_ERROR_ORE 0x00000008U /*!< Overrun error */ |
248 | /* Exported constants --------------------------------------------------------*/ |
| 249 | #define HAL_UART_ERROR_DMA 0x00000010U /*!< DMA transfer error */ |
249 | /** @defgroup UART_Exported_Constants UART Exported Constants |
| 250 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
250 | * @{ |
| 251 | #define HAL_UART_ERROR_INVALID_CALLBACK 0x00000020U /*!< Invalid Callback error */ |
251 | */ |
| 252 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
252 | |
| 253 | /** |
253 | /** @defgroup UART_Error_Code UART Error Code |
| 254 | * @} |
254 | * @{ |
| 255 | */ |
255 | */ |
| 256 | 256 | #define HAL_UART_ERROR_NONE 0x00000000U /*!< No error */ |
|
| 257 | /** @defgroup UART_Word_Length UART Word Length |
257 | #define HAL_UART_ERROR_PE 0x00000001U /*!< Parity error */ |
| 258 | * @{ |
258 | #define HAL_UART_ERROR_NE 0x00000002U /*!< Noise error */ |
| 259 | */ |
259 | #define HAL_UART_ERROR_FE 0x00000004U /*!< Frame error */ |
| 260 | #define UART_WORDLENGTH_8B 0x00000000U |
260 | #define HAL_UART_ERROR_ORE 0x00000008U /*!< Overrun error */ |
| 261 | #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M) |
261 | #define HAL_UART_ERROR_DMA 0x00000010U /*!< DMA transfer error */ |
| 262 | /** |
262 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
| 263 | * @} |
263 | #define HAL_UART_ERROR_INVALID_CALLBACK 0x00000020U /*!< Invalid Callback error */ |
| 264 | */ |
264 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
| 265 | 265 | /** |
|
| 266 | /** @defgroup UART_Stop_Bits UART Number of Stop Bits |
266 | * @} |
| 267 | * @{ |
267 | */ |
| 268 | */ |
268 | |
| 269 | #define UART_STOPBITS_1 0x00000000U |
269 | /** @defgroup UART_Word_Length UART Word Length |
| 270 | #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) |
270 | * @{ |
| 271 | /** |
271 | */ |
| 272 | * @} |
272 | #define UART_WORDLENGTH_8B 0x00000000U |
| 273 | */ |
273 | #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M) |
| 274 | 274 | /** |
|
| 275 | /** @defgroup UART_Parity UART Parity |
275 | * @} |
| 276 | * @{ |
276 | */ |
| 277 | */ |
277 | |
| 278 | #define UART_PARITY_NONE 0x00000000U |
278 | /** @defgroup UART_Stop_Bits UART Number of Stop Bits |
| 279 | #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) |
279 | * @{ |
| 280 | #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) |
280 | */ |
| 281 | /** |
281 | #define UART_STOPBITS_1 0x00000000U |
| 282 | * @} |
282 | #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) |
| 283 | */ |
283 | /** |
| 284 | 284 | * @} |
|
| 285 | /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control |
285 | */ |
| 286 | * @{ |
286 | |
| 287 | */ |
287 | /** @defgroup UART_Parity UART Parity |
| 288 | #define UART_HWCONTROL_NONE 0x00000000U |
288 | * @{ |
| 289 | #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE) |
289 | */ |
| 290 | #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE) |
290 | #define UART_PARITY_NONE 0x00000000U |
| 291 | #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE)) |
291 | #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) |
| 292 | /** |
292 | #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) |
| 293 | * @} |
293 | /** |
| 294 | */ |
294 | * @} |
| 295 | 295 | */ |
|
| 296 | /** @defgroup UART_Mode UART Transfer Mode |
296 | |
| 297 | * @{ |
297 | /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control |
| 298 | */ |
298 | * @{ |
| 299 | #define UART_MODE_RX ((uint32_t)USART_CR1_RE) |
299 | */ |
| 300 | #define UART_MODE_TX ((uint32_t)USART_CR1_TE) |
300 | #define UART_HWCONTROL_NONE 0x00000000U |
| 301 | #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE | USART_CR1_RE)) |
301 | #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE) |
| 302 | /** |
302 | #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE) |
| 303 | * @} |
303 | #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE)) |
| 304 | */ |
304 | /** |
| 305 | 305 | * @} |
|
| 306 | /** @defgroup UART_State UART State |
306 | */ |
| 307 | * @{ |
307 | |
| 308 | */ |
308 | /** @defgroup UART_Mode UART Transfer Mode |
| 309 | #define UART_STATE_DISABLE 0x00000000U |
309 | * @{ |
| 310 | #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE) |
310 | */ |
| 311 | /** |
311 | #define UART_MODE_RX ((uint32_t)USART_CR1_RE) |
| 312 | * @} |
312 | #define UART_MODE_TX ((uint32_t)USART_CR1_TE) |
| 313 | */ |
313 | #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE | USART_CR1_RE)) |
| 314 | 314 | /** |
|
| 315 | /** @defgroup UART_Over_Sampling UART Over Sampling |
315 | * @} |
| 316 | * @{ |
316 | */ |
| 317 | */ |
317 | |
| 318 | #define UART_OVERSAMPLING_16 0x00000000U |
318 | /** @defgroup UART_State UART State |
| 319 | #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8) |
319 | * @{ |
| 320 | /** |
320 | */ |
| 321 | * @} |
321 | #define UART_STATE_DISABLE 0x00000000U |
| 322 | */ |
322 | #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE) |
| 323 | 323 | /** |
|
| 324 | /** @defgroup UART_LIN_Break_Detection_Length UART LIN Break Detection Length |
324 | * @} |
| 325 | * @{ |
325 | */ |
| 326 | */ |
326 | |
| 327 | #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U |
327 | /** @defgroup UART_Over_Sampling UART Over Sampling |
| 328 | #define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL) |
328 | * @{ |
| 329 | /** |
329 | */ |
| 330 | * @} |
330 | #define UART_OVERSAMPLING_16 0x00000000U |
| 331 | */ |
331 | #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8) |
| 332 | 332 | /** |
|
| 333 | /** @defgroup UART_WakeUp_functions UART Wakeup Functions |
333 | * @} |
| 334 | * @{ |
334 | */ |
| 335 | */ |
335 | |
| 336 | #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U |
336 | /** @defgroup UART_LIN_Break_Detection_Length UART LIN Break Detection Length |
| 337 | #define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE) |
337 | * @{ |
| 338 | /** |
338 | */ |
| 339 | * @} |
339 | #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U |
| 340 | */ |
340 | #define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL) |
| 341 | 341 | /** |
|
| 342 | /** @defgroup UART_Flags UART FLags |
342 | * @} |
| 343 | * Elements values convention: 0xXXXX |
343 | */ |
| 344 | * - 0xXXXX : Flag mask in the SR register |
344 | |
| 345 | * @{ |
345 | /** @defgroup UART_WakeUp_functions UART Wakeup Functions |
| 346 | */ |
346 | * @{ |
| 347 | #define UART_FLAG_CTS ((uint32_t)USART_SR_CTS) |
347 | */ |
| 348 | #define UART_FLAG_LBD ((uint32_t)USART_SR_LBD) |
348 | #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U |
| 349 | #define UART_FLAG_TXE ((uint32_t)USART_SR_TXE) |
349 | #define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE) |
| 350 | #define UART_FLAG_TC ((uint32_t)USART_SR_TC) |
350 | /** |
| 351 | #define UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE) |
351 | * @} |
| 352 | #define UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE) |
352 | */ |
| 353 | #define UART_FLAG_ORE ((uint32_t)USART_SR_ORE) |
353 | |
| 354 | #define UART_FLAG_NE ((uint32_t)USART_SR_NE) |
354 | /** @defgroup UART_Flags UART FLags |
| 355 | #define UART_FLAG_FE ((uint32_t)USART_SR_FE) |
355 | * Elements values convention: 0xXXXX |
| 356 | #define UART_FLAG_PE ((uint32_t)USART_SR_PE) |
356 | * - 0xXXXX : Flag mask in the SR register |
| 357 | /** |
357 | * @{ |
| 358 | * @} |
358 | */ |
| 359 | */ |
359 | #define UART_FLAG_CTS ((uint32_t)USART_SR_CTS) |
| 360 | 360 | #define UART_FLAG_LBD ((uint32_t)USART_SR_LBD) |
|
| 361 | /** @defgroup UART_Interrupt_definition UART Interrupt Definitions |
361 | #define UART_FLAG_TXE ((uint32_t)USART_SR_TXE) |
| 362 | * Elements values convention: 0xY000XXXX |
362 | #define UART_FLAG_TC ((uint32_t)USART_SR_TC) |
| 363 | * - XXXX : Interrupt mask (16 bits) in the Y register |
363 | #define UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE) |
| 364 | * - Y : Interrupt source register (2bits) |
364 | #define UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE) |
| 365 | * - 0001: CR1 register |
365 | #define UART_FLAG_ORE ((uint32_t)USART_SR_ORE) |
| 366 | * - 0010: CR2 register |
366 | #define UART_FLAG_NE ((uint32_t)USART_SR_NE) |
| 367 | * - 0011: CR3 register |
367 | #define UART_FLAG_FE ((uint32_t)USART_SR_FE) |
| 368 | * @{ |
368 | #define UART_FLAG_PE ((uint32_t)USART_SR_PE) |
| 369 | */ |
369 | /** |
| 370 | 370 | * @} |
|
| 371 | #define UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_PEIE)) |
371 | */ |
| 372 | #define UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TXEIE)) |
372 | |
| 373 | #define UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TCIE)) |
373 | /** @defgroup UART_Interrupt_definition UART Interrupt Definitions |
| 374 | #define UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE)) |
374 | * Elements values convention: 0xY000XXXX |
| 375 | #define UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE)) |
375 | * - XXXX : Interrupt mask (16 bits) in the Y register |
| 376 | 376 | * - Y : Interrupt source register (2bits) |
|
| 377 | #define UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28U | USART_CR2_LBDIE)) |
377 | * - 0001: CR1 register |
| 378 | 378 | * - 0010: CR2 register |
|
| 379 | #define UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_CTSIE)) |
379 | * - 0011: CR3 register |
| 380 | #define UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_EIE)) |
380 | * @{ |
| 381 | /** |
381 | */ |
| 382 | * @} |
382 | |
| 383 | */ |
383 | #define UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_PEIE)) |
| 384 | 384 | #define UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TXEIE)) |
|
| 385 | /** @defgroup UART_RECEPTION_TYPE_Values UART Reception type values |
385 | #define UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TCIE)) |
| 386 | * @{ |
386 | #define UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE)) |
| 387 | */ |
387 | #define UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE)) |
| 388 | #define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */ |
388 | |
| 389 | #define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */ |
389 | #define UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28U | USART_CR2_LBDIE)) |
| 390 | /** |
390 | |
| 391 | * @} |
391 | #define UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_CTSIE)) |
| 392 | */ |
392 | #define UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_EIE)) |
| 393 | 393 | /** |
|
| 394 | /** |
394 | * @} |
| 395 | * @} |
395 | */ |
| 396 | */ |
396 | |
| 397 | 397 | /** @defgroup UART_Reception_Type_Values UART Reception type values |
|
| 398 | /* Exported macro ------------------------------------------------------------*/ |
398 | * @{ |
| 399 | /** @defgroup UART_Exported_Macros UART Exported Macros |
399 | */ |
| 400 | * @{ |
400 | #define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */ |
| 401 | */ |
401 | #define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */ |
| 402 | 402 | /** |
|
| 403 | /** @brief Reset UART handle gstate & RxState |
403 | * @} |
| 404 | * @param __HANDLE__ specifies the UART Handle. |
404 | */ |
| 405 | * UART Handle selects the USARTx or UARTy peripheral |
405 | |
| 406 | * (USART,UART availability and x,y values depending on device). |
406 | /** @defgroup UART_RxEvent_Type_Values UART RxEvent type values |
| 407 | * @retval None |
407 | * @{ |
| 408 | */ |
408 | */ |
| 409 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
409 | #define HAL_UART_RXEVENT_TC (0x00000000U) /*!< RxEvent linked to Transfer Complete event */ |
| 410 | #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
410 | #define HAL_UART_RXEVENT_HT (0x00000001U) /*!< RxEvent linked to Half Transfer event */ |
| 411 | (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ |
411 | #define HAL_UART_RXEVENT_IDLE (0x00000002U) |
| 412 | (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ |
412 | /** |
| 413 | (__HANDLE__)->MspInitCallback = NULL; \ |
413 | * @} |
| 414 | (__HANDLE__)->MspDeInitCallback = NULL; \ |
414 | */ |
| 415 | } while(0U) |
415 | |
| 416 | #else |
416 | /** |
| 417 | #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
417 | * @} |
| 418 | (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ |
418 | */ |
| 419 | (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ |
419 | |
| 420 | } while(0U) |
420 | /* Exported macro ------------------------------------------------------------*/ |
| 421 | #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ |
421 | /** @defgroup UART_Exported_Macros UART Exported Macros |
| 422 | 422 | * @{ |
|
| 423 | /** @brief Flushes the UART DR register |
423 | */ |
| 424 | * @param __HANDLE__ specifies the UART Handle. |
424 | |
| 425 | * UART Handle selects the USARTx or UARTy peripheral |
425 | /** @brief Reset UART handle gstate & RxState |
| 426 | * (USART,UART availability and x,y values depending on device). |
426 | * @param __HANDLE__ specifies the UART Handle. |
| 427 | */ |
427 | * UART Handle selects the USARTx or UARTy peripheral |
| 428 | #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR) |
428 | * (USART,UART availability and x,y values depending on device). |
| 429 | 429 | * @retval None |
|
| 430 | /** @brief Checks whether the specified UART flag is set or not. |
430 | */ |
| 431 | * @param __HANDLE__ specifies the UART Handle. |
431 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
| 432 | * UART Handle selects the USARTx or UARTy peripheral |
432 | #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
| 433 | * (USART,UART availability and x,y values depending on device). |
433 | (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ |
| 434 | * @param __FLAG__ specifies the flag to check. |
434 | (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ |
| 435 | * This parameter can be one of the following values: |
435 | (__HANDLE__)->MspInitCallback = NULL; \ |
| 436 | * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5) |
436 | (__HANDLE__)->MspDeInitCallback = NULL; \ |
| 437 | * @arg UART_FLAG_LBD: LIN Break detection flag |
437 | } while(0U) |
| 438 | * @arg UART_FLAG_TXE: Transmit data register empty flag |
438 | #else |
| 439 | * @arg UART_FLAG_TC: Transmission Complete flag |
439 | #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
| 440 | * @arg UART_FLAG_RXNE: Receive data register not empty flag |
440 | (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ |
| 441 | * @arg UART_FLAG_IDLE: Idle Line detection flag |
441 | (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ |
| 442 | * @arg UART_FLAG_ORE: Overrun Error flag |
442 | } while(0U) |
| 443 | * @arg UART_FLAG_NE: Noise Error flag |
443 | #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ |
| 444 | * @arg UART_FLAG_FE: Framing Error flag |
444 | |
| 445 | * @arg UART_FLAG_PE: Parity Error flag |
445 | /** @brief Flushes the UART DR register |
| 446 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
446 | * @param __HANDLE__ specifies the UART Handle. |
| 447 | */ |
447 | * UART Handle selects the USARTx or UARTy peripheral |
| 448 | #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
448 | * (USART,UART availability and x,y values depending on device). |
| 449 | 449 | */ |
|
| 450 | /** @brief Clears the specified UART pending flag. |
450 | #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR) |
| 451 | * @param __HANDLE__ specifies the UART Handle. |
451 | |
| 452 | * UART Handle selects the USARTx or UARTy peripheral |
452 | /** @brief Checks whether the specified UART flag is set or not. |
| 453 | * (USART,UART availability and x,y values depending on device). |
453 | * @param __HANDLE__ specifies the UART Handle. |
| 454 | * @param __FLAG__ specifies the flag to check. |
454 | * UART Handle selects the USARTx or UARTy peripheral |
| 455 | * This parameter can be any combination of the following values: |
455 | * (USART,UART availability and x,y values depending on device). |
| 456 | * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5). |
456 | * @param __FLAG__ specifies the flag to check. |
| 457 | * @arg UART_FLAG_LBD: LIN Break detection flag. |
457 | * This parameter can be one of the following values: |
| 458 | * @arg UART_FLAG_TC: Transmission Complete flag. |
458 | * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5) |
| 459 | * @arg UART_FLAG_RXNE: Receive data register not empty flag. |
459 | * @arg UART_FLAG_LBD: LIN Break detection flag |
| 460 | * |
460 | * @arg UART_FLAG_TXE: Transmit data register empty flag |
| 461 | * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (Overrun |
461 | * @arg UART_FLAG_TC: Transmission Complete flag |
| 462 | * error) and IDLE (Idle line detected) flags are cleared by software |
462 | * @arg UART_FLAG_RXNE: Receive data register not empty flag |
| 463 | * sequence: a read operation to USART_SR register followed by a read |
463 | * @arg UART_FLAG_IDLE: Idle Line detection flag |
| 464 | * operation to USART_DR register. |
464 | * @arg UART_FLAG_ORE: Overrun Error flag |
| 465 | * @note RXNE flag can be also cleared by a read to the USART_DR register. |
465 | * @arg UART_FLAG_NE: Noise Error flag |
| 466 | * @note TC flag can be also cleared by software sequence: a read operation to |
466 | * @arg UART_FLAG_FE: Framing Error flag |
| 467 | * USART_SR register followed by a write operation to USART_DR register. |
467 | * @arg UART_FLAG_PE: Parity Error flag |
| 468 | * @note TXE flag is cleared only by a write to the USART_DR register. |
468 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| 469 | * |
469 | */ |
| 470 | * @retval None |
470 | #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
| 471 | */ |
471 | |
| 472 | #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__)) |
472 | /** @brief Clears the specified UART pending flag. |
| 473 | 473 | * @param __HANDLE__ specifies the UART Handle. |
|
| 474 | /** @brief Clears the UART PE pending flag. |
474 | * UART Handle selects the USARTx or UARTy peripheral |
| 475 | * @param __HANDLE__ specifies the UART Handle. |
475 | * (USART,UART availability and x,y values depending on device). |
| 476 | * UART Handle selects the USARTx or UARTy peripheral |
476 | * @param __FLAG__ specifies the flag to check. |
| 477 | * (USART,UART availability and x,y values depending on device). |
477 | * This parameter can be any combination of the following values: |
| 478 | * @retval None |
478 | * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5). |
| 479 | */ |
479 | * @arg UART_FLAG_LBD: LIN Break detection flag. |
| 480 | #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) \ |
480 | * @arg UART_FLAG_TC: Transmission Complete flag. |
| 481 | do{ \ |
481 | * @arg UART_FLAG_RXNE: Receive data register not empty flag. |
| 482 | __IO uint32_t tmpreg = 0x00U; \ |
482 | * |
| 483 | tmpreg = (__HANDLE__)->Instance->SR; \ |
483 | * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (Overrun |
| 484 | tmpreg = (__HANDLE__)->Instance->DR; \ |
484 | * error) and IDLE (Idle line detected) flags are cleared by software |
| 485 | UNUSED(tmpreg); \ |
485 | * sequence: a read operation to USART_SR register followed by a read |
| 486 | } while(0U) |
486 | * operation to USART_DR register. |
| 487 | 487 | * @note RXNE flag can be also cleared by a read to the USART_DR register. |
|
| 488 | /** @brief Clears the UART FE pending flag. |
488 | * @note TC flag can be also cleared by software sequence: a read operation to |
| 489 | * @param __HANDLE__ specifies the UART Handle. |
489 | * USART_SR register followed by a write operation to USART_DR register. |
| 490 | * UART Handle selects the USARTx or UARTy peripheral |
490 | * @note TXE flag is cleared only by a write to the USART_DR register. |
| 491 | * (USART,UART availability and x,y values depending on device). |
491 | * |
| 492 | * @retval None |
492 | * @retval None |
| 493 | */ |
493 | */ |
| 494 | #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
494 | #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__)) |
| 495 | 495 | ||
| 496 | /** @brief Clears the UART NE pending flag. |
496 | /** @brief Clears the UART PE pending flag. |
| 497 | * @param __HANDLE__ specifies the UART Handle. |
497 | * @param __HANDLE__ specifies the UART Handle. |
| 498 | * UART Handle selects the USARTx or UARTy peripheral |
498 | * UART Handle selects the USARTx or UARTy peripheral |
| 499 | * (USART,UART availability and x,y values depending on device). |
499 | * (USART,UART availability and x,y values depending on device). |
| 500 | * @retval None |
500 | * @retval None |
| 501 | */ |
501 | */ |
| 502 | #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
502 | #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) \ |
| 503 | 503 | do{ \ |
|
| 504 | /** @brief Clears the UART ORE pending flag. |
504 | __IO uint32_t tmpreg = 0x00U; \ |
| 505 | * @param __HANDLE__ specifies the UART Handle. |
505 | tmpreg = (__HANDLE__)->Instance->SR; \ |
| 506 | * UART Handle selects the USARTx or UARTy peripheral |
506 | tmpreg = (__HANDLE__)->Instance->DR; \ |
| 507 | * (USART,UART availability and x,y values depending on device). |
507 | UNUSED(tmpreg); \ |
| 508 | * @retval None |
508 | } while(0U) |
| 509 | */ |
509 | |
| 510 | #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
510 | /** @brief Clears the UART FE pending flag. |
| 511 | 511 | * @param __HANDLE__ specifies the UART Handle. |
|
| 512 | /** @brief Clears the UART IDLE pending flag. |
512 | * UART Handle selects the USARTx or UARTy peripheral |
| 513 | * @param __HANDLE__ specifies the UART Handle. |
513 | * (USART,UART availability and x,y values depending on device). |
| 514 | * UART Handle selects the USARTx or UARTy peripheral |
514 | * @retval None |
| 515 | * (USART,UART availability and x,y values depending on device). |
515 | */ |
| 516 | * @retval None |
516 | #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
| 517 | */ |
517 | |
| 518 | #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
518 | /** @brief Clears the UART NE pending flag. |
| 519 | 519 | * @param __HANDLE__ specifies the UART Handle. |
|
| 520 | /** @brief Enable the specified UART interrupt. |
520 | * UART Handle selects the USARTx or UARTy peripheral |
| 521 | * @param __HANDLE__ specifies the UART Handle. |
521 | * (USART,UART availability and x,y values depending on device). |
| 522 | * UART Handle selects the USARTx or UARTy peripheral |
522 | * @retval None |
| 523 | * (USART,UART availability and x,y values depending on device). |
523 | */ |
| 524 | * @param __INTERRUPT__ specifies the UART interrupt source to enable. |
524 | #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
| 525 | * This parameter can be one of the following values: |
525 | |
| 526 | * @arg UART_IT_CTS: CTS change interrupt |
526 | /** @brief Clears the UART ORE pending flag. |
| 527 | * @arg UART_IT_LBD: LIN Break detection interrupt |
527 | * @param __HANDLE__ specifies the UART Handle. |
| 528 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
528 | * UART Handle selects the USARTx or UARTy peripheral |
| 529 | * @arg UART_IT_TC: Transmission complete interrupt |
529 | * (USART,UART availability and x,y values depending on device). |
| 530 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
530 | * @retval None |
| 531 | * @arg UART_IT_IDLE: Idle line detection interrupt |
531 | */ |
| 532 | * @arg UART_IT_PE: Parity Error interrupt |
532 | #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
| 533 | * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
533 | |
| 534 | * @retval None |
534 | /** @brief Clears the UART IDLE pending flag. |
| 535 | */ |
535 | * @param __HANDLE__ specifies the UART Handle. |
| 536 | #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \ |
536 | * UART Handle selects the USARTx or UARTy peripheral |
| 537 | (((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \ |
537 | * (USART,UART availability and x,y values depending on device). |
| 538 | ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK))) |
538 | * @retval None |
| 539 | 539 | */ |
|
| 540 | /** @brief Disable the specified UART interrupt. |
540 | #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
| 541 | * @param __HANDLE__ specifies the UART Handle. |
541 | |
| 542 | * UART Handle selects the USARTx or UARTy peripheral |
542 | /** @brief Enable the specified UART interrupt. |
| 543 | * (USART,UART availability and x,y values depending on device). |
543 | * @param __HANDLE__ specifies the UART Handle. |
| 544 | * @param __INTERRUPT__ specifies the UART interrupt source to disable. |
544 | * UART Handle selects the USARTx or UARTy peripheral |
| 545 | * This parameter can be one of the following values: |
545 | * (USART,UART availability and x,y values depending on device). |
| 546 | * @arg UART_IT_CTS: CTS change interrupt |
546 | * @param __INTERRUPT__ specifies the UART interrupt source to enable. |
| 547 | * @arg UART_IT_LBD: LIN Break detection interrupt |
547 | * This parameter can be one of the following values: |
| 548 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
548 | * @arg UART_IT_CTS: CTS change interrupt |
| 549 | * @arg UART_IT_TC: Transmission complete interrupt |
549 | * @arg UART_IT_LBD: LIN Break detection interrupt |
| 550 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
550 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
| 551 | * @arg UART_IT_IDLE: Idle line detection interrupt |
551 | * @arg UART_IT_TC: Transmission complete interrupt |
| 552 | * @arg UART_IT_PE: Parity Error interrupt |
552 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
| 553 | * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
553 | * @arg UART_IT_IDLE: Idle line detection interrupt |
| 554 | * @retval None |
554 | * @arg UART_IT_PE: Parity Error interrupt |
| 555 | */ |
555 | * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
| 556 | #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ |
556 | * @retval None |
| 557 | (((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ |
557 | */ |
| 558 | ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK))) |
558 | #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \ |
| 559 | 559 | (((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \ |
|
| 560 | /** @brief Checks whether the specified UART interrupt source is enabled or not. |
560 | ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK))) |
| 561 | * @param __HANDLE__ specifies the UART Handle. |
561 | |
| 562 | * UART Handle selects the USARTx or UARTy peripheral |
562 | /** @brief Disable the specified UART interrupt. |
| 563 | * (USART,UART availability and x,y values depending on device). |
563 | * @param __HANDLE__ specifies the UART Handle. |
| 564 | * @param __IT__ specifies the UART interrupt source to check. |
564 | * UART Handle selects the USARTx or UARTy peripheral |
| 565 | * This parameter can be one of the following values: |
565 | * (USART,UART availability and x,y values depending on device). |
| 566 | * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5) |
566 | * @param __INTERRUPT__ specifies the UART interrupt source to disable. |
| 567 | * @arg UART_IT_LBD: LIN Break detection interrupt |
567 | * This parameter can be one of the following values: |
| 568 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
568 | * @arg UART_IT_CTS: CTS change interrupt |
| 569 | * @arg UART_IT_TC: Transmission complete interrupt |
569 | * @arg UART_IT_LBD: LIN Break detection interrupt |
| 570 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
570 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
| 571 | * @arg UART_IT_IDLE: Idle line detection interrupt |
571 | * @arg UART_IT_TC: Transmission complete interrupt |
| 572 | * @arg UART_IT_ERR: Error interrupt |
572 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
| 573 | * @retval The new state of __IT__ (TRUE or FALSE). |
573 | * @arg UART_IT_IDLE: Idle line detection interrupt |
| 574 | */ |
574 | * @arg UART_IT_PE: Parity Error interrupt |
| 575 | #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == UART_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == UART_CR2_REG_INDEX)? \ |
575 | * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
| 576 | (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK)) |
576 | * @retval None |
| 577 | 577 | */ |
|
| 578 | /** @brief Enable CTS flow control |
578 | #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ |
| 579 | * @note This macro allows to enable CTS hardware flow control for a given UART instance, |
579 | (((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ |
| 580 | * without need to call HAL_UART_Init() function. |
580 | ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK))) |
| 581 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
581 | |
| 582 | * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need |
582 | /** @brief Checks whether the specified UART interrupt source is enabled or not. |
| 583 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
583 | * @param __HANDLE__ specifies the UART Handle. |
| 584 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
584 | * UART Handle selects the USARTx or UARTy peripheral |
| 585 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
585 | * (USART,UART availability and x,y values depending on device). |
| 586 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
586 | * @param __IT__ specifies the UART interrupt source to check. |
| 587 | * @param __HANDLE__ specifies the UART Handle. |
587 | * This parameter can be one of the following values: |
| 588 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
588 | * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5) |
| 589 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
589 | * @arg UART_IT_LBD: LIN Break detection interrupt |
| 590 | * @retval None |
590 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
| 591 | */ |
591 | * @arg UART_IT_TC: Transmission complete interrupt |
| 592 | #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ |
592 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
| 593 | do{ \ |
593 | * @arg UART_IT_IDLE: Idle line detection interrupt |
| 594 | SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ |
594 | * @arg UART_IT_ERR: Error interrupt |
| 595 | (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ |
595 | * @retval The new state of __IT__ (TRUE or FALSE). |
| 596 | } while(0U) |
596 | */ |
| 597 | 597 | #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == UART_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == UART_CR2_REG_INDEX)? \ |
|
| 598 | /** @brief Disable CTS flow control |
598 | (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK)) |
| 599 | * @note This macro allows to disable CTS hardware flow control for a given UART instance, |
599 | |
| 600 | * without need to call HAL_UART_Init() function. |
600 | /** @brief Enable CTS flow control |
| 601 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
601 | * @note This macro allows to enable CTS hardware flow control for a given UART instance, |
| 602 | * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need |
602 | * without need to call HAL_UART_Init() function. |
| 603 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
603 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
| 604 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
604 | * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need |
| 605 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
605 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
| 606 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
606 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
| 607 | * @param __HANDLE__ specifies the UART Handle. |
607 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
| 608 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
608 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
| 609 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
609 | * @param __HANDLE__ specifies the UART Handle. |
| 610 | * @retval None |
610 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
| 611 | */ |
611 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
| 612 | #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ |
612 | * @retval None |
| 613 | do{ \ |
613 | */ |
| 614 | CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ |
614 | #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ |
| 615 | (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ |
615 | do{ \ |
| 616 | } while(0U) |
616 | ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ |
| 617 | 617 | (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ |
|
| 618 | /** @brief Enable RTS flow control |
618 | } while(0U) |
| 619 | * This macro allows to enable RTS hardware flow control for a given UART instance, |
619 | |
| 620 | * without need to call HAL_UART_Init() function. |
620 | /** @brief Disable CTS flow control |
| 621 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
621 | * @note This macro allows to disable CTS hardware flow control for a given UART instance, |
| 622 | * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need |
622 | * without need to call HAL_UART_Init() function. |
| 623 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
623 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
| 624 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
624 | * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need |
| 625 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
625 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
| 626 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
626 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
| 627 | * @param __HANDLE__ specifies the UART Handle. |
627 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
| 628 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
628 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
| 629 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
629 | * @param __HANDLE__ specifies the UART Handle. |
| 630 | * @retval None |
630 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
| 631 | */ |
631 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
| 632 | #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ |
632 | * @retval None |
| 633 | do{ \ |
633 | */ |
| 634 | SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ |
634 | #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ |
| 635 | (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ |
635 | do{ \ |
| 636 | } while(0U) |
636 | ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ |
| 637 | 637 | (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ |
|
| 638 | /** @brief Disable RTS flow control |
638 | } while(0U) |
| 639 | * This macro allows to disable RTS hardware flow control for a given UART instance, |
639 | |
| 640 | * without need to call HAL_UART_Init() function. |
640 | /** @brief Enable RTS flow control |
| 641 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
641 | * This macro allows to enable RTS hardware flow control for a given UART instance, |
| 642 | * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need |
642 | * without need to call HAL_UART_Init() function. |
| 643 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
643 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
| 644 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
644 | * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need |
| 645 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
645 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
| 646 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
646 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
| 647 | * @param __HANDLE__ specifies the UART Handle. |
647 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
| 648 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
648 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
| 649 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
649 | * @param __HANDLE__ specifies the UART Handle. |
| 650 | * @retval None |
650 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
| 651 | */ |
651 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
| 652 | #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ |
652 | * @retval None |
| 653 | do{ \ |
653 | */ |
| 654 | CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ |
654 | #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ |
| 655 | (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ |
655 | do{ \ |
| 656 | } while(0U) |
656 | ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ |
| 657 | 657 | (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ |
|
| 658 | /** @brief Macro to enable the UART's one bit sample method |
658 | } while(0U) |
| 659 | * @param __HANDLE__ specifies the UART Handle. |
659 | |
| 660 | * @retval None |
660 | /** @brief Disable RTS flow control |
| 661 | */ |
661 | * This macro allows to disable RTS hardware flow control for a given UART instance, |
| 662 | #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) |
662 | * without need to call HAL_UART_Init() function. |
| 663 | 663 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
|
| 664 | /** @brief Macro to disable the UART's one bit sample method |
664 | * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need |
| 665 | * @param __HANDLE__ specifies the UART Handle. |
665 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
| 666 | * @retval None |
666 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
| 667 | */ |
667 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
| 668 | #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT)) |
668 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
| 669 | 669 | * @param __HANDLE__ specifies the UART Handle. |
|
| 670 | /** @brief Enable UART |
670 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
| 671 | * @param __HANDLE__ specifies the UART Handle. |
671 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
| 672 | * @retval None |
672 | * @retval None |
| 673 | */ |
673 | */ |
| 674 | #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) |
674 | #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ |
| 675 | 675 | do{ \ |
|
| 676 | /** @brief Disable UART |
676 | ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ |
| 677 | * @param __HANDLE__ specifies the UART Handle. |
677 | (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ |
| 678 | * @retval None |
678 | } while(0U) |
| 679 | */ |
679 | |
| 680 | #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) |
680 | /** @brief Macro to enable the UART's one bit sample method |
| 681 | /** |
681 | * @param __HANDLE__ specifies the UART Handle. |
| 682 | * @} |
682 | * @retval None |
| 683 | */ |
683 | */ |
| 684 | 684 | #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) |
|
| 685 | /* Exported functions --------------------------------------------------------*/ |
685 | |
| 686 | /** @addtogroup UART_Exported_Functions |
686 | /** @brief Macro to disable the UART's one bit sample method |
| 687 | * @{ |
687 | * @param __HANDLE__ specifies the UART Handle. |
| 688 | */ |
688 | * @retval None |
| 689 | 689 | */ |
|
| 690 | /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions |
690 | #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3\ |
| 691 | * @{ |
691 | &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT)) |
| 692 | */ |
692 | |
| 693 | 693 | /** @brief Enable UART |
|
| 694 | /* Initialization/de-initialization functions **********************************/ |
694 | * @param __HANDLE__ specifies the UART Handle. |
| 695 | HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); |
695 | * @retval None |
| 696 | HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); |
696 | */ |
| 697 | HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); |
697 | #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) |
| 698 | HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); |
698 | |
| 699 | HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); |
699 | /** @brief Disable UART |
| 700 | void HAL_UART_MspInit(UART_HandleTypeDef *huart); |
700 | * @param __HANDLE__ specifies the UART Handle. |
| 701 | void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); |
701 | * @retval None |
| 702 | 702 | */ |
|
| 703 | /* Callbacks Register/UnRegister functions ***********************************/ |
703 | #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) |
| 704 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
704 | /** |
| 705 | HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, pUART_CallbackTypeDef pCallback); |
705 | * @} |
| 706 | HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); |
706 | */ |
| 707 | 707 | ||
| 708 | HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback); |
708 | /* Exported functions --------------------------------------------------------*/ |
| 709 | HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart); |
709 | /** @addtogroup UART_Exported_Functions |
| 710 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
710 | * @{ |
| 711 | 711 | */ |
|
| 712 | /** |
712 | |
| 713 | * @} |
713 | /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions |
| 714 | */ |
714 | * @{ |
| 715 | 715 | */ |
|
| 716 | /** @addtogroup UART_Exported_Functions_Group2 IO operation functions |
716 | |
| 717 | * @{ |
717 | /* Initialization/de-initialization functions **********************************/ |
| 718 | */ |
718 | HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); |
| 719 | 719 | HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); |
|
| 720 | /* IO operation functions *******************************************************/ |
720 | HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); |
| 721 | HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
721 | HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); |
| 722 | HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
722 | HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); |
| 723 | HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
723 | void HAL_UART_MspInit(UART_HandleTypeDef *huart); |
| 724 | HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
724 | void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); |
| 725 | HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
725 | |
| 726 | HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
726 | /* Callbacks Register/UnRegister functions ***********************************/ |
| 727 | HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); |
727 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
| 728 | HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); |
728 | HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, |
| 729 | HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); |
729 | pUART_CallbackTypeDef pCallback); |
| 730 | 730 | HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); |
|
| 731 | HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen, uint32_t Timeout); |
731 | |
| 732 | HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
732 | HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback); |
| 733 | HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
733 | HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart); |
| 734 | 734 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
|
| 735 | /* Transfer Abort functions */ |
735 | |
| 736 | HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); |
736 | /** |
| 737 | HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); |
737 | * @} |
| 738 | HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); |
738 | */ |
| 739 | HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); |
739 | |
| 740 | HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); |
740 | /** @addtogroup UART_Exported_Functions_Group2 IO operation functions |
| 741 | HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); |
741 | * @{ |
| 742 | 742 | */ |
|
| 743 | void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); |
743 | |
| 744 | void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); |
744 | /* IO operation functions *******************************************************/ |
| 745 | void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); |
745 | HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| 746 | void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); |
746 | HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| 747 | void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); |
747 | HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); |
| 748 | void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); |
748 | HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
| 749 | void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); |
749 | HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); |
| 750 | void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); |
750 | HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
| 751 | void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); |
751 | HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); |
| 752 | 752 | HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); |
|
| 753 | void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size); |
753 | HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); |
| 754 | 754 | ||
| 755 | /** |
755 | HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen, |
| 756 | * @} |
756 | uint32_t Timeout); |
| 757 | */ |
757 | HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
| 758 | 758 | HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
|
| 759 | /** @addtogroup UART_Exported_Functions_Group3 |
759 | |
| 760 | * @{ |
760 | HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(UART_HandleTypeDef *huart); |
| 761 | */ |
761 | |
| 762 | /* Peripheral Control functions ************************************************/ |
762 | /* Transfer Abort functions */ |
| 763 | HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); |
763 | HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); |
| 764 | HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); |
764 | HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); |
| 765 | HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart); |
765 | HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); |
| 766 | HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); |
766 | HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); |
| 767 | HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); |
767 | HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); |
| 768 | /** |
768 | HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); |
| 769 | * @} |
769 | |
| 770 | */ |
770 | void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); |
| 771 | 771 | void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); |
|
| 772 | /** @addtogroup UART_Exported_Functions_Group4 |
772 | void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); |
| 773 | * @{ |
773 | void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); |
| 774 | */ |
774 | void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); |
| 775 | /* Peripheral State functions **************************************************/ |
775 | void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); |
| 776 | HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart); |
776 | void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); |
| 777 | uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart); |
777 | void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); |
| 778 | /** |
778 | void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); |
| 779 | * @} |
779 | |
| 780 | */ |
780 | void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size); |
| 781 | 781 | ||
| 782 | /** |
782 | /** |
| 783 | * @} |
783 | * @} |
| 784 | */ |
784 | */ |
| 785 | /* Private types -------------------------------------------------------------*/ |
785 | |
| 786 | /* Private variables ---------------------------------------------------------*/ |
786 | /** @addtogroup UART_Exported_Functions_Group3 |
| 787 | /* Private constants ---------------------------------------------------------*/ |
787 | * @{ |
| 788 | /** @defgroup UART_Private_Constants UART Private Constants |
788 | */ |
| 789 | * @{ |
789 | /* Peripheral Control functions ************************************************/ |
| 790 | */ |
790 | HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); |
| 791 | /** @brief UART interruptions flag mask |
791 | HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); |
| 792 | * |
792 | HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart); |
| 793 | */ |
793 | HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); |
| 794 | #define UART_IT_MASK 0x0000FFFFU |
794 | HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); |
| 795 | 795 | /** |
|
| 796 | #define UART_CR1_REG_INDEX 1U |
796 | * @} |
| 797 | #define UART_CR2_REG_INDEX 2U |
797 | */ |
| 798 | #define UART_CR3_REG_INDEX 3U |
798 | |
| 799 | /** |
799 | /** @addtogroup UART_Exported_Functions_Group4 |
| 800 | * @} |
800 | * @{ |
| 801 | */ |
801 | */ |
| 802 | 802 | /* Peripheral State functions **************************************************/ |
|
| 803 | /* Private macros ------------------------------------------------------------*/ |
803 | HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart); |
| 804 | /** @defgroup UART_Private_Macros UART Private Macros |
804 | uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart); |
| 805 | * @{ |
805 | /** |
| 806 | */ |
806 | * @} |
| 807 | #define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \ |
807 | */ |
| 808 | ((LENGTH) == UART_WORDLENGTH_9B)) |
808 | |
| 809 | #define IS_UART_LIN_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B)) |
809 | /** |
| 810 | #define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \ |
810 | * @} |
| 811 | ((STOPBITS) == UART_STOPBITS_2)) |
811 | */ |
| 812 | #define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \ |
812 | /* Private types -------------------------------------------------------------*/ |
| 813 | ((PARITY) == UART_PARITY_EVEN) || \ |
813 | /* Private variables ---------------------------------------------------------*/ |
| 814 | ((PARITY) == UART_PARITY_ODD)) |
814 | /* Private constants ---------------------------------------------------------*/ |
| 815 | #define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\ |
815 | /** @defgroup UART_Private_Constants UART Private Constants |
| 816 | (((CONTROL) == UART_HWCONTROL_NONE) || \ |
816 | * @{ |
| 817 | ((CONTROL) == UART_HWCONTROL_RTS) || \ |
817 | */ |
| 818 | ((CONTROL) == UART_HWCONTROL_CTS) || \ |
818 | /** @brief UART interruptions flag mask |
| 819 | ((CONTROL) == UART_HWCONTROL_RTS_CTS)) |
819 | * |
| 820 | #define IS_UART_MODE(MODE) ((((MODE) & 0x0000FFF3U) == 0x00U) && ((MODE) != 0x00U)) |
820 | */ |
| 821 | #define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \ |
821 | #define UART_IT_MASK 0x0000FFFFU |
| 822 | ((STATE) == UART_STATE_ENABLE)) |
822 | |
| 823 | #define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \ |
823 | #define UART_CR1_REG_INDEX 1U |
| 824 | ((SAMPLING) == UART_OVERSAMPLING_8)) |
824 | #define UART_CR2_REG_INDEX 2U |
| 825 | #define IS_UART_LIN_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16)) |
825 | #define UART_CR3_REG_INDEX 3U |
| 826 | #define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \ |
826 | /** |
| 827 | ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B)) |
827 | * @} |
| 828 | #define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \ |
828 | */ |
| 829 | ((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK)) |
829 | |
| 830 | #define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) <= 4000000U) |
830 | /* Private macros ------------------------------------------------------------*/ |
| 831 | #define IS_UART_ADDRESS(ADDRESS) ((ADDRESS) <= 0x0FU) |
831 | /** @defgroup UART_Private_Macros UART Private Macros |
| 832 | 832 | * @{ |
|
| 833 | #define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(4U*(_BAUD_))) |
833 | */ |
| 834 | #define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100U) |
834 | #define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \ |
| 835 | #define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100U)) * 16U) + 50U) / 100U) |
835 | ((LENGTH) == UART_WORDLENGTH_9B)) |
| 836 | /* UART BRR = mantissa + overflow + fraction |
836 | #define IS_UART_LIN_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B)) |
| 837 | = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */ |
837 | #define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \ |
| 838 | #define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4U) + \ |
838 | ((STOPBITS) == UART_STOPBITS_2)) |
| 839 | (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0U)) + \ |
839 | #define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \ |
| 840 | (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0FU)) |
840 | ((PARITY) == UART_PARITY_EVEN) || \ |
| 841 | 841 | ((PARITY) == UART_PARITY_ODD)) |
|
| 842 | #define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(2U*(_BAUD_))) |
842 | #define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\ |
| 843 | #define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100U) |
843 | (((CONTROL) == UART_HWCONTROL_NONE) || \ |
| 844 | #define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100U)) * 8U) + 50U) / 100U) |
844 | ((CONTROL) == UART_HWCONTROL_RTS) || \ |
| 845 | /* UART BRR = mantissa + overflow + fraction |
845 | ((CONTROL) == UART_HWCONTROL_CTS) || \ |
| 846 | = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07U) */ |
846 | ((CONTROL) == UART_HWCONTROL_RTS_CTS)) |
| 847 | #define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4U) + \ |
847 | #define IS_UART_MODE(MODE) ((((MODE) & 0x0000FFF3U) == 0x00U) && ((MODE) != 0x00U)) |
| 848 | ((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8U) << 1U)) + \ |
848 | #define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \ |
| 849 | (UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x07U)) |
849 | ((STATE) == UART_STATE_ENABLE)) |
| 850 | 850 | #define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \ |
|
| 851 | /** |
851 | ((SAMPLING) == UART_OVERSAMPLING_8)) |
| 852 | * @} |
852 | #define IS_UART_LIN_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16)) |
| 853 | */ |
853 | #define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \ |
| 854 | 854 | ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B)) |
|
| 855 | /* Private functions ---------------------------------------------------------*/ |
855 | #define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \ |
| 856 | /** @defgroup UART_Private_Functions UART Private Functions |
856 | ((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK)) |
| 857 | * @{ |
857 | #define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) <= 4000000U) |
| 858 | */ |
858 | #define IS_UART_ADDRESS(ADDRESS) ((ADDRESS) <= 0x0FU) |
| 859 | 859 | ||
| 860 | HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
860 | #define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(4U*(_BAUD_))) |
| 861 | HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
861 | #define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100U) |
| 862 | 862 | #define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100U)) * 16U)\ |
|
| 863 | /** |
863 | + 50U) / 100U) |
| 864 | * @} |
864 | /* UART BRR = mantissa + overflow + fraction |
| 865 | */ |
865 | = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */ |
| 866 | 866 | #define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4U) + \ |
|
| 867 | /** |
867 | (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0U)) + \ |
| 868 | * @} |
868 | (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0FU)) |
| 869 | */ |
869 | |
| 870 | 870 | #define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(2U*(_BAUD_))) |
|
| 871 | /** |
871 | #define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100U) |
| 872 | * @} |
872 | #define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100U)) * 8U)\ |
| 873 | */ |
873 | + 50U) / 100U) |
| 874 | 874 | /* UART BRR = mantissa + overflow + fraction |
|
| 875 | #ifdef __cplusplus |
875 | = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07U) */ |
| 876 | } |
876 | #define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4U) + \ |
| 877 | #endif |
877 | ((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8U) << 1U)) + \ |
| 878 | 878 | (UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x07U)) |
|
| 879 | #endif /* __STM32L1xx_HAL_UART_H */ |
879 | |
| 880 | 880 | /** |
|
| 881 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
881 | * @} |
| - | 882 | */ |
|
| - | 883 | ||
| - | 884 | /* Private functions ---------------------------------------------------------*/ |
|
| - | 885 | /** @defgroup UART_Private_Functions UART Private Functions |
|
| - | 886 | * @{ |
|
| - | 887 | */ |
|
| - | 888 | ||
| - | 889 | HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
|
| - | 890 | HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
|
| - | 891 | ||
| - | 892 | /** |
|
| - | 893 | * @} |
|
| - | 894 | */ |
|
| - | 895 | ||
| - | 896 | /** |
|
| - | 897 | * @} |
|
| - | 898 | */ |
|
| - | 899 | ||
| - | 900 | /** |
|
| - | 901 | * @} |
|
| - | 902 | */ |
|
| - | 903 | ||
| - | 904 | #ifdef __cplusplus |
|
| - | 905 | } |
|
| - | 906 | #endif |
|
| - | 907 | ||
| - | 908 | #endif /* __STM32L1xx_HAL_UART_H */ |
|
| - | 909 | ||