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/**
 1 
/**
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  ******************************************************************************
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  ******************************************************************************
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  * @file    stm32l1xx_hal_tim_ex.h
 3 
  * @file    stm32l1xx_hal_tim_ex.h
4 
  * @author  MCD Application Team
 4 
  * @author  MCD Application Team
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  * @brief   Header file of TIM HAL Extended module.
 5 
  * @brief   Header file of TIM HAL Extended module.
6 
  ******************************************************************************
 6 
  ******************************************************************************
7 
  * @attention
 7 
  * @attention
8 
  *
 8 
  *
9 
  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
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  * Copyright (c) 2016 STMicroelectronics.
10 
  * All rights reserved.</center></h2>
 10 
  * All rights reserved.
11 
  *
 11 
  *
12 
  * This software component is licensed by ST under BSD 3-Clause license,
 12 
  * This software is licensed under terms that can be found in the LICENSE file
13 
  * the "License"; You may not use this file except in compliance with the
 13 
  * in the root directory of this software component.
14 
  * License. You may obtain a copy of the License at:
 14 
  * If no LICENSE file comes with this software, it is provided AS-IS.
15 
  *                        opensource.org/licenses/BSD-3-Clause
 15 
  *
16 
  *
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  ******************************************************************************
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  ******************************************************************************
 17 
  */
18 
  */
 18 
 
19 
 
 19 
/* Define to prevent recursive inclusion -------------------------------------*/
20 
/* Define to prevent recursive inclusion -------------------------------------*/
 20 
#ifndef STM32L1xx_HAL_TIM_EX_H
21 
#ifndef STM32L1xx_HAL_TIM_EX_H
 21 
#define STM32L1xx_HAL_TIM_EX_H
22 
#define STM32L1xx_HAL_TIM_EX_H
 22 
 
23 
 
 23 
#ifdef __cplusplus
24 
#ifdef __cplusplus
 24 
extern "C" {
25 
extern "C" {
 25 
#endif
26 
#endif
 26 
 
27 
 
 27 
/* Includes ------------------------------------------------------------------*/
28 
/* Includes ------------------------------------------------------------------*/
 28 
#include "stm32l1xx_hal_def.h"
29 
#include "stm32l1xx_hal_def.h"
 29 
 
30 
 
 30 
/** @addtogroup STM32L1xx_HAL_Driver
31 
/** @addtogroup STM32L1xx_HAL_Driver
 31 
  * @{
32 
  * @{
 32 
  */
33 
  */
 33 
 
34 
 
 34 
/** @addtogroup TIMEx
35 
/** @addtogroup TIMEx
 35 
  * @{
36 
  * @{
 36 
  */
37 
  */
 37 
 
38 
 
 38 
/* Exported types ------------------------------------------------------------*/
39 
/* Exported types ------------------------------------------------------------*/
 39 
/** @defgroup TIMEx_Exported_Types TIM Extended Exported Types
40 
/** @defgroup TIMEx_Exported_Types TIM Extended Exported Types
 40 
  * @{
41 
  * @{
 41 
  */
42 
  */
 42 
 
43 
 
 43 
/**
44 
/**
 44 
  * @}
45 
  * @}
 45 
  */
46 
  */
 46 
/* End of exported types -----------------------------------------------------*/
47 
/* End of exported types -----------------------------------------------------*/
 47 
 
48 
 
 48 
/* Exported constants --------------------------------------------------------*/
49 
/* Exported constants --------------------------------------------------------*/
 49 
/** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants
50 
/** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants
 50 
  * @{
51 
  * @{
 51 
  */
52 
  */
 52 
 
53 
 
 53 
/** @defgroup TIMEx_Remap TIM Extended Remapping
54 
/** @defgroup TIMEx_Remap TIM Extended Remapping
 54 
  * @{
55 
  * @{
 55 
  */
56 
  */
 56 
/* @note STM32L1XX devices are organized in 6 categories: Cat.1, Cat.2, Cat.3, Cat.4, Cat.5, Cat.6.
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/* @note STM32L1XX devices are organized in 6 categories: Cat.1, Cat.2, Cat.3, Cat.4, Cat.5, Cat.6.
 57 
         Remap capabilities depend on the device category. As the DMA2 controller is available only in
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         Remap capabilities depend on the device category. As the DMA2 controller is available only in
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         Cat.3, Cat.4,Cat.5 and Cat.6 devices it is used to discriminate Cat.1 and Cat.2 devices v.s.
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         Cat.3, Cat.4,Cat.5 and Cat.6 devices it is used to discriminate Cat.1 and Cat.2 devices v.s.
 59 
         Cat.3, Cat.4, Cat.5 and Cat.6 devices. */
60 
         Cat.3, Cat.4, Cat.5 and Cat.6 devices. */
 60 
#if defined(DMA2)
61 
#if defined(DMA2)
 61 
#define TIM_TIM2_ITR1_TIM10_OC        (0x00000000)       /*!< TIM2 ITR1 input is connected to TIM10 OC */
62 
#define TIM_TIM2_ITR1_TIM10_OC        (0x00000000)       /*!< TIM2 ITR1 input is connected to TIM10 OC */
 62 
#define TIM_TIM2_ITR1_TIM5_TGO        TIM2_OR_ITR1_RMP   /*!< TIM2 ITR1 input is connected to TIM5 TGO */
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#define TIM_TIM2_ITR1_TIM5_TGO        TIM2_OR_ITR1_RMP   /*!< TIM2 ITR1 input is connected to TIM5 TGO */
 63 
#endif /* DMA2 */
64 
#endif /* DMA2 */
 64 
 
65 
 
 65 
#if defined(DMA2)
66 
#if defined(DMA2)
 66 
#define TIM_TIM3_ITR2_TIM11_OC        (0x00000000)       /*!< TIM3 ITR2 input is connected to TIM11 OC */
67 
#define TIM_TIM3_ITR2_TIM11_OC        (0x00000000)       /*!< TIM3 ITR2 input is connected to TIM11 OC */
 67 
#define TIM_TIM3_ITR2_TIM5_TGO        TIM2_OR_ITR1_RMP   /*!< TIM3 ITR2 input is connected to TIM5 TGO */
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#define TIM_TIM3_ITR2_TIM5_TGO        TIM2_OR_ITR1_RMP   /*!< TIM3 ITR2 input is connected to TIM5 TGO */
 68 
#endif /* DMA2 */
69 
#endif /* DMA2 */
 69 
 
70 
 
 70 
#if defined(DMA2)
71 
#if defined(DMA2)
 71 
#define TIM_TIM9_ITR1_TIM3_TGO        (0x00000000)       /*!< TIM9 ITR1 input is connected to TIM3 TGO */
72 
#define TIM_TIM9_ITR1_TIM3_TGO        (0x00000000)       /*!< TIM9 ITR1 input is connected to TIM3 TGO */
 72 
#define TIM_TIM9_ITR1_TS              TIM9_OR_ITR1_RMP   /*!< TIM9 ITR1 input is connected to touch sensing I/O */
73 
#define TIM_TIM9_ITR1_TS              TIM9_OR_ITR1_RMP   /*!< TIM9 ITR1 input is connected to touch sensing I/O */
 73 
#endif /* DMA2 */
74 
#endif /* DMA2 */
 74 
#define TIM_TIM9_GPIO                 (0x00000000)       /*!< TIM9 Channel1 is connected to GPIO */
75 
#define TIM_TIM9_GPIO                 (0x00000000)       /*!< TIM9 Channel1 is connected to GPIO */
 75 
#define TIM_TIM9_LSE                  TIM_OR_TI1RMP_0    /*!< TIM9 Channel1 is connected to LSE internal clock */
76 
#define TIM_TIM9_LSE                  TIM_OR_TI1RMP_0    /*!< TIM9 Channel1 is connected to LSE internal clock */
 76 
#define TIM_TIM9_GPIO1                TIM_OR_TI1RMP_1    /*!< TIM9 Channel1 is connected to GPIO */
77 
#define TIM_TIM9_GPIO1                TIM_OR_TI1RMP_1    /*!< TIM9 Channel1 is connected to GPIO */
 77 
#define TIM_TIM9_GPIO2                TIM_OR_TI1RMP      /*!< TIM9 Channel1 is connected to GPIO */
78 
#define TIM_TIM9_GPIO2                TIM_OR_TI1RMP      /*!< TIM9 Channel1 is connected to GPIO */
 78 
 
79 
 
 79 
#if defined(DMA2)
80 
#if defined(DMA2)
 80 
#define TIM_TIM10_TI1RMP              (0x00000000)       /*!< TIM10 Channel 1 depends on TI1_RMP */
81 
#define TIM_TIM10_TI1RMP              (0x00000000)       /*!< TIM10 Channel 1 depends on TI1_RMP */
 81 
#define TIM_TIM10_RI                  TIM_OR_TI1_RMP_RI  /*!< TIM10 Channel 1 is connected to RI */
82 
#define TIM_TIM10_RI                  TIM_OR_TI1_RMP_RI  /*!< TIM10 Channel 1 is connected to RI */
 82 
#define TIM_TIM10_ETR_LSE             (0x00000000)       /*!< TIM10 ETR input is connected to LSE clock */
83 
#define TIM_TIM10_ETR_LSE             (0x00000000)       /*!< TIM10 ETR input is connected to LSE clock */
 83 
#define TIM_TIM10_ETR_TIM9_TGO        TIM_OR_ETR_RMP     /*!< TIM10 ETR input is connected to TIM9 TGO */
84 
#define TIM_TIM10_ETR_TIM9_TGO        TIM_OR_ETR_RMP     /*!< TIM10 ETR input is connected to TIM9 TGO */
 84 
#endif /* DMA2 */
85 
#endif /* DMA2 */
 85 
#define TIM_TIM10_GPIO                (0x00000000)       /*!< TIM10 Channel1 is connected to GPIO */
86 
#define TIM_TIM10_GPIO                (0x00000000)       /*!< TIM10 Channel1 is connected to GPIO */
 86 
#define TIM_TIM10_LSI                 TIM_OR_TI1RMP_0    /*!< TIM10 Channel1 is connected to LSI internal clock */
87 
#define TIM_TIM10_LSI                 TIM_OR_TI1RMP_0    /*!< TIM10 Channel1 is connected to LSI internal clock */
 87 
#define TIM_TIM10_LSE                 TIM_OR_TI1RMP_1    /*!< TIM10 Channel1 is connected to LSE internal clock */
88 
#define TIM_TIM10_LSE                 TIM_OR_TI1RMP_1    /*!< TIM10 Channel1 is connected to LSE internal clock */
 88 
#define TIM_TIM10_RTC                 TIM_OR_TI1RMP      /*!< TIM10 Channel1 is connected to RTC wakeup interrupt */
89 
#define TIM_TIM10_RTC                 TIM_OR_TI1RMP      /*!< TIM10 Channel1 is connected to RTC wakeup interrupt */
 89 
 
90 
 
 90 
#if defined(DMA2)
91 
#if defined(DMA2)
 91 
#define TIM_TIM11_TI1RMP              (0x00000000)       /*!< TIM11 Channel 1 depends on TI1_RMP */
92 
#define TIM_TIM11_TI1RMP              (0x00000000)       /*!< TIM11 Channel 1 depends on TI1_RMP */
 92 
#define TIM_TIM11_RI                  TIM_OR_TI1_RMP_RI  /*!< TIM11 Channel 1 is connected to RI */
93 
#define TIM_TIM11_RI                  TIM_OR_TI1_RMP_RI  /*!< TIM11 Channel 1 is connected to RI */
 93 
#define TIM_TIM11_ETR_LSE             (0x00000000)       /*!< TIM11 ETR input is connected to LSE clock */
94 
#define TIM_TIM11_ETR_LSE             (0x00000000)       /*!< TIM11 ETR input is connected to LSE clock */
 94 
#define TIM_TIM11_ETR_TIM9_TGO        TIM_OR_ETR_RMP     /*!< TIM11 ETR input is connected to TIM9 TGO */
95 
#define TIM_TIM11_ETR_TIM9_TGO        TIM_OR_ETR_RMP     /*!< TIM11 ETR input is connected to TIM9 TGO */
 95 
#endif /* DMA2 */
96 
#endif /* DMA2 */
 96 
#define TIM_TIM11_GPIO                (0x00000000)       /*!< TIM11 Channel1 is connected to GPIO */
97 
#define TIM_TIM11_GPIO                (0x00000000)       /*!< TIM11 Channel1 is connected to GPIO */
 97 
#define TIM_TIM11_MSI                 TIM_OR_TI1RMP_0    /*!< TIM11 Channel1 is connected to MSI internal clock */
98 
#define TIM_TIM11_MSI                 TIM_OR_TI1RMP_0    /*!< TIM11 Channel1 is connected to MSI internal clock */
 98 
#define TIM_TIM11_HSE_RTC             TIM_OR_TI1RMP_1    /*!< TIM11 Channel1 is connected to HSE_RTC clock */
99 
#define TIM_TIM11_HSE_RTC             TIM_OR_TI1RMP_1    /*!< TIM11 Channel1 is connected to HSE_RTC clock */
 99 
#define TIM_TIM11_GPIO1               TIM_OR_TI1RMP      /*!< TIM11 Channel1 is connected to GPIO */
100 
#define TIM_TIM11_GPIO1               TIM_OR_TI1RMP      /*!< TIM11 Channel1 is connected to GPIO */
 100 
/**
101 
/**
 101 
  * @}
102 
  * @}
 102 
  */
103 
  */
 103 
 
104 
 
 104 
/**
105 
/**
 105 
  * @}
106 
  * @}
 106 
  */
107 
  */
 107 
/* End of exported constants -------------------------------------------------*/
108 
/* End of exported constants -------------------------------------------------*/
 108 
 
109 
 
 109 
/* Exported macro ------------------------------------------------------------*/
110 
/* Exported macro ------------------------------------------------------------*/
 110 
/** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros
111 
/** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros
 111 
  * @{
112 
  * @{
 112 
  */
113 
  */
 113 
 
114 
 
 114 
/**
115 
/**
 115 
  * @}
116 
  * @}
 116 
  */
117 
  */
 117 
/* End of exported macro -----------------------------------------------------*/
118 
/* End of exported macro -----------------------------------------------------*/
 118 
 
119 
 
 119 
/* Private macro -------------------------------------------------------------*/
120 
/* Private macro -------------------------------------------------------------*/
 120 
/** @defgroup TIMEx_Private_Macros TIM Extended Private Macros
121 
/** @defgroup TIMEx_Private_Macros TIM Extended Private Macros
 121 
  * @{
122 
  * @{
 122 
  */
123 
  */
 123 
#if defined(DMA2)
124 
#if defined(DMA2)
 124 
#define IS_TIM_REMAP(INSTANCE, TIM_REMAP)               \
125 
#define IS_TIM_REMAP(INSTANCE, TIM_REMAP)               \
 125 
  ( (((INSTANCE) == TIM2)  && (((TIM_REMAP) == TIM_TIM2_ITR1_TIM10_OC) || ((TIM_REMAP) == TIM_TIM2_ITR1_TIM5_TGO)))  || \
126 
  ( (((INSTANCE) == TIM2)  && (((TIM_REMAP) == TIM_TIM2_ITR1_TIM10_OC) || ((TIM_REMAP) == TIM_TIM2_ITR1_TIM5_TGO)))  || \
 126 
    (((INSTANCE) == TIM3)  && (((TIM_REMAP) == TIM_TIM3_ITR2_TIM11_OC) || ((TIM_REMAP) == TIM_TIM3_ITR2_TIM5_TGO)))  || \
127 
    (((INSTANCE) == TIM3)  && (((TIM_REMAP) == TIM_TIM3_ITR2_TIM11_OC) || ((TIM_REMAP) == TIM_TIM3_ITR2_TIM5_TGO)))  || \
 127 
    (((INSTANCE) == TIM9)  && ((TIM_REMAP) <= (TIM_TIM9_ITR1_TS | TIM_TIM9_GPIO2)))                                  || \
128 
    (((INSTANCE) == TIM9)  && ((TIM_REMAP) <= (TIM_TIM9_ITR1_TS | TIM_TIM9_GPIO2)))                                  || \
 128 
    (((INSTANCE) == TIM10) && ((TIM_REMAP) <= (TIM_TIM10_RI | TIM_TIM10_ETR_TIM9_TGO | TIM_TIM10_RTC)))              || \
129 
    (((INSTANCE) == TIM10) && ((TIM_REMAP) <= (TIM_TIM10_RI | TIM_TIM10_ETR_TIM9_TGO | TIM_TIM10_RTC)))              || \
 129 
    (((INSTANCE) == TIM11) && ((TIM_REMAP) <= (TIM_TIM11_RI | TIM_TIM11_ETR_TIM9_TGO | TIM_TIM11_GPIO1)))               \
130 
    (((INSTANCE) == TIM11) && ((TIM_REMAP) <= (TIM_TIM11_RI | TIM_TIM11_ETR_TIM9_TGO | TIM_TIM11_GPIO1)))               \
 130 
  )
131 
  )
 131 
#else
132 
#else
 132 
#define IS_TIM_REMAP(INSTANCE, TIM_REMAP)               \
133 
#define IS_TIM_REMAP(INSTANCE, TIM_REMAP)               \
 133 
  ( (((INSTANCE) == TIM9)  && (((TIM_REMAP) == TIM_TIM9_GPIO) || ((TIM_REMAP) == TIM_TIM9_LSE) || ((TIM_REMAP) == TIM_TIM9_GPIO1) || ((TIM_REMAP) == TIM_TIM9_GPIO2)))       || \
134 
  ( (((INSTANCE) == TIM9)  && (((TIM_REMAP) == TIM_TIM9_GPIO) || ((TIM_REMAP) == TIM_TIM9_LSE) || ((TIM_REMAP) == TIM_TIM9_GPIO1) || ((TIM_REMAP) == TIM_TIM9_GPIO2)))       || \
 134 
    (((INSTANCE) == TIM10) && (((TIM_REMAP) == TIM_TIM10_GPIO) || ((TIM_REMAP) == TIM_TIM10_LSI) || ((TIM_REMAP) == TIM_TIM10_LSE) || ((TIM_REMAP) == TIM_TIM10_RTC)))       || \
135 
    (((INSTANCE) == TIM10) && (((TIM_REMAP) == TIM_TIM10_GPIO) || ((TIM_REMAP) == TIM_TIM10_LSI) || ((TIM_REMAP) == TIM_TIM10_LSE) || ((TIM_REMAP) == TIM_TIM10_RTC)))       || \
 135 
    (((INSTANCE) == TIM11) && (((TIM_REMAP) == TIM_TIM11_GPIO) || ((TIM_REMAP) == TIM_TIM11_MSI) || ((TIM_REMAP) == TIM_TIM11_HSE_RTC) || ((TIM_REMAP) == TIM_TIM11_GPIO1)))    \
136 
    (((INSTANCE) == TIM11) && (((TIM_REMAP) == TIM_TIM11_GPIO) || ((TIM_REMAP) == TIM_TIM11_MSI) || ((TIM_REMAP) == TIM_TIM11_HSE_RTC) || ((TIM_REMAP) == TIM_TIM11_GPIO1)))    \
 136 
  )
137 
  )
 137 
#endif /* DMA2 */
138 
#endif /* DMA2 */
 138 
 
139 
 
 139 
/**
140 
/**
 140 
  * @}
141 
  * @}
 141 
  */
142 
  */
 142 
/* End of private macro ------------------------------------------------------*/
143 
/* End of private macro ------------------------------------------------------*/
 143 
 
144 
 
 144 
/* Exported functions --------------------------------------------------------*/
145 
/* Exported functions --------------------------------------------------------*/
 145 
/** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions
146 
/** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions
 146 
  * @{
147 
  * @{
 147 
  */
148 
  */
 148 
 
149 
 
 149 
/** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
150 
/** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
 150 
  *  @brief    Peripheral Control functions
151 
  *  @brief    Peripheral Control functions
 151 
  * @{
152 
  * @{
 152 
  */
153 
  */
 153 
/* Extended Control functions  ************************************************/
154 
/* Extended Control functions  ************************************************/
 154 
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
155 
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
 155 
                                                        const TIM_MasterConfigTypeDef *sMasterConfig);
156 
                                                        TIM_MasterConfigTypeDef *sMasterConfig);
 156 
HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
157 
HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
 157 
/**
158 
/**
 158 
  * @}
159 
  * @}
 159 
  */
160 
  */
 160 
 
161 
 
 161 
/**
162 
/**
 162 
  * @}
163 
  * @}
 163 
  */
164 
  */
 164 
/* End of exported functions -------------------------------------------------*/
165 
/* End of exported functions -------------------------------------------------*/
 165 
 
166 
 
 166 
/**
167 
/**
 167 
  * @}
168 
  * @}
 168 
  */
169 
  */
 169 
 
170 
 
 170 
/**
171 
/**
 171 
  * @}
172 
  * @}
 172 
  */
173 
  */
 173 
 
174 
 
 174 
#ifdef __cplusplus
175 
#ifdef __cplusplus
 175 
}
176 
}
 176 
#endif
177 
#endif
 177 
 
178 
 
 178 
 
179 
 
 179 
#endif /* STM32L1xx_HAL_TIM_EX_H */
180 
#endif /* STM32L1xx_HAL_TIM_EX_H */
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181 
 
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182 
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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