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| 1 | /** |
1 | /** |
| 2 | ****************************************************************************** |
2 | ****************************************************************************** |
| 3 | * @file stm32l1xx_hal_spi.h |
3 | * @file stm32l1xx_hal_spi.h |
| 4 | * @author MCD Application Team |
4 | * @author MCD Application Team |
| 5 | * @version V1.2.0 |
- | |
| 6 | * @date 01-July-2016 |
- | |
| 7 | * @brief Header file of SPI HAL module. |
5 | * @brief Header file of SPI HAL module. |
| 8 | ****************************************************************************** |
6 | ****************************************************************************** |
| 9 | * @attention |
7 | * @attention |
| 10 | * |
8 | * |
| 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
9 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
| - | 10 | * All rights reserved.</center></h2> |
|
| 12 | * |
11 | * |
| 13 | * Redistribution and use in source and binary forms, with or without modification, |
12 | * This software component is licensed by ST under BSD 3-Clause license, |
| 14 | * are permitted provided that the following conditions are met: |
13 | * the "License"; You may not use this file except in compliance with the |
| 15 | * 1. Redistributions of source code must retain the above copyright notice, |
- | |
| 16 | * this list of conditions and the following disclaimer. |
- | |
| 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
- | |
| 18 | * this list of conditions and the following disclaimer in the documentation |
- | |
| 19 | * and/or other materials provided with the distribution. |
14 | * License. You may obtain a copy of the License at: |
| 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
- | |
| 21 | * may be used to endorse or promote products derived from this software |
15 | * opensource.org/licenses/BSD-3-Clause |
| 22 | * without specific prior written permission. |
- | |
| 23 | * |
- | |
| 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
- | |
| 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
- | |
| 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
- | |
| 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
- | |
| 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
- | |
| 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
- | |
| 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
- | |
| 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
- | |
| 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
- | |
| 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
- | |
| 34 | * |
16 | * |
| 35 | ****************************************************************************** |
17 | ****************************************************************************** |
| 36 | */ |
18 | */ |
| 37 | 19 | ||
| 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| 39 | #ifndef __STM32L1xx_HAL_SPI_H |
21 | #ifndef STM32L1xx_HAL_SPI_H |
| 40 | #define __STM32L1xx_HAL_SPI_H |
22 | #define STM32L1xx_HAL_SPI_H |
| 41 | 23 | ||
| 42 | #ifdef __cplusplus |
24 | #ifdef __cplusplus |
| 43 | extern "C" { |
25 | extern "C" { |
| 44 | #endif |
26 | #endif |
| 45 | 27 | ||
| 46 | /* Includes ------------------------------------------------------------------*/ |
28 | /* Includes ------------------------------------------------------------------*/ |
| 47 | #include "stm32l1xx_hal_def.h" |
29 | #include "stm32l1xx_hal_def.h" |
| 48 | 30 | ||
| 49 | /** @addtogroup STM32L1xx_HAL_Driver |
31 | /** @addtogroup STM32L1xx_HAL_Driver |
| 50 | * @{ |
32 | * @{ |
| 51 | */ |
33 | */ |
| 52 | 34 | ||
| Line 57... | Line 39... | ||
| 57 | /* Exported types ------------------------------------------------------------*/ |
39 | /* Exported types ------------------------------------------------------------*/ |
| 58 | /** @defgroup SPI_Exported_Types SPI Exported Types |
40 | /** @defgroup SPI_Exported_Types SPI Exported Types |
| 59 | * @{ |
41 | * @{ |
| 60 | */ |
42 | */ |
| 61 | 43 | ||
| 62 | /** |
44 | /** |
| 63 | * @brief SPI Configuration Structure definition |
45 | * @brief SPI Configuration Structure definition |
| 64 | */ |
46 | */ |
| 65 | typedef struct |
47 | typedef struct |
| 66 | { |
48 | { |
| 67 | uint32_t Mode; /*!< Specifies the SPI operating mode. |
49 | uint32_t Mode; /*!< Specifies the SPI operating mode. |
| 68 | This parameter can be a value of @ref SPI_mode */ |
50 | This parameter can be a value of @ref SPI_Mode */ |
| 69 | 51 | ||
| 70 | uint32_t Direction; /*!< Specifies the SPI Directional mode state. |
52 | uint32_t Direction; /*!< Specifies the SPI bidirectional mode state. |
| 71 | This parameter can be a value of @ref SPI_Direction_mode */ |
53 | This parameter can be a value of @ref SPI_Direction */ |
| 72 | 54 | ||
| 73 | uint32_t DataSize; /*!< Specifies the SPI data size. |
55 | uint32_t DataSize; /*!< Specifies the SPI data size. |
| 74 | This parameter can be a value of @ref SPI_data_size */ |
56 | This parameter can be a value of @ref SPI_Data_Size */ |
| 75 | 57 | ||
| 76 | uint32_t CLKPolarity; /*!< Specifies the serial clock steady state. |
58 | uint32_t CLKPolarity; /*!< Specifies the serial clock steady state. |
| 77 | This parameter can be a value of @ref SPI_Clock_Polarity */ |
59 | This parameter can be a value of @ref SPI_Clock_Polarity */ |
| 78 | 60 | ||
| 79 | uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture. |
61 | uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture. |
| 80 | This parameter can be a value of @ref SPI_Clock_Phase */ |
62 | This parameter can be a value of @ref SPI_Clock_Phase */ |
| 81 | 63 | ||
| 82 | uint32_t NSS; /*!< Specifies whether the NSS signal is managed by |
64 | uint32_t NSS; /*!< Specifies whether the NSS signal is managed by |
| 83 | hardware (NSS pin) or by software using the SSI bit. |
65 | hardware (NSS pin) or by software using the SSI bit. |
| 84 | This parameter can be a value of @ref SPI_Slave_Select_management */ |
66 | This parameter can be a value of @ref SPI_Slave_Select_management */ |
| 85 | 67 | ||
| 86 | uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be |
68 | uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be |
| 87 | used to configure the transmit and receive SCK clock. |
69 | used to configure the transmit and receive SCK clock. |
| 88 | This parameter can be a value of @ref SPI_BaudRate_Prescaler |
70 | This parameter can be a value of @ref SPI_BaudRate_Prescaler |
| 89 | @note The communication clock is derived from the master |
71 | @note The communication clock is derived from the master |
| 90 | clock. The slave clock does not need to be set */ |
72 | clock. The slave clock does not need to be set. */ |
| 91 | 73 | ||
| 92 | uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. |
74 | uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. |
| 93 | This parameter can be a value of @ref SPI_MSB_LSB_transmission */ |
75 | This parameter can be a value of @ref SPI_MSB_LSB_transmission */ |
| 94 | 76 | ||
| 95 | uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not. |
77 | uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not. |
| 96 | This parameter can be a value of @ref SPI_TI_mode */ |
78 | This parameter can be a value of @ref SPI_TI_mode */ |
| 97 | 79 | ||
| 98 | uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not. |
80 | uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not. |
| 99 | This parameter can be a value of @ref SPI_CRC_Calculation */ |
81 | This parameter can be a value of @ref SPI_CRC_Calculation */ |
| 100 | 82 | ||
| 101 | uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. |
83 | uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. |
| 102 | This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */ |
84 | This parameter must be an odd number between Min_Data = 1 and Max_Data = 65535 */ |
| 103 | - | ||
| 104 | }SPI_InitTypeDef; |
85 | } SPI_InitTypeDef; |
| 105 | 86 | ||
| 106 | /** |
87 | /** |
| 107 | * @brief HAL SPI State structure definition |
88 | * @brief HAL SPI State structure definition |
| 108 | */ |
89 | */ |
| 109 | typedef enum |
90 | typedef enum |
| 110 | { |
91 | { |
| 111 | HAL_SPI_STATE_RESET = 0x00, /*!< SPI not yet initialized or disabled */ |
92 | HAL_SPI_STATE_RESET = 0x00U, /*!< Peripheral not Initialized */ |
| 112 | HAL_SPI_STATE_READY = 0x01, /*!< SPI initialized and ready for use */ |
93 | HAL_SPI_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ |
| 113 | HAL_SPI_STATE_BUSY = 0x02, /*!< SPI process is ongoing */ |
94 | HAL_SPI_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */ |
| 114 | HAL_SPI_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */ |
95 | HAL_SPI_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */ |
| 115 | HAL_SPI_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */ |
96 | HAL_SPI_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */ |
| 116 | HAL_SPI_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */ |
97 | HAL_SPI_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */ |
| 117 | HAL_SPI_STATE_ERROR = 0x03 /*!< SPI error state */ |
98 | HAL_SPI_STATE_ERROR = 0x06U, /*!< SPI error state */ |
| 118 | - | ||
| - | 99 | HAL_SPI_STATE_ABORT = 0x07U /*!< SPI abort is ongoing */ |
|
| 119 | }HAL_SPI_StateTypeDef; |
100 | } HAL_SPI_StateTypeDef; |
| 120 | 101 | ||
| 121 | /** |
102 | /** |
| 122 | * @brief SPI handle Structure definition |
103 | * @brief SPI handle Structure definition |
| 123 | */ |
104 | */ |
| 124 | typedef struct __SPI_HandleTypeDef |
105 | typedef struct __SPI_HandleTypeDef |
| 125 | { |
106 | { |
| 126 | SPI_TypeDef *Instance; /* SPI registers base address */ |
107 | SPI_TypeDef *Instance; /*!< SPI registers base address */ |
| 127 | 108 | ||
| 128 | SPI_InitTypeDef Init; /* SPI communication parameters */ |
109 | SPI_InitTypeDef Init; /*!< SPI communication parameters */ |
| 129 | 110 | ||
| 130 | uint8_t *pTxBuffPtr; /* Pointer to SPI Tx transfer Buffer */ |
111 | uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */ |
| 131 | 112 | ||
| 132 | uint16_t TxXferSize; /* SPI Tx transfer size */ |
113 | uint16_t TxXferSize; /*!< SPI Tx Transfer size */ |
| 133 | - | ||
| 134 | __IO uint16_t TxXferCount; /* SPI Tx Transfer Counter */ |
- | |
| 135 | 114 | ||
| 136 | uint8_t *pRxBuffPtr; /* Pointer to SPI Rx transfer Buffer */ |
115 | __IO uint16_t TxXferCount; /*!< SPI Tx Transfer Counter */ |
| 137 | 116 | ||
| 138 | uint16_t RxXferSize; /* SPI Rx transfer size */ |
117 | uint8_t *pRxBuffPtr; /*!< Pointer to SPI Rx transfer Buffer */ |
| 139 | 118 | ||
| 140 | __IO uint16_t RxXferCount; /* SPI Rx Transfer Counter */ |
119 | uint16_t RxXferSize; /*!< SPI Rx Transfer size */ |
| 141 | 120 | ||
| 142 | DMA_HandleTypeDef *hdmatx; /* SPI Tx DMA handle parameters */ |
121 | __IO uint16_t RxXferCount; /*!< SPI Rx Transfer Counter */ |
| 143 | 122 | ||
| 144 | DMA_HandleTypeDef *hdmarx; /* SPI Rx DMA handle parameters */ |
123 | void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Rx ISR */ |
| 145 | 124 | ||
| 146 | void (*RxISR)(struct __SPI_HandleTypeDef * hspi); /* function pointer on Rx ISR */ |
125 | void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Tx ISR */ |
| 147 | 126 | ||
| 148 | void (*TxISR)(struct __SPI_HandleTypeDef * hspi); /* function pointer on Tx ISR */ |
127 | DMA_HandleTypeDef *hdmatx; /*!< SPI Tx DMA Handle parameters */ |
| 149 | 128 | ||
| 150 | HAL_LockTypeDef Lock; /* SPI locking object */ |
129 | DMA_HandleTypeDef *hdmarx; /*!< SPI Rx DMA Handle parameters */ |
| 151 | 130 | ||
| 152 | __IO HAL_SPI_StateTypeDef State; /* SPI communication state */ |
131 | HAL_LockTypeDef Lock; /*!< Locking object */ |
| 153 | 132 | ||
| 154 | __IO uint32_t ErrorCode; /* SPI Error code */ |
133 | __IO HAL_SPI_StateTypeDef State; /*!< SPI communication state */ |
| 155 | 134 | ||
| - | 135 | __IO uint32_t ErrorCode; /*!< SPI Error code */ |
|
| - | 136 | ||
| - | 137 | #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) |
|
| - | 138 | void (* TxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Tx Completed callback */ |
|
| - | 139 | void (* RxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Rx Completed callback */ |
|
| - | 140 | void (* TxRxCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI TxRx Completed callback */ |
|
| - | 141 | void (* TxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Tx Half Completed callback */ |
|
| - | 142 | void (* RxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Rx Half Completed callback */ |
|
| - | 143 | void (* TxRxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI TxRx Half Completed callback */ |
|
| - | 144 | void (* ErrorCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Error callback */ |
|
| - | 145 | void (* AbortCpltCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Abort callback */ |
|
| - | 146 | void (* MspInitCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Msp Init callback */ |
|
| - | 147 | void (* MspDeInitCallback)(struct __SPI_HandleTypeDef *hspi); /*!< SPI Msp DeInit callback */ |
|
| - | 148 | ||
| - | 149 | #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ |
|
| 156 | }SPI_HandleTypeDef; |
150 | } SPI_HandleTypeDef; |
| - | 151 | ||
| - | 152 | #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) |
|
| 157 | /** |
153 | /** |
| 158 | * @} |
154 | * @brief HAL SPI Callback ID enumeration definition |
| 159 | */ |
155 | */ |
| - | 156 | typedef enum |
|
| - | 157 | { |
|
| - | 158 | HAL_SPI_TX_COMPLETE_CB_ID = 0x00U, /*!< SPI Tx Completed callback ID */ |
|
| - | 159 | HAL_SPI_RX_COMPLETE_CB_ID = 0x01U, /*!< SPI Rx Completed callback ID */ |
|
| - | 160 | HAL_SPI_TX_RX_COMPLETE_CB_ID = 0x02U, /*!< SPI TxRx Completed callback ID */ |
|
| - | 161 | HAL_SPI_TX_HALF_COMPLETE_CB_ID = 0x03U, /*!< SPI Tx Half Completed callback ID */ |
|
| - | 162 | HAL_SPI_RX_HALF_COMPLETE_CB_ID = 0x04U, /*!< SPI Rx Half Completed callback ID */ |
|
| - | 163 | HAL_SPI_TX_RX_HALF_COMPLETE_CB_ID = 0x05U, /*!< SPI TxRx Half Completed callback ID */ |
|
| - | 164 | HAL_SPI_ERROR_CB_ID = 0x06U, /*!< SPI Error callback ID */ |
|
| - | 165 | HAL_SPI_ABORT_CB_ID = 0x07U, /*!< SPI Abort callback ID */ |
|
| - | 166 | HAL_SPI_MSPINIT_CB_ID = 0x08U, /*!< SPI Msp Init callback ID */ |
|
| - | 167 | HAL_SPI_MSPDEINIT_CB_ID = 0x09U /*!< SPI Msp DeInit callback ID */ |
|
| 160 | 168 | ||
| - | 169 | } HAL_SPI_CallbackIDTypeDef; |
|
| 161 | 170 | ||
| - | 171 | /** |
|
| - | 172 | * @brief HAL SPI Callback pointer definition |
|
| - | 173 | */ |
|
| 162 | /* Exported constants --------------------------------------------------------*/ |
174 | typedef void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to an SPI callback function */ |
| - | 175 | ||
| - | 176 | #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ |
|
| - | 177 | /** |
|
| - | 178 | * @} |
|
| - | 179 | */ |
|
| 163 | 180 | ||
| - | 181 | /* Exported constants --------------------------------------------------------*/ |
|
| 164 | /** @defgroup SPI_Exported_Constants SPI Exported Constants |
182 | /** @defgroup SPI_Exported_Constants SPI Exported Constants |
| 165 | * @{ |
183 | * @{ |
| 166 | */ |
184 | */ |
| 167 | 185 | ||
| 168 | /** @defgroup SPI_Error_Codes SPI Error Codes |
186 | /** @defgroup SPI_Error_Code SPI Error Code |
| 169 | * @{ |
187 | * @{ |
| 170 | */ |
188 | */ |
| 171 | #define HAL_SPI_ERROR_NONE ((uint32_t)0x00) /*!< No error */ |
189 | #define HAL_SPI_ERROR_NONE (0x00000000U) /*!< No error */ |
| 172 | #define HAL_SPI_ERROR_MODF ((uint32_t)0x01) /*!< MODF error */ |
190 | #define HAL_SPI_ERROR_MODF (0x00000001U) /*!< MODF error */ |
| 173 | #define HAL_SPI_ERROR_CRC ((uint32_t)0x02) /*!< CRC error */ |
191 | #define HAL_SPI_ERROR_CRC (0x00000002U) /*!< CRC error */ |
| 174 | #define HAL_SPI_ERROR_OVR ((uint32_t)0x04) /*!< OVR error */ |
192 | #define HAL_SPI_ERROR_OVR (0x00000004U) /*!< OVR error */ |
| 175 | #define HAL_SPI_ERROR_FRE ((uint32_t)0x08) /*!< FRE error */ |
193 | #define HAL_SPI_ERROR_FRE (0x00000008U) /*!< FRE error */ |
| 176 | #define HAL_SPI_ERROR_DMA ((uint32_t)0x10) /*!< DMA transfer error */ |
194 | #define HAL_SPI_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ |
| 177 | #define HAL_SPI_ERROR_FLAG ((uint32_t)0x20) /*!< Flag: RXNE,TXE, BSY */ |
195 | #define HAL_SPI_ERROR_FLAG (0x00000020U) /*!< Error on RXNE/TXE/BSY Flag */ |
| 178 | - | ||
| - | 196 | #define HAL_SPI_ERROR_ABORT (0x00000040U) /*!< Error during SPI Abort procedure */ |
|
| - | 197 | #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) |
|
| - | 198 | #define HAL_SPI_ERROR_INVALID_CALLBACK (0x00000080U) /*!< Invalid Callback error */ |
|
| - | 199 | #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ |
|
| 179 | /** |
200 | /** |
| 180 | * @} |
201 | * @} |
| 181 | */ |
202 | */ |
| 182 | 203 | ||
| 183 | /** @defgroup SPI_mode SPI mode |
204 | /** @defgroup SPI_Mode SPI Mode |
| 184 | * @{ |
205 | * @{ |
| 185 | */ |
206 | */ |
| 186 | #define SPI_MODE_SLAVE ((uint32_t)0x00000000) |
207 | #define SPI_MODE_SLAVE (0x00000000U) |
| 187 | #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI) |
208 | #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI) |
| 188 | - | ||
| 189 | #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \ |
- | |
| 190 | ((MODE) == SPI_MODE_MASTER)) |
- | |
| 191 | /** |
209 | /** |
| 192 | * @} |
210 | * @} |
| 193 | */ |
211 | */ |
| 194 | 212 | ||
| 195 | /** @defgroup SPI_Direction_mode SPI Direction mode |
213 | /** @defgroup SPI_Direction SPI Direction Mode |
| 196 | * @{ |
214 | * @{ |
| 197 | */ |
215 | */ |
| 198 | #define SPI_DIRECTION_2LINES ((uint32_t)0x00000000) |
216 | #define SPI_DIRECTION_2LINES (0x00000000U) |
| 199 | #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY |
217 | #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY |
| 200 | #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE |
218 | #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE |
| 201 | - | ||
| 202 | #define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \ |
- | |
| 203 | ((MODE) == SPI_DIRECTION_2LINES_RXONLY) || \ |
- | |
| 204 | ((MODE) == SPI_DIRECTION_1LINE)) |
- | |
| 205 | - | ||
| 206 | #define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \ |
- | |
| 207 | ((MODE) == SPI_DIRECTION_1LINE)) |
- | |
| 208 | - | ||
| 209 | #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES) |
- | |
| 210 | - | ||
| 211 | /** |
219 | /** |
| 212 | * @} |
220 | * @} |
| 213 | */ |
221 | */ |
| 214 | 222 | ||
| 215 | /** @defgroup SPI_data_size SPI data size |
223 | /** @defgroup SPI_Data_Size SPI Data Size |
| 216 | * @{ |
224 | * @{ |
| 217 | */ |
225 | */ |
| 218 | #define SPI_DATASIZE_8BIT ((uint32_t)0x00000000) |
226 | #define SPI_DATASIZE_8BIT (0x00000000U) |
| 219 | #define SPI_DATASIZE_16BIT SPI_CR1_DFF |
227 | #define SPI_DATASIZE_16BIT SPI_CR1_DFF |
| 220 | - | ||
| 221 | #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \ |
- | |
| 222 | ((DATASIZE) == SPI_DATASIZE_8BIT)) |
- | |
| 223 | /** |
228 | /** |
| 224 | * @} |
229 | * @} |
| 225 | */ |
230 | */ |
| 226 | 231 | ||
| 227 | /** @defgroup SPI_Clock_Polarity SPI Clock Polarity |
232 | /** @defgroup SPI_Clock_Polarity SPI Clock Polarity |
| 228 | * @{ |
233 | * @{ |
| 229 | */ |
234 | */ |
| 230 | #define SPI_POLARITY_LOW ((uint32_t)0x00000000) |
235 | #define SPI_POLARITY_LOW (0x00000000U) |
| 231 | #define SPI_POLARITY_HIGH SPI_CR1_CPOL |
236 | #define SPI_POLARITY_HIGH SPI_CR1_CPOL |
| 232 | - | ||
| 233 | #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) || \ |
- | |
| 234 | ((CPOL) == SPI_POLARITY_HIGH)) |
- | |
| 235 | /** |
237 | /** |
| 236 | * @} |
238 | * @} |
| 237 | */ |
239 | */ |
| 238 | 240 | ||
| 239 | /** @defgroup SPI_Clock_Phase SPI Clock Phase |
241 | /** @defgroup SPI_Clock_Phase SPI Clock Phase |
| 240 | * @{ |
242 | * @{ |
| 241 | */ |
243 | */ |
| 242 | #define SPI_PHASE_1EDGE ((uint32_t)0x00000000) |
244 | #define SPI_PHASE_1EDGE (0x00000000U) |
| 243 | #define SPI_PHASE_2EDGE SPI_CR1_CPHA |
245 | #define SPI_PHASE_2EDGE SPI_CR1_CPHA |
| 244 | - | ||
| 245 | #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \ |
- | |
| 246 | ((CPHA) == SPI_PHASE_2EDGE)) |
- | |
| 247 | /** |
246 | /** |
| 248 | * @} |
247 | * @} |
| 249 | */ |
248 | */ |
| 250 | 249 | ||
| 251 | /** @defgroup SPI_Slave_Select_management SPI Slave Select management |
250 | /** @defgroup SPI_Slave_Select_management SPI Slave Select Management |
| 252 | * @{ |
251 | * @{ |
| 253 | */ |
252 | */ |
| 254 | #define SPI_NSS_SOFT SPI_CR1_SSM |
253 | #define SPI_NSS_SOFT SPI_CR1_SSM |
| 255 | #define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000) |
254 | #define SPI_NSS_HARD_INPUT (0x00000000U) |
| 256 | #define SPI_NSS_HARD_OUTPUT ((uint32_t)(SPI_CR2_SSOE << 16)) |
255 | #define SPI_NSS_HARD_OUTPUT (SPI_CR2_SSOE << 16U) |
| 257 | - | ||
| 258 | #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || \ |
- | |
| 259 | ((NSS) == SPI_NSS_HARD_INPUT) || \ |
- | |
| 260 | ((NSS) == SPI_NSS_HARD_OUTPUT)) |
- | |
| 261 | /** |
256 | /** |
| 262 | * @} |
257 | * @} |
| 263 | */ |
258 | */ |
| 264 | 259 | ||
| 265 | /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler |
260 | /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler |
| 266 | * @{ |
261 | * @{ |
| 267 | */ |
262 | */ |
| 268 | #define SPI_BAUDRATEPRESCALER_2 ((uint32_t)0x00000000) |
263 | #define SPI_BAUDRATEPRESCALER_2 (0x00000000U) |
| 269 | #define SPI_BAUDRATEPRESCALER_4 ((uint32_t)SPI_CR1_BR_0) |
264 | #define SPI_BAUDRATEPRESCALER_4 (SPI_CR1_BR_0) |
| 270 | #define SPI_BAUDRATEPRESCALER_8 ((uint32_t)SPI_CR1_BR_1) |
265 | #define SPI_BAUDRATEPRESCALER_8 (SPI_CR1_BR_1) |
| 271 | #define SPI_BAUDRATEPRESCALER_16 ((uint32_t)SPI_CR1_BR_1 | SPI_CR1_BR_0) |
266 | #define SPI_BAUDRATEPRESCALER_16 (SPI_CR1_BR_1 | SPI_CR1_BR_0) |
| 272 | #define SPI_BAUDRATEPRESCALER_32 ((uint32_t)SPI_CR1_BR_2) |
267 | #define SPI_BAUDRATEPRESCALER_32 (SPI_CR1_BR_2) |
| 273 | #define SPI_BAUDRATEPRESCALER_64 ((uint32_t)SPI_CR1_BR_2 | SPI_CR1_BR_0) |
268 | #define SPI_BAUDRATEPRESCALER_64 (SPI_CR1_BR_2 | SPI_CR1_BR_0) |
| 274 | #define SPI_BAUDRATEPRESCALER_128 ((uint32_t)SPI_CR1_BR_2 | SPI_CR1_BR_1) |
269 | #define SPI_BAUDRATEPRESCALER_128 (SPI_CR1_BR_2 | SPI_CR1_BR_1) |
| 275 | #define SPI_BAUDRATEPRESCALER_256 ((uint32_t)SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) |
270 | #define SPI_BAUDRATEPRESCALER_256 (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) |
| 276 | - | ||
| 277 | #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \ |
- | |
| 278 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \ |
- | |
| 279 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \ |
- | |
| 280 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \ |
- | |
| 281 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \ |
- | |
| 282 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \ |
- | |
| 283 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \ |
- | |
| 284 | ((PRESCALER) == SPI_BAUDRATEPRESCALER_256)) |
- | |
| 285 | /** |
271 | /** |
| 286 | * @} |
272 | * @} |
| 287 | */ |
273 | */ |
| 288 | 274 | ||
| 289 | /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB transmission |
275 | /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB Transmission |
| 290 | * @{ |
276 | * @{ |
| 291 | */ |
277 | */ |
| 292 | #define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000) |
278 | #define SPI_FIRSTBIT_MSB (0x00000000U) |
| 293 | #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST |
279 | #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST |
| - | 280 | /** |
|
| - | 281 | * @} |
|
| - | 282 | */ |
|
| 294 | 283 | ||
| - | 284 | /** @defgroup SPI_TI_mode SPI TI Mode |
|
| - | 285 | * @brief SPI TI Mode not supported for Category 1 and 2 |
|
| - | 286 | * @{ |
|
| - | 287 | */ |
|
| 295 | #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \ |
288 | #define SPI_TIMODE_DISABLE (0x00000000U) |
| - | 289 | #if defined(SPI_CR2_FRF) |
|
| 296 | ((BIT) == SPI_FIRSTBIT_LSB)) |
290 | #define SPI_TIMODE_ENABLE SPI_CR2_FRF |
| - | 291 | #endif |
|
| 297 | /** |
292 | /** |
| 298 | * @} |
293 | * @} |
| 299 | */ |
294 | */ |
| 300 | 295 | ||
| 301 | /** @defgroup SPI_CRC_Calculation SPI CRC Calculation |
296 | /** @defgroup SPI_CRC_Calculation SPI CRC Calculation |
| 302 | * @{ |
297 | * @{ |
| 303 | */ |
298 | */ |
| 304 | #define SPI_CRCCALCULATION_DISABLE ((uint32_t)0x00000000) |
299 | #define SPI_CRCCALCULATION_DISABLE (0x00000000U) |
| 305 | #define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN |
300 | #define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN |
| 306 | - | ||
| 307 | #define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLE) || \ |
- | |
| 308 | ((CALCULATION) == SPI_CRCCALCULATION_ENABLE)) |
- | |
| 309 | - | ||
| 310 | #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x1) && ((POLYNOMIAL) <= 0xFFFF)) |
- | |
| 311 | /** |
301 | /** |
| 312 | * @} |
302 | * @} |
| 313 | */ |
303 | */ |
| 314 | 304 | ||
| 315 | /** @defgroup SPI_Interrupt_configuration_definition SPI Interrupt configuration definition |
305 | /** @defgroup SPI_Interrupt_definition SPI Interrupt Definition |
| 316 | * @{ |
306 | * @{ |
| 317 | */ |
307 | */ |
| 318 | #define SPI_IT_TXE SPI_CR2_TXEIE |
308 | #define SPI_IT_TXE SPI_CR2_TXEIE |
| 319 | #define SPI_IT_RXNE SPI_CR2_RXNEIE |
309 | #define SPI_IT_RXNE SPI_CR2_RXNEIE |
| 320 | #define SPI_IT_ERR SPI_CR2_ERRIE |
310 | #define SPI_IT_ERR SPI_CR2_ERRIE |
| 321 | /** |
311 | /** |
| 322 | * @} |
312 | * @} |
| 323 | */ |
313 | */ |
| 324 | 314 | ||
| 325 | /** @defgroup SPI_Flag_definition SPI Flag definition |
315 | /** @defgroup SPI_Flags_definition SPI Flags Definition |
| 326 | * @{ |
316 | * @{ |
| 327 | */ |
317 | */ |
| 328 | #define SPI_FLAG_RXNE SPI_SR_RXNE |
318 | #define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */ |
| 329 | #define SPI_FLAG_TXE SPI_SR_TXE |
319 | #define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */ |
| - | 320 | #define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */ |
|
| 330 | #define SPI_FLAG_CRCERR SPI_SR_CRCERR |
321 | #define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */ |
| 331 | #define SPI_FLAG_MODF SPI_SR_MODF |
322 | #define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */ |
| 332 | #define SPI_FLAG_OVR SPI_SR_OVR |
323 | #define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */ |
| - | 324 | #if defined(SPI_CR2_FRF) |
|
| - | 325 | #define SPI_FLAG_FRE SPI_SR_FRE /* SPI Error flag: TI mode frame format error flag */ |
|
| 333 | #define SPI_FLAG_BSY SPI_SR_BSY |
326 | #define SPI_FLAG_MASK (SPI_SR_RXNE | SPI_SR_TXE | SPI_SR_BSY | SPI_SR_CRCERR\ |
| - | 327 | | SPI_SR_MODF | SPI_SR_OVR | SPI_SR_FRE) |
|
| - | 328 | #else |
|
| 334 | #define SPI_FLAG_FRE SPI_SR_FRE |
329 | #define SPI_FLAG_MASK (SPI_SR_RXNE | SPI_SR_TXE | SPI_SR_BSY\ |
| - | 330 | | SPI_SR_CRCERR | SPI_SR_MODF | SPI_SR_OVR) |
|
| 335 | 331 | #endif |
|
| 336 | /** |
332 | /** |
| 337 | * @} |
333 | * @} |
| 338 | */ |
334 | */ |
| 339 | 335 | ||
| 340 | /** |
336 | /** |
| 341 | * @} |
337 | * @} |
| 342 | */ |
338 | */ |
| 343 | 339 | ||
| 344 | - | ||
| 345 | /* Exported macro ------------------------------------------------------------*/ |
340 | /* Exported macros -----------------------------------------------------------*/ |
| 346 | /** @defgroup SPI_Exported_Macros SPI Exported Macros |
341 | /** @defgroup SPI_Exported_Macros SPI Exported Macros |
| 347 | * @{ |
342 | * @{ |
| 348 | */ |
343 | */ |
| 349 | 344 | ||
| 350 | /** @brief Reset SPI handle state |
345 | /** @brief Reset SPI handle state. |
| 351 | * @param __HANDLE__: specifies the SPI handle. |
346 | * @param __HANDLE__ specifies the SPI Handle. |
| 352 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
347 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| 353 | * @retval None |
348 | * @retval None |
| 354 | */ |
349 | */ |
| - | 350 | #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) |
|
| - | 351 | #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
|
| - | 352 | (__HANDLE__)->State = HAL_SPI_STATE_RESET; \ |
|
| - | 353 | (__HANDLE__)->MspInitCallback = NULL; \ |
|
| - | 354 | (__HANDLE__)->MspDeInitCallback = NULL; \ |
|
| - | 355 | } while(0) |
|
| - | 356 | #else |
|
| 355 | #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET) |
357 | #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET) |
| - | 358 | #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ |
|
| 356 | 359 | ||
| 357 | /** @brief Enable or disable the specified SPI interrupts. |
360 | /** @brief Enable the specified SPI interrupts. |
| 358 | * @param __HANDLE__: specifies the SPI handle. |
361 | * @param __HANDLE__ specifies the SPI Handle. |
| 359 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
362 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| 360 | * @param __INTERRUPT__: specifies the interrupt source to enable or disable. |
363 | * @param __INTERRUPT__ specifies the interrupt source to enable. |
| 361 | * This parameter can be one of the following values: |
364 | * This parameter can be one of the following values: |
| 362 | * @arg SPI_IT_TXE: Tx buffer empty interrupt enable |
365 | * @arg SPI_IT_TXE: Tx buffer empty interrupt enable |
| 363 | * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable |
366 | * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable |
| 364 | * @arg SPI_IT_ERR: Error interrupt enable |
367 | * @arg SPI_IT_ERR: Error interrupt enable |
| 365 | * @retval None |
368 | * @retval None |
| 366 | */ |
369 | */ |
| 367 | #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__)) |
370 | #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__)) |
| - | 371 | ||
| - | 372 | /** @brief Disable the specified SPI interrupts. |
|
| - | 373 | * @param __HANDLE__ specifies the SPI handle. |
|
| - | 374 | * This parameter can be SPIx where x: 1, 2, or 3 to select the SPI peripheral. |
|
| - | 375 | * @param __INTERRUPT__ specifies the interrupt source to disable. |
|
| - | 376 | * This parameter can be one of the following values: |
|
| - | 377 | * @arg SPI_IT_TXE: Tx buffer empty interrupt enable |
|
| - | 378 | * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable |
|
| - | 379 | * @arg SPI_IT_ERR: Error interrupt enable |
|
| - | 380 | * @retval None |
|
| - | 381 | */ |
|
| 368 | #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__)) |
382 | #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__)) |
| 369 | 383 | ||
| 370 | /** @brief Check if the specified SPI interrupt source is enabled or disabled. |
384 | /** @brief Check whether the specified SPI interrupt source is enabled or not. |
| 371 | * @param __HANDLE__: specifies the SPI handle. |
385 | * @param __HANDLE__ specifies the SPI Handle. |
| 372 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
386 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| 373 | * @param __INTERRUPT__: specifies the SPI interrupt source to check. |
387 | * @param __INTERRUPT__ specifies the SPI interrupt source to check. |
| 374 | * This parameter can be one of the following values: |
388 | * This parameter can be one of the following values: |
| 375 | * @arg SPI_IT_TXE: Tx buffer empty interrupt enable |
389 | * @arg SPI_IT_TXE: Tx buffer empty interrupt enable |
| 376 | * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable |
390 | * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable |
| 377 | * @arg SPI_IT_ERR: Error interrupt enable |
391 | * @arg SPI_IT_ERR: Error interrupt enable |
| 378 | * @retval The new state of __IT__ (TRUE or FALSE). |
392 | * @retval The new state of __IT__ (TRUE or FALSE). |
| 379 | */ |
393 | */ |
| 380 | #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
394 | #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2\ |
| - | 395 | & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
|
| 381 | 396 | ||
| 382 | /** @brief Check whether the specified SPI flag is set or not. |
397 | /** @brief Check whether the specified SPI flag is set or not. |
| 383 | * @param __HANDLE__: specifies the SPI handle. |
398 | * @param __HANDLE__ specifies the SPI Handle. |
| 384 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
399 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| 385 | * @param __FLAG__: specifies the flag to check. |
400 | * @param __FLAG__ specifies the flag to check. |
| 386 | * This parameter can be one of the following values: |
401 | * This parameter can be one of the following values: |
| 387 | * @arg SPI_FLAG_RXNE: Receive buffer not empty flag |
402 | * @arg SPI_FLAG_RXNE: Receive buffer not empty flag |
| 388 | * @arg SPI_FLAG_TXE: Transmit buffer empty flag |
403 | * @arg SPI_FLAG_TXE: Transmit buffer empty flag |
| 389 | * @arg SPI_FLAG_CRCERR: CRC error flag |
404 | * @arg SPI_FLAG_CRCERR: CRC error flag |
| 390 | * @arg SPI_FLAG_MODF: Mode fault flag |
405 | * @arg SPI_FLAG_MODF: Mode fault flag |
| 391 | * @arg SPI_FLAG_OVR: Overrun flag |
406 | * @arg SPI_FLAG_OVR: Overrun flag |
| 392 | * @arg SPI_FLAG_BSY: Busy flag |
407 | * @arg SPI_FLAG_BSY: Busy flag |
| 393 | * @arg SPI_FLAG_FRE: Frame format error flag |
408 | * @arg SPI_FLAG_FRE: Frame format error flag |
| 394 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
409 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| 395 | */ |
410 | */ |
| 396 | #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
411 | #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
| 397 | 412 | ||
| 398 | /** @brief Clear the SPI CRCERR pending flag. |
413 | /** @brief Clear the SPI CRCERR pending flag. |
| 399 | * @param __HANDLE__: specifies the SPI handle. |
414 | * @param __HANDLE__ specifies the SPI Handle. |
| 400 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
415 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| 401 | * @retval None |
416 | * @retval None |
| 402 | */ |
417 | */ |
| 403 | #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = ~(SPI_FLAG_CRCERR)) |
418 | #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR)) |
| 404 | 419 | ||
| 405 | /** @brief Clear the SPI MODF pending flag. |
420 | /** @brief Clear the SPI MODF pending flag. |
| 406 | * @param __HANDLE__: specifies the SPI handle. |
421 | * @param __HANDLE__ specifies the SPI Handle. |
| 407 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
422 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| 408 | * @retval None |
423 | * @retval None |
| 409 | */ |
424 | */ |
| 410 | #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \ |
425 | #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \ |
| 411 | do{ \ |
426 | do{ \ |
| 412 | __IO uint32_t tmpreg_modf; \ |
427 | __IO uint32_t tmpreg_modf = 0x00U; \ |
| 413 | tmpreg_modf = (__HANDLE__)->Instance->SR; \ |
428 | tmpreg_modf = (__HANDLE__)->Instance->SR; \ |
| 414 | CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE); \ |
429 | CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE); \ |
| 415 | UNUSED(tmpreg_modf); \ |
430 | UNUSED(tmpreg_modf); \ |
| 416 | }while(0) |
431 | } while(0U) |
| 417 | 432 | ||
| 418 | /** @brief Clear the SPI OVR pending flag. |
433 | /** @brief Clear the SPI OVR pending flag. |
| 419 | * @param __HANDLE__: specifies the SPI handle. |
434 | * @param __HANDLE__ specifies the SPI Handle. |
| 420 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
435 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| 421 | * @retval None |
436 | * @retval None |
| 422 | */ |
437 | */ |
| 423 | #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \ |
438 | #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \ |
| 424 | do{ \ |
439 | do{ \ |
| 425 | __IO uint32_t tmpreg_ovr; \ |
440 | __IO uint32_t tmpreg_ovr = 0x00U; \ |
| 426 | tmpreg_ovr = (__HANDLE__)->Instance->DR; \ |
441 | tmpreg_ovr = (__HANDLE__)->Instance->DR; \ |
| 427 | tmpreg_ovr = (__HANDLE__)->Instance->SR; \ |
442 | tmpreg_ovr = (__HANDLE__)->Instance->SR; \ |
| 428 | UNUSED(tmpreg_ovr); \ |
443 | UNUSED(tmpreg_ovr); \ |
| 429 | }while(0) |
444 | } while(0U) |
| 430 | 445 | ||
| 431 | /** @brief Clear the SPI FRE pending flag. |
446 | /** @brief Clear the SPI FRE pending flag. |
| 432 | * @param __HANDLE__: specifies the SPI handle. |
447 | * @param __HANDLE__ specifies the SPI Handle. |
| 433 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
448 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| 434 | * @retval None |
449 | * @retval None |
| 435 | */ |
450 | */ |
| 436 | #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \ |
451 | #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \ |
| 437 | do{ \ |
452 | do{ \ |
| 438 | __IO uint32_t tmpreg_fre; \ |
453 | __IO uint32_t tmpreg_fre = 0x00U; \ |
| 439 | tmpreg_fre = (__HANDLE__)->Instance->SR; \ |
454 | tmpreg_fre = (__HANDLE__)->Instance->SR; \ |
| 440 | UNUSED(tmpreg_fre); \ |
455 | UNUSED(tmpreg_fre); \ |
| 441 | }while(0) |
456 | }while(0U) |
| 442 | 457 | ||
| 443 | /** @brief Enables the SPI. |
458 | /** @brief Enable the SPI peripheral. |
| 444 | * @param __HANDLE__: specifies the SPI Handle. |
459 | * @param __HANDLE__ specifies the SPI Handle. |
| 445 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
460 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| 446 | * @retval None |
461 | * @retval None |
| 447 | */ |
- | |
| - | 462 | */ |
|
| 448 | #define __HAL_SPI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE) |
463 | #define __HAL_SPI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE) |
| 449 | - | ||
| - | 464 | ||
| 450 | /** @brief Disables the SPI. |
465 | /** @brief Disable the SPI peripheral. |
| 451 | * @param __HANDLE__: specifies the SPI Handle. |
466 | * @param __HANDLE__ specifies the SPI Handle. |
| 452 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
467 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| 453 | * @retval None |
468 | * @retval None |
| 454 | */ |
469 | */ |
| 455 | #define __HAL_SPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE) |
470 | #define __HAL_SPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE) |
| - | 471 | ||
| 456 | /** |
472 | /** |
| 457 | * @} |
473 | * @} |
| 458 | */ |
474 | */ |
| 459 | 475 | ||
| 460 | - | ||
| 461 | /* Private macro ------------------------------------------------------------*/ |
476 | /* Private macros ------------------------------------------------------------*/ |
| 462 | /** @defgroup SPI_Private_Macros SPI Private Macros |
477 | /** @defgroup SPI_Private_Macros SPI Private Macros |
| 463 | * @{ |
478 | * @{ |
| 464 | */ |
479 | */ |
| 465 | 480 | ||
| 466 | /** @brief Sets the SPI transmit-only mode. |
481 | /** @brief Set the SPI transmit-only mode. |
| 467 | * @param __HANDLE__: specifies the SPI Handle. |
482 | * @param __HANDLE__ specifies the SPI Handle. |
| 468 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
483 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| 469 | * @retval None |
484 | * @retval None |
| 470 | */ |
485 | */ |
| 471 | #define SPI_1LINE_TX(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE) |
486 | #define SPI_1LINE_TX(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE) |
| 472 | 487 | ||
| 473 | /** @brief Sets the SPI receive-only mode. |
488 | /** @brief Set the SPI receive-only mode. |
| 474 | * @param __HANDLE__: specifies the SPI Handle. |
489 | * @param __HANDLE__ specifies the SPI Handle. |
| 475 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
490 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| 476 | * @retval None |
491 | * @retval None |
| 477 | */ |
492 | */ |
| 478 | #define SPI_1LINE_RX(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE) |
493 | #define SPI_1LINE_RX(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE) |
| 479 | 494 | ||
| 480 | /** @brief Resets the CRC calculation of the SPI. |
495 | /** @brief Reset the CRC calculation of the SPI. |
| 481 | * @param __HANDLE__: specifies the SPI Handle. |
496 | * @param __HANDLE__ specifies the SPI Handle. |
| 482 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
497 | * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. |
| 483 | * @retval None |
498 | * @retval None |
| 484 | */ |
499 | */ |
| 485 | #define SPI_RESET_CRC(__HANDLE__) do{CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);\ |
500 | #define SPI_RESET_CRC(__HANDLE__) do{CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);\ |
| 486 | SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);}while(0) |
501 | SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);}while(0U) |
| - | 502 | ||
| - | 503 | /** @brief Check whether the specified SPI flag is set or not. |
|
| - | 504 | * @param __SR__ copy of SPI SR register. |
|
| - | 505 | * @param __FLAG__ specifies the flag to check. |
|
| - | 506 | * This parameter can be one of the following values: |
|
| - | 507 | * @arg SPI_FLAG_RXNE: Receive buffer not empty flag |
|
| - | 508 | * @arg SPI_FLAG_TXE: Transmit buffer empty flag |
|
| - | 509 | * @arg SPI_FLAG_CRCERR: CRC error flag |
|
| - | 510 | * @arg SPI_FLAG_MODF: Mode fault flag |
|
| - | 511 | * @arg SPI_FLAG_OVR: Overrun flag |
|
| - | 512 | * @arg SPI_FLAG_BSY: Busy flag |
|
| - | 513 | * @arg SPI_FLAG_FRE: Frame format error flag |
|
| - | 514 | * @retval SET or RESET. |
|
| - | 515 | */ |
|
| - | 516 | #define SPI_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__) & ((__FLAG__) & SPI_FLAG_MASK)) == \ |
|
| - | 517 | ((__FLAG__) & SPI_FLAG_MASK)) ? SET : RESET) |
|
| - | 518 | ||
| - | 519 | /** @brief Check whether the specified SPI Interrupt is set or not. |
|
| - | 520 | * @param __CR2__ copy of SPI CR2 register. |
|
| - | 521 | * @param __INTERRUPT__ specifies the SPI interrupt source to check. |
|
| - | 522 | * This parameter can be one of the following values: |
|
| - | 523 | * @arg SPI_IT_TXE: Tx buffer empty interrupt enable |
|
| - | 524 | * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable |
|
| - | 525 | * @arg SPI_IT_ERR: Error interrupt enable |
|
| - | 526 | * @retval SET or RESET. |
|
| - | 527 | */ |
|
| - | 528 | #define SPI_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__) & (__INTERRUPT__)) == \ |
|
| - | 529 | (__INTERRUPT__)) ? SET : RESET) |
|
| - | 530 | ||
| - | 531 | /** @brief Checks if SPI Mode parameter is in allowed range. |
|
| - | 532 | * @param __MODE__ specifies the SPI Mode. |
|
| - | 533 | * This parameter can be a value of @ref SPI_Mode |
|
| - | 534 | * @retval None |
|
| - | 535 | */ |
|
| - | 536 | #define IS_SPI_MODE(__MODE__) (((__MODE__) == SPI_MODE_SLAVE) || \ |
|
| - | 537 | ((__MODE__) == SPI_MODE_MASTER)) |
|
| - | 538 | ||
| - | 539 | /** @brief Checks if SPI Direction Mode parameter is in allowed range. |
|
| - | 540 | * @param __MODE__ specifies the SPI Direction Mode. |
|
| - | 541 | * This parameter can be a value of @ref SPI_Direction |
|
| - | 542 | * @retval None |
|
| - | 543 | */ |
|
| - | 544 | #define IS_SPI_DIRECTION(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \ |
|
| - | 545 | ((__MODE__) == SPI_DIRECTION_2LINES_RXONLY) || \ |
|
| - | 546 | ((__MODE__) == SPI_DIRECTION_1LINE)) |
|
| - | 547 | ||
| - | 548 | /** @brief Checks if SPI Direction Mode parameter is 2 lines. |
|
| - | 549 | * @param __MODE__ specifies the SPI Direction Mode. |
|
| - | 550 | * @retval None |
|
| - | 551 | */ |
|
| - | 552 | #define IS_SPI_DIRECTION_2LINES(__MODE__) ((__MODE__) == SPI_DIRECTION_2LINES) |
|
| - | 553 | ||
| - | 554 | /** @brief Checks if SPI Direction Mode parameter is 1 or 2 lines. |
|
| - | 555 | * @param __MODE__ specifies the SPI Direction Mode. |
|
| - | 556 | * @retval None |
|
| - | 557 | */ |
|
| - | 558 | #define IS_SPI_DIRECTION_2LINES_OR_1LINE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \ |
|
| - | 559 | ((__MODE__) == SPI_DIRECTION_1LINE)) |
|
| - | 560 | ||
| - | 561 | /** @brief Checks if SPI Data Size parameter is in allowed range. |
|
| - | 562 | * @param __DATASIZE__ specifies the SPI Data Size. |
|
| - | 563 | * This parameter can be a value of @ref SPI_Data_Size |
|
| - | 564 | * @retval None |
|
| - | 565 | */ |
|
| - | 566 | #define IS_SPI_DATASIZE(__DATASIZE__) (((__DATASIZE__) == SPI_DATASIZE_16BIT) || \ |
|
| - | 567 | ((__DATASIZE__) == SPI_DATASIZE_8BIT)) |
|
| - | 568 | ||
| - | 569 | /** @brief Checks if SPI Serial clock steady state parameter is in allowed range. |
|
| - | 570 | * @param __CPOL__ specifies the SPI serial clock steady state. |
|
| - | 571 | * This parameter can be a value of @ref SPI_Clock_Polarity |
|
| - | 572 | * @retval None |
|
| - | 573 | */ |
|
| - | 574 | #define IS_SPI_CPOL(__CPOL__) (((__CPOL__) == SPI_POLARITY_LOW) || \ |
|
| - | 575 | ((__CPOL__) == SPI_POLARITY_HIGH)) |
|
| - | 576 | ||
| - | 577 | /** @brief Checks if SPI Clock Phase parameter is in allowed range. |
|
| - | 578 | * @param __CPHA__ specifies the SPI Clock Phase. |
|
| - | 579 | * This parameter can be a value of @ref SPI_Clock_Phase |
|
| - | 580 | * @retval None |
|
| - | 581 | */ |
|
| - | 582 | #define IS_SPI_CPHA(__CPHA__) (((__CPHA__) == SPI_PHASE_1EDGE) || \ |
|
| - | 583 | ((__CPHA__) == SPI_PHASE_2EDGE)) |
|
| - | 584 | ||
| - | 585 | /** @brief Checks if SPI Slave Select parameter is in allowed range. |
|
| - | 586 | * @param __NSS__ specifies the SPI Slave Select management parameter. |
|
| - | 587 | * This parameter can be a value of @ref SPI_Slave_Select_management |
|
| - | 588 | * @retval None |
|
| - | 589 | */ |
|
| - | 590 | #define IS_SPI_NSS(__NSS__) (((__NSS__) == SPI_NSS_SOFT) || \ |
|
| - | 591 | ((__NSS__) == SPI_NSS_HARD_INPUT) || \ |
|
| - | 592 | ((__NSS__) == SPI_NSS_HARD_OUTPUT)) |
|
| - | 593 | ||
| - | 594 | /** @brief Checks if SPI Baudrate prescaler parameter is in allowed range. |
|
| - | 595 | * @param __PRESCALER__ specifies the SPI Baudrate prescaler. |
|
| - | 596 | * This parameter can be a value of @ref SPI_BaudRate_Prescaler |
|
| - | 597 | * @retval None |
|
| - | 598 | */ |
|
| - | 599 | #define IS_SPI_BAUDRATE_PRESCALER(__PRESCALER__) (((__PRESCALER__) == SPI_BAUDRATEPRESCALER_2) || \ |
|
| - | 600 | ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_4) || \ |
|
| - | 601 | ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_8) || \ |
|
| - | 602 | ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_16) || \ |
|
| - | 603 | ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_32) || \ |
|
| - | 604 | ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_64) || \ |
|
| - | 605 | ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_128) || \ |
|
| - | 606 | ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_256)) |
|
| - | 607 | ||
| - | 608 | /** @brief Checks if SPI MSB LSB transmission parameter is in allowed range. |
|
| - | 609 | * @param __BIT__ specifies the SPI MSB LSB transmission (whether data transfer starts from MSB or LSB bit). |
|
| - | 610 | * This parameter can be a value of @ref SPI_MSB_LSB_transmission |
|
| - | 611 | * @retval None |
|
| - | 612 | */ |
|
| - | 613 | #define IS_SPI_FIRST_BIT(__BIT__) (((__BIT__) == SPI_FIRSTBIT_MSB) || \ |
|
| - | 614 | ((__BIT__) == SPI_FIRSTBIT_LSB)) |
|
| - | 615 | ||
| - | 616 | #if defined(SPI_I2SCFGR_I2SMOD) |
|
| - | 617 | /** @brief Checks if SPI TI mode parameter is in allowed range. |
|
| - | 618 | * @param __MODE__ specifies the SPI TI mode. |
|
| - | 619 | * This parameter can be a value of @ref SPI_TI_mode |
|
| - | 620 | * @retval None |
|
| - | 621 | */ |
|
| - | 622 | #define IS_SPI_TIMODE(__MODE__) (((__MODE__) == SPI_TIMODE_DISABLE) || \ |
|
| - | 623 | ((__MODE__) == SPI_TIMODE_ENABLE)) |
|
| - | 624 | #else |
|
| - | 625 | /** @defgroup SPI_TI_mode SPI TI mode disable |
|
| - | 626 | * @brief SPI TI Mode not supported for Category 1 and 2 |
|
| - | 627 | * @{ |
|
| - | 628 | */ |
|
| - | 629 | #define IS_SPI_TIMODE(__MODE__) ((__MODE__) == SPI_TIMODE_DISABLE) |
|
| - | 630 | ||
| - | 631 | #endif |
|
| - | 632 | /** @brief Checks if SPI CRC calculation enabled state is in allowed range. |
|
| - | 633 | * @param __CALCULATION__ specifies the SPI CRC calculation enable state. |
|
| - | 634 | * This parameter can be a value of @ref SPI_CRC_Calculation |
|
| - | 635 | * @retval None |
|
| - | 636 | */ |
|
| - | 637 | #define IS_SPI_CRC_CALCULATION(__CALCULATION__) (((__CALCULATION__) == SPI_CRCCALCULATION_DISABLE) || \ |
|
| - | 638 | ((__CALCULATION__) == SPI_CRCCALCULATION_ENABLE)) |
|
| - | 639 | ||
| - | 640 | /** @brief Checks if SPI polynomial value to be used for the CRC calculation, is in allowed range. |
|
| - | 641 | * @param __POLYNOMIAL__ specifies the SPI polynomial value to be used for the CRC calculation. |
|
| - | 642 | * This parameter must be a number between Min_Data = 0 and Max_Data = 65535 |
|
| - | 643 | * @retval None |
|
| - | 644 | */ |
|
| - | 645 | #define IS_SPI_CRC_POLYNOMIAL(__POLYNOMIAL__) (((__POLYNOMIAL__) >= 0x1U) && \ |
|
| - | 646 | ((__POLYNOMIAL__) <= 0xFFFFU) && \ |
|
| - | 647 | (((__POLYNOMIAL__)&0x1U) != 0U)) |
|
| - | 648 | ||
| - | 649 | /** @brief Checks if DMA handle is valid. |
|
| - | 650 | * @param __HANDLE__ specifies a DMA Handle. |
|
| - | 651 | * @retval None |
|
| - | 652 | */ |
|
| - | 653 | #define IS_SPI_DMA_HANDLE(__HANDLE__) ((__HANDLE__) != NULL) |
|
| - | 654 | ||
| 487 | /** |
655 | /** |
| 488 | * @} |
656 | * @} |
| 489 | */ |
657 | */ |
| 490 | 658 | ||
| 491 | /* Include SPI HAL Extension module */ |
- | |
| 492 | #include "stm32l1xx_hal_spi_ex.h" |
- | |
| 493 | - | ||
| 494 | /* Exported functions --------------------------------------------------------*/ |
659 | /* Exported functions --------------------------------------------------------*/ |
| 495 | /** @addtogroup SPI_Exported_Functions |
660 | /** @addtogroup SPI_Exported_Functions |
| 496 | * @{ |
661 | * @{ |
| 497 | */ |
662 | */ |
| 498 | 663 | ||
| 499 | /* Initialization/de-initialization functions **********************************/ |
- | |
| 500 | /** @addtogroup SPI_Exported_Functions_Group1 |
664 | /** @addtogroup SPI_Exported_Functions_Group1 |
| 501 | * @{ |
665 | * @{ |
| 502 | */ |
666 | */ |
| - | 667 | /* Initialization/de-initialization functions ********************************/ |
|
| 503 | HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi); |
668 | HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi); |
| 504 | HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi); |
669 | HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi); |
| 505 | void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi); |
670 | void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi); |
| 506 | void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi); |
671 | void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi); |
| - | 672 | ||
| - | 673 | /* Callbacks Register/UnRegister functions ***********************************/ |
|
| - | 674 | #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) |
|
| - | 675 | HAL_StatusTypeDef HAL_SPI_RegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID, pSPI_CallbackTypeDef pCallback); |
|
| - | 676 | HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID); |
|
| - | 677 | #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ |
|
| 507 | /** |
678 | /** |
| 508 | * @} |
679 | * @} |
| 509 | */ |
680 | */ |
| 510 | 681 | ||
| 511 | /* I/O operation functions *****************************************************/ |
- | |
| 512 | /** @addtogroup SPI_Exported_Functions_Group2 |
682 | /** @addtogroup SPI_Exported_Functions_Group2 |
| 513 | * @{ |
683 | * @{ |
| 514 | */ |
684 | */ |
| - | 685 | /* I/O operation functions ***************************************************/ |
|
| 515 | HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
686 | HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| 516 | HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
687 | HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| 517 | HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); |
688 | HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, |
| - | 689 | uint32_t Timeout); |
|
| 518 | HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); |
690 | HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); |
| 519 | HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); |
691 | HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); |
| 520 | HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); |
692 | HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, |
| - | 693 | uint16_t Size); |
|
| 521 | HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); |
694 | HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); |
| 522 | HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); |
695 | HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); |
| 523 | HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); |
696 | HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, |
| - | 697 | uint16_t Size); |
|
| 524 | HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi); |
698 | HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi); |
| 525 | HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi); |
699 | HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi); |
| 526 | HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi); |
700 | HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi); |
| - | 701 | /* Transfer Abort functions */ |
|
| - | 702 | HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi); |
|
| - | 703 | HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi); |
|
| 527 | 704 | ||
| 528 | void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi); |
705 | void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi); |
| 529 | void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi); |
706 | void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi); |
| 530 | void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi); |
707 | void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi); |
| 531 | void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi); |
708 | void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi); |
| 532 | void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi); |
- | |
| 533 | void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi); |
709 | void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi); |
| 534 | void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi); |
710 | void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi); |
| 535 | void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi); |
711 | void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi); |
| - | 712 | void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi); |
|
| - | 713 | void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi); |
|
| 536 | /** |
714 | /** |
| 537 | * @} |
715 | * @} |
| 538 | */ |
716 | */ |
| 539 | 717 | ||
| 540 | - | ||
| 541 | /* Peripheral State and Control functions **************************************/ |
- | |
| 542 | /** @addtogroup SPI_Exported_Functions_Group3 |
718 | /** @addtogroup SPI_Exported_Functions_Group3 |
| 543 | * @{ |
719 | * @{ |
| 544 | */ |
720 | */ |
| - | 721 | /* Peripheral State and Error functions ***************************************/ |
|
| 545 | HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi); |
722 | HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi); |
| 546 | uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi); |
723 | uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi); |
| 547 | - | ||
| 548 | /** |
724 | /** |
| 549 | * @} |
725 | * @} |
| 550 | */ |
726 | */ |
| 551 | 727 | ||
| 552 | /** |
728 | /** |
| 553 | * @} |
729 | * @} |
| 554 | */ |
730 | */ |
| 555 | 731 | ||
| 556 | - | ||
| 557 | /** |
732 | /** |
| 558 | * @} |
733 | * @} |
| 559 | */ |
734 | */ |
| 560 | 735 | ||
| 561 | /** |
736 | /** |
| 562 | * @} |
737 | * @} |
| 563 | */ |
738 | */ |
| 564 | 739 | ||
| 565 | #ifdef __cplusplus |
740 | #ifdef __cplusplus |
| 566 | } |
741 | } |
| 567 | #endif |
742 | #endif |
| 568 | 743 | ||
| 569 | #endif /* __STM32L1xx_HAL_SPI_H */ |
744 | #endif /* STM32L1xx_HAL_SPI_H */ |
| 570 | 745 | ||
| 571 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
746 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |