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| 1 | /** |
1 | /** |
| 2 | ****************************************************************************** |
2 | ****************************************************************************** |
| 3 | * @file stm32l1xx_hal_pwr.h |
3 | * @file stm32l1xx_hal_pwr.h |
| 4 | * @author MCD Application Team |
4 | * @author MCD Application Team |
| 5 | * @brief Header file of PWR HAL module. |
5 | * @brief Header file of PWR HAL module. |
| 6 | ****************************************************************************** |
6 | ****************************************************************************** |
| 7 | * @attention |
7 | * @attention |
| 8 | * |
8 | * |
| 9 | * <h2><center>© Copyright (c) 2017 STMicroelectronics. |
9 | * Copyright (c) 2017 STMicroelectronics. |
| 10 | * All rights reserved.</center></h2> |
10 | * All rights reserved. |
| 11 | * |
11 | * |
| 12 | * This software component is licensed by ST under BSD 3-Clause license, |
12 | * This software is licensed under terms that can be found in the LICENSE file |
| 13 | * the "License"; You may not use this file except in compliance with the |
13 | * in the root directory of this software component. |
| 14 | * License. You may obtain a copy of the License at: |
14 | * If no LICENSE file comes with this software, it is provided AS-IS. |
| 15 | * opensource.org/licenses/BSD-3-Clause |
15 | * |
| 16 | * |
16 | ****************************************************************************** |
| 17 | ****************************************************************************** |
17 | */ |
| 18 | */ |
18 | |
| 19 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ |
|
| 20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
20 | #ifndef __STM32L1xx_HAL_PWR_H |
| 21 | #ifndef __STM32L1xx_HAL_PWR_H |
21 | #define __STM32L1xx_HAL_PWR_H |
| 22 | #define __STM32L1xx_HAL_PWR_H |
22 | |
| 23 | 23 | #ifdef __cplusplus |
|
| 24 | #ifdef __cplusplus |
24 | extern "C" { |
| 25 | extern "C" { |
25 | #endif |
| 26 | #endif |
26 | |
| 27 | 27 | /* Includes ------------------------------------------------------------------*/ |
|
| 28 | /* Includes ------------------------------------------------------------------*/ |
28 | #include "stm32l1xx_hal_def.h" |
| 29 | #include "stm32l1xx_hal_def.h" |
29 | |
| 30 | 30 | /** @addtogroup STM32L1xx_HAL_Driver |
|
| 31 | /** @addtogroup STM32L1xx_HAL_Driver |
31 | * @{ |
| 32 | * @{ |
32 | */ |
| 33 | */ |
33 | |
| 34 | 34 | /** @addtogroup PWR |
|
| 35 | /** @addtogroup PWR |
35 | * @{ |
| 36 | * @{ |
36 | */ |
| 37 | */ |
37 | |
| 38 | 38 | /* Exported types ------------------------------------------------------------*/ |
|
| 39 | /* Exported types ------------------------------------------------------------*/ |
39 | |
| 40 | 40 | /** @defgroup PWR_Exported_Types PWR Exported Types |
|
| 41 | /** @defgroup PWR_Exported_Types PWR Exported Types |
41 | * @{ |
| 42 | * @{ |
42 | */ |
| 43 | */ |
43 | |
| 44 | 44 | /** |
|
| 45 | /** |
45 | * @brief PWR PVD configuration structure definition |
| 46 | * @brief PWR PVD configuration structure definition |
46 | */ |
| 47 | */ |
47 | typedef struct |
| 48 | typedef struct |
48 | { |
| 49 | { |
49 | uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. |
| 50 | uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. |
50 | This parameter can be a value of @ref PWR_PVD_detection_level */ |
| 51 | This parameter can be a value of @ref PWR_PVD_detection_level */ |
51 | |
| 52 | 52 | uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. |
|
| 53 | uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. |
53 | This parameter can be a value of @ref PWR_PVD_Mode */ |
| 54 | This parameter can be a value of @ref PWR_PVD_Mode */ |
54 | }PWR_PVDTypeDef; |
| 55 | }PWR_PVDTypeDef; |
55 | |
| 56 | 56 | /** |
|
| 57 | /** |
57 | * @} |
| 58 | * @} |
58 | */ |
| 59 | */ |
59 | |
| 60 | 60 | /* Internal constants --------------------------------------------------------*/ |
|
| 61 | /* Internal constants --------------------------------------------------------*/ |
61 | |
| 62 | 62 | /** @addtogroup PWR_Private_Constants |
|
| 63 | /** @addtogroup PWR_Private_Constants |
63 | * @{ |
| 64 | * @{ |
64 | */ |
| 65 | */ |
65 | #define PWR_EXTI_LINE_PVD (0x00010000U) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ |
| 66 | #define PWR_EXTI_LINE_PVD (0x00010000U) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ |
66 | |
| 67 | 67 | /** |
|
| 68 | /** |
68 | * @} |
| 69 | * @} |
69 | */ |
| 70 | */ |
70 | |
| 71 | 71 | ||
| 72 | 72 | ||
| 73 | 73 | /* Exported constants --------------------------------------------------------*/ |
|
| 74 | /* Exported constants --------------------------------------------------------*/ |
74 | |
| 75 | 75 | /** @defgroup PWR_Exported_Constants PWR Exported Constants |
|
| 76 | /** @defgroup PWR_Exported_Constants PWR Exported Constants |
76 | * @{ |
| 77 | * @{ |
77 | */ |
| 78 | */ |
78 | |
| 79 | 79 | /** @defgroup PWR_register_alias_address PWR Register alias address |
|
| 80 | /** @defgroup PWR_register_alias_address PWR Register alias address |
80 | * @{ |
| 81 | * @{ |
81 | */ |
| 82 | */ |
82 | /* ------------- PWR registers bit address in the alias region ---------------*/ |
| 83 | /* ------------- PWR registers bit address in the alias region ---------------*/ |
83 | #define PWR_OFFSET (PWR_BASE - PERIPH_BASE) |
| 84 | #define PWR_OFFSET (PWR_BASE - PERIPH_BASE) |
84 | #define PWR_CR_OFFSET 0x00 |
| 85 | #define PWR_CR_OFFSET 0x00 |
85 | #define PWR_CSR_OFFSET 0x04 |
| 86 | #define PWR_CSR_OFFSET 0x04 |
86 | #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET) |
| 87 | #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET) |
87 | #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET) |
| 88 | #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET) |
88 | /** |
| 89 | /** |
89 | * @} |
| 90 | * @} |
90 | */ |
| 91 | */ |
91 | |
| 92 | 92 | /** @defgroup PWR_CR_register_alias PWR CR Register alias address |
|
| 93 | /** @defgroup PWR_CR_register_alias PWR CR Register alias address |
93 | * @{ |
| 94 | * @{ |
94 | */ |
| 95 | */ |
95 | /* --- CR Register ---*/ |
| 96 | /* --- CR Register ---*/ |
96 | /* Alias word address of LPSDSR bit */ |
| 97 | /* Alias word address of LPSDSR bit */ |
97 | #define LPSDSR_BIT_NUMBER POSITION_VAL(PWR_CR_LPSDSR) |
| 98 | #define LPSDSR_BIT_NUMBER POSITION_VAL(PWR_CR_LPSDSR) |
98 | #define CR_LPSDSR_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (LPSDSR_BIT_NUMBER * 4))) |
| 99 | #define CR_LPSDSR_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (LPSDSR_BIT_NUMBER * 4))) |
99 | |
| 100 | 100 | /* Alias word address of DBP bit */ |
|
| 101 | /* Alias word address of DBP bit */ |
101 | #define DBP_BIT_NUMBER POSITION_VAL(PWR_CR_DBP) |
| 102 | #define DBP_BIT_NUMBER POSITION_VAL(PWR_CR_DBP) |
102 | #define CR_DBP_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (DBP_BIT_NUMBER * 4))) |
| 103 | #define CR_DBP_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (DBP_BIT_NUMBER * 4))) |
103 | |
| 104 | 104 | /* Alias word address of LPRUN bit */ |
|
| 105 | /* Alias word address of LPRUN bit */ |
105 | #define LPRUN_BIT_NUMBER POSITION_VAL(PWR_CR_LPRUN) |
| 106 | #define LPRUN_BIT_NUMBER POSITION_VAL(PWR_CR_LPRUN) |
106 | #define CR_LPRUN_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (LPRUN_BIT_NUMBER * 4))) |
| 107 | #define CR_LPRUN_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (LPRUN_BIT_NUMBER * 4))) |
107 | |
| 108 | 108 | /* Alias word address of PVDE bit */ |
|
| 109 | /* Alias word address of PVDE bit */ |
109 | #define PVDE_BIT_NUMBER POSITION_VAL(PWR_CR_PVDE) |
| 110 | #define PVDE_BIT_NUMBER POSITION_VAL(PWR_CR_PVDE) |
110 | #define CR_PVDE_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (PVDE_BIT_NUMBER * 4))) |
| 111 | #define CR_PVDE_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (PVDE_BIT_NUMBER * 4))) |
111 | |
| 112 | 112 | /* Alias word address of FWU bit */ |
|
| 113 | /* Alias word address of FWU bit */ |
113 | #define FWU_BIT_NUMBER POSITION_VAL(PWR_CR_FWU) |
| 114 | #define FWU_BIT_NUMBER POSITION_VAL(PWR_CR_FWU) |
114 | #define CR_FWU_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (FWU_BIT_NUMBER * 4))) |
| 115 | #define CR_FWU_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (FWU_BIT_NUMBER * 4))) |
115 | |
| 116 | 116 | /* Alias word address of ULP bit */ |
|
| 117 | /* Alias word address of ULP bit */ |
117 | #define ULP_BIT_NUMBER POSITION_VAL(PWR_CR_ULP) |
| 118 | #define ULP_BIT_NUMBER POSITION_VAL(PWR_CR_ULP) |
118 | #define CR_ULP_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (ULP_BIT_NUMBER * 4))) |
| 119 | #define CR_ULP_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (ULP_BIT_NUMBER * 4))) |
119 | /** |
| 120 | /** |
120 | * @} |
| 121 | * @} |
121 | */ |
| 122 | */ |
122 | |
| 123 | 123 | /** @defgroup PWR_CSR_register_alias PWR CSR Register alias address |
|
| 124 | /** @defgroup PWR_CSR_register_alias PWR CSR Register alias address |
124 | * @{ |
| 125 | * @{ |
125 | */ |
| 126 | */ |
126 | |
| 127 | 127 | /* --- CSR Register ---*/ |
|
| 128 | /* --- CSR Register ---*/ |
128 | /* Alias word address of EWUP1, EWUP2 and EWUP3 bits */ |
| 129 | /* Alias word address of EWUP1, EWUP2 and EWUP3 bits */ |
129 | #define CSR_EWUP_BB(VAL) ((uint32_t)(PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32) + (POSITION_VAL(VAL) * 4))) |
| 130 | #define CSR_EWUP_BB(VAL) ((uint32_t)(PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32) + (POSITION_VAL(VAL) * 4))) |
130 | /** |
| 131 | /** |
131 | * @} |
| 132 | * @} |
132 | */ |
| 133 | */ |
133 | |
| 134 | 134 | /** @defgroup PWR_PVD_detection_level PWR PVD detection level |
|
| 135 | /** @defgroup PWR_PVD_detection_level PWR PVD detection level |
135 | * @{ |
| 136 | * @{ |
136 | */ |
| 137 | */ |
137 | #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0 |
| 138 | #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0 |
138 | #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1 |
| 139 | #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1 |
139 | #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2 |
| 140 | #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2 |
140 | #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3 |
| 141 | #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3 |
141 | #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4 |
| 142 | #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4 |
142 | #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5 |
| 143 | #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5 |
143 | #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6 |
| 144 | #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6 |
144 | #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7 /* External input analog voltage |
| 145 | #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7 /* External input analog voltage |
145 | (Compare internally to VREFINT) */ |
| 146 | (Compare internally to VREFINT) */ |
146 | |
| 147 | 147 | /** |
|
| 148 | /** |
148 | * @} |
| 149 | * @} |
149 | */ |
| 150 | */ |
150 | |
| 151 | 151 | /** @defgroup PWR_PVD_Mode PWR PVD Mode |
|
| 152 | /** @defgroup PWR_PVD_Mode PWR PVD Mode |
152 | * @{ |
| 153 | * @{ |
153 | */ |
| 154 | */ |
154 | #define PWR_PVD_MODE_NORMAL (0x00000000U) /*!< basic mode is used */ |
| 155 | #define PWR_PVD_MODE_NORMAL (0x00000000U) /*!< basic mode is used */ |
155 | #define PWR_PVD_MODE_IT_RISING (0x00010001U) /*!< External Interrupt Mode with Rising edge trigger detection */ |
| 156 | #define PWR_PVD_MODE_IT_RISING (0x00010001U) /*!< External Interrupt Mode with Rising edge trigger detection */ |
156 | #define PWR_PVD_MODE_IT_FALLING (0x00010002U) /*!< External Interrupt Mode with Falling edge trigger detection */ |
| 157 | #define PWR_PVD_MODE_IT_FALLING (0x00010002U) /*!< External Interrupt Mode with Falling edge trigger detection */ |
157 | #define PWR_PVD_MODE_IT_RISING_FALLING (0x00010003U) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ |
| 158 | #define PWR_PVD_MODE_IT_RISING_FALLING (0x00010003U) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ |
158 | #define PWR_PVD_MODE_EVENT_RISING (0x00020001U) /*!< Event Mode with Rising edge trigger detection */ |
| 159 | #define PWR_PVD_MODE_EVENT_RISING (0x00020001U) /*!< Event Mode with Rising edge trigger detection */ |
159 | #define PWR_PVD_MODE_EVENT_FALLING (0x00020002U) /*!< Event Mode with Falling edge trigger detection */ |
| 160 | #define PWR_PVD_MODE_EVENT_FALLING (0x00020002U) /*!< Event Mode with Falling edge trigger detection */ |
160 | #define PWR_PVD_MODE_EVENT_RISING_FALLING (0x00020003U) /*!< Event Mode with Rising/Falling edge trigger detection */ |
| 161 | #define PWR_PVD_MODE_EVENT_RISING_FALLING (0x00020003U) /*!< Event Mode with Rising/Falling edge trigger detection */ |
161 | |
| 162 | 162 | /** |
|
| 163 | /** |
163 | * @} |
| 164 | * @} |
164 | */ |
| 165 | */ |
165 | |
| 166 | 166 | /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR Regulator state in SLEEP/STOP mode |
|
| 167 | /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR Regulator state in SLEEP/STOP mode |
167 | * @{ |
| 168 | * @{ |
168 | */ |
| 169 | */ |
169 | #define PWR_MAINREGULATOR_ON (0x00000000U) |
| 170 | #define PWR_MAINREGULATOR_ON (0x00000000U) |
170 | #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPSDSR |
| 171 | #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPSDSR |
171 | |
| 172 | 172 | /** |
|
| 173 | /** |
173 | * @} |
| 174 | * @} |
174 | */ |
| 175 | */ |
175 | |
| 176 | 176 | /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry |
|
| 177 | /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry |
177 | * @{ |
| 178 | * @{ |
178 | */ |
| 179 | */ |
179 | #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) |
| 180 | #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) |
180 | #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) |
| 181 | #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) |
181 | |
| 182 | 182 | /** |
|
| 183 | /** |
183 | * @} |
| 184 | * @} |
184 | */ |
| 185 | */ |
185 | |
| 186 | 186 | /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry |
|
| 187 | /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry |
187 | * @{ |
| 188 | * @{ |
188 | */ |
| 189 | */ |
189 | #define PWR_STOPENTRY_WFI ((uint8_t)0x01) |
| 190 | #define PWR_STOPENTRY_WFI ((uint8_t)0x01) |
190 | #define PWR_STOPENTRY_WFE ((uint8_t)0x02) |
| 191 | #define PWR_STOPENTRY_WFE ((uint8_t)0x02) |
191 | |
| 192 | 192 | /** |
|
| 193 | /** |
193 | * @} |
| 194 | * @} |
194 | */ |
| 195 | */ |
195 | |
| 196 | 196 | /** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale |
|
| 197 | /** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale |
197 | * @{ |
| 198 | * @{ |
198 | */ |
| 199 | */ |
199 | |
| 200 | 200 | #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS_0 |
|
| 201 | #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS_0 |
201 | #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR_VOS_1 |
| 202 | #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR_VOS_1 |
202 | #define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR_VOS |
| 203 | #define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR_VOS |
203 | |
| 204 | 204 | ||
| 205 | 205 | /** |
|
| 206 | /** |
206 | * @} |
| 207 | * @} |
207 | */ |
| 208 | */ |
208 | |
| 209 | 209 | /** @defgroup PWR_Flag PWR Flag |
|
| 210 | /** @defgroup PWR_Flag PWR Flag |
210 | * @{ |
| 211 | * @{ |
211 | */ |
| 212 | */ |
212 | #define PWR_FLAG_WU PWR_CSR_WUF |
| 213 | #define PWR_FLAG_WU PWR_CSR_WUF |
213 | #define PWR_FLAG_SB PWR_CSR_SBF |
| 214 | #define PWR_FLAG_SB PWR_CSR_SBF |
214 | #define PWR_FLAG_PVDO PWR_CSR_PVDO |
| 215 | #define PWR_FLAG_PVDO PWR_CSR_PVDO |
215 | #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF |
| 216 | #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF |
216 | #define PWR_FLAG_VOS PWR_CSR_VOSF |
| 217 | #define PWR_FLAG_VOS PWR_CSR_VOSF |
217 | #define PWR_FLAG_REGLP PWR_CSR_REGLPF |
| 218 | #define PWR_FLAG_REGLP PWR_CSR_REGLPF |
218 | |
| 219 | 219 | /** |
|
| 220 | /** |
220 | * @} |
| 221 | * @} |
221 | */ |
| 222 | */ |
222 | |
| 223 | 223 | /** |
|
| 224 | /** |
224 | * @} |
| 225 | * @} |
225 | */ |
| 226 | */ |
226 | |
| 227 | 227 | /* Exported macro ------------------------------------------------------------*/ |
|
| 228 | /* Exported macro ------------------------------------------------------------*/ |
228 | /** @defgroup PWR_Exported_Macros PWR Exported Macros |
| 229 | /** @defgroup PWR_Exported_Macros PWR Exported Macros |
229 | * @{ |
| 230 | * @{ |
230 | */ |
| 231 | */ |
231 | |
| 232 | 232 | /** @brief macros configure the main internal regulator output voltage. |
|
| 233 | /** @brief macros configure the main internal regulator output voltage. |
233 | * @param __REGULATOR__ specifies the regulator output voltage to achieve |
| 234 | * @param __REGULATOR__ specifies the regulator output voltage to achieve |
234 | * a tradeoff between performance and power consumption when the device does |
| 235 | * a tradeoff between performance and power consumption when the device does |
235 | * not operate at the maximum frequency (refer to the datasheets for more details). |
| 236 | * not operate at the maximum frequency (refer to the datasheets for more details). |
236 | * This parameter can be one of the following values: |
| 237 | * This parameter can be one of the following values: |
237 | * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode, |
| 238 | * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode, |
238 | * System frequency up to 32 MHz. |
| 239 | * System frequency up to 32 MHz. |
239 | * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode, |
| 240 | * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode, |
240 | * System frequency up to 16 MHz. |
| 241 | * System frequency up to 16 MHz. |
241 | * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode, |
| 242 | * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode, |
242 | * System frequency up to 4.2 MHz |
| 243 | * System frequency up to 4.2 MHz |
243 | * @retval None |
| 244 | * @retval None |
244 | */ |
| 245 | */ |
245 | #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) (MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__))) |
| 246 | #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) (MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__))) |
246 | |
| 247 | 247 | /** @brief Check PWR flag is set or not. |
|
| 248 | /** @brief Check PWR flag is set or not. |
248 | * @param __FLAG__ specifies the flag to check. |
| 249 | * @param __FLAG__ specifies the flag to check. |
249 | * This parameter can be one of the following values: |
| 250 | * This parameter can be one of the following values: |
250 | * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event |
| 251 | * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event |
251 | * was received from the WKUP pin or from the RTC alarm (Alarm B), |
| 252 | * was received from the WKUP pin or from the RTC alarm (Alarm B), |
252 | * RTC Tamper event, RTC TimeStamp event or RTC Wakeup. |
| 253 | * RTC Tamper event, RTC TimeStamp event or RTC Wakeup. |
253 | * An additional wakeup event is detected if the WKUP pin is enabled |
| 254 | * An additional wakeup event is detected if the WKUP pin is enabled |
254 | * (by setting the EWUP bit) when the WKUP pin level is already high. |
| 255 | * (by setting the EWUP bit) when the WKUP pin level is already high. |
255 | * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was |
| 256 | * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was |
256 | * resumed from StandBy mode. |
| 257 | * resumed from StandBy mode. |
257 | * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled |
| 258 | * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled |
258 | * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode |
| 259 | * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode |
259 | * For this reason, this bit is equal to 0 after Standby or reset |
| 260 | * For this reason, this bit is equal to 0 after Standby or reset |
260 | * until the PVDE bit is set. |
| 261 | * until the PVDE bit is set. |
261 | * @arg PWR_FLAG_VREFINTRDY: Internal voltage reference (VREFINT) ready flag. |
| 262 | * @arg PWR_FLAG_VREFINTRDY: Internal voltage reference (VREFINT) ready flag. |
262 | * This bit indicates the state of the internal voltage reference, VREFINT. |
| 263 | * This bit indicates the state of the internal voltage reference, VREFINT. |
263 | * @arg PWR_FLAG_VOS: Voltage Scaling select flag. A delay is required for |
| 264 | * @arg PWR_FLAG_VOS: Voltage Scaling select flag. A delay is required for |
264 | * the internal regulator to be ready after the voltage range is changed. |
| 265 | * the internal regulator to be ready after the voltage range is changed. |
265 | * The VOSF bit indicates that the regulator has reached the voltage level |
| 266 | * The VOSF bit indicates that the regulator has reached the voltage level |
266 | * defined with bits VOS of PWR_CR register. |
| 267 | * defined with bits VOS of PWR_CR register. |
267 | * @arg PWR_FLAG_REGLP: Regulator LP flag. When the MCU exits from Low power run |
| 268 | * @arg PWR_FLAG_REGLP: Regulator LP flag. When the MCU exits from Low power run |
268 | * mode, this bit stays at 1 until the regulator is ready in main mode. |
| 269 | * mode, this bit stays at 1 until the regulator is ready in main mode. |
269 | * A polling on this bit is recommended to wait for the regulator main mode. |
| 270 | * A polling on this bit is recommended to wait for the regulator main mode. |
270 | * This bit is reset by hardware when the regulator is ready. |
| 271 | * This bit is reset by hardware when the regulator is ready. |
271 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| 272 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
272 | */ |
| 273 | */ |
273 | #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__)) |
| 274 | #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__)) |
274 | |
| 275 | 275 | /** @brief Clear the PWR's pending flags. |
|
| 276 | /** @brief Clear the PWR's pending flags. |
276 | * @param __FLAG__ specifies the flag to clear. |
| 277 | * @param __FLAG__ specifies the flag to clear. |
277 | * This parameter can be one of the following values: |
| 278 | * This parameter can be one of the following values: |
278 | * @arg PWR_FLAG_WU: Wake Up flag |
| 279 | * @arg PWR_FLAG_WU: Wake Up flag |
279 | * @arg PWR_FLAG_SB: StandBy flag |
| 280 | * @arg PWR_FLAG_SB: StandBy flag |
280 | */ |
| 281 | */ |
281 | #define __HAL_PWR_CLEAR_FLAG(__FLAG__) SET_BIT(PWR->CR, ((__FLAG__) << 2)) |
| 282 | #define __HAL_PWR_CLEAR_FLAG(__FLAG__) SET_BIT(PWR->CR, ((__FLAG__) << 2)) |
282 | |
| 283 | 283 | /** |
|
| 284 | /** |
284 | * @brief Enable interrupt on PVD Exti Line 16. |
| 285 | * @brief Enable interrupt on PVD Exti Line 16. |
285 | * @retval None. |
| 286 | * @retval None. |
286 | */ |
| 287 | */ |
287 | #define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD) |
| 288 | #define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD) |
288 | |
| 289 | 289 | /** |
|
| 290 | /** |
290 | * @brief Disable interrupt on PVD Exti Line 16. |
| 291 | * @brief Disable interrupt on PVD Exti Line 16. |
291 | * @retval None. |
| 292 | * @retval None. |
292 | */ |
| 293 | */ |
293 | #define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD) |
| 294 | #define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD) |
294 | |
| 295 | 295 | /** |
|
| 296 | /** |
296 | * @brief Enable event on PVD Exti Line 16. |
| 297 | * @brief Enable event on PVD Exti Line 16. |
297 | * @retval None. |
| 298 | * @retval None. |
298 | */ |
| 299 | */ |
299 | #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD) |
| 300 | #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD) |
300 | |
| 301 | 301 | /** |
|
| 302 | /** |
302 | * @brief Disable event on PVD Exti Line 16. |
| 303 | * @brief Disable event on PVD Exti Line 16. |
303 | * @retval None. |
| 304 | * @retval None. |
304 | */ |
| 305 | */ |
305 | #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD) |
| 306 | #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD) |
306 | |
| 307 | 307 | ||
| 308 | 308 | /** |
|
| 309 | /** |
309 | * @brief PVD EXTI line configuration: set falling edge trigger. |
| 310 | * @brief PVD EXTI line configuration: set falling edge trigger. |
310 | * @retval None. |
| 311 | * @retval None. |
311 | */ |
| 312 | */ |
312 | #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) |
| 313 | #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) |
313 | |
| 314 | 314 | ||
| 315 | 315 | /** |
|
| 316 | /** |
316 | * @brief Disable the PVD Extended Interrupt Falling Trigger. |
| 317 | * @brief Disable the PVD Extended Interrupt Falling Trigger. |
317 | * @retval None. |
| 318 | * @retval None. |
318 | */ |
| 319 | */ |
319 | #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) |
| 320 | #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) |
320 | |
| 321 | 321 | ||
| 322 | 322 | /** |
|
| 323 | /** |
323 | * @brief PVD EXTI line configuration: set rising edge trigger. |
| 324 | * @brief PVD EXTI line configuration: set rising edge trigger. |
324 | * @retval None. |
| 325 | * @retval None. |
325 | */ |
| 326 | */ |
326 | #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) |
| 327 | #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) |
327 | |
| 328 | 328 | /** |
|
| 329 | /** |
329 | * @brief Disable the PVD Extended Interrupt Rising Trigger. |
| 330 | * @brief Disable the PVD Extended Interrupt Rising Trigger. |
330 | * @retval None. |
| 331 | * @retval None. |
331 | */ |
| 332 | */ |
332 | #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) |
| 333 | #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) |
333 | |
| 334 | 334 | /** |
|
| 335 | /** |
335 | * @brief PVD EXTI line configuration: set rising & falling edge trigger. |
| 336 | * @brief PVD EXTI line configuration: set rising & falling edge trigger. |
336 | * @retval None. |
| 337 | * @retval None. |
337 | */ |
| 338 | */ |
338 | #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \ |
| 339 | #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \ |
339 | do { \ |
| 340 | do { \ |
340 | __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \ |
| 341 | __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \ |
341 | __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \ |
| 342 | __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \ |
342 | } while(0) |
| 343 | } while(0) |
343 | |
| 344 | 344 | /** |
|
| 345 | /** |
345 | * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. |
| 346 | * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. |
346 | * @retval None. |
| 347 | * @retval None. |
347 | */ |
| 348 | */ |
348 | #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \ |
| 349 | #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \ |
349 | do { \ |
| 350 | do { \ |
350 | __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \ |
| 351 | __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \ |
351 | __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \ |
| 352 | __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \ |
352 | } while(0) |
| 353 | } while(0) |
353 | |
| 354 | 354 | ||
| 355 | 355 | ||
| 356 | 356 | /** |
|
| 357 | /** |
357 | * @brief Check whether the specified PVD EXTI interrupt flag is set or not. |
| 358 | * @brief Check whether the specified PVD EXTI interrupt flag is set or not. |
358 | * @retval EXTI PVD Line Status. |
| 359 | * @retval EXTI PVD Line Status. |
359 | */ |
| 360 | */ |
360 | #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD)) |
| 361 | #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD)) |
361 | |
| 362 | 362 | /** |
|
| 363 | /** |
363 | * @brief Clear the PVD EXTI flag. |
| 364 | * @brief Clear the PVD EXTI flag. |
364 | * @retval None. |
| 365 | * @retval None. |
365 | */ |
| 366 | */ |
366 | #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD)) |
| 367 | #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD)) |
367 | |
| 368 | 368 | /** |
|
| 369 | /** |
369 | * @brief Generate a Software interrupt on selected EXTI line. |
| 370 | * @brief Generate a Software interrupt on selected EXTI line. |
370 | * @retval None. |
| 371 | * @retval None. |
371 | */ |
| 372 | */ |
372 | #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, PWR_EXTI_LINE_PVD) |
| 373 | #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, PWR_EXTI_LINE_PVD) |
373 | |
| 374 | 374 | /** |
|
| 375 | /** |
375 | * @} |
| 376 | * @} |
376 | */ |
| 377 | */ |
377 | |
| 378 | 378 | /* Private macro -------------------------------------------------------------*/ |
|
| 379 | /* Private macro -------------------------------------------------------------*/ |
379 | /** @defgroup PWR_Private_Macros PWR Private Macros |
| 380 | /** @defgroup PWR_Private_Macros PWR Private Macros |
380 | * @{ |
| 381 | * @{ |
381 | */ |
| 382 | */ |
382 | |
| 383 | 383 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ |
|
| 384 | #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ |
384 | ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ |
| 385 | ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ |
385 | ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ |
| 386 | ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ |
386 | ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) |
| 387 | ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) |
387 | |
| 388 | 388 | ||
| 389 | 389 | #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \ |
|
| 390 | #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \ |
390 | ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \ |
| 391 | ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \ |
391 | ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \ |
| 392 | ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \ |
392 | ((MODE) == PWR_PVD_MODE_NORMAL)) |
| 393 | ((MODE) == PWR_PVD_MODE_NORMAL)) |
393 | |
| 394 | 394 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ |
|
| 395 | #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ |
395 | ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) |
| 396 | ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) |
396 | |
| 397 | 397 | ||
| 398 | 398 | #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) |
|
| 399 | #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) |
399 | |
| 400 | 400 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE) ) |
|
| 401 | #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE) ) |
401 | |
| 402 | 402 | #define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \ |
|
| 403 | #define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \ |
403 | ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \ |
| 404 | ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \ |
404 | ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE3)) |
| 405 | ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE3)) |
405 | |
| 406 | 406 | ||
| 407 | 407 | /** |
|
| 408 | /** |
408 | * @} |
| 409 | * @} |
409 | */ |
| 410 | */ |
410 | |
| 411 | 411 | ||
| 412 | 412 | ||
| 413 | 413 | /* Include PWR HAL Extension module */ |
|
| 414 | /* Include PWR HAL Extension module */ |
414 | #include "stm32l1xx_hal_pwr_ex.h" |
| 415 | #include "stm32l1xx_hal_pwr_ex.h" |
415 | |
| 416 | 416 | /* Exported functions --------------------------------------------------------*/ |
|
| 417 | /* Exported functions --------------------------------------------------------*/ |
417 | |
| 418 | 418 | /** @addtogroup PWR_Exported_Functions PWR Exported Functions |
|
| 419 | /** @addtogroup PWR_Exported_Functions PWR Exported Functions |
419 | * @{ |
| 420 | * @{ |
420 | */ |
| 421 | */ |
421 | |
| 422 | 422 | /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions |
|
| 423 | /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions |
423 | * @{ |
| 424 | * @{ |
424 | */ |
| 425 | */ |
425 | |
| 426 | 426 | /* Initialization and de-initialization functions *******************************/ |
|
| 427 | /* Initialization and de-initialization functions *******************************/ |
427 | void HAL_PWR_DeInit(void); |
| 428 | void HAL_PWR_DeInit(void); |
428 | void HAL_PWR_EnableBkUpAccess(void); |
| 429 | void HAL_PWR_EnableBkUpAccess(void); |
429 | void HAL_PWR_DisableBkUpAccess(void); |
| 430 | void HAL_PWR_DisableBkUpAccess(void); |
430 | |
| 431 | 431 | /** |
|
| 432 | /** |
432 | * @} |
| 433 | * @} |
433 | */ |
| 434 | */ |
434 | |
| 435 | 435 | /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions |
|
| 436 | /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions |
436 | * @{ |
| 437 | * @{ |
437 | */ |
| 438 | */ |
438 | |
| 439 | 439 | /* Peripheral Control functions ************************************************/ |
|
| 440 | /* Peripheral Control functions ************************************************/ |
440 | void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); |
| 441 | void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); |
441 | void HAL_PWR_EnablePVD(void); |
| 442 | void HAL_PWR_EnablePVD(void); |
442 | void HAL_PWR_DisablePVD(void); |
| 443 | void HAL_PWR_DisablePVD(void); |
443 | |
| 444 | 444 | /* WakeUp pins configuration functions ****************************************/ |
|
| 445 | /* WakeUp pins configuration functions ****************************************/ |
445 | void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx); |
| 446 | void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx); |
446 | void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); |
| 447 | void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); |
447 | |
| 448 | 448 | /* Low Power modes configuration functions ************************************/ |
|
| 449 | /* Low Power modes configuration functions ************************************/ |
449 | void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); |
| 450 | void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); |
450 | void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); |
| 451 | void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); |
451 | void HAL_PWR_EnterSTANDBYMode(void); |
| 452 | void HAL_PWR_EnterSTANDBYMode(void); |
452 | |
| 453 | 453 | void HAL_PWR_EnableSleepOnExit(void); |
|
| 454 | void HAL_PWR_EnableSleepOnExit(void); |
454 | void HAL_PWR_DisableSleepOnExit(void); |
| 455 | void HAL_PWR_DisableSleepOnExit(void); |
455 | void HAL_PWR_EnableSEVOnPend(void); |
| 456 | void HAL_PWR_EnableSEVOnPend(void); |
456 | void HAL_PWR_DisableSEVOnPend(void); |
| 457 | void HAL_PWR_DisableSEVOnPend(void); |
457 | |
| 458 | 458 | ||
| 459 | 459 | ||
| 460 | 460 | void HAL_PWR_PVD_IRQHandler(void); |
|
| 461 | void HAL_PWR_PVD_IRQHandler(void); |
461 | void HAL_PWR_PVDCallback(void); |
| 462 | void HAL_PWR_PVDCallback(void); |
462 | /** |
| 463 | /** |
463 | * @} |
| 464 | * @} |
464 | */ |
| 465 | */ |
465 | |
| 466 | 466 | /** |
|
| 467 | /** |
467 | * @} |
| 468 | * @} |
468 | */ |
| 469 | */ |
469 | |
| 470 | 470 | /** |
|
| 471 | /** |
471 | * @} |
| 472 | * @} |
472 | */ |
| 473 | */ |
473 | |
| 474 | 474 | /** |
|
| 475 | /** |
475 | * @} |
| 476 | * @} |
476 | */ |
| 477 | */ |
477 | |
| 478 | 478 | #ifdef __cplusplus |
|
| 479 | #ifdef __cplusplus |
479 | } |
| 480 | } |
480 | #endif |
| 481 | #endif |
481 | |
| 482 | 482 | ||
| 483 | 483 | #endif /* __STM32L1xx_HAL_PWR_H */ |
|
| 484 | #endif /* __STM32L1xx_HAL_PWR_H */ |
- | |
| 485 | - | ||
| 486 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
- | |