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/**
1
/**
2
  ******************************************************************************
2
  ******************************************************************************
3
  * @file    stm32l1xx_hal_pcd.h
3
  * @file    stm32l1xx_hal_pcd.h
4
  * @author  MCD Application Team
4
  * @author  MCD Application Team
5
  * @brief   Header file of PCD HAL module.
5
  * @brief   Header file of PCD HAL module.
6
  ******************************************************************************
6
  ******************************************************************************
7
  * @attention
7
  * @attention
8
  *
8
  *
9
  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
9
  * Copyright (c) 2016 STMicroelectronics.
10
  * All rights reserved.</center></h2>
10
  * All rights reserved.
11
  *
11
  *
12
  * This software component is licensed by ST under BSD 3-Clause license,
12
  * This software is licensed under terms that can be found in the LICENSE file
13
  * the "License"; You may not use this file except in compliance with the
13
  * in the root directory of this software component.
14
  * License. You may obtain a copy of the License at:
14
  * If no LICENSE file comes with this software, it is provided AS-IS.
15
  *                        opensource.org/licenses/BSD-3-Clause
15
  *
16
  *
16
  ******************************************************************************
17
  ******************************************************************************
17
  */
18
  */
18
 
19
 
19
/* Define to prevent recursive inclusion -------------------------------------*/
20
/* Define to prevent recursive inclusion -------------------------------------*/
20
#ifndef STM32L1xx_HAL_PCD_H
21
#ifndef STM32L1xx_HAL_PCD_H
21
#define STM32L1xx_HAL_PCD_H
22
#define STM32L1xx_HAL_PCD_H
22
 
23
 
23
#ifdef __cplusplus
24
#ifdef __cplusplus
24
extern "C" {
25
extern "C" {
25
#endif
26
#endif
26
 
27
 
27
/* Includes ------------------------------------------------------------------*/
28
/* Includes ------------------------------------------------------------------*/
28
#include "stm32l1xx_ll_usb.h"
29
#include "stm32l1xx_ll_usb.h"
29
 
30
 
30
#if defined (USB)
31
#if defined (USB)
31
 
32
 
32
/** @addtogroup STM32L1xx_HAL_Driver
33
/** @addtogroup STM32L1xx_HAL_Driver
33
  * @{
34
  * @{
34
  */
35
  */
35
 
36
 
36
/** @addtogroup PCD
37
/** @addtogroup PCD
37
  * @{
38
  * @{
38
  */
39
  */
39
 
40
 
40
/* Exported types ------------------------------------------------------------*/
41
/* Exported types ------------------------------------------------------------*/
41
/** @defgroup PCD_Exported_Types PCD Exported Types
42
/** @defgroup PCD_Exported_Types PCD Exported Types
42
  * @{
43
  * @{
43
  */
44
  */
44
 
45
 
45
/**
46
/**
46
  * @brief  PCD State structure definition
47
  * @brief  PCD State structure definition
47
  */
48
  */
48
typedef enum
49
typedef enum
49
{
50
{
50
  HAL_PCD_STATE_RESET   = 0x00,
51
  HAL_PCD_STATE_RESET   = 0x00,
51
  HAL_PCD_STATE_READY   = 0x01,
52
  HAL_PCD_STATE_READY   = 0x01,
52
  HAL_PCD_STATE_ERROR   = 0x02,
53
  HAL_PCD_STATE_ERROR   = 0x02,
53
  HAL_PCD_STATE_BUSY    = 0x03,
54
  HAL_PCD_STATE_BUSY    = 0x03,
54
  HAL_PCD_STATE_TIMEOUT = 0x04
55
  HAL_PCD_STATE_TIMEOUT = 0x04
55
} PCD_StateTypeDef;
56
} PCD_StateTypeDef;
56
 
57
 
57
/* Device LPM suspend state */
58
/* Device LPM suspend state */
58
typedef enum
59
typedef enum
59
{
60
{
60
  LPM_L0 = 0x00, /* on */
61
  LPM_L0 = 0x00, /* on */
61
  LPM_L1 = 0x01, /* LPM L1 sleep */
62
  LPM_L1 = 0x01, /* LPM L1 sleep */
62
  LPM_L2 = 0x02, /* suspend */
63
  LPM_L2 = 0x02, /* suspend */
63
  LPM_L3 = 0x03, /* off */
64
  LPM_L3 = 0x03, /* off */
64
} PCD_LPM_StateTypeDef;
65
} PCD_LPM_StateTypeDef;
65
 
66
 
66
typedef enum
67
typedef enum
67
{
68
{
68
  PCD_LPM_L0_ACTIVE = 0x00, /* on */
69
  PCD_LPM_L0_ACTIVE = 0x00, /* on */
69
  PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
70
  PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
70
} PCD_LPM_MsgTypeDef;
71
} PCD_LPM_MsgTypeDef;
71
 
72
 
72
typedef enum
73
typedef enum
73
{
74
{
74
  PCD_BCD_ERROR                     = 0xFF,
75
  PCD_BCD_ERROR                     = 0xFF,
75
  PCD_BCD_CONTACT_DETECTION         = 0xFE,
76
  PCD_BCD_CONTACT_DETECTION         = 0xFE,
76
  PCD_BCD_STD_DOWNSTREAM_PORT       = 0xFD,
77
  PCD_BCD_STD_DOWNSTREAM_PORT       = 0xFD,
77
  PCD_BCD_CHARGING_DOWNSTREAM_PORT  = 0xFC,
78
  PCD_BCD_CHARGING_DOWNSTREAM_PORT  = 0xFC,
78
  PCD_BCD_DEDICATED_CHARGING_PORT   = 0xFB,
79
  PCD_BCD_DEDICATED_CHARGING_PORT   = 0xFB,
79
  PCD_BCD_DISCOVERY_COMPLETED       = 0x00,
80
  PCD_BCD_DISCOVERY_COMPLETED       = 0x00,
80
 
81
 
81
} PCD_BCD_MsgTypeDef;
82
} PCD_BCD_MsgTypeDef;
82
 
83
 
83
 
84
 
84
 
85
 
85
 
86
 
86
 
87
 
87
typedef USB_TypeDef        PCD_TypeDef;
88
typedef USB_TypeDef        PCD_TypeDef;
88
typedef USB_CfgTypeDef     PCD_InitTypeDef;
89
typedef USB_CfgTypeDef     PCD_InitTypeDef;
89
typedef USB_EPTypeDef      PCD_EPTypeDef;
90
typedef USB_EPTypeDef      PCD_EPTypeDef;
90
 
91
 
91
 
92
 
92
/**
93
/**
93
  * @brief  PCD Handle Structure definition
94
  * @brief  PCD Handle Structure definition
94
  */
95
  */
95
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
96
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
96
typedef struct __PCD_HandleTypeDef
97
typedef struct __PCD_HandleTypeDef
97
#else
98
#else
98
typedef struct
99
typedef struct
99
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
100
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
100
{
101
{
101
  PCD_TypeDef             *Instance;   /*!< Register base address             */
102
  PCD_TypeDef             *Instance;   /*!< Register base address             */
102
  PCD_InitTypeDef         Init;        /*!< PCD required parameters           */
103
  PCD_InitTypeDef         Init;        /*!< PCD required parameters           */
103
  __IO uint8_t            USB_Address; /*!< USB Address                       */
104
  __IO uint8_t            USB_Address; /*!< USB Address                       */
104
  PCD_EPTypeDef           IN_ep[8];    /*!< IN endpoint parameters            */
105
  PCD_EPTypeDef           IN_ep[8];   /*!< IN endpoint parameters             */
105
  PCD_EPTypeDef           OUT_ep[8];   /*!< OUT endpoint parameters           */
106
  PCD_EPTypeDef           OUT_ep[8];  /*!< OUT endpoint parameters            */
106
  HAL_LockTypeDef         Lock;        /*!< PCD peripheral status             */
107
  HAL_LockTypeDef         Lock;        /*!< PCD peripheral status             */
107
  __IO PCD_StateTypeDef   State;       /*!< PCD communication state           */
108
  __IO PCD_StateTypeDef   State;       /*!< PCD communication state           */
108
  __IO  uint32_t          ErrorCode;   /*!< PCD Error code                    */
109
  __IO  uint32_t          ErrorCode;   /*!< PCD Error code                    */
109
  uint32_t                Setup[12];   /*!< Setup packet buffer               */
110
  uint32_t                Setup[12];   /*!< Setup packet buffer               */
110
  PCD_LPM_StateTypeDef    LPM_State;   /*!< LPM State                         */
111
  PCD_LPM_StateTypeDef    LPM_State;   /*!< LPM State                         */
111
  uint32_t                BESL;
112
  uint32_t                BESL;
112
 
113
 
113
  void                    *pData;      /*!< Pointer to upper stack Handler */
114
  void                    *pData;      /*!< Pointer to upper stack Handler */
114
 
115
 
115
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
116
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
116
  void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd);                              /*!< USB OTG PCD SOF callback                */
117
  void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd);                              /*!< USB OTG PCD SOF callback                */
117
  void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Setup Stage callback        */
118
  void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Setup Stage callback        */
118
  void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd);                            /*!< USB OTG PCD Reset callback              */
119
  void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd);                            /*!< USB OTG PCD Reset callback              */
119
  void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Suspend callback            */
120
  void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Suspend callback            */
120
  void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd);                           /*!< USB OTG PCD Resume callback             */
121
  void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd);                           /*!< USB OTG PCD Resume callback             */
121
  void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Connect callback            */
122
  void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Connect callback            */
122
  void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Disconnect callback         */
123
  void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Disconnect callback         */
123
 
124
 
124
  void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);      /*!< USB OTG PCD Data OUT Stage callback     */
125
  void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);      /*!< USB OTG PCD Data OUT Stage callback     */
125
  void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);       /*!< USB OTG PCD Data IN Stage callback      */
126
  void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);       /*!< USB OTG PCD Data IN Stage callback      */
126
  void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);  /*!< USB OTG PCD ISO OUT Incomplete callback */
127
  void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);  /*!< USB OTG PCD ISO OUT Incomplete callback */
127
  void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);   /*!< USB OTG PCD ISO IN Incomplete callback  */
128
  void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);   /*!< USB OTG PCD ISO IN Incomplete callback  */
128
 
129
 
129
  void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Msp Init callback           */
130
  void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Msp Init callback           */
130
  void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd);                        /*!< USB OTG PCD Msp DeInit callback         */
131
  void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd);                        /*!< USB OTG PCD Msp DeInit callback         */
131
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
132
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
132
} PCD_HandleTypeDef;
133
} PCD_HandleTypeDef;
133
 
134
 
134
/**
135
/**
135
  * @}
136
  * @}
136
  */
137
  */
137
 
138
 
138
/* Include PCD HAL Extended module */
139
/* Include PCD HAL Extended module */
139
#include "stm32l1xx_hal_pcd_ex.h"
140
#include "stm32l1xx_hal_pcd_ex.h"
140
 
141
 
141
/* Exported constants --------------------------------------------------------*/
142
/* Exported constants --------------------------------------------------------*/
142
/** @defgroup PCD_Exported_Constants PCD Exported Constants
143
/** @defgroup PCD_Exported_Constants PCD Exported Constants
143
  * @{
144
  * @{
144
  */
145
  */
145
 
146
 
146
/** @defgroup PCD_Speed PCD Speed
147
/** @defgroup PCD_Speed PCD Speed
147
  * @{
148
  * @{
148
  */
149
  */
149
#define PCD_SPEED_FULL               USBD_FS_SPEED
150
#define PCD_SPEED_FULL               USBD_FS_SPEED
150
/**
151
/**
151
  * @}
152
  * @}
152
  */
153
  */
153
 
154
 
154
/** @defgroup PCD_PHY_Module PCD PHY Module
155
/** @defgroup PCD_PHY_Module PCD PHY Module
155
  * @{
156
  * @{
156
  */
157
  */
157
#define PCD_PHY_ULPI                 1U
158
#define PCD_PHY_ULPI                 1U
158
#define PCD_PHY_EMBEDDED             2U
159
#define PCD_PHY_EMBEDDED             2U
159
#define PCD_PHY_UTMI                 3U
160
#define PCD_PHY_UTMI                 3U
160
/**
161
/**
161
  * @}
162
  * @}
162
  */
163
  */
163
 
164
 
164
/** @defgroup PCD_Error_Code_definition PCD Error Code definition
165
/** @defgroup PCD_Error_Code_definition PCD Error Code definition
165
  * @brief  PCD Error Code definition
166
  * @brief  PCD Error Code definition
166
  * @{
167
  * @{
167
  */
168
  */
168
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
169
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
169
#define  HAL_PCD_ERROR_INVALID_CALLBACK                        (0x00000010U)    /*!< Invalid Callback error  */
170
#define  HAL_PCD_ERROR_INVALID_CALLBACK                        (0x00000010U)    /*!< Invalid Callback error  */
170
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
171
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
171
 
172
 
172
/**
173
/**
173
  * @}
174
  * @}
174
  */
175
  */
175
 
176
 
176
/**
177
/**
177
  * @}
178
  * @}
178
  */
179
  */
179
 
180
 
180
/* Exported macros -----------------------------------------------------------*/
181
/* Exported macros -----------------------------------------------------------*/
181
/** @defgroup PCD_Exported_Macros PCD Exported Macros
182
/** @defgroup PCD_Exported_Macros PCD Exported Macros
182
  *  @brief macros to handle interrupts and specific clock configurations
183
  *  @brief macros to handle interrupts and specific clock configurations
183
  * @{
184
  * @{
184
  */
185
  */
185
#define __HAL_PCD_ENABLE(__HANDLE__)                       (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
186
 
186
#define __HAL_PCD_DISABLE(__HANDLE__)                      (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
187
 
187
 
188
#define __HAL_PCD_ENABLE(__HANDLE__)                                  (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
188
#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) \
189
#define __HAL_PCD_DISABLE(__HANDLE__)                                 (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
189
  ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
190
#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__)                 ((USB_ReadInterrupts((__HANDLE__)->Instance)\
190
 
191
                                                                        & (__INTERRUPT__)) == (__INTERRUPT__))
191
 
192
 
192
#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)           (((__HANDLE__)->Instance->ISTR)\
193
#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)               (((__HANDLE__)->Instance->ISTR)\
193
                                                                   &= (uint16_t)(~(__INTERRUPT__)))
194
                                                                       &= (uint16_t)(~(__INTERRUPT__)))
194
 
195
 
195
#define __HAL_USB_WAKEUP_EXTI_ENABLE_IT()                         EXTI->IMR |= USB_WAKEUP_EXTI_LINE
196
#define __HAL_USB_WAKEUP_EXTI_ENABLE_IT()                             EXTI->IMR |= USB_WAKEUP_EXTI_LINE
196
#define __HAL_USB_WAKEUP_EXTI_DISABLE_IT()                        EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
197
#define __HAL_USB_WAKEUP_EXTI_DISABLE_IT()                            EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
197
#define __HAL_USB_WAKEUP_EXTI_GET_FLAG()                          EXTI->PR & (USB_WAKEUP_EXTI_LINE)
198
#define __HAL_USB_WAKEUP_EXTI_GET_FLAG()                              EXTI->PR & (USB_WAKEUP_EXTI_LINE)
198
#define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG()                        EXTI->PR = USB_WAKEUP_EXTI_LINE
199
#define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG()                            EXTI->PR = USB_WAKEUP_EXTI_LINE
199
 
200
 
200
#define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
201
#define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
201
  do { \
202
  do { \
202
    EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
203
    EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
203
    EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \
204
    EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \
204
  } while(0U)
205
  } while(0U)
205
 
206
 
206
 
207
 
207
 
208
 
208
/**
209
/**
209
  * @}
210
  * @}
210
  */
211
  */
211
 
212
 
212
/* Exported functions --------------------------------------------------------*/
213
/* Exported functions --------------------------------------------------------*/
213
/** @addtogroup PCD_Exported_Functions PCD Exported Functions
214
/** @addtogroup PCD_Exported_Functions PCD Exported Functions
214
  * @{
215
  * @{
215
  */
216
  */
216
 
217
 
217
/* Initialization/de-initialization functions  ********************************/
218
/* Initialization/de-initialization functions  ********************************/
218
/** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
219
/** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
219
  * @{
220
  * @{
220
  */
221
  */
221
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
222
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
222
HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
223
HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
223
void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
224
void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
224
void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
225
void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
225
 
226
 
226
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
227
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
227
/** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
228
/** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
228
  * @brief  HAL USB OTG PCD Callback ID enumeration definition
229
  * @brief  HAL USB OTG PCD Callback ID enumeration definition
229
  * @{
230
  * @{
230
  */
231
  */
231
typedef enum
232
typedef enum
232
{
233
{
233
  HAL_PCD_SOF_CB_ID          = 0x01,      /*!< USB PCD SOF callback ID          */
234
  HAL_PCD_SOF_CB_ID          = 0x01,      /*!< USB PCD SOF callback ID          */
234
  HAL_PCD_SETUPSTAGE_CB_ID   = 0x02,      /*!< USB PCD Setup Stage callback ID  */
235
  HAL_PCD_SETUPSTAGE_CB_ID   = 0x02,      /*!< USB PCD Setup Stage callback ID  */
235
  HAL_PCD_RESET_CB_ID        = 0x03,      /*!< USB PCD Reset callback ID        */
236
  HAL_PCD_RESET_CB_ID        = 0x03,      /*!< USB PCD Reset callback ID        */
236
  HAL_PCD_SUSPEND_CB_ID      = 0x04,      /*!< USB PCD Suspend callback ID      */
237
  HAL_PCD_SUSPEND_CB_ID      = 0x04,      /*!< USB PCD Suspend callback ID      */
237
  HAL_PCD_RESUME_CB_ID       = 0x05,      /*!< USB PCD Resume callback ID       */
238
  HAL_PCD_RESUME_CB_ID       = 0x05,      /*!< USB PCD Resume callback ID       */
238
  HAL_PCD_CONNECT_CB_ID      = 0x06,      /*!< USB PCD Connect callback ID      */
239
  HAL_PCD_CONNECT_CB_ID      = 0x06,      /*!< USB PCD Connect callback ID      */
239
  HAL_PCD_DISCONNECT_CB_ID   = 0x07,      /*!< USB PCD Disconnect callback ID   */
240
  HAL_PCD_DISCONNECT_CB_ID   = 0x07,      /*!< USB PCD Disconnect callback ID   */
240
 
241
 
241
  HAL_PCD_MSPINIT_CB_ID      = 0x08,      /*!< USB PCD MspInit callback ID      */
242
  HAL_PCD_MSPINIT_CB_ID      = 0x08,      /*!< USB PCD MspInit callback ID      */
242
  HAL_PCD_MSPDEINIT_CB_ID    = 0x09       /*!< USB PCD MspDeInit callback ID    */
243
  HAL_PCD_MSPDEINIT_CB_ID    = 0x09       /*!< USB PCD MspDeInit callback ID    */
243
 
244
 
244
} HAL_PCD_CallbackIDTypeDef;
245
} HAL_PCD_CallbackIDTypeDef;
245
/**
246
/**
246
  * @}
247
  * @}
247
  */
248
  */
248
 
249
 
249
/** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
250
/** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
250
  * @brief  HAL USB OTG PCD Callback pointer definition
251
  * @brief  HAL USB OTG PCD Callback pointer definition
251
  * @{
252
  * @{
252
  */
253
  */
253
 
254
 
254
typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd);                                   /*!< pointer to a common USB OTG PCD callback function  */
255
typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd);                                   /*!< pointer to a common USB OTG PCD callback function  */
255
typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD Data OUT Stage callback     */
256
typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD Data OUT Stage callback     */
256
typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD Data IN Stage callback      */
257
typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD Data IN Stage callback      */
257
typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */
258
typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */
258
typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD ISO IN Incomplete callback  */
259
typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD ISO IN Incomplete callback  */
259
 
260
 
260
/**
261
/**
261
  * @}
262
  * @}
262
  */
263
  */
263
 
264
 
264
HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID,
265
HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd,
265
                                           pPCD_CallbackTypeDef pCallback);
266
                                           HAL_PCD_CallbackIDTypeDef CallbackID,
266
 
267
                                           pPCD_CallbackTypeDef pCallback);
267
HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);
268
 
268
 
269
HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd,
269
HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
270
                                             HAL_PCD_CallbackIDTypeDef CallbackID);
270
                                                       pPCD_DataOutStageCallbackTypeDef pCallback);
271
 
271
 
272
HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
272
HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
273
                                                       pPCD_DataOutStageCallbackTypeDef pCallback);
273
 
274
 
274
HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd,
275
HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
275
                                                      pPCD_DataInStageCallbackTypeDef pCallback);
276
 
276
 
277
HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd,
277
HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
278
                                                      pPCD_DataInStageCallbackTypeDef pCallback);
278
 
279
 
279
HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd,
280
HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
280
                                                       pPCD_IsoOutIncpltCallbackTypeDef pCallback);
281
 
281
 
282
HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd,
282
HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
283
                                                       pPCD_IsoOutIncpltCallbackTypeDef pCallback);
283
 
284
 
284
HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd,
285
HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
285
                                                      pPCD_IsoInIncpltCallbackTypeDef pCallback);
286
 
286
 
287
HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd,
287
HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
288
                                                      pPCD_IsoInIncpltCallbackTypeDef pCallback);
288
 
289
 
289
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
290
HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
290
/**
291
 
291
  * @}
292
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
292
  */
293
/**
293
 
294
  * @}
294
/* I/O operation functions  ***************************************************/
295
  */
295
/* Non-Blocking mode: Interrupt */
296
 
296
/** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
297
/* I/O operation functions  ***************************************************/
297
  * @{
298
/* Non-Blocking mode: Interrupt */
298
  */
299
/** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
299
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
300
  * @{
300
HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
301
  */
301
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
302
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
302
void HAL_PCD_WKUP_IRQHandler(PCD_HandleTypeDef *hpcd);
303
HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
303
 
304
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
304
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
305
void HAL_PCD_WKUP_IRQHandler(PCD_HandleTypeDef *hpcd);
305
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
306
 
306
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
307
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
307
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
308
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
308
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
309
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
309
void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
310
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
310
void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
311
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
311
 
312
void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
312
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
313
void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
313
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
314
 
314
void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
315
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
315
void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
316
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
316
/**
317
void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
317
  * @}
318
void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
318
  */
319
/**
319
 
320
  * @}
320
/* Peripheral Control functions  **********************************************/
321
  */
321
/** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
322
 
322
  * @{
323
/* Peripheral Control functions  **********************************************/
323
  */
324
/** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
324
HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
325
  * @{
325
HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
326
  */
326
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
327
HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
327
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
328
HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
328
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
329
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
329
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
330
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
330
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
331
                                  uint16_t ep_mps, uint8_t ep_type);
331
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
332
 
332
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
333
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
333
HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
334
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
334
HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
335
                                     uint8_t *pBuf, uint32_t len);
335
HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
336
 
336
HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
337
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
337
uint32_t          HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr);
338
                                      uint8_t *pBuf, uint32_t len);
338
/**
339
 
339
  * @}
340
 
340
  */
341
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
341
 
342
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
342
/* Peripheral State functions  ************************************************/
343
HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
343
/** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
344
HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
344
  * @{
345
HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
345
  */
346
 
346
PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef const *hpcd);
347
uint32_t          HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
347
/**
348
/**
348
  * @}
349
  * @}
349
  */
350
  */
350
 
351
 
351
/**
352
/* Peripheral State functions  ************************************************/
352
  * @}
353
/** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
353
  */
354
  * @{
354
 
355
  */
355
/* Private constants ---------------------------------------------------------*/
356
PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
356
/** @defgroup PCD_Private_Constants PCD Private Constants
357
/**
357
  * @{
358
  * @}
358
  */
359
  */
359
/** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
360
 
360
  * @{
361
/**
361
  */
362
  * @}
362
 
363
  */
363
 
364
 
364
#define USB_WAKEUP_EXTI_LINE                                          (0x1U << 18)  /*!< USB FS EXTI Line WakeUp Interrupt */
365
/* Private constants ---------------------------------------------------------*/
365
 
366
/** @defgroup PCD_Private_Constants PCD Private Constants
366
 
367
  * @{
367
/**
368
  */
368
  * @}
369
/** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
369
  */
370
  * @{
370
 
371
  */
371
/** @defgroup PCD_EP0_MPS PCD EP0 MPS
372
 
372
  * @{
373
 
373
  */
374
#define USB_WAKEUP_EXTI_LINE                                          (0x1U << 18)  /*!< USB FS EXTI Line WakeUp Interrupt */
374
#define PCD_EP0MPS_64                                                 EP_MPS_64
375
 
375
#define PCD_EP0MPS_32                                                 EP_MPS_32
376
 
376
#define PCD_EP0MPS_16                                                 EP_MPS_16
377
/**
377
#define PCD_EP0MPS_08                                                 EP_MPS_8
378
  * @}
378
/**
379
  */
379
  * @}
380
 
380
  */
381
/** @defgroup PCD_EP0_MPS PCD EP0 MPS
381
 
382
  * @{
382
/** @defgroup PCD_ENDP PCD ENDP
383
  */
383
  * @{
384
#define PCD_EP0MPS_64                                                 EP_MPS_64
384
  */
385
#define PCD_EP0MPS_32                                                 EP_MPS_32
385
#define PCD_ENDP0                                                     0U
386
#define PCD_EP0MPS_16                                                 EP_MPS_16
386
#define PCD_ENDP1                                                     1U
387
#define PCD_EP0MPS_08                                                 EP_MPS_8
387
#define PCD_ENDP2                                                     2U
388
/**
388
#define PCD_ENDP3                                                     3U
389
  * @}
389
#define PCD_ENDP4                                                     4U
390
  */
390
#define PCD_ENDP5                                                     5U
391
 
391
#define PCD_ENDP6                                                     6U
392
/** @defgroup PCD_ENDP PCD ENDP
392
#define PCD_ENDP7                                                     7U
393
  * @{
393
/**
394
  */
394
  * @}
395
#define PCD_ENDP0                                                     0U
395
  */
396
#define PCD_ENDP1                                                     1U
396
 
397
#define PCD_ENDP2                                                     2U
397
/** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
398
#define PCD_ENDP3                                                     3U
398
  * @{
399
#define PCD_ENDP4                                                     4U
399
  */
400
#define PCD_ENDP5                                                     5U
400
#define PCD_SNG_BUF                                                   0U
401
#define PCD_ENDP6                                                     6U
401
#define PCD_DBL_BUF                                                   1U
402
#define PCD_ENDP7                                                     7U
402
/**
403
/**
403
  * @}
404
  * @}
404
  */
405
  */
405
 
406
 
406
/**
407
/** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
407
  * @}
408
  * @{
408
  */
409
  */
409
 
410
#define PCD_SNG_BUF                                                   0U
410
/* Private macros ------------------------------------------------------------*/
411
#define PCD_DBL_BUF                                                   1U
411
/** @defgroup PCD_Private_Macros PCD Private Macros
412
/**
412
  * @{
413
  * @}
413
  */
414
  */
414
 
415
 
415
/********************  Bit definition for USB_COUNTn_RX register  *************/
416
/**
416
#define USB_CNTRX_NBLK_MSK                    (0x1FU << 10)
417
  * @}
417
#define USB_CNTRX_BLSIZE                      (0x1U << 15)
418
  */
418
 
419
 
419
/* SetENDPOINT */
420
/* Private macros ------------------------------------------------------------*/
420
#define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) \
421
/** @defgroup PCD_Private_Macros PCD Private Macros
421
  (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))
422
  * @{
422
 
423
  */
423
/* GetENDPOINT */
424
 
424
#define PCD_GET_ENDPOINT(USBx, bEpNum)             (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))
425
/********************  Bit definition for USB_COUNTn_RX register  *************/
425
 
426
#define USB_CNTRX_NBLK_MSK                    (0x1FU << 10)
426
 
427
#define USB_CNTRX_BLSIZE                      (0x1U << 15)
427
/**
428
 
428
  * @brief  sets the type in the endpoint register(bits EP_TYPE[1:0])
429
/* SetENDPOINT */
429
  * @param  USBx USB peripheral instance register address.
430
#define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue)  (*(__IO uint16_t *)\
430
  * @param  bEpNum Endpoint Number.
431
                                                    (&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))
431
  * @param  wType Endpoint Type.
432
 
432
  * @retval None
433
/* GetENDPOINT */
433
  */
434
#define PCD_GET_ENDPOINT(USBx, bEpNum)             (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))
434
#define PCD_SET_EPTYPE(USBx, bEpNum, wType) \
435
 
435
  (PCD_SET_ENDPOINT((USBx), (bEpNum), \
436
/* ENDPOINT transfer */
436
                    ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
437
#define USB_EP0StartXfer                           USB_EPStartXfer
437
 
438
 
438
 
439
/**
439
/**
440
  * @brief  sets the type in the endpoint register(bits EP_TYPE[1:0])
440
  * @brief  gets the type in the endpoint register(bits EP_TYPE[1:0])
441
  * @param  USBx USB peripheral instance register address.
441
  * @param  USBx USB peripheral instance register address.
442
  * @param  bEpNum Endpoint Number.
442
  * @param  bEpNum Endpoint Number.
443
  * @param  wType Endpoint Type.
443
  * @retval Endpoint Type
444
  * @retval None
444
  */
445
  */
445
#define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
446
#define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), ((PCD_GET_ENDPOINT((USBx), (bEpNum))\
446
 
447
                                                              & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
447
/**
448
 
448
  * @brief free buffer used from the application realizing it to the line
449
 
449
  *         toggles bit SW_BUF in the double buffered endpoint register
450
/**
450
  * @param USBx USB device.
451
  * @brief  gets the type in the endpoint register(bits EP_TYPE[1:0])
451
  * @param   bEpNum, bDir
452
  * @param  USBx USB peripheral instance register address.
452
  * @retval None
453
  * @param  bEpNum Endpoint Number.
453
  */
454
  * @retval Endpoint Type
454
#define PCD_FREE_USER_BUFFER(USBx, bEpNum, bDir) \
455
  */
455
  do { \
456
#define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
456
    if ((bDir) == 0U) \
457
 
457
    { \
458
/**
458
      /* OUT double buffered endpoint */ \
459
  * @brief free buffer used from the application realizing it to the line
459
      PCD_TX_DTOG((USBx), (bEpNum)); \
460
  *         toggles bit SW_BUF in the double buffered endpoint register
460
    } \
461
  * @param USBx USB device.
461
    else if ((bDir) == 1U) \
462
  * @param   bEpNum, bDir
462
    { \
463
  * @retval None
463
      /* IN double buffered endpoint */ \
464
  */
464
      PCD_RX_DTOG((USBx), (bEpNum)); \
465
#define PCD_FreeUserBuffer(USBx, bEpNum, bDir) \
465
    } \
466
  do { \
466
  } while(0)
467
    if ((bDir) == 0U) \
467
 
468
    { \
468
/**
469
      /* OUT double buffered endpoint */ \
469
  * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).
470
      PCD_TX_DTOG((USBx), (bEpNum)); \
470
  * @param  USBx USB peripheral instance register address.
471
    } \
471
  * @param  bEpNum Endpoint Number.
472
    else if ((bDir) == 1U) \
472
  * @param  wState new state
473
    { \
473
  * @retval None
474
      /* IN double buffered endpoint */ \
474
  */
475
      PCD_RX_DTOG((USBx), (bEpNum)); \
475
#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) \
476
    } \
476
  do { \
477
  } while(0)
477
    uint16_t _wRegVal; \
478
 
478
    \
479
/**
479
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \
480
  * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).
480
    /* toggle first bit ? */ \
481
  * @param  USBx USB peripheral instance register address.
481
    if ((USB_EPTX_DTOG1 & (wState))!= 0U) \
482
  * @param  bEpNum Endpoint Number.
482
    { \
483
  * @param  wState new state
483
      _wRegVal ^= USB_EPTX_DTOG1; \
484
  * @retval None
484
    } \
485
  */
485
    /* toggle second bit ?  */ \
486
#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) \
486
    if ((USB_EPTX_DTOG2 & (wState))!= 0U) \
487
  do { \
487
    { \
488
    uint16_t _wRegVal; \
488
      _wRegVal ^= USB_EPTX_DTOG2; \
489
    \
489
    } \
490
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \
490
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
491
    /* toggle first bit ? */ \
491
  } while(0) /* PCD_SET_EP_TX_STATUS */
492
    if ((USB_EPTX_DTOG1 & (wState))!= 0U) \
492
 
493
    { \
493
/**
494
      _wRegVal ^= USB_EPTX_DTOG1; \
494
  * @brief  sets the status for rx transfer (bits STAT_TX[1:0])
495
    } \
495
  * @param  USBx USB peripheral instance register address.
496
    /* toggle second bit ?  */ \
496
  * @param  bEpNum Endpoint Number.
497
    if ((USB_EPTX_DTOG2 & (wState))!= 0U) \
497
  * @param  wState new state
498
    { \
498
  * @retval None
499
      _wRegVal ^= USB_EPTX_DTOG2; \
499
  */
500
    } \
500
#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) \
501
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
501
  do { \
502
  } while(0) /* PCD_SET_EP_TX_STATUS */
502
    uint16_t _wRegVal; \
503
 
503
    \
504
/**
504
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \
505
  * @brief  sets the status for rx transfer (bits STAT_TX[1:0])
505
    /* toggle first bit ? */ \
506
  * @param  USBx USB peripheral instance register address.
506
    if ((USB_EPRX_DTOG1 & (wState))!= 0U) \
507
  * @param  bEpNum Endpoint Number.
507
    { \
508
  * @param  wState new state
508
      _wRegVal ^= USB_EPRX_DTOG1; \
509
  * @retval None
509
    } \
510
  */
510
    /* toggle second bit ? */ \
511
#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) \
511
    if ((USB_EPRX_DTOG2 & (wState))!= 0U) \
512
  do { \
512
    { \
513
    uint16_t _wRegVal; \
513
      _wRegVal ^= USB_EPRX_DTOG2; \
514
    \
514
    } \
515
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \
515
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
516
    /* toggle first bit ? */ \
516
  } while(0) /* PCD_SET_EP_RX_STATUS */
517
    if ((USB_EPRX_DTOG1 & (wState))!= 0U) \
517
 
518
    { \
518
/**
519
      _wRegVal ^= USB_EPRX_DTOG1; \
519
  * @brief  sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
520
    } \
520
  * @param  USBx USB peripheral instance register address.
521
    /* toggle second bit ? */ \
521
  * @param  bEpNum Endpoint Number.
522
    if ((USB_EPRX_DTOG2 & (wState))!= 0U) \
522
  * @param  wStaterx new state.
523
    { \
523
  * @param  wStatetx new state.
524
      _wRegVal ^= USB_EPRX_DTOG2; \
524
  * @retval None
525
    } \
525
  */
526
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
526
#define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) \
527
  } while(0) /* PCD_SET_EP_RX_STATUS */
527
  do { \
528
 
528
    uint16_t _wRegVal; \
529
/**
529
    \
530
  * @brief  sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
530
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \
531
  * @param  USBx USB peripheral instance register address.
531
    /* toggle first bit ? */ \
532
  * @param  bEpNum Endpoint Number.
532
    if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \
533
  * @param  wStaterx new state.
533
    { \
534
  * @param  wStatetx new state.
534
      _wRegVal ^= USB_EPRX_DTOG1; \
535
  * @retval None
535
    } \
536
  */
536
    /* toggle second bit ? */ \
537
#define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) \
537
    if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
538
  do { \
538
    { \
539
    uint16_t _wRegVal; \
539
      _wRegVal ^= USB_EPRX_DTOG2; \
540
    \
540
    } \
541
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \
541
    /* toggle first bit ? */ \
542
    /* toggle first bit ? */ \
542
    if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
543
    if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \
543
    { \
544
    { \
544
      _wRegVal ^= USB_EPTX_DTOG1; \
545
      _wRegVal ^= USB_EPRX_DTOG1; \
545
    } \
546
    } \
546
    /* toggle second bit ?  */ \
547
    /* toggle second bit ? */ \
547
    if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
548
    if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
548
    { \
549
    { \
549
      _wRegVal ^= USB_EPTX_DTOG2; \
550
      _wRegVal ^= USB_EPRX_DTOG2; \
550
    } \
551
    } \
551
    \
552
    /* toggle first bit ? */ \
552
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
553
    if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
553
  } while(0) /* PCD_SET_EP_TXRX_STATUS */
554
    { \
554
 
555
      _wRegVal ^= USB_EPTX_DTOG1; \
555
/**
556
    } \
556
  * @brief  gets the status for tx/rx transfer (bits STAT_TX[1:0]
557
    /* toggle second bit ?  */ \
557
  *         /STAT_RX[1:0])
558
    if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
558
  * @param  USBx USB peripheral instance register address.
559
    { \
559
  * @param  bEpNum Endpoint Number.
560
      _wRegVal ^= USB_EPTX_DTOG2; \
560
  * @retval status
561
    } \
561
  */
562
    \
562
#define PCD_GET_EP_TX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
563
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
563
#define PCD_GET_EP_RX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
564
  } while(0) /* PCD_SET_EP_TXRX_STATUS */
564
 
565
 
565
/**
566
/**
566
  * @brief  sets directly the VALID tx/rx-status into the endpoint register
567
  * @brief  gets the status for tx/rx transfer (bits STAT_TX[1:0]
567
  * @param  USBx USB peripheral instance register address.
568
  *         /STAT_RX[1:0])
568
  * @param  bEpNum Endpoint Number.
569
  * @param  USBx USB peripheral instance register address.
569
  * @retval None
570
  * @param  bEpNum Endpoint Number.
570
  */
571
  * @retval status
571
#define PCD_SET_EP_TX_VALID(USBx, bEpNum)      (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
572
  */
572
#define PCD_SET_EP_RX_VALID(USBx, bEpNum)      (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
573
#define PCD_GET_EP_TX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
573
 
574
#define PCD_GET_EP_RX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
574
/**
575
 
575
  * @brief  checks stall condition in an endpoint.
576
/**
576
  * @param  USBx USB peripheral instance register address.
577
  * @brief  sets directly the VALID tx/rx-status into the endpoint register
577
  * @param  bEpNum Endpoint Number.
578
  * @param  USBx USB peripheral instance register address.
578
  * @retval TRUE = endpoint in stall condition.
579
  * @param  bEpNum Endpoint Number.
579
  */
580
  * @retval None
580
#define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) == USB_EP_TX_STALL)
581
  */
581
#define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) == USB_EP_RX_STALL)
582
#define PCD_SET_EP_TX_VALID(USBx, bEpNum)      (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
582
 
583
#define PCD_SET_EP_RX_VALID(USBx, bEpNum)      (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
583
/**
584
 
584
  * @brief  set & clear EP_KIND bit.
585
/**
585
  * @param  USBx USB peripheral instance register address.
586
  * @brief  checks stall condition in an endpoint.
586
  * @param  bEpNum Endpoint Number.
587
  * @param  USBx USB peripheral instance register address.
587
  * @retval None
588
  * @param  bEpNum Endpoint Number.
588
  */
589
  * @retval TRUE = endpoint in stall condition.
589
#define PCD_SET_EP_KIND(USBx, bEpNum) \
590
  */
590
  do { \
591
#define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) == USB_EP_TX_STALL)
591
    uint16_t _wRegVal; \
592
#define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) == USB_EP_RX_STALL)
592
    \
593
 
593
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
594
/**
594
    \
595
  * @brief  set & clear EP_KIND bit.
595
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \
596
  * @param  USBx USB peripheral instance register address.
596
  } while(0) /* PCD_SET_EP_KIND */
597
  * @param  bEpNum Endpoint Number.
597
 
598
  * @retval None
598
#define PCD_CLEAR_EP_KIND(USBx, bEpNum) \
599
  */
599
  do { \
600
#define PCD_SET_EP_KIND(USBx, bEpNum) \
600
    uint16_t _wRegVal; \
601
  do { \
601
    \
602
    uint16_t _wRegVal; \
602
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \
603
    \
603
    \
604
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
604
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
605
    \
605
  } while(0) /* PCD_CLEAR_EP_KIND */
606
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \
606
 
607
  } while(0) /* PCD_SET_EP_KIND */
607
/**
608
 
608
  * @brief  Sets/clears directly STATUS_OUT bit in the endpoint register.
609
#define PCD_CLEAR_EP_KIND(USBx, bEpNum) \
609
  * @param  USBx USB peripheral instance register address.
610
  do { \
610
  * @param  bEpNum Endpoint Number.
611
    uint16_t _wRegVal; \
611
  * @retval None
612
    \
612
  */
613
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \
613
#define PCD_SET_OUT_STATUS(USBx, bEpNum)       PCD_SET_EP_KIND((USBx), (bEpNum))
614
    \
614
#define PCD_CLEAR_OUT_STATUS(USBx, bEpNum)     PCD_CLEAR_EP_KIND((USBx), (bEpNum))
615
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
615
 
616
  } while(0) /* PCD_CLEAR_EP_KIND */
616
/**
617
 
617
  * @brief  Sets/clears directly EP_KIND bit in the endpoint register.
618
/**
618
  * @param  USBx USB peripheral instance register address.
619
  * @brief  Sets/clears directly STATUS_OUT bit in the endpoint register.
619
  * @param  bEpNum Endpoint Number.
620
  * @param  USBx USB peripheral instance register address.
620
  * @retval None
621
  * @param  bEpNum Endpoint Number.
621
  */
622
  * @retval None
622
#define PCD_SET_BULK_EP_DBUF(USBx, bEpNum)     PCD_SET_EP_KIND((USBx), (bEpNum))
623
  */
623
#define PCD_CLEAR_BULK_EP_DBUF(USBx, bEpNum)   PCD_CLEAR_EP_KIND((USBx), (bEpNum))
624
#define PCD_SET_OUT_STATUS(USBx, bEpNum)       PCD_SET_EP_KIND((USBx), (bEpNum))
624
 
625
#define PCD_CLEAR_OUT_STATUS(USBx, bEpNum)     PCD_CLEAR_EP_KIND((USBx), (bEpNum))
625
/**
626
 
626
  * @brief  Clears bit CTR_RX / CTR_TX in the endpoint register.
627
/**
627
  * @param  USBx USB peripheral instance register address.
628
  * @brief  Sets/clears directly EP_KIND bit in the endpoint register.
628
  * @param  bEpNum Endpoint Number.
629
  * @param  USBx USB peripheral instance register address.
629
  * @retval None
630
  * @param  bEpNum Endpoint Number.
630
  */
631
  * @retval None
631
#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) \
632
  */
632
  do { \
633
#define PCD_SET_EP_DBUF(USBx, bEpNum)          PCD_SET_EP_KIND((USBx), (bEpNum))
633
    uint16_t _wRegVal; \
634
#define PCD_CLEAR_EP_DBUF(USBx, bEpNum)        PCD_CLEAR_EP_KIND((USBx), (bEpNum))
634
    \
635
 
635
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \
636
/**
636
    \
637
  * @brief  Clears bit CTR_RX / CTR_TX in the endpoint register.
637
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \
638
  * @param  USBx USB peripheral instance register address.
638
  } while(0) /* PCD_CLEAR_RX_EP_CTR */
639
  * @param  bEpNum Endpoint Number.
639
 
640
  * @retval None
640
#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) \
641
  */
641
  do { \
642
#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) \
642
    uint16_t _wRegVal; \
643
  do { \
643
    \
644
    uint16_t _wRegVal; \
644
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \
645
    \
645
    \
646
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \
646
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \
647
    \
647
  } while(0) /* PCD_CLEAR_TX_EP_CTR */
648
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \
648
 
649
  } while(0) /* PCD_CLEAR_RX_EP_CTR */
649
/**
650
 
650
  * @brief  Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
651
#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) \
651
  * @param  USBx USB peripheral instance register address.
652
  do { \
652
  * @param  bEpNum Endpoint Number.
653
    uint16_t _wRegVal; \
653
  * @retval None
654
    \
654
  */
655
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \
655
#define PCD_RX_DTOG(USBx, bEpNum) \
656
    \
656
  do { \
657
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \
657
    uint16_t _wEPVal; \
658
  } while(0) /* PCD_CLEAR_TX_EP_CTR */
658
    \
659
 
659
    _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
660
/**
660
    \
661
  * @brief  Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
661
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \
662
  * @param  USBx USB peripheral instance register address.
662
  } while(0) /* PCD_RX_DTOG */
663
  * @param  bEpNum Endpoint Number.
663
 
664
  * @retval None
664
#define PCD_TX_DTOG(USBx, bEpNum) \
665
  */
665
  do { \
666
#define PCD_RX_DTOG(USBx, bEpNum) \
666
    uint16_t _wEPVal; \
667
  do { \
667
    \
668
    uint16_t _wEPVal; \
668
    _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
669
    \
669
    \
670
    _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
670
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \
671
    \
671
  } while(0) /* PCD_TX_DTOG */
672
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \
672
/**
673
  } while(0) /* PCD_RX_DTOG */
673
  * @brief  Clears DTOG_RX / DTOG_TX bit in the endpoint register.
674
 
674
  * @param  USBx USB peripheral instance register address.
675
#define PCD_TX_DTOG(USBx, bEpNum) \
675
  * @param  bEpNum Endpoint Number.
676
  do { \
676
  * @retval None
677
    uint16_t _wEPVal; \
677
  */
678
    \
678
#define PCD_CLEAR_RX_DTOG(USBx, bEpNum) \
679
    _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
679
  do { \
680
    \
680
    uint16_t _wRegVal; \
681
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \
681
    \
682
  } while(0) /* PCD_TX_DTOG */
682
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
683
/**
683
    \
684
  * @brief  Clears DTOG_RX / DTOG_TX bit in the endpoint register.
684
    if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\
685
  * @param  USBx USB peripheral instance register address.
685
    { \
686
  * @param  bEpNum Endpoint Number.
686
      PCD_RX_DTOG((USBx), (bEpNum)); \
687
  * @retval None
687
    } \
688
  */
688
  } while(0) /* PCD_CLEAR_RX_DTOG */
689
#define PCD_CLEAR_RX_DTOG(USBx, bEpNum) \
689
 
690
  do { \
690
#define PCD_CLEAR_TX_DTOG(USBx, bEpNum) \
691
    uint16_t _wRegVal; \
691
  do { \
692
    \
692
    uint16_t _wRegVal; \
693
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
693
    \
694
    \
694
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
695
    if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\
695
    \
696
    { \
696
    if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\
697
      PCD_RX_DTOG((USBx), (bEpNum)); \
697
    { \
698
    } \
698
      PCD_TX_DTOG((USBx), (bEpNum)); \
699
  } while(0) /* PCD_CLEAR_RX_DTOG */
699
    } \
700
 
700
  } while(0) /* PCD_CLEAR_TX_DTOG */
701
#define PCD_CLEAR_TX_DTOG(USBx, bEpNum) \
701
 
702
  do { \
702
/**
703
    uint16_t _wRegVal; \
703
  * @brief  Sets address in an endpoint register.
704
    \
704
  * @param  USBx USB peripheral instance register address.
705
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
705
  * @param  bEpNum Endpoint Number.
706
    \
706
  * @param  bAddr Address.
707
    if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\
707
  * @retval None
708
    { \
708
  */
709
      PCD_TX_DTOG((USBx), (bEpNum)); \
709
#define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) \
710
    } \
710
  do { \
711
  } while(0) /* PCD_CLEAR_TX_DTOG */
711
    uint16_t _wRegVal; \
712
 
712
    \
713
/**
713
    _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \
714
  * @brief  Sets address in an endpoint register.
714
    \
715
  * @param  USBx USB peripheral instance register address.
715
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
716
  * @param  bEpNum Endpoint Number.
716
  } while(0) /* PCD_SET_EP_ADDRESS */
717
  * @param  bAddr Address.
717
 
718
  * @retval None
718
/**
719
  */
719
  * @brief  Gets address in an endpoint register.
720
#define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) \
720
  * @param  USBx USB peripheral instance register address.
721
  do { \
721
  * @param  bEpNum Endpoint Number.
722
    uint16_t _wRegVal; \
722
  * @retval None
723
    \
723
  */
724
    _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \
724
#define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
725
    \
725
 
726
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
726
#define PCD_EP_TX_CNT(USBx, bEpNum) \
727
  } while(0) /* PCD_SET_EP_ADDRESS */
727
  ((uint16_t *)((((uint32_t)(USBx)->BTABLE + \
728
 
728
                  ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
729
/**
729
 
730
  * @brief  Gets address in an endpoint register.
730
#define PCD_EP_RX_CNT(USBx, bEpNum) \
731
  * @param  USBx USB peripheral instance register address.
731
  ((uint16_t *)((((uint32_t)(USBx)->BTABLE + \
732
  * @param  bEpNum Endpoint Number.
732
                  ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
733
  * @retval None
733
 
734
  */
734
 
735
#define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
735
/**
736
 
736
  * @brief  sets address of the tx/rx buffer.
737
#define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE\
737
  * @param  USBx USB peripheral instance register address.
738
                                                    + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
738
  * @param  bEpNum Endpoint Number.
739
 
739
  * @param  wAddr address to be set (must be word aligned).
740
#define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE\
740
  * @retval None
741
                                                    + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
741
  */
742
 
742
#define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) \
743
 
743
  do { \
744
/**
744
    __IO uint16_t *_wRegVal; \
745
  * @brief  sets address of the tx/rx buffer.
745
    uint32_t _wRegBase = (uint32_t)USBx; \
746
  * @param  USBx USB peripheral instance register address.
746
    \
747
  * @param  bEpNum Endpoint Number.
747
    _wRegBase += (uint32_t)(USBx)->BTABLE; \
748
  * @param  wAddr address to be set (must be word aligned).
748
    _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \
749
  * @retval None
749
    *_wRegVal = ((wAddr) >> 1) << 1; \
750
  */
750
  } while(0) /* PCD_SET_EP_TX_ADDRESS */
751
#define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) \
751
 
752
  do { \
752
#define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) \
753
    __IO uint16_t *_wRegVal; \
753
  do { \
754
    uint32_t _wRegBase = (uint32_t)USBx; \
754
    __IO uint16_t *_wRegVal; \
755
    \
755
    uint32_t _wRegBase = (uint32_t)USBx; \
756
    _wRegBase += (uint32_t)(USBx)->BTABLE; \
756
    \
757
    _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \
757
    _wRegBase += (uint32_t)(USBx)->BTABLE; \
758
    *_wRegVal = ((wAddr) >> 1) << 1; \
758
    _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \
759
  } while(0) /* PCD_SET_EP_TX_ADDRESS */
759
    *_wRegVal = ((wAddr) >> 1) << 1; \
760
 
760
  } while(0) /* PCD_SET_EP_RX_ADDRESS */
761
#define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) \
761
 
762
  do { \
762
/**
763
    __IO uint16_t *_wRegVal; \
763
  * @brief  Gets address of the tx/rx buffer.
764
    uint32_t _wRegBase = (uint32_t)USBx; \
764
  * @param  USBx USB peripheral instance register address.
765
    \
765
  * @param  bEpNum Endpoint Number.
766
    _wRegBase += (uint32_t)(USBx)->BTABLE; \
766
  * @retval address of the buffer.
767
    _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \
767
  */
768
    *_wRegVal = ((wAddr) >> 1) << 1; \
768
#define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
769
  } while(0) /* PCD_SET_EP_RX_ADDRESS */
769
#define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
770
 
770
 
771
/**
771
/**
772
  * @brief  Gets address of the tx/rx buffer.
772
  * @brief  Sets counter of rx buffer with no. of blocks.
773
  * @param  USBx USB peripheral instance register address.
773
  * @param  pdwReg Register pointer
774
  * @param  bEpNum Endpoint Number.
774
  * @param  wCount Counter.
775
  * @retval address of the buffer.
775
  * @param  wNBlocks no. of Blocks.
776
  */
776
  * @retval None
777
#define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
777
  */
778
#define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
778
#define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) \
779
 
779
  do { \
780
/**
780
    (wNBlocks) = (wCount) >> 5; \
781
  * @brief  Sets counter of rx buffer with no. of blocks.
781
    if (((wCount) & 0x1fU) == 0U) \
782
  * @param  pdwReg Register pointer
782
    { \
783
  * @param  wCount Counter.
783
      (wNBlocks)--; \
784
  * @param  wNBlocks no. of Blocks.
784
    } \
785
  * @retval None
785
    *(pdwReg) |= (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \
786
  */
786
  } while(0) /* PCD_CALC_BLK32 */
787
#define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) \
787
 
788
  do { \
788
#define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) \
789
    (wNBlocks) = (wCount) >> 5; \
789
  do { \
790
    if (((wCount) & 0x1fU) == 0U) \
790
    (wNBlocks) = (wCount) >> 1; \
791
    { \
791
    if (((wCount) & 0x1U) != 0U) \
792
      (wNBlocks)--; \
792
    { \
793
    } \
793
      (wNBlocks)++; \
794
    *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \
794
    } \
795
  } while(0) /* PCD_CALC_BLK32 */
795
    *(pdwReg) |= (uint16_t)((wNBlocks) << 10); \
796
 
796
  } while(0) /* PCD_CALC_BLK2 */
797
#define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) \
797
 
798
  do { \
798
#define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) \
799
    (wNBlocks) = (wCount) >> 1; \
799
  do { \
800
    if (((wCount) & 0x1U) != 0U) \
800
    uint32_t wNBlocks; \
801
    { \
801
    \
802
      (wNBlocks)++; \
802
    *(pdwReg) &= 0x3FFU; \
803
    } \
803
    \
804
    *(pdwReg) = (uint16_t)((wNBlocks) << 10); \
804
    if ((wCount) > 62U) \
805
  } while(0) /* PCD_CALC_BLK2 */
805
    { \
806
 
806
      PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \
807
#define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) \
807
    } \
808
  do { \
808
    else \
809
    uint32_t wNBlocks; \
809
    { \
810
    if ((wCount) == 0U) \
810
      if ((wCount) == 0U) \
811
    { \
811
      { \
812
      *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \
812
        *(pdwReg) |= USB_CNTRX_BLSIZE; \
813
      *(pdwReg) |= USB_CNTRX_BLSIZE; \
813
      } \
814
    } \
814
      else \
815
    else if((wCount) <= 62U) \
815
      { \
816
    { \
816
        PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \
817
      PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \
817
      } \
818
    } \
818
    } \
819
    else \
819
  } while(0) /* PCD_SET_EP_CNT_RX_REG */
820
    { \
820
 
821
      PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \
821
#define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) \
822
    } \
822
  do { \
823
  } while(0) /* PCD_SET_EP_CNT_RX_REG */
823
    uint32_t _wRegBase = (uint32_t)(USBx); \
824
 
824
    __IO uint16_t *pdwReg; \
825
#define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) \
825
    \
826
  do { \
826
    _wRegBase += (uint32_t)(USBx)->BTABLE; \
827
    uint32_t _wRegBase = (uint32_t)(USBx); \
827
    pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
828
    __IO uint16_t *pdwReg; \
828
    PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \
829
    \
829
  } while(0)
830
    _wRegBase += (uint32_t)(USBx)->BTABLE; \
830
 
831
    pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
831
/**
832
    PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \
832
  * @brief  sets counter for the tx/rx buffer.
833
  } while(0)
833
  * @param  USBx USB peripheral instance register address.
834
 
834
  * @param  bEpNum Endpoint Number.
835
/**
835
  * @param  wCount Counter value.
836
  * @brief  sets counter for the tx/rx buffer.
836
  * @retval None
837
  * @param  USBx USB peripheral instance register address.
837
  */
838
  * @param  bEpNum Endpoint Number.
838
#define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) \
839
  * @param  wCount Counter value.
839
  do { \
840
  * @retval None
840
    uint32_t _wRegBase = (uint32_t)(USBx); \
841
  */
841
    __IO uint16_t *_wRegVal; \
842
#define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) \
842
    \
843
  do { \
843
    _wRegBase += (uint32_t)(USBx)->BTABLE; \
844
    uint32_t _wRegBase = (uint32_t)(USBx); \
844
    _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
845
    __IO uint16_t *_wRegVal; \
845
    *_wRegVal = (uint16_t)(wCount); \
846
    \
846
  } while(0)
847
    _wRegBase += (uint32_t)(USBx)->BTABLE; \
847
 
848
    _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
848
#define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) \
849
    *_wRegVal = (uint16_t)(wCount); \
849
  do { \
850
  } while(0)
850
    uint32_t _wRegBase = (uint32_t)(USBx); \
851
 
851
    __IO uint16_t *_wRegVal; \
852
#define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) \
852
    \
853
  do { \
853
    _wRegBase += (uint32_t)(USBx)->BTABLE; \
854
    uint32_t _wRegBase = (uint32_t)(USBx); \
854
    _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
855
    __IO uint16_t *_wRegVal; \
855
    PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \
856
    \
856
  } while(0)
857
    _wRegBase += (uint32_t)(USBx)->BTABLE; \
857
 
858
    _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
858
/**
859
    PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \
859
  * @brief  gets counter of the tx buffer.
860
  } while(0)
860
  * @param  USBx USB peripheral instance register address.
861
 
861
  * @param  bEpNum Endpoint Number.
862
/**
862
  * @retval Counter value
863
  * @brief  gets counter of the tx buffer.
863
  */
864
  * @param  USBx USB peripheral instance register address.
864
#define PCD_GET_EP_TX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
865
  * @param  bEpNum Endpoint Number.
865
#define PCD_GET_EP_RX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
866
  * @retval Counter value
866
 
867
  */
867
/**
868
#define PCD_GET_EP_TX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
868
  * @brief  Sets buffer 0/1 address in a double buffer endpoint.
869
#define PCD_GET_EP_RX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
869
  * @param  USBx USB peripheral instance register address.
870
 
870
  * @param  bEpNum Endpoint Number.
871
/**
871
  * @param  wBuf0Addr buffer 0 address.
872
  * @brief  Sets buffer 0/1 address in a double buffer endpoint.
872
  * @retval Counter value
873
  * @param  USBx USB peripheral instance register address.
873
  */
874
  * @param  bEpNum Endpoint Number.
874
#define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) \
875
  * @param  wBuf0Addr buffer 0 address.
875
  do { \
876
  * @retval Counter value
876
    PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \
877
  */
877
  } while(0) /* PCD_SET_EP_DBUF0_ADDR */
878
#define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) \
878
 
879
  do { \
879
#define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) \
880
    PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \
880
  do { \
881
  } while(0) /* PCD_SET_EP_DBUF0_ADDR */
881
    PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \
882
 
882
  } while(0) /* PCD_SET_EP_DBUF1_ADDR */
883
#define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) \
883
 
884
  do { \
884
/**
885
    PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \
885
  * @brief  Sets addresses in a double buffer endpoint.
886
  } while(0) /* PCD_SET_EP_DBUF1_ADDR */
886
  * @param  USBx USB peripheral instance register address.
887
 
887
  * @param  bEpNum Endpoint Number.
888
/**
888
  * @param  wBuf0Addr: buffer 0 address.
889
  * @brief  Sets addresses in a double buffer endpoint.
889
  * @param  wBuf1Addr = buffer 1 address.
890
  * @param  USBx USB peripheral instance register address.
890
  * @retval None
891
  * @param  bEpNum Endpoint Number.
891
  */
892
  * @param  wBuf0Addr: buffer 0 address.
892
#define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) \
893
  * @param  wBuf1Addr = buffer 1 address.
893
  do { \
894
  * @retval None
894
    PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \
895
  */
895
    PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \
896
#define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) \
896
  } while(0) /* PCD_SET_EP_DBUF_ADDR */
897
  do { \
897
 
898
    PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \
898
/**
899
    PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \
899
  * @brief  Gets buffer 0/1 address of a double buffer endpoint.
900
  } while(0) /* PCD_SET_EP_DBUF_ADDR */
900
  * @param  USBx USB peripheral instance register address.
901
 
901
  * @param  bEpNum Endpoint Number.
902
/**
902
  * @retval None
903
  * @brief  Gets buffer 0/1 address of a double buffer endpoint.
903
  */
904
  * @param  USBx USB peripheral instance register address.
904
#define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum)    (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
905
  * @param  bEpNum Endpoint Number.
905
#define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum)    (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
906
  * @retval None
906
 
907
  */
907
/**
908
#define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum)    (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
908
  * @brief  Gets buffer 0/1 address of a double buffer endpoint.
909
#define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum)    (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
909
  * @param  USBx USB peripheral instance register address.
910
 
910
  * @param  bEpNum Endpoint Number.
911
/**
911
  * @param  bDir endpoint dir  EP_DBUF_OUT = OUT
912
  * @brief  Gets buffer 0/1 address of a double buffer endpoint.
912
  *         EP_DBUF_IN  = IN
913
  * @param  USBx USB peripheral instance register address.
913
  * @param  wCount: Counter value
914
  * @param  bEpNum Endpoint Number.
914
  * @retval None
915
  * @param  bDir endpoint dir  EP_DBUF_OUT = OUT
915
  */
916
  *         EP_DBUF_IN  = IN
916
#define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) \
917
  * @param  wCount: Counter value
917
  do { \
918
  * @retval None
918
    if ((bDir) == 0U) \
919
  */
919
      /* OUT endpoint */ \
920
#define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) \
920
    { \
921
  do { \
921
      PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \
922
    if ((bDir) == 0U) \
922
    } \
923
      /* OUT endpoint */ \
923
    else \
924
    { \
924
    { \
925
      PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \
925
      if ((bDir) == 1U) \
926
    } \
926
      { \
927
    else \
927
        /* IN endpoint */ \
928
    { \
928
        PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \
929
      if ((bDir) == 1U) \
929
      } \
930
      { \
930
    } \
931
        /* IN endpoint */ \
931
  } while(0) /* SetEPDblBuf0Count*/
932
        PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \
932
 
933
      } \
933
#define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) \
934
    } \
934
  do { \
935
  } while(0) /* SetEPDblBuf0Count*/
935
    uint32_t _wBase = (uint32_t)(USBx); \
936
 
936
    __IO uint16_t *_wEPRegVal; \
937
#define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) \
937
    \
938
  do { \
938
    if ((bDir) == 0U) \
939
    uint32_t _wBase = (uint32_t)(USBx); \
939
    { \
940
    __IO uint16_t *_wEPRegVal; \
940
      /* OUT endpoint */ \
941
    \
941
      PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \
942
    if ((bDir) == 0U) \
942
    } \
943
    { \
943
    else \
944
      /* OUT endpoint */ \
944
    { \
945
      PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \
945
      if ((bDir) == 1U) \
946
    } \
946
      { \
947
    else \
947
        /* IN endpoint */ \
948
    { \
948
        _wBase += (uint32_t)(USBx)->BTABLE; \
949
      if ((bDir) == 1U) \
949
        _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
950
      { \
950
        *_wEPRegVal = (uint16_t)(wCount); \
951
        /* IN endpoint */ \
951
      } \
952
        _wBase += (uint32_t)(USBx)->BTABLE; \
952
    } \
953
        _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
953
  } while(0) /* SetEPDblBuf1Count */
954
        *_wEPRegVal = (uint16_t)(wCount); \
954
 
955
      } \
955
#define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) \
956
    } \
956
  do { \
957
  } while(0) /* SetEPDblBuf1Count */
957
    PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
958
 
958
    PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
959
#define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) \
959
  } while(0) /* PCD_SET_EP_DBUF_CNT */
960
  do { \
960
 
961
    PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
961
/**
962
    PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
962
  * @brief  Gets buffer 0/1 rx/tx counter for double buffering.
963
  } while(0) /* PCD_SET_EP_DBUF_CNT */
963
  * @param  USBx USB peripheral instance register address.
964
 
964
  * @param  bEpNum Endpoint Number.
965
/**
965
  * @retval None
966
  * @brief  Gets buffer 0/1 rx/tx counter for double buffering.
966
  */
967
  * @param  USBx USB peripheral instance register address.
967
#define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum)     (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
968
  * @param  bEpNum Endpoint Number.
968
#define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum)     (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
969
  * @retval None
969
 
970
  */
970
 
971
#define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum)     (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
971
 
972
#define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum)     (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
972
/**
973
 
973
  * @}
974
 
974
  */
975
 
975
 
976
/**
976
/**
977
  * @}
977
  * @}
978
  */
978
  */
979
 
979
 
980
/**
980
/**
981
  * @}
981
  * @}
982
  */
982
  */
983
 
983
#endif /* defined (USB) */
984
/**
984
 
985
  * @}
985
#ifdef __cplusplus
986
  */
986
}
987
#endif /* defined (USB) */
987
#endif
988
 
988
 
989
#ifdef __cplusplus
989
#endif /* STM32L1xx_HAL_PCD_H */
990
}
-
 
991
#endif
-
 
992
 
-
 
993
#endif /* STM32L1xx_HAL_PCD_H */
-
 
994
 
-
 
995
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-