WebSVN – DashDisplay – Diff – /branches/Dashboard_L152_v2/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_iwdg.h



#define IWDG_PRESCALER_16               IWDG_PR_PR_1                                    /*!< IWDG prescaler set to 16  */
#define IWDG_PRESCALER_32               (IWDG_PR_PR_1 | IWDG_PR_PR_0)                   /*!< IWDG prescaler set to 32  */
#define IWDG_PRESCALER_64               IWDG_PR_PR_2                                    /*!< IWDG prescaler set to 64  */
#define IWDG_PRESCALER_128              (IWDG_PR_PR_2 | IWDG_PR_PR_0)                   /*!< IWDG prescaler set to 128 */
#define IWDG_PRESCALER_256              (IWDG_PR_PR_2 | IWDG_PR_PR_1)                   /*!< IWDG prescaler set to 256 */
 
/**
  * @}
  */
 
 
 
/**
  * @}
  */
 
/* Exported macros -----------------------------------------------------------*/

  */
#define __HAL_IWDG_START(__HANDLE__)                WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)
 
/**
  * @brief  Reload IWDG counter with value defined in the reload register
  *         (write access to IWDG_PR and IWDG_RLR registers disabled).
  * @param  __HANDLE__  IWDG handle
  * @retval None
  */
#define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__)       WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)
 

 
/** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions
  * @{
  */
/* Initialization/Start functions  ********************************************/
HAL_StatusTypeDef     HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
/**
  * @}
  */
 
/** @defgroup IWDG_Exported_Functions_Group2 IO operation functions
  * @{
  */
/* I/O operation functions ****************************************************/
HAL_StatusTypeDef     HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
/**
  * @}
  */
 
/**

/** @defgroup IWDG_Private_Macros IWDG Private Macros
  * @{
  */
 
/**
  * @brief  Enable write access to IWDG_PR and IWDG_RLR registers.
  * @param  __HANDLE__  IWDG handle
  * @retval None
  */
#define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__)  WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)
 
/**
  * @brief  Disable write access to IWDG_PR and IWDG_RLR registers.
  * @param  __HANDLE__  IWDG handle
  * @retval None
  */
#define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)
 

Subversion Repositories DashDisplay

(root)/branches/Dashboard_L152_v2/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_iwdg.h – Rev 56 → 61

Rev 56		Rev 61
Line 82...		Line 82...
82	#define IWDG_PRESCALER_16 IWDG_PR_PR_1 /!< IWDG prescaler set to 16 /	82	#define IWDG_PRESCALER_16 IWDG_PR_PR_1 /!< IWDG prescaler set to 16 /
83	#define IWDG_PRESCALER_32 (IWDG_PR_PR_1 \| IWDG_PR_PR_0) /!< IWDG prescaler set to 32 /	83	#define IWDG_PRESCALER_32 (IWDG_PR_PR_1 \| IWDG_PR_PR_0) /!< IWDG prescaler set to 32 /
84	#define IWDG_PRESCALER_64 IWDG_PR_PR_2 /!< IWDG prescaler set to 64 /	84	#define IWDG_PRESCALER_64 IWDG_PR_PR_2 /!< IWDG prescaler set to 64 /
85	#define IWDG_PRESCALER_128 (IWDG_PR_PR_2 \| IWDG_PR_PR_0) /!< IWDG prescaler set to 128 /	85	#define IWDG_PRESCALER_128 (IWDG_PR_PR_2 \| IWDG_PR_PR_0) /!< IWDG prescaler set to 128 /
86	#define IWDG_PRESCALER_256 (IWDG_PR_PR_2 \| IWDG_PR_PR_1) /!< IWDG prescaler set to 256 /	86	#define IWDG_PRESCALER_256 (IWDG_PR_PR_2 \| IWDG_PR_PR_1) /!< IWDG prescaler set to 256 /
87		-
88	/**	87	/**
89	* @}	88	* @}
90	*/	89	*/
91		90
92		-
93		-
94	/**	91	/**
95	* @}	92	* @}
96	*/	93	*/
97		94
98	/* Exported macros -----------------------------------------------------------*/	95	/* Exported macros -----------------------------------------------------------*/
Line 107...		Line 104...
107	*/	104	*/
108	#define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)	105	#define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)
109		106
110	/**	107	/**
111	* @brief Reload IWDG counter with value defined in the reload register	108	* @brief Reload IWDG counter with value defined in the reload register
112	* (write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers disabled).	109	* (write access to IWDG_PR and IWDG_RLR registers disabled).
113	* @param __HANDLE__ IWDG handle	110	* @param __HANDLE__ IWDG handle
114	* @retval None	111	* @retval None
115	*/	112	*/
116	#define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)	113	#define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)
117		114
Line 126...		Line 123...
126		123
127	/** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions	124	/** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions
128	* @{	125	* @{
129	*/	126	*/
130	/* Initialization/Start functions ********************************************/	127	/* Initialization/Start functions ********************************************/
131	HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);	128	HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
132	/**	129	/**
133	* @}	130	* @}
134	*/	131	*/
135		132
136	/** @defgroup IWDG_Exported_Functions_Group2 IO operation functions	133	/** @defgroup IWDG_Exported_Functions_Group2 IO operation functions
137	* @{	134	* @{
138	*/	135	*/
139	/* I/O operation functions ****************************************************/	136	/* I/O operation functions ****************************************************/
140	HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);	137	HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
141	/**	138	/**
142	* @}	139	* @}
143	*/	140	*/
144		141
145	/**	142	/**
Line 167...		Line 164...
167	/** @defgroup IWDG_Private_Macros IWDG Private Macros	164	/** @defgroup IWDG_Private_Macros IWDG Private Macros
168	* @{	165	* @{
169	*/	166	*/
170		167
171	/**	168	/**
172	* @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.	169	* @brief Enable write access to IWDG_PR and IWDG_RLR registers.
173	* @param __HANDLE__ IWDG handle	170	* @param __HANDLE__ IWDG handle
174	* @retval None	171	* @retval None
175	*/	172	*/
176	#define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)	173	#define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)
177		174
178	/**	175	/**
179	* @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.	176	* @brief Disable write access to IWDG_PR and IWDG_RLR registers.
180	* @param __HANDLE__ IWDG handle	177	* @param __HANDLE__ IWDG handle
181	* @retval None	178	* @retval None
182	*/	179	*/
183	#define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)	180	#define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)
184		181