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Line 62... Line 62...
62
  */
62
  */
63
#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
63
#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
64
typedef struct __DAC_HandleTypeDef
64
typedef struct __DAC_HandleTypeDef
65
#else
65
#else
66
typedef struct
66
typedef struct
67
#endif
67
#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
68
{
68
{
69
  DAC_TypeDef                 *Instance;     /*!< Register base address             */
69
  DAC_TypeDef                 *Instance;     /*!< Register base address             */
70
 
70
 
71
  __IO HAL_DAC_StateTypeDef   State;         /*!< DAC communication state           */
71
  __IO HAL_DAC_StateTypeDef   State;         /*!< DAC communication state           */
72
 
72
 
Line 77... Line 77...
77
  DMA_HandleTypeDef           *DMA_Handle2;  /*!< Pointer DMA handler for channel 2 */
77
  DMA_HandleTypeDef           *DMA_Handle2;  /*!< Pointer DMA handler for channel 2 */
78
 
78
 
79
  __IO uint32_t               ErrorCode;     /*!< DAC Error code                    */
79
  __IO uint32_t               ErrorCode;     /*!< DAC Error code                    */
80
 
80
 
81
#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
81
#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
82
  void (* ConvCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
82
  void (* ConvCpltCallbackCh1)            (struct __DAC_HandleTypeDef *hdac);
83
  void (* ConvHalfCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
83
  void (* ConvHalfCpltCallbackCh1)        (struct __DAC_HandleTypeDef *hdac);
84
  void (* ErrorCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
84
  void (* ErrorCallbackCh1)               (struct __DAC_HandleTypeDef *hdac);
85
  void (* DMAUnderrunCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
85
  void (* DMAUnderrunCallbackCh1)         (struct __DAC_HandleTypeDef *hdac);
-
 
86
 
86
  void (* ConvCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
87
  void (* ConvCpltCallbackCh2)            (struct __DAC_HandleTypeDef *hdac);
87
  void (* ConvHalfCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
88
  void (* ConvHalfCpltCallbackCh2)        (struct __DAC_HandleTypeDef *hdac);
88
  void (* ErrorCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
89
  void (* ErrorCallbackCh2)               (struct __DAC_HandleTypeDef *hdac);
89
  void (* DMAUnderrunCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
90
  void (* DMAUnderrunCallbackCh2)         (struct __DAC_HandleTypeDef *hdac);
-
 
91
 
90
 
92
 
91
  void (* MspInitCallback)(struct __DAC_HandleTypeDef *hdac);
93
  void (* MspInitCallback)                (struct __DAC_HandleTypeDef *hdac);
92
  void (* MspDeInitCallback)(struct __DAC_HandleTypeDef *hdac);
94
  void (* MspDeInitCallback)              (struct __DAC_HandleTypeDef *hdac);
93
#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
95
#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
94
 
96
 
95
} DAC_HandleTypeDef;
97
} DAC_HandleTypeDef;
96
 
98
 
97
 
-
 
98
/**
99
/**
99
  * @brief   DAC Configuration regular Channel structure definition
100
  * @brief   DAC Configuration regular Channel structure definition
100
  */
101
  */
101
typedef struct
102
typedef struct
102
{
103
{
Line 116... Line 117...
116
{
117
{
117
  HAL_DAC_CH1_COMPLETE_CB_ID                 = 0x00U,  /*!< DAC CH1 Complete Callback ID      */
118
  HAL_DAC_CH1_COMPLETE_CB_ID                 = 0x00U,  /*!< DAC CH1 Complete Callback ID      */
118
  HAL_DAC_CH1_HALF_COMPLETE_CB_ID            = 0x01U,  /*!< DAC CH1 half Complete Callback ID */
119
  HAL_DAC_CH1_HALF_COMPLETE_CB_ID            = 0x01U,  /*!< DAC CH1 half Complete Callback ID */
119
  HAL_DAC_CH1_ERROR_ID                       = 0x02U,  /*!< DAC CH1 error Callback ID         */
120
  HAL_DAC_CH1_ERROR_ID                       = 0x02U,  /*!< DAC CH1 error Callback ID         */
120
  HAL_DAC_CH1_UNDERRUN_CB_ID                 = 0x03U,  /*!< DAC CH1 underrun Callback ID      */
121
  HAL_DAC_CH1_UNDERRUN_CB_ID                 = 0x03U,  /*!< DAC CH1 underrun Callback ID      */
-
 
122
 
121
  HAL_DAC_CH2_COMPLETE_CB_ID                 = 0x04U,  /*!< DAC CH2 Complete Callback ID      */
123
  HAL_DAC_CH2_COMPLETE_CB_ID                 = 0x04U,  /*!< DAC CH2 Complete Callback ID      */
122
  HAL_DAC_CH2_HALF_COMPLETE_CB_ID            = 0x05U,  /*!< DAC CH2 half Complete Callback ID */
124
  HAL_DAC_CH2_HALF_COMPLETE_CB_ID            = 0x05U,  /*!< DAC CH2 half Complete Callback ID */
123
  HAL_DAC_CH2_ERROR_ID                       = 0x06U,  /*!< DAC CH2 error Callback ID         */
125
  HAL_DAC_CH2_ERROR_ID                       = 0x06U,  /*!< DAC CH2 error Callback ID         */
124
  HAL_DAC_CH2_UNDERRUN_CB_ID                 = 0x07U,  /*!< DAC CH2 underrun Callback ID      */
126
  HAL_DAC_CH2_UNDERRUN_CB_ID                 = 0x07U,  /*!< DAC CH2 underrun Callback ID      */
-
 
127
 
125
  HAL_DAC_MSPINIT_CB_ID                      = 0x08U,  /*!< DAC MspInit Callback ID           */
128
  HAL_DAC_MSPINIT_CB_ID                      = 0x08U,  /*!< DAC MspInit Callback ID           */
126
  HAL_DAC_MSPDEINIT_CB_ID                    = 0x09U,  /*!< DAC MspDeInit Callback ID         */
129
  HAL_DAC_MSPDEINIT_CB_ID                    = 0x09U,  /*!< DAC MspDeInit Callback ID         */
127
  HAL_DAC_ALL_CB_ID                          = 0x0AU   /*!< DAC All ID                        */
130
  HAL_DAC_ALL_CB_ID                          = 0x0AU   /*!< DAC All ID                        */
128
} HAL_DAC_CallbackIDTypeDef;
131
} HAL_DAC_CallbackIDTypeDef;
129
 
132
 
Line 160... Line 163...
160
  */
163
  */
161
 
164
 
162
/** @defgroup DAC_trigger_selection DAC trigger selection
165
/** @defgroup DAC_trigger_selection DAC trigger selection
163
  * @{
166
  * @{
164
  */
167
  */
165
#define DAC_TRIGGER_NONE                0x00000000U                                                      /*!< Conversion is automatic once the DAC1_DHRxxxx register has been loaded, and not by external trigger */
168
#define DAC_TRIGGER_NONE                0x00000000UL                                                     /*!< Conversion is automatic once the DAC1_DHRxxxx register has been loaded, and not by external trigger */
166
#define DAC_TRIGGER_T6_TRGO             (DAC_CR_TEN1)                                                    /*!< Conversion started by software trigger for DAC channel */
169
#define DAC_TRIGGER_T6_TRGO             (DAC_CR_TEN1)                                                    /*!< Conversion started by software trigger for DAC channel */
167
#define DAC_TRIGGER_T7_TRGO             (                 DAC_CR_TSEL1_1                  | DAC_CR_TEN1) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */
170
#define DAC_TRIGGER_T7_TRGO             (                 DAC_CR_TSEL1_1                  | DAC_CR_TEN1) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */
168
#define DAC_TRIGGER_T9_TRGO             (                 DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM9 TRGO selected as external conversion trigger for DAC channel */
171
#define DAC_TRIGGER_T9_TRGO             (                 DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM9 TRGO selected as external conversion trigger for DAC channel */
169
#define DAC_TRIGGER_T2_TRGO             (DAC_CR_TSEL1_2                                   | DAC_CR_TEN1) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
172
#define DAC_TRIGGER_T2_TRGO             (DAC_CR_TSEL1_2                                   | DAC_CR_TEN1) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
170
#define DAC_TRIGGER_T4_TRGO             (DAC_CR_TSEL1_2                  | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */
173
#define DAC_TRIGGER_T4_TRGO             (DAC_CR_TSEL1_2                  | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */
Line 187... Line 190...
187
 
190
 
188
/** @defgroup DAC_Channel_selection DAC Channel selection
191
/** @defgroup DAC_Channel_selection DAC Channel selection
189
  * @{
192
  * @{
190
  */
193
  */
191
#define DAC_CHANNEL_1                      0x00000000U
194
#define DAC_CHANNEL_1                      0x00000000U
-
 
195
 
192
#define DAC_CHANNEL_2                      0x00000010U
196
#define DAC_CHANNEL_2                      0x00000010U
-
 
197
 
193
/**
198
/**
194
  * @}
199
  * @}
195
  */
200
  */
196
 
201
 
197
/** @defgroup DAC_data_alignment DAC data alignment
202
/** @defgroup DAC_data_alignment DAC data alignment
Line 207... Line 212...
207
 
212
 
208
/** @defgroup DAC_flags_definition DAC flags definition
213
/** @defgroup DAC_flags_definition DAC flags definition
209
  * @{
214
  * @{
210
  */
215
  */
211
#define DAC_FLAG_DMAUDR1                   (DAC_SR_DMAUDR1)
216
#define DAC_FLAG_DMAUDR1                   (DAC_SR_DMAUDR1)
-
 
217
 
212
#define DAC_FLAG_DMAUDR2                   (DAC_SR_DMAUDR2)
218
#define DAC_FLAG_DMAUDR2                   (DAC_SR_DMAUDR2)
213
 
219
 
-
 
220
 
214
/**
221
/**
215
  * @}
222
  * @}
216
  */
223
  */
217
 
224
 
218
/** @defgroup DAC_IT_definition  DAC IT definition
225
/** @defgroup DAC_IT_definition  DAC IT definition
219
  * @{
226
  * @{
220
  */
227
  */
221
#define DAC_IT_DMAUDR1                   (DAC_SR_DMAUDR1)
228
#define DAC_IT_DMAUDR1                   (DAC_SR_DMAUDR1)
-
 
229
 
222
#define DAC_IT_DMAUDR2                   (DAC_SR_DMAUDR2)
230
#define DAC_IT_DMAUDR2                   (DAC_SR_DMAUDR2)
223
 
231
 
-
 
232
 
224
/**
233
/**
225
  * @}
234
  * @}
226
  */
235
  */
227
 
236
 
228
/**
237
/**
Line 240... Line 249...
240
  * @retval None
249
  * @retval None
241
  */
250
  */
242
#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
251
#if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
243
#define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) do {                                                        \
252
#define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) do {                                                        \
244
                                                      (__HANDLE__)->State             = HAL_DAC_STATE_RESET; \
253
                                                      (__HANDLE__)->State             = HAL_DAC_STATE_RESET; \
245
                                                      (__HANDLE__)->MspInitCallback   = NULL;                  \
254
                                                      (__HANDLE__)->MspInitCallback   = NULL;                \
246
                                                      (__HANDLE__)->MspDeInitCallback = NULL;                  \
255
                                                      (__HANDLE__)->MspDeInitCallback = NULL;                \
247
                                                     } while(0)
256
                                                     } while(0)
248
#else
257
#else
249
#define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
258
#define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
250
#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
259
#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
251
 
260
 
Line 267... Line 276...
267
 
276
 
268
/** @brief Set DHR12R1 alignment.
277
/** @brief Set DHR12R1 alignment.
269
  * @param  __ALIGNMENT__ specifies the DAC alignment
278
  * @param  __ALIGNMENT__ specifies the DAC alignment
270
  * @retval None
279
  * @retval None
271
  */
280
  */
272
#define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (0x00000008U + (__ALIGNMENT__))
281
#define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (0x00000008UL + (__ALIGNMENT__))
-
 
282
 
273
 
283
 
274
/** @brief  Set DHR12R2 alignment.
284
/** @brief  Set DHR12R2 alignment.
275
  * @param  __ALIGNMENT__ specifies the DAC alignment
285
  * @param  __ALIGNMENT__ specifies the DAC alignment
276
  * @retval None
286
  * @retval None
277
  */
287
  */
278
#define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (0x00000014U + (__ALIGNMENT__))
288
#define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (0x00000014UL + (__ALIGNMENT__))
-
 
289
 
279
 
290
 
280
/** @brief  Set DHR12RD alignment.
291
/** @brief  Set DHR12RD alignment.
281
  * @param  __ALIGNMENT__ specifies the DAC alignment
292
  * @param  __ALIGNMENT__ specifies the DAC alignment
282
  * @retval None
293
  * @retval None
283
  */
294
  */
284
#define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (0x00000020U + (__ALIGNMENT__))
295
#define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (0x00000020UL + (__ALIGNMENT__))
285
 
296
 
286
/** @brief Enable the DAC interrupt.
297
/** @brief Enable the DAC interrupt.
287
  * @param  __HANDLE__ specifies the DAC handle
298
  * @param  __HANDLE__ specifies the DAC handle
288
  * @param  __INTERRUPT__ specifies the DAC interrupt.
299
  * @param  __INTERRUPT__ specifies the DAC interrupt.
289
  *          This parameter can be any combination of the following values:
300
  *          This parameter can be any combination of the following values:
290
  *            @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
301
  *            @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt
291
  *            @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
302
  *            @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt
292
  * @retval None
303
  * @retval None
293
  */
304
  */
294
#define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__))
305
#define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__))
295
 
306
 
296
/** @brief Disable the DAC interrupt.
307
/** @brief Disable the DAC interrupt.
297
  * @param  __HANDLE__ specifies the DAC handle
308
  * @param  __HANDLE__ specifies the DAC handle
298
  * @param  __INTERRUPT__ specifies the DAC interrupt.
309
  * @param  __INTERRUPT__ specifies the DAC interrupt.
299
  *          This parameter can be any combination of the following values:
310
  *          This parameter can be any combination of the following values:
300
  *            @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
311
  *            @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt
301
  *            @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
312
  *            @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt
302
  * @retval None
313
  * @retval None
303
  */
314
  */
304
#define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
315
#define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
305
 
316
 
306
/** @brief  Check whether the specified DAC interrupt source is enabled or not.
317
/** @brief  Check whether the specified DAC interrupt source is enabled or not.
307
  * @param __HANDLE__ DAC handle
318
  * @param __HANDLE__ DAC handle
308
  * @param __INTERRUPT__ DAC interrupt source to check
319
  * @param __INTERRUPT__ DAC interrupt source to check
309
  *          This parameter can be any combination of the following values:
320
  *          This parameter can be any combination of the following values:
310
  *            @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
321
  *            @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt
311
  *            @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
322
  *            @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt
312
  * @retval State of interruption (SET or RESET)
323
  * @retval State of interruption (SET or RESET)
313
  */
324
  */
314
#define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__))
325
#define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR\
-
 
326
                                                             & (__INTERRUPT__)) == (__INTERRUPT__))
315
 
327
 
316
/** @brief  Get the selected DAC's flag status.
328
/** @brief  Get the selected DAC's flag status.
317
  * @param  __HANDLE__ specifies the DAC handle.
329
  * @param  __HANDLE__ specifies the DAC handle.
318
  * @param  __FLAG__ specifies the DAC flag to get.
330
  * @param  __FLAG__ specifies the DAC flag to get.
319
  *          This parameter can be any combination of the following values:
331
  *          This parameter can be any combination of the following values:
320
  *            @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag
332
  *            @arg DAC_FLAG_DMAUDR1 DAC channel 1 DMA underrun flag
321
  *            @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag
333
  *            @arg DAC_FLAG_DMAUDR2 DAC channel 2 DMA underrun flag
322
  * @retval None
334
  * @retval None
323
  */
335
  */
324
#define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
336
#define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
325
 
337
 
326
/** @brief  Clear the DAC's flag.
338
/** @brief  Clear the DAC's flag.
327
  * @param  __HANDLE__ specifies the DAC handle.
339
  * @param  __HANDLE__ specifies the DAC handle.
328
  * @param  __FLAG__ specifies the DAC flag to clear.
340
  * @param  __FLAG__ specifies the DAC flag to clear.
329
  *          This parameter can be any combination of the following values:
341
  *          This parameter can be any combination of the following values:
330
  *            @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag
342
  *            @arg DAC_FLAG_DMAUDR1 DAC channel 1 DMA underrun flag
331
  *            @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag
343
  *            @arg DAC_FLAG_DMAUDR2 DAC channel 2 DMA underrun flag
332
  * @retval None
344
  * @retval None
333
  */
345
  */
334
#define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__))
346
#define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__))
335
 
347
 
336
/**
348
/**
Line 350... Line 362...
350
 
362
 
351
#define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \
363
#define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \
352
                             ((ALIGN) == DAC_ALIGN_12B_L) || \
364
                             ((ALIGN) == DAC_ALIGN_12B_L) || \
353
                             ((ALIGN) == DAC_ALIGN_8B_R))
365
                             ((ALIGN) == DAC_ALIGN_8B_R))
354
 
366
 
355
#define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0U)
367
#define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0UL)
356
 
368
 
357
/**
369
/**
358
  * @}
370
  * @}
359
  */
371
  */
360
 
372
 
Line 387... Line 399...
387
HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel);
399
HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel);
388
HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel);
400
HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel);
389
HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length,
401
HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length,
390
                                    uint32_t Alignment);
402
                                    uint32_t Alignment);
391
HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel);
403
HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel);
392
 
-
 
393
void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac);
404
void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac);
394
 
-
 
395
HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data);
405
HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data);
396
 
406
 
397
void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac);
407
void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac);
398
void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac);
408
void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac);
399
void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac);
409
void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac);
Line 413... Line 423...
413
/** @addtogroup DAC_Exported_Functions_Group3
423
/** @addtogroup DAC_Exported_Functions_Group3
414
  * @{
424
  * @{
415
  */
425
  */
416
/* Peripheral Control functions ***********************************************/
426
/* Peripheral Control functions ***********************************************/
417
uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel);
427
uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel);
418
 
-
 
419
HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel);
428
HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel);
420
/**
429
/**
421
  * @}
430
  * @}
422
  */
431
  */
423
 
432
 
Line 459... Line 468...
459
#ifdef __cplusplus
468
#ifdef __cplusplus
460
}
469
}
461
#endif
470
#endif
462
 
471
 
463
 
472
 
464
#endif /*STM32L1xx_HAL_DAC_H */
473
#endif /* STM32L1xx_HAL_DAC_H */
465
 
474
 
466
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
475
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
467
 
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