WebSVN – DashDisplay – Diff – /branches/Dashboard_L152_v2/Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h

 /**
   ******************************************************************************
   * @file    stm32l1xx_hal.h
   * @author  MCD Application Team
-  * @version V1.2.0
-  * @date    01-July-2016
   * @brief   This file contains all the functions prototypes for the HAL
   *          module driver.
   ******************************************************************************
   * @attention
+  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
+  * License. You may obtain a copy of the License at:
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
+  *                        opensource.org/licenses/BSD-3-Clause
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
   ******************************************************************************
   */
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __STM32L1xx_HAL_H
 #define __STM32L1xx_HAL_H
   * @{
   */
 /** @addtogroup HAL
   * @{
   */
 /* Exported types ------------------------------------------------------------*/
 /* Exported constants --------------------------------------------------------*/
 /** @defgroup HAL_Exported_Constants HAL Exported Constants
   * @{
   */
+/** @defgroup HAL_TICK_FREQ Tick Frequency
+  * @{
+  */
+#define  HAL_TICK_FREQ_10HZ         100U
+#define  HAL_TICK_FREQ_100HZ        10U
+#define  HAL_TICK_FREQ_1KHZ         1U
+#define  HAL_TICK_FREQ_DEFAULT      HAL_TICK_FREQ_1KHZ
+#define IS_TICKFREQ(__FREQ__) (((__FREQ__) == HAL_TICK_FREQ_10HZ)  || \
+                               ((__FREQ__) == HAL_TICK_FREQ_100HZ) || \
+                               ((__FREQ__) == HAL_TICK_FREQ_1KHZ))
+/**
+  * @}
+  */
+/**
+  * @}
+  */
+/** @defgroup SYSCFG_Exported_Constants SYSCFG Exported Constants
+  * @{
+  */
 /** @defgroup SYSCFG_Constants SYSCFG: SYStem ConFiG
   * @{
   */
 /** @defgroup SYSCFG_BootMode Boot Mode
   * @{
   */
 #endif /* FSMC_R_BASE  */
 #define SYSCFG_BOOT_SRAM               ((uint32_t)SYSCFG_MEMRMP_BOOT_MODE)
 /**
   * @}
   */
 /**
   * @}
   */
 /** @defgroup RI_Constants RI: Routing Interface
   * @{
   */
 /** @defgroup RI_InputCapture Input Capture
   * @{
   */
 #define RI_INPUTCAPTURE_IC1  RI_ICR_IC1    /*!< Input Capture 1 */
 #define RI_INPUTCAPTURE_IC2  RI_ICR_IC2    /*!< Input Capture 2 */
 #define RI_INPUTCAPTURE_IC3  RI_ICR_IC3    /*!< Input Capture 3 */
 #define RI_INPUTCAPTURE_IC4  RI_ICR_IC4    /*!< Input Capture 4 */
 /**
   * @}
   */
 /** @defgroup TIM_Select TIM Select
   * @{
   */
 #define TIM_SELECT_NONE  (0x00000000U)    /*!< None selected */
 #define TIM_SELECT_TIM2  ((uint32_t)RI_ICR_TIM_0)  /*!< Timer 2 selected */
 #define TIM_SELECT_TIM3  ((uint32_t)RI_ICR_TIM_1)  /*!< Timer 3 selected */
 #define TIM_SELECT_TIM4  ((uint32_t)RI_ICR_TIM)    /*!< Timer 4 selected */
                         ((__TIM__) == TIM_SELECT_TIM3) || \
                         ((__TIM__) == TIM_SELECT_TIM4))
 /**
   * @}
   */
 /** @defgroup RI_InputCaptureRouting Input Capture Routing
   * @{
   */
                                                           /* TIMx_IC1 TIMx_IC2  TIMx_IC3  TIMx_IC4 */
 #define RI_INPUTCAPTUREROUTING_0   (0x00000000U) /* PA0       PA1      PA2       PA3      */
 #define RI_INPUTCAPTUREROUTING_1   (0x00000001U) /* PA4       PA5      PA6       PA7      */
 #define RI_INPUTCAPTUREROUTING_2   (0x00000002U) /* PA8       PA9      PA10      PA11     */
 #define RI_INPUTCAPTUREROUTING_3   (0x00000003U) /* PA12      PA13     PA14      PA15     */
 #define RI_INPUTCAPTUREROUTING_4   (0x00000004U) /* PC0       PC1      PC2       PC3      */
                                              ((__ROUTING__) == RI_INPUTCAPTUREROUTING_14) || \
                                              ((__ROUTING__) == RI_INPUTCAPTUREROUTING_15))
 /**
   * @}
   */
 /** @defgroup RI_IOSwitch IO Switch
   * @{
   */
 #define RI_ASCR1_REGISTER       (0x80000000U)
 /* ASCR1 I/O switch: bit 31 is set to '1' to indicate that the mask is in ASCR1 register */
 #define RI_IOSWITCH_CH0         ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_0)
 #define RI_IOSWITCH_CH1         ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_1)
 #define RI_IOSWITCH_CH2         ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_2)
 #define RI_IOSWITCH_CH29        ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_29)
 #define RI_IOSWITCH_CH30        ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_30)
 #define RI_IOSWITCH_CH31        ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_31)
 #endif /* RI_ASCR2_CH1b */
 /* ASCR2 IO switch: bit 31 is set to '0' to indicate that the mask is in ASCR2 register */
 #define RI_IOSWITCH_GR10_1      ((uint32_t)RI_ASCR2_GR10_1)
 #define RI_IOSWITCH_GR10_2      ((uint32_t)RI_ASCR2_GR10_2)
 #define RI_IOSWITCH_GR10_3      ((uint32_t)RI_ASCR2_GR10_3)
 #define RI_IOSWITCH_GR10_4      ((uint32_t)RI_ASCR2_GR10_4)
 #define RI_IOSWITCH_GR6_1       ((uint32_t)RI_ASCR2_GR6_1)
 #define IS_RI_PIN(__PIN__) ((__PIN__) != (uint16_t)0x00)
 /**
   * @}
   */
 /**
   * @}
   */
 /**
   * @}
   */
-/* Exported macro ------------------------------------------------------------*/
+/* Exported macros -----------------------------------------------------------*/
 /** @defgroup HAL_Exported_Macros HAL Exported Macros
   * @{
   */
 /** @defgroup DBGMCU_Macros DBGMCU: Debug MCU
   * @{
   */
 /** @defgroup DBGMCU_Freeze_Unfreeze Freeze Unfreeze Peripherals in Debug mode
   * @brief   Freeze/Unfreeze Peripherals in Debug mode
   * @{
   */
 /**
   * @brief  TIM2 Peripherals Debug mode
   */
 #if defined (DBGMCU_APB1_FZ_DBG_TIM2_STOP)
 #define __HAL_DBGMCU_FREEZE_TIM2()            SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM2_STOP)
 #define __HAL_DBGMCU_UNFREEZE_TIM2()          CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM2_STOP)
 #endif
 /**
   * @brief  TIM3 Peripherals Debug mode
   */
 #if defined (DBGMCU_APB1_FZ_DBG_TIM3_STOP)
 #define __HAL_DBGMCU_FREEZE_TIM3()            SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM3_STOP)
 #define __HAL_DBGMCU_UNFREEZE_TIM3()          CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM3_STOP)
 #endif
 /**
   * @brief  TIM4 Peripherals Debug mode
   */
 #if defined (DBGMCU_APB1_FZ_DBG_TIM4_STOP)
 #define __HAL_DBGMCU_FREEZE_TIM4()            SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM4_STOP)
 #define __HAL_DBGMCU_UNFREEZE_TIM4()          CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM4_STOP)
 #endif
 /**
   * @brief  TIM5 Peripherals Debug mode
   */
 #if defined (DBGMCU_APB1_FZ_DBG_TIM5_STOP)
 #define __HAL_DBGMCU_FREEZE_TIM5()            SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM5_STOP)
 #define __HAL_DBGMCU_UNFREEZE_TIM5()          CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM5_STOP)
 #endif
 /**
   * @brief  TIM6 Peripherals Debug mode
   */
 #if defined (DBGMCU_APB1_FZ_DBG_TIM6_STOP)
 #define __HAL_DBGMCU_FREEZE_TIM6()            SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM6_STOP)
 #define __HAL_DBGMCU_UNFREEZE_TIM6()          CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM6_STOP)
 #endif
 /**
   * @brief  TIM7 Peripherals Debug mode
   */
 #if defined (DBGMCU_APB1_FZ_DBG_TIM7_STOP)
 #define __HAL_DBGMCU_FREEZE_TIM7()            SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM7_STOP)
 #define __HAL_DBGMCU_UNFREEZE_TIM7()          CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM7_STOP)
 #endif
 /**
   * @brief  RTC Peripherals Debug mode
   */
 #if defined (DBGMCU_APB1_FZ_DBG_RTC_STOP)
 #define __HAL_DBGMCU_FREEZE_RTC()             SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_RTC_STOP)
 #define __HAL_DBGMCU_UNFREEZE_RTC()           CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_RTC_STOP)
 #endif
 /**
   * @brief  WWDG Peripherals Debug mode
   */
 #if defined (DBGMCU_APB1_FZ_DBG_WWDG_STOP)
 #define __HAL_DBGMCU_FREEZE_WWDG()            SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_WWDG_STOP)
 #define __HAL_DBGMCU_UNFREEZE_WWDG()          CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_WWDG_STOP)
 #endif
 /**
   * @brief  IWDG Peripherals Debug mode
   */
 #if defined (DBGMCU_APB1_FZ_DBG_IWDG_STOP)
 #define __HAL_DBGMCU_FREEZE_IWDG()            SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_IWDG_STOP)
 #define __HAL_DBGMCU_UNFREEZE_IWDG()          CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_IWDG_STOP)
 #endif
 /**
   * @brief  I2C1 Peripherals Debug mode
   */
 #if defined (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT)
 #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT()    SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT)
 #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT()  CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT)
 #endif
 /**
   * @brief  I2C2 Peripherals Debug mode
   */
 #if defined (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT)
 #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT()    SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT)
 #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT()  CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT)
 #endif
 /**
   * @brief  TIM9 Peripherals Debug mode
   */
 #if defined (DBGMCU_APB2_FZ_DBG_TIM9_STOP)
 #define __HAL_DBGMCU_FREEZE_TIM9()            SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM9_STOP)
 #define __HAL_DBGMCU_UNFREEZE_TIM9()          CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM9_STOP)
 #endif
 /**
   * @brief  TIM10 Peripherals Debug mode
   */
 #if defined (DBGMCU_APB2_FZ_DBG_TIM10_STOP)
 #define __HAL_DBGMCU_FREEZE_TIM10()           SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM10_STOP)
 #define __HAL_DBGMCU_UNFREEZE_TIM10()         CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM10_STOP)
 #endif
 /**
   * @brief  TIM11 Peripherals Debug mode
   */
 #if defined (DBGMCU_APB2_FZ_DBG_TIM11_STOP)
 #define __HAL_DBGMCU_FREEZE_TIM11()           SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM11_STOP)
 #define __HAL_DBGMCU_UNFREEZE_TIM11()         CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM11_STOP)
 #endif
 /** @defgroup SYSCFG_VrefInt VREFINT configuration
   * @{
   */
 /**
   * @brief  Enables or disables the output of internal reference voltage
-  *         (VREFINT) on I/O pin.
+  *         (VrefInt) on I/O pin.
-  *         The VREFINT output can be routed to any I/O in group 3:
+  * @note   The VrefInt output can be routed to any I/O in group 3:
   *          - For Cat.1 and Cat.2 devices: CH8 (PB0) or CH9 (PB1).
   *          - For Cat.3 devices: CH8 (PB0), CH9 (PB1) or CH0b (PB2).
   *          - For Cat.4 and Cat.5 devices: CH8 (PB0), CH9 (PB1), CH0b (PB2),
   *            CH1b (PF11) or CH2b (PF12).
-  *         Note: Comparator peripheral clock must be preliminarility enabled,
+  *         Note: Comparator peripheral clock must be preliminarily enabled,
   *               either in COMP user function "HAL_COMP_MspInit()" (should be
   *               done if comparators are used) or by direct clock enable:
   *               Refer to macro "__HAL_RCC_COMP_CLK_ENABLE()".
-  *         Note: In addition with this macro, Vrefint output buffer must be
+  *         Note: In addition with this macro, VrefInt output buffer must be
   *               connected to the selected I/O pin. Refer to macro
   *               "__HAL_RI_IOSWITCH_CLOSE()".
-  * @note  ENABLE: Internal reference voltage connected to I/O group 3
+  * @note  VrefInt output enable: Internal reference voltage connected to I/O group 3
-  * @note  DISABLE: Internal reference voltage disconnected from I/O group 3
+  *        VrefInt output disable: Internal reference voltage disconnected from I/O group 3
   * @retval None
   */
 #define __HAL_SYSCFG_VREFINT_OUT_ENABLE()       SET_BIT(COMP->CSR, COMP_CSR_VREFOUTEN)
 #define __HAL_SYSCFG_VREFINT_OUT_DISABLE()      CLEAR_BIT(COMP->CSR, COMP_CSR_VREFOUTEN)
 #endif /* FSMC_R_BASE */
 /**
   * @brief  Returns the boot mode as configured by user.
   * @retval The boot mode as configured by user. The returned value can be one
   *         of the following values:
   *           @arg SYSCFG_BOOT_MAINFLASH
   *           @arg SYSCFG_BOOT_SYSTEMFLASH
   *           @arg SYSCFG_BOOT_FSMC (available only for STM32L151xD, STM32L152xD & STM32L162xD)
   *           @arg SYSCFG_BOOT_SRAM
   * @}
   */
 /** @defgroup RI_Macris RI: Routing Interface
   * @{
   */
 /** @defgroup RI_InputCaputureConfig Input Capture configuration
   * @{
   */
 /**
   * @brief  Configures the routing interface to map Input Capture 1 of TIMx to a selected I/O pin.
-  * @param  __TIMSELECT__: Timer select.
+  * @param  __TIMSELECT__ Timer select.
   *   This parameter can be one of the following values:
   *     @arg TIM_SELECT_NONE: No timer selected and default Timer mapping is enabled.
   *     @arg TIM_SELECT_TIM2: Timer 2 Input Captures to be routed.
   *     @arg TIM_SELECT_TIM3: Timer 3 Input Captures to be routed.
   *     @arg TIM_SELECT_TIM4: Timer 4 Input Captures to be routed.
-  * @param  __INPUT__: selects which pin to be routed to Input Capture.
+  * @param  __INPUT__ selects which pin to be routed to Input Capture.
   *   This parameter must be a value of @ref RI_InputCaptureRouting
   *     e.g.
   *       __HAL_RI_REMAP_INPUTCAPTURE1(TIM_SELECT_TIM2, RI_INPUTCAPTUREROUTING_1)
   *       allows routing of Input capture IC1 of TIM2 to PA4.
   *       For details about correspondence between RI_INPUTCAPTUREROUTING_x
   *       and I/O pins refer to the parameters' description in the header file
   *       or refer to the product reference manual.
   * @note Input capture selection bits are not reset by this function.
   *       To reset input capture selection bits, use SYSCFG_RIDeInit() function.
   * @note The I/O should be configured in alternate function mode (AF14) using
               MODIFY_REG(RI->ICR, RI_ICR_IC1OS, (__INPUT__) << POSITION_VAL(RI_ICR_IC1OS)); \
           }while(0)
 /**
   * @brief  Configures the routing interface to map Input Capture 2 of TIMx to a selected I/O pin.
-  * @param  __TIMSELECT__: Timer select.
+  * @param  __TIMSELECT__ Timer select.
   *   This parameter can be one of the following values:
   *     @arg TIM_SELECT_NONE: No timer selected and default Timer mapping is enabled.
   *     @arg TIM_SELECT_TIM2: Timer 2 Input Captures to be routed.
   *     @arg TIM_SELECT_TIM3: Timer 3 Input Captures to be routed.
   *     @arg TIM_SELECT_TIM4: Timer 4 Input Captures to be routed.
-  * @param  __INPUT__: selects which pin to be routed to Input Capture.
+  * @param  __INPUT__ selects which pin to be routed to Input Capture.
   *   This parameter must be a value of @ref RI_InputCaptureRouting
   * @retval None.
   */
 #define __HAL_RI_REMAP_INPUTCAPTURE2(__TIMSELECT__, __INPUT__)  \
           do {assert_param(IS_RI_TIM(__TIMSELECT__)); \
               MODIFY_REG(RI->ICR, RI_ICR_IC2OS, (__INPUT__) << POSITION_VAL(RI_ICR_IC2OS)); \
           }while(0)
 /**
   * @brief  Configures the routing interface to map Input Capture 3 of TIMx to a selected I/O pin.
-  * @param  __TIMSELECT__: Timer select.
+  * @param  __TIMSELECT__ Timer select.
   *   This parameter can be one of the following values:
   *     @arg TIM_SELECT_NONE: No timer selected and default Timer mapping is enabled.
   *     @arg TIM_SELECT_TIM2: Timer 2 Input Captures to be routed.
   *     @arg TIM_SELECT_TIM3: Timer 3 Input Captures to be routed.
   *     @arg TIM_SELECT_TIM4: Timer 4 Input Captures to be routed.
-  * @param  __INPUT__: selects which pin to be routed to Input Capture.
+  * @param  __INPUT__ selects which pin to be routed to Input Capture.
   *   This parameter must be a value of @ref RI_InputCaptureRouting
   * @retval None.
   */
 #define __HAL_RI_REMAP_INPUTCAPTURE3(__TIMSELECT__, __INPUT__)  \
           do {assert_param(IS_RI_TIM(__TIMSELECT__)); \
               MODIFY_REG(RI->ICR, RI_ICR_IC3OS, (__INPUT__) << POSITION_VAL(RI_ICR_IC3OS)); \
           }while(0)
 /**
   * @brief  Configures the routing interface to map Input Capture 4 of TIMx to a selected I/O pin.
-  * @param  __TIMSELECT__: Timer select.
+  * @param  __TIMSELECT__ Timer select.
   *   This parameter can be one of the following values:
   *     @arg TIM_SELECT_NONE: No timer selected and default Timer mapping is enabled.
   *     @arg TIM_SELECT_TIM2: Timer 2 Input Captures to be routed.
   *     @arg TIM_SELECT_TIM3: Timer 3 Input Captures to be routed.
   *     @arg TIM_SELECT_TIM4: Timer 4 Input Captures to be routed.
-  * @param  __INPUT__: selects which pin to be routed to Input Capture.
+  * @param  __INPUT__ selects which pin to be routed to Input Capture.
   *   This parameter must be a value of @ref RI_InputCaptureRouting
   * @retval None.
   */
 #define __HAL_RI_REMAP_INPUTCAPTURE4(__TIMSELECT__, __INPUT__)  \
           do {assert_param(IS_RI_TIM(__TIMSELECT__)); \
   * @}
   */
 /** @defgroup RI_SwitchControlConfig Switch Control configuration
   * @{
   */
 /**
   * @brief  Enable or disable the switch control mode.
   * @note  ENABLE: ADC analog switches closed if the corresponding
   *                    I/O switch is also closed.
   *                    When using COMP1, switch control mode must be enabled.
   * @note  DISABLE: ADC analog switches open or controlled by the ADC interface.
   *                    When using the ADC for acquisition, switch control mode
   *                    must be disabled.
   * @note COMP1 comparator and ADC cannot be used at the same time since
   *       they share the ADC switch matrix.
   * @retval None
   */
 #define __HAL_RI_SWITCHCONTROLMODE_ENABLE()       SET_BIT(RI->ASCR1, RI_ASCR1_SCM)
 #define __HAL_RI_SWITCHCONTROLMODE_DISABLE()      CLEAR_BIT(RI->ASCR1, RI_ASCR1_SCM)
 /*
   * @brief  Close or Open the routing interface Input Output switches.
-  * @param  __IOSWITCH__: selects the I/O analog switch number.
+  * @param  __IOSWITCH__ selects the I/O analog switch number.
   *   This parameter must be a value of @ref RI_IOSwitch
   * @retval None
   */
 #define __HAL_RI_IOSWITCH_CLOSE(__IOSWITCH__) do { assert_param(IS_RI_IOSWITCH(__IOSWITCH__)); \
             if ((__IOSWITCH__) >> 31 != 0 ) \
           }while(0)
 #if defined (COMP_CSR_SW1)
 /**
   * @brief  Close or open the internal switch COMP1_SW1.
   *         This switch connects I/O pin PC3 (can be used as ADC channel 13)
   *         and OPAMP3 ouput to ADC switch matrix (ADC channel VCOMP, channel
   *         26) and COMP1 non-inverting input.
   *         Pin PC3 connection depends on another switch setting, refer to
   *         macro "__HAL_ADC_CHANNEL_SPEED_FAST()".
   * @retval None.
   * @}
   */
 /** @defgroup RI_HystConfig Hysteresis Activation and Deactivation
   * @{
   */
 /**
   * @brief  Enable or disable Hysteresis of the input schmitt triger of Ports A
   *         When the I/Os are programmed in input mode by standard I/O port
   *         registers, the Schmitt trigger and the hysteresis are enabled by default.
   *         When hysteresis is disabled, it is possible to read the
   *         corresponding port with a trigger level of VDDIO/2.
   *  @param __IOPIN__ : Selects the pin(s) on which to enable or disable hysteresis.
   *   This parameter must be a value of @ref RI_Pin
   * @retval None
   */
             SET_BIT(RI->HYSCR1, (__IOPIN__)); \
           } while(0)
 /**
   * @brief  Enable or disable Hysteresis of the input schmitt triger of Ports B
   *         When the I/Os are programmed in input mode by standard I/O port
   *         registers, the Schmitt trigger and the hysteresis are enabled by default.
   *         When hysteresis is disabled, it is possible to read the
   *         corresponding port with a trigger level of VDDIO/2.
   *  @param __IOPIN__ : Selects the pin(s) on which to enable or disable hysteresis.
   *   This parameter must be a value of @ref RI_Pin
   * @retval None
   */
             SET_BIT(RI->HYSCR1, (__IOPIN__) << 16 ); \
           } while(0)
 /**
   * @brief  Enable or disable Hysteresis of the input schmitt triger of Ports C
   *         When the I/Os are programmed in input mode by standard I/O port
   *         registers, the Schmitt trigger and the hysteresis are enabled by default.
   *         When hysteresis is disabled, it is possible to read the
   *         corresponding port with a trigger level of VDDIO/2.
   *  @param __IOPIN__ : Selects the pin(s) on which to enable or disable hysteresis.
   *   This parameter must be a value of @ref RI_Pin
   * @retval None
   */
             SET_BIT(RI->HYSCR2, (__IOPIN__)); \
           } while(0)
 /**
   * @brief  Enable or disable Hysteresis of the input schmitt triger of Ports D
   *         When the I/Os are programmed in input mode by standard I/O port
   *         registers, the Schmitt trigger and the hysteresis are enabled by default.
   *         When hysteresis is disabled, it is possible to read the
   *         corresponding port with a trigger level of VDDIO/2.
   *  @param __IOPIN__ : Selects the pin(s) on which to enable or disable hysteresis.
   *   This parameter must be a value of @ref RI_Pin
   * @retval None
   */
 #define __HAL_RI_HYSTERIS_PORTD_OFF(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
             SET_BIT(RI->HYSCR2, (__IOPIN__) << 16 ); \
           } while(0)
 #if defined (GPIOE_BASE)
 /**
   * @brief  Enable or disable Hysteresis of the input schmitt triger of Ports E
   *         When the I/Os are programmed in input mode by standard I/O port
   *         registers, the Schmitt trigger and the hysteresis are enabled by default.
   *         When hysteresis is disabled, it is possible to read the
   *         corresponding port with a trigger level of VDDIO/2.
   *  @param __IOPIN__ : Selects the pin(s) on which to enable or disable hysteresis.
   *   This parameter must be a value of @ref RI_Pin
   * @retval None
   */
 #if defined(GPIOF_BASE) || defined(GPIOG_BASE)
 /**
   * @brief  Enable or disable Hysteresis of the input schmitt triger of Ports F
   *         When the I/Os are programmed in input mode by standard I/O port
   *         registers, the Schmitt trigger and the hysteresis are enabled by default.
   *         When hysteresis is disabled, it is possible to read the
   *         corresponding port with a trigger level of VDDIO/2.
   *  @param __IOPIN__ : Selects the pin(s) on which to enable or disable hysteresis.
   *   This parameter must be a value of @ref RI_Pin
   * @retval None
   */
             SET_BIT(RI->HYSCR3, (__IOPIN__) << 16 ); \
           } while(0)
 /**
   * @brief  Enable or disable Hysteresis of the input schmitt triger of Ports G
   *         When the I/Os are programmed in input mode by standard I/O port
   *         registers, the Schmitt trigger and the hysteresis are enabled by default.
   *         When hysteresis is disabled, it is possible to read the
   *         corresponding port with a trigger level of VDDIO/2.
   *  @param __IOPIN__ : Selects the pin(s) on which to enable or disable hysteresis.
   *   This parameter must be a value of @ref RI_Pin
   * @retval None
   */
 /**
   * @}
   */
-/* Exported functions --------------------------------------------------------*/
+/* Exported variables --------------------------------------------------------*/
+/** @defgroup HAL_Exported_Variables HAL Exported Variables
+  * @{
+  */
+extern __IO uint32_t uwTick;
+extern uint32_t uwTickPrio;
+extern uint32_t uwTickFreq;
+/**
+  * @}
+  */
+/* Exported functions --------------------------------------------------------*/
 /** @addtogroup HAL_Exported_Functions
   * @{
   */
 /** @addtogroup HAL_Exported_Functions_Group1
 /* Initialization and de-initialization functions  ******************************/
 HAL_StatusTypeDef HAL_Init(void);
 HAL_StatusTypeDef HAL_DeInit(void);
 void              HAL_MspInit(void);
 void              HAL_MspDeInit(void);
-HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority);
 /**
   * @}
   */
 /** @addtogroup HAL_Exported_Functions_Group2
   * @{
   */
 /* Peripheral Control functions  ************************************************/
-void              HAL_IncTick(void);
+void               HAL_IncTick(void);
-void              HAL_Delay(__IO uint32_t Delay);
+void               HAL_Delay(uint32_t Delay);
-uint32_t          HAL_GetTick(void);
+uint32_t           HAL_GetTick(void);
+uint32_t           HAL_GetTickPrio(void);
+HAL_StatusTypeDef  HAL_SetTickFreq(uint32_t Freq);
+uint32_t           HAL_GetTickFreq(void);
-void              HAL_SuspendTick(void);
+void               HAL_SuspendTick(void);
-void              HAL_ResumeTick(void);
+void               HAL_ResumeTick(void);
-uint32_t          HAL_GetHalVersion(void);
+uint32_t           HAL_GetHalVersion(void);
-uint32_t          HAL_GetREVID(void);
+uint32_t           HAL_GetREVID(void);
-uint32_t          HAL_GetDEVID(void);
+uint32_t           HAL_GetDEVID(void);
+uint32_t           HAL_GetUIDw0(void);
+uint32_t           HAL_GetUIDw1(void);
+uint32_t           HAL_GetUIDw2(void);
+/**
+  * @}
+  */
+/** @addtogroup HAL_Exported_Functions_Group3
+  * @{
+  */
+/* DBGMCU Peripheral Control functions  *****************************************/
 void              HAL_DBGMCU_EnableDBGSleepMode(void);
 void              HAL_DBGMCU_DisableDBGSleepMode(void);
 void              HAL_DBGMCU_EnableDBGStopMode(void);
 void              HAL_DBGMCU_DisableDBGStopMode(void);
 void              HAL_DBGMCU_EnableDBGStandbyMode(void);
 /**
   * @}
   */
 /**
   * @}
   */
 /**
   * @}
   */
 #ifdef __cplusplus
+}
 #endif
 #endif /* __STM32L1xx_HAL_H */

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