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| 1 | /** |
1 | /** |
| 2 | ****************************************************************************** |
2 | ****************************************************************************** |
| 3 | * @file stm32_hal_legacy.h |
3 | * @file stm32_hal_legacy.h |
| 4 | * @author MCD Application Team |
4 | * @author MCD Application Team |
| 5 | * @version V1.2.0 |
- | |
| 6 | * @date 01-July-2016 |
- | |
| 7 | * @brief This file contains aliases definition for the STM32Cube HAL constants |
5 | * @brief This file contains aliases definition for the STM32Cube HAL constants |
| 8 | * macros and functions maintained for legacy purpose. |
6 | * macros and functions maintained for legacy purpose. |
| 9 | ****************************************************************************** |
7 | ****************************************************************************** |
| 10 | * @attention |
8 | * @attention |
| 11 | * |
9 | * |
| 12 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
10 | * <h2><center>© Copyright (c) 2019 STMicroelectronics. |
| - | 11 | * All rights reserved.</center></h2> |
|
| 13 | * |
12 | * |
| 14 | * Redistribution and use in source and binary forms, with or without modification, |
13 | * This software component is licensed by ST under BSD 3-Clause license, |
| 15 | * are permitted provided that the following conditions are met: |
14 | * the "License"; You may not use this file except in compliance with the |
| 16 | * 1. Redistributions of source code must retain the above copyright notice, |
- | |
| 17 | * this list of conditions and the following disclaimer. |
- | |
| 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
- | |
| 19 | * this list of conditions and the following disclaimer in the documentation |
- | |
| 20 | * and/or other materials provided with the distribution. |
15 | * License. You may obtain a copy of the License at: |
| 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
- | |
| 22 | * may be used to endorse or promote products derived from this software |
16 | * opensource.org/licenses/BSD-3-Clause |
| 23 | * without specific prior written permission. |
- | |
| 24 | * |
- | |
| 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
- | |
| 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
- | |
| 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
- | |
| 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
- | |
| 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
- | |
| 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
- | |
| 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
- | |
| 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
- | |
| 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
- | |
| 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
- | |
| 35 | * |
17 | * |
| 36 | ****************************************************************************** |
18 | ****************************************************************************** |
| 37 | */ |
19 | */ |
| 38 | 20 | ||
| 39 | /* Define to prevent recursive inclusion -------------------------------------*/ |
21 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| 40 | #ifndef __STM32_HAL_LEGACY |
22 | #ifndef STM32_HAL_LEGACY |
| 41 | #define __STM32_HAL_LEGACY |
23 | #define STM32_HAL_LEGACY |
| 42 | 24 | ||
| 43 | #ifdef __cplusplus |
25 | #ifdef __cplusplus |
| 44 | extern "C" { |
26 | extern "C" { |
| 45 | #endif |
27 | #endif |
| 46 | 28 | ||
| Line 58... | Line 40... | ||
| 58 | #define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR |
40 | #define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR |
| 59 | 41 | ||
| 60 | /** |
42 | /** |
| 61 | * @} |
43 | * @} |
| 62 | */ |
44 | */ |
| 63 | 45 | ||
| 64 | /** @defgroup HAL_ADC_Aliased_Defines HAL ADC Aliased Defines maintained for legacy purpose |
46 | /** @defgroup HAL_ADC_Aliased_Defines HAL ADC Aliased Defines maintained for legacy purpose |
| 65 | * @{ |
47 | * @{ |
| 66 | */ |
48 | */ |
| 67 | #define ADC_RESOLUTION12b ADC_RESOLUTION_12B |
49 | #define ADC_RESOLUTION12b ADC_RESOLUTION_12B |
| 68 | #define ADC_RESOLUTION10b ADC_RESOLUTION_10B |
50 | #define ADC_RESOLUTION10b ADC_RESOLUTION_10B |
| Line 90... | Line 72... | ||
| 90 | #define ADC_CLOCKPRESCALER_PCLK_DIV1 ADC_CLOCK_SYNC_PCLK_DIV1 |
72 | #define ADC_CLOCKPRESCALER_PCLK_DIV1 ADC_CLOCK_SYNC_PCLK_DIV1 |
| 91 | #define ADC_CLOCKPRESCALER_PCLK_DIV2 ADC_CLOCK_SYNC_PCLK_DIV2 |
73 | #define ADC_CLOCKPRESCALER_PCLK_DIV2 ADC_CLOCK_SYNC_PCLK_DIV2 |
| 92 | #define ADC_CLOCKPRESCALER_PCLK_DIV4 ADC_CLOCK_SYNC_PCLK_DIV4 |
74 | #define ADC_CLOCKPRESCALER_PCLK_DIV4 ADC_CLOCK_SYNC_PCLK_DIV4 |
| 93 | #define ADC_CLOCKPRESCALER_PCLK_DIV6 ADC_CLOCK_SYNC_PCLK_DIV6 |
75 | #define ADC_CLOCKPRESCALER_PCLK_DIV6 ADC_CLOCK_SYNC_PCLK_DIV6 |
| 94 | #define ADC_CLOCKPRESCALER_PCLK_DIV8 ADC_CLOCK_SYNC_PCLK_DIV8 |
76 | #define ADC_CLOCKPRESCALER_PCLK_DIV8 ADC_CLOCK_SYNC_PCLK_DIV8 |
| 95 | #define ADC_EXTERNALTRIG0_T6_TRGO ADC_EXTERNALTRIGCONV_T6_TRGO |
77 | #define ADC_EXTERNALTRIG0_T6_TRGO ADC_EXTERNALTRIGCONV_T6_TRGO |
| 96 | #define ADC_EXTERNALTRIG1_T21_CC2 ADC_EXTERNALTRIGCONV_T21_CC2 |
78 | #define ADC_EXTERNALTRIG1_T21_CC2 ADC_EXTERNALTRIGCONV_T21_CC2 |
| 97 | #define ADC_EXTERNALTRIG2_T2_TRGO ADC_EXTERNALTRIGCONV_T2_TRGO |
79 | #define ADC_EXTERNALTRIG2_T2_TRGO ADC_EXTERNALTRIGCONV_T2_TRGO |
| 98 | #define ADC_EXTERNALTRIG3_T2_CC4 ADC_EXTERNALTRIGCONV_T2_CC4 |
80 | #define ADC_EXTERNALTRIG3_T2_CC4 ADC_EXTERNALTRIGCONV_T2_CC4 |
| 99 | #define ADC_EXTERNALTRIG4_T22_TRGO ADC_EXTERNALTRIGCONV_T22_TRGO |
81 | #define ADC_EXTERNALTRIG4_T22_TRGO ADC_EXTERNALTRIGCONV_T22_TRGO |
| 100 | #define ADC_EXTERNALTRIG7_EXT_IT11 ADC_EXTERNALTRIGCONV_EXT_IT11 |
82 | #define ADC_EXTERNALTRIG7_EXT_IT11 ADC_EXTERNALTRIGCONV_EXT_IT11 |
| 101 | #define ADC_CLOCK_ASYNC ADC_CLOCK_ASYNC_DIV1 |
83 | #define ADC_CLOCK_ASYNC ADC_CLOCK_ASYNC_DIV1 |
| 102 | #define ADC_EXTERNALTRIG_EDGE_NONE ADC_EXTERNALTRIGCONVEDGE_NONE |
84 | #define ADC_EXTERNALTRIG_EDGE_NONE ADC_EXTERNALTRIGCONVEDGE_NONE |
| 103 | #define ADC_EXTERNALTRIG_EDGE_RISING ADC_EXTERNALTRIGCONVEDGE_RISING |
85 | #define ADC_EXTERNALTRIG_EDGE_RISING ADC_EXTERNALTRIGCONVEDGE_RISING |
| Line 109... | Line 91... | ||
| 109 | #define HAL_ADC_STATE_BUSY_INJ HAL_ADC_STATE_INJ_BUSY |
91 | #define HAL_ADC_STATE_BUSY_INJ HAL_ADC_STATE_INJ_BUSY |
| 110 | #define HAL_ADC_STATE_EOC_REG HAL_ADC_STATE_REG_EOC |
92 | #define HAL_ADC_STATE_EOC_REG HAL_ADC_STATE_REG_EOC |
| 111 | #define HAL_ADC_STATE_EOC_INJ HAL_ADC_STATE_INJ_EOC |
93 | #define HAL_ADC_STATE_EOC_INJ HAL_ADC_STATE_INJ_EOC |
| 112 | #define HAL_ADC_STATE_ERROR HAL_ADC_STATE_ERROR_INTERNAL |
94 | #define HAL_ADC_STATE_ERROR HAL_ADC_STATE_ERROR_INTERNAL |
| 113 | #define HAL_ADC_STATE_BUSY HAL_ADC_STATE_BUSY_INTERNAL |
95 | #define HAL_ADC_STATE_BUSY HAL_ADC_STATE_BUSY_INTERNAL |
| 114 | #define HAL_ADC_STATE_AWD HAL_ADC_STATE_AWD1 |
96 | #define HAL_ADC_STATE_AWD HAL_ADC_STATE_AWD1 |
| - | 97 | ||
| - | 98 | #if defined(STM32H7) |
|
| - | 99 | #define ADC_CHANNEL_VBAT_DIV4 ADC_CHANNEL_VBAT |
|
| - | 100 | #endif /* STM32H7 */ |
|
| 115 | /** |
101 | /** |
| 116 | * @} |
102 | * @} |
| 117 | */ |
103 | */ |
| 118 | 104 | ||
| 119 | /** @defgroup HAL_CEC_Aliased_Defines HAL CEC Aliased Defines maintained for legacy purpose |
105 | /** @defgroup HAL_CEC_Aliased_Defines HAL CEC Aliased Defines maintained for legacy purpose |
| 120 | * @{ |
106 | * @{ |
| 121 | */ |
107 | */ |
| 122 | 108 | ||
| 123 | #define __HAL_CEC_GET_IT __HAL_CEC_GET_FLAG |
109 | #define __HAL_CEC_GET_IT __HAL_CEC_GET_FLAG |
| 124 | 110 | ||
| 125 | /** |
111 | /** |
| 126 | * @} |
112 | * @} |
| 127 | */ |
113 | */ |
| 128 | 114 | ||
| 129 | /** @defgroup HAL_COMP_Aliased_Defines HAL COMP Aliased Defines maintained for legacy purpose |
115 | /** @defgroup HAL_COMP_Aliased_Defines HAL COMP Aliased Defines maintained for legacy purpose |
| 130 | * @{ |
116 | * @{ |
| 131 | */ |
117 | */ |
| 132 | #define COMP_WINDOWMODE_DISABLED COMP_WINDOWMODE_DISABLE |
118 | #define COMP_WINDOWMODE_DISABLED COMP_WINDOWMODE_DISABLE |
| 133 | #define COMP_WINDOWMODE_ENABLED COMP_WINDOWMODE_ENABLE |
119 | #define COMP_WINDOWMODE_ENABLED COMP_WINDOWMODE_ENABLE |
| Line 136... | Line 122... | ||
| 136 | #define COMP_EXTI_LINE_COMP3_EVENT COMP_EXTI_LINE_COMP3 |
122 | #define COMP_EXTI_LINE_COMP3_EVENT COMP_EXTI_LINE_COMP3 |
| 137 | #define COMP_EXTI_LINE_COMP4_EVENT COMP_EXTI_LINE_COMP4 |
123 | #define COMP_EXTI_LINE_COMP4_EVENT COMP_EXTI_LINE_COMP4 |
| 138 | #define COMP_EXTI_LINE_COMP5_EVENT COMP_EXTI_LINE_COMP5 |
124 | #define COMP_EXTI_LINE_COMP5_EVENT COMP_EXTI_LINE_COMP5 |
| 139 | #define COMP_EXTI_LINE_COMP6_EVENT COMP_EXTI_LINE_COMP6 |
125 | #define COMP_EXTI_LINE_COMP6_EVENT COMP_EXTI_LINE_COMP6 |
| 140 | #define COMP_EXTI_LINE_COMP7_EVENT COMP_EXTI_LINE_COMP7 |
126 | #define COMP_EXTI_LINE_COMP7_EVENT COMP_EXTI_LINE_COMP7 |
| - | 127 | #if defined(STM32L0) |
|
| - | 128 | #define COMP_LPTIMCONNECTION_ENABLED ((uint32_t)0x00000003U) /*!< COMPX output generic naming: connected to LPTIM input 1 for COMP1, LPTIM input 2 for COMP2 */ |
|
| - | 129 | #endif |
|
| 141 | #define COMP_OUTPUT_COMP6TIM2OCREFCLR COMP_OUTPUT_COMP6_TIM2OCREFCLR |
130 | #define COMP_OUTPUT_COMP6TIM2OCREFCLR COMP_OUTPUT_COMP6_TIM2OCREFCLR |
| 142 | #if defined(STM32F373xC) || defined(STM32F378xx) |
131 | #if defined(STM32F373xC) || defined(STM32F378xx) |
| 143 | #define COMP_OUTPUT_TIM3IC1 COMP_OUTPUT_COMP1_TIM3IC1 |
132 | #define COMP_OUTPUT_TIM3IC1 COMP_OUTPUT_COMP1_TIM3IC1 |
| 144 | #define COMP_OUTPUT_TIM3OCREFCLR COMP_OUTPUT_COMP1_TIM3OCREFCLR |
133 | #define COMP_OUTPUT_TIM3OCREFCLR COMP_OUTPUT_COMP1_TIM3OCREFCLR |
| 145 | #endif /* STM32F373xC || STM32F378xx */ |
134 | #endif /* STM32F373xC || STM32F378xx */ |
| Line 151... | Line 140... | ||
| 151 | #define COMP_NONINVERTINGINPUT_IO2 COMP_INPUT_PLUS_IO2 |
140 | #define COMP_NONINVERTINGINPUT_IO2 COMP_INPUT_PLUS_IO2 |
| 152 | #define COMP_NONINVERTINGINPUT_IO3 COMP_INPUT_PLUS_IO3 |
141 | #define COMP_NONINVERTINGINPUT_IO3 COMP_INPUT_PLUS_IO3 |
| 153 | #define COMP_NONINVERTINGINPUT_IO4 COMP_INPUT_PLUS_IO4 |
142 | #define COMP_NONINVERTINGINPUT_IO4 COMP_INPUT_PLUS_IO4 |
| 154 | #define COMP_NONINVERTINGINPUT_IO5 COMP_INPUT_PLUS_IO5 |
143 | #define COMP_NONINVERTINGINPUT_IO5 COMP_INPUT_PLUS_IO5 |
| 155 | #define COMP_NONINVERTINGINPUT_IO6 COMP_INPUT_PLUS_IO6 |
144 | #define COMP_NONINVERTINGINPUT_IO6 COMP_INPUT_PLUS_IO6 |
| 156 | 145 | ||
| 157 | #define COMP_INVERTINGINPUT_1_4VREFINT COMP_INPUT_MINUS_1_4VREFINT |
146 | #define COMP_INVERTINGINPUT_1_4VREFINT COMP_INPUT_MINUS_1_4VREFINT |
| 158 | #define COMP_INVERTINGINPUT_1_2VREFINT COMP_INPUT_MINUS_1_2VREFINT |
147 | #define COMP_INVERTINGINPUT_1_2VREFINT COMP_INPUT_MINUS_1_2VREFINT |
| 159 | #define COMP_INVERTINGINPUT_3_4VREFINT COMP_INPUT_MINUS_3_4VREFINT |
148 | #define COMP_INVERTINGINPUT_3_4VREFINT COMP_INPUT_MINUS_3_4VREFINT |
| 160 | #define COMP_INVERTINGINPUT_VREFINT COMP_INPUT_MINUS_VREFINT |
149 | #define COMP_INVERTINGINPUT_VREFINT COMP_INPUT_MINUS_VREFINT |
| 161 | #define COMP_INVERTINGINPUT_DAC1_CH1 COMP_INPUT_MINUS_DAC1_CH1 |
150 | #define COMP_INVERTINGINPUT_DAC1_CH1 COMP_INPUT_MINUS_DAC1_CH1 |
| Line 223... | Line 212... | ||
| 223 | */ |
212 | */ |
| 224 | 213 | ||
| 225 | /** @defgroup HAL_CRC_Aliased_Defines HAL CRC Aliased Defines maintained for legacy purpose |
214 | /** @defgroup HAL_CRC_Aliased_Defines HAL CRC Aliased Defines maintained for legacy purpose |
| 226 | * @{ |
215 | * @{ |
| 227 | */ |
216 | */ |
| 228 | 217 | ||
| 229 | #define CRC_OUTPUTDATA_INVERSION_DISABLED CRC_OUTPUTDATA_INVERSION_DISABLE |
218 | #define CRC_OUTPUTDATA_INVERSION_DISABLED CRC_OUTPUTDATA_INVERSION_DISABLE |
| 230 | #define CRC_OUTPUTDATA_INVERSION_ENABLED CRC_OUTPUTDATA_INVERSION_ENABLE |
219 | #define CRC_OUTPUTDATA_INVERSION_ENABLED CRC_OUTPUTDATA_INVERSION_ENABLE |
| 231 | 220 | ||
| 232 | /** |
221 | /** |
| 233 | * @} |
222 | * @} |
| Line 238... | Line 227... | ||
| 238 | */ |
227 | */ |
| 239 | 228 | ||
| 240 | #define DAC1_CHANNEL_1 DAC_CHANNEL_1 |
229 | #define DAC1_CHANNEL_1 DAC_CHANNEL_1 |
| 241 | #define DAC1_CHANNEL_2 DAC_CHANNEL_2 |
230 | #define DAC1_CHANNEL_2 DAC_CHANNEL_2 |
| 242 | #define DAC2_CHANNEL_1 DAC_CHANNEL_1 |
231 | #define DAC2_CHANNEL_1 DAC_CHANNEL_1 |
| 243 | #define DAC_WAVE_NONE ((uint32_t)0x00000000U) |
232 | #define DAC_WAVE_NONE 0x00000000U |
| 244 | #define DAC_WAVE_NOISE ((uint32_t)DAC_CR_WAVE1_0) |
233 | #define DAC_WAVE_NOISE DAC_CR_WAVE1_0 |
| 245 | #define DAC_WAVE_TRIANGLE ((uint32_t)DAC_CR_WAVE1_1) |
234 | #define DAC_WAVE_TRIANGLE DAC_CR_WAVE1_1 |
| 246 | #define DAC_WAVEGENERATION_NONE DAC_WAVE_NONE |
235 | #define DAC_WAVEGENERATION_NONE DAC_WAVE_NONE |
| 247 | #define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE |
236 | #define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE |
| 248 | #define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE |
237 | #define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE |
| 249 | 238 | ||
| - | 239 | #if defined(STM32G4) || defined(STM32H7) |
|
| - | 240 | #define DAC_CHIPCONNECT_DISABLE DAC_CHIPCONNECT_EXTERNAL |
|
| - | 241 | #define DAC_CHIPCONNECT_ENABLE DAC_CHIPCONNECT_INTERNAL |
|
| - | 242 | #endif |
|
| - | 243 | ||
| - | 244 | #if defined(STM32L1) || defined(STM32L4) || defined(STM32G0) || defined(STM32L5) || defined(STM32H7) || defined(STM32F4) || defined(STM32G4) |
|
| - | 245 | #define HAL_DAC_MSP_INIT_CB_ID HAL_DAC_MSPINIT_CB_ID |
|
| - | 246 | #define HAL_DAC_MSP_DEINIT_CB_ID HAL_DAC_MSPDEINIT_CB_ID |
|
| - | 247 | #endif |
|
| - | 248 | ||
| 250 | /** |
249 | /** |
| 251 | * @} |
250 | * @} |
| 252 | */ |
251 | */ |
| 253 | 252 | ||
| 254 | /** @defgroup HAL_DMA_Aliased_Defines HAL DMA Aliased Defines maintained for legacy purpose |
253 | /** @defgroup HAL_DMA_Aliased_Defines HAL DMA Aliased Defines maintained for legacy purpose |
| 255 | * @{ |
254 | * @{ |
| 256 | */ |
255 | */ |
| 257 | #define HAL_REMAPDMA_ADC_DMA_CH2 DMA_REMAP_ADC_DMA_CH2 |
256 | #define HAL_REMAPDMA_ADC_DMA_CH2 DMA_REMAP_ADC_DMA_CH2 |
| 258 | #define HAL_REMAPDMA_USART1_TX_DMA_CH4 DMA_REMAP_USART1_TX_DMA_CH4 |
257 | #define HAL_REMAPDMA_USART1_TX_DMA_CH4 DMA_REMAP_USART1_TX_DMA_CH4 |
| 259 | #define HAL_REMAPDMA_USART1_RX_DMA_CH5 DMA_REMAP_USART1_RX_DMA_CH5 |
258 | #define HAL_REMAPDMA_USART1_RX_DMA_CH5 DMA_REMAP_USART1_RX_DMA_CH5 |
| 260 | #define HAL_REMAPDMA_TIM16_DMA_CH4 DMA_REMAP_TIM16_DMA_CH4 |
259 | #define HAL_REMAPDMA_TIM16_DMA_CH4 DMA_REMAP_TIM16_DMA_CH4 |
| 261 | #define HAL_REMAPDMA_TIM17_DMA_CH2 DMA_REMAP_TIM17_DMA_CH2 |
260 | #define HAL_REMAPDMA_TIM17_DMA_CH2 DMA_REMAP_TIM17_DMA_CH2 |
| 262 | #define HAL_REMAPDMA_USART3_DMA_CH32 DMA_REMAP_USART3_DMA_CH32 |
261 | #define HAL_REMAPDMA_USART3_DMA_CH32 DMA_REMAP_USART3_DMA_CH32 |
| 263 | #define HAL_REMAPDMA_TIM16_DMA_CH6 DMA_REMAP_TIM16_DMA_CH6 |
262 | #define HAL_REMAPDMA_TIM16_DMA_CH6 DMA_REMAP_TIM16_DMA_CH6 |
| 264 | #define HAL_REMAPDMA_TIM17_DMA_CH7 DMA_REMAP_TIM17_DMA_CH7 |
263 | #define HAL_REMAPDMA_TIM17_DMA_CH7 DMA_REMAP_TIM17_DMA_CH7 |
| 265 | #define HAL_REMAPDMA_SPI2_DMA_CH67 DMA_REMAP_SPI2_DMA_CH67 |
264 | #define HAL_REMAPDMA_SPI2_DMA_CH67 DMA_REMAP_SPI2_DMA_CH67 |
| 266 | #define HAL_REMAPDMA_USART2_DMA_CH67 DMA_REMAP_USART2_DMA_CH67 |
265 | #define HAL_REMAPDMA_USART2_DMA_CH67 DMA_REMAP_USART2_DMA_CH67 |
| 267 | #define HAL_REMAPDMA_USART3_DMA_CH32 DMA_REMAP_USART3_DMA_CH32 |
- | |
| 268 | #define HAL_REMAPDMA_I2C1_DMA_CH76 DMA_REMAP_I2C1_DMA_CH76 |
266 | #define HAL_REMAPDMA_I2C1_DMA_CH76 DMA_REMAP_I2C1_DMA_CH76 |
| 269 | #define HAL_REMAPDMA_TIM1_DMA_CH6 DMA_REMAP_TIM1_DMA_CH6 |
267 | #define HAL_REMAPDMA_TIM1_DMA_CH6 DMA_REMAP_TIM1_DMA_CH6 |
| 270 | #define HAL_REMAPDMA_TIM2_DMA_CH7 DMA_REMAP_TIM2_DMA_CH7 |
268 | #define HAL_REMAPDMA_TIM2_DMA_CH7 DMA_REMAP_TIM2_DMA_CH7 |
| 271 | #define HAL_REMAPDMA_TIM3_DMA_CH6 DMA_REMAP_TIM3_DMA_CH6 |
269 | #define HAL_REMAPDMA_TIM3_DMA_CH6 DMA_REMAP_TIM3_DMA_CH6 |
| 272 | 270 | ||
| 273 | #define IS_HAL_REMAPDMA IS_DMA_REMAP |
271 | #define IS_HAL_REMAPDMA IS_DMA_REMAP |
| 274 | #define __HAL_REMAPDMA_CHANNEL_ENABLE __HAL_DMA_REMAP_CHANNEL_ENABLE |
272 | #define __HAL_REMAPDMA_CHANNEL_ENABLE __HAL_DMA_REMAP_CHANNEL_ENABLE |
| 275 | #define __HAL_REMAPDMA_CHANNEL_DISABLE __HAL_DMA_REMAP_CHANNEL_DISABLE |
273 | #define __HAL_REMAPDMA_CHANNEL_DISABLE __HAL_DMA_REMAP_CHANNEL_DISABLE |
| - | 274 | ||
| - | 275 | #if defined(STM32L4) |
|
| - | 276 | ||
| - | 277 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI0 HAL_DMAMUX1_REQ_GEN_EXTI0 |
|
| - | 278 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI1 HAL_DMAMUX1_REQ_GEN_EXTI1 |
|
| - | 279 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI2 HAL_DMAMUX1_REQ_GEN_EXTI2 |
|
| - | 280 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI3 HAL_DMAMUX1_REQ_GEN_EXTI3 |
|
| - | 281 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI4 HAL_DMAMUX1_REQ_GEN_EXTI4 |
|
| - | 282 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI5 HAL_DMAMUX1_REQ_GEN_EXTI5 |
|
| - | 283 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI6 HAL_DMAMUX1_REQ_GEN_EXTI6 |
|
| - | 284 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI7 HAL_DMAMUX1_REQ_GEN_EXTI7 |
|
| - | 285 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI8 HAL_DMAMUX1_REQ_GEN_EXTI8 |
|
| - | 286 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI9 HAL_DMAMUX1_REQ_GEN_EXTI9 |
|
| - | 287 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI10 HAL_DMAMUX1_REQ_GEN_EXTI10 |
|
| - | 288 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI11 HAL_DMAMUX1_REQ_GEN_EXTI11 |
|
| - | 289 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI12 HAL_DMAMUX1_REQ_GEN_EXTI12 |
|
| - | 290 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI13 HAL_DMAMUX1_REQ_GEN_EXTI13 |
|
| - | 291 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI14 HAL_DMAMUX1_REQ_GEN_EXTI14 |
|
| - | 292 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI15 HAL_DMAMUX1_REQ_GEN_EXTI15 |
|
| - | 293 | #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH0_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH0_EVT |
|
| - | 294 | #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH1_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH1_EVT |
|
| - | 295 | #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH2_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH2_EVT |
|
| - | 296 | #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH3_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH3_EVT |
|
| - | 297 | #define HAL_DMAMUX1_REQUEST_GEN_LPTIM1_OUT HAL_DMAMUX1_REQ_GEN_LPTIM1_OUT |
|
| - | 298 | #define HAL_DMAMUX1_REQUEST_GEN_LPTIM2_OUT HAL_DMAMUX1_REQ_GEN_LPTIM2_OUT |
|
| - | 299 | #define HAL_DMAMUX1_REQUEST_GEN_DSI_TE HAL_DMAMUX1_REQ_GEN_DSI_TE |
|
| - | 300 | #define HAL_DMAMUX1_REQUEST_GEN_DSI_EOT HAL_DMAMUX1_REQ_GEN_DSI_EOT |
|
| - | 301 | #define HAL_DMAMUX1_REQUEST_GEN_DMA2D_EOT HAL_DMAMUX1_REQ_GEN_DMA2D_EOT |
|
| - | 302 | #define HAL_DMAMUX1_REQUEST_GEN_LTDC_IT HAL_DMAMUX1_REQ_GEN_LTDC_IT |
|
| - | 303 | ||
| - | 304 | #define HAL_DMAMUX_REQUEST_GEN_NO_EVENT HAL_DMAMUX_REQ_GEN_NO_EVENT |
|
| - | 305 | #define HAL_DMAMUX_REQUEST_GEN_RISING HAL_DMAMUX_REQ_GEN_RISING |
|
| - | 306 | #define HAL_DMAMUX_REQUEST_GEN_FALLING HAL_DMAMUX_REQ_GEN_FALLING |
|
| - | 307 | #define HAL_DMAMUX_REQUEST_GEN_RISING_FALLING HAL_DMAMUX_REQ_GEN_RISING_FALLING |
|
| - | 308 | ||
| - | 309 | #if defined(STM32L4R5xx) || defined(STM32L4R9xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) |
|
| - | 310 | #define DMA_REQUEST_DCMI_PSSI DMA_REQUEST_DCMI |
|
| - | 311 | #endif |
|
| - | 312 | ||
| - | 313 | #endif /* STM32L4 */ |
|
| - | 314 | ||
| - | 315 | #if defined(STM32G0) |
|
| - | 316 | #define DMA_REQUEST_DAC1_CHANNEL1 DMA_REQUEST_DAC1_CH1 |
|
| - | 317 | #define DMA_REQUEST_DAC1_CHANNEL2 DMA_REQUEST_DAC1_CH2 |
|
| - | 318 | #define DMA_REQUEST_TIM16_TRIG_COM DMA_REQUEST_TIM16_COM |
|
| - | 319 | #define DMA_REQUEST_TIM17_TRIG_COM DMA_REQUEST_TIM17_COM |
|
| - | 320 | ||
| - | 321 | #define LL_DMAMUX_REQ_TIM16_TRIG_COM LL_DMAMUX_REQ_TIM16_COM |
|
| - | 322 | #define LL_DMAMUX_REQ_TIM17_TRIG_COM LL_DMAMUX_REQ_TIM17_COM |
|
| - | 323 | #endif |
|
| - | 324 | ||
| - | 325 | #if defined(STM32H7) |
|
| - | 326 | ||
| - | 327 | #define DMA_REQUEST_DAC1 DMA_REQUEST_DAC1_CH1 |
|
| - | 328 | #define DMA_REQUEST_DAC2 DMA_REQUEST_DAC1_CH2 |
|
| - | 329 | ||
| - | 330 | #define BDMA_REQUEST_LP_UART1_RX BDMA_REQUEST_LPUART1_RX |
|
| - | 331 | #define BDMA_REQUEST_LP_UART1_TX BDMA_REQUEST_LPUART1_TX |
|
| - | 332 | ||
| - | 333 | #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH0_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH0_EVT |
|
| - | 334 | #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH1_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH1_EVT |
|
| - | 335 | #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH2_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH2_EVT |
|
| - | 336 | #define HAL_DMAMUX1_REQUEST_GEN_LPTIM1_OUT HAL_DMAMUX1_REQ_GEN_LPTIM1_OUT |
|
| - | 337 | #define HAL_DMAMUX1_REQUEST_GEN_LPTIM2_OUT HAL_DMAMUX1_REQ_GEN_LPTIM2_OUT |
|
| - | 338 | #define HAL_DMAMUX1_REQUEST_GEN_LPTIM3_OUT HAL_DMAMUX1_REQ_GEN_LPTIM3_OUT |
|
| - | 339 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI0 HAL_DMAMUX1_REQ_GEN_EXTI0 |
|
| - | 340 | #define HAL_DMAMUX1_REQUEST_GEN_TIM12_TRGO HAL_DMAMUX1_REQ_GEN_TIM12_TRGO |
|
| - | 341 | ||
| - | 342 | #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH0_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH0_EVT |
|
| - | 343 | #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH1_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH1_EVT |
|
| - | 344 | #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH2_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH2_EVT |
|
| - | 345 | #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH3_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH3_EVT |
|
| - | 346 | #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH4_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH4_EVT |
|
| - | 347 | #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH5_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH5_EVT |
|
| - | 348 | #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH6_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH6_EVT |
|
| - | 349 | #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_RX_WKUP HAL_DMAMUX2_REQ_GEN_LPUART1_RX_WKUP |
|
| - | 350 | #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_TX_WKUP HAL_DMAMUX2_REQ_GEN_LPUART1_TX_WKUP |
|
| - | 351 | #define HAL_DMAMUX2_REQUEST_GEN_LPTIM2_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM2_WKUP |
|
| - | 352 | #define HAL_DMAMUX2_REQUEST_GEN_LPTIM2_OUT HAL_DMAMUX2_REQ_GEN_LPTIM2_OUT |
|
| - | 353 | #define HAL_DMAMUX2_REQUEST_GEN_LPTIM3_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM3_WKUP |
|
| - | 354 | #define HAL_DMAMUX2_REQUEST_GEN_LPTIM3_OUT HAL_DMAMUX2_REQ_GEN_LPTIM3_OUT |
|
| - | 355 | #define HAL_DMAMUX2_REQUEST_GEN_LPTIM4_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM4_WKUP |
|
| - | 356 | #define HAL_DMAMUX2_REQUEST_GEN_LPTIM5_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM5_WKUP |
|
| - | 357 | #define HAL_DMAMUX2_REQUEST_GEN_I2C4_WKUP HAL_DMAMUX2_REQ_GEN_I2C4_WKUP |
|
| - | 358 | #define HAL_DMAMUX2_REQUEST_GEN_SPI6_WKUP HAL_DMAMUX2_REQ_GEN_SPI6_WKUP |
|
| - | 359 | #define HAL_DMAMUX2_REQUEST_GEN_COMP1_OUT HAL_DMAMUX2_REQ_GEN_COMP1_OUT |
|
| - | 360 | #define HAL_DMAMUX2_REQUEST_GEN_COMP2_OUT HAL_DMAMUX2_REQ_GEN_COMP2_OUT |
|
| - | 361 | #define HAL_DMAMUX2_REQUEST_GEN_RTC_WKUP HAL_DMAMUX2_REQ_GEN_RTC_WKUP |
|
| - | 362 | #define HAL_DMAMUX2_REQUEST_GEN_EXTI0 HAL_DMAMUX2_REQ_GEN_EXTI0 |
|
| - | 363 | #define HAL_DMAMUX2_REQUEST_GEN_EXTI2 HAL_DMAMUX2_REQ_GEN_EXTI2 |
|
| - | 364 | #define HAL_DMAMUX2_REQUEST_GEN_I2C4_IT_EVT HAL_DMAMUX2_REQ_GEN_I2C4_IT_EVT |
|
| - | 365 | #define HAL_DMAMUX2_REQUEST_GEN_SPI6_IT HAL_DMAMUX2_REQ_GEN_SPI6_IT |
|
| - | 366 | #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_TX_IT HAL_DMAMUX2_REQ_GEN_LPUART1_TX_IT |
|
| - | 367 | #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_RX_IT HAL_DMAMUX2_REQ_GEN_LPUART1_RX_IT |
|
| - | 368 | #define HAL_DMAMUX2_REQUEST_GEN_ADC3_IT HAL_DMAMUX2_REQ_GEN_ADC3_IT |
|
| - | 369 | #define HAL_DMAMUX2_REQUEST_GEN_ADC3_AWD1_OUT HAL_DMAMUX2_REQ_GEN_ADC3_AWD1_OUT |
|
| - | 370 | #define HAL_DMAMUX2_REQUEST_GEN_BDMA_CH0_IT HAL_DMAMUX2_REQ_GEN_BDMA_CH0_IT |
|
| - | 371 | #define HAL_DMAMUX2_REQUEST_GEN_BDMA_CH1_IT HAL_DMAMUX2_REQ_GEN_BDMA_CH1_IT |
|
| - | 372 | ||
| - | 373 | #define HAL_DMAMUX_REQUEST_GEN_NO_EVENT HAL_DMAMUX_REQ_GEN_NO_EVENT |
|
| - | 374 | #define HAL_DMAMUX_REQUEST_GEN_RISING HAL_DMAMUX_REQ_GEN_RISING |
|
| - | 375 | #define HAL_DMAMUX_REQUEST_GEN_FALLING HAL_DMAMUX_REQ_GEN_FALLING |
|
| - | 376 | #define HAL_DMAMUX_REQUEST_GEN_RISING_FALLING HAL_DMAMUX_REQ_GEN_RISING_FALLING |
|
| - | 377 | ||
| - | 378 | #define DFSDM_FILTER_EXT_TRIG_LPTIM1 DFSDM_FILTER_EXT_TRIG_LPTIM1_OUT |
|
| - | 379 | #define DFSDM_FILTER_EXT_TRIG_LPTIM2 DFSDM_FILTER_EXT_TRIG_LPTIM2_OUT |
|
| - | 380 | #define DFSDM_FILTER_EXT_TRIG_LPTIM3 DFSDM_FILTER_EXT_TRIG_LPTIM3_OUT |
|
| 276 | 381 | ||
| - | 382 | #define DAC_TRIGGER_LP1_OUT DAC_TRIGGER_LPTIM1_OUT |
|
| - | 383 | #define DAC_TRIGGER_LP2_OUT DAC_TRIGGER_LPTIM2_OUT |
|
| 277 | 384 | ||
| - | 385 | #endif /* STM32H7 */ |
|
| 278 | 386 | ||
| 279 | /** |
387 | /** |
| 280 | * @} |
388 | * @} |
| 281 | */ |
389 | */ |
| 282 | 390 | ||
| 283 | /** @defgroup HAL_FLASH_Aliased_Defines HAL FLASH Aliased Defines maintained for legacy purpose |
391 | /** @defgroup HAL_FLASH_Aliased_Defines HAL FLASH Aliased Defines maintained for legacy purpose |
| 284 | * @{ |
392 | * @{ |
| 285 | */ |
393 | */ |
| 286 | 394 | ||
| 287 | #define TYPEPROGRAM_BYTE FLASH_TYPEPROGRAM_BYTE |
395 | #define TYPEPROGRAM_BYTE FLASH_TYPEPROGRAM_BYTE |
| 288 | #define TYPEPROGRAM_HALFWORD FLASH_TYPEPROGRAM_HALFWORD |
396 | #define TYPEPROGRAM_HALFWORD FLASH_TYPEPROGRAM_HALFWORD |
| 289 | #define TYPEPROGRAM_WORD FLASH_TYPEPROGRAM_WORD |
397 | #define TYPEPROGRAM_WORD FLASH_TYPEPROGRAM_WORD |
| 290 | #define TYPEPROGRAM_DOUBLEWORD FLASH_TYPEPROGRAM_DOUBLEWORD |
398 | #define TYPEPROGRAM_DOUBLEWORD FLASH_TYPEPROGRAM_DOUBLEWORD |
| 291 | #define TYPEERASE_SECTORS FLASH_TYPEERASE_SECTORS |
399 | #define TYPEERASE_SECTORS FLASH_TYPEERASE_SECTORS |
| Line 353... | Line 461... | ||
| 353 | #define OB_RAM_PARITY_CHECK_RESET OB_SRAM_PARITY_RESET |
461 | #define OB_RAM_PARITY_CHECK_RESET OB_SRAM_PARITY_RESET |
| 354 | #define IS_OB_SDADC12_VDD_MONITOR IS_OB_SDACD_VDD_MONITOR |
462 | #define IS_OB_SDADC12_VDD_MONITOR IS_OB_SDACD_VDD_MONITOR |
| 355 | #define OB_RDP_LEVEL0 OB_RDP_LEVEL_0 |
463 | #define OB_RDP_LEVEL0 OB_RDP_LEVEL_0 |
| 356 | #define OB_RDP_LEVEL1 OB_RDP_LEVEL_1 |
464 | #define OB_RDP_LEVEL1 OB_RDP_LEVEL_1 |
| 357 | #define OB_RDP_LEVEL2 OB_RDP_LEVEL_2 |
465 | #define OB_RDP_LEVEL2 OB_RDP_LEVEL_2 |
| - | 466 | #if defined(STM32G0) |
|
| - | 467 | #define OB_BOOT_LOCK_DISABLE OB_BOOT_ENTRY_FORCED_NONE |
|
| - | 468 | #define OB_BOOT_LOCK_ENABLE OB_BOOT_ENTRY_FORCED_FLASH |
|
| - | 469 | #else |
|
| - | 470 | #define OB_BOOT_ENTRY_FORCED_NONE OB_BOOT_LOCK_DISABLE |
|
| - | 471 | #define OB_BOOT_ENTRY_FORCED_FLASH OB_BOOT_LOCK_ENABLE |
|
| - | 472 | #endif |
|
| - | 473 | #if defined(STM32H7) |
|
| - | 474 | #define FLASH_FLAG_SNECCE_BANK1RR FLASH_FLAG_SNECCERR_BANK1 |
|
| - | 475 | #define FLASH_FLAG_DBECCE_BANK1RR FLASH_FLAG_DBECCERR_BANK1 |
|
| - | 476 | #define FLASH_FLAG_STRBER_BANK1R FLASH_FLAG_STRBERR_BANK1 |
|
| - | 477 | #define FLASH_FLAG_SNECCE_BANK2RR FLASH_FLAG_SNECCERR_BANK2 |
|
| - | 478 | #define FLASH_FLAG_DBECCE_BANK2RR FLASH_FLAG_DBECCERR_BANK2 |
|
| - | 479 | #define FLASH_FLAG_STRBER_BANK2R FLASH_FLAG_STRBERR_BANK2 |
|
| - | 480 | #define FLASH_FLAG_WDW FLASH_FLAG_WBNE |
|
| - | 481 | #define OB_WRP_SECTOR_All OB_WRP_SECTOR_ALL |
|
| - | 482 | #endif /* STM32H7 */ |
|
| - | 483 | ||
| 358 | /** |
484 | /** |
| 359 | * @} |
485 | * @} |
| 360 | */ |
486 | */ |
| - | 487 | ||
| - | 488 | /** @defgroup HAL_JPEG_Aliased_Macros HAL JPEG Aliased Macros maintained for legacy purpose |
|
| - | 489 | * @{ |
|
| 361 | 490 | */ |
|
| - | 491 | ||
| - | 492 | #if defined(STM32H7) |
|
| - | 493 | #define __HAL_RCC_JPEG_CLK_ENABLE __HAL_RCC_JPGDECEN_CLK_ENABLE |
|
| - | 494 | #define __HAL_RCC_JPEG_CLK_DISABLE __HAL_RCC_JPGDECEN_CLK_DISABLE |
|
| - | 495 | #define __HAL_RCC_JPEG_FORCE_RESET __HAL_RCC_JPGDECRST_FORCE_RESET |
|
| - | 496 | #define __HAL_RCC_JPEG_RELEASE_RESET __HAL_RCC_JPGDECRST_RELEASE_RESET |
|
| - | 497 | #define __HAL_RCC_JPEG_CLK_SLEEP_ENABLE __HAL_RCC_JPGDEC_CLK_SLEEP_ENABLE |
|
| - | 498 | #define __HAL_RCC_JPEG_CLK_SLEEP_DISABLE __HAL_RCC_JPGDEC_CLK_SLEEP_DISABLE |
|
| - | 499 | #endif /* STM32H7 */ |
|
| - | 500 | ||
| - | 501 | /** |
|
| - | 502 | * @} |
|
| - | 503 | */ |
|
| - | 504 | ||
| 362 | /** @defgroup HAL_SYSCFG_Aliased_Defines HAL SYSCFG Aliased Defines maintained for legacy purpose |
505 | /** @defgroup HAL_SYSCFG_Aliased_Defines HAL SYSCFG Aliased Defines maintained for legacy purpose |
| 363 | * @{ |
506 | * @{ |
| 364 | */ |
507 | */ |
| 365 | 508 | ||
| 366 | #define HAL_SYSCFG_FASTMODEPLUS_I2C_PA9 I2C_FASTMODEPLUS_PA9 |
509 | #define HAL_SYSCFG_FASTMODEPLUS_I2C_PA9 I2C_FASTMODEPLUS_PA9 |
| 367 | #define HAL_SYSCFG_FASTMODEPLUS_I2C_PA10 I2C_FASTMODEPLUS_PA10 |
510 | #define HAL_SYSCFG_FASTMODEPLUS_I2C_PA10 I2C_FASTMODEPLUS_PA10 |
| 368 | #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB6 I2C_FASTMODEPLUS_PB6 |
511 | #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB6 I2C_FASTMODEPLUS_PB6 |
| 369 | #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB7 I2C_FASTMODEPLUS_PB7 |
512 | #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB7 I2C_FASTMODEPLUS_PB7 |
| 370 | #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB8 I2C_FASTMODEPLUS_PB8 |
513 | #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB8 I2C_FASTMODEPLUS_PB8 |
| 371 | #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB9 I2C_FASTMODEPLUS_PB9 |
514 | #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB9 I2C_FASTMODEPLUS_PB9 |
| 372 | #define HAL_SYSCFG_FASTMODEPLUS_I2C1 I2C_FASTMODEPLUS_I2C1 |
515 | #define HAL_SYSCFG_FASTMODEPLUS_I2C1 I2C_FASTMODEPLUS_I2C1 |
| 373 | #define HAL_SYSCFG_FASTMODEPLUS_I2C2 I2C_FASTMODEPLUS_I2C2 |
516 | #define HAL_SYSCFG_FASTMODEPLUS_I2C2 I2C_FASTMODEPLUS_I2C2 |
| 374 | #define HAL_SYSCFG_FASTMODEPLUS_I2C3 I2C_FASTMODEPLUS_I2C3 |
517 | #define HAL_SYSCFG_FASTMODEPLUS_I2C3 I2C_FASTMODEPLUS_I2C3 |
| - | 518 | #if defined(STM32G4) |
|
| - | 519 | ||
| - | 520 | #define HAL_SYSCFG_EnableIOAnalogSwitchBooster HAL_SYSCFG_EnableIOSwitchBooster |
|
| - | 521 | #define HAL_SYSCFG_DisableIOAnalogSwitchBooster HAL_SYSCFG_DisableIOSwitchBooster |
|
| - | 522 | #define HAL_SYSCFG_EnableIOAnalogSwitchVDD HAL_SYSCFG_EnableIOSwitchVDD |
|
| - | 523 | #define HAL_SYSCFG_DisableIOAnalogSwitchVDD HAL_SYSCFG_DisableIOSwitchVDD |
|
| - | 524 | #endif /* STM32G4 */ |
|
| 375 | /** |
525 | /** |
| 376 | * @} |
526 | * @} |
| 377 | */ |
527 | */ |
| 378 | 528 | ||
| 379 | 529 | ||
| 380 | /** @defgroup LL_FMC_Aliased_Defines LL FMC Aliased Defines maintained for compatibility purpose |
530 | /** @defgroup LL_FMC_Aliased_Defines LL FMC Aliased Defines maintained for compatibility purpose |
| 381 | * @{ |
531 | * @{ |
| 382 | */ |
532 | */ |
| 383 | #if defined(STM32L4) || defined(STM32F7) |
533 | #if defined(STM32L4) || defined(STM32F7) || defined(STM32H7) || defined(STM32G4) |
| 384 | #define FMC_NAND_PCC_WAIT_FEATURE_DISABLE FMC_NAND_WAIT_FEATURE_DISABLE |
534 | #define FMC_NAND_PCC_WAIT_FEATURE_DISABLE FMC_NAND_WAIT_FEATURE_DISABLE |
| 385 | #define FMC_NAND_PCC_WAIT_FEATURE_ENABLE FMC_NAND_WAIT_FEATURE_ENABLE |
535 | #define FMC_NAND_PCC_WAIT_FEATURE_ENABLE FMC_NAND_WAIT_FEATURE_ENABLE |
| 386 | #define FMC_NAND_PCC_MEM_BUS_WIDTH_8 FMC_NAND_MEM_BUS_WIDTH_8 |
536 | #define FMC_NAND_PCC_MEM_BUS_WIDTH_8 FMC_NAND_MEM_BUS_WIDTH_8 |
| 387 | #define FMC_NAND_PCC_MEM_BUS_WIDTH_16 FMC_NAND_MEM_BUS_WIDTH_16 |
537 | #define FMC_NAND_PCC_MEM_BUS_WIDTH_16 FMC_NAND_MEM_BUS_WIDTH_16 |
| 388 | #else |
- | |
| - | 538 | #elif defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) |
|
| 389 | #define FMC_NAND_WAIT_FEATURE_DISABLE FMC_NAND_PCC_WAIT_FEATURE_DISABLE |
539 | #define FMC_NAND_WAIT_FEATURE_DISABLE FMC_NAND_PCC_WAIT_FEATURE_DISABLE |
| 390 | #define FMC_NAND_WAIT_FEATURE_ENABLE FMC_NAND_PCC_WAIT_FEATURE_ENABLE |
540 | #define FMC_NAND_WAIT_FEATURE_ENABLE FMC_NAND_PCC_WAIT_FEATURE_ENABLE |
| 391 | #define FMC_NAND_MEM_BUS_WIDTH_8 FMC_NAND_PCC_MEM_BUS_WIDTH_8 |
541 | #define FMC_NAND_MEM_BUS_WIDTH_8 FMC_NAND_PCC_MEM_BUS_WIDTH_8 |
| 392 | #define FMC_NAND_MEM_BUS_WIDTH_16 FMC_NAND_PCC_MEM_BUS_WIDTH_16 |
542 | #define FMC_NAND_MEM_BUS_WIDTH_16 FMC_NAND_PCC_MEM_BUS_WIDTH_16 |
| 393 | #endif |
543 | #endif |
| Line 396... | Line 546... | ||
| 396 | */ |
546 | */ |
| 397 | 547 | ||
| 398 | /** @defgroup LL_FSMC_Aliased_Defines LL FSMC Aliased Defines maintained for legacy purpose |
548 | /** @defgroup LL_FSMC_Aliased_Defines LL FSMC Aliased Defines maintained for legacy purpose |
| 399 | * @{ |
549 | * @{ |
| 400 | */ |
550 | */ |
| 401 | 551 | ||
| 402 | #define FSMC_NORSRAM_TYPEDEF FSMC_NORSRAM_TypeDef |
552 | #define FSMC_NORSRAM_TYPEDEF FSMC_NORSRAM_TypeDef |
| 403 | #define FSMC_NORSRAM_EXTENDED_TYPEDEF FSMC_NORSRAM_EXTENDED_TypeDef |
553 | #define FSMC_NORSRAM_EXTENDED_TYPEDEF FSMC_NORSRAM_EXTENDED_TypeDef |
| 404 | /** |
554 | /** |
| 405 | * @} |
555 | * @} |
| 406 | */ |
556 | */ |
| Line 424... | Line 574... | ||
| 424 | #if defined(STM32L4) |
574 | #if defined(STM32L4) |
| 425 | #define GPIO_AF12_SDIO GPIO_AF12_SDMMC1 |
575 | #define GPIO_AF12_SDIO GPIO_AF12_SDMMC1 |
| 426 | #define GPIO_AF12_SDMMC GPIO_AF12_SDMMC1 |
576 | #define GPIO_AF12_SDMMC GPIO_AF12_SDMMC1 |
| 427 | #endif |
577 | #endif |
| 428 | 578 | ||
| - | 579 | #if defined(STM32H7) |
|
| - | 580 | #define GPIO_AF7_SDIO1 GPIO_AF7_SDMMC1 |
|
| - | 581 | #define GPIO_AF8_SDIO1 GPIO_AF8_SDMMC1 |
|
| - | 582 | #define GPIO_AF12_SDIO1 GPIO_AF12_SDMMC1 |
|
| - | 583 | #define GPIO_AF9_SDIO2 GPIO_AF9_SDMMC2 |
|
| - | 584 | #define GPIO_AF10_SDIO2 GPIO_AF10_SDMMC2 |
|
| - | 585 | #define GPIO_AF11_SDIO2 GPIO_AF11_SDMMC2 |
|
| - | 586 | ||
| - | 587 | #if defined (STM32H743xx) || defined (STM32H753xx) || defined (STM32H750xx) || defined (STM32H742xx) || \ |
|
| - | 588 | defined (STM32H745xx) || defined (STM32H755xx) || defined (STM32H747xx) || defined (STM32H757xx) |
|
| - | 589 | #define GPIO_AF10_OTG2_HS GPIO_AF10_OTG2_FS |
|
| - | 590 | #define GPIO_AF10_OTG1_FS GPIO_AF10_OTG1_HS |
|
| - | 591 | #define GPIO_AF12_OTG2_FS GPIO_AF12_OTG1_FS |
|
| - | 592 | #endif /*STM32H743xx || STM32H753xx || STM32H750xx || STM32H742xx || STM32H745xx || STM32H755xx || STM32H747xx || STM32H757xx */ |
|
| - | 593 | #endif /* STM32H7 */ |
|
| - | 594 | ||
| 429 | #define GPIO_AF0_LPTIM GPIO_AF0_LPTIM1 |
595 | #define GPIO_AF0_LPTIM GPIO_AF0_LPTIM1 |
| 430 | #define GPIO_AF1_LPTIM GPIO_AF1_LPTIM1 |
596 | #define GPIO_AF1_LPTIM GPIO_AF1_LPTIM1 |
| 431 | #define GPIO_AF2_LPTIM GPIO_AF2_LPTIM1 |
597 | #define GPIO_AF2_LPTIM GPIO_AF2_LPTIM1 |
| 432 | 598 | ||
| 433 | #if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) |
599 | #if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) || defined(STM32G4) || defined(STM32H7) |
| 434 | #define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW |
600 | #define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW |
| 435 | #define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM |
601 | #define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM |
| 436 | #define GPIO_SPEED_FAST GPIO_SPEED_FREQ_HIGH |
602 | #define GPIO_SPEED_FAST GPIO_SPEED_FREQ_HIGH |
| 437 | #define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH |
603 | #define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH |
| 438 | #endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 */ |
604 | #endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 || STM32G4 || STM32H7*/ |
| 439 | 605 | ||
| 440 | #if defined(STM32L1) |
606 | #if defined(STM32L1) |
| 441 | #define GPIO_SPEED_VERY_LOW GPIO_SPEED_FREQ_LOW |
607 | #define GPIO_SPEED_VERY_LOW GPIO_SPEED_FREQ_LOW |
| 442 | #define GPIO_SPEED_LOW GPIO_SPEED_FREQ_MEDIUM |
608 | #define GPIO_SPEED_LOW GPIO_SPEED_FREQ_MEDIUM |
| 443 | #define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_HIGH |
609 | #define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_HIGH |
| 444 | #define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH |
610 | #define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH |
| 445 | #endif /* STM32L1 */ |
611 | #endif /* STM32L1 */ |
| 446 | 612 | ||
| 447 | #if defined(STM32F0) || defined(STM32F3) || defined(STM32F1) |
613 | #if defined(STM32F0) || defined(STM32F3) || defined(STM32F1) |
| 448 | #define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW |
614 | #define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW |
| 449 | #define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM |
615 | #define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM |
| Line 465... | Line 631... | ||
| 465 | #define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV6 |
631 | #define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV6 |
| 466 | #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_DEEV7 |
632 | #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_DEEV7 |
| 467 | #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_DEEV7 |
633 | #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_DEEV7 |
| 468 | #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV7 |
634 | #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV7 |
| 469 | #define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV7 |
635 | #define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV7 |
| 470 | 636 | ||
| 471 | #define __HAL_HRTIM_SetCounter __HAL_HRTIM_SETCOUNTER |
637 | #define __HAL_HRTIM_SetCounter __HAL_HRTIM_SETCOUNTER |
| 472 | #define __HAL_HRTIM_GetCounter __HAL_HRTIM_GETCOUNTER |
638 | #define __HAL_HRTIM_GetCounter __HAL_HRTIM_GETCOUNTER |
| 473 | #define __HAL_HRTIM_SetPeriod __HAL_HRTIM_SETPERIOD |
639 | #define __HAL_HRTIM_SetPeriod __HAL_HRTIM_SETPERIOD |
| 474 | #define __HAL_HRTIM_GetPeriod __HAL_HRTIM_GETPERIOD |
640 | #define __HAL_HRTIM_GetPeriod __HAL_HRTIM_GETPERIOD |
| 475 | #define __HAL_HRTIM_SetClockPrescaler __HAL_HRTIM_SETCLOCKPRESCALER |
641 | #define __HAL_HRTIM_SetClockPrescaler __HAL_HRTIM_SETCLOCKPRESCALER |
| 476 | #define __HAL_HRTIM_GetClockPrescaler __HAL_HRTIM_GETCLOCKPRESCALER |
642 | #define __HAL_HRTIM_GetClockPrescaler __HAL_HRTIM_GETCLOCKPRESCALER |
| 477 | #define __HAL_HRTIM_SetCompare __HAL_HRTIM_SETCOMPARE |
643 | #define __HAL_HRTIM_SetCompare __HAL_HRTIM_SETCOMPARE |
| 478 | #define __HAL_HRTIM_GetCompare __HAL_HRTIM_GETCOMPARE |
644 | #define __HAL_HRTIM_GetCompare __HAL_HRTIM_GETCOMPARE |
| - | 645 | ||
| - | 646 | #if defined(STM32G4) |
|
| - | 647 | #define HAL_HRTIM_ExternalEventCounterConfig HAL_HRTIM_ExtEventCounterConfig |
|
| - | 648 | #define HAL_HRTIM_ExternalEventCounterEnable HAL_HRTIM_ExtEventCounterEnable |
|
| - | 649 | #define HAL_HRTIM_ExternalEventCounterDisable HAL_HRTIM_ExtEventCounterDisable |
|
| - | 650 | #define HAL_HRTIM_ExternalEventCounterReset HAL_HRTIM_ExtEventCounterReset |
|
| - | 651 | #define HRTIM_TIMEEVENT_A HRTIM_EVENTCOUNTER_A |
|
| - | 652 | #define HRTIM_TIMEEVENT_B HRTIM_EVENTCOUNTER_B |
|
| - | 653 | #define HRTIM_TIMEEVENTRESETMODE_UNCONDITIONAL HRTIM_EVENTCOUNTER_RSTMODE_UNCONDITIONAL |
|
| - | 654 | #define HRTIM_TIMEEVENTRESETMODE_CONDITIONAL HRTIM_EVENTCOUNTER_RSTMODE_CONDITIONAL |
|
| - | 655 | #endif /* STM32G4 */ |
|
| - | 656 | ||
| - | 657 | #if defined(STM32H7) |
|
| - | 658 | #define HRTIM_OUTPUTSET_TIMAEV1_TIMBCMP1 HRTIM_OUTPUTSET_TIMEV_1 |
|
| - | 659 | #define HRTIM_OUTPUTSET_TIMAEV2_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_2 |
|
| - | 660 | #define HRTIM_OUTPUTSET_TIMAEV3_TIMCCMP2 HRTIM_OUTPUTSET_TIMEV_3 |
|
| - | 661 | #define HRTIM_OUTPUTSET_TIMAEV4_TIMCCMP3 HRTIM_OUTPUTSET_TIMEV_4 |
|
| - | 662 | #define HRTIM_OUTPUTSET_TIMAEV5_TIMDCMP1 HRTIM_OUTPUTSET_TIMEV_5 |
|
| - | 663 | #define HRTIM_OUTPUTSET_TIMAEV6_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_6 |
|
| - | 664 | #define HRTIM_OUTPUTSET_TIMAEV7_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_7 |
|
| - | 665 | #define HRTIM_OUTPUTSET_TIMAEV8_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_8 |
|
| - | 666 | #define HRTIM_OUTPUTSET_TIMAEV9_TIMFCMP4 HRTIM_OUTPUTSET_TIMEV_9 |
|
| - | 667 | #define HRTIM_OUTPUTSET_TIMBEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1 |
|
| - | 668 | #define HRTIM_OUTPUTSET_TIMBEV2_TIMACMP2 HRTIM_OUTPUTSET_TIMEV_2 |
|
| - | 669 | #define HRTIM_OUTPUTSET_TIMBEV3_TIMCCMP3 HRTIM_OUTPUTSET_TIMEV_3 |
|
| - | 670 | #define HRTIM_OUTPUTSET_TIMBEV4_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_4 |
|
| - | 671 | #define HRTIM_OUTPUTSET_TIMBEV5_TIMDCMP3 HRTIM_OUTPUTSET_TIMEV_5 |
|
| - | 672 | #define HRTIM_OUTPUTSET_TIMBEV6_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_6 |
|
| - | 673 | #define HRTIM_OUTPUTSET_TIMBEV7_TIMECMP1 HRTIM_OUTPUTSET_TIMEV_7 |
|
| - | 674 | #define HRTIM_OUTPUTSET_TIMBEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8 |
|
| - | 675 | #define HRTIM_OUTPUTSET_TIMBEV9_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_9 |
|
| - | 676 | #define HRTIM_OUTPUTSET_TIMCEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1 |
|
| - | 677 | #define HRTIM_OUTPUTSET_TIMCEV2_TIMACMP2 HRTIM_OUTPUTSET_TIMEV_2 |
|
| - | 678 | #define HRTIM_OUTPUTSET_TIMCEV3_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_3 |
|
| - | 679 | #define HRTIM_OUTPUTSET_TIMCEV4_TIMBCMP3 HRTIM_OUTPUTSET_TIMEV_4 |
|
| - | 680 | #define HRTIM_OUTPUTSET_TIMCEV5_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_5 |
|
| - | 681 | #define HRTIM_OUTPUTSET_TIMCEV6_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_6 |
|
| - | 682 | #define HRTIM_OUTPUTSET_TIMCEV7_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_7 |
|
| - | 683 | #define HRTIM_OUTPUTSET_TIMCEV8_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_8 |
|
| - | 684 | #define HRTIM_OUTPUTSET_TIMCEV9_TIMFCMP2 HRTIM_OUTPUTSET_TIMEV_9 |
|
| - | 685 | #define HRTIM_OUTPUTSET_TIMDEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1 |
|
| - | 686 | #define HRTIM_OUTPUTSET_TIMDEV2_TIMACMP4 HRTIM_OUTPUTSET_TIMEV_2 |
|
| - | 687 | #define HRTIM_OUTPUTSET_TIMDEV3_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_3 |
|
| - | 688 | #define HRTIM_OUTPUTSET_TIMDEV4_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_4 |
|
| - | 689 | #define HRTIM_OUTPUTSET_TIMDEV5_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_5 |
|
| - | 690 | #define HRTIM_OUTPUTSET_TIMDEV6_TIMECMP1 HRTIM_OUTPUTSET_TIMEV_6 |
|
| - | 691 | #define HRTIM_OUTPUTSET_TIMDEV7_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_7 |
|
| - | 692 | #define HRTIM_OUTPUTSET_TIMDEV8_TIMFCMP1 HRTIM_OUTPUTSET_TIMEV_8 |
|
| - | 693 | #define HRTIM_OUTPUTSET_TIMDEV9_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_9 |
|
| - | 694 | #define HRTIM_OUTPUTSET_TIMEEV1_TIMACMP4 HRTIM_OUTPUTSET_TIMEV_1 |
|
| - | 695 | #define HRTIM_OUTPUTSET_TIMEEV2_TIMBCMP3 HRTIM_OUTPUTSET_TIMEV_2 |
|
| - | 696 | #define HRTIM_OUTPUTSET_TIMEEV3_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_3 |
|
| - | 697 | #define HRTIM_OUTPUTSET_TIMEEV4_TIMCCMP1 HRTIM_OUTPUTSET_TIMEV_4 |
|
| - | 698 | #define HRTIM_OUTPUTSET_TIMEEV5_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_5 |
|
| - | 699 | #define HRTIM_OUTPUTSET_TIMEEV6_TIMDCMP1 HRTIM_OUTPUTSET_TIMEV_6 |
|
| - | 700 | #define HRTIM_OUTPUTSET_TIMEEV7_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_7 |
|
| - | 701 | #define HRTIM_OUTPUTSET_TIMEEV8_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_8 |
|
| - | 702 | #define HRTIM_OUTPUTSET_TIMEEV9_TIMFCMP4 HRTIM_OUTPUTSET_TIMEV_9 |
|
| - | 703 | #define HRTIM_OUTPUTSET_TIMFEV1_TIMACMP3 HRTIM_OUTPUTSET_TIMEV_1 |
|
| - | 704 | #define HRTIM_OUTPUTSET_TIMFEV2_TIMBCMP1 HRTIM_OUTPUTSET_TIMEV_2 |
|
| - | 705 | #define HRTIM_OUTPUTSET_TIMFEV3_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_3 |
|
| - | 706 | #define HRTIM_OUTPUTSET_TIMFEV4_TIMCCMP1 HRTIM_OUTPUTSET_TIMEV_4 |
|
| - | 707 | #define HRTIM_OUTPUTSET_TIMFEV5_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_5 |
|
| - | 708 | #define HRTIM_OUTPUTSET_TIMFEV6_TIMDCMP3 HRTIM_OUTPUTSET_TIMEV_6 |
|
| - | 709 | #define HRTIM_OUTPUTSET_TIMFEV7_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_7 |
|
| - | 710 | #define HRTIM_OUTPUTSET_TIMFEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8 |
|
| - | 711 | #define HRTIM_OUTPUTSET_TIMFEV9_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_9 |
|
| - | 712 | ||
| - | 713 | #define HRTIM_OUTPUTRESET_TIMAEV1_TIMBCMP1 HRTIM_OUTPUTSET_TIMEV_1 |
|
| - | 714 | #define HRTIM_OUTPUTRESET_TIMAEV2_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_2 |
|
| - | 715 | #define HRTIM_OUTPUTRESET_TIMAEV3_TIMCCMP2 HRTIM_OUTPUTSET_TIMEV_3 |
|
| - | 716 | #define HRTIM_OUTPUTRESET_TIMAEV4_TIMCCMP3 HRTIM_OUTPUTSET_TIMEV_4 |
|
| - | 717 | #define HRTIM_OUTPUTRESET_TIMAEV5_TIMDCMP1 HRTIM_OUTPUTSET_TIMEV_5 |
|
| - | 718 | #define HRTIM_OUTPUTRESET_TIMAEV6_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_6 |
|
| - | 719 | #define HRTIM_OUTPUTRESET_TIMAEV7_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_7 |
|
| - | 720 | #define HRTIM_OUTPUTRESET_TIMAEV8_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_8 |
|
| - | 721 | #define HRTIM_OUTPUTRESET_TIMAEV9_TIMFCMP4 HRTIM_OUTPUTSET_TIMEV_9 |
|
| - | 722 | #define HRTIM_OUTPUTRESET_TIMBEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1 |
|
| - | 723 | #define HRTIM_OUTPUTRESET_TIMBEV2_TIMACMP2 HRTIM_OUTPUTSET_TIMEV_2 |
|
| - | 724 | #define HRTIM_OUTPUTRESET_TIMBEV3_TIMCCMP3 HRTIM_OUTPUTSET_TIMEV_3 |
|
| - | 725 | #define HRTIM_OUTPUTRESET_TIMBEV4_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_4 |
|
| - | 726 | #define HRTIM_OUTPUTRESET_TIMBEV5_TIMDCMP3 HRTIM_OUTPUTSET_TIMEV_5 |
|
| - | 727 | #define HRTIM_OUTPUTRESET_TIMBEV6_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_6 |
|
| - | 728 | #define HRTIM_OUTPUTRESET_TIMBEV7_TIMECMP1 HRTIM_OUTPUTSET_TIMEV_7 |
|
| - | 729 | #define HRTIM_OUTPUTRESET_TIMBEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8 |
|
| - | 730 | #define HRTIM_OUTPUTRESET_TIMBEV9_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_9 |
|
| - | 731 | #define HRTIM_OUTPUTRESET_TIMCEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1 |
|
| - | 732 | #define HRTIM_OUTPUTRESET_TIMCEV2_TIMACMP2 HRTIM_OUTPUTSET_TIMEV_2 |
|
| - | 733 | #define HRTIM_OUTPUTRESET_TIMCEV3_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_3 |
|
| - | 734 | #define HRTIM_OUTPUTRESET_TIMCEV4_TIMBCMP3 HRTIM_OUTPUTSET_TIMEV_4 |
|
| - | 735 | #define HRTIM_OUTPUTRESET_TIMCEV5_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_5 |
|
| - | 736 | #define HRTIM_OUTPUTRESET_TIMCEV6_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_6 |
|
| - | 737 | #define HRTIM_OUTPUTRESET_TIMCEV7_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_7 |
|
| - | 738 | #define HRTIM_OUTPUTRESET_TIMCEV8_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_8 |
|
| - | 739 | #define HRTIM_OUTPUTRESET_TIMCEV9_TIMFCMP2 HRTIM_OUTPUTSET_TIMEV_9 |
|
| - | 740 | #define HRTIM_OUTPUTRESET_TIMDEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1 |
|
| - | 741 | #define HRTIM_OUTPUTRESET_TIMDEV2_TIMACMP4 HRTIM_OUTPUTSET_TIMEV_2 |
|
| - | 742 | #define HRTIM_OUTPUTRESET_TIMDEV3_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_3 |
|
| - | 743 | #define HRTIM_OUTPUTRESET_TIMDEV4_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_4 |
|
| - | 744 | #define HRTIM_OUTPUTRESET_TIMDEV5_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_5 |
|
| - | 745 | #define HRTIM_OUTPUTRESET_TIMDEV6_TIMECMP1 HRTIM_OUTPUTSET_TIMEV_6 |
|
| - | 746 | #define HRTIM_OUTPUTRESET_TIMDEV7_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_7 |
|
| - | 747 | #define HRTIM_OUTPUTRESET_TIMDEV8_TIMFCMP1 HRTIM_OUTPUTSET_TIMEV_8 |
|
| - | 748 | #define HRTIM_OUTPUTRESET_TIMDEV9_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_9 |
|
| - | 749 | #define HRTIM_OUTPUTRESET_TIMEEV1_TIMACMP4 HRTIM_OUTPUTSET_TIMEV_1 |
|
| - | 750 | #define HRTIM_OUTPUTRESET_TIMEEV2_TIMBCMP3 HRTIM_OUTPUTSET_TIMEV_2 |
|
| - | 751 | #define HRTIM_OUTPUTRESET_TIMEEV3_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_3 |
|
| - | 752 | #define HRTIM_OUTPUTRESET_TIMEEV4_TIMCCMP1 HRTIM_OUTPUTSET_TIMEV_4 |
|
| - | 753 | #define HRTIM_OUTPUTRESET_TIMEEV5_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_5 |
|
| - | 754 | #define HRTIM_OUTPUTRESET_TIMEEV6_TIMDCMP1 HRTIM_OUTPUTSET_TIMEV_6 |
|
| - | 755 | #define HRTIM_OUTPUTRESET_TIMEEV7_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_7 |
|
| - | 756 | #define HRTIM_OUTPUTRESET_TIMEEV8_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_8 |
|
| - | 757 | #define HRTIM_OUTPUTRESET_TIMEEV9_TIMFCMP4 HRTIM_OUTPUTSET_TIMEV_9 |
|
| - | 758 | #define HRTIM_OUTPUTRESET_TIMFEV1_TIMACMP3 HRTIM_OUTPUTSET_TIMEV_1 |
|
| - | 759 | #define HRTIM_OUTPUTRESET_TIMFEV2_TIMBCMP1 HRTIM_OUTPUTSET_TIMEV_2 |
|
| - | 760 | #define HRTIM_OUTPUTRESET_TIMFEV3_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_3 |
|
| - | 761 | #define HRTIM_OUTPUTRESET_TIMFEV4_TIMCCMP1 HRTIM_OUTPUTSET_TIMEV_4 |
|
| - | 762 | #define HRTIM_OUTPUTRESET_TIMFEV5_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_5 |
|
| - | 763 | #define HRTIM_OUTPUTRESET_TIMFEV6_TIMDCMP3 HRTIM_OUTPUTSET_TIMEV_6 |
|
| - | 764 | #define HRTIM_OUTPUTRESET_TIMFEV7_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_7 |
|
| - | 765 | #define HRTIM_OUTPUTRESET_TIMFEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8 |
|
| - | 766 | #define HRTIM_OUTPUTRESET_TIMFEV9_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_9 |
|
| - | 767 | #endif /* STM32H7 */ |
|
| - | 768 | ||
| - | 769 | #if defined(STM32F3) |
|
| - | 770 | /** @brief Constants defining available sources associated to external events. |
|
| - | 771 | */ |
|
| - | 772 | #define HRTIM_EVENTSRC_1 (0x00000000U) |
|
| - | 773 | #define HRTIM_EVENTSRC_2 (HRTIM_EECR1_EE1SRC_0) |
|
| - | 774 | #define HRTIM_EVENTSRC_3 (HRTIM_EECR1_EE1SRC_1) |
|
| - | 775 | #define HRTIM_EVENTSRC_4 (HRTIM_EECR1_EE1SRC_1 | HRTIM_EECR1_EE1SRC_0) |
|
| - | 776 | ||
| - | 777 | /** @brief Constants defining the events that can be selected to configure the |
|
| - | 778 | * set/reset crossbar of a timer output |
|
| - | 779 | */ |
|
| - | 780 | #define HRTIM_OUTPUTSET_TIMEV_1 (HRTIM_SET1R_TIMEVNT1) |
|
| - | 781 | #define HRTIM_OUTPUTSET_TIMEV_2 (HRTIM_SET1R_TIMEVNT2) |
|
| - | 782 | #define HRTIM_OUTPUTSET_TIMEV_3 (HRTIM_SET1R_TIMEVNT3) |
|
| - | 783 | #define HRTIM_OUTPUTSET_TIMEV_4 (HRTIM_SET1R_TIMEVNT4) |
|
| - | 784 | #define HRTIM_OUTPUTSET_TIMEV_5 (HRTIM_SET1R_TIMEVNT5) |
|
| - | 785 | #define HRTIM_OUTPUTSET_TIMEV_6 (HRTIM_SET1R_TIMEVNT6) |
|
| - | 786 | #define HRTIM_OUTPUTSET_TIMEV_7 (HRTIM_SET1R_TIMEVNT7) |
|
| - | 787 | #define HRTIM_OUTPUTSET_TIMEV_8 (HRTIM_SET1R_TIMEVNT8) |
|
| - | 788 | #define HRTIM_OUTPUTSET_TIMEV_9 (HRTIM_SET1R_TIMEVNT9) |
|
| - | 789 | ||
| - | 790 | #define HRTIM_OUTPUTRESET_TIMEV_1 (HRTIM_RST1R_TIMEVNT1) |
|
| - | 791 | #define HRTIM_OUTPUTRESET_TIMEV_2 (HRTIM_RST1R_TIMEVNT2) |
|
| - | 792 | #define HRTIM_OUTPUTRESET_TIMEV_3 (HRTIM_RST1R_TIMEVNT3) |
|
| - | 793 | #define HRTIM_OUTPUTRESET_TIMEV_4 (HRTIM_RST1R_TIMEVNT4) |
|
| - | 794 | #define HRTIM_OUTPUTRESET_TIMEV_5 (HRTIM_RST1R_TIMEVNT5) |
|
| - | 795 | #define HRTIM_OUTPUTRESET_TIMEV_6 (HRTIM_RST1R_TIMEVNT6) |
|
| - | 796 | #define HRTIM_OUTPUTRESET_TIMEV_7 (HRTIM_RST1R_TIMEVNT7) |
|
| - | 797 | #define HRTIM_OUTPUTRESET_TIMEV_8 (HRTIM_RST1R_TIMEVNT8) |
|
| - | 798 | #define HRTIM_OUTPUTRESET_TIMEV_9 (HRTIM_RST1R_TIMEVNT9) |
|
| - | 799 | ||
| - | 800 | /** @brief Constants defining the event filtering applied to external events |
|
| - | 801 | * by a timer |
|
| - | 802 | */ |
|
| - | 803 | #define HRTIM_TIMEVENTFILTER_NONE (0x00000000U) |
|
| - | 804 | #define HRTIM_TIMEVENTFILTER_BLANKINGCMP1 (HRTIM_EEFR1_EE1FLTR_0) |
|
| - | 805 | #define HRTIM_TIMEVENTFILTER_BLANKINGCMP2 (HRTIM_EEFR1_EE1FLTR_1) |
|
| - | 806 | #define HRTIM_TIMEVENTFILTER_BLANKINGCMP3 (HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0) |
|
| - | 807 | #define HRTIM_TIMEVENTFILTER_BLANKINGCMP4 (HRTIM_EEFR1_EE1FLTR_2) |
|
| - | 808 | #define HRTIM_TIMEVENTFILTER_BLANKINGFLTR1 (HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_0) |
|
| - | 809 | #define HRTIM_TIMEVENTFILTER_BLANKINGFLTR2 (HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1) |
|
| - | 810 | #define HRTIM_TIMEVENTFILTER_BLANKINGFLTR3 (HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0) |
|
| - | 811 | #define HRTIM_TIMEVENTFILTER_BLANKINGFLTR4 (HRTIM_EEFR1_EE1FLTR_3) |
|
| - | 812 | #define HRTIM_TIMEVENTFILTER_BLANKINGFLTR5 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_0) |
|
| - | 813 | #define HRTIM_TIMEVENTFILTER_BLANKINGFLTR6 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_1) |
|
| - | 814 | #define HRTIM_TIMEVENTFILTER_BLANKINGFLTR7 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0) |
|
| - | 815 | #define HRTIM_TIMEVENTFILTER_BLANKINGFLTR8 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2) |
|
| - | 816 | #define HRTIM_TIMEVENTFILTER_WINDOWINGCMP2 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_0) |
|
| - | 817 | #define HRTIM_TIMEVENTFILTER_WINDOWINGCMP3 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1) |
|
| - | 818 | #define HRTIM_TIMEVENTFILTER_WINDOWINGTIM (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0) |
|
| - | 819 | ||
| - | 820 | /** @brief Constants defining the DLL calibration periods (in micro seconds) |
|
| - | 821 | */ |
|
| - | 822 | #define HRTIM_CALIBRATIONRATE_7300 0x00000000U |
|
| - | 823 | #define HRTIM_CALIBRATIONRATE_910 (HRTIM_DLLCR_CALRTE_0) |
|
| - | 824 | #define HRTIM_CALIBRATIONRATE_114 (HRTIM_DLLCR_CALRTE_1) |
|
| - | 825 | #define HRTIM_CALIBRATIONRATE_14 (HRTIM_DLLCR_CALRTE_1 | HRTIM_DLLCR_CALRTE_0) |
|
| - | 826 | ||
| - | 827 | #endif /* STM32F3 */ |
|
| 479 | /** |
828 | /** |
| 480 | * @} |
829 | * @} |
| 481 | */ |
830 | */ |
| 482 | 831 | ||
| 483 | /** @defgroup HAL_I2C_Aliased_Defines HAL I2C Aliased Defines maintained for legacy purpose |
832 | /** @defgroup HAL_I2C_Aliased_Defines HAL I2C Aliased Defines maintained for legacy purpose |
| Line 538... | Line 887... | ||
| 538 | #define LPTIM_CLOCKPOLARITY_BOTHEDGES LPTIM_CLOCKPOLARITY_RISING_FALLING |
887 | #define LPTIM_CLOCKPOLARITY_BOTHEDGES LPTIM_CLOCKPOLARITY_RISING_FALLING |
| 539 | 888 | ||
| 540 | #define LPTIM_TRIGSAMPLETIME_DIRECTTRANSISTION LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION |
889 | #define LPTIM_TRIGSAMPLETIME_DIRECTTRANSISTION LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION |
| 541 | #define LPTIM_TRIGSAMPLETIME_2TRANSISTIONS LPTIM_TRIGSAMPLETIME_2TRANSITIONS |
890 | #define LPTIM_TRIGSAMPLETIME_2TRANSISTIONS LPTIM_TRIGSAMPLETIME_2TRANSITIONS |
| 542 | #define LPTIM_TRIGSAMPLETIME_4TRANSISTIONS LPTIM_TRIGSAMPLETIME_4TRANSITIONS |
891 | #define LPTIM_TRIGSAMPLETIME_4TRANSISTIONS LPTIM_TRIGSAMPLETIME_4TRANSITIONS |
| 543 | #define LPTIM_TRIGSAMPLETIME_8TRANSISTIONS LPTIM_TRIGSAMPLETIME_8TRANSITIONS |
892 | #define LPTIM_TRIGSAMPLETIME_8TRANSISTIONS LPTIM_TRIGSAMPLETIME_8TRANSITIONS |
| 544 | 893 | ||
| 545 | /* The following 3 definition have also been present in a temporary version of lptim.h */ |
894 | /* The following 3 definition have also been present in a temporary version of lptim.h */ |
| 546 | /* They need to be renamed also to the right name, just in case */ |
895 | /* They need to be renamed also to the right name, just in case */ |
| 547 | #define LPTIM_TRIGSAMPLETIME_2TRANSITION LPTIM_TRIGSAMPLETIME_2TRANSITIONS |
896 | #define LPTIM_TRIGSAMPLETIME_2TRANSITION LPTIM_TRIGSAMPLETIME_2TRANSITIONS |
| 548 | #define LPTIM_TRIGSAMPLETIME_4TRANSITION LPTIM_TRIGSAMPLETIME_4TRANSITIONS |
897 | #define LPTIM_TRIGSAMPLETIME_4TRANSITION LPTIM_TRIGSAMPLETIME_4TRANSITIONS |
| Line 568... | Line 917... | ||
| 568 | #define __ADDR_3rd_CYCLE ADDR_3RD_CYCLE |
917 | #define __ADDR_3rd_CYCLE ADDR_3RD_CYCLE |
| 569 | #define __ADDR_4th_CYCLE ADDR_4TH_CYCLE |
918 | #define __ADDR_4th_CYCLE ADDR_4TH_CYCLE |
| 570 | /** |
919 | /** |
| 571 | * @} |
920 | * @} |
| 572 | */ |
921 | */ |
| 573 | 922 | ||
| 574 | /** @defgroup HAL_NOR_Aliased_Defines HAL NOR Aliased Defines maintained for legacy purpose |
923 | /** @defgroup HAL_NOR_Aliased_Defines HAL NOR Aliased Defines maintained for legacy purpose |
| 575 | * @{ |
924 | * @{ |
| 576 | */ |
925 | */ |
| 577 | #define NOR_StatusTypedef HAL_NOR_StatusTypeDef |
926 | #define NOR_StatusTypedef HAL_NOR_StatusTypeDef |
| 578 | #define NOR_SUCCESS HAL_NOR_STATUS_SUCCESS |
927 | #define NOR_SUCCESS HAL_NOR_STATUS_SUCCESS |
| Line 592... | Line 941... | ||
| 592 | 941 | ||
| 593 | #define OPAMP_NONINVERTINGINPUT_VP0 OPAMP_NONINVERTINGINPUT_IO0 |
942 | #define OPAMP_NONINVERTINGINPUT_VP0 OPAMP_NONINVERTINGINPUT_IO0 |
| 594 | #define OPAMP_NONINVERTINGINPUT_VP1 OPAMP_NONINVERTINGINPUT_IO1 |
943 | #define OPAMP_NONINVERTINGINPUT_VP1 OPAMP_NONINVERTINGINPUT_IO1 |
| 595 | #define OPAMP_NONINVERTINGINPUT_VP2 OPAMP_NONINVERTINGINPUT_IO2 |
944 | #define OPAMP_NONINVERTINGINPUT_VP2 OPAMP_NONINVERTINGINPUT_IO2 |
| 596 | #define OPAMP_NONINVERTINGINPUT_VP3 OPAMP_NONINVERTINGINPUT_IO3 |
945 | #define OPAMP_NONINVERTINGINPUT_VP3 OPAMP_NONINVERTINGINPUT_IO3 |
| 597 | - | ||
| - | 946 | ||
| 598 | #define OPAMP_SEC_NONINVERTINGINPUT_VP0 OPAMP_SEC_NONINVERTINGINPUT_IO0 |
947 | #define OPAMP_SEC_NONINVERTINGINPUT_VP0 OPAMP_SEC_NONINVERTINGINPUT_IO0 |
| 599 | #define OPAMP_SEC_NONINVERTINGINPUT_VP1 OPAMP_SEC_NONINVERTINGINPUT_IO1 |
948 | #define OPAMP_SEC_NONINVERTINGINPUT_VP1 OPAMP_SEC_NONINVERTINGINPUT_IO1 |
| 600 | #define OPAMP_SEC_NONINVERTINGINPUT_VP2 OPAMP_SEC_NONINVERTINGINPUT_IO2 |
949 | #define OPAMP_SEC_NONINVERTINGINPUT_VP2 OPAMP_SEC_NONINVERTINGINPUT_IO2 |
| 601 | #define OPAMP_SEC_NONINVERTINGINPUT_VP3 OPAMP_SEC_NONINVERTINGINPUT_IO3 |
950 | #define OPAMP_SEC_NONINVERTINGINPUT_VP3 OPAMP_SEC_NONINVERTINGINPUT_IO3 |
| 602 | 951 | ||
| 603 | #define OPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0 |
952 | #define OPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0 |
| 604 | #define OPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1 |
953 | #define OPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1 |
| 605 | 954 | ||
| 606 | #define IOPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0 |
955 | #define IOPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0 |
| 607 | #define IOPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1 |
956 | #define IOPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1 |
| 608 | 957 | ||
| 609 | #define OPAMP_SEC_INVERTINGINPUT_VM0 OPAMP_SEC_INVERTINGINPUT_IO0 |
958 | #define OPAMP_SEC_INVERTINGINPUT_VM0 OPAMP_SEC_INVERTINGINPUT_IO0 |
| 610 | #define OPAMP_SEC_INVERTINGINPUT_VM1 OPAMP_SEC_INVERTINGINPUT_IO1 |
959 | #define OPAMP_SEC_INVERTINGINPUT_VM1 OPAMP_SEC_INVERTINGINPUT_IO1 |
| 611 | 960 | ||
| 612 | #define OPAMP_INVERTINGINPUT_VINM OPAMP_SEC_INVERTINGINPUT_IO1 |
961 | #define OPAMP_INVERTINGINPUT_VINM OPAMP_SEC_INVERTINGINPUT_IO1 |
| - | 962 | ||
| 613 | 963 | #define OPAMP_PGACONNECT_NO OPAMP_PGA_CONNECT_INVERTINGINPUT_NO |
|
| 614 | #define OPAMP_PGACONNECT_NO OPAMP_PGA_CONNECT_INVERTINGINPUT_NO |
964 | #define OPAMP_PGACONNECT_VM0 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0 |
| 615 | #define OPAMP_PGACONNECT_VM0 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0 |
965 | #define OPAMP_PGACONNECT_VM1 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1 |
| - | 966 | ||
| - | 967 | #if defined(STM32L1) || defined(STM32L4) || defined(STM32L5) || defined(STM32H7) || defined(STM32G4) |
|
| 616 | #define OPAMP_PGACONNECT_VM1 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1 |
968 | #define HAL_OPAMP_MSP_INIT_CB_ID HAL_OPAMP_MSPINIT_CB_ID |
| 617 | 969 | #define HAL_OPAMP_MSP_DEINIT_CB_ID HAL_OPAMP_MSPDEINIT_CB_ID |
|
| - | 970 | #endif |
|
| - | 971 | ||
| - | 972 | ||
| 618 | /** |
973 | /** |
| 619 | * @} |
974 | * @} |
| 620 | */ |
975 | */ |
| 621 | 976 | ||
| 622 | /** @defgroup HAL_I2S_Aliased_Defines HAL I2S Aliased Defines maintained for legacy purpose |
977 | /** @defgroup HAL_I2S_Aliased_Defines HAL I2S Aliased Defines maintained for legacy purpose |
| 623 | * @{ |
978 | * @{ |
| 624 | */ |
979 | */ |
| 625 | #define I2S_STANDARD_PHILLIPS I2S_STANDARD_PHILIPS |
980 | #define I2S_STANDARD_PHILLIPS I2S_STANDARD_PHILIPS |
| - | 981 | ||
| - | 982 | #if defined(STM32H7) |
|
| - | 983 | #define I2S_IT_TXE I2S_IT_TXP |
|
| - | 984 | #define I2S_IT_RXNE I2S_IT_RXP |
|
| - | 985 | ||
| - | 986 | #define I2S_FLAG_TXE I2S_FLAG_TXP |
|
| - | 987 | #define I2S_FLAG_RXNE I2S_FLAG_RXP |
|
| - | 988 | #endif |
|
| - | 989 | ||
| 626 | #if defined(STM32F7) |
990 | #if defined(STM32F7) |
| 627 | #define I2S_CLOCK_SYSCLK I2S_CLOCK_PLL |
991 | #define I2S_CLOCK_SYSCLK I2S_CLOCK_PLL |
| 628 | #endif |
992 | #endif |
| 629 | /** |
993 | /** |
| 630 | * @} |
994 | * @} |
| 631 | */ |
995 | */ |
| Line 633... | Line 997... | ||
| 633 | /** @defgroup HAL_PCCARD_Aliased_Defines HAL PCCARD Aliased Defines maintained for legacy purpose |
997 | /** @defgroup HAL_PCCARD_Aliased_Defines HAL PCCARD Aliased Defines maintained for legacy purpose |
| 634 | * @{ |
998 | * @{ |
| 635 | */ |
999 | */ |
| 636 | 1000 | ||
| 637 | /* Compact Flash-ATA registers description */ |
1001 | /* Compact Flash-ATA registers description */ |
| 638 | #define CF_DATA ATA_DATA |
1002 | #define CF_DATA ATA_DATA |
| 639 | #define CF_SECTOR_COUNT ATA_SECTOR_COUNT |
1003 | #define CF_SECTOR_COUNT ATA_SECTOR_COUNT |
| 640 | #define CF_SECTOR_NUMBER ATA_SECTOR_NUMBER |
1004 | #define CF_SECTOR_NUMBER ATA_SECTOR_NUMBER |
| 641 | #define CF_CYLINDER_LOW ATA_CYLINDER_LOW |
1005 | #define CF_CYLINDER_LOW ATA_CYLINDER_LOW |
| 642 | #define CF_CYLINDER_HIGH ATA_CYLINDER_HIGH |
1006 | #define CF_CYLINDER_HIGH ATA_CYLINDER_HIGH |
| 643 | #define CF_CARD_HEAD ATA_CARD_HEAD |
1007 | #define CF_CARD_HEAD ATA_CARD_HEAD |
| 644 | #define CF_STATUS_CMD ATA_STATUS_CMD |
1008 | #define CF_STATUS_CMD ATA_STATUS_CMD |
| 645 | #define CF_STATUS_CMD_ALTERNATE ATA_STATUS_CMD_ALTERNATE |
1009 | #define CF_STATUS_CMD_ALTERNATE ATA_STATUS_CMD_ALTERNATE |
| 646 | #define CF_COMMON_DATA_AREA ATA_COMMON_DATA_AREA |
1010 | #define CF_COMMON_DATA_AREA ATA_COMMON_DATA_AREA |
| 647 | 1011 | ||
| 648 | /* Compact Flash-ATA commands */ |
1012 | /* Compact Flash-ATA commands */ |
| 649 | #define CF_READ_SECTOR_CMD ATA_READ_SECTOR_CMD |
1013 | #define CF_READ_SECTOR_CMD ATA_READ_SECTOR_CMD |
| 650 | #define CF_WRITE_SECTOR_CMD ATA_WRITE_SECTOR_CMD |
1014 | #define CF_WRITE_SECTOR_CMD ATA_WRITE_SECTOR_CMD |
| 651 | #define CF_ERASE_SECTOR_CMD ATA_ERASE_SECTOR_CMD |
1015 | #define CF_ERASE_SECTOR_CMD ATA_ERASE_SECTOR_CMD |
| 652 | #define CF_IDENTIFY_CMD ATA_IDENTIFY_CMD |
1016 | #define CF_IDENTIFY_CMD ATA_IDENTIFY_CMD |
| 653 | 1017 | ||
| 654 | #define PCCARD_StatusTypedef HAL_PCCARD_StatusTypeDef |
1018 | #define PCCARD_StatusTypedef HAL_PCCARD_StatusTypeDef |
| Line 661... | Line 1025... | ||
| 661 | */ |
1025 | */ |
| 662 | 1026 | ||
| 663 | /** @defgroup HAL_RTC_Aliased_Defines HAL RTC Aliased Defines maintained for legacy purpose |
1027 | /** @defgroup HAL_RTC_Aliased_Defines HAL RTC Aliased Defines maintained for legacy purpose |
| 664 | * @{ |
1028 | * @{ |
| 665 | */ |
1029 | */ |
| 666 | 1030 | ||
| 667 | #define FORMAT_BIN RTC_FORMAT_BIN |
1031 | #define FORMAT_BIN RTC_FORMAT_BIN |
| 668 | #define FORMAT_BCD RTC_FORMAT_BCD |
1032 | #define FORMAT_BCD RTC_FORMAT_BCD |
| 669 | 1033 | ||
| 670 | #define RTC_ALARMSUBSECONDMASK_None RTC_ALARMSUBSECONDMASK_NONE |
1034 | #define RTC_ALARMSUBSECONDMASK_None RTC_ALARMSUBSECONDMASK_NONE |
| 671 | #define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE |
- | |
| 672 | #define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE |
1035 | #define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE |
| 673 | #define RTC_TAMPERMASK_FLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE |
1036 | #define RTC_TAMPERMASK_FLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE |
| 674 | #define RTC_TAMPERMASK_FLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE |
1037 | #define RTC_TAMPERMASK_FLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE |
| 675 | 1038 | ||
| 676 | #define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE |
1039 | #define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE |
| 677 | #define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE |
- | |
| 678 | #define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE |
- | |
| 679 | #define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE |
- | |
| 680 | #define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE |
- | |
| 681 | #define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE |
1040 | #define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE |
| - | 1041 | #define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE |
|
| 682 | #define RTC_TAMPER1_2_INTERRUPT RTC_ALL_TAMPER_INTERRUPT |
1042 | #define RTC_TAMPER1_2_INTERRUPT RTC_ALL_TAMPER_INTERRUPT |
| 683 | #define RTC_TAMPER1_2_3_INTERRUPT RTC_ALL_TAMPER_INTERRUPT |
1043 | #define RTC_TAMPER1_2_3_INTERRUPT RTC_ALL_TAMPER_INTERRUPT |
| 684 | 1044 | ||
| 685 | #define RTC_TIMESTAMPPIN_PC13 RTC_TIMESTAMPPIN_DEFAULT |
1045 | #define RTC_TIMESTAMPPIN_PC13 RTC_TIMESTAMPPIN_DEFAULT |
| 686 | #define RTC_TIMESTAMPPIN_PA0 RTC_TIMESTAMPPIN_POS1 |
1046 | #define RTC_TIMESTAMPPIN_PA0 RTC_TIMESTAMPPIN_POS1 |
| 687 | #define RTC_TIMESTAMPPIN_PI8 RTC_TIMESTAMPPIN_POS1 |
1047 | #define RTC_TIMESTAMPPIN_PI8 RTC_TIMESTAMPPIN_POS1 |
| 688 | #define RTC_TIMESTAMPPIN_PC1 RTC_TIMESTAMPPIN_POS2 |
1048 | #define RTC_TIMESTAMPPIN_PC1 RTC_TIMESTAMPPIN_POS2 |
| 689 | 1049 | ||
| 690 | #define RTC_OUTPUT_REMAP_PC13 RTC_OUTPUT_REMAP_NONE |
1050 | #define RTC_OUTPUT_REMAP_PC13 RTC_OUTPUT_REMAP_NONE |
| 691 | #define RTC_OUTPUT_REMAP_PB14 RTC_OUTPUT_REMAP_POS1 |
1051 | #define RTC_OUTPUT_REMAP_PB14 RTC_OUTPUT_REMAP_POS1 |
| 692 | #define RTC_OUTPUT_REMAP_PB2 RTC_OUTPUT_REMAP_POS1 |
1052 | #define RTC_OUTPUT_REMAP_PB2 RTC_OUTPUT_REMAP_POS1 |
| 693 | 1053 | ||
| 694 | #define RTC_TAMPERPIN_PC13 RTC_TAMPERPIN_DEFAULT |
1054 | #define RTC_TAMPERPIN_PC13 RTC_TAMPERPIN_DEFAULT |
| 695 | #define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1 |
1055 | #define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1 |
| 696 | #define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1 |
1056 | #define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1 |
| 697 | 1057 | ||
| - | 1058 | #if defined(STM32H7) |
|
| - | 1059 | #define RTC_TAMPCR_TAMPXE RTC_TAMPER_X |
|
| - | 1060 | #define RTC_TAMPCR_TAMPXIE RTC_TAMPER_X_INTERRUPT |
|
| - | 1061 | ||
| - | 1062 | #define RTC_TAMPER1_INTERRUPT RTC_IT_TAMP1 |
|
| - | 1063 | #define RTC_TAMPER2_INTERRUPT RTC_IT_TAMP2 |
|
| - | 1064 | #define RTC_TAMPER3_INTERRUPT RTC_IT_TAMP3 |
|
| - | 1065 | #define RTC_ALL_TAMPER_INTERRUPT RTC_IT_TAMPALL |
|
| - | 1066 | #endif /* STM32H7 */ |
|
| - | 1067 | ||
| 698 | /** |
1068 | /** |
| 699 | * @} |
1069 | * @} |
| 700 | */ |
1070 | */ |
| 701 | 1071 | ||
| 702 | 1072 | ||
| 703 | /** @defgroup HAL_SMARTCARD_Aliased_Defines HAL SMARTCARD Aliased Defines maintained for legacy purpose |
1073 | /** @defgroup HAL_SMARTCARD_Aliased_Defines HAL SMARTCARD Aliased Defines maintained for legacy purpose |
| 704 | * @{ |
1074 | * @{ |
| 705 | */ |
1075 | */ |
| 706 | #define SMARTCARD_NACK_ENABLED SMARTCARD_NACK_ENABLE |
1076 | #define SMARTCARD_NACK_ENABLED SMARTCARD_NACK_ENABLE |
| 707 | #define SMARTCARD_NACK_DISABLED SMARTCARD_NACK_DISABLE |
1077 | #define SMARTCARD_NACK_DISABLED SMARTCARD_NACK_DISABLE |
| Line 718... | Line 1088... | ||
| 718 | #define SMARTCARD_LASTBIT_ENABLED SMARTCARD_LASTBIT_ENABLE |
1088 | #define SMARTCARD_LASTBIT_ENABLED SMARTCARD_LASTBIT_ENABLE |
| 719 | /** |
1089 | /** |
| 720 | * @} |
1090 | * @} |
| 721 | */ |
1091 | */ |
| 722 | 1092 | ||
| 723 | 1093 | ||
| 724 | /** @defgroup HAL_SMBUS_Aliased_Defines HAL SMBUS Aliased Defines maintained for legacy purpose |
1094 | /** @defgroup HAL_SMBUS_Aliased_Defines HAL SMBUS Aliased Defines maintained for legacy purpose |
| 725 | * @{ |
1095 | * @{ |
| 726 | */ |
1096 | */ |
| 727 | #define SMBUS_DUALADDRESS_DISABLED SMBUS_DUALADDRESS_DISABLE |
1097 | #define SMBUS_DUALADDRESS_DISABLED SMBUS_DUALADDRESS_DISABLE |
| 728 | #define SMBUS_DUALADDRESS_ENABLED SMBUS_DUALADDRESS_ENABLE |
1098 | #define SMBUS_DUALADDRESS_ENABLED SMBUS_DUALADDRESS_ENABLE |
| Line 736... | Line 1106... | ||
| 736 | #define SMBUS_PEC_ENABLED SMBUS_PEC_ENABLE |
1106 | #define SMBUS_PEC_ENABLED SMBUS_PEC_ENABLE |
| 737 | #define HAL_SMBUS_STATE_SLAVE_LISTEN HAL_SMBUS_STATE_LISTEN |
1107 | #define HAL_SMBUS_STATE_SLAVE_LISTEN HAL_SMBUS_STATE_LISTEN |
| 738 | /** |
1108 | /** |
| 739 | * @} |
1109 | * @} |
| 740 | */ |
1110 | */ |
| 741 | 1111 | ||
| 742 | /** @defgroup HAL_SPI_Aliased_Defines HAL SPI Aliased Defines maintained for legacy purpose |
1112 | /** @defgroup HAL_SPI_Aliased_Defines HAL SPI Aliased Defines maintained for legacy purpose |
| 743 | * @{ |
1113 | * @{ |
| 744 | */ |
1114 | */ |
| 745 | #define SPI_TIMODE_DISABLED SPI_TIMODE_DISABLE |
1115 | #define SPI_TIMODE_DISABLED SPI_TIMODE_DISABLE |
| 746 | #define SPI_TIMODE_ENABLED SPI_TIMODE_ENABLE |
1116 | #define SPI_TIMODE_ENABLED SPI_TIMODE_ENABLE |
| Line 749... | Line 1119... | ||
| 749 | #define SPI_CRCCALCULATION_ENABLED SPI_CRCCALCULATION_ENABLE |
1119 | #define SPI_CRCCALCULATION_ENABLED SPI_CRCCALCULATION_ENABLE |
| 750 | 1120 | ||
| 751 | #define SPI_NSS_PULSE_DISABLED SPI_NSS_PULSE_DISABLE |
1121 | #define SPI_NSS_PULSE_DISABLED SPI_NSS_PULSE_DISABLE |
| 752 | #define SPI_NSS_PULSE_ENABLED SPI_NSS_PULSE_ENABLE |
1122 | #define SPI_NSS_PULSE_ENABLED SPI_NSS_PULSE_ENABLE |
| 753 | 1123 | ||
| - | 1124 | #if defined(STM32H7) |
|
| - | 1125 | ||
| - | 1126 | #define SPI_FLAG_TXE SPI_FLAG_TXP |
|
| - | 1127 | #define SPI_FLAG_RXNE SPI_FLAG_RXP |
|
| - | 1128 | ||
| - | 1129 | #define SPI_IT_TXE SPI_IT_TXP |
|
| - | 1130 | #define SPI_IT_RXNE SPI_IT_RXP |
|
| - | 1131 | ||
| - | 1132 | #define SPI_FRLVL_EMPTY SPI_RX_FIFO_0PACKET |
|
| - | 1133 | #define SPI_FRLVL_QUARTER_FULL SPI_RX_FIFO_1PACKET |
|
| - | 1134 | #define SPI_FRLVL_HALF_FULL SPI_RX_FIFO_2PACKET |
|
| - | 1135 | #define SPI_FRLVL_FULL SPI_RX_FIFO_3PACKET |
|
| - | 1136 | ||
| - | 1137 | #endif /* STM32H7 */ |
|
| - | 1138 | ||
| 754 | /** |
1139 | /** |
| 755 | * @} |
1140 | * @} |
| 756 | */ |
1141 | */ |
| 757 | 1142 | ||
| 758 | /** @defgroup HAL_TIM_Aliased_Defines HAL TIM Aliased Defines maintained for legacy purpose |
1143 | /** @defgroup HAL_TIM_Aliased_Defines HAL TIM Aliased Defines maintained for legacy purpose |
| 759 | * @{ |
1144 | * @{ |
| 760 | */ |
1145 | */ |
| 761 | #define CCER_CCxE_MASK TIM_CCER_CCxE_MASK |
1146 | #define CCER_CCxE_MASK TIM_CCER_CCxE_MASK |
| 762 | #define CCER_CCxNE_MASK TIM_CCER_CCxNE_MASK |
1147 | #define CCER_CCxNE_MASK TIM_CCER_CCxNE_MASK |
| 763 | 1148 | ||
| 764 | #define TIM_DMABase_CR1 TIM_DMABASE_CR1 |
1149 | #define TIM_DMABase_CR1 TIM_DMABASE_CR1 |
| 765 | #define TIM_DMABase_CR2 TIM_DMABASE_CR2 |
1150 | #define TIM_DMABase_CR2 TIM_DMABASE_CR2 |
| 766 | #define TIM_DMABase_SMCR TIM_DMABASE_SMCR |
1151 | #define TIM_DMABase_SMCR TIM_DMABASE_SMCR |
| 767 | #define TIM_DMABase_DIER TIM_DMABASE_DIER |
1152 | #define TIM_DMABase_DIER TIM_DMABASE_DIER |
| 768 | #define TIM_DMABase_SR TIM_DMABASE_SR |
1153 | #define TIM_DMABase_SR TIM_DMABASE_SR |
| Line 816... | Line 1201... | ||
| 816 | #define TIM_DMABurstLength_15Transfers TIM_DMABURSTLENGTH_15TRANSFERS |
1201 | #define TIM_DMABurstLength_15Transfers TIM_DMABURSTLENGTH_15TRANSFERS |
| 817 | #define TIM_DMABurstLength_16Transfers TIM_DMABURSTLENGTH_16TRANSFERS |
1202 | #define TIM_DMABurstLength_16Transfers TIM_DMABURSTLENGTH_16TRANSFERS |
| 818 | #define TIM_DMABurstLength_17Transfers TIM_DMABURSTLENGTH_17TRANSFERS |
1203 | #define TIM_DMABurstLength_17Transfers TIM_DMABURSTLENGTH_17TRANSFERS |
| 819 | #define TIM_DMABurstLength_18Transfers TIM_DMABURSTLENGTH_18TRANSFERS |
1204 | #define TIM_DMABurstLength_18Transfers TIM_DMABURSTLENGTH_18TRANSFERS |
| 820 | 1205 | ||
| - | 1206 | #if defined(STM32L0) |
|
| - | 1207 | #define TIM22_TI1_GPIO1 TIM22_TI1_GPIO |
|
| - | 1208 | #define TIM22_TI1_GPIO2 TIM22_TI1_GPIO |
|
| - | 1209 | #endif |
|
| - | 1210 | ||
| - | 1211 | #if defined(STM32F3) |
|
| - | 1212 | #define IS_TIM_HALL_INTERFACE_INSTANCE IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE |
|
| - | 1213 | #endif |
|
| - | 1214 | ||
| - | 1215 | #if defined(STM32H7) |
|
| - | 1216 | #define TIM_TIM1_ETR_COMP1_OUT TIM_TIM1_ETR_COMP1 |
|
| - | 1217 | #define TIM_TIM1_ETR_COMP2_OUT TIM_TIM1_ETR_COMP2 |
|
| - | 1218 | #define TIM_TIM8_ETR_COMP1_OUT TIM_TIM8_ETR_COMP1 |
|
| - | 1219 | #define TIM_TIM8_ETR_COMP2_OUT TIM_TIM8_ETR_COMP2 |
|
| - | 1220 | #define TIM_TIM2_ETR_COMP1_OUT TIM_TIM2_ETR_COMP1 |
|
| - | 1221 | #define TIM_TIM2_ETR_COMP2_OUT TIM_TIM2_ETR_COMP2 |
|
| - | 1222 | #define TIM_TIM3_ETR_COMP1_OUT TIM_TIM3_ETR_COMP1 |
|
| - | 1223 | #define TIM_TIM1_TI1_COMP1_OUT TIM_TIM1_TI1_COMP1 |
|
| - | 1224 | #define TIM_TIM8_TI1_COMP2_OUT TIM_TIM8_TI1_COMP2 |
|
| - | 1225 | #define TIM_TIM2_TI4_COMP1_OUT TIM_TIM2_TI4_COMP1 |
|
| - | 1226 | #define TIM_TIM2_TI4_COMP2_OUT TIM_TIM2_TI4_COMP2 |
|
| - | 1227 | #define TIM_TIM2_TI4_COMP1COMP2_OUT TIM_TIM2_TI4_COMP1_COMP2 |
|
| - | 1228 | #define TIM_TIM3_TI1_COMP1_OUT TIM_TIM3_TI1_COMP1 |
|
| - | 1229 | #define TIM_TIM3_TI1_COMP2_OUT TIM_TIM3_TI1_COMP2 |
|
| - | 1230 | #define TIM_TIM3_TI1_COMP1COMP2_OUT TIM_TIM3_TI1_COMP1_COMP2 |
|
| - | 1231 | #endif |
|
| - | 1232 | ||
| 821 | /** |
1233 | /** |
| 822 | * @} |
1234 | * @} |
| 823 | */ |
1235 | */ |
| 824 | 1236 | ||
| 825 | /** @defgroup HAL_TSC_Aliased_Defines HAL TSC Aliased Defines maintained for legacy purpose |
1237 | /** @defgroup HAL_TSC_Aliased_Defines HAL TSC Aliased Defines maintained for legacy purpose |
| Line 850... | Line 1262... | ||
| 850 | #define __DIV_SAMPLING8 UART_DIV_SAMPLING8 |
1262 | #define __DIV_SAMPLING8 UART_DIV_SAMPLING8 |
| 851 | #define __DIVMANT_SAMPLING8 UART_DIVMANT_SAMPLING8 |
1263 | #define __DIVMANT_SAMPLING8 UART_DIVMANT_SAMPLING8 |
| 852 | #define __DIVFRAQ_SAMPLING8 UART_DIVFRAQ_SAMPLING8 |
1264 | #define __DIVFRAQ_SAMPLING8 UART_DIVFRAQ_SAMPLING8 |
| 853 | #define __UART_BRR_SAMPLING8 UART_BRR_SAMPLING8 |
1265 | #define __UART_BRR_SAMPLING8 UART_BRR_SAMPLING8 |
| 854 | 1266 | ||
| - | 1267 | #define __DIV_LPUART UART_DIV_LPUART |
|
| - | 1268 | ||
| 855 | #define UART_WAKEUPMETHODE_IDLELINE UART_WAKEUPMETHOD_IDLELINE |
1269 | #define UART_WAKEUPMETHODE_IDLELINE UART_WAKEUPMETHOD_IDLELINE |
| 856 | #define UART_WAKEUPMETHODE_ADDRESSMARK UART_WAKEUPMETHOD_ADDRESSMARK |
1270 | #define UART_WAKEUPMETHODE_ADDRESSMARK UART_WAKEUPMETHOD_ADDRESSMARK |
| 857 | 1271 | ||
| 858 | /** |
1272 | /** |
| 859 | * @} |
1273 | * @} |
| 860 | */ |
1274 | */ |
| 861 | 1275 | ||
| 862 | 1276 | ||
| 863 | /** @defgroup HAL_USART_Aliased_Defines HAL USART Aliased Defines maintained for legacy purpose |
1277 | /** @defgroup HAL_USART_Aliased_Defines HAL USART Aliased Defines maintained for legacy purpose |
| 864 | * @{ |
1278 | * @{ |
| 865 | */ |
1279 | */ |
| 866 | 1280 | ||
| 867 | #define USART_CLOCK_DISABLED USART_CLOCK_DISABLE |
1281 | #define USART_CLOCK_DISABLED USART_CLOCK_DISABLE |
| Line 897... | Line 1311... | ||
| 897 | #define CAN_TXSTATUS_PENDING ((uint8_t)0x02U) |
1311 | #define CAN_TXSTATUS_PENDING ((uint8_t)0x02U) |
| 898 | 1312 | ||
| 899 | /** |
1313 | /** |
| 900 | * @} |
1314 | * @} |
| 901 | */ |
1315 | */ |
| 902 | 1316 | ||
| 903 | /** @defgroup HAL_ETH_Aliased_Defines HAL ETH Aliased Defines maintained for legacy purpose |
1317 | /** @defgroup HAL_ETH_Aliased_Defines HAL ETH Aliased Defines maintained for legacy purpose |
| 904 | * @{ |
1318 | * @{ |
| 905 | */ |
1319 | */ |
| 906 | 1320 | ||
| 907 | #define VLAN_TAG ETH_VLAN_TAG |
1321 | #define VLAN_TAG ETH_VLAN_TAG |
| Line 911... | Line 1325... | ||
| 911 | #define MACMIIAR_CR_MASK ETH_MACMIIAR_CR_MASK |
1325 | #define MACMIIAR_CR_MASK ETH_MACMIIAR_CR_MASK |
| 912 | #define MACCR_CLEAR_MASK ETH_MACCR_CLEAR_MASK |
1326 | #define MACCR_CLEAR_MASK ETH_MACCR_CLEAR_MASK |
| 913 | #define MACFCR_CLEAR_MASK ETH_MACFCR_CLEAR_MASK |
1327 | #define MACFCR_CLEAR_MASK ETH_MACFCR_CLEAR_MASK |
| 914 | #define DMAOMR_CLEAR_MASK ETH_DMAOMR_CLEAR_MASK |
1328 | #define DMAOMR_CLEAR_MASK ETH_DMAOMR_CLEAR_MASK |
| 915 | 1329 | ||
| 916 | #define ETH_MMCCR ((uint32_t)0x00000100U) |
1330 | #define ETH_MMCCR 0x00000100U |
| 917 | #define ETH_MMCRIR ((uint32_t)0x00000104U) |
1331 | #define ETH_MMCRIR 0x00000104U |
| 918 | #define ETH_MMCTIR ((uint32_t)0x00000108U) |
1332 | #define ETH_MMCTIR 0x00000108U |
| 919 | #define ETH_MMCRIMR ((uint32_t)0x0000010CU) |
1333 | #define ETH_MMCRIMR 0x0000010CU |
| 920 | #define ETH_MMCTIMR ((uint32_t)0x00000110U) |
1334 | #define ETH_MMCTIMR 0x00000110U |
| 921 | #define ETH_MMCTGFSCCR ((uint32_t)0x0000014CU) |
1335 | #define ETH_MMCTGFSCCR 0x0000014CU |
| 922 | #define ETH_MMCTGFMSCCR ((uint32_t)0x00000150U) |
1336 | #define ETH_MMCTGFMSCCR 0x00000150U |
| 923 | #define ETH_MMCTGFCR ((uint32_t)0x00000168U) |
1337 | #define ETH_MMCTGFCR 0x00000168U |
| 924 | #define ETH_MMCRFCECR ((uint32_t)0x00000194U) |
1338 | #define ETH_MMCRFCECR 0x00000194U |
| 925 | #define ETH_MMCRFAECR ((uint32_t)0x00000198U) |
1339 | #define ETH_MMCRFAECR 0x00000198U |
| 926 | #define ETH_MMCRGUFCR ((uint32_t)0x000001C4U) |
1340 | #define ETH_MMCRGUFCR 0x000001C4U |
| 927 | 1341 | ||
| 928 | #define ETH_MAC_TXFIFO_FULL ((uint32_t)0x02000000) /* Tx FIFO full */ |
1342 | #define ETH_MAC_TXFIFO_FULL 0x02000000U /* Tx FIFO full */ |
| 929 | #define ETH_MAC_TXFIFONOT_EMPTY ((uint32_t)0x01000000) /* Tx FIFO not empty */ |
1343 | #define ETH_MAC_TXFIFONOT_EMPTY 0x01000000U /* Tx FIFO not empty */ |
| 930 | #define ETH_MAC_TXFIFO_WRITE_ACTIVE ((uint32_t)0x00400000) /* Tx FIFO write active */ |
1344 | #define ETH_MAC_TXFIFO_WRITE_ACTIVE 0x00400000U /* Tx FIFO write active */ |
| 931 | #define ETH_MAC_TXFIFO_IDLE ((uint32_t)0x00000000) /* Tx FIFO read status: Idle */ |
1345 | #define ETH_MAC_TXFIFO_IDLE 0x00000000U /* Tx FIFO read status: Idle */ |
| 932 | #define ETH_MAC_TXFIFO_READ ((uint32_t)0x00100000) /* Tx FIFO read status: Read (transferring data to the MAC transmitter) */ |
1346 | #define ETH_MAC_TXFIFO_READ 0x00100000U /* Tx FIFO read status: Read (transferring data to the MAC transmitter) */ |
| 933 | #define ETH_MAC_TXFIFO_WAITING ((uint32_t)0x00200000) /* Tx FIFO read status: Waiting for TxStatus from MAC transmitter */ |
1347 | #define ETH_MAC_TXFIFO_WAITING 0x00200000U /* Tx FIFO read status: Waiting for TxStatus from MAC transmitter */ |
| 934 | #define ETH_MAC_TXFIFO_WRITING ((uint32_t)0x00300000) /* Tx FIFO read status: Writing the received TxStatus or flushing the TxFIFO */ |
1348 | #define ETH_MAC_TXFIFO_WRITING 0x00300000U /* Tx FIFO read status: Writing the received TxStatus or flushing the TxFIFO */ |
| 935 | #define ETH_MAC_TRANSMISSION_PAUSE ((uint32_t)0x00080000) /* MAC transmitter in pause */ |
1349 | #define ETH_MAC_TRANSMISSION_PAUSE 0x00080000U /* MAC transmitter in pause */ |
| 936 | #define ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE ((uint32_t)0x00000000) /* MAC transmit frame controller: Idle */ |
1350 | #define ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE 0x00000000U /* MAC transmit frame controller: Idle */ |
| 937 | #define ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING ((uint32_t)0x00020000) /* MAC transmit frame controller: Waiting for Status of previous frame or IFG/backoff period to be over */ |
1351 | #define ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING 0x00020000U /* MAC transmit frame controller: Waiting for Status of previous frame or IFG/backoff period to be over */ |
| 938 | #define ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF ((uint32_t)0x00040000) /* MAC transmit frame controller: Generating and transmitting a Pause control frame (in full duplex mode) */ |
1352 | #define ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF 0x00040000U /* MAC transmit frame controller: Generating and transmitting a Pause control frame (in full duplex mode) */ |
| 939 | #define ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING ((uint32_t)0x00060000) /* MAC transmit frame controller: Transferring input frame for transmission */ |
1353 | #define ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING 0x00060000U /* MAC transmit frame controller: Transferring input frame for transmission */ |
| 940 | #define ETH_MAC_MII_TRANSMIT_ACTIVE ((uint32_t)0x00010000) /* MAC MII transmit engine active */ |
1354 | #define ETH_MAC_MII_TRANSMIT_ACTIVE 0x00010000U /* MAC MII transmit engine active */ |
| 941 | #define ETH_MAC_RXFIFO_EMPTY ((uint32_t)0x00000000) /* Rx FIFO fill level: empty */ |
1355 | #define ETH_MAC_RXFIFO_EMPTY 0x00000000U /* Rx FIFO fill level: empty */ |
| 942 | #define ETH_MAC_RXFIFO_BELOW_THRESHOLD ((uint32_t)0x00000100) /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */ |
1356 | #define ETH_MAC_RXFIFO_BELOW_THRESHOLD 0x00000100U /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */ |
| 943 | #define ETH_MAC_RXFIFO_ABOVE_THRESHOLD ((uint32_t)0x00000200) /* Rx FIFO fill level: fill-level above flow-control activate threshold */ |
1357 | #define ETH_MAC_RXFIFO_ABOVE_THRESHOLD 0x00000200U /* Rx FIFO fill level: fill-level above flow-control activate threshold */ |
| 944 | #define ETH_MAC_RXFIFO_FULL ((uint32_t)0x00000300) /* Rx FIFO fill level: full */ |
1358 | #define ETH_MAC_RXFIFO_FULL 0x00000300U /* Rx FIFO fill level: full */ |
| 945 | #if defined(STM32F1) |
1359 | #if defined(STM32F1) |
| 946 | #else |
1360 | #else |
| 947 | #define ETH_MAC_READCONTROLLER_IDLE ((uint32_t)0x00000000) /* Rx FIFO read controller IDLE state */ |
1361 | #define ETH_MAC_READCONTROLLER_IDLE 0x00000000U /* Rx FIFO read controller IDLE state */ |
| 948 | #define ETH_MAC_READCONTROLLER_READING_DATA ((uint32_t)0x00000020) /* Rx FIFO read controller Reading frame data */ |
1362 | #define ETH_MAC_READCONTROLLER_READING_DATA 0x00000020U /* Rx FIFO read controller Reading frame data */ |
| 949 | #define ETH_MAC_READCONTROLLER_READING_STATUS ((uint32_t)0x00000040) /* Rx FIFO read controller Reading frame status (or time-stamp) */ |
1363 | #define ETH_MAC_READCONTROLLER_READING_STATUS 0x00000040U /* Rx FIFO read controller Reading frame status (or time-stamp) */ |
| 950 | #endif |
1364 | #endif |
| 951 | #define ETH_MAC_READCONTROLLER_FLUSHING ((uint32_t)0x00000060) /* Rx FIFO read controller Flushing the frame data and status */ |
1365 | #define ETH_MAC_READCONTROLLER_FLUSHING 0x00000060U /* Rx FIFO read controller Flushing the frame data and status */ |
| 952 | #define ETH_MAC_RXFIFO_WRITE_ACTIVE ((uint32_t)0x00000010) /* Rx FIFO write controller active */ |
1366 | #define ETH_MAC_RXFIFO_WRITE_ACTIVE 0x00000010U /* Rx FIFO write controller active */ |
| 953 | #define ETH_MAC_SMALL_FIFO_NOTACTIVE ((uint32_t)0x00000000) /* MAC small FIFO read / write controllers not active */ |
1367 | #define ETH_MAC_SMALL_FIFO_NOTACTIVE 0x00000000U /* MAC small FIFO read / write controllers not active */ |
| 954 | #define ETH_MAC_SMALL_FIFO_READ_ACTIVE ((uint32_t)0x00000002) /* MAC small FIFO read controller active */ |
1368 | #define ETH_MAC_SMALL_FIFO_READ_ACTIVE 0x00000002U /* MAC small FIFO read controller active */ |
| 955 | #define ETH_MAC_SMALL_FIFO_WRITE_ACTIVE ((uint32_t)0x00000004) /* MAC small FIFO write controller active */ |
1369 | #define ETH_MAC_SMALL_FIFO_WRITE_ACTIVE 0x00000004U /* MAC small FIFO write controller active */ |
| 956 | #define ETH_MAC_SMALL_FIFO_RW_ACTIVE ((uint32_t)0x00000006) /* MAC small FIFO read / write controllers active */ |
1370 | #define ETH_MAC_SMALL_FIFO_RW_ACTIVE 0x00000006U /* MAC small FIFO read / write controllers active */ |
| 957 | #define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE ((uint32_t)0x00000001) /* MAC MII receive protocol engine active */ |
1371 | #define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE 0x00000001U /* MAC MII receive protocol engine active */ |
| 958 | 1372 | ||
| 959 | /** |
1373 | /** |
| 960 | * @} |
1374 | * @} |
| 961 | */ |
1375 | */ |
| 962 | 1376 | ||
| 963 | /** @defgroup HAL_DCMI_Aliased_Defines HAL DCMI Aliased Defines maintained for legacy purpose |
1377 | /** @defgroup HAL_DCMI_Aliased_Defines HAL DCMI Aliased Defines maintained for legacy purpose |
| 964 | * @{ |
1378 | * @{ |
| 965 | */ |
1379 | */ |
| 966 | #define HAL_DCMI_ERROR_OVF HAL_DCMI_ERROR_OVR |
1380 | #define HAL_DCMI_ERROR_OVF HAL_DCMI_ERROR_OVR |
| 967 | #define DCMI_IT_OVF DCMI_IT_OVR |
1381 | #define DCMI_IT_OVF DCMI_IT_OVR |
| Line 972... | Line 1386... | ||
| 972 | #define HAL_DCMI_EnableCROP HAL_DCMI_EnableCrop |
1386 | #define HAL_DCMI_EnableCROP HAL_DCMI_EnableCrop |
| 973 | #define HAL_DCMI_DisableCROP HAL_DCMI_DisableCrop |
1387 | #define HAL_DCMI_DisableCROP HAL_DCMI_DisableCrop |
| 974 | 1388 | ||
| 975 | /** |
1389 | /** |
| 976 | * @} |
1390 | * @} |
| 977 | */ |
1391 | */ |
| 978 | 1392 | ||
| 979 | #if defined(STM32L4xx) || defined(STM32F7) || defined(STM32F427xx) || defined(STM32F437xx) ||\ |
1393 | #if defined(STM32L4) || defined(STM32F7) || defined(STM32F427xx) || defined(STM32F437xx) \ |
| 980 | defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) |
1394 | || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) \ |
| - | 1395 | || defined(STM32H7) |
|
| 981 | /** @defgroup HAL_DMA2D_Aliased_Defines HAL DMA2D Aliased Defines maintained for legacy purpose |
1396 | /** @defgroup HAL_DMA2D_Aliased_Defines HAL DMA2D Aliased Defines maintained for legacy purpose |
| 982 | * @{ |
1397 | * @{ |
| 983 | */ |
1398 | */ |
| 984 | #define DMA2D_ARGB8888 DMA2D_OUTPUT_ARGB8888 |
1399 | #define DMA2D_ARGB8888 DMA2D_OUTPUT_ARGB8888 |
| 985 | #define DMA2D_RGB888 DMA2D_OUTPUT_RGB888 |
1400 | #define DMA2D_RGB888 DMA2D_OUTPUT_RGB888 |
| 986 | #define DMA2D_RGB565 DMA2D_OUTPUT_RGB565 |
1401 | #define DMA2D_RGB565 DMA2D_OUTPUT_RGB565 |
| 987 | #define DMA2D_ARGB1555 DMA2D_OUTPUT_ARGB1555 |
1402 | #define DMA2D_ARGB1555 DMA2D_OUTPUT_ARGB1555 |
| 988 | #define DMA2D_ARGB4444 DMA2D_OUTPUT_ARGB4444 |
1403 | #define DMA2D_ARGB4444 DMA2D_OUTPUT_ARGB4444 |
| 989 | 1404 | ||
| 990 | #define CM_ARGB8888 DMA2D_INPUT_ARGB8888 |
1405 | #define CM_ARGB8888 DMA2D_INPUT_ARGB8888 |
| 991 | #define CM_RGB888 DMA2D_INPUT_RGB888 |
1406 | #define CM_RGB888 DMA2D_INPUT_RGB888 |
| 992 | #define CM_RGB565 DMA2D_INPUT_RGB565 |
1407 | #define CM_RGB565 DMA2D_INPUT_RGB565 |
| 993 | #define CM_ARGB1555 DMA2D_INPUT_ARGB1555 |
1408 | #define CM_ARGB1555 DMA2D_INPUT_ARGB1555 |
| 994 | #define CM_ARGB4444 DMA2D_INPUT_ARGB4444 |
1409 | #define CM_ARGB4444 DMA2D_INPUT_ARGB4444 |
| 995 | #define CM_L8 DMA2D_INPUT_L8 |
1410 | #define CM_L8 DMA2D_INPUT_L8 |
| 996 | #define CM_AL44 DMA2D_INPUT_AL44 |
1411 | #define CM_AL44 DMA2D_INPUT_AL44 |
| 997 | #define CM_AL88 DMA2D_INPUT_AL88 |
1412 | #define CM_AL88 DMA2D_INPUT_AL88 |
| 998 | #define CM_L4 DMA2D_INPUT_L4 |
1413 | #define CM_L4 DMA2D_INPUT_L4 |
| 999 | #define CM_A8 DMA2D_INPUT_A8 |
1414 | #define CM_A8 DMA2D_INPUT_A8 |
| 1000 | #define CM_A4 DMA2D_INPUT_A4 |
1415 | #define CM_A4 DMA2D_INPUT_A4 |
| 1001 | /** |
1416 | /** |
| 1002 | * @} |
1417 | * @} |
| 1003 | */ |
1418 | */ |
| 1004 | #endif /* STM32L4xx || STM32F7*/ |
1419 | #endif /* STM32L4 || STM32F7 || STM32F4 || STM32H7 */ |
| 1005 | 1420 | ||
| 1006 | /** @defgroup HAL_PPP_Aliased_Defines HAL PPP Aliased Defines maintained for legacy purpose |
1421 | /** @defgroup HAL_PPP_Aliased_Defines HAL PPP Aliased Defines maintained for legacy purpose |
| 1007 | * @{ |
1422 | * @{ |
| 1008 | */ |
1423 | */ |
| 1009 | 1424 | ||
| 1010 | /** |
1425 | /** |
| 1011 | * @} |
1426 | * @} |
| 1012 | */ |
1427 | */ |
| 1013 | 1428 | ||
| 1014 | /* Exported functions --------------------------------------------------------*/ |
1429 | /* Exported functions --------------------------------------------------------*/ |
| Line 1017... | Line 1432... | ||
| 1017 | * @{ |
1432 | * @{ |
| 1018 | */ |
1433 | */ |
| 1019 | #define HAL_CRYP_ComputationCpltCallback HAL_CRYPEx_ComputationCpltCallback |
1434 | #define HAL_CRYP_ComputationCpltCallback HAL_CRYPEx_ComputationCpltCallback |
| 1020 | /** |
1435 | /** |
| 1021 | * @} |
1436 | * @} |
| 1022 | */ |
1437 | */ |
| 1023 | 1438 | ||
| 1024 | /** @defgroup HAL_HASH_Aliased_Functions HAL HASH Aliased Functions maintained for legacy purpose |
1439 | /** @defgroup HAL_HASH_Aliased_Functions HAL HASH Aliased Functions maintained for legacy purpose |
| 1025 | * @{ |
1440 | * @{ |
| 1026 | */ |
1441 | */ |
| 1027 | #define HAL_HASH_STATETypeDef HAL_HASH_StateTypeDef |
1442 | #define HAL_HASH_STATETypeDef HAL_HASH_StateTypeDef |
| 1028 | #define HAL_HASHPhaseTypeDef HAL_HASH_PhaseTypeDef |
1443 | #define HAL_HASHPhaseTypeDef HAL_HASH_PhaseTypeDef |
| 1029 | #define HAL_HMAC_MD5_Finish HAL_HASH_MD5_Finish |
1444 | #define HAL_HMAC_MD5_Finish HAL_HASH_MD5_Finish |
| 1030 | #define HAL_HMAC_SHA1_Finish HAL_HASH_SHA1_Finish |
1445 | #define HAL_HMAC_SHA1_Finish HAL_HASH_SHA1_Finish |
| 1031 | #define HAL_HMAC_SHA224_Finish HAL_HASH_SHA224_Finish |
1446 | #define HAL_HMAC_SHA224_Finish HAL_HASH_SHA224_Finish |
| 1032 | #define HAL_HMAC_SHA256_Finish HAL_HASH_SHA256_Finish |
1447 | #define HAL_HMAC_SHA256_Finish HAL_HASH_SHA256_Finish |
| 1033 | 1448 | ||
| 1034 | /*HASH Algorithm Selection*/ |
1449 | /*HASH Algorithm Selection*/ |
| 1035 | 1450 | ||
| 1036 | #define HASH_AlgoSelection_SHA1 HASH_ALGOSELECTION_SHA1 |
1451 | #define HASH_AlgoSelection_SHA1 HASH_ALGOSELECTION_SHA1 |
| 1037 | #define HASH_AlgoSelection_SHA224 HASH_ALGOSELECTION_SHA224 |
1452 | #define HASH_AlgoSelection_SHA224 HASH_ALGOSELECTION_SHA224 |
| 1038 | #define HASH_AlgoSelection_SHA256 HASH_ALGOSELECTION_SHA256 |
1453 | #define HASH_AlgoSelection_SHA256 HASH_ALGOSELECTION_SHA256 |
| 1039 | #define HASH_AlgoSelection_MD5 HASH_ALGOSELECTION_MD5 |
1454 | #define HASH_AlgoSelection_MD5 HASH_ALGOSELECTION_MD5 |
| 1040 | 1455 | ||
| 1041 | #define HASH_AlgoMode_HASH HASH_ALGOMODE_HASH |
1456 | #define HASH_AlgoMode_HASH HASH_ALGOMODE_HASH |
| 1042 | #define HASH_AlgoMode_HMAC HASH_ALGOMODE_HMAC |
1457 | #define HASH_AlgoMode_HMAC HASH_ALGOMODE_HMAC |
| 1043 | 1458 | ||
| 1044 | #define HASH_HMACKeyType_ShortKey HASH_HMAC_KEYTYPE_SHORTKEY |
1459 | #define HASH_HMACKeyType_ShortKey HASH_HMAC_KEYTYPE_SHORTKEY |
| 1045 | #define HASH_HMACKeyType_LongKey HASH_HMAC_KEYTYPE_LONGKEY |
1460 | #define HASH_HMACKeyType_LongKey HASH_HMAC_KEYTYPE_LONGKEY |
| - | 1461 | ||
| - | 1462 | #if defined(STM32L4) || defined(STM32L5) || defined(STM32F4) || defined(STM32F7) || defined(STM32H7) |
|
| - | 1463 | ||
| - | 1464 | #define HAL_HASH_MD5_Accumulate HAL_HASH_MD5_Accmlt |
|
| - | 1465 | #define HAL_HASH_MD5_Accumulate_End HAL_HASH_MD5_Accmlt_End |
|
| - | 1466 | #define HAL_HASH_MD5_Accumulate_IT HAL_HASH_MD5_Accmlt_IT |
|
| - | 1467 | #define HAL_HASH_MD5_Accumulate_End_IT HAL_HASH_MD5_Accmlt_End_IT |
|
| - | 1468 | ||
| - | 1469 | #define HAL_HASH_SHA1_Accumulate HAL_HASH_SHA1_Accmlt |
|
| - | 1470 | #define HAL_HASH_SHA1_Accumulate_End HAL_HASH_SHA1_Accmlt_End |
|
| - | 1471 | #define HAL_HASH_SHA1_Accumulate_IT HAL_HASH_SHA1_Accmlt_IT |
|
| - | 1472 | #define HAL_HASH_SHA1_Accumulate_End_IT HAL_HASH_SHA1_Accmlt_End_IT |
|
| - | 1473 | ||
| - | 1474 | #define HAL_HASHEx_SHA224_Accumulate HAL_HASHEx_SHA224_Accmlt |
|
| - | 1475 | #define HAL_HASHEx_SHA224_Accumulate_End HAL_HASHEx_SHA224_Accmlt_End |
|
| - | 1476 | #define HAL_HASHEx_SHA224_Accumulate_IT HAL_HASHEx_SHA224_Accmlt_IT |
|
| - | 1477 | #define HAL_HASHEx_SHA224_Accumulate_End_IT HAL_HASHEx_SHA224_Accmlt_End_IT |
|
| - | 1478 | ||
| - | 1479 | #define HAL_HASHEx_SHA256_Accumulate HAL_HASHEx_SHA256_Accmlt |
|
| - | 1480 | #define HAL_HASHEx_SHA256_Accumulate_End HAL_HASHEx_SHA256_Accmlt_End |
|
| - | 1481 | #define HAL_HASHEx_SHA256_Accumulate_IT HAL_HASHEx_SHA256_Accmlt_IT |
|
| - | 1482 | #define HAL_HASHEx_SHA256_Accumulate_End_IT HAL_HASHEx_SHA256_Accmlt_End_IT |
|
| - | 1483 | ||
| - | 1484 | #endif /* STM32L4 || STM32L5 || STM32F4 || STM32F7 || STM32H7 */ |
|
| 1046 | /** |
1485 | /** |
| 1047 | * @} |
1486 | * @} |
| 1048 | */ |
1487 | */ |
| 1049 | 1488 | ||
| 1050 | /** @defgroup HAL_Aliased_Functions HAL Generic Aliased Functions maintained for legacy purpose |
1489 | /** @defgroup HAL_Aliased_Functions HAL Generic Aliased Functions maintained for legacy purpose |
| 1051 | * @{ |
1490 | * @{ |
| 1052 | */ |
1491 | */ |
| 1053 | #define HAL_EnableDBGSleepMode HAL_DBGMCU_EnableDBGSleepMode |
1492 | #define HAL_EnableDBGSleepMode HAL_DBGMCU_EnableDBGSleepMode |
| 1054 | #define HAL_DisableDBGSleepMode HAL_DBGMCU_DisableDBGSleepMode |
1493 | #define HAL_DisableDBGSleepMode HAL_DBGMCU_DisableDBGSleepMode |
| Line 1063... | Line 1502... | ||
| 1063 | #else |
1502 | #else |
| 1064 | #define HAL_VREFINT_Cmd(cmd) (((cmd)==ENABLE)? HAL_SYSCFG_EnableVREFINT() : HAL_SYSCFG_DisableVREFINT()) |
1503 | #define HAL_VREFINT_Cmd(cmd) (((cmd)==ENABLE)? HAL_SYSCFG_EnableVREFINT() : HAL_SYSCFG_DisableVREFINT()) |
| 1065 | #endif |
1504 | #endif |
| 1066 | #define HAL_ADC_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINT() : HAL_ADCEx_DisableVREFINT()) |
1505 | #define HAL_ADC_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINT() : HAL_ADCEx_DisableVREFINT()) |
| 1067 | #define HAL_ADC_EnableBufferSensor_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINTTempSensor() : HAL_ADCEx_DisableVREFINTTempSensor()) |
1506 | #define HAL_ADC_EnableBufferSensor_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINTTempSensor() : HAL_ADCEx_DisableVREFINTTempSensor()) |
| - | 1507 | #if defined(STM32H7A3xx) || defined(STM32H7B3xx) || defined(STM32H7B0xx) || defined(STM32H7A3xxQ) || defined(STM32H7B3xxQ) || defined(STM32H7B0xxQ) |
|
| - | 1508 | #define HAL_EnableSRDomainDBGStopMode HAL_EnableDomain3DBGStopMode |
|
| - | 1509 | #define HAL_DisableSRDomainDBGStopMode HAL_DisableDomain3DBGStopMode |
|
| - | 1510 | #define HAL_EnableSRDomainDBGStandbyMode HAL_EnableDomain3DBGStandbyMode |
|
| - | 1511 | #define HAL_DisableSRDomainDBGStandbyMode HAL_DisableDomain3DBGStandbyMode |
|
| - | 1512 | #endif /* STM32H7A3xx || STM32H7B3xx || STM32H7B0xx || STM32H7A3xxQ || STM32H7B3xxQ || STM32H7B0xxQ */ |
|
| - | 1513 | ||
| 1068 | /** |
1514 | /** |
| 1069 | * @} |
1515 | * @} |
| 1070 | */ |
1516 | */ |
| 1071 | 1517 | ||
| 1072 | /** @defgroup HAL_FLASH_Aliased_Functions HAL FLASH Aliased Functions maintained for legacy purpose |
1518 | /** @defgroup HAL_FLASH_Aliased_Functions HAL FLASH Aliased Functions maintained for legacy purpose |
| Line 1091... | Line 1537... | ||
| 1091 | #define HAL_I2CEx_DigitalFilter_Config HAL_I2CEx_ConfigDigitalFilter |
1537 | #define HAL_I2CEx_DigitalFilter_Config HAL_I2CEx_ConfigDigitalFilter |
| 1092 | #define HAL_FMPI2CEx_AnalogFilter_Config HAL_FMPI2CEx_ConfigAnalogFilter |
1538 | #define HAL_FMPI2CEx_AnalogFilter_Config HAL_FMPI2CEx_ConfigAnalogFilter |
| 1093 | #define HAL_FMPI2CEx_DigitalFilter_Config HAL_FMPI2CEx_ConfigDigitalFilter |
1539 | #define HAL_FMPI2CEx_DigitalFilter_Config HAL_FMPI2CEx_ConfigDigitalFilter |
| 1094 | 1540 | ||
| 1095 | #define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd)==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus)) |
1541 | #define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd)==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus)) |
| - | 1542 | ||
| - | 1543 | #if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4) || defined(STM32L1) |
|
| - | 1544 | #define HAL_I2C_Master_Sequential_Transmit_IT HAL_I2C_Master_Seq_Transmit_IT |
|
| - | 1545 | #define HAL_I2C_Master_Sequential_Receive_IT HAL_I2C_Master_Seq_Receive_IT |
|
| - | 1546 | #define HAL_I2C_Slave_Sequential_Transmit_IT HAL_I2C_Slave_Seq_Transmit_IT |
|
| - | 1547 | #define HAL_I2C_Slave_Sequential_Receive_IT HAL_I2C_Slave_Seq_Receive_IT |
|
| - | 1548 | #endif /* STM32H7 || STM32WB || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 || STM32L1 */ |
|
| - | 1549 | #if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4)|| defined(STM32L1) |
|
| - | 1550 | #define HAL_I2C_Master_Sequential_Transmit_DMA HAL_I2C_Master_Seq_Transmit_DMA |
|
| - | 1551 | #define HAL_I2C_Master_Sequential_Receive_DMA HAL_I2C_Master_Seq_Receive_DMA |
|
| - | 1552 | #define HAL_I2C_Slave_Sequential_Transmit_DMA HAL_I2C_Slave_Seq_Transmit_DMA |
|
| - | 1553 | #define HAL_I2C_Slave_Sequential_Receive_DMA HAL_I2C_Slave_Seq_Receive_DMA |
|
| - | 1554 | #endif /* STM32H7 || STM32WB || STM32G0 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 || STM32L1 */ |
|
| - | 1555 | ||
| - | 1556 | #if defined(STM32F4) |
|
| - | 1557 | #define HAL_FMPI2C_Master_Sequential_Transmit_IT HAL_FMPI2C_Master_Seq_Transmit_IT |
|
| - | 1558 | #define HAL_FMPI2C_Master_Sequential_Receive_IT HAL_FMPI2C_Master_Seq_Receive_IT |
|
| - | 1559 | #define HAL_FMPI2C_Slave_Sequential_Transmit_IT HAL_FMPI2C_Slave_Seq_Transmit_IT |
|
| - | 1560 | #define HAL_FMPI2C_Slave_Sequential_Receive_IT HAL_FMPI2C_Slave_Seq_Receive_IT |
|
| - | 1561 | #define HAL_FMPI2C_Master_Sequential_Transmit_DMA HAL_FMPI2C_Master_Seq_Transmit_DMA |
|
| - | 1562 | #define HAL_FMPI2C_Master_Sequential_Receive_DMA HAL_FMPI2C_Master_Seq_Receive_DMA |
|
| - | 1563 | #define HAL_FMPI2C_Slave_Sequential_Transmit_DMA HAL_FMPI2C_Slave_Seq_Transmit_DMA |
|
| - | 1564 | #define HAL_FMPI2C_Slave_Sequential_Receive_DMA HAL_FMPI2C_Slave_Seq_Receive_DMA |
|
| - | 1565 | #endif /* STM32F4 */ |
|
| 1096 | /** |
1566 | /** |
| 1097 | * @} |
1567 | * @} |
| 1098 | */ |
1568 | */ |
| 1099 | 1569 | ||
| 1100 | /** @defgroup HAL_PWR_Aliased HAL PWR Aliased maintained for legacy purpose |
1570 | /** @defgroup HAL_PWR_Aliased HAL PWR Aliased maintained for legacy purpose |
| 1101 | * @{ |
1571 | * @{ |
| 1102 | */ |
1572 | */ |
| - | 1573 | ||
| - | 1574 | #if defined(STM32G0) |
|
| - | 1575 | #define HAL_PWR_ConfigPVD HAL_PWREx_ConfigPVD |
|
| - | 1576 | #define HAL_PWR_EnablePVD HAL_PWREx_EnablePVD |
|
| - | 1577 | #define HAL_PWR_DisablePVD HAL_PWREx_DisablePVD |
|
| - | 1578 | #define HAL_PWR_PVD_IRQHandler HAL_PWREx_PVD_IRQHandler |
|
| - | 1579 | #endif |
|
| 1103 | #define HAL_PWR_PVDConfig HAL_PWR_ConfigPVD |
1580 | #define HAL_PWR_PVDConfig HAL_PWR_ConfigPVD |
| 1104 | #define HAL_PWR_DisableBkUpReg HAL_PWREx_DisableBkUpReg |
1581 | #define HAL_PWR_DisableBkUpReg HAL_PWREx_DisableBkUpReg |
| 1105 | #define HAL_PWR_DisableFlashPowerDown HAL_PWREx_DisableFlashPowerDown |
1582 | #define HAL_PWR_DisableFlashPowerDown HAL_PWREx_DisableFlashPowerDown |
| 1106 | #define HAL_PWR_DisableVddio2Monitor HAL_PWREx_DisableVddio2Monitor |
1583 | #define HAL_PWR_DisableVddio2Monitor HAL_PWREx_DisableVddio2Monitor |
| 1107 | #define HAL_PWR_EnableBkUpReg HAL_PWREx_EnableBkUpReg |
1584 | #define HAL_PWR_EnableBkUpReg HAL_PWREx_EnableBkUpReg |
| Line 1125... | Line 1602... | ||
| 1125 | #define PWR_MODE_EVENT_FALLING PWR_PVD_MODE_EVENT_FALLING |
1602 | #define PWR_MODE_EVENT_FALLING PWR_PVD_MODE_EVENT_FALLING |
| 1126 | #define PWR_MODE_EVENT_RISING_FALLING PWR_PVD_MODE_EVENT_RISING_FALLING |
1603 | #define PWR_MODE_EVENT_RISING_FALLING PWR_PVD_MODE_EVENT_RISING_FALLING |
| 1127 | 1604 | ||
| 1128 | #define CR_OFFSET_BB PWR_CR_OFFSET_BB |
1605 | #define CR_OFFSET_BB PWR_CR_OFFSET_BB |
| 1129 | #define CSR_OFFSET_BB PWR_CSR_OFFSET_BB |
1606 | #define CSR_OFFSET_BB PWR_CSR_OFFSET_BB |
| - | 1607 | #define PMODE_BIT_NUMBER VOS_BIT_NUMBER |
|
| - | 1608 | #define CR_PMODE_BB CR_VOS_BB |
|
| 1130 | 1609 | ||
| 1131 | #define DBP_BitNumber DBP_BIT_NUMBER |
1610 | #define DBP_BitNumber DBP_BIT_NUMBER |
| 1132 | #define PVDE_BitNumber PVDE_BIT_NUMBER |
1611 | #define PVDE_BitNumber PVDE_BIT_NUMBER |
| 1133 | #define PMODE_BitNumber PMODE_BIT_NUMBER |
1612 | #define PMODE_BitNumber PMODE_BIT_NUMBER |
| 1134 | #define EWUP_BitNumber EWUP_BIT_NUMBER |
1613 | #define EWUP_BitNumber EWUP_BIT_NUMBER |
| Line 1138... | Line 1617... | ||
| 1138 | #define MRLVDS_BitNumber MRLVDS_BIT_NUMBER |
1617 | #define MRLVDS_BitNumber MRLVDS_BIT_NUMBER |
| 1139 | #define LPLVDS_BitNumber LPLVDS_BIT_NUMBER |
1618 | #define LPLVDS_BitNumber LPLVDS_BIT_NUMBER |
| 1140 | #define BRE_BitNumber BRE_BIT_NUMBER |
1619 | #define BRE_BitNumber BRE_BIT_NUMBER |
| 1141 | 1620 | ||
| 1142 | #define PWR_MODE_EVT PWR_PVD_MODE_NORMAL |
1621 | #define PWR_MODE_EVT PWR_PVD_MODE_NORMAL |
| 1143 | 1622 | ||
| 1144 | /** |
1623 | /** |
| 1145 | * @} |
1624 | * @} |
| 1146 | */ |
1625 | */ |
| 1147 | 1626 | ||
| 1148 | /** @defgroup HAL_SMBUS_Aliased_Functions HAL SMBUS Aliased Functions maintained for legacy purpose |
1627 | /** @defgroup HAL_SMBUS_Aliased_Functions HAL SMBUS Aliased Functions maintained for legacy purpose |
| 1149 | * @{ |
1628 | * @{ |
| 1150 | */ |
1629 | */ |
| 1151 | #define HAL_SMBUS_Slave_Listen_IT HAL_SMBUS_EnableListen_IT |
1630 | #define HAL_SMBUS_Slave_Listen_IT HAL_SMBUS_EnableListen_IT |
| 1152 | #define HAL_SMBUS_SlaveAddrCallback HAL_SMBUS_AddrCallback |
1631 | #define HAL_SMBUS_SlaveAddrCallback HAL_SMBUS_AddrCallback |
| 1153 | #define HAL_SMBUS_SlaveListenCpltCallback HAL_SMBUS_ListenCpltCallback |
1632 | #define HAL_SMBUS_SlaveListenCpltCallback HAL_SMBUS_ListenCpltCallback |
| 1154 | /** |
1633 | /** |
| 1155 | * @} |
1634 | * @} |
| 1156 | */ |
1635 | */ |
| 1157 | 1636 | ||
| 1158 | /** @defgroup HAL_SPI_Aliased_Functions HAL SPI Aliased Functions maintained for legacy purpose |
1637 | /** @defgroup HAL_SPI_Aliased_Functions HAL SPI Aliased Functions maintained for legacy purpose |
| 1159 | * @{ |
1638 | * @{ |
| 1160 | */ |
1639 | */ |
| 1161 | #define HAL_SPI_FlushRxFifo HAL_SPIEx_FlushRxFifo |
1640 | #define HAL_SPI_FlushRxFifo HAL_SPIEx_FlushRxFifo |
| 1162 | /** |
1641 | /** |
| 1163 | * @} |
1642 | * @} |
| 1164 | */ |
1643 | */ |
| 1165 | 1644 | ||
| 1166 | /** @defgroup HAL_TIM_Aliased_Functions HAL TIM Aliased Functions maintained for legacy purpose |
1645 | /** @defgroup HAL_TIM_Aliased_Functions HAL TIM Aliased Functions maintained for legacy purpose |
| 1167 | * @{ |
1646 | * @{ |
| 1168 | */ |
1647 | */ |
| 1169 | #define HAL_TIM_DMADelayPulseCplt TIM_DMADelayPulseCplt |
1648 | #define HAL_TIM_DMADelayPulseCplt TIM_DMADelayPulseCplt |
| 1170 | #define HAL_TIM_DMAError TIM_DMAError |
1649 | #define HAL_TIM_DMAError TIM_DMAError |
| 1171 | #define HAL_TIM_DMACaptureCplt TIM_DMACaptureCplt |
1650 | #define HAL_TIM_DMACaptureCplt TIM_DMACaptureCplt |
| 1172 | #define HAL_TIMEx_DMACommutationCplt TIMEx_DMACommutationCplt |
1651 | #define HAL_TIMEx_DMACommutationCplt TIMEx_DMACommutationCplt |
| - | 1652 | #if defined(STM32H7) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) |
|
| - | 1653 | #define HAL_TIM_SlaveConfigSynchronization HAL_TIM_SlaveConfigSynchro |
|
| - | 1654 | #define HAL_TIM_SlaveConfigSynchronization_IT HAL_TIM_SlaveConfigSynchro_IT |
|
| - | 1655 | #define HAL_TIMEx_CommutationCallback HAL_TIMEx_CommutCallback |
|
| - | 1656 | #define HAL_TIMEx_ConfigCommutationEvent HAL_TIMEx_ConfigCommutEvent |
|
| - | 1657 | #define HAL_TIMEx_ConfigCommutationEvent_IT HAL_TIMEx_ConfigCommutEvent_IT |
|
| - | 1658 | #define HAL_TIMEx_ConfigCommutationEvent_DMA HAL_TIMEx_ConfigCommutEvent_DMA |
|
| - | 1659 | #endif /* STM32H7 || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 */ |
|
| 1173 | /** |
1660 | /** |
| 1174 | * @} |
1661 | * @} |
| 1175 | */ |
1662 | */ |
| 1176 | 1663 | ||
| 1177 | /** @defgroup HAL_UART_Aliased_Functions HAL UART Aliased Functions maintained for legacy purpose |
1664 | /** @defgroup HAL_UART_Aliased_Functions HAL UART Aliased Functions maintained for legacy purpose |
| 1178 | * @{ |
1665 | * @{ |
| 1179 | */ |
1666 | */ |
| 1180 | #define HAL_UART_WakeupCallback HAL_UARTEx_WakeupCallback |
1667 | #define HAL_UART_WakeupCallback HAL_UARTEx_WakeupCallback |
| 1181 | /** |
1668 | /** |
| 1182 | * @} |
1669 | * @} |
| 1183 | */ |
1670 | */ |
| 1184 | 1671 | ||
| 1185 | /** @defgroup HAL_LTDC_Aliased_Functions HAL LTDC Aliased Functions maintained for legacy purpose |
1672 | /** @defgroup HAL_LTDC_Aliased_Functions HAL LTDC Aliased Functions maintained for legacy purpose |
| 1186 | * @{ |
1673 | * @{ |
| 1187 | */ |
1674 | */ |
| 1188 | #define HAL_LTDC_LineEvenCallback HAL_LTDC_LineEventCallback |
1675 | #define HAL_LTDC_LineEvenCallback HAL_LTDC_LineEventCallback |
| - | 1676 | #define HAL_LTDC_Relaod HAL_LTDC_Reload |
|
| - | 1677 | #define HAL_LTDC_StructInitFromVideoConfig HAL_LTDCEx_StructInitFromVideoConfig |
|
| - | 1678 | #define HAL_LTDC_StructInitFromAdaptedCommandConfig HAL_LTDCEx_StructInitFromAdaptedCommandConfig |
|
| 1189 | /** |
1679 | /** |
| 1190 | * @} |
1680 | * @} |
| 1191 | */ |
1681 | */ |
| 1192 | 1682 | ||
| 1193 | 1683 | ||
| 1194 | /** @defgroup HAL_PPP_Aliased_Functions HAL PPP Aliased Functions maintained for legacy purpose |
1684 | /** @defgroup HAL_PPP_Aliased_Functions HAL PPP Aliased Functions maintained for legacy purpose |
| 1195 | * @{ |
1685 | * @{ |
| 1196 | */ |
1686 | */ |
| 1197 | 1687 | ||
| 1198 | /** |
1688 | /** |
| 1199 | * @} |
1689 | * @} |
| 1200 | */ |
1690 | */ |
| 1201 | 1691 | ||
| 1202 | /* Exported macros ------------------------------------------------------------*/ |
1692 | /* Exported macros ------------------------------------------------------------*/ |
| Line 1207... | Line 1697... | ||
| 1207 | #define AES_IT_CC CRYP_IT_CC |
1697 | #define AES_IT_CC CRYP_IT_CC |
| 1208 | #define AES_IT_ERR CRYP_IT_ERR |
1698 | #define AES_IT_ERR CRYP_IT_ERR |
| 1209 | #define AES_FLAG_CCF CRYP_FLAG_CCF |
1699 | #define AES_FLAG_CCF CRYP_FLAG_CCF |
| 1210 | /** |
1700 | /** |
| 1211 | * @} |
1701 | * @} |
| 1212 | */ |
1702 | */ |
| 1213 | 1703 | ||
| 1214 | /** @defgroup HAL_Aliased_Macros HAL Generic Aliased Macros maintained for legacy purpose |
1704 | /** @defgroup HAL_Aliased_Macros HAL Generic Aliased Macros maintained for legacy purpose |
| 1215 | * @{ |
1705 | * @{ |
| 1216 | */ |
1706 | */ |
| 1217 | #define __HAL_GET_BOOT_MODE __HAL_SYSCFG_GET_BOOT_MODE |
1707 | #define __HAL_GET_BOOT_MODE __HAL_SYSCFG_GET_BOOT_MODE |
| 1218 | #define __HAL_REMAPMEMORY_FLASH __HAL_SYSCFG_REMAPMEMORY_FLASH |
1708 | #define __HAL_REMAPMEMORY_FLASH __HAL_SYSCFG_REMAPMEMORY_FLASH |
| 1219 | #define __HAL_REMAPMEMORY_SYSTEMFLASH __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH |
1709 | #define __HAL_REMAPMEMORY_SYSTEMFLASH __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH |
| 1220 | #define __HAL_REMAPMEMORY_SRAM __HAL_SYSCFG_REMAPMEMORY_SRAM |
1710 | #define __HAL_REMAPMEMORY_SRAM __HAL_SYSCFG_REMAPMEMORY_SRAM |
| 1221 | #define __HAL_REMAPMEMORY_FMC __HAL_SYSCFG_REMAPMEMORY_FMC |
1711 | #define __HAL_REMAPMEMORY_FMC __HAL_SYSCFG_REMAPMEMORY_FMC |
| 1222 | #define __HAL_REMAPMEMORY_FMC_SDRAM __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM |
1712 | #define __HAL_REMAPMEMORY_FMC_SDRAM __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM |
| 1223 | #define __HAL_REMAPMEMORY_FSMC __HAL_SYSCFG_REMAPMEMORY_FSMC |
1713 | #define __HAL_REMAPMEMORY_FSMC __HAL_SYSCFG_REMAPMEMORY_FSMC |
| 1224 | #define __HAL_REMAPMEMORY_QUADSPI __HAL_SYSCFG_REMAPMEMORY_QUADSPI |
1714 | #define __HAL_REMAPMEMORY_QUADSPI __HAL_SYSCFG_REMAPMEMORY_QUADSPI |
| 1225 | #define __HAL_FMC_BANK __HAL_SYSCFG_FMC_BANK |
1715 | #define __HAL_FMC_BANK __HAL_SYSCFG_FMC_BANK |
| 1226 | #define __HAL_GET_FLAG __HAL_SYSCFG_GET_FLAG |
1716 | #define __HAL_GET_FLAG __HAL_SYSCFG_GET_FLAG |
| 1227 | #define __HAL_CLEAR_FLAG __HAL_SYSCFG_CLEAR_FLAG |
1717 | #define __HAL_CLEAR_FLAG __HAL_SYSCFG_CLEAR_FLAG |
| 1228 | #define __HAL_VREFINT_OUT_ENABLE __HAL_SYSCFG_VREFINT_OUT_ENABLE |
1718 | #define __HAL_VREFINT_OUT_ENABLE __HAL_SYSCFG_VREFINT_OUT_ENABLE |
| 1229 | #define __HAL_VREFINT_OUT_DISABLE __HAL_SYSCFG_VREFINT_OUT_DISABLE |
1719 | #define __HAL_VREFINT_OUT_DISABLE __HAL_SYSCFG_VREFINT_OUT_DISABLE |
| - | 1720 | #define __HAL_SYSCFG_SRAM2_WRP_ENABLE __HAL_SYSCFG_SRAM2_WRP_0_31_ENABLE |
|
| 1230 | 1721 | ||
| 1231 | #define SYSCFG_FLAG_VREF_READY SYSCFG_FLAG_VREFINT_READY |
1722 | #define SYSCFG_FLAG_VREF_READY SYSCFG_FLAG_VREFINT_READY |
| 1232 | #define SYSCFG_FLAG_RC48 RCC_FLAG_HSI48 |
1723 | #define SYSCFG_FLAG_RC48 RCC_FLAG_HSI48 |
| 1233 | #define IS_SYSCFG_FASTMODEPLUS_CONFIG IS_I2C_FASTMODEPLUS |
1724 | #define IS_SYSCFG_FASTMODEPLUS_CONFIG IS_I2C_FASTMODEPLUS |
| 1234 | #define UFB_MODE_BitNumber UFB_MODE_BIT_NUMBER |
1725 | #define UFB_MODE_BitNumber UFB_MODE_BIT_NUMBER |
| Line 1236... | Line 1727... | ||
| 1236 | 1727 | ||
| 1237 | /** |
1728 | /** |
| 1238 | * @} |
1729 | * @} |
| 1239 | */ |
1730 | */ |
| 1240 | 1731 | ||
| 1241 | 1732 | ||
| 1242 | /** @defgroup HAL_ADC_Aliased_Macros HAL ADC Aliased Macros maintained for legacy purpose |
1733 | /** @defgroup HAL_ADC_Aliased_Macros HAL ADC Aliased Macros maintained for legacy purpose |
| 1243 | * @{ |
1734 | * @{ |
| 1244 | */ |
1735 | */ |
| 1245 | #define __ADC_ENABLE __HAL_ADC_ENABLE |
1736 | #define __ADC_ENABLE __HAL_ADC_ENABLE |
| 1246 | #define __ADC_DISABLE __HAL_ADC_DISABLE |
1737 | #define __ADC_DISABLE __HAL_ADC_DISABLE |
| Line 1306... | Line 1797... | ||
| 1306 | #define __HAL_ADC_CR2_CONTINUOUS ADC_CR2_CONTINUOUS |
1797 | #define __HAL_ADC_CR2_CONTINUOUS ADC_CR2_CONTINUOUS |
| 1307 | #define __HAL_ADC_CR1_DISCONTINUOUS ADC_CR1_DISCONTINUOUS |
1798 | #define __HAL_ADC_CR1_DISCONTINUOUS ADC_CR1_DISCONTINUOUS |
| 1308 | #define __HAL_ADC_CR1_SCANCONV ADC_CR1_SCANCONV |
1799 | #define __HAL_ADC_CR1_SCANCONV ADC_CR1_SCANCONV |
| 1309 | #define __HAL_ADC_CR2_EOCSelection ADC_CR2_EOCSelection |
1800 | #define __HAL_ADC_CR2_EOCSelection ADC_CR2_EOCSelection |
| 1310 | #define __HAL_ADC_CR2_DMAContReq ADC_CR2_DMAContReq |
1801 | #define __HAL_ADC_CR2_DMAContReq ADC_CR2_DMAContReq |
| 1311 | #define __HAL_ADC_GET_RESOLUTION ADC_GET_RESOLUTION |
- | |
| 1312 | #define __HAL_ADC_JSQR ADC_JSQR |
1802 | #define __HAL_ADC_JSQR ADC_JSQR |
| 1313 | 1803 | ||
| 1314 | #define __HAL_ADC_CHSELR_CHANNEL ADC_CHSELR_CHANNEL |
1804 | #define __HAL_ADC_CHSELR_CHANNEL ADC_CHSELR_CHANNEL |
| 1315 | #define __HAL_ADC_CFGR1_REG_DISCCONTINUOUS ADC_CFGR1_REG_DISCCONTINUOUS |
1805 | #define __HAL_ADC_CFGR1_REG_DISCCONTINUOUS ADC_CFGR1_REG_DISCCONTINUOUS |
| 1316 | #define __HAL_ADC_CFGR1_AUTOOFF ADC_CFGR1_AUTOOFF |
1806 | #define __HAL_ADC_CFGR1_AUTOOFF ADC_CFGR1_AUTOOFF |
| Line 1333... | Line 1823... | ||
| 1333 | #define IS_DAC_GENERATE_WAVE IS_DAC_WAVE |
1823 | #define IS_DAC_GENERATE_WAVE IS_DAC_WAVE |
| 1334 | 1824 | ||
| 1335 | /** |
1825 | /** |
| 1336 | * @} |
1826 | * @} |
| 1337 | */ |
1827 | */ |
| 1338 | 1828 | ||
| 1339 | /** @defgroup HAL_DBGMCU_Aliased_Macros HAL DBGMCU Aliased Macros maintained for legacy purpose |
1829 | /** @defgroup HAL_DBGMCU_Aliased_Macros HAL DBGMCU Aliased Macros maintained for legacy purpose |
| 1340 | * @{ |
1830 | * @{ |
| 1341 | */ |
1831 | */ |
| 1342 | #define __HAL_FREEZE_TIM1_DBGMCU __HAL_DBGMCU_FREEZE_TIM1 |
1832 | #define __HAL_FREEZE_TIM1_DBGMCU __HAL_DBGMCU_FREEZE_TIM1 |
| 1343 | #define __HAL_UNFREEZE_TIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM1 |
1833 | #define __HAL_UNFREEZE_TIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM1 |
| Line 1378... | Line 1868... | ||
| 1378 | #define __HAL_UNFREEZE_TIM16_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM16 |
1868 | #define __HAL_UNFREEZE_TIM16_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM16 |
| 1379 | #define __HAL_FREEZE_TIM17_DBGMCU __HAL_DBGMCU_FREEZE_TIM17 |
1869 | #define __HAL_FREEZE_TIM17_DBGMCU __HAL_DBGMCU_FREEZE_TIM17 |
| 1380 | #define __HAL_UNFREEZE_TIM17_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM17 |
1870 | #define __HAL_UNFREEZE_TIM17_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM17 |
| 1381 | #define __HAL_FREEZE_RTC_DBGMCU __HAL_DBGMCU_FREEZE_RTC |
1871 | #define __HAL_FREEZE_RTC_DBGMCU __HAL_DBGMCU_FREEZE_RTC |
| 1382 | #define __HAL_UNFREEZE_RTC_DBGMCU __HAL_DBGMCU_UNFREEZE_RTC |
1872 | #define __HAL_UNFREEZE_RTC_DBGMCU __HAL_DBGMCU_UNFREEZE_RTC |
| - | 1873 | #if defined(STM32H7) |
|
| - | 1874 | #define __HAL_FREEZE_WWDG_DBGMCU __HAL_DBGMCU_FREEZE_WWDG1 |
|
| - | 1875 | #define __HAL_UNFREEZE_WWDG_DBGMCU __HAL_DBGMCU_UnFreeze_WWDG1 |
|
| - | 1876 | #define __HAL_FREEZE_IWDG_DBGMCU __HAL_DBGMCU_FREEZE_IWDG1 |
|
| - | 1877 | #define __HAL_UNFREEZE_IWDG_DBGMCU __HAL_DBGMCU_UnFreeze_IWDG1 |
|
| - | 1878 | #else |
|
| 1383 | #define __HAL_FREEZE_WWDG_DBGMCU __HAL_DBGMCU_FREEZE_WWDG |
1879 | #define __HAL_FREEZE_WWDG_DBGMCU __HAL_DBGMCU_FREEZE_WWDG |
| 1384 | #define __HAL_UNFREEZE_WWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_WWDG |
1880 | #define __HAL_UNFREEZE_WWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_WWDG |
| 1385 | #define __HAL_FREEZE_IWDG_DBGMCU __HAL_DBGMCU_FREEZE_IWDG |
1881 | #define __HAL_FREEZE_IWDG_DBGMCU __HAL_DBGMCU_FREEZE_IWDG |
| 1386 | #define __HAL_UNFREEZE_IWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_IWDG |
1882 | #define __HAL_UNFREEZE_IWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_IWDG |
| - | 1883 | #endif /* STM32H7 */ |
|
| 1387 | #define __HAL_FREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT |
1884 | #define __HAL_FREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT |
| 1388 | #define __HAL_UNFREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT |
1885 | #define __HAL_UNFREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT |
| 1389 | #define __HAL_FREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT |
1886 | #define __HAL_FREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT |
| 1390 | #define __HAL_UNFREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT |
1887 | #define __HAL_UNFREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT |
| 1391 | #define __HAL_FREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT |
1888 | #define __HAL_FREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT |
| Line 1406... | Line 1903... | ||
| 1406 | */ |
1903 | */ |
| 1407 | #if defined(STM32F3) |
1904 | #if defined(STM32F3) |
| 1408 | #define COMP_START __HAL_COMP_ENABLE |
1905 | #define COMP_START __HAL_COMP_ENABLE |
| 1409 | #define COMP_STOP __HAL_COMP_DISABLE |
1906 | #define COMP_STOP __HAL_COMP_DISABLE |
| 1410 | #define COMP_LOCK __HAL_COMP_LOCK |
1907 | #define COMP_LOCK __HAL_COMP_LOCK |
| 1411 | 1908 | ||
| 1412 | #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) |
1909 | #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) |
| 1413 | #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \ |
1910 | #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \ |
| 1414 | ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \ |
1911 | ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \ |
| 1415 | __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE()) |
1912 | __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE()) |
| 1416 | #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \ |
1913 | #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \ |
| Line 1593... | Line 2090... | ||
| 1593 | */ |
2090 | */ |
| 1594 | 2091 | ||
| 1595 | #define IS_DAC_WAVE(WAVE) (((WAVE) == DAC_WAVE_NONE) || \ |
2092 | #define IS_DAC_WAVE(WAVE) (((WAVE) == DAC_WAVE_NONE) || \ |
| 1596 | ((WAVE) == DAC_WAVE_NOISE)|| \ |
2093 | ((WAVE) == DAC_WAVE_NOISE)|| \ |
| 1597 | ((WAVE) == DAC_WAVE_TRIANGLE)) |
2094 | ((WAVE) == DAC_WAVE_TRIANGLE)) |
| 1598 | 2095 | ||
| 1599 | /** |
2096 | /** |
| 1600 | * @} |
2097 | * @} |
| 1601 | */ |
2098 | */ |
| 1602 | 2099 | ||
| 1603 | /** @defgroup HAL_FLASH_Aliased_Macros HAL FLASH Aliased Macros maintained for legacy purpose |
2100 | /** @defgroup HAL_FLASH_Aliased_Macros HAL FLASH Aliased Macros maintained for legacy purpose |
| Line 1612... | Line 2109... | ||
| 1612 | #define IS_OB_WDG_SOURCE IS_OB_IWDG_SOURCE |
2109 | #define IS_OB_WDG_SOURCE IS_OB_IWDG_SOURCE |
| 1613 | 2110 | ||
| 1614 | /** |
2111 | /** |
| 1615 | * @} |
2112 | * @} |
| 1616 | */ |
2113 | */ |
| 1617 | 2114 | ||
| 1618 | /** @defgroup HAL_I2C_Aliased_Macros HAL I2C Aliased Macros maintained for legacy purpose |
2115 | /** @defgroup HAL_I2C_Aliased_Macros HAL I2C Aliased Macros maintained for legacy purpose |
| 1619 | * @{ |
2116 | * @{ |
| 1620 | */ |
2117 | */ |
| 1621 | 2118 | ||
| 1622 | #define __HAL_I2C_RESET_CR2 I2C_RESET_CR2 |
2119 | #define __HAL_I2C_RESET_CR2 I2C_RESET_CR2 |
| 1623 | #define __HAL_I2C_GENERATE_START I2C_GENERATE_START |
2120 | #define __HAL_I2C_GENERATE_START I2C_GENERATE_START |
| - | 2121 | #if defined(STM32F1) |
|
| - | 2122 | #define __HAL_I2C_FREQ_RANGE I2C_FREQRANGE |
|
| - | 2123 | #else |
|
| 1624 | #define __HAL_I2C_FREQ_RANGE I2C_FREQ_RANGE |
2124 | #define __HAL_I2C_FREQ_RANGE I2C_FREQ_RANGE |
| - | 2125 | #endif /* STM32F1 */ |
|
| 1625 | #define __HAL_I2C_RISE_TIME I2C_RISE_TIME |
2126 | #define __HAL_I2C_RISE_TIME I2C_RISE_TIME |
| 1626 | #define __HAL_I2C_SPEED_STANDARD I2C_SPEED_STANDARD |
2127 | #define __HAL_I2C_SPEED_STANDARD I2C_SPEED_STANDARD |
| 1627 | #define __HAL_I2C_SPEED_FAST I2C_SPEED_FAST |
2128 | #define __HAL_I2C_SPEED_FAST I2C_SPEED_FAST |
| 1628 | #define __HAL_I2C_SPEED I2C_SPEED |
2129 | #define __HAL_I2C_SPEED I2C_SPEED |
| 1629 | #define __HAL_I2C_7BIT_ADD_WRITE I2C_7BIT_ADD_WRITE |
2130 | #define __HAL_I2C_7BIT_ADD_WRITE I2C_7BIT_ADD_WRITE |
| Line 1635... | Line 2136... | ||
| 1635 | #define __HAL_I2C_MEM_ADD_LSB I2C_MEM_ADD_LSB |
2136 | #define __HAL_I2C_MEM_ADD_LSB I2C_MEM_ADD_LSB |
| 1636 | #define __HAL_I2C_FREQRANGE I2C_FREQRANGE |
2137 | #define __HAL_I2C_FREQRANGE I2C_FREQRANGE |
| 1637 | /** |
2138 | /** |
| 1638 | * @} |
2139 | * @} |
| 1639 | */ |
2140 | */ |
| 1640 | 2141 | ||
| 1641 | /** @defgroup HAL_I2S_Aliased_Macros HAL I2S Aliased Macros maintained for legacy purpose |
2142 | /** @defgroup HAL_I2S_Aliased_Macros HAL I2S Aliased Macros maintained for legacy purpose |
| 1642 | * @{ |
2143 | * @{ |
| 1643 | */ |
2144 | */ |
| 1644 | 2145 | ||
| 1645 | #define IS_I2S_INSTANCE IS_I2S_ALL_INSTANCE |
2146 | #define IS_I2S_INSTANCE IS_I2S_ALL_INSTANCE |
| 1646 | #define IS_I2S_INSTANCE_EXT IS_I2S_ALL_INSTANCE_EXT |
2147 | #define IS_I2S_INSTANCE_EXT IS_I2S_ALL_INSTANCE_EXT |
| 1647 | 2148 | ||
| - | 2149 | #if defined(STM32H7) |
|
| - | 2150 | #define __HAL_I2S_CLEAR_FREFLAG __HAL_I2S_CLEAR_TIFREFLAG |
|
| - | 2151 | #endif |
|
| - | 2152 | ||
| 1648 | /** |
2153 | /** |
| 1649 | * @} |
2154 | * @} |
| 1650 | */ |
2155 | */ |
| 1651 | 2156 | ||
| 1652 | /** @defgroup HAL_IRDA_Aliased_Macros HAL IRDA Aliased Macros maintained for legacy purpose |
2157 | /** @defgroup HAL_IRDA_Aliased_Macros HAL IRDA Aliased Macros maintained for legacy purpose |
| 1653 | * @{ |
2158 | * @{ |
| 1654 | */ |
2159 | */ |
| 1655 | 2160 | ||
| 1656 | #define __IRDA_DISABLE __HAL_IRDA_DISABLE |
2161 | #define __IRDA_DISABLE __HAL_IRDA_DISABLE |
| 1657 | #define __IRDA_ENABLE __HAL_IRDA_ENABLE |
2162 | #define __IRDA_ENABLE __HAL_IRDA_ENABLE |
| 1658 | 2163 | ||
| 1659 | #define __HAL_IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE |
2164 | #define __HAL_IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE |
| 1660 | #define __HAL_IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION |
2165 | #define __HAL_IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION |
| 1661 | #define __IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE |
2166 | #define __IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE |
| 1662 | #define __IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION |
2167 | #define __IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION |
| 1663 | 2168 | ||
| 1664 | #define IS_IRDA_ONEBIT_SAMPLE IS_IRDA_ONE_BIT_SAMPLE |
2169 | #define IS_IRDA_ONEBIT_SAMPLE IS_IRDA_ONE_BIT_SAMPLE |
| 1665 | 2170 | ||
| 1666 | 2171 | ||
| 1667 | /** |
2172 | /** |
| 1668 | * @} |
2173 | * @} |
| 1669 | */ |
2174 | */ |
| Line 1688... | Line 2193... | ||
| 1688 | #define __HAL_LPTIM_GET_ITSTATUS __HAL_LPTIM_GET_IT_SOURCE |
2193 | #define __HAL_LPTIM_GET_ITSTATUS __HAL_LPTIM_GET_IT_SOURCE |
| 1689 | 2194 | ||
| 1690 | /** |
2195 | /** |
| 1691 | * @} |
2196 | * @} |
| 1692 | */ |
2197 | */ |
| 1693 | 2198 | ||
| 1694 | 2199 | ||
| 1695 | /** @defgroup HAL_OPAMP_Aliased_Macros HAL OPAMP Aliased Macros maintained for legacy purpose |
2200 | /** @defgroup HAL_OPAMP_Aliased_Macros HAL OPAMP Aliased Macros maintained for legacy purpose |
| 1696 | * @{ |
2201 | * @{ |
| 1697 | */ |
2202 | */ |
| 1698 | #define __OPAMP_CSR_OPAXPD OPAMP_CSR_OPAXPD |
2203 | #define __OPAMP_CSR_OPAXPD OPAMP_CSR_OPAXPD |
| 1699 | #define __OPAMP_CSR_S3SELX OPAMP_CSR_S3SELX |
2204 | #define __OPAMP_CSR_S3SELX OPAMP_CSR_S3SELX |
| Line 1754... | Line 2259... | ||
| 1754 | #define __HAL_PWR_VDDUSB_ENABLE HAL_PWREx_EnableVddUSB |
2259 | #define __HAL_PWR_VDDUSB_ENABLE HAL_PWREx_EnableVddUSB |
| 1755 | 2260 | ||
| 1756 | #if defined (STM32F4) |
2261 | #if defined (STM32F4) |
| 1757 | #define __HAL_PVD_EXTI_ENABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_ENABLE_IT() |
2262 | #define __HAL_PVD_EXTI_ENABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_ENABLE_IT() |
| 1758 | #define __HAL_PVD_EXTI_DISABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_DISABLE_IT() |
2263 | #define __HAL_PVD_EXTI_DISABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_DISABLE_IT() |
| 1759 | #define __HAL_PVD_EXTI_GET_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GET_FLAG() |
2264 | #define __HAL_PVD_EXTI_GET_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GET_FLAG() |
| 1760 | #define __HAL_PVD_EXTI_CLEAR_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_CLEAR_FLAG() |
2265 | #define __HAL_PVD_EXTI_CLEAR_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_CLEAR_FLAG() |
| 1761 | #define __HAL_PVD_EXTI_GENERATE_SWIT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GENERATE_SWIT() |
2266 | #define __HAL_PVD_EXTI_GENERATE_SWIT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GENERATE_SWIT() |
| 1762 | #else |
2267 | #else |
| 1763 | #define __HAL_PVD_EXTI_CLEAR_FLAG __HAL_PWR_PVD_EXTI_CLEAR_FLAG |
2268 | #define __HAL_PVD_EXTI_CLEAR_FLAG __HAL_PWR_PVD_EXTI_CLEAR_FLAG |
| 1764 | #define __HAL_PVD_EXTI_DISABLE_IT __HAL_PWR_PVD_EXTI_DISABLE_IT |
2269 | #define __HAL_PVD_EXTI_DISABLE_IT __HAL_PWR_PVD_EXTI_DISABLE_IT |
| 1765 | #define __HAL_PVD_EXTI_ENABLE_IT __HAL_PWR_PVD_EXTI_ENABLE_IT |
2270 | #define __HAL_PVD_EXTI_ENABLE_IT __HAL_PWR_PVD_EXTI_ENABLE_IT |
| 1766 | #define __HAL_PVD_EXTI_GENERATE_SWIT __HAL_PWR_PVD_EXTI_GENERATE_SWIT |
2271 | #define __HAL_PVD_EXTI_GENERATE_SWIT __HAL_PWR_PVD_EXTI_GENERATE_SWIT |
| 1767 | #define __HAL_PVD_EXTI_GET_FLAG __HAL_PWR_PVD_EXTI_GET_FLAG |
2272 | #define __HAL_PVD_EXTI_GET_FLAG __HAL_PWR_PVD_EXTI_GET_FLAG |
| 1768 | #endif /* STM32F4 */ |
2273 | #endif /* STM32F4 */ |
| 1769 | /** |
2274 | /** |
| 1770 | * @} |
2275 | * @} |
| 1771 | */ |
2276 | */ |
| 1772 | 2277 | ||
| 1773 | 2278 | ||
| 1774 | /** @defgroup HAL_RCC_Aliased HAL RCC Aliased maintained for legacy purpose |
2279 | /** @defgroup HAL_RCC_Aliased HAL RCC Aliased maintained for legacy purpose |
| 1775 | * @{ |
2280 | * @{ |
| 1776 | */ |
2281 | */ |
| 1777 | 2282 | ||
| 1778 | #define RCC_StopWakeUpClock_MSI RCC_STOP_WAKEUPCLOCK_MSI |
2283 | #define RCC_StopWakeUpClock_MSI RCC_STOP_WAKEUPCLOCK_MSI |
| 1779 | #define RCC_StopWakeUpClock_HSI RCC_STOP_WAKEUPCLOCK_HSI |
2284 | #define RCC_StopWakeUpClock_HSI RCC_STOP_WAKEUPCLOCK_HSI |
| 1780 | 2285 | ||
| 1781 | #define HAL_RCC_CCSCallback HAL_RCC_CSSCallback |
2286 | #define HAL_RCC_CCSCallback HAL_RCC_CSSCallback |
| 1782 | #define HAL_RC48_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_RCCEx_EnableHSI48_VREFINT() : HAL_RCCEx_DisableHSI48_VREFINT()) |
2287 | #define HAL_RC48_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_RCCEx_EnableHSI48_VREFINT() : HAL_RCCEx_DisableHSI48_VREFINT()) |
| 1783 | 2288 | ||
| 1784 | #define __ADC_CLK_DISABLE __HAL_RCC_ADC_CLK_DISABLE |
2289 | #define __ADC_CLK_DISABLE __HAL_RCC_ADC_CLK_DISABLE |
| 1785 | #define __ADC_CLK_ENABLE __HAL_RCC_ADC_CLK_ENABLE |
2290 | #define __ADC_CLK_ENABLE __HAL_RCC_ADC_CLK_ENABLE |
| 1786 | #define __ADC_CLK_SLEEP_DISABLE __HAL_RCC_ADC_CLK_SLEEP_DISABLE |
2291 | #define __ADC_CLK_SLEEP_DISABLE __HAL_RCC_ADC_CLK_SLEEP_DISABLE |
| 1787 | #define __ADC_CLK_SLEEP_ENABLE __HAL_RCC_ADC_CLK_SLEEP_ENABLE |
2292 | #define __ADC_CLK_SLEEP_ENABLE __HAL_RCC_ADC_CLK_SLEEP_ENABLE |
| 1788 | #define __ADC_FORCE_RESET __HAL_RCC_ADC_FORCE_RESET |
2293 | #define __ADC_FORCE_RESET __HAL_RCC_ADC_FORCE_RESET |
| 1789 | #define __ADC_RELEASE_RESET __HAL_RCC_ADC_RELEASE_RESET |
2294 | #define __ADC_RELEASE_RESET __HAL_RCC_ADC_RELEASE_RESET |
| 1790 | #define __ADC1_CLK_DISABLE __HAL_RCC_ADC1_CLK_DISABLE |
2295 | #define __ADC1_CLK_DISABLE __HAL_RCC_ADC1_CLK_DISABLE |
| 1791 | #define __ADC1_CLK_ENABLE __HAL_RCC_ADC1_CLK_ENABLE |
2296 | #define __ADC1_CLK_ENABLE __HAL_RCC_ADC1_CLK_ENABLE |
| 1792 | #define __ADC1_FORCE_RESET __HAL_RCC_ADC1_FORCE_RESET |
2297 | #define __ADC1_FORCE_RESET __HAL_RCC_ADC1_FORCE_RESET |
| 1793 | #define __ADC1_RELEASE_RESET __HAL_RCC_ADC1_RELEASE_RESET |
2298 | #define __ADC1_RELEASE_RESET __HAL_RCC_ADC1_RELEASE_RESET |
| 1794 | #define __ADC1_CLK_SLEEP_ENABLE __HAL_RCC_ADC1_CLK_SLEEP_ENABLE |
2299 | #define __ADC1_CLK_SLEEP_ENABLE __HAL_RCC_ADC1_CLK_SLEEP_ENABLE |
| 1795 | #define __ADC1_CLK_SLEEP_DISABLE __HAL_RCC_ADC1_CLK_SLEEP_DISABLE |
2300 | #define __ADC1_CLK_SLEEP_DISABLE __HAL_RCC_ADC1_CLK_SLEEP_DISABLE |
| 1796 | #define __ADC2_CLK_DISABLE __HAL_RCC_ADC2_CLK_DISABLE |
2301 | #define __ADC2_CLK_DISABLE __HAL_RCC_ADC2_CLK_DISABLE |
| 1797 | #define __ADC2_CLK_ENABLE __HAL_RCC_ADC2_CLK_ENABLE |
2302 | #define __ADC2_CLK_ENABLE __HAL_RCC_ADC2_CLK_ENABLE |
| 1798 | #define __ADC2_FORCE_RESET __HAL_RCC_ADC2_FORCE_RESET |
2303 | #define __ADC2_FORCE_RESET __HAL_RCC_ADC2_FORCE_RESET |
| 1799 | #define __ADC2_RELEASE_RESET __HAL_RCC_ADC2_RELEASE_RESET |
2304 | #define __ADC2_RELEASE_RESET __HAL_RCC_ADC2_RELEASE_RESET |
| 1800 | #define __ADC3_CLK_DISABLE __HAL_RCC_ADC3_CLK_DISABLE |
2305 | #define __ADC3_CLK_DISABLE __HAL_RCC_ADC3_CLK_DISABLE |
| 1801 | #define __ADC3_CLK_ENABLE __HAL_RCC_ADC3_CLK_ENABLE |
2306 | #define __ADC3_CLK_ENABLE __HAL_RCC_ADC3_CLK_ENABLE |
| 1802 | #define __ADC3_FORCE_RESET __HAL_RCC_ADC3_FORCE_RESET |
2307 | #define __ADC3_FORCE_RESET __HAL_RCC_ADC3_FORCE_RESET |
| Line 1809... | Line 2314... | ||
| 1809 | #define __AES_RELEASE_RESET __HAL_RCC_AES_RELEASE_RESET |
2314 | #define __AES_RELEASE_RESET __HAL_RCC_AES_RELEASE_RESET |
| 1810 | #define __CRYP_CLK_SLEEP_ENABLE __HAL_RCC_CRYP_CLK_SLEEP_ENABLE |
2315 | #define __CRYP_CLK_SLEEP_ENABLE __HAL_RCC_CRYP_CLK_SLEEP_ENABLE |
| 1811 | #define __CRYP_CLK_SLEEP_DISABLE __HAL_RCC_CRYP_CLK_SLEEP_DISABLE |
2316 | #define __CRYP_CLK_SLEEP_DISABLE __HAL_RCC_CRYP_CLK_SLEEP_DISABLE |
| 1812 | #define __CRYP_CLK_ENABLE __HAL_RCC_CRYP_CLK_ENABLE |
2317 | #define __CRYP_CLK_ENABLE __HAL_RCC_CRYP_CLK_ENABLE |
| 1813 | #define __CRYP_CLK_DISABLE __HAL_RCC_CRYP_CLK_DISABLE |
2318 | #define __CRYP_CLK_DISABLE __HAL_RCC_CRYP_CLK_DISABLE |
| 1814 | #define __CRYP_FORCE_RESET __HAL_RCC_CRYP_FORCE_RESET |
2319 | #define __CRYP_FORCE_RESET __HAL_RCC_CRYP_FORCE_RESET |
| 1815 | #define __CRYP_RELEASE_RESET __HAL_RCC_CRYP_RELEASE_RESET |
2320 | #define __CRYP_RELEASE_RESET __HAL_RCC_CRYP_RELEASE_RESET |
| 1816 | #define __AFIO_CLK_DISABLE __HAL_RCC_AFIO_CLK_DISABLE |
2321 | #define __AFIO_CLK_DISABLE __HAL_RCC_AFIO_CLK_DISABLE |
| 1817 | #define __AFIO_CLK_ENABLE __HAL_RCC_AFIO_CLK_ENABLE |
2322 | #define __AFIO_CLK_ENABLE __HAL_RCC_AFIO_CLK_ENABLE |
| 1818 | #define __AFIO_FORCE_RESET __HAL_RCC_AFIO_FORCE_RESET |
2323 | #define __AFIO_FORCE_RESET __HAL_RCC_AFIO_FORCE_RESET |
| 1819 | #define __AFIO_RELEASE_RESET __HAL_RCC_AFIO_RELEASE_RESET |
2324 | #define __AFIO_RELEASE_RESET __HAL_RCC_AFIO_RELEASE_RESET |
| Line 2037... | Line 2542... | ||
| 2037 | #define __QSPI_CLK_ENABLE __HAL_RCC_QSPI_CLK_ENABLE |
2542 | #define __QSPI_CLK_ENABLE __HAL_RCC_QSPI_CLK_ENABLE |
| 2038 | #define __QSPI_CLK_SLEEP_DISABLE __HAL_RCC_QSPI_CLK_SLEEP_DISABLE |
2543 | #define __QSPI_CLK_SLEEP_DISABLE __HAL_RCC_QSPI_CLK_SLEEP_DISABLE |
| 2039 | #define __QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QSPI_CLK_SLEEP_ENABLE |
2544 | #define __QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QSPI_CLK_SLEEP_ENABLE |
| 2040 | #define __QSPI_FORCE_RESET __HAL_RCC_QSPI_FORCE_RESET |
2545 | #define __QSPI_FORCE_RESET __HAL_RCC_QSPI_FORCE_RESET |
| 2041 | #define __QSPI_RELEASE_RESET __HAL_RCC_QSPI_RELEASE_RESET |
2546 | #define __QSPI_RELEASE_RESET __HAL_RCC_QSPI_RELEASE_RESET |
| - | 2547 | ||
| - | 2548 | #if defined(STM32WB) |
|
| - | 2549 | #define __HAL_RCC_QSPI_CLK_DISABLE __HAL_RCC_QUADSPI_CLK_DISABLE |
|
| - | 2550 | #define __HAL_RCC_QSPI_CLK_ENABLE __HAL_RCC_QUADSPI_CLK_ENABLE |
|
| - | 2551 | #define __HAL_RCC_QSPI_CLK_SLEEP_DISABLE __HAL_RCC_QUADSPI_CLK_SLEEP_DISABLE |
|
| - | 2552 | #define __HAL_RCC_QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QUADSPI_CLK_SLEEP_ENABLE |
|
| - | 2553 | #define __HAL_RCC_QSPI_FORCE_RESET __HAL_RCC_QUADSPI_FORCE_RESET |
|
| - | 2554 | #define __HAL_RCC_QSPI_RELEASE_RESET __HAL_RCC_QUADSPI_RELEASE_RESET |
|
| - | 2555 | #define __HAL_RCC_QSPI_IS_CLK_ENABLED __HAL_RCC_QUADSPI_IS_CLK_ENABLED |
|
| - | 2556 | #define __HAL_RCC_QSPI_IS_CLK_DISABLED __HAL_RCC_QUADSPI_IS_CLK_DISABLED |
|
| - | 2557 | #define __HAL_RCC_QSPI_IS_CLK_SLEEP_ENABLED __HAL_RCC_QUADSPI_IS_CLK_SLEEP_ENABLED |
|
| - | 2558 | #define __HAL_RCC_QSPI_IS_CLK_SLEEP_DISABLED __HAL_RCC_QUADSPI_IS_CLK_SLEEP_DISABLED |
|
| - | 2559 | #define QSPI_IRQHandler QUADSPI_IRQHandler |
|
| - | 2560 | #endif /* __HAL_RCC_QUADSPI_CLK_ENABLE */ |
|
| - | 2561 | ||
| 2042 | #define __RNG_CLK_DISABLE __HAL_RCC_RNG_CLK_DISABLE |
2562 | #define __RNG_CLK_DISABLE __HAL_RCC_RNG_CLK_DISABLE |
| 2043 | #define __RNG_CLK_ENABLE __HAL_RCC_RNG_CLK_ENABLE |
2563 | #define __RNG_CLK_ENABLE __HAL_RCC_RNG_CLK_ENABLE |
| 2044 | #define __RNG_CLK_SLEEP_DISABLE __HAL_RCC_RNG_CLK_SLEEP_DISABLE |
2564 | #define __RNG_CLK_SLEEP_DISABLE __HAL_RCC_RNG_CLK_SLEEP_DISABLE |
| 2045 | #define __RNG_CLK_SLEEP_ENABLE __HAL_RCC_RNG_CLK_SLEEP_ENABLE |
2565 | #define __RNG_CLK_SLEEP_ENABLE __HAL_RCC_RNG_CLK_SLEEP_ENABLE |
| 2046 | #define __RNG_FORCE_RESET __HAL_RCC_RNG_FORCE_RESET |
2566 | #define __RNG_FORCE_RESET __HAL_RCC_RNG_FORCE_RESET |
| Line 2225... | Line 2745... | ||
| 2225 | #define __USART3_CLK_ENABLE __HAL_RCC_USART3_CLK_ENABLE |
2745 | #define __USART3_CLK_ENABLE __HAL_RCC_USART3_CLK_ENABLE |
| 2226 | #define __USART3_CLK_SLEEP_DISABLE __HAL_RCC_USART3_CLK_SLEEP_DISABLE |
2746 | #define __USART3_CLK_SLEEP_DISABLE __HAL_RCC_USART3_CLK_SLEEP_DISABLE |
| 2227 | #define __USART3_CLK_SLEEP_ENABLE __HAL_RCC_USART3_CLK_SLEEP_ENABLE |
2747 | #define __USART3_CLK_SLEEP_ENABLE __HAL_RCC_USART3_CLK_SLEEP_ENABLE |
| 2228 | #define __USART3_FORCE_RESET __HAL_RCC_USART3_FORCE_RESET |
2748 | #define __USART3_FORCE_RESET __HAL_RCC_USART3_FORCE_RESET |
| 2229 | #define __USART3_RELEASE_RESET __HAL_RCC_USART3_RELEASE_RESET |
2749 | #define __USART3_RELEASE_RESET __HAL_RCC_USART3_RELEASE_RESET |
| 2230 | #define __USART4_CLK_DISABLE __HAL_RCC_USART4_CLK_DISABLE |
2750 | #define __USART4_CLK_DISABLE __HAL_RCC_UART4_CLK_DISABLE |
| 2231 | #define __USART4_CLK_ENABLE __HAL_RCC_USART4_CLK_ENABLE |
2751 | #define __USART4_CLK_ENABLE __HAL_RCC_UART4_CLK_ENABLE |
| 2232 | #define __USART4_CLK_SLEEP_ENABLE __HAL_RCC_USART4_CLK_SLEEP_ENABLE |
2752 | #define __USART4_CLK_SLEEP_ENABLE __HAL_RCC_UART4_CLK_SLEEP_ENABLE |
| 2233 | #define __USART4_CLK_SLEEP_DISABLE __HAL_RCC_USART4_CLK_SLEEP_DISABLE |
2753 | #define __USART4_CLK_SLEEP_DISABLE __HAL_RCC_UART4_CLK_SLEEP_DISABLE |
| 2234 | #define __USART4_FORCE_RESET __HAL_RCC_USART4_FORCE_RESET |
2754 | #define __USART4_FORCE_RESET __HAL_RCC_UART4_FORCE_RESET |
| 2235 | #define __USART4_RELEASE_RESET __HAL_RCC_USART4_RELEASE_RESET |
2755 | #define __USART4_RELEASE_RESET __HAL_RCC_UART4_RELEASE_RESET |
| 2236 | #define __USART5_CLK_DISABLE __HAL_RCC_USART5_CLK_DISABLE |
2756 | #define __USART5_CLK_DISABLE __HAL_RCC_UART5_CLK_DISABLE |
| 2237 | #define __USART5_CLK_ENABLE __HAL_RCC_USART5_CLK_ENABLE |
2757 | #define __USART5_CLK_ENABLE __HAL_RCC_UART5_CLK_ENABLE |
| 2238 | #define __USART5_CLK_SLEEP_ENABLE __HAL_RCC_USART5_CLK_SLEEP_ENABLE |
2758 | #define __USART5_CLK_SLEEP_ENABLE __HAL_RCC_UART5_CLK_SLEEP_ENABLE |
| 2239 | #define __USART5_CLK_SLEEP_DISABLE __HAL_RCC_USART5_CLK_SLEEP_DISABLE |
2759 | #define __USART5_CLK_SLEEP_DISABLE __HAL_RCC_UART5_CLK_SLEEP_DISABLE |
| 2240 | #define __USART5_FORCE_RESET __HAL_RCC_USART5_FORCE_RESET |
2760 | #define __USART5_FORCE_RESET __HAL_RCC_UART5_FORCE_RESET |
| 2241 | #define __USART5_RELEASE_RESET __HAL_RCC_USART5_RELEASE_RESET |
2761 | #define __USART5_RELEASE_RESET __HAL_RCC_UART5_RELEASE_RESET |
| 2242 | #define __USART7_CLK_DISABLE __HAL_RCC_USART7_CLK_DISABLE |
2762 | #define __USART7_CLK_DISABLE __HAL_RCC_UART7_CLK_DISABLE |
| 2243 | #define __USART7_CLK_ENABLE __HAL_RCC_USART7_CLK_ENABLE |
2763 | #define __USART7_CLK_ENABLE __HAL_RCC_UART7_CLK_ENABLE |
| 2244 | #define __USART7_FORCE_RESET __HAL_RCC_USART7_FORCE_RESET |
2764 | #define __USART7_FORCE_RESET __HAL_RCC_UART7_FORCE_RESET |
| 2245 | #define __USART7_RELEASE_RESET __HAL_RCC_USART7_RELEASE_RESET |
2765 | #define __USART7_RELEASE_RESET __HAL_RCC_UART7_RELEASE_RESET |
| 2246 | #define __USART8_CLK_DISABLE __HAL_RCC_USART8_CLK_DISABLE |
2766 | #define __USART8_CLK_DISABLE __HAL_RCC_UART8_CLK_DISABLE |
| 2247 | #define __USART8_CLK_ENABLE __HAL_RCC_USART8_CLK_ENABLE |
2767 | #define __USART8_CLK_ENABLE __HAL_RCC_UART8_CLK_ENABLE |
| 2248 | #define __USART8_FORCE_RESET __HAL_RCC_USART8_FORCE_RESET |
2768 | #define __USART8_FORCE_RESET __HAL_RCC_UART8_FORCE_RESET |
| 2249 | #define __USART8_RELEASE_RESET __HAL_RCC_USART8_RELEASE_RESET |
2769 | #define __USART8_RELEASE_RESET __HAL_RCC_UART8_RELEASE_RESET |
| 2250 | #define __USB_CLK_DISABLE __HAL_RCC_USB_CLK_DISABLE |
2770 | #define __USB_CLK_DISABLE __HAL_RCC_USB_CLK_DISABLE |
| 2251 | #define __USB_CLK_ENABLE __HAL_RCC_USB_CLK_ENABLE |
2771 | #define __USB_CLK_ENABLE __HAL_RCC_USB_CLK_ENABLE |
| 2252 | #define __USB_FORCE_RESET __HAL_RCC_USB_FORCE_RESET |
2772 | #define __USB_FORCE_RESET __HAL_RCC_USB_FORCE_RESET |
| 2253 | #define __USB_CLK_SLEEP_ENABLE __HAL_RCC_USB_CLK_SLEEP_ENABLE |
2773 | #define __USB_CLK_SLEEP_ENABLE __HAL_RCC_USB_CLK_SLEEP_ENABLE |
| 2254 | #define __USB_CLK_SLEEP_DISABLE __HAL_RCC_USB_CLK_SLEEP_DISABLE |
2774 | #define __USB_CLK_SLEEP_DISABLE __HAL_RCC_USB_CLK_SLEEP_DISABLE |
| 2255 | #define __USB_OTG_FS_CLK_DISABLE __HAL_RCC_USB_OTG_FS_CLK_DISABLE |
2775 | #define __USB_OTG_FS_CLK_DISABLE __HAL_RCC_USB_OTG_FS_CLK_DISABLE |
| 2256 | #define __USB_OTG_FS_CLK_ENABLE __HAL_RCC_USB_OTG_FS_CLK_ENABLE |
2776 | #define __USB_OTG_FS_CLK_ENABLE __HAL_RCC_USB_OTG_FS_CLK_ENABLE |
| 2257 | #define __USB_RELEASE_RESET __HAL_RCC_USB_RELEASE_RESET |
2777 | #define __USB_RELEASE_RESET __HAL_RCC_USB_RELEASE_RESET |
| - | 2778 | ||
| - | 2779 | #if defined(STM32H7) |
|
| - | 2780 | #define __HAL_RCC_WWDG_CLK_DISABLE __HAL_RCC_WWDG1_CLK_DISABLE |
|
| - | 2781 | #define __HAL_RCC_WWDG_CLK_ENABLE __HAL_RCC_WWDG1_CLK_ENABLE |
|
| - | 2782 | #define __HAL_RCC_WWDG_CLK_SLEEP_DISABLE __HAL_RCC_WWDG1_CLK_SLEEP_DISABLE |
|
| - | 2783 | #define __HAL_RCC_WWDG_CLK_SLEEP_ENABLE __HAL_RCC_WWDG1_CLK_SLEEP_ENABLE |
|
| - | 2784 | ||
| - | 2785 | #define __HAL_RCC_WWDG_FORCE_RESET ((void)0U) /* Not available on the STM32H7*/ |
|
| - | 2786 | #define __HAL_RCC_WWDG_RELEASE_RESET ((void)0U) /* Not available on the STM32H7*/ |
|
| - | 2787 | ||
| - | 2788 | ||
| - | 2789 | #define __HAL_RCC_WWDG_IS_CLK_ENABLED __HAL_RCC_WWDG1_IS_CLK_ENABLED |
|
| - | 2790 | #define __HAL_RCC_WWDG_IS_CLK_DISABLED __HAL_RCC_WWDG1_IS_CLK_DISABLED |
|
| - | 2791 | #endif |
|
| - | 2792 | ||
| 2258 | #define __WWDG_CLK_DISABLE __HAL_RCC_WWDG_CLK_DISABLE |
2793 | #define __WWDG_CLK_DISABLE __HAL_RCC_WWDG_CLK_DISABLE |
| 2259 | #define __WWDG_CLK_ENABLE __HAL_RCC_WWDG_CLK_ENABLE |
2794 | #define __WWDG_CLK_ENABLE __HAL_RCC_WWDG_CLK_ENABLE |
| 2260 | #define __WWDG_CLK_SLEEP_DISABLE __HAL_RCC_WWDG_CLK_SLEEP_DISABLE |
2795 | #define __WWDG_CLK_SLEEP_DISABLE __HAL_RCC_WWDG_CLK_SLEEP_DISABLE |
| 2261 | #define __WWDG_CLK_SLEEP_ENABLE __HAL_RCC_WWDG_CLK_SLEEP_ENABLE |
2796 | #define __WWDG_CLK_SLEEP_ENABLE __HAL_RCC_WWDG_CLK_SLEEP_ENABLE |
| 2262 | #define __WWDG_FORCE_RESET __HAL_RCC_WWDG_FORCE_RESET |
2797 | #define __WWDG_FORCE_RESET __HAL_RCC_WWDG_FORCE_RESET |
| 2263 | #define __WWDG_RELEASE_RESET __HAL_RCC_WWDG_RELEASE_RESET |
2798 | #define __WWDG_RELEASE_RESET __HAL_RCC_WWDG_RELEASE_RESET |
| - | 2799 | ||
| 2264 | #define __TIM21_CLK_ENABLE __HAL_RCC_TIM21_CLK_ENABLE |
2800 | #define __TIM21_CLK_ENABLE __HAL_RCC_TIM21_CLK_ENABLE |
| 2265 | #define __TIM21_CLK_DISABLE __HAL_RCC_TIM21_CLK_DISABLE |
2801 | #define __TIM21_CLK_DISABLE __HAL_RCC_TIM21_CLK_DISABLE |
| 2266 | #define __TIM21_FORCE_RESET __HAL_RCC_TIM21_FORCE_RESET |
2802 | #define __TIM21_FORCE_RESET __HAL_RCC_TIM21_FORCE_RESET |
| 2267 | #define __TIM21_RELEASE_RESET __HAL_RCC_TIM21_RELEASE_RESET |
2803 | #define __TIM21_RELEASE_RESET __HAL_RCC_TIM21_RELEASE_RESET |
| 2268 | #define __TIM21_CLK_SLEEP_ENABLE __HAL_RCC_TIM21_CLK_SLEEP_ENABLE |
2804 | #define __TIM21_CLK_SLEEP_ENABLE __HAL_RCC_TIM21_CLK_SLEEP_ENABLE |
| Line 2287... | Line 2823... | ||
| 2287 | #define __USB_OTG_FS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE |
2823 | #define __USB_OTG_FS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE |
| 2288 | #define __USB_OTG_FS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE |
2824 | #define __USB_OTG_FS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE |
| 2289 | #define __USB_OTG_HS_CLK_DISABLE __HAL_RCC_USB_OTG_HS_CLK_DISABLE |
2825 | #define __USB_OTG_HS_CLK_DISABLE __HAL_RCC_USB_OTG_HS_CLK_DISABLE |
| 2290 | #define __USB_OTG_HS_CLK_ENABLE __HAL_RCC_USB_OTG_HS_CLK_ENABLE |
2826 | #define __USB_OTG_HS_CLK_ENABLE __HAL_RCC_USB_OTG_HS_CLK_ENABLE |
| 2291 | #define __USB_OTG_HS_ULPI_CLK_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE |
2827 | #define __USB_OTG_HS_ULPI_CLK_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE |
| 2292 | #define __USB_OTG_HS_ULPI_CLK_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE |
2828 | #define __USB_OTG_HS_ULPI_CLK_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE |
| 2293 | #define __TIM9_CLK_SLEEP_ENABLE __HAL_RCC_TIM9_CLK_SLEEP_ENABLE |
2829 | #define __TIM9_CLK_SLEEP_ENABLE __HAL_RCC_TIM9_CLK_SLEEP_ENABLE |
| 2294 | #define __TIM9_CLK_SLEEP_DISABLE __HAL_RCC_TIM9_CLK_SLEEP_DISABLE |
2830 | #define __TIM9_CLK_SLEEP_DISABLE __HAL_RCC_TIM9_CLK_SLEEP_DISABLE |
| 2295 | #define __TIM10_CLK_SLEEP_ENABLE __HAL_RCC_TIM10_CLK_SLEEP_ENABLE |
2831 | #define __TIM10_CLK_SLEEP_ENABLE __HAL_RCC_TIM10_CLK_SLEEP_ENABLE |
| 2296 | #define __TIM10_CLK_SLEEP_DISABLE __HAL_RCC_TIM10_CLK_SLEEP_DISABLE |
2832 | #define __TIM10_CLK_SLEEP_DISABLE __HAL_RCC_TIM10_CLK_SLEEP_DISABLE |
| 2297 | #define __TIM11_CLK_SLEEP_ENABLE __HAL_RCC_TIM11_CLK_SLEEP_ENABLE |
2833 | #define __TIM11_CLK_SLEEP_ENABLE __HAL_RCC_TIM11_CLK_SLEEP_ENABLE |
| 2298 | #define __TIM11_CLK_SLEEP_DISABLE __HAL_RCC_TIM11_CLK_SLEEP_DISABLE |
2834 | #define __TIM11_CLK_SLEEP_DISABLE __HAL_RCC_TIM11_CLK_SLEEP_DISABLE |
| 2299 | #define __ETHMACPTP_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_ENABLE |
2835 | #define __ETHMACPTP_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_ENABLE |
| 2300 | #define __ETHMACPTP_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_DISABLE |
2836 | #define __ETHMACPTP_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_DISABLE |
| 2301 | #define __ETHMACPTP_CLK_ENABLE __HAL_RCC_ETHMACPTP_CLK_ENABLE |
2837 | #define __ETHMACPTP_CLK_ENABLE __HAL_RCC_ETHMACPTP_CLK_ENABLE |
| 2302 | #define __ETHMACPTP_CLK_DISABLE __HAL_RCC_ETHMACPTP_CLK_DISABLE |
2838 | #define __ETHMACPTP_CLK_DISABLE __HAL_RCC_ETHMACPTP_CLK_DISABLE |
| 2303 | #define __HASH_CLK_ENABLE __HAL_RCC_HASH_CLK_ENABLE |
2839 | #define __HASH_CLK_ENABLE __HAL_RCC_HASH_CLK_ENABLE |
| 2304 | #define __HASH_FORCE_RESET __HAL_RCC_HASH_FORCE_RESET |
2840 | #define __HASH_FORCE_RESET __HAL_RCC_HASH_FORCE_RESET |
| 2305 | #define __HASH_RELEASE_RESET __HAL_RCC_HASH_RELEASE_RESET |
2841 | #define __HASH_RELEASE_RESET __HAL_RCC_HASH_RELEASE_RESET |
| 2306 | #define __HASH_CLK_SLEEP_ENABLE __HAL_RCC_HASH_CLK_SLEEP_ENABLE |
2842 | #define __HASH_CLK_SLEEP_ENABLE __HAL_RCC_HASH_CLK_SLEEP_ENABLE |
| 2307 | #define __HASH_CLK_SLEEP_DISABLE __HAL_RCC_HASH_CLK_SLEEP_DISABLE |
2843 | #define __HASH_CLK_SLEEP_DISABLE __HAL_RCC_HASH_CLK_SLEEP_DISABLE |
| 2308 | #define __HASH_CLK_DISABLE __HAL_RCC_HASH_CLK_DISABLE |
2844 | #define __HASH_CLK_DISABLE __HAL_RCC_HASH_CLK_DISABLE |
| 2309 | #define __SPI5_CLK_ENABLE __HAL_RCC_SPI5_CLK_ENABLE |
2845 | #define __SPI5_CLK_ENABLE __HAL_RCC_SPI5_CLK_ENABLE |
| 2310 | #define __SPI5_CLK_DISABLE __HAL_RCC_SPI5_CLK_DISABLE |
2846 | #define __SPI5_CLK_DISABLE __HAL_RCC_SPI5_CLK_DISABLE |
| 2311 | #define __SPI5_FORCE_RESET __HAL_RCC_SPI5_FORCE_RESET |
2847 | #define __SPI5_FORCE_RESET __HAL_RCC_SPI5_FORCE_RESET |
| 2312 | #define __SPI5_RELEASE_RESET __HAL_RCC_SPI5_RELEASE_RESET |
2848 | #define __SPI5_RELEASE_RESET __HAL_RCC_SPI5_RELEASE_RESET |
| 2313 | #define __SPI5_CLK_SLEEP_ENABLE __HAL_RCC_SPI5_CLK_SLEEP_ENABLE |
2849 | #define __SPI5_CLK_SLEEP_ENABLE __HAL_RCC_SPI5_CLK_SLEEP_ENABLE |
| 2314 | #define __SPI5_CLK_SLEEP_DISABLE __HAL_RCC_SPI5_CLK_SLEEP_DISABLE |
2850 | #define __SPI5_CLK_SLEEP_DISABLE __HAL_RCC_SPI5_CLK_SLEEP_DISABLE |
| 2315 | #define __SPI6_CLK_ENABLE __HAL_RCC_SPI6_CLK_ENABLE |
2851 | #define __SPI6_CLK_ENABLE __HAL_RCC_SPI6_CLK_ENABLE |
| 2316 | #define __SPI6_CLK_DISABLE __HAL_RCC_SPI6_CLK_DISABLE |
2852 | #define __SPI6_CLK_DISABLE __HAL_RCC_SPI6_CLK_DISABLE |
| 2317 | #define __SPI6_FORCE_RESET __HAL_RCC_SPI6_FORCE_RESET |
2853 | #define __SPI6_FORCE_RESET __HAL_RCC_SPI6_FORCE_RESET |
| 2318 | #define __SPI6_RELEASE_RESET __HAL_RCC_SPI6_RELEASE_RESET |
2854 | #define __SPI6_RELEASE_RESET __HAL_RCC_SPI6_RELEASE_RESET |
| 2319 | #define __SPI6_CLK_SLEEP_ENABLE __HAL_RCC_SPI6_CLK_SLEEP_ENABLE |
2855 | #define __SPI6_CLK_SLEEP_ENABLE __HAL_RCC_SPI6_CLK_SLEEP_ENABLE |
| 2320 | #define __SPI6_CLK_SLEEP_DISABLE __HAL_RCC_SPI6_CLK_SLEEP_DISABLE |
2856 | #define __SPI6_CLK_SLEEP_DISABLE __HAL_RCC_SPI6_CLK_SLEEP_DISABLE |
| 2321 | #define __LTDC_CLK_ENABLE __HAL_RCC_LTDC_CLK_ENABLE |
2857 | #define __LTDC_CLK_ENABLE __HAL_RCC_LTDC_CLK_ENABLE |
| 2322 | #define __LTDC_CLK_DISABLE __HAL_RCC_LTDC_CLK_DISABLE |
2858 | #define __LTDC_CLK_DISABLE __HAL_RCC_LTDC_CLK_DISABLE |
| 2323 | #define __LTDC_FORCE_RESET __HAL_RCC_LTDC_FORCE_RESET |
2859 | #define __LTDC_FORCE_RESET __HAL_RCC_LTDC_FORCE_RESET |
| 2324 | #define __LTDC_RELEASE_RESET __HAL_RCC_LTDC_RELEASE_RESET |
2860 | #define __LTDC_RELEASE_RESET __HAL_RCC_LTDC_RELEASE_RESET |
| 2325 | #define __LTDC_CLK_SLEEP_ENABLE __HAL_RCC_LTDC_CLK_SLEEP_ENABLE |
2861 | #define __LTDC_CLK_SLEEP_ENABLE __HAL_RCC_LTDC_CLK_SLEEP_ENABLE |
| 2326 | #define __ETHMAC_CLK_SLEEP_ENABLE __HAL_RCC_ETHMAC_CLK_SLEEP_ENABLE |
2862 | #define __ETHMAC_CLK_SLEEP_ENABLE __HAL_RCC_ETHMAC_CLK_SLEEP_ENABLE |
| 2327 | #define __ETHMAC_CLK_SLEEP_DISABLE __HAL_RCC_ETHMAC_CLK_SLEEP_DISABLE |
2863 | #define __ETHMAC_CLK_SLEEP_DISABLE __HAL_RCC_ETHMAC_CLK_SLEEP_DISABLE |
| 2328 | #define __ETHMACTX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_ENABLE |
2864 | #define __ETHMACTX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_ENABLE |
| 2329 | #define __ETHMACTX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_DISABLE |
2865 | #define __ETHMACTX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_DISABLE |
| 2330 | #define __ETHMACRX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_ENABLE |
2866 | #define __ETHMACRX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_ENABLE |
| 2331 | #define __ETHMACRX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_DISABLE |
2867 | #define __ETHMACRX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_DISABLE |
| 2332 | #define __TIM12_CLK_SLEEP_ENABLE __HAL_RCC_TIM12_CLK_SLEEP_ENABLE |
2868 | #define __TIM12_CLK_SLEEP_ENABLE __HAL_RCC_TIM12_CLK_SLEEP_ENABLE |
| 2333 | #define __TIM12_CLK_SLEEP_DISABLE __HAL_RCC_TIM12_CLK_SLEEP_DISABLE |
2869 | #define __TIM12_CLK_SLEEP_DISABLE __HAL_RCC_TIM12_CLK_SLEEP_DISABLE |
| 2334 | #define __TIM13_CLK_SLEEP_ENABLE __HAL_RCC_TIM13_CLK_SLEEP_ENABLE |
2870 | #define __TIM13_CLK_SLEEP_ENABLE __HAL_RCC_TIM13_CLK_SLEEP_ENABLE |
| 2335 | #define __TIM13_CLK_SLEEP_DISABLE __HAL_RCC_TIM13_CLK_SLEEP_DISABLE |
2871 | #define __TIM13_CLK_SLEEP_DISABLE __HAL_RCC_TIM13_CLK_SLEEP_DISABLE |
| 2336 | #define __TIM14_CLK_SLEEP_ENABLE __HAL_RCC_TIM14_CLK_SLEEP_ENABLE |
2872 | #define __TIM14_CLK_SLEEP_ENABLE __HAL_RCC_TIM14_CLK_SLEEP_ENABLE |
| 2337 | #define __TIM14_CLK_SLEEP_DISABLE __HAL_RCC_TIM14_CLK_SLEEP_DISABLE |
2873 | #define __TIM14_CLK_SLEEP_DISABLE __HAL_RCC_TIM14_CLK_SLEEP_DISABLE |
| 2338 | #define __BKPSRAM_CLK_ENABLE __HAL_RCC_BKPSRAM_CLK_ENABLE |
2874 | #define __BKPSRAM_CLK_ENABLE __HAL_RCC_BKPSRAM_CLK_ENABLE |
| 2339 | #define __BKPSRAM_CLK_DISABLE __HAL_RCC_BKPSRAM_CLK_DISABLE |
2875 | #define __BKPSRAM_CLK_DISABLE __HAL_RCC_BKPSRAM_CLK_DISABLE |
| 2340 | #define __BKPSRAM_CLK_SLEEP_ENABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_ENABLE |
2876 | #define __BKPSRAM_CLK_SLEEP_ENABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_ENABLE |
| 2341 | #define __BKPSRAM_CLK_SLEEP_DISABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_DISABLE |
2877 | #define __BKPSRAM_CLK_SLEEP_DISABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_DISABLE |
| 2342 | #define __CCMDATARAMEN_CLK_ENABLE __HAL_RCC_CCMDATARAMEN_CLK_ENABLE |
2878 | #define __CCMDATARAMEN_CLK_ENABLE __HAL_RCC_CCMDATARAMEN_CLK_ENABLE |
| 2343 | #define __CCMDATARAMEN_CLK_DISABLE __HAL_RCC_CCMDATARAMEN_CLK_DISABLE |
2879 | #define __CCMDATARAMEN_CLK_DISABLE __HAL_RCC_CCMDATARAMEN_CLK_DISABLE |
| 2344 | #define __USART6_CLK_ENABLE __HAL_RCC_USART6_CLK_ENABLE |
2880 | #define __USART6_CLK_ENABLE __HAL_RCC_USART6_CLK_ENABLE |
| 2345 | #define __USART6_CLK_DISABLE __HAL_RCC_USART6_CLK_DISABLE |
2881 | #define __USART6_CLK_DISABLE __HAL_RCC_USART6_CLK_DISABLE |
| 2346 | #define __USART6_FORCE_RESET __HAL_RCC_USART6_FORCE_RESET |
2882 | #define __USART6_FORCE_RESET __HAL_RCC_USART6_FORCE_RESET |
| 2347 | #define __USART6_RELEASE_RESET __HAL_RCC_USART6_RELEASE_RESET |
2883 | #define __USART6_RELEASE_RESET __HAL_RCC_USART6_RELEASE_RESET |
| 2348 | #define __USART6_CLK_SLEEP_ENABLE __HAL_RCC_USART6_CLK_SLEEP_ENABLE |
2884 | #define __USART6_CLK_SLEEP_ENABLE __HAL_RCC_USART6_CLK_SLEEP_ENABLE |
| 2349 | #define __USART6_CLK_SLEEP_DISABLE __HAL_RCC_USART6_CLK_SLEEP_DISABLE |
2885 | #define __USART6_CLK_SLEEP_DISABLE __HAL_RCC_USART6_CLK_SLEEP_DISABLE |
| 2350 | #define __SPI4_CLK_ENABLE __HAL_RCC_SPI4_CLK_ENABLE |
2886 | #define __SPI4_CLK_ENABLE __HAL_RCC_SPI4_CLK_ENABLE |
| 2351 | #define __SPI4_CLK_DISABLE __HAL_RCC_SPI4_CLK_DISABLE |
2887 | #define __SPI4_CLK_DISABLE __HAL_RCC_SPI4_CLK_DISABLE |
| 2352 | #define __SPI4_FORCE_RESET __HAL_RCC_SPI4_FORCE_RESET |
2888 | #define __SPI4_FORCE_RESET __HAL_RCC_SPI4_FORCE_RESET |
| 2353 | #define __SPI4_RELEASE_RESET __HAL_RCC_SPI4_RELEASE_RESET |
2889 | #define __SPI4_RELEASE_RESET __HAL_RCC_SPI4_RELEASE_RESET |
| 2354 | #define __SPI4_CLK_SLEEP_ENABLE __HAL_RCC_SPI4_CLK_SLEEP_ENABLE |
2890 | #define __SPI4_CLK_SLEEP_ENABLE __HAL_RCC_SPI4_CLK_SLEEP_ENABLE |
| 2355 | #define __SPI4_CLK_SLEEP_DISABLE __HAL_RCC_SPI4_CLK_SLEEP_DISABLE |
2891 | #define __SPI4_CLK_SLEEP_DISABLE __HAL_RCC_SPI4_CLK_SLEEP_DISABLE |
| 2356 | #define __GPIOI_CLK_ENABLE __HAL_RCC_GPIOI_CLK_ENABLE |
2892 | #define __GPIOI_CLK_ENABLE __HAL_RCC_GPIOI_CLK_ENABLE |
| 2357 | #define __GPIOI_CLK_DISABLE __HAL_RCC_GPIOI_CLK_DISABLE |
2893 | #define __GPIOI_CLK_DISABLE __HAL_RCC_GPIOI_CLK_DISABLE |
| 2358 | #define __GPIOI_FORCE_RESET __HAL_RCC_GPIOI_FORCE_RESET |
2894 | #define __GPIOI_FORCE_RESET __HAL_RCC_GPIOI_FORCE_RESET |
| 2359 | #define __GPIOI_RELEASE_RESET __HAL_RCC_GPIOI_RELEASE_RESET |
2895 | #define __GPIOI_RELEASE_RESET __HAL_RCC_GPIOI_RELEASE_RESET |
| 2360 | #define __GPIOI_CLK_SLEEP_ENABLE __HAL_RCC_GPIOI_CLK_SLEEP_ENABLE |
2896 | #define __GPIOI_CLK_SLEEP_ENABLE __HAL_RCC_GPIOI_CLK_SLEEP_ENABLE |
| 2361 | #define __GPIOI_CLK_SLEEP_DISABLE __HAL_RCC_GPIOI_CLK_SLEEP_DISABLE |
2897 | #define __GPIOI_CLK_SLEEP_DISABLE __HAL_RCC_GPIOI_CLK_SLEEP_DISABLE |
| 2362 | #define __GPIOJ_CLK_ENABLE __HAL_RCC_GPIOJ_CLK_ENABLE |
2898 | #define __GPIOJ_CLK_ENABLE __HAL_RCC_GPIOJ_CLK_ENABLE |
| 2363 | #define __GPIOJ_CLK_DISABLE __HAL_RCC_GPIOJ_CLK_DISABLE |
2899 | #define __GPIOJ_CLK_DISABLE __HAL_RCC_GPIOJ_CLK_DISABLE |
| 2364 | #define __GPIOJ_FORCE_RESET __HAL_RCC_GPIOJ_FORCE_RESET |
2900 | #define __GPIOJ_FORCE_RESET __HAL_RCC_GPIOJ_FORCE_RESET |
| 2365 | #define __GPIOJ_RELEASE_RESET __HAL_RCC_GPIOJ_RELEASE_RESET |
2901 | #define __GPIOJ_RELEASE_RESET __HAL_RCC_GPIOJ_RELEASE_RESET |
| 2366 | #define __GPIOJ_CLK_SLEEP_ENABLE __HAL_RCC_GPIOJ_CLK_SLEEP_ENABLE |
2902 | #define __GPIOJ_CLK_SLEEP_ENABLE __HAL_RCC_GPIOJ_CLK_SLEEP_ENABLE |
| 2367 | #define __GPIOJ_CLK_SLEEP_DISABLE __HAL_RCC_GPIOJ_CLK_SLEEP_DISABLE |
2903 | #define __GPIOJ_CLK_SLEEP_DISABLE __HAL_RCC_GPIOJ_CLK_SLEEP_DISABLE |
| 2368 | #define __GPIOK_CLK_ENABLE __HAL_RCC_GPIOK_CLK_ENABLE |
2904 | #define __GPIOK_CLK_ENABLE __HAL_RCC_GPIOK_CLK_ENABLE |
| 2369 | #define __GPIOK_CLK_DISABLE __HAL_RCC_GPIOK_CLK_DISABLE |
2905 | #define __GPIOK_CLK_DISABLE __HAL_RCC_GPIOK_CLK_DISABLE |
| 2370 | #define __GPIOK_RELEASE_RESET __HAL_RCC_GPIOK_RELEASE_RESET |
2906 | #define __GPIOK_RELEASE_RESET __HAL_RCC_GPIOK_RELEASE_RESET |
| 2371 | #define __GPIOK_CLK_SLEEP_ENABLE __HAL_RCC_GPIOK_CLK_SLEEP_ENABLE |
2907 | #define __GPIOK_CLK_SLEEP_ENABLE __HAL_RCC_GPIOK_CLK_SLEEP_ENABLE |
| 2372 | #define __GPIOK_CLK_SLEEP_DISABLE __HAL_RCC_GPIOK_CLK_SLEEP_DISABLE |
2908 | #define __GPIOK_CLK_SLEEP_DISABLE __HAL_RCC_GPIOK_CLK_SLEEP_DISABLE |
| 2373 | #define __ETH_CLK_ENABLE __HAL_RCC_ETH_CLK_ENABLE |
2909 | #define __ETH_CLK_ENABLE __HAL_RCC_ETH_CLK_ENABLE |
| 2374 | #define __ETH_CLK_DISABLE __HAL_RCC_ETH_CLK_DISABLE |
2910 | #define __ETH_CLK_DISABLE __HAL_RCC_ETH_CLK_DISABLE |
| 2375 | #define __DCMI_CLK_ENABLE __HAL_RCC_DCMI_CLK_ENABLE |
2911 | #define __DCMI_CLK_ENABLE __HAL_RCC_DCMI_CLK_ENABLE |
| 2376 | #define __DCMI_CLK_DISABLE __HAL_RCC_DCMI_CLK_DISABLE |
2912 | #define __DCMI_CLK_DISABLE __HAL_RCC_DCMI_CLK_DISABLE |
| 2377 | #define __DCMI_FORCE_RESET __HAL_RCC_DCMI_FORCE_RESET |
2913 | #define __DCMI_FORCE_RESET __HAL_RCC_DCMI_FORCE_RESET |
| 2378 | #define __DCMI_RELEASE_RESET __HAL_RCC_DCMI_RELEASE_RESET |
2914 | #define __DCMI_RELEASE_RESET __HAL_RCC_DCMI_RELEASE_RESET |
| 2379 | #define __DCMI_CLK_SLEEP_ENABLE __HAL_RCC_DCMI_CLK_SLEEP_ENABLE |
2915 | #define __DCMI_CLK_SLEEP_ENABLE __HAL_RCC_DCMI_CLK_SLEEP_ENABLE |
| 2380 | #define __DCMI_CLK_SLEEP_DISABLE __HAL_RCC_DCMI_CLK_SLEEP_DISABLE |
2916 | #define __DCMI_CLK_SLEEP_DISABLE __HAL_RCC_DCMI_CLK_SLEEP_DISABLE |
| 2381 | #define __UART7_CLK_ENABLE __HAL_RCC_UART7_CLK_ENABLE |
2917 | #define __UART7_CLK_ENABLE __HAL_RCC_UART7_CLK_ENABLE |
| 2382 | #define __UART7_CLK_DISABLE __HAL_RCC_UART7_CLK_DISABLE |
2918 | #define __UART7_CLK_DISABLE __HAL_RCC_UART7_CLK_DISABLE |
| 2383 | #define __UART7_RELEASE_RESET __HAL_RCC_UART7_RELEASE_RESET |
2919 | #define __UART7_RELEASE_RESET __HAL_RCC_UART7_RELEASE_RESET |
| 2384 | #define __UART7_FORCE_RESET __HAL_RCC_UART7_FORCE_RESET |
2920 | #define __UART7_FORCE_RESET __HAL_RCC_UART7_FORCE_RESET |
| 2385 | #define __UART7_CLK_SLEEP_ENABLE __HAL_RCC_UART7_CLK_SLEEP_ENABLE |
2921 | #define __UART7_CLK_SLEEP_ENABLE __HAL_RCC_UART7_CLK_SLEEP_ENABLE |
| 2386 | #define __UART7_CLK_SLEEP_DISABLE __HAL_RCC_UART7_CLK_SLEEP_DISABLE |
2922 | #define __UART7_CLK_SLEEP_DISABLE __HAL_RCC_UART7_CLK_SLEEP_DISABLE |
| 2387 | #define __UART8_CLK_ENABLE __HAL_RCC_UART8_CLK_ENABLE |
2923 | #define __UART8_CLK_ENABLE __HAL_RCC_UART8_CLK_ENABLE |
| 2388 | #define __UART8_CLK_DISABLE __HAL_RCC_UART8_CLK_DISABLE |
2924 | #define __UART8_CLK_DISABLE __HAL_RCC_UART8_CLK_DISABLE |
| 2389 | #define __UART8_FORCE_RESET __HAL_RCC_UART8_FORCE_RESET |
2925 | #define __UART8_FORCE_RESET __HAL_RCC_UART8_FORCE_RESET |
| 2390 | #define __UART8_RELEASE_RESET __HAL_RCC_UART8_RELEASE_RESET |
2926 | #define __UART8_RELEASE_RESET __HAL_RCC_UART8_RELEASE_RESET |
| 2391 | #define __UART8_CLK_SLEEP_ENABLE __HAL_RCC_UART8_CLK_SLEEP_ENABLE |
2927 | #define __UART8_CLK_SLEEP_ENABLE __HAL_RCC_UART8_CLK_SLEEP_ENABLE |
| 2392 | #define __UART8_CLK_SLEEP_DISABLE __HAL_RCC_UART8_CLK_SLEEP_DISABLE |
2928 | #define __UART8_CLK_SLEEP_DISABLE __HAL_RCC_UART8_CLK_SLEEP_DISABLE |
| 2393 | #define __OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE |
2929 | #define __OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE |
| 2394 | #define __OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE |
2930 | #define __OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE |
| 2395 | #define __OTGHS_FORCE_RESET __HAL_RCC_USB_OTG_HS_FORCE_RESET |
2931 | #define __OTGHS_FORCE_RESET __HAL_RCC_USB_OTG_HS_FORCE_RESET |
| 2396 | #define __OTGHS_RELEASE_RESET __HAL_RCC_USB_OTG_HS_RELEASE_RESET |
2932 | #define __OTGHS_RELEASE_RESET __HAL_RCC_USB_OTG_HS_RELEASE_RESET |
| 2397 | #define __OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE |
2933 | #define __OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE |
| 2398 | #define __OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE |
2934 | #define __OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE |
| 2399 | #define __HAL_RCC_OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE |
2935 | #define __HAL_RCC_OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE |
| 2400 | #define __HAL_RCC_OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE |
2936 | #define __HAL_RCC_OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE |
| 2401 | #define __HAL_RCC_OTGHS_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_ENABLED |
2937 | #define __HAL_RCC_OTGHS_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_ENABLED |
| 2402 | #define __HAL_RCC_OTGHS_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_DISABLED |
2938 | #define __HAL_RCC_OTGHS_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_DISABLED |
| 2403 | #define __HAL_RCC_OTGHS_FORCE_RESET __HAL_RCC_USB_OTG_HS_FORCE_RESET |
2939 | #define __HAL_RCC_OTGHS_FORCE_RESET __HAL_RCC_USB_OTG_HS_FORCE_RESET |
| 2404 | #define __HAL_RCC_OTGHS_RELEASE_RESET __HAL_RCC_USB_OTG_HS_RELEASE_RESET |
2940 | #define __HAL_RCC_OTGHS_RELEASE_RESET __HAL_RCC_USB_OTG_HS_RELEASE_RESET |
| 2405 | #define __HAL_RCC_OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE |
2941 | #define __HAL_RCC_OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE |
| 2406 | #define __HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE |
2942 | #define __HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE |
| 2407 | #define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_ENABLED |
2943 | #define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_ENABLED |
| 2408 | #define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_DISABLED |
2944 | #define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_DISABLED |
| 2409 | #define __CRYP_FORCE_RESET __HAL_RCC_CRYP_FORCE_RESET |
- | |
| 2410 | #define __SRAM3_CLK_SLEEP_ENABLE __HAL_RCC_SRAM3_CLK_SLEEP_ENABLE |
2945 | #define __SRAM3_CLK_SLEEP_ENABLE __HAL_RCC_SRAM3_CLK_SLEEP_ENABLE |
| 2411 | #define __CAN2_CLK_SLEEP_ENABLE __HAL_RCC_CAN2_CLK_SLEEP_ENABLE |
2946 | #define __CAN2_CLK_SLEEP_ENABLE __HAL_RCC_CAN2_CLK_SLEEP_ENABLE |
| 2412 | #define __CAN2_CLK_SLEEP_DISABLE __HAL_RCC_CAN2_CLK_SLEEP_DISABLE |
2947 | #define __CAN2_CLK_SLEEP_DISABLE __HAL_RCC_CAN2_CLK_SLEEP_DISABLE |
| 2413 | #define __DAC_CLK_SLEEP_ENABLE __HAL_RCC_DAC_CLK_SLEEP_ENABLE |
2948 | #define __DAC_CLK_SLEEP_ENABLE __HAL_RCC_DAC_CLK_SLEEP_ENABLE |
| 2414 | #define __DAC_CLK_SLEEP_DISABLE __HAL_RCC_DAC_CLK_SLEEP_DISABLE |
2949 | #define __DAC_CLK_SLEEP_DISABLE __HAL_RCC_DAC_CLK_SLEEP_DISABLE |
| 2415 | #define __ADC2_CLK_SLEEP_ENABLE __HAL_RCC_ADC2_CLK_SLEEP_ENABLE |
2950 | #define __ADC2_CLK_SLEEP_ENABLE __HAL_RCC_ADC2_CLK_SLEEP_ENABLE |
| 2416 | #define __ADC2_CLK_SLEEP_DISABLE __HAL_RCC_ADC2_CLK_SLEEP_DISABLE |
2951 | #define __ADC2_CLK_SLEEP_DISABLE __HAL_RCC_ADC2_CLK_SLEEP_DISABLE |
| 2417 | #define __ADC3_CLK_SLEEP_ENABLE __HAL_RCC_ADC3_CLK_SLEEP_ENABLE |
2952 | #define __ADC3_CLK_SLEEP_ENABLE __HAL_RCC_ADC3_CLK_SLEEP_ENABLE |
| 2418 | #define __ADC3_CLK_SLEEP_DISABLE __HAL_RCC_ADC3_CLK_SLEEP_DISABLE |
2953 | #define __ADC3_CLK_SLEEP_DISABLE __HAL_RCC_ADC3_CLK_SLEEP_DISABLE |
| 2419 | #define __FSMC_FORCE_RESET __HAL_RCC_FSMC_FORCE_RESET |
2954 | #define __FSMC_FORCE_RESET __HAL_RCC_FSMC_FORCE_RESET |
| 2420 | #define __FSMC_RELEASE_RESET __HAL_RCC_FSMC_RELEASE_RESET |
2955 | #define __FSMC_RELEASE_RESET __HAL_RCC_FSMC_RELEASE_RESET |
| 2421 | #define __FSMC_CLK_SLEEP_ENABLE __HAL_RCC_FSMC_CLK_SLEEP_ENABLE |
2956 | #define __FSMC_CLK_SLEEP_ENABLE __HAL_RCC_FSMC_CLK_SLEEP_ENABLE |
| 2422 | #define __FSMC_CLK_SLEEP_DISABLE __HAL_RCC_FSMC_CLK_SLEEP_DISABLE |
2957 | #define __FSMC_CLK_SLEEP_DISABLE __HAL_RCC_FSMC_CLK_SLEEP_DISABLE |
| 2423 | #define __SDIO_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET |
2958 | #define __SDIO_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET |
| 2424 | #define __SDIO_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET |
2959 | #define __SDIO_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET |
| 2425 | #define __SDIO_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE |
2960 | #define __SDIO_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE |
| 2426 | #define __SDIO_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE |
2961 | #define __SDIO_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE |
| 2427 | #define __DMA2D_CLK_ENABLE __HAL_RCC_DMA2D_CLK_ENABLE |
2962 | #define __DMA2D_CLK_ENABLE __HAL_RCC_DMA2D_CLK_ENABLE |
| 2428 | #define __DMA2D_CLK_DISABLE __HAL_RCC_DMA2D_CLK_DISABLE |
2963 | #define __DMA2D_CLK_DISABLE __HAL_RCC_DMA2D_CLK_DISABLE |
| 2429 | #define __DMA2D_FORCE_RESET __HAL_RCC_DMA2D_FORCE_RESET |
2964 | #define __DMA2D_FORCE_RESET __HAL_RCC_DMA2D_FORCE_RESET |
| 2430 | #define __DMA2D_RELEASE_RESET __HAL_RCC_DMA2D_RELEASE_RESET |
2965 | #define __DMA2D_RELEASE_RESET __HAL_RCC_DMA2D_RELEASE_RESET |
| 2431 | #define __DMA2D_CLK_SLEEP_ENABLE __HAL_RCC_DMA2D_CLK_SLEEP_ENABLE |
2966 | #define __DMA2D_CLK_SLEEP_ENABLE __HAL_RCC_DMA2D_CLK_SLEEP_ENABLE |
| Line 2437... | Line 2972... | ||
| 2437 | 2972 | ||
| 2438 | #define __ADC12_CLK_ENABLE __HAL_RCC_ADC12_CLK_ENABLE |
2973 | #define __ADC12_CLK_ENABLE __HAL_RCC_ADC12_CLK_ENABLE |
| 2439 | #define __ADC12_CLK_DISABLE __HAL_RCC_ADC12_CLK_DISABLE |
2974 | #define __ADC12_CLK_DISABLE __HAL_RCC_ADC12_CLK_DISABLE |
| 2440 | #define __ADC34_CLK_ENABLE __HAL_RCC_ADC34_CLK_ENABLE |
2975 | #define __ADC34_CLK_ENABLE __HAL_RCC_ADC34_CLK_ENABLE |
| 2441 | #define __ADC34_CLK_DISABLE __HAL_RCC_ADC34_CLK_DISABLE |
2976 | #define __ADC34_CLK_DISABLE __HAL_RCC_ADC34_CLK_DISABLE |
| 2442 | #define __ADC12_CLK_ENABLE __HAL_RCC_ADC12_CLK_ENABLE |
- | |
| 2443 | #define __ADC12_CLK_DISABLE __HAL_RCC_ADC12_CLK_DISABLE |
- | |
| 2444 | #define __DAC2_CLK_ENABLE __HAL_RCC_DAC2_CLK_ENABLE |
2977 | #define __DAC2_CLK_ENABLE __HAL_RCC_DAC2_CLK_ENABLE |
| 2445 | #define __DAC2_CLK_DISABLE __HAL_RCC_DAC2_CLK_DISABLE |
2978 | #define __DAC2_CLK_DISABLE __HAL_RCC_DAC2_CLK_DISABLE |
| 2446 | #define __TIM18_CLK_ENABLE __HAL_RCC_TIM18_CLK_ENABLE |
2979 | #define __TIM18_CLK_ENABLE __HAL_RCC_TIM18_CLK_ENABLE |
| 2447 | #define __TIM18_CLK_DISABLE __HAL_RCC_TIM18_CLK_DISABLE |
2980 | #define __TIM18_CLK_DISABLE __HAL_RCC_TIM18_CLK_DISABLE |
| 2448 | #define __TIM19_CLK_ENABLE __HAL_RCC_TIM19_CLK_ENABLE |
2981 | #define __TIM19_CLK_ENABLE __HAL_RCC_TIM19_CLK_ENABLE |
| Line 2460... | Line 2993... | ||
| 2460 | 2993 | ||
| 2461 | #define __ADC12_FORCE_RESET __HAL_RCC_ADC12_FORCE_RESET |
2994 | #define __ADC12_FORCE_RESET __HAL_RCC_ADC12_FORCE_RESET |
| 2462 | #define __ADC12_RELEASE_RESET __HAL_RCC_ADC12_RELEASE_RESET |
2995 | #define __ADC12_RELEASE_RESET __HAL_RCC_ADC12_RELEASE_RESET |
| 2463 | #define __ADC34_FORCE_RESET __HAL_RCC_ADC34_FORCE_RESET |
2996 | #define __ADC34_FORCE_RESET __HAL_RCC_ADC34_FORCE_RESET |
| 2464 | #define __ADC34_RELEASE_RESET __HAL_RCC_ADC34_RELEASE_RESET |
2997 | #define __ADC34_RELEASE_RESET __HAL_RCC_ADC34_RELEASE_RESET |
| 2465 | #define __ADC12_FORCE_RESET __HAL_RCC_ADC12_FORCE_RESET |
- | |
| 2466 | #define __ADC12_RELEASE_RESET __HAL_RCC_ADC12_RELEASE_RESET |
- | |
| 2467 | #define __DAC2_FORCE_RESET __HAL_RCC_DAC2_FORCE_RESET |
2998 | #define __DAC2_FORCE_RESET __HAL_RCC_DAC2_FORCE_RESET |
| 2468 | #define __DAC2_RELEASE_RESET __HAL_RCC_DAC2_RELEASE_RESET |
2999 | #define __DAC2_RELEASE_RESET __HAL_RCC_DAC2_RELEASE_RESET |
| 2469 | #define __TIM18_FORCE_RESET __HAL_RCC_TIM18_FORCE_RESET |
3000 | #define __TIM18_FORCE_RESET __HAL_RCC_TIM18_FORCE_RESET |
| 2470 | #define __TIM18_RELEASE_RESET __HAL_RCC_TIM18_RELEASE_RESET |
3001 | #define __TIM18_RELEASE_RESET __HAL_RCC_TIM18_RELEASE_RESET |
| 2471 | #define __TIM19_FORCE_RESET __HAL_RCC_TIM19_FORCE_RESET |
3002 | #define __TIM19_FORCE_RESET __HAL_RCC_TIM19_FORCE_RESET |
| Line 2596... | Line 3127... | ||
| 2596 | #define __USB_IS_CLK_ENABLED __HAL_RCC_USB_IS_CLK_ENABLED |
3127 | #define __USB_IS_CLK_ENABLED __HAL_RCC_USB_IS_CLK_ENABLED |
| 2597 | #define __USB_IS_CLK_DISABLED __HAL_RCC_USB_IS_CLK_DISABLED |
3128 | #define __USB_IS_CLK_DISABLED __HAL_RCC_USB_IS_CLK_DISABLED |
| 2598 | #define __WWDG_IS_CLK_ENABLED __HAL_RCC_WWDG_IS_CLK_ENABLED |
3129 | #define __WWDG_IS_CLK_ENABLED __HAL_RCC_WWDG_IS_CLK_ENABLED |
| 2599 | #define __WWDG_IS_CLK_DISABLED __HAL_RCC_WWDG_IS_CLK_DISABLED |
3130 | #define __WWDG_IS_CLK_DISABLED __HAL_RCC_WWDG_IS_CLK_DISABLED |
| 2600 | 3131 | ||
| - | 3132 | #if defined(STM32L1) |
|
| - | 3133 | #define __HAL_RCC_CRYP_CLK_DISABLE __HAL_RCC_AES_CLK_DISABLE |
|
| - | 3134 | #define __HAL_RCC_CRYP_CLK_ENABLE __HAL_RCC_AES_CLK_ENABLE |
|
| - | 3135 | #define __HAL_RCC_CRYP_CLK_SLEEP_DISABLE __HAL_RCC_AES_CLK_SLEEP_DISABLE |
|
| - | 3136 | #define __HAL_RCC_CRYP_CLK_SLEEP_ENABLE __HAL_RCC_AES_CLK_SLEEP_ENABLE |
|
| - | 3137 | #define __HAL_RCC_CRYP_FORCE_RESET __HAL_RCC_AES_FORCE_RESET |
|
| - | 3138 | #define __HAL_RCC_CRYP_RELEASE_RESET __HAL_RCC_AES_RELEASE_RESET |
|
| - | 3139 | #endif /* STM32L1 */ |
|
| - | 3140 | ||
| 2601 | #if defined(STM32F4) |
3141 | #if defined(STM32F4) |
| 2602 | #define __HAL_RCC_SDMMC1_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET |
3142 | #define __HAL_RCC_SDMMC1_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET |
| 2603 | #define __HAL_RCC_SDMMC1_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET |
3143 | #define __HAL_RCC_SDMMC1_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET |
| 2604 | #define __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE |
3144 | #define __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE |
| 2605 | #define __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE |
3145 | #define __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE |
| Line 2625... | Line 3165... | ||
| 2625 | #define __HAL_RCC_SDIO_IS_CLK_ENABLED __HAL_RCC_SDMMC1_IS_CLK_ENABLED |
3165 | #define __HAL_RCC_SDIO_IS_CLK_ENABLED __HAL_RCC_SDMMC1_IS_CLK_ENABLED |
| 2626 | #define __HAL_RCC_SDIO_IS_CLK_DISABLED __HAL_RCC_SDMMC1_IS_CLK_DISABLED |
3166 | #define __HAL_RCC_SDIO_IS_CLK_DISABLED __HAL_RCC_SDMMC1_IS_CLK_DISABLED |
| 2627 | #define SdioClockSelection Sdmmc1ClockSelection |
3167 | #define SdioClockSelection Sdmmc1ClockSelection |
| 2628 | #define RCC_PERIPHCLK_SDIO RCC_PERIPHCLK_SDMMC1 |
3168 | #define RCC_PERIPHCLK_SDIO RCC_PERIPHCLK_SDMMC1 |
| 2629 | #define __HAL_RCC_SDIO_CONFIG __HAL_RCC_SDMMC1_CONFIG |
3169 | #define __HAL_RCC_SDIO_CONFIG __HAL_RCC_SDMMC1_CONFIG |
| 2630 | #define __HAL_RCC_GET_SDIO_SOURCE __HAL_RCC_GET_SDMMC1_SOURCE |
3170 | #define __HAL_RCC_GET_SDIO_SOURCE __HAL_RCC_GET_SDMMC1_SOURCE |
| 2631 | #endif |
3171 | #endif |
| 2632 | 3172 | ||
| 2633 | #if defined(STM32F7) |
3173 | #if defined(STM32F7) |
| 2634 | #define RCC_SDIOCLKSOURCE_CLK48 RCC_SDMMC1CLKSOURCE_CLK48 |
3174 | #define RCC_SDIOCLKSOURCE_CLK48 RCC_SDMMC1CLKSOURCE_CLK48 |
| 2635 | #define RCC_SDIOCLKSOURCE_SYSCLK RCC_SDMMC1CLKSOURCE_SYSCLK |
3175 | #define RCC_SDIOCLKSOURCE_SYSCLK RCC_SDMMC1CLKSOURCE_SYSCLK |
| 2636 | #endif |
3176 | #endif |
| 2637 | 3177 | ||
| - | 3178 | #if defined(STM32H7) |
|
| - | 3179 | #define __HAL_RCC_USB_OTG_HS_CLK_ENABLE() __HAL_RCC_USB1_OTG_HS_CLK_ENABLE() |
|
| - | 3180 | #define __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_ENABLE() |
|
| - | 3181 | #define __HAL_RCC_USB_OTG_HS_CLK_DISABLE() __HAL_RCC_USB1_OTG_HS_CLK_DISABLE() |
|
| - | 3182 | #define __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_DISABLE() |
|
| - | 3183 | #define __HAL_RCC_USB_OTG_HS_FORCE_RESET() __HAL_RCC_USB1_OTG_HS_FORCE_RESET() |
|
| - | 3184 | #define __HAL_RCC_USB_OTG_HS_RELEASE_RESET() __HAL_RCC_USB1_OTG_HS_RELEASE_RESET() |
|
| - | 3185 | #define __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE() __HAL_RCC_USB1_OTG_HS_CLK_SLEEP_ENABLE() |
|
| - | 3186 | #define __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_SLEEP_ENABLE() |
|
| - | 3187 | #define __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE() __HAL_RCC_USB1_OTG_HS_CLK_SLEEP_DISABLE() |
|
| - | 3188 | #define __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_SLEEP_DISABLE() |
|
| - | 3189 | ||
| - | 3190 | #define __HAL_RCC_USB_OTG_FS_CLK_ENABLE() __HAL_RCC_USB2_OTG_FS_CLK_ENABLE() |
|
| - | 3191 | #define __HAL_RCC_USB_OTG_FS_ULPI_CLK_ENABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_ENABLE() |
|
| - | 3192 | #define __HAL_RCC_USB_OTG_FS_CLK_DISABLE() __HAL_RCC_USB2_OTG_FS_CLK_DISABLE() |
|
| - | 3193 | #define __HAL_RCC_USB_OTG_FS_ULPI_CLK_DISABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_DISABLE() |
|
| - | 3194 | #define __HAL_RCC_USB_OTG_FS_FORCE_RESET() __HAL_RCC_USB2_OTG_FS_FORCE_RESET() |
|
| - | 3195 | #define __HAL_RCC_USB_OTG_FS_RELEASE_RESET() __HAL_RCC_USB2_OTG_FS_RELEASE_RESET() |
|
| - | 3196 | #define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE() __HAL_RCC_USB2_OTG_FS_CLK_SLEEP_ENABLE() |
|
| - | 3197 | #define __HAL_RCC_USB_OTG_FS_ULPI_CLK_SLEEP_ENABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_ENABLE() |
|
| - | 3198 | #define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE() __HAL_RCC_USB2_OTG_FS_CLK_SLEEP_DISABLE() |
|
| - | 3199 | #define __HAL_RCC_USB_OTG_FS_ULPI_CLK_SLEEP_DISABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_DISABLE() |
|
| - | 3200 | #endif |
|
| - | 3201 | ||
| 2638 | #define __HAL_RCC_I2SCLK __HAL_RCC_I2S_CONFIG |
3202 | #define __HAL_RCC_I2SCLK __HAL_RCC_I2S_CONFIG |
| 2639 | #define __HAL_RCC_I2SCLK_CONFIG __HAL_RCC_I2S_CONFIG |
3203 | #define __HAL_RCC_I2SCLK_CONFIG __HAL_RCC_I2S_CONFIG |
| 2640 | 3204 | ||
| 2641 | #define __RCC_PLLSRC RCC_GET_PLL_OSCSOURCE |
3205 | #define __RCC_PLLSRC RCC_GET_PLL_OSCSOURCE |
| 2642 | 3206 | ||
| Line 2646... | Line 3210... | ||
| 2646 | #define IS_RCC_HCLK_DIV IS_RCC_PCLK |
3210 | #define IS_RCC_HCLK_DIV IS_RCC_PCLK |
| 2647 | #define IS_RCC_PERIPHCLK IS_RCC_PERIPHCLOCK |
3211 | #define IS_RCC_PERIPHCLK IS_RCC_PERIPHCLOCK |
| 2648 | 3212 | ||
| 2649 | #define RCC_IT_HSI14 RCC_IT_HSI14RDY |
3213 | #define RCC_IT_HSI14 RCC_IT_HSI14RDY |
| 2650 | 3214 | ||
| 2651 | #if defined(STM32L0) |
3215 | #define RCC_IT_CSSLSE RCC_IT_LSECSS |
| 2652 | #define RCC_IT_LSECSS RCC_IT_CSSLSE |
3216 | #define RCC_IT_CSSHSE RCC_IT_CSS |
| - | 3217 | ||
| - | 3218 | #define RCC_PLLMUL_3 RCC_PLL_MUL3 |
|
| - | 3219 | #define RCC_PLLMUL_4 RCC_PLL_MUL4 |
|
| - | 3220 | #define RCC_PLLMUL_6 RCC_PLL_MUL6 |
|
| 2653 | #define RCC_IT_CSS RCC_IT_CSSHSE |
3221 | #define RCC_PLLMUL_8 RCC_PLL_MUL8 |
| - | 3222 | #define RCC_PLLMUL_12 RCC_PLL_MUL12 |
|
| - | 3223 | #define RCC_PLLMUL_16 RCC_PLL_MUL16 |
|
| - | 3224 | #define RCC_PLLMUL_24 RCC_PLL_MUL24 |
|
| - | 3225 | #define RCC_PLLMUL_32 RCC_PLL_MUL32 |
|
| - | 3226 | #define RCC_PLLMUL_48 RCC_PLL_MUL48 |
|
| 2654 | #endif |
3227 | |
| - | 3228 | #define RCC_PLLDIV_2 RCC_PLL_DIV2 |
|
| - | 3229 | #define RCC_PLLDIV_3 RCC_PLL_DIV3 |
|
| - | 3230 | #define RCC_PLLDIV_4 RCC_PLL_DIV4 |
|
| 2655 | 3231 | ||
| 2656 | #define IS_RCC_MCOSOURCE IS_RCC_MCO1SOURCE |
3232 | #define IS_RCC_MCOSOURCE IS_RCC_MCO1SOURCE |
| 2657 | #define __HAL_RCC_MCO_CONFIG __HAL_RCC_MCO1_CONFIG |
3233 | #define __HAL_RCC_MCO_CONFIG __HAL_RCC_MCO1_CONFIG |
| 2658 | #define RCC_MCO_NODIV RCC_MCODIV_1 |
3234 | #define RCC_MCO_NODIV RCC_MCODIV_1 |
| 2659 | #define RCC_MCO_DIV1 RCC_MCODIV_1 |
3235 | #define RCC_MCO_DIV1 RCC_MCODIV_1 |
| Line 2674... | Line 3250... | ||
| 2674 | #define RCC_MCOSOURCE_HSE RCC_MCO1SOURCE_HSE |
3250 | #define RCC_MCOSOURCE_HSE RCC_MCO1SOURCE_HSE |
| 2675 | #define RCC_MCOSOURCE_PLLCLK_DIV1 RCC_MCO1SOURCE_PLLCLK |
3251 | #define RCC_MCOSOURCE_PLLCLK_DIV1 RCC_MCO1SOURCE_PLLCLK |
| 2676 | #define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK |
3252 | #define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK |
| 2677 | #define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2 |
3253 | #define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2 |
| 2678 | 3254 | ||
| - | 3255 | #if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) |
|
| - | 3256 | #define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE |
|
| - | 3257 | #else |
|
| 2679 | #define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK |
3258 | #define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK |
| - | 3259 | #endif |
|
| 2680 | 3260 | ||
| 2681 | #define RCC_USBCLK_PLLSAI1 RCC_USBCLKSOURCE_PLLSAI1 |
3261 | #define RCC_USBCLK_PLLSAI1 RCC_USBCLKSOURCE_PLLSAI1 |
| 2682 | #define RCC_USBCLK_PLL RCC_USBCLKSOURCE_PLL |
3262 | #define RCC_USBCLK_PLL RCC_USBCLKSOURCE_PLL |
| 2683 | #define RCC_USBCLK_MSI RCC_USBCLKSOURCE_MSI |
3263 | #define RCC_USBCLK_MSI RCC_USBCLKSOURCE_MSI |
| 2684 | #define RCC_USBCLKSOURCE_PLLCLK RCC_USBCLKSOURCE_PLL |
3264 | #define RCC_USBCLKSOURCE_PLLCLK RCC_USBCLKSOURCE_PLL |
| Line 2766... | Line 3346... | ||
| 2766 | #define __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE __HAL_RCC_DFSDM1_CLK_SLEEP_DISABLE |
3346 | #define __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE __HAL_RCC_DFSDM1_CLK_SLEEP_DISABLE |
| 2767 | #define __HAL_RCC_DFSDM_IS_CLK_SLEEP_ENABLED __HAL_RCC_DFSDM1_IS_CLK_SLEEP_ENABLED |
3347 | #define __HAL_RCC_DFSDM_IS_CLK_SLEEP_ENABLED __HAL_RCC_DFSDM1_IS_CLK_SLEEP_ENABLED |
| 2768 | #define __HAL_RCC_DFSDM_IS_CLK_SLEEP_DISABLED __HAL_RCC_DFSDM1_IS_CLK_SLEEP_DISABLED |
3348 | #define __HAL_RCC_DFSDM_IS_CLK_SLEEP_DISABLED __HAL_RCC_DFSDM1_IS_CLK_SLEEP_DISABLED |
| 2769 | #define DfsdmClockSelection Dfsdm1ClockSelection |
3349 | #define DfsdmClockSelection Dfsdm1ClockSelection |
| 2770 | #define RCC_PERIPHCLK_DFSDM RCC_PERIPHCLK_DFSDM1 |
3350 | #define RCC_PERIPHCLK_DFSDM RCC_PERIPHCLK_DFSDM1 |
| 2771 | #define RCC_DFSDMCLKSOURCE_PCLK RCC_DFSDM1CLKSOURCE_PCLK |
3351 | #define RCC_DFSDMCLKSOURCE_PCLK RCC_DFSDM1CLKSOURCE_PCLK2 |
| 2772 | #define RCC_DFSDMCLKSOURCE_SYSCLK RCC_DFSDM1CLKSOURCE_SYSCLK |
3352 | #define RCC_DFSDMCLKSOURCE_SYSCLK RCC_DFSDM1CLKSOURCE_SYSCLK |
| 2773 | #define __HAL_RCC_DFSDM_CONFIG __HAL_RCC_DFSDM1_CONFIG |
3353 | #define __HAL_RCC_DFSDM_CONFIG __HAL_RCC_DFSDM1_CONFIG |
| 2774 | #define __HAL_RCC_GET_DFSDM_SOURCE __HAL_RCC_GET_DFSDM1_SOURCE |
3354 | #define __HAL_RCC_GET_DFSDM_SOURCE __HAL_RCC_GET_DFSDM1_SOURCE |
| - | 3355 | #define RCC_DFSDM1CLKSOURCE_PCLK RCC_DFSDM1CLKSOURCE_PCLK2 |
|
| - | 3356 | #define RCC_SWPMI1CLKSOURCE_PCLK RCC_SWPMI1CLKSOURCE_PCLK1 |
|
| - | 3357 | #define RCC_LPTIM1CLKSOURCE_PCLK RCC_LPTIM1CLKSOURCE_PCLK1 |
|
| - | 3358 | #define RCC_LPTIM2CLKSOURCE_PCLK RCC_LPTIM2CLKSOURCE_PCLK1 |
|
| - | 3359 | ||
| - | 3360 | #define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB1 RCC_DFSDM1AUDIOCLKSOURCE_I2S1 |
|
| - | 3361 | #define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB2 RCC_DFSDM1AUDIOCLKSOURCE_I2S2 |
|
| - | 3362 | #define RCC_DFSDM2AUDIOCLKSOURCE_I2SAPB1 RCC_DFSDM2AUDIOCLKSOURCE_I2S1 |
|
| - | 3363 | #define RCC_DFSDM2AUDIOCLKSOURCE_I2SAPB2 RCC_DFSDM2AUDIOCLKSOURCE_I2S2 |
|
| - | 3364 | #define RCC_DFSDM1CLKSOURCE_APB2 RCC_DFSDM1CLKSOURCE_PCLK2 |
|
| - | 3365 | #define RCC_DFSDM2CLKSOURCE_APB2 RCC_DFSDM2CLKSOURCE_PCLK2 |
|
| - | 3366 | #define RCC_FMPI2C1CLKSOURCE_APB RCC_FMPI2C1CLKSOURCE_PCLK1 |
|
| 2775 | 3367 | ||
| 2776 | /** |
3368 | /** |
| 2777 | * @} |
3369 | * @} |
| 2778 | */ |
3370 | */ |
| 2779 | 3371 | ||
| 2780 | /** @defgroup HAL_RNG_Aliased_Macros HAL RNG Aliased Macros maintained for legacy purpose |
3372 | /** @defgroup HAL_RNG_Aliased_Macros HAL RNG Aliased Macros maintained for legacy purpose |
| 2781 | * @{ |
3373 | * @{ |
| 2782 | */ |
3374 | */ |
| 2783 | #define HAL_RNG_ReadyCallback(__HANDLE__) HAL_RNG_ReadyDataCallback((__HANDLE__), uint32_t random32bit) |
3375 | #define HAL_RNG_ReadyCallback(__HANDLE__) HAL_RNG_ReadyDataCallback((__HANDLE__), uint32_t random32bit) |
| 2784 | 3376 | ||
| 2785 | /** |
3377 | /** |
| 2786 | * @} |
3378 | * @} |
| 2787 | */ |
3379 | */ |
| 2788 | 3380 | ||
| 2789 | /** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose |
3381 | /** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose |
| 2790 | * @{ |
3382 | * @{ |
| 2791 | */ |
3383 | */ |
| - | 3384 | #if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32G4) |
|
| 2792 | 3385 | #else |
|
| 2793 | #define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG |
3386 | #define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG |
| - | 3387 | #endif |
|
| 2794 | #define __HAL_RTC_DISABLE_IT __HAL_RTC_EXTI_DISABLE_IT |
3388 | #define __HAL_RTC_DISABLE_IT __HAL_RTC_EXTI_DISABLE_IT |
| 2795 | #define __HAL_RTC_ENABLE_IT __HAL_RTC_EXTI_ENABLE_IT |
3389 | #define __HAL_RTC_ENABLE_IT __HAL_RTC_EXTI_ENABLE_IT |
| 2796 | 3390 | ||
| 2797 | #if defined (STM32F1) |
3391 | #if defined (STM32F1) |
| 2798 | #define __HAL_RTC_EXTI_CLEAR_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_CLEAR_FLAG() |
3392 | #define __HAL_RTC_EXTI_CLEAR_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_CLEAR_FLAG() |
| Line 2824... | Line 3418... | ||
| 2824 | 3418 | ||
| 2825 | #define IS_ALARM IS_RTC_ALARM |
3419 | #define IS_ALARM IS_RTC_ALARM |
| 2826 | #define IS_ALARM_MASK IS_RTC_ALARM_MASK |
3420 | #define IS_ALARM_MASK IS_RTC_ALARM_MASK |
| 2827 | #define IS_TAMPER IS_RTC_TAMPER |
3421 | #define IS_TAMPER IS_RTC_TAMPER |
| 2828 | #define IS_TAMPER_ERASE_MODE IS_RTC_TAMPER_ERASE_MODE |
3422 | #define IS_TAMPER_ERASE_MODE IS_RTC_TAMPER_ERASE_MODE |
| 2829 | #define IS_TAMPER_FILTER IS_RTC_TAMPER_FILTER |
3423 | #define IS_TAMPER_FILTER IS_RTC_TAMPER_FILTER |
| 2830 | #define IS_TAMPER_INTERRUPT IS_RTC_TAMPER_INTERRUPT |
3424 | #define IS_TAMPER_INTERRUPT IS_RTC_TAMPER_INTERRUPT |
| 2831 | #define IS_TAMPER_MASKFLAG_STATE IS_RTC_TAMPER_MASKFLAG_STATE |
3425 | #define IS_TAMPER_MASKFLAG_STATE IS_RTC_TAMPER_MASKFLAG_STATE |
| 2832 | #define IS_TAMPER_PRECHARGE_DURATION IS_RTC_TAMPER_PRECHARGE_DURATION |
3426 | #define IS_TAMPER_PRECHARGE_DURATION IS_RTC_TAMPER_PRECHARGE_DURATION |
| 2833 | #define IS_TAMPER_PULLUP_STATE IS_RTC_TAMPER_PULLUP_STATE |
3427 | #define IS_TAMPER_PULLUP_STATE IS_RTC_TAMPER_PULLUP_STATE |
| 2834 | #define IS_TAMPER_SAMPLING_FREQ IS_RTC_TAMPER_SAMPLING_FREQ |
3428 | #define IS_TAMPER_SAMPLING_FREQ IS_RTC_TAMPER_SAMPLING_FREQ |
| Line 2849... | Line 3443... | ||
| 2849 | */ |
3443 | */ |
| 2850 | 3444 | ||
| 2851 | #define SD_OCR_CID_CSD_OVERWRIETE SD_OCR_CID_CSD_OVERWRITE |
3445 | #define SD_OCR_CID_CSD_OVERWRIETE SD_OCR_CID_CSD_OVERWRITE |
| 2852 | #define SD_CMD_SD_APP_STAUS SD_CMD_SD_APP_STATUS |
3446 | #define SD_CMD_SD_APP_STAUS SD_CMD_SD_APP_STATUS |
| 2853 | 3447 | ||
| 2854 | #if defined(STM32F4) |
3448 | #if defined(STM32F4) || defined(STM32F2) |
| 2855 | #define SD_SDMMC_DISABLED SD_SDIO_DISABLED |
3449 | #define SD_SDMMC_DISABLED SD_SDIO_DISABLED |
| 2856 | #define SD_SDMMC_FUNCTION_BUSY SD_SDIO_FUNCTION_BUSY |
3450 | #define SD_SDMMC_FUNCTION_BUSY SD_SDIO_FUNCTION_BUSY |
| 2857 | #define SD_SDMMC_FUNCTION_FAILED SD_SDIO_FUNCTION_FAILED |
3451 | #define SD_SDMMC_FUNCTION_FAILED SD_SDIO_FUNCTION_FAILED |
| 2858 | #define SD_SDMMC_UNKNOWN_FUNCTION SD_SDIO_UNKNOWN_FUNCTION |
3452 | #define SD_SDMMC_UNKNOWN_FUNCTION SD_SDIO_UNKNOWN_FUNCTION |
| 2859 | #define SD_CMD_SDMMC_SEN_OP_COND SD_CMD_SDIO_SEN_OP_COND |
3453 | #define SD_CMD_SDMMC_SEN_OP_COND SD_CMD_SDIO_SEN_OP_COND |
| 2860 | #define SD_CMD_SDMMC_RW_DIRECT SD_CMD_SDIO_RW_DIRECT |
3454 | #define SD_CMD_SDMMC_RW_DIRECT SD_CMD_SDIO_RW_DIRECT |
| 2861 | #define SD_CMD_SDMMC_RW_EXTENDED SD_CMD_SDIO_RW_EXTENDED |
3455 | #define SD_CMD_SDMMC_RW_EXTENDED SD_CMD_SDIO_RW_EXTENDED |
| 2862 | #define __HAL_SD_SDMMC_ENABLE __HAL_SD_SDIO_ENABLE |
3456 | #define __HAL_SD_SDMMC_ENABLE __HAL_SD_SDIO_ENABLE |
| 2863 | #define __HAL_SD_SDMMC_DISABLE __HAL_SD_SDIO_DISABLE |
3457 | #define __HAL_SD_SDMMC_DISABLE __HAL_SD_SDIO_DISABLE |
| 2864 | #define __HAL_SD_SDMMC_DMA_ENABLE __HAL_SD_SDIO_DMA_ENABLE |
3458 | #define __HAL_SD_SDMMC_DMA_ENABLE __HAL_SD_SDIO_DMA_ENABLE |
| 2865 | #define __HAL_SD_SDMMC_DMA_DISABLE __HAL_SD_SDIO_DMA_DISABL |
3459 | #define __HAL_SD_SDMMC_DMA_DISABLE __HAL_SD_SDIO_DMA_DISABL |
| 2866 | #define __HAL_SD_SDMMC_ENABLE_IT __HAL_SD_SDIO_ENABLE_IT |
3460 | #define __HAL_SD_SDMMC_ENABLE_IT __HAL_SD_SDIO_ENABLE_IT |
| 2867 | #define __HAL_SD_SDMMC_DISABLE_IT __HAL_SD_SDIO_DISABLE_IT |
3461 | #define __HAL_SD_SDMMC_DISABLE_IT __HAL_SD_SDIO_DISABLE_IT |
| 2868 | #define __HAL_SD_SDMMC_GET_FLAG __HAL_SD_SDIO_GET_FLAG |
3462 | #define __HAL_SD_SDMMC_GET_FLAG __HAL_SD_SDIO_GET_FLAG |
| 2869 | #define __HAL_SD_SDMMC_CLEAR_FLAG __HAL_SD_SDIO_CLEAR_FLAG |
3463 | #define __HAL_SD_SDMMC_CLEAR_FLAG __HAL_SD_SDIO_CLEAR_FLAG |
| 2870 | #define __HAL_SD_SDMMC_GET_IT __HAL_SD_SDIO_GET_IT |
3464 | #define __HAL_SD_SDMMC_GET_IT __HAL_SD_SDIO_GET_IT |
| 2871 | #define __HAL_SD_SDMMC_CLEAR_IT __HAL_SD_SDIO_CLEAR_IT |
3465 | #define __HAL_SD_SDMMC_CLEAR_IT __HAL_SD_SDIO_CLEAR_IT |
| 2872 | #define SDMMC_STATIC_FLAGS SDIO_STATIC_FLAGS |
3466 | #define SDMMC_STATIC_FLAGS SDIO_STATIC_FLAGS |
| 2873 | #define SDMMC_CMD0TIMEOUT SDIO_CMD0TIMEOUT |
3467 | #define SDMMC_CMD0TIMEOUT SDIO_CMD0TIMEOUT |
| 2874 | #define SD_SDMMC_SEND_IF_COND SD_SDIO_SEND_IF_COND |
3468 | #define SD_SDMMC_SEND_IF_COND SD_SDIO_SEND_IF_COND |
| 2875 | /* alias CMSIS */ |
3469 | /* alias CMSIS */ |
| 2876 | #define SDMMC1_IRQn SDIO_IRQn |
3470 | #define SDMMC1_IRQn SDIO_IRQn |
| 2877 | #define SDMMC1_IRQHandler SDIO_IRQHandler |
3471 | #define SDMMC1_IRQHandler SDIO_IRQHandler |
| 2878 | #endif |
3472 | #endif |
| 2879 | 3473 | ||
| 2880 | #if defined(STM32F7) || defined(STM32L4) |
3474 | #if defined(STM32F7) || defined(STM32L4) |
| 2881 | #define SD_SDIO_DISABLED SD_SDMMC_DISABLED |
3475 | #define SD_SDIO_DISABLED SD_SDMMC_DISABLED |
| 2882 | #define SD_SDIO_FUNCTION_BUSY SD_SDMMC_FUNCTION_BUSY |
3476 | #define SD_SDIO_FUNCTION_BUSY SD_SDMMC_FUNCTION_BUSY |
| 2883 | #define SD_SDIO_FUNCTION_FAILED SD_SDMMC_FUNCTION_FAILED |
3477 | #define SD_SDIO_FUNCTION_FAILED SD_SDMMC_FUNCTION_FAILED |
| 2884 | #define SD_SDIO_UNKNOWN_FUNCTION SD_SDMMC_UNKNOWN_FUNCTION |
3478 | #define SD_SDIO_UNKNOWN_FUNCTION SD_SDMMC_UNKNOWN_FUNCTION |
| 2885 | #define SD_CMD_SDIO_SEN_OP_COND SD_CMD_SDMMC_SEN_OP_COND |
3479 | #define SD_CMD_SDIO_SEN_OP_COND SD_CMD_SDMMC_SEN_OP_COND |
| 2886 | #define SD_CMD_SDIO_RW_DIRECT SD_CMD_SDMMC_RW_DIRECT |
3480 | #define SD_CMD_SDIO_RW_DIRECT SD_CMD_SDMMC_RW_DIRECT |
| 2887 | #define SD_CMD_SDIO_RW_EXTENDED SD_CMD_SDMMC_RW_EXTENDED |
3481 | #define SD_CMD_SDIO_RW_EXTENDED SD_CMD_SDMMC_RW_EXTENDED |
| 2888 | #define __HAL_SD_SDIO_ENABLE __HAL_SD_SDMMC_ENABLE |
3482 | #define __HAL_SD_SDIO_ENABLE __HAL_SD_SDMMC_ENABLE |
| Line 2893... | Line 3487... | ||
| 2893 | #define __HAL_SD_SDIO_DISABLE_IT __HAL_SD_SDMMC_DISABLE_IT |
3487 | #define __HAL_SD_SDIO_DISABLE_IT __HAL_SD_SDMMC_DISABLE_IT |
| 2894 | #define __HAL_SD_SDIO_GET_FLAG __HAL_SD_SDMMC_GET_FLAG |
3488 | #define __HAL_SD_SDIO_GET_FLAG __HAL_SD_SDMMC_GET_FLAG |
| 2895 | #define __HAL_SD_SDIO_CLEAR_FLAG __HAL_SD_SDMMC_CLEAR_FLAG |
3489 | #define __HAL_SD_SDIO_CLEAR_FLAG __HAL_SD_SDMMC_CLEAR_FLAG |
| 2896 | #define __HAL_SD_SDIO_GET_IT __HAL_SD_SDMMC_GET_IT |
3490 | #define __HAL_SD_SDIO_GET_IT __HAL_SD_SDMMC_GET_IT |
| 2897 | #define __HAL_SD_SDIO_CLEAR_IT __HAL_SD_SDMMC_CLEAR_IT |
3491 | #define __HAL_SD_SDIO_CLEAR_IT __HAL_SD_SDMMC_CLEAR_IT |
| 2898 | #define SDIO_STATIC_FLAGS SDMMC_STATIC_FLAGS |
3492 | #define SDIO_STATIC_FLAGS SDMMC_STATIC_FLAGS |
| 2899 | #define SDIO_CMD0TIMEOUT SDMMC_CMD0TIMEOUT |
3493 | #define SDIO_CMD0TIMEOUT SDMMC_CMD0TIMEOUT |
| 2900 | #define SD_SDIO_SEND_IF_COND SD_SDMMC_SEND_IF_COND |
3494 | #define SD_SDIO_SEND_IF_COND SD_SDMMC_SEND_IF_COND |
| 2901 | /* alias CMSIS for compatibilities */ |
3495 | /* alias CMSIS for compatibilities */ |
| 2902 | #define SDIO_IRQn SDMMC1_IRQn |
3496 | #define SDIO_IRQn SDMMC1_IRQn |
| 2903 | #define SDIO_IRQHandler SDMMC1_IRQHandler |
3497 | #define SDIO_IRQHandler SDMMC1_IRQHandler |
| 2904 | #endif |
3498 | #endif |
| - | 3499 | ||
| - | 3500 | #if defined(STM32F7) || defined(STM32F4) || defined(STM32F2) || defined(STM32L4) || defined(STM32H7) |
|
| - | 3501 | #define HAL_SD_CardCIDTypedef HAL_SD_CardCIDTypeDef |
|
| - | 3502 | #define HAL_SD_CardCSDTypedef HAL_SD_CardCSDTypeDef |
|
| - | 3503 | #define HAL_SD_CardStatusTypedef HAL_SD_CardStatusTypeDef |
|
| - | 3504 | #define HAL_SD_CardStateTypedef HAL_SD_CardStateTypeDef |
|
| - | 3505 | #endif |
|
| - | 3506 | ||
| - | 3507 | #if defined(STM32H7) || defined(STM32L5) |
|
| - | 3508 | #define HAL_MMCEx_Read_DMADoubleBuffer0CpltCallback HAL_MMCEx_Read_DMADoubleBuf0CpltCallback |
|
| - | 3509 | #define HAL_MMCEx_Read_DMADoubleBuffer1CpltCallback HAL_MMCEx_Read_DMADoubleBuf1CpltCallback |
|
| - | 3510 | #define HAL_MMCEx_Write_DMADoubleBuffer0CpltCallback HAL_MMCEx_Write_DMADoubleBuf0CpltCallback |
|
| - | 3511 | #define HAL_MMCEx_Write_DMADoubleBuffer1CpltCallback HAL_MMCEx_Write_DMADoubleBuf1CpltCallback |
|
| - | 3512 | #define HAL_SDEx_Read_DMADoubleBuffer0CpltCallback HAL_SDEx_Read_DMADoubleBuf0CpltCallback |
|
| - | 3513 | #define HAL_SDEx_Read_DMADoubleBuffer1CpltCallback HAL_SDEx_Read_DMADoubleBuf1CpltCallback |
|
| - | 3514 | #define HAL_SDEx_Write_DMADoubleBuffer0CpltCallback HAL_SDEx_Write_DMADoubleBuf0CpltCallback |
|
| - | 3515 | #define HAL_SDEx_Write_DMADoubleBuffer1CpltCallback HAL_SDEx_Write_DMADoubleBuf1CpltCallback |
|
| - | 3516 | #define HAL_SD_DriveTransciver_1_8V_Callback HAL_SD_DriveTransceiver_1_8V_Callback |
|
| - | 3517 | #endif |
|
| 2905 | /** |
3518 | /** |
| 2906 | * @} |
3519 | * @} |
| 2907 | */ |
3520 | */ |
| 2908 | 3521 | ||
| 2909 | /** @defgroup HAL_SMARTCARD_Aliased_Macros HAL SMARTCARD Aliased Macros maintained for legacy purpose |
3522 | /** @defgroup HAL_SMARTCARD_Aliased_Macros HAL SMARTCARD Aliased Macros maintained for legacy purpose |
| Line 2918... | Line 3531... | ||
| 2918 | #define __SMARTCARD_DMA_REQUEST_DISABLE __HAL_SMARTCARD_DMA_REQUEST_DISABLE |
3531 | #define __SMARTCARD_DMA_REQUEST_DISABLE __HAL_SMARTCARD_DMA_REQUEST_DISABLE |
| 2919 | 3532 | ||
| 2920 | #define __HAL_SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE |
3533 | #define __HAL_SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE |
| 2921 | #define __SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE |
3534 | #define __SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE |
| 2922 | 3535 | ||
| 2923 | #define IS_SMARTCARD_ONEBIT_SAMPLING IS_SMARTCARD_ONE_BIT_SAMPLE |
3536 | #define IS_SMARTCARD_ONEBIT_SAMPLING IS_SMARTCARD_ONE_BIT_SAMPLE |
| 2924 | 3537 | ||
| 2925 | /** |
3538 | /** |
| 2926 | * @} |
3539 | * @} |
| 2927 | */ |
3540 | */ |
| 2928 | 3541 | ||
| Line 2950... | Line 3563... | ||
| 2950 | #define __HAL_SPI_RESET_CRC SPI_RESET_CRC |
3563 | #define __HAL_SPI_RESET_CRC SPI_RESET_CRC |
| 2951 | 3564 | ||
| 2952 | /** |
3565 | /** |
| 2953 | * @} |
3566 | * @} |
| 2954 | */ |
3567 | */ |
| 2955 | 3568 | ||
| 2956 | /** @defgroup HAL_UART_Aliased_Macros HAL UART Aliased Macros maintained for legacy purpose |
3569 | /** @defgroup HAL_UART_Aliased_Macros HAL UART Aliased Macros maintained for legacy purpose |
| 2957 | * @{ |
3570 | * @{ |
| 2958 | */ |
3571 | */ |
| 2959 | 3572 | ||
| 2960 | #define __HAL_UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE |
3573 | #define __HAL_UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE |
| Line 2962... | Line 3575... | ||
| 2962 | #define __UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE |
3575 | #define __UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE |
| 2963 | #define __UART_MASK_COMPUTATION UART_MASK_COMPUTATION |
3576 | #define __UART_MASK_COMPUTATION UART_MASK_COMPUTATION |
| 2964 | 3577 | ||
| 2965 | #define IS_UART_WAKEUPMETHODE IS_UART_WAKEUPMETHOD |
3578 | #define IS_UART_WAKEUPMETHODE IS_UART_WAKEUPMETHOD |
| 2966 | 3579 | ||
| 2967 | #define IS_UART_ONEBIT_SAMPLE IS_UART_ONE_BIT_SAMPLE |
3580 | #define IS_UART_ONEBIT_SAMPLE IS_UART_ONE_BIT_SAMPLE |
| 2968 | #define IS_UART_ONEBIT_SAMPLING IS_UART_ONE_BIT_SAMPLE |
3581 | #define IS_UART_ONEBIT_SAMPLING IS_UART_ONE_BIT_SAMPLE |
| 2969 | 3582 | ||
| 2970 | /** |
3583 | /** |
| 2971 | * @} |
3584 | * @} |
| 2972 | */ |
3585 | */ |
| 2973 | 3586 | ||
| Line 3068... | Line 3681... | ||
| 3068 | */ |
3681 | */ |
| 3069 | 3682 | ||
| 3070 | /** @defgroup HAL_ETH_Aliased_Macros HAL ETH Aliased Macros maintained for legacy purpose |
3683 | /** @defgroup HAL_ETH_Aliased_Macros HAL ETH Aliased Macros maintained for legacy purpose |
| 3071 | * @{ |
3684 | * @{ |
| 3072 | */ |
3685 | */ |
| 3073 | 3686 | ||
| 3074 | #define __HAL_ETH_EXTI_ENABLE_IT __HAL_ETH_WAKEUP_EXTI_ENABLE_IT |
3687 | #define __HAL_ETH_EXTI_ENABLE_IT __HAL_ETH_WAKEUP_EXTI_ENABLE_IT |
| 3075 | #define __HAL_ETH_EXTI_DISABLE_IT __HAL_ETH_WAKEUP_EXTI_DISABLE_IT |
3688 | #define __HAL_ETH_EXTI_DISABLE_IT __HAL_ETH_WAKEUP_EXTI_DISABLE_IT |
| 3076 | #define __HAL_ETH_EXTI_GET_FLAG __HAL_ETH_WAKEUP_EXTI_GET_FLAG |
3689 | #define __HAL_ETH_EXTI_GET_FLAG __HAL_ETH_WAKEUP_EXTI_GET_FLAG |
| 3077 | #define __HAL_ETH_EXTI_CLEAR_FLAG __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG |
3690 | #define __HAL_ETH_EXTI_CLEAR_FLAG __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG |
| 3078 | #define __HAL_ETH_EXTI_SET_RISING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_RISING_EDGE_TRIGGER |
3691 | #define __HAL_ETH_EXTI_SET_RISING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_RISING_EDGE_TRIGGER |
| 3079 | #define __HAL_ETH_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLING_EDGE_TRIGGER |
3692 | #define __HAL_ETH_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLING_EDGE_TRIGGER |
| 3080 | #define __HAL_ETH_EXTI_SET_FALLINGRISING_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLINGRISING_TRIGGER |
3693 | #define __HAL_ETH_EXTI_SET_FALLINGRISING_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLINGRISING_TRIGGER |
| 3081 | 3694 | ||
| 3082 | #define ETH_PROMISCIOUSMODE_ENABLE ETH_PROMISCUOUS_MODE_ENABLE |
3695 | #define ETH_PROMISCIOUSMODE_ENABLE ETH_PROMISCUOUS_MODE_ENABLE |
| 3083 | #define ETH_PROMISCIOUSMODE_DISABLE ETH_PROMISCUOUS_MODE_DISABLE |
3696 | #define ETH_PROMISCIOUSMODE_DISABLE ETH_PROMISCUOUS_MODE_DISABLE |
| 3084 | #define IS_ETH_PROMISCIOUS_MODE IS_ETH_PROMISCUOUS_MODE |
3697 | #define IS_ETH_PROMISCIOUS_MODE IS_ETH_PROMISCUOUS_MODE |
| 3085 | /** |
3698 | /** |
| 3086 | * @} |
3699 | * @} |
| 3087 | */ |
3700 | */ |
| 3088 | 3701 | ||
| 3089 | /** @defgroup HAL_LTDC_Aliased_Macros HAL LTDC Aliased Macros maintained for legacy purpose |
3702 | /** @defgroup HAL_LTDC_Aliased_Macros HAL LTDC Aliased Macros maintained for legacy purpose |
| 3090 | * @{ |
3703 | * @{ |
| 3091 | */ |
3704 | */ |
| 3092 | #define __HAL_LTDC_LAYER LTDC_LAYER |
3705 | #define __HAL_LTDC_LAYER LTDC_LAYER |
| - | 3706 | #define __HAL_LTDC_RELOAD_CONFIG __HAL_LTDC_RELOAD_IMMEDIATE_CONFIG |
|
| 3093 | /** |
3707 | /** |
| 3094 | * @} |
3708 | * @} |
| 3095 | */ |
3709 | */ |
| 3096 | 3710 | ||
| 3097 | /** @defgroup HAL_SAI_Aliased_Macros HAL SAI Aliased Macros maintained for legacy purpose |
3711 | /** @defgroup HAL_SAI_Aliased_Macros HAL SAI Aliased Macros maintained for legacy purpose |
| Line 3113... | Line 3727... | ||
| 3113 | #define SAI_SYNCEXT_IN_ENABLE SAI_SYNCEXT_OUTBLOCKA_ENABLE |
3727 | #define SAI_SYNCEXT_IN_ENABLE SAI_SYNCEXT_OUTBLOCKA_ENABLE |
| 3114 | /** |
3728 | /** |
| 3115 | * @} |
3729 | * @} |
| 3116 | */ |
3730 | */ |
| 3117 | 3731 | ||
| - | 3732 | /** @defgroup HAL_SPDIFRX_Aliased_Macros HAL SPDIFRX Aliased Macros maintained for legacy purpose |
|
| - | 3733 | * @{ |
|
| - | 3734 | */ |
|
| - | 3735 | #if defined(STM32H7) |
|
| - | 3736 | #define HAL_SPDIFRX_ReceiveControlFlow HAL_SPDIFRX_ReceiveCtrlFlow |
|
| - | 3737 | #define HAL_SPDIFRX_ReceiveControlFlow_IT HAL_SPDIFRX_ReceiveCtrlFlow_IT |
|
| - | 3738 | #define HAL_SPDIFRX_ReceiveControlFlow_DMA HAL_SPDIFRX_ReceiveCtrlFlow_DMA |
|
| - | 3739 | #endif |
|
| - | 3740 | /** |
|
| - | 3741 | * @} |
|
| - | 3742 | */ |
|
| - | 3743 | ||
| - | 3744 | /** @defgroup HAL_HRTIM_Aliased_Functions HAL HRTIM Aliased Functions maintained for legacy purpose |
|
| - | 3745 | * @{ |
|
| - | 3746 | */ |
|
| - | 3747 | #if defined (STM32H7) || defined (STM32G4) || defined (STM32F3) |
|
| - | 3748 | #define HAL_HRTIM_WaveformCounterStart_IT HAL_HRTIM_WaveformCountStart_IT |
|
| - | 3749 | #define HAL_HRTIM_WaveformCounterStart_DMA HAL_HRTIM_WaveformCountStart_DMA |
|
| - | 3750 | #define HAL_HRTIM_WaveformCounterStart HAL_HRTIM_WaveformCountStart |
|
| - | 3751 | #define HAL_HRTIM_WaveformCounterStop_IT HAL_HRTIM_WaveformCountStop_IT |
|
| - | 3752 | #define HAL_HRTIM_WaveformCounterStop_DMA HAL_HRTIM_WaveformCountStop_DMA |
|
| - | 3753 | #define HAL_HRTIM_WaveformCounterStop HAL_HRTIM_WaveformCountStop |
|
| - | 3754 | #endif |
|
| - | 3755 | /** |
|
| - | 3756 | * @} |
|
| - | 3757 | */ |
|
| - | 3758 | ||
| - | 3759 | /** @defgroup HAL_QSPI_Aliased_Macros HAL QSPI Aliased Macros maintained for legacy purpose |
|
| - | 3760 | * @{ |
|
| - | 3761 | */ |
|
| - | 3762 | #if defined (STM32L4) || defined (STM32F4) || defined (STM32F7) || defined(STM32H7) |
|
| - | 3763 | #define HAL_QPSI_TIMEOUT_DEFAULT_VALUE HAL_QSPI_TIMEOUT_DEFAULT_VALUE |
|
| - | 3764 | #endif /* STM32L4 || STM32F4 || STM32F7 */ |
|
| - | 3765 | /** |
|
| - | 3766 | * @} |
|
| - | 3767 | */ |
|
| 3118 | 3768 | ||
| 3119 | /** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose |
3769 | /** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose |
| 3120 | * @{ |
3770 | * @{ |
| 3121 | */ |
3771 | */ |
| 3122 | 3772 | ||
| 3123 | /** |
3773 | /** |
| 3124 | * @} |
3774 | * @} |
| 3125 | */ |
3775 | */ |
| 3126 | 3776 | ||
| 3127 | #ifdef __cplusplus |
3777 | #ifdef __cplusplus |
| 3128 | } |
3778 | } |
| 3129 | #endif |
3779 | #endif |
| 3130 | 3780 | ||
| 3131 | #endif /* ___STM32_HAL_LEGACY */ |
3781 | #endif /* STM32_HAL_LEGACY */ |
| 3132 | 3782 | ||
| 3133 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
3783 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
| 3134 | 3784 | ||