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| 1 | /** |
1 | /** |
| 2 | ****************************************************************************** |
2 | ****************************************************************************** |
| 3 | * @file system_stm32l1xx.c |
3 | * @file system_stm32l1xx.c |
| 4 | * @author MCD Application Team |
4 | * @author MCD Application Team |
| 5 | * @version V2.2.0 |
- | |
| 6 | * @date 01-July-2016 |
- | |
| 7 | * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File. |
5 | * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File. |
| 8 | * |
6 | * |
| 9 | * This file provides two functions and one global variable to be called from |
7 | * This file provides two functions and one global variable to be called from |
| 10 | * user application: |
8 | * user application: |
| 11 | * - SystemInit(): This function is called at startup just after reset and |
9 | * - SystemInit(): This function is called at startup just after reset and |
| Line 21... | Line 19... | ||
| 21 | * during program execution. |
19 | * during program execution. |
| 22 | * |
20 | * |
| 23 | ****************************************************************************** |
21 | ****************************************************************************** |
| 24 | * @attention |
22 | * @attention |
| 25 | * |
23 | * |
| 26 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
24 | * <h2><center>© Copyright (c) 2017 STMicroelectronics. |
| - | 25 | * All rights reserved.</center></h2> |
|
| 27 | * |
26 | * |
| 28 | * Redistribution and use in source and binary forms, with or without modification, |
27 | * This software component is licensed by ST under BSD 3-Clause license, |
| 29 | * are permitted provided that the following conditions are met: |
28 | * the "License"; You may not use this file except in compliance with the |
| 30 | * 1. Redistributions of source code must retain the above copyright notice, |
- | |
| 31 | * this list of conditions and the following disclaimer. |
- | |
| 32 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
- | |
| 33 | * this list of conditions and the following disclaimer in the documentation |
- | |
| 34 | * and/or other materials provided with the distribution. |
29 | * License. You may obtain a copy of the License at: |
| 35 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
- | |
| 36 | * may be used to endorse or promote products derived from this software |
30 | * opensource.org/licenses/BSD-3-Clause |
| 37 | * without specific prior written permission. |
- | |
| 38 | * |
- | |
| 39 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
- | |
| 40 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
- | |
| 41 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
- | |
| 42 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
- | |
| 43 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
- | |
| 44 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
- | |
| 45 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
- | |
| 46 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
- | |
| 47 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
- | |
| 48 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
- | |
| 49 | * |
31 | * |
| 50 | ****************************************************************************** |
32 | ****************************************************************************** |
| 51 | */ |
33 | */ |
| 52 | 34 | ||
| 53 | /** @addtogroup CMSIS |
35 | /** @addtogroup CMSIS |
| Line 78... | Line 60... | ||
| 78 | 60 | ||
| 79 | /** @addtogroup STM32L1xx_System_Private_Defines |
61 | /** @addtogroup STM32L1xx_System_Private_Defines |
| 80 | * @{ |
62 | * @{ |
| 81 | */ |
63 | */ |
| 82 | #if !defined (HSE_VALUE) |
64 | #if !defined (HSE_VALUE) |
| 83 | #define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz. |
65 | #define HSE_VALUE ((uint32_t)8000000U) /*!< Default value of the External oscillator in Hz. |
| 84 | This value can be provided and adapted by the user application. */ |
66 | This value can be provided and adapted by the user application. */ |
| 85 | #endif /* HSE_VALUE */ |
67 | #endif /* HSE_VALUE */ |
| 86 | 68 | ||
| 87 | #if !defined (HSI_VALUE) |
69 | #if !defined (HSI_VALUE) |
| 88 | #define HSI_VALUE ((uint32_t)8000000) /*!< Default value of the Internal oscillator in Hz. |
70 | #define HSI_VALUE ((uint32_t)8000000U) /*!< Default value of the Internal oscillator in Hz. |
| 89 | This value can be provided and adapted by the user application. */ |
71 | This value can be provided and adapted by the user application. */ |
| 90 | #endif /* HSI_VALUE */ |
72 | #endif /* HSI_VALUE */ |
| 91 | 73 | ||
| 92 | /*!< Uncomment the following line if you need to use external SRAM mounted |
74 | /*!< Uncomment the following line if you need to use external SRAM mounted |
| 93 | on STM32L152D_EVAL board as data memory */ |
75 | on STM32L152D_EVAL board as data memory */ |
| 94 | /* #define DATA_IN_ExtSRAM */ |
76 | /* #define DATA_IN_ExtSRAM */ |
| 95 | 77 | ||
| 96 | /*!< Uncomment the following line if you need to relocate your vector Table in |
78 | /*!< Uncomment the following line if you need to relocate your vector Table in |
| 97 | Internal SRAM. */ |
79 | Internal SRAM. */ |
| 98 | /* #define VECT_TAB_SRAM */ |
80 | /* #define VECT_TAB_SRAM */ |
| 99 | #define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field. |
81 | #define VECT_TAB_OFFSET 0x00U /*!< Vector Table base offset field. |
| 100 | This value must be a multiple of 0x200. */ |
82 | This value must be a multiple of 0x200. */ |
| 101 | /** |
83 | /** |
| 102 | * @} |
84 | * @} |
| 103 | */ |
85 | */ |
| 104 | 86 | ||
| Line 119... | Line 101... | ||
| 119 | 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency |
101 | 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency |
| 120 | Note: If you use this function to configure the system clock; then there |
102 | Note: If you use this function to configure the system clock; then there |
| 121 | is no need to call the 2 first functions listed above, since SystemCoreClock |
103 | is no need to call the 2 first functions listed above, since SystemCoreClock |
| 122 | variable is updated automatically. |
104 | variable is updated automatically. |
| 123 | */ |
105 | */ |
| 124 | uint32_t SystemCoreClock = 2097000; |
106 | uint32_t SystemCoreClock = 2097000U; |
| 125 | const uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48}; |
107 | const uint8_t PLLMulTable[9] = {3U, 4U, 6U, 8U, 12U, 16U, 24U, 32U, 48U}; |
| 126 | const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; |
108 | const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; |
| 127 | const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; |
109 | const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; |
| 128 | 110 | ||
| 129 | /** |
111 | /** |
| 130 | * @} |
112 | * @} |
| 131 | */ |
113 | */ |
| 132 | 114 | ||
| Line 155... | Line 137... | ||
| 155 | * @param None |
137 | * @param None |
| 156 | * @retval None |
138 | * @retval None |
| 157 | */ |
139 | */ |
| 158 | void SystemInit (void) |
140 | void SystemInit (void) |
| 159 | { |
141 | { |
| 160 | /*!< Set MSION bit */ |
- | |
| 161 | RCC->CR |= (uint32_t)0x00000100; |
- | |
| 162 | - | ||
| 163 | /*!< Reset SW[1:0], HPRE[3:0], PPRE1[2:0], PPRE2[2:0], MCOSEL[2:0] and MCOPRE[2:0] bits */ |
- | |
| 164 | RCC->CFGR &= (uint32_t)0x88FFC00C; |
- | |
| 165 | - | ||
| 166 | /*!< Reset HSION, HSEON, CSSON and PLLON bits */ |
- | |
| 167 | RCC->CR &= (uint32_t)0xEEFEFFFE; |
- | |
| 168 | - | ||
| 169 | /*!< Reset HSEBYP bit */ |
- | |
| 170 | RCC->CR &= (uint32_t)0xFFFBFFFF; |
- | |
| 171 | - | ||
| 172 | /*!< Reset PLLSRC, PLLMUL[3:0] and PLLDIV[1:0] bits */ |
- | |
| 173 | RCC->CFGR &= (uint32_t)0xFF02FFFF; |
- | |
| 174 | - | ||
| 175 | /*!< Disable all interrupts */ |
- | |
| 176 | RCC->CIR = 0x00000000; |
- | |
| 177 | - | ||
| 178 | #ifdef DATA_IN_ExtSRAM |
142 | #ifdef DATA_IN_ExtSRAM |
| 179 | SystemInit_ExtMemCtl(); |
143 | SystemInit_ExtMemCtl(); |
| 180 | #endif /* DATA_IN_ExtSRAM */ |
144 | #endif /* DATA_IN_ExtSRAM */ |
| 181 | 145 | ||
| 182 | #ifdef VECT_TAB_SRAM |
146 | #ifdef VECT_TAB_SRAM |