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| Rev 50 | Rev 61 | ||
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| Line 633... | Line 633... | ||
| 633 | #define SRAM_BB_BASE (0x22000000UL) /*!< SRAM base address in the bit-band region */ |
633 | #define SRAM_BB_BASE (0x22000000UL) /*!< SRAM base address in the bit-band region */ |
| 634 | #define PERIPH_BB_BASE (0x42000000UL) /*!< Peripheral base address in the bit-band region */ |
634 | #define PERIPH_BB_BASE (0x42000000UL) /*!< Peripheral base address in the bit-band region */ |
| 635 | #define FLASH_BANK2_BASE (0x08040000UL) /*!< FLASH BANK2 base address in the alias region */ |
635 | #define FLASH_BANK2_BASE (0x08040000UL) /*!< FLASH BANK2 base address in the alias region */ |
| 636 | #define FLASH_BANK1_END (0x0803FFFFUL) /*!< Program end FLASH BANK1 address */ |
636 | #define FLASH_BANK1_END (0x0803FFFFUL) /*!< Program end FLASH BANK1 address */ |
| 637 | #define FLASH_BANK2_END (0x0807FFFFUL) /*!< Program end FLASH BANK2 address */ |
637 | #define FLASH_BANK2_END (0x0807FFFFUL) /*!< Program end FLASH BANK2 address */ |
| - | 638 | #define FLASH_END (0x0807FFFFUL) /*!< Program end FLASH address for Cat5 */ |
|
| 638 | #define FLASH_EEPROM_END (0x08083FFFUL) /*!< FLASH EEPROM end address (16KB) */ |
639 | #define FLASH_EEPROM_END (0x08083FFFUL) /*!< FLASH EEPROM end address (16KB) */ |
| 639 | 640 | ||
| 640 | /*!< Peripheral memory map */ |
641 | /*!< Peripheral memory map */ |
| 641 | #define APB1PERIPH_BASE PERIPH_BASE |
642 | #define APB1PERIPH_BASE PERIPH_BASE |
| 642 | #define APB2PERIPH_BASE (PERIPH_BASE + 0x00010000UL) |
643 | #define APB2PERIPH_BASE (PERIPH_BASE + 0x00010000UL) |
| Line 806... | Line 807... | ||
| 806 | 807 | ||
| 807 | /** @addtogroup Exported_constants |
808 | /** @addtogroup Exported_constants |
| 808 | * @{ |
809 | * @{ |
| 809 | */ |
810 | */ |
| 810 | 811 | ||
| - | 812 | /** @addtogroup Hardware_Constant_Definition |
|
| - | 813 | * @{ |
|
| - | 814 | */ |
|
| - | 815 | #define LSI_STARTUP_TIME 200U /*!< LSI Maximum startup time in us */ |
|
| - | 816 | ||
| - | 817 | /** |
|
| - | 818 | * @} |
|
| - | 819 | */ |
|
| - | 820 | ||
| 811 | /** @addtogroup Peripheral_Registers_Bits_Definition |
821 | /** @addtogroup Peripheral_Registers_Bits_Definition |
| 812 | * @{ |
822 | * @{ |
| 813 | */ |
823 | */ |
| 814 | 824 | ||
| 815 | /******************************************************************************/ |
825 | /******************************************************************************/ |
| Line 3042... | Line 3052... | ||
| 3042 | /* */ |
3052 | /* */ |
| 3043 | /* FLASH, DATA EEPROM and Option Bytes Registers */ |
3053 | /* FLASH, DATA EEPROM and Option Bytes Registers */ |
| 3044 | /* (FLASH, DATA_EEPROM, OB) */ |
3054 | /* (FLASH, DATA_EEPROM, OB) */ |
| 3045 | /* */ |
3055 | /* */ |
| 3046 | /******************************************************************************/ |
3056 | /******************************************************************************/ |
| - | 3057 | /* |
|
| - | 3058 | * @brief Specific device feature definitions (not present on all devices in the STM32L1 serie) |
|
| - | 3059 | */ |
|
| - | 3060 | #define FLASH_CUT5 |
|
| 3047 | 3061 | ||
| 3048 | /******************* Bit definition for FLASH_ACR register ******************/ |
3062 | /******************* Bit definition for FLASH_ACR register ******************/ |
| 3049 | #define FLASH_ACR_LATENCY_Pos (0U) |
3063 | #define FLASH_ACR_LATENCY_Pos (0U) |
| 3050 | #define FLASH_ACR_LATENCY_Msk (0x1UL << FLASH_ACR_LATENCY_Pos) /*!< 0x00000001 */ |
3064 | #define FLASH_ACR_LATENCY_Msk (0x1UL << FLASH_ACR_LATENCY_Pos) /*!< 0x00000001 */ |
| 3051 | #define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk /*!< Latency */ |
3065 | #define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk /*!< Latency */ |
| Line 5808... | Line 5822... | ||
| 5808 | #define SYSCFG_EXTICR1_EXTI3_PA (0x00000000U) /*!< PA[3] pin */ |
5822 | #define SYSCFG_EXTICR1_EXTI3_PA (0x00000000U) /*!< PA[3] pin */ |
| 5809 | #define SYSCFG_EXTICR1_EXTI3_PB (0x00001000U) /*!< PB[3] pin */ |
5823 | #define SYSCFG_EXTICR1_EXTI3_PB (0x00001000U) /*!< PB[3] pin */ |
| 5810 | #define SYSCFG_EXTICR1_EXTI3_PC (0x00002000U) /*!< PC[3] pin */ |
5824 | #define SYSCFG_EXTICR1_EXTI3_PC (0x00002000U) /*!< PC[3] pin */ |
| 5811 | #define SYSCFG_EXTICR1_EXTI3_PD (0x00003000U) /*!< PD[3] pin */ |
5825 | #define SYSCFG_EXTICR1_EXTI3_PD (0x00003000U) /*!< PD[3] pin */ |
| 5812 | #define SYSCFG_EXTICR1_EXTI3_PE (0x00004000U) /*!< PE[3] pin */ |
5826 | #define SYSCFG_EXTICR1_EXTI3_PE (0x00004000U) /*!< PE[3] pin */ |
| 5813 | #define SYSCFG_EXTICR1_EXTI3_PF (0x00003000U) /*!< PF[3] pin */ |
5827 | #define SYSCFG_EXTICR1_EXTI3_PF (0x00006000U) /*!< PF[3] pin */ |
| 5814 | #define SYSCFG_EXTICR1_EXTI3_PG (0x00004000U) /*!< PG[3] pin */ |
5828 | #define SYSCFG_EXTICR1_EXTI3_PG (0x00007000U) /*!< PG[3] pin */ |
| 5815 | 5829 | ||
| 5816 | /***************** Bit definition for SYSCFG_EXTICR2 register *****************/ |
5830 | /***************** Bit definition for SYSCFG_EXTICR2 register *****************/ |
| 5817 | #define SYSCFG_EXTICR2_EXTI4_Pos (0U) |
5831 | #define SYSCFG_EXTICR2_EXTI4_Pos (0U) |
| 5818 | #define SYSCFG_EXTICR2_EXTI4_Msk (0xFUL << SYSCFG_EXTICR2_EXTI4_Pos) /*!< 0x0000000F */ |
5832 | #define SYSCFG_EXTICR2_EXTI4_Msk (0xFUL << SYSCFG_EXTICR2_EXTI4_Pos) /*!< 0x0000000F */ |
| 5819 | #define SYSCFG_EXTICR2_EXTI4 SYSCFG_EXTICR2_EXTI4_Msk /*!< EXTI 4 configuration */ |
5833 | #define SYSCFG_EXTICR2_EXTI4 SYSCFG_EXTICR2_EXTI4_Msk /*!< EXTI 4 configuration */ |
| Line 5984... | Line 5998... | ||
| 5984 | #define SYSCFG_EXTICR4_EXTI15_PC (0x00002000U) /*!< PC[15] pin */ |
5998 | #define SYSCFG_EXTICR4_EXTI15_PC (0x00002000U) /*!< PC[15] pin */ |
| 5985 | #define SYSCFG_EXTICR4_EXTI15_PD (0x00003000U) /*!< PD[15] pin */ |
5999 | #define SYSCFG_EXTICR4_EXTI15_PD (0x00003000U) /*!< PD[15] pin */ |
| 5986 | #define SYSCFG_EXTICR4_EXTI15_PE (0x00004000U) /*!< PE[15] pin */ |
6000 | #define SYSCFG_EXTICR4_EXTI15_PE (0x00004000U) /*!< PE[15] pin */ |
| 5987 | #define SYSCFG_EXTICR4_EXTI15_PF (0x00006000U) /*!< PF[15] pin */ |
6001 | #define SYSCFG_EXTICR4_EXTI15_PF (0x00006000U) /*!< PF[15] pin */ |
| 5988 | #define SYSCFG_EXTICR4_EXTI15_PG (0x00007000U) /*!< PG[15] pin */ |
6002 | #define SYSCFG_EXTICR4_EXTI15_PG (0x00007000U) /*!< PG[15] pin */ |
| 5989 | 6003 | ||
| 5990 | /******************************************************************************/ |
6004 | /******************************************************************************/ |
| 5991 | /* */ |
6005 | /* */ |
| 5992 | /* Routing Interface (RI) */ |
6006 | /* Routing Interface (RI) */ |
| 5993 | /* */ |
6007 | /* */ |
| 5994 | /******************************************************************************/ |
6008 | /******************************************************************************/ |