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Rev 50 | Rev 61 | ||
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Line 786... | Line 786... | ||
786 | 786 | ||
787 | /** @addtogroup Exported_constants |
787 | /** @addtogroup Exported_constants |
788 | * @{ |
788 | * @{ |
789 | */ |
789 | */ |
790 | 790 | ||
- | 791 | /** @addtogroup Hardware_Constant_Definition |
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- | 792 | * @{ |
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- | 793 | */ |
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- | 794 | #define LSI_STARTUP_TIME 200U /*!< LSI Maximum startup time in us */ |
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- | 795 | ||
- | 796 | /** |
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- | 797 | * @} |
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- | 798 | */ |
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- | 799 | ||
791 | /** @addtogroup Peripheral_Registers_Bits_Definition |
800 | /** @addtogroup Peripheral_Registers_Bits_Definition |
792 | * @{ |
801 | * @{ |
793 | */ |
802 | */ |
794 | 803 | ||
795 | /******************************************************************************/ |
804 | /******************************************************************************/ |
Line 2983... | Line 2992... | ||
2983 | /* */ |
2992 | /* */ |
2984 | /* FLASH, DATA EEPROM and Option Bytes Registers */ |
2993 | /* FLASH, DATA EEPROM and Option Bytes Registers */ |
2985 | /* (FLASH, DATA_EEPROM, OB) */ |
2994 | /* (FLASH, DATA_EEPROM, OB) */ |
2986 | /* */ |
2995 | /* */ |
2987 | /******************************************************************************/ |
2996 | /******************************************************************************/ |
- | 2997 | /* |
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- | 2998 | * @brief Specific device feature definitions (not present on all devices in the STM32L1 serie) |
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- | 2999 | */ |
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- | 3000 | #define FLASH_CUT3 |
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2988 | 3001 | ||
2989 | /******************* Bit definition for FLASH_ACR register ******************/ |
3002 | /******************* Bit definition for FLASH_ACR register ******************/ |
2990 | #define FLASH_ACR_LATENCY_Pos (0U) |
3003 | #define FLASH_ACR_LATENCY_Pos (0U) |
2991 | #define FLASH_ACR_LATENCY_Msk (0x1UL << FLASH_ACR_LATENCY_Pos) /*!< 0x00000001 */ |
3004 | #define FLASH_ACR_LATENCY_Msk (0x1UL << FLASH_ACR_LATENCY_Pos) /*!< 0x00000001 */ |
2992 | #define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk /*!< Latency */ |
3005 | #define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk /*!< Latency */ |
Line 5689... | Line 5702... | ||
5689 | #define SYSCFG_EXTICR1_EXTI3_PA (0x00000000U) /*!< PA[3] pin */ |
5702 | #define SYSCFG_EXTICR1_EXTI3_PA (0x00000000U) /*!< PA[3] pin */ |
5690 | #define SYSCFG_EXTICR1_EXTI3_PB (0x00001000U) /*!< PB[3] pin */ |
5703 | #define SYSCFG_EXTICR1_EXTI3_PB (0x00001000U) /*!< PB[3] pin */ |
5691 | #define SYSCFG_EXTICR1_EXTI3_PC (0x00002000U) /*!< PC[3] pin */ |
5704 | #define SYSCFG_EXTICR1_EXTI3_PC (0x00002000U) /*!< PC[3] pin */ |
5692 | #define SYSCFG_EXTICR1_EXTI3_PD (0x00003000U) /*!< PD[3] pin */ |
5705 | #define SYSCFG_EXTICR1_EXTI3_PD (0x00003000U) /*!< PD[3] pin */ |
5693 | #define SYSCFG_EXTICR1_EXTI3_PE (0x00004000U) /*!< PE[3] pin */ |
5706 | #define SYSCFG_EXTICR1_EXTI3_PE (0x00004000U) /*!< PE[3] pin */ |
5694 | #define SYSCFG_EXTICR1_EXTI3_PF (0x00003000U) /*!< PF[3] pin */ |
5707 | #define SYSCFG_EXTICR1_EXTI3_PF (0x00006000U) /*!< PF[3] pin */ |
5695 | #define SYSCFG_EXTICR1_EXTI3_PG (0x00004000U) /*!< PG[3] pin */ |
5708 | #define SYSCFG_EXTICR1_EXTI3_PG (0x00007000U) /*!< PG[3] pin */ |
5696 | 5709 | ||
5697 | /***************** Bit definition for SYSCFG_EXTICR2 register *****************/ |
5710 | /***************** Bit definition for SYSCFG_EXTICR2 register *****************/ |
5698 | #define SYSCFG_EXTICR2_EXTI4_Pos (0U) |
5711 | #define SYSCFG_EXTICR2_EXTI4_Pos (0U) |
5699 | #define SYSCFG_EXTICR2_EXTI4_Msk (0xFUL << SYSCFG_EXTICR2_EXTI4_Pos) /*!< 0x0000000F */ |
5712 | #define SYSCFG_EXTICR2_EXTI4_Msk (0xFUL << SYSCFG_EXTICR2_EXTI4_Pos) /*!< 0x0000000F */ |
5700 | #define SYSCFG_EXTICR2_EXTI4 SYSCFG_EXTICR2_EXTI4_Msk /*!< EXTI 4 configuration */ |
5713 | #define SYSCFG_EXTICR2_EXTI4 SYSCFG_EXTICR2_EXTI4_Msk /*!< EXTI 4 configuration */ |
Line 5865... | Line 5878... | ||
5865 | #define SYSCFG_EXTICR4_EXTI15_PC (0x00002000U) /*!< PC[15] pin */ |
5878 | #define SYSCFG_EXTICR4_EXTI15_PC (0x00002000U) /*!< PC[15] pin */ |
5866 | #define SYSCFG_EXTICR4_EXTI15_PD (0x00003000U) /*!< PD[15] pin */ |
5879 | #define SYSCFG_EXTICR4_EXTI15_PD (0x00003000U) /*!< PD[15] pin */ |
5867 | #define SYSCFG_EXTICR4_EXTI15_PE (0x00004000U) /*!< PE[15] pin */ |
5880 | #define SYSCFG_EXTICR4_EXTI15_PE (0x00004000U) /*!< PE[15] pin */ |
5868 | #define SYSCFG_EXTICR4_EXTI15_PF (0x00006000U) /*!< PF[15] pin */ |
5881 | #define SYSCFG_EXTICR4_EXTI15_PF (0x00006000U) /*!< PF[15] pin */ |
5869 | #define SYSCFG_EXTICR4_EXTI15_PG (0x00007000U) /*!< PG[15] pin */ |
5882 | #define SYSCFG_EXTICR4_EXTI15_PG (0x00007000U) /*!< PG[15] pin */ |
5870 | 5883 | ||
5871 | /******************************************************************************/ |
5884 | /******************************************************************************/ |
5872 | /* */ |
5885 | /* */ |
5873 | /* Routing Interface (RI) */ |
5886 | /* Routing Interface (RI) */ |
5874 | /* */ |
5887 | /* */ |
5875 | /******************************************************************************/ |
5888 | /******************************************************************************/ |