WebSVN – Vertical – Blame – /trunk/vertlib/template.c

Rev	Author	Line No.	Line
2	mjames	1	/*
		2	* $Id: template.c,v 1.1.1.1 2003/11/04 23:34:57 mjames Exp $ * This file ensures that for all
		3	* sockets that are in
		4	*
		5	* $Log: template.c,v $
		6	* Revision 1.1.1.1 2003/11/04 23:34:57 mjames
		7	* Imported into local repositrory
		8	*
		9	* Revision 1.22 2003/01/02 21:37:18 mjames
		10	* Experiment on creating NOT_ROUTABLE_H and NOT_ROUTABLE_L
		11	* properties on the nets so that pin jumpers can be made without a problem.
		12	*
		13	* Still need to sort out pin assignments made to these not_routable nets
		14	* which will become legal in some cases so that pullups and pulldown
		15	* pins can be used on the FPGA.
		16	*
		17	* Revision 1.21 2002/12/09 10:31:50 mjames
		18	* Corrected 2 warnings about #ident
		19	* Added warning about "chip X1" which gets confused with component called "X1"
		20	*
		21	* Revision 1.20 2002/09/18 08:50:48 mjames
		22	* Cleared 'use before assign' warning
		23	*
		24	* Revision 1.19 2002/09/09 10:14:26 mjames
		25	* Moved pin remapping function to pin ident editing function from
		26	* sorting pin name routine.
		27	*
		28	* Revision 1.18 2002/09/09 09:51:27 mjames
		29	* Change to #ident
		30	*
		31	* Revision 1.17 2001/12/20 13:38:57 mjames
		32	* Forced net not routable if fpga pin is disconnected from it. Brutal
		33	*
		34	* Revision 1.16 2001/12/11 21:26:18 mjames
		35	* Corrected pin deletion by setting correct flags.
		36	*
		37	* Revision 1.15 2001/11/30 22:24:35 mjames
		38	* Improved diagnostic debug messages.
		39	* Used the correct sense of missing template
		40	* pins to remove unused pins of the component.
		41	*
		42	* Revision 1.14 2001/11/19 10:41:34 mjames
		43	* Merged back DTC release
		44	*
		45	* Revision 1.13.2.1 2001/11/15 22:01:53 mjames
		46	* Added counters for diagnostics
		47	*
		48	* Revision 1.13 2001/11/01 11:01:33 mjames
		49	* Template pins are created whether or not a net is routable.
		50	*
		51	* Revision 1.12 2001/10/31 22:20:18 mjames
		52	* Tidying up problematical comments caused by CVS
		53	* 'intelligent' comment guessing
		54	*
		55	* Revision 1.11 2001/10/31 16:18:04 mjames
		56	* Added a datastructure to hide regular expression information from programs.
		57	* Changed call to regexec to indicate 0 subexpressions to be matched
		58	* rather than a number dependent on strlen(string) which was wrong.
		59	*
		60	* Revision 1.10 2001/10/22 10:45:45 mjames
		61	* Added template options to create and /or disconnect pins on
		62	* sockets according to flags passed in to the template core routine
		63	*
		64	* Revision 1.9 2001/10/10 20:18:20 mjames
		65	* Added a vert_regcomp function to compile regular expressions
		66	* with '^' (match start string) and '$' (match end string) bracketing
		67	* this => wildcard must match entire string not just a part of it.
		68	*
		69	* Revision 1.8 2001/10/10 12:49:47 mjames
		70	* Passed wrong argument to wildcard validator within template ensure . Fixed
		71	*
		72	* Revision 1.7 2001/10/07 20:50:51 mjames
		73	* Added wildcard checking (warn user about
		74	* using wildcard '' on the end of a string in stead of wildcard '.')
		75	*
		76	* Revision 1.6 2001/09/25 23:15:22 mjames
		77	* Converted wildcards to use proper regexp pattern match library
		78	*
		79	* Revision 1.5 2001/09/21 14:23:28 mjames
		80	* Cleared out template flags before checking pin compatibility rather than
		81	* while checking.
		82	*
		83	* Revision 1.4 2001/07/16 15:54:57 MJAMES
		84	* Conversion to correctly print port list of extracted components.
		85	*
		86	* Revision 1.3 2001/06/22 11:08:07 mjames
		87	* Added a function to extract templates (common component types) from
		88	* ACF style netlists. This then permits Verilog printout to avoid duplication
		89	* of declaration ( problem before )
		90	*
		91	* Revision 1.2 2001/06/06 12:10:17 mjames
		92	* Move from HPUX
		93	*
		94	* Revision 1.1.1.1 2000/10/19 21:58:40 mjames
		95	* Mike put it here
		96	*
		97	*
		98	* Revision 1.32 2000/10/12 14:27:52 14:27:52 mjames (Mike James)
		99	* changed listing vhdl signals to expand expressions
		100	* until a constant is located
		101	*
		102	* Revision 1.31 2000/10/04 10:37:10 10:37:10 mjames (Mike James)
		103	* Modified for Vertical2 : support COMPONENTS and SIGNALS
		104	*
		105	* Revision 1.31 2000/10/04 10:37:10 10:37:10 mjames (Mike James)
		106	* Part of Release PSAVAT01
		107	*
		108	* Revision 1.30 2000/10/02 11:04:21 11:04:21 mjames (Mike James)
		109	* new_vhdl
		110	*
		111	* Revision 1.29 2000/09/27 14:42:22 14:42:22 mjames (Mike James)
		112	* Part of Release Sep_27_ST_2000
		113	*
		114	* Revision 1.28 2000/09/21 10:15:52 10:15:52 mjames (Mike James)
		115	* Part of Release Sep21Alpha
		116	*
		117	* Revision 1.27 2000/09/21 09:47:46 09:47:46 mjames (Mike James)
		118	* Added code to handle pin equivalents in templates
		119	* calling a function to copy over the pin equivalnets
		120	* from a template.
		121	*
		122	*
		123	* Revision 1.26 2000/08/25 09:57:17 09:57:17 mjames (Mike James)
		124	* Part of Release Aug25_alpha
		125	*
		126	* Revision 1.25 2000/08/16 08:57:33 08:57:33 mjames (Mike James)
		127	* Part of Release CD01_Aug2000
		128	*
		129	* Revision 1.24 2000/08/14 14:45:14 14:45:14 mjames (Mike James)
		130	* Part of Release Aug_14_2000
		131	*
		132	* Revision 1.23 2000/08/14 14:43:37 14:43:37 mjames (Mike James)
		133	* Added power pins
		134	*
		135	* Revision 1.22 2000/08/11 08:30:34 08:30:34 mjames (Mike James)
		136	* Part of Release Aug_11_2000
		137	*
		138	* Revision 1.21 2000/08/09 10:31:50 10:31:50 mjames (Mike James)
		139	* Part of Release Aug__9_2000
		140	*
		141	* Revision 1.20 2000/05/31 11:43:01 11:43:01 mjames (Mike James)
		142	* Part of Release May_31_2000
		143	*
		144	* Revision 1.19 2000/05/08 17:01:40 17:01:40 mjames (Mike James)
		145	* Part of Release May__8_2000
		146	*
		147	* Revision 1.18 2000/05/08 16:59:33 16:59:33 mjames (Mike James)
		148	* Part of Release May__8_2000
		149	*
		150	* Revision 1.17 2000/05/08 16:57:10 16:57:10 mjames (Mike James)
		151	* Part of Release May__8_2000
		152	*
		153	* Revision 1.16 2000/03/08 16:19:34 16:19:34 mjames (Mike James)
		154	* New version including PC
		155	*
		156	* Revision 1.13 2000/01/20 15:58:51 15:58:51 mjames (Mike James)
		157	* Part of Release R22
		158	*
		159	* Revision 1.12 99/12/22 11:15:32 11:15:32 mjames (Mike James)
		160	* Part of Release Dec_22_1999
		161	*
		162	* Revision 1.11 99/11/23 13:55:21 13:55:21 mjames (Mike James)
		163	* Added Certify support
		164	*
		165	* Revision 1.10 99/06/25 14:35:53 14:35:53 mjames (Mike James)
		166	* Added in reference to expression.h, but no changes made
		167	* to the function of acfread yet.
		168	*
		169	* Revision 1.9 99/06/18 09:26:33 09:26:33 mjames (Mike James)
		170	* Templating behaviour still incorrect. Under investigation.
		171	*
		172	* Revision 1.8 98/11/30 11:58:59 11:58:59 mjames (Mike James)
		173	* Altered behaviour for pins of type 'none' , also related
		174	* stuff in unrouted.c, to set a pin direction on chip
		175	* nodes when node references are made in the unnnamed list of
		176	* pins.
		177	*
		178	* Revision 1.7 98/11/13 15:22:23 15:22:23 mjames (Mike James)
		179	* Fixed core dump on non-existent pin identifier
		180	* in template application function.
		181	* Previously locating pins was called with
		182	* a Create rather than Find flag. So it always retuned some pointer
		183	* to some object. Now I use Find and it can return NULL. I needed to
		184	* check for that null pointer.
		185	*
		186	* Revision 1.6 98/10/01 15:28:08 15:28:08 mjames (Mike James)
		187	* Altered behaviour to search for pins on line 204
		188	*
		189	* Revision 1.5 98/08/12 14:23:02 14:23:02 mjames (Mike James)
		190	* extending the templating algorithms
		191	*
		192	* Revision 1.4 98/07/14 13:26:39 13:26:39 mjames (Mike James)
		193	* Now hase three levels of checking templates
		194	*
		195	* Revision 1.3 98/06/15 14:20:49 14:20:49 mjames (Mike James)
		196	* Made tempaltes chip specific.
		197	*
		198	* Revision 1.2 98/02/11 11:27:29 11:27:29 mjames (Mike James)
		199	* Checked in for version 6.2a
		200	*
		201	* Revision 1.1 97/04/23 08:43:27 08:43:27 mjames (Mike James)
		202	* Initial revision
		203	* */
		204	#include "template.h"
		205
		206	#include "chck_names.h"
		207	#include "cmdlog.h"
		208	#include "cmdparse.h"
		209	#include "database.h"
		210	#include "equivalent.h"
		211	#include "expression.h"
		212	#include "generic.h"
		213	#include "print_vlog.h"
		214	#include "printout.h"
		215	#include "routing.h"
		216	#include "sorting.h"
		217	#include "unrouted.h"
		218	#include "vertcl_main.h"
		219
		220	#include <ctype.h>
		221	#include <regex.h>
		222	#include <stdio.h>
		223	#include <stdlib.h>
		224	#include <string.h>
		225	#include <sys/types.h>
		226
		227	#ident \
		228	"@(#)$Header: c:\\cygwin\\cvsroot/Vert03/vertlib/template.c,v 1.1.1.1 2003/11/04 23:34:57 mjames Exp $"
		229
		230	/* We have to check all sockets to see if there is a template for them.
		231	If there is then we ensure that all of the template pins exist on the main
		232	chip socket */
		233
		234	/* the following pin table indicates if a device pin is compatible with a template pin */
		235
		236	/* compat_pins[device][template] : relies on the declaration of pindir_t */
		237	/* The array is looked up by chip pin in the y direction and
		238	template pin in the x direction */
		239	char compat_pins[] = {"1111110", / NONE : is it best to claim it is compatible with all pins
		240	: routing later will sort out mistakes here !*/
		241	"0100100", /* INPUT */
		242	"0011100", /* OUTPUT */
		243	"0011100", /* BUFFER */
		244	"0000100", /* BIDIR */
		245	"0000010", /* CONFIG */
		246	"0000001"}; /* POWER */
		247
		248	static char *decode_pin_dir[] = {"UNKNOWN",
		249	"INPUT",
		250	"OUTPUT",
		251	"BUFFER", /* buffer is a sort of Output pin */
		252	"BIDIR",
		253	"CONFIG",
		254	"POWER"}; /* added Aug 2000 */
		255
		256	/* The function here checks pin identifiers
		257	* a) to see if the pin IDs on the chip match those on the template.
		258	* b) to reassign any invalid pin IDs on the chip to valid
		259	* compatible ones on the template.
		260	* c) If options & TEMPLATE_CREATE_MISSING_PINS
		261	* to create any remaining pin IDs on the chip that
		262	* still are available on the template
		263	* d) to make sure all fixed pin directions are OK
		264	* e) If options & TEMPLATE_DISCONNECT_PINS to disconnect any pins
		265	on the chip that are not present on the template
		266	Any net that loses an FPGA pin is set not routable.
		267	*/
		268
		269	void template_ensure (char *chip_id_template, int options)
		270	{
		271	socket_t skt = socket_head, template = NULL;
		272	int found = 0, rc;
		273	int pins_used, pins_count;
		274
		275	int chip_count, processed_count;
		276
		277	node_t chip_node, template_node;
		278
		279	char *pattern;
		280	/* compile regular expression */
		281	vert_regex_t *preg;
		282
		283	chip_count = 0;
		284	processed_count = 0;
		285
		286	create_unrouted_list ();
		287
		288	/* pick out a wildcard if any ID given, else wildcard anyway */
		289	if (!chip_id_template)
		290	{
		291	pattern = ".*";
		292	Log (LOG_GENERAL, "-- Beginning setting pin template on all chips\n");
		293	}
		294	else
		295	{
		296	pattern = chip_id_template;
		297	Log (
		298	LOG_GENERAL,
		299	"-- Beginning setting pin template: prefix '%s' --\n",
		300	chip_id_template);
		301	}
		302
		303	rc = vert_regcomp (&preg, pattern);
		304
		305	if (rc != 0)
		306	{
		307	char errbuff[100];
		308	regerror (rc, preg->preg, errbuff, 100);
		309	Log (
		310	LOG_ERROR,
		311	"-- Problem (rc=%d) %s with '%s' as regular expression\n",
		312	rc,
		313	errbuff,
		314	pattern);
		315
		316	/* return TCL_ERROR;
		317	*/
		318	return;
		319	}
		320	else
		321	{
		322	Log (LOG_GENERAL, "-- Using '%s' as match pattern\n", pattern);
		323	}
		324
		325	while (skt)
		326	{
		327	chip_count++;
		328	skt->template_socket = NULL;
		329
		330	found = regexec (preg->preg, skt->identifier, 0, preg->regpatt, 0);
		331
		332	if (!found)
		333	{
		334	char *chiptype = skt->type;
		335	if (!ISNULLSTR (chiptype))
		336	{
		337	template =
		338	find_socket (Type, chiptype, Search, &template_head);
		339	if (level & 1)
		340	{
		341	Log (
		342	LOG_GENERAL,
		343	"-- ** Processing chip '%s' : type='%s' **\n",
		344	skt->identifier,
		345	chiptype);
		346	}
		347	/* assign_declaration_directives(skt,global_generics);
		348	*/
		349	if (template)
		350	{ /* we have located a template for this chip */
		351
		352	processed_count++;
		353
		354	skt->template_socket = template;
		355	if (level & 1)
		356	{
		357	Log (LOG_GENERAL, "-- Which has a template\n");
		358	}
		359
		360	/* examine all of the template entries and add in any
		361	IS_DECLARATION_DIRECTIVE ones */
		362	assign_declaration_directives (
		363	skt, template->generics);
		364
		365	/*
		366	copy_declaration_generics(skt,template);
		367	*/
		368	/* clear template flags on chip nodes */
		369	chip_node = skt->nodes;
		370	while (chip_node)
		371	{
		372	chip_node->template_flag = 0;
		373	chip_node = chip_node->sktnext;
		374	}
		375	template_node = template->nodes;
		376	while (template_node)
		377	{
		378	template_node->template_flag = 0;
		379	template_node = template_node->sktnext;
		380	}
		381	/* search for nodes that already have valid identifiers
		382	according to the chip templates, and mark these as
		383	being OK */
		384
		385	template_node = template->nodes;
		386	if (level & 1)
		387	{
		388	Log (
		389	LOG_GENERAL,
		390	"-- Matching template node identifiers\n");
		391	}
		392	while (template_node)
		393	{
		394	chip_node = find_node (
		395	skt,
		396	Ident,
		397	template_node->identifier,
		398	Search);
		399	if (chip_node)
		400	{
		401	/* need also to confirm that this pin
		402	connection is of a compatible type
		403	-- added checking code here */
		404	if (level & 2)
		405	Log (
		406	LOG_GENERAL,
		407	"-- node '%s' chip=%d "
		408	"template=%d compat %c\n",
		409	chip_node->identifier,
		410	chip_node->pindir,
		411	template_node->pindir,
		412	compat_pins[chip_node
		413	->pindir]
		414	[template_node
		415	->pindir]);
		416
		417	if (compat_pins[chip_node->pindir]
		418	[template_node
		419	->pindir] == '1')
		420	{
		421	chip_node
		422	->vhdltype = copy_vhdl (
		423	template_node->vhdltype,
		424	skt);
		425
		426	template_node->template_flag =
		427	1;
		428	chip_node->template_flag = 1;
		429	if (level & 2)
		430	Log (
		431	LOG_GENERAL,
		432	"-- pin '%s' "
		433	"compatible\n",
		434	template_node
		435	->identifier);
		436	}
		437	};
		438	/*
		439	else
		440	Log(LOG_GENERAL,"-- node '%s' not
		441	matched\n",template_node->identifier);
		442	*/
		443	template_node = template_node->sktnext;
		444	}
		445
		446	/* now look through chip for all identifiers that
		447	havent been found on the template. These are
		448	incorrect and need to be replaced by an unused
		449	template pin*/
		450	if (level & 1)
		451	{
		452	Log (
		453	LOG_GENERAL,
		454	"-- Altering node identifiers\n");
		455	}
		456	/* clear template flags on chip nodes */
		457	chip_node = skt->nodes;
		458
		459	/* search each chip node to see if validated OK */
		460	while (chip_node)
		461	{
		462	/* if it does not have a correct template pin ,
		463	* go and find one */
		464	if (!chip_node->template_flag)
		465	{
		466	template_node = template->nodes;
		467	while (template_node)
		468	{
		469	if (template_node
		470	->template_flag == 0)
		471	{
		472	/* possible pin unused
		473	* candidate : look at
		474	* the pin direction */
		475	if (compat_pins
		476	[chip_node
		477	->pindir]
		478	[template_node
		479	->pindir] ==
		480	'1')
		481	{
		482	template_node
		483	->template_flag =
		484	1;
		485	chip_node
		486	->template_flag =
		487	1;
		488	if (level & 2)
		489	Log (
		490	LOG_GENERAL,
		491	"-"
		492	"-"
		493	" "
		494	"c"
		495	"h"
		496	"a"
		497	"n"
		498	"g"
		499	"i"
		500	"n"
		501	"g"
		502	" "
		503	"p"
		504	"i"
		505	"n"
		506	" "
		507	"I"
		508	"D"
		509	" "
		510	"'"
		511	"%"
		512	"s"
		513	"'"
		514	" "
		515	"t"
		516	"o"
		517	" "
		518	"n"
		519	"e"
		520	"w"
		521	" "
		522	"I"
		523	"D"
		524	" "
		525	"="
		526	" "
		527	"%"
		528	"s"
		529	"\n",
		530	chip_node
		531	->identifier,
		532	template_node
		533	->identifier);
		534	chip_node
		535	->identifier =
		536	template_node
		537	->identifier;
		538	chip_node
		539	->vhdltype =
		540	copy_vhdl (
		541	template_node
		542	->vhdltype,
		543	skt);
		544	break; /* from
		545	while
		546	template_node
		547	*/
		548	}
		549	/*
		550	else
		551	Log(LOG_GENERAL,"--
		552	?? node ID '%s' new ID
		553	= %s .. %d\n",
		554	chip_node->identifier,
		555	template_node->identifier,template_node->pindir);
		556	*/
		557	}
		558	template_node =
		559	template_node->sktnext;
		560	}
		561	/* if we havent found a valid possible
		562	template node ID for the chip pin
		563	then template_node == NULL at this
		564	point (run out of possibilities)
		565	Except if we are deleting missing
		566	pins then its worth */
		567	if (!(options &
		568	TEMPLATE_DISCONNECT_PINS) &&
		569	!template_node)
		570	Log (
		571	LOG_ERROR,
		572	"-- ERROR (perhaps): "
		573	"Cannot find a valid ID "
		574	"to replace %s pin '%s'\n",
		575	decode_pin_dir
		576	[chip_node->pindir],
		577	chip_node->identifier);
		578	}
		579	chip_node = chip_node->sktnext;
		580	}
		581	if (level & 1)
		582	{
		583	Log (
		584	LOG_GENERAL,
		585	"-- Creating additional pins , correcting "
		586	"fixed pin directions\n");
		587	}
		588	/* to apply template :
		589	Find/create the chip pin . If the
		590	matching template pin directional is BIDIR_PIN,
		591	do not touch the current pin direction.
		592	Otherwise override the physical pin direction */
		593
		594	template_node = template->nodes;
		595	pins_used = 0;
		596	pins_count = 0;
		597
		598	while (template_node)
		599	{
		600	/* find the chip pin (node) */
		601	node_t *chip_node;
		602
		603	chip_node = find_node (
		604	skt,
		605	Ident,
		606	template_node->identifier,
		607	options & TEMPLATE_CREATE_MISSING_PINS);
		608	if (level & 2)
		609	{
		610	Log (
		611	LOG_GENERAL,
		612	"-- template '%s' template flag "
		613	"%d exists %d\n",
		614	template_node->identifier,
		615	template_node->template_flag,
		616	chip_node ? 1 : 0);
		617	}
		618	pins_count++;
		619	if (chip_node != NULL)
		620	{
		621	pins_used++;
		622	/* fix the pin direction down !! */
		623
		624	if (template_node->template_flag == 0)
		625	{
		626	/* next line had chip_node in
		627	* it */
		628	if ((template_node->pindir !=
		629	BIDIR) &&
		630	(template_node->pindir !=
		631	NONE))
		632	{
		633	chip_node->fixed_pin =
		634	1; /* routes must
		635	use the
		636	appropriate
		637	pin direction
		638	*/
		639	chip_node->pindir =
		640	template_node
		641	->pindir;
		642	if (level & 2)
		643	Log (
		644	LOG_GENERAL,
		645	"-- pin "
		646	"'%s' "
		647	"fixing "
		648	"pindir "
		649	"as %d\n",
		650	chip_node
		651	->identifier,
		652	chip_node
		653	->pindir);
		654	}
		655	}
		656	chip_node->template_flag =
		657	1; /* templating applied OK */
		658	chip_node->pin_group =
		659	template_node->pin_group;
		660	}
		661	template_node = template_node->sktnext;
		662	}
		663	if (level & 1)
		664	{
		665	Log (
		666	LOG_GENERAL,
		667	"-- %d pins out of %d in use\n",
		668	pins_used,
		669	pins_count);
		670	}
		671	}
		672
		673	/* new stuff October 2001 : If any chip pins do not have their
		674	template flag set now then
		675	they _may_ be deleted as they are not on the template in any
		676	case */
		677	if (template && (options & TEMPLATE_DISCONNECT_PINS))
		678	{
		679	pins_count = 0;
		680	if (level & 1)
		681	{
		682	Log (
		683	LOG_GENERAL,
		684	"-- Disconnecting pins missing on "
		685	"template\n");
		686	}
		687	chip_node = skt->nodes;
		688	while (chip_node)
		689	{
		690	if (!chip_node->template_flag)
		691	{
		692	if (level & 2)
		693	{
		694	Log (
		695	LOG_GENERAL,
		696	"-- pin '%s' being "
		697	"disconnected\n",
		698	chip_node->identifier);
		699	}
		700
		701	pins_count++;
		702	/* questionable approach to problem */
		703	if (chip_node->net)
		704	{
		705	chip_node->net->how_routed =
		706	Not_Routable; /* checked */
		707	}
		708	disconnect_node (skt, chip_node);
		709	}
		710	chip_node = chip_node->sktnext;
		711	}
		712	if (level & 1)
		713	{
		714	Log (
		715	LOG_GENERAL,
		716	"-- Disconnected %d pins missing on "
		717	"template\n",
		718	pins_count);
		719	}
		720	}
		721	if (level & 1)
		722	{
		723	Log (LOG_GENERAL, "-- Finished chip\n");
		724	}
		725	}
		726
		727	copy_equivalent_pins (
		728	template, skt); /* any pin connections that are equivalent
		729	by default will be copied from the template */
		730	}
		731	skt = skt->next;
		732	}
		733	Log (
		734	LOG_GENERAL,
		735	"-- checked %d objects, applied template to %d of them\n",
		736	chip_count,
		737	processed_count);
		738	vert_regfree (&preg);
		739	}
		740
		741	/* list what we have as a template */
		742	void template_list (void)
		743	{
		744	socket_t *templates = template_head;
		745	/* for now list out the templates */
		746	Log (LOG_GENERAL, "-- List of socket templates\n");
		747	while (templates)
		748	{
		749	Log (LOG_GENERAL, "-- Template '%s' ", templates->type);
		750	if (templates->parent_template_ref)
		751	Log (
		752	LOG_GENERAL, "alias '%s'\n", templates->parent_template_ref->type);
		753	else
		754	Log (LOG_GENERAL, "\n");
		755
		756	templates = templates->next;
		757	}
		758	}
		759
		760	/* list what we have as a template */
		761	void template_list_pins (FILE *f)
		762	{
		763	socket_t *templates = template_head;
		764	/* for now list out the templates */
		765	while (templates)
		766	{
		767	fprintf (f, "-- Template '%s'\n", templates->type);
		768	print_device (
		769	f,
		770	templates,
		771	PRINT_ALL \| PRINT_GROUP \| PRINT_GENERIC \| PRINT_EQUIVALENT_PINS \|
		772	PRINT_EXPAND_BUS);
		773	templates = templates->next;
		774	}
		775	}
		776
		777	/******************************************************************************************/
		778	/* Extracting component templates from the list of components in the circuit design */
		779	/******************************************************************************************/
		780
		781	void extract_templates (void)
		782	{
		783	socket_t skt = socket_head, template;
		784	node_t chip_node, template_node;
		785	Log (
		786	LOG_GENERAL,
		787	"-- Extracting device templates (verilog modules or VHDL components)\n");
		788
		789	/* is this needed ? */
		790	create_unrouted_list ();
		791
		792	while (skt)
		793	{
		794	char *chiptype = skt->type;
		795	/* locate or create the template for this socket */
		796	if (!ISNULLSTR (chiptype))
		797	{
		798	template = find_socket (Type, chiptype, Search, &template_head);
		799	skt->template_socket = template;
		800
		801	if (!template) /* act only if no template */
		802	{
		803	if (level & 4)
		804	Log (
		805	LOG_GENERAL,
		806	"-- Creating template from chip '%s' : "
		807	"type='%s'\n",
		808	skt->identifier,
		809	chiptype);
		810	template =
		811	find_socket (Type, chiptype, Create, &template_head);
		812	template->is_template = 1; /* flag for later use */
		813	}
		814	assign_declaration_directives (template, skt->generics);
		815
		816	skt->template_socket = template;
		817
		818	copy_equivalent_pins (
		819	skt, template); /* any pin connections that are equivalent
		820	by default will be copied to the template */
		821
		822	/* assign_declaration_directives(skt,template->generics); */
		823
		824	/*
		825	copy_declaration_generics(skt,template);
		826	*/
		827
		828	chip_node = skt->nodes;
		829	if (level & 4)
		830	Log (LOG_GENERAL, "-- Copying/checking node identifiers\n");
		831	while (chip_node)
		832	{
		833	if (level & 4)
		834	Log (
		835	LOG_GENERAL,
		836	"-- Node %s\n",
		837	chip_node->identifier);
		838	template_node =
		839	find_node (template, Ident, chip_node->identifier, Search);
		840	/* add pins to template if there is a net connected to this pin
		841	* and it is routable */
		842
		843	if (!template_node && chip_node->net /&& chip_node->net->how_routed != Not_Routable / )
		844	{
		845	template_node = find_node (
		846	template, Ident, chip_node->identifier, Create);
		847
		848	template_node->pindir = chip_node->pindir;
		849	template_node->vhdltype =
		850	copy_vhdl (chip_node->vhdltype, skt);
		851
		852	if (level & 4)
		853	Log (
		854	LOG_GENERAL,
		855	"-- node '%s' dircode=%d\n",
		856	template_node->identifier,
		857	template_node->pindir);
		858	}
		859	chip_node = chip_node->sktnext;
		860	}
		861
		862	if (level & 4)
		863	{
		864	Log (LOG_GENERAL, "-- Finished chip\n");
		865	}
		866	}
		867
		868	skt = skt->next;
		869	}
		870	Log (LOG_GENERAL, "-- Finished extracting device templates\n");
		871	}

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(root)/trunk/vertlib/template.c – Rev 2