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<?xml version="1.0" encoding="utf-8" standalone="no"?>
2 
<device schemaVersion="1.1"
3 
xmlns:xs="http://www.w3.org/2001/XMLSchema-instance"
4 
xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd">
5 
  <name>STM32F103xx</name>
6 
  <version>1.3</version>
7 
  <description>STM32F103xx</description>
8 
  <!--Bus Interface Properties-->
9 
  <!--Cortex-M3 is byte addressable-->
10 
  <addressUnitBits>8</addressUnitBits>
11 
  <!--the maximum data bit width accessible within a single transfer-->
12 
  <width>32</width>
13 
  <!--Register Default Properties-->
14 
  <size>0x20</size>
15 
  <resetValue>0x0</resetValue>
16 
  <resetMask>0xFFFFFFFF</resetMask>
17 
  <peripherals>
18 
    <peripheral>
19 
      <name>FSMC</name>
20 
      <description>Flexible static memory controller</description>
21 
      <groupName>FSMC</groupName>
22 
      <baseAddress>0xA0000000</baseAddress>
23 
      <addressBlock>
24 
        <offset>0x0</offset>
25 
        <size>0x1000</size>
26 
        <usage>registers</usage>
27 
      </addressBlock>
28 
      <interrupt>
29 
        <name>FSMC</name>
30 
        <description>FSMC global interrupt</description>
31 
        <value>48</value>
32 
      </interrupt>
33 
      <registers>
34 
        <register>
35 
          <name>BCR1</name>
36 
          <displayName>BCR1</displayName>
37 
          <description>SRAM/NOR-Flash chip-select control register
38 
          1</description>
39 
          <addressOffset>0x0</addressOffset>
40 
          <size>0x20</size>
41 
          <access>read-write</access>
42 
          <resetValue>0x000030D0</resetValue>
43 
          <fields>
44 
            <field>
45 
              <name>CBURSTRW</name>
46 
              <description>CBURSTRW</description>
47 
              <bitOffset>19</bitOffset>
48 
              <bitWidth>1</bitWidth>
49 
            </field>
50 
            <field>
51 
              <name>ASYNCWAIT</name>
52 
              <description>ASYNCWAIT</description>
53 
              <bitOffset>15</bitOffset>
54 
              <bitWidth>1</bitWidth>
55 
            </field>
56 
            <field>
57 
              <name>EXTMOD</name>
58 
              <description>EXTMOD</description>
59 
              <bitOffset>14</bitOffset>
60 
              <bitWidth>1</bitWidth>
61 
            </field>
62 
            <field>
63 
              <name>WAITEN</name>
64 
              <description>WAITEN</description>
65 
              <bitOffset>13</bitOffset>
66 
              <bitWidth>1</bitWidth>
67 
            </field>
68 
            <field>
69 
              <name>WREN</name>
70 
              <description>WREN</description>
71 
              <bitOffset>12</bitOffset>
72 
              <bitWidth>1</bitWidth>
73 
            </field>
74 
            <field>
75 
              <name>WAITCFG</name>
76 
              <description>WAITCFG</description>
77 
              <bitOffset>11</bitOffset>
78 
              <bitWidth>1</bitWidth>
79 
            </field>
80 
            <field>
81 
              <name>WAITPOL</name>
82 
              <description>WAITPOL</description>
83 
              <bitOffset>9</bitOffset>
84 
              <bitWidth>1</bitWidth>
85 
            </field>
86 
            <field>
87 
              <name>BURSTEN</name>
88 
              <description>BURSTEN</description>
89 
              <bitOffset>8</bitOffset>
90 
              <bitWidth>1</bitWidth>
91 
            </field>
92 
            <field>
93 
              <name>FACCEN</name>
94 
              <description>FACCEN</description>
95 
              <bitOffset>6</bitOffset>
96 
              <bitWidth>1</bitWidth>
97 
            </field>
98 
            <field>
99 
              <name>MWID</name>
100 
              <description>MWID</description>
101 
              <bitOffset>4</bitOffset>
102 
              <bitWidth>2</bitWidth>
103 
            </field>
104 
            <field>
105 
              <name>MTYP</name>
106 
              <description>MTYP</description>
107 
              <bitOffset>2</bitOffset>
108 
              <bitWidth>2</bitWidth>
109 
            </field>
110 
            <field>
111 
              <name>MUXEN</name>
112 
              <description>MUXEN</description>
113 
              <bitOffset>1</bitOffset>
114 
              <bitWidth>1</bitWidth>
115 
            </field>
116 
            <field>
117 
              <name>MBKEN</name>
118 
              <description>MBKEN</description>
119 
              <bitOffset>0</bitOffset>
120 
              <bitWidth>1</bitWidth>
121 
            </field>
122 
          </fields>
123 
        </register>
124 
        <register>
125 
          <name>BTR1</name>
126 
          <displayName>BTR1</displayName>
127 
          <description>SRAM/NOR-Flash chip-select timing register
128 
          1</description>
129 
          <addressOffset>0x4</addressOffset>
130 
          <size>0x20</size>
131 
          <access>read-write</access>
132 
          <resetValue>0xFFFFFFFF</resetValue>
133 
          <fields>
134 
            <field>
135 
              <name>ACCMOD</name>
136 
              <description>ACCMOD</description>
137 
              <bitOffset>28</bitOffset>
138 
              <bitWidth>2</bitWidth>
139 
            </field>
140 
            <field>
141 
              <name>DATLAT</name>
142 
              <description>DATLAT</description>
143 
              <bitOffset>24</bitOffset>
144 
              <bitWidth>4</bitWidth>
145 
            </field>
146 
            <field>
147 
              <name>CLKDIV</name>
148 
              <description>CLKDIV</description>
149 
              <bitOffset>20</bitOffset>
150 
              <bitWidth>4</bitWidth>
151 
            </field>
152 
            <field>
153 
              <name>BUSTURN</name>
154 
              <description>BUSTURN</description>
155 
              <bitOffset>16</bitOffset>
156 
              <bitWidth>4</bitWidth>
157 
            </field>
158 
            <field>
159 
              <name>DATAST</name>
160 
              <description>DATAST</description>
161 
              <bitOffset>8</bitOffset>
162 
              <bitWidth>8</bitWidth>
163 
            </field>
164 
            <field>
165 
              <name>ADDHLD</name>
166 
              <description>ADDHLD</description>
167 
              <bitOffset>4</bitOffset>
168 
              <bitWidth>4</bitWidth>
169 
            </field>
170 
            <field>
171 
              <name>ADDSET</name>
172 
              <description>ADDSET</description>
173 
              <bitOffset>0</bitOffset>
174 
              <bitWidth>4</bitWidth>
175 
            </field>
176 
          </fields>
177 
        </register>
178 
        <register>
179 
          <name>BCR2</name>
180 
          <displayName>BCR2</displayName>
181 
          <description>SRAM/NOR-Flash chip-select control register
182 
          2</description>
183 
          <addressOffset>0x8</addressOffset>
184 
          <size>0x20</size>
185 
          <access>read-write</access>
186 
          <resetValue>0x000030D0</resetValue>
187 
          <fields>
188 
            <field>
189 
              <name>CBURSTRW</name>
190 
              <description>CBURSTRW</description>
191 
              <bitOffset>19</bitOffset>
192 
              <bitWidth>1</bitWidth>
193 
            </field>
194 
            <field>
195 
              <name>ASYNCWAIT</name>
196 
              <description>ASYNCWAIT</description>
197 
              <bitOffset>15</bitOffset>
198 
              <bitWidth>1</bitWidth>
199 
            </field>
200 
            <field>
201 
              <name>EXTMOD</name>
202 
              <description>EXTMOD</description>
203 
              <bitOffset>14</bitOffset>
204 
              <bitWidth>1</bitWidth>
205 
            </field>
206 
            <field>
207 
              <name>WAITEN</name>
208 
              <description>WAITEN</description>
209 
              <bitOffset>13</bitOffset>
210 
              <bitWidth>1</bitWidth>
211 
            </field>
212 
            <field>
213 
              <name>WREN</name>
214 
              <description>WREN</description>
215 
              <bitOffset>12</bitOffset>
216 
              <bitWidth>1</bitWidth>
217 
            </field>
218 
            <field>
219 
              <name>WAITCFG</name>
220 
              <description>WAITCFG</description>
221 
              <bitOffset>11</bitOffset>
222 
              <bitWidth>1</bitWidth>
223 
            </field>
224 
            <field>
225 
              <name>WRAPMOD</name>
226 
              <description>WRAPMOD</description>
227 
              <bitOffset>10</bitOffset>
228 
              <bitWidth>1</bitWidth>
229 
            </field>
230 
            <field>
231 
              <name>WAITPOL</name>
232 
              <description>WAITPOL</description>
233 
              <bitOffset>9</bitOffset>
234 
              <bitWidth>1</bitWidth>
235 
            </field>
236 
            <field>
237 
              <name>BURSTEN</name>
238 
              <description>BURSTEN</description>
239 
              <bitOffset>8</bitOffset>
240 
              <bitWidth>1</bitWidth>
241 
            </field>
242 
            <field>
243 
              <name>FACCEN</name>
244 
              <description>FACCEN</description>
245 
              <bitOffset>6</bitOffset>
246 
              <bitWidth>1</bitWidth>
247 
            </field>
248 
            <field>
249 
              <name>MWID</name>
250 
              <description>MWID</description>
251 
              <bitOffset>4</bitOffset>
252 
              <bitWidth>2</bitWidth>
253 
            </field>
254 
            <field>
255 
              <name>MTYP</name>
256 
              <description>MTYP</description>
257 
              <bitOffset>2</bitOffset>
258 
              <bitWidth>2</bitWidth>
259 
            </field>
260 
            <field>
261 
              <name>MUXEN</name>
262 
              <description>MUXEN</description>
263 
              <bitOffset>1</bitOffset>
264 
              <bitWidth>1</bitWidth>
265 
            </field>
266 
            <field>
267 
              <name>MBKEN</name>
268 
              <description>MBKEN</description>
269 
              <bitOffset>0</bitOffset>
270 
              <bitWidth>1</bitWidth>
271 
            </field>
272 
          </fields>
273 
        </register>
274 
        <register>
275 
          <name>BTR2</name>
276 
          <displayName>BTR2</displayName>
277 
          <description>SRAM/NOR-Flash chip-select timing register
278 
          2</description>
279 
          <addressOffset>0xC</addressOffset>
280 
          <size>0x20</size>
281 
          <access>read-write</access>
282 
          <resetValue>0xFFFFFFFF</resetValue>
283 
          <fields>
284 
            <field>
285 
              <name>ACCMOD</name>
286 
              <description>ACCMOD</description>
287 
              <bitOffset>28</bitOffset>
288 
              <bitWidth>2</bitWidth>
289 
            </field>
290 
            <field>
291 
              <name>DATLAT</name>
292 
              <description>DATLAT</description>
293 
              <bitOffset>24</bitOffset>
294 
              <bitWidth>4</bitWidth>
295 
            </field>
296 
            <field>
297 
              <name>CLKDIV</name>
298 
              <description>CLKDIV</description>
299 
              <bitOffset>20</bitOffset>
300 
              <bitWidth>4</bitWidth>
301 
            </field>
302 
            <field>
303 
              <name>BUSTURN</name>
304 
              <description>BUSTURN</description>
305 
              <bitOffset>16</bitOffset>
306 
              <bitWidth>4</bitWidth>
307 
            </field>
308 
            <field>
309 
              <name>DATAST</name>
310 
              <description>DATAST</description>
311 
              <bitOffset>8</bitOffset>
312 
              <bitWidth>8</bitWidth>
313 
            </field>
314 
            <field>
315 
              <name>ADDHLD</name>
316 
              <description>ADDHLD</description>
317 
              <bitOffset>4</bitOffset>
318 
              <bitWidth>4</bitWidth>
319 
            </field>
320 
            <field>
321 
              <name>ADDSET</name>
322 
              <description>ADDSET</description>
323 
              <bitOffset>0</bitOffset>
324 
              <bitWidth>4</bitWidth>
325 
            </field>
326 
          </fields>
327 
        </register>
328 
        <register>
329 
          <name>BCR3</name>
330 
          <displayName>BCR3</displayName>
331 
          <description>SRAM/NOR-Flash chip-select control register
332 
          3</description>
333 
          <addressOffset>0x10</addressOffset>
334 
          <size>0x20</size>
335 
          <access>read-write</access>
336 
          <resetValue>0x000030D0</resetValue>
337 
          <fields>
338 
            <field>
339 
              <name>CBURSTRW</name>
340 
              <description>CBURSTRW</description>
341 
              <bitOffset>19</bitOffset>
342 
              <bitWidth>1</bitWidth>
343 
            </field>
344 
            <field>
345 
              <name>ASYNCWAIT</name>
346 
              <description>ASYNCWAIT</description>
347 
              <bitOffset>15</bitOffset>
348 
              <bitWidth>1</bitWidth>
349 
            </field>
350 
            <field>
351 
              <name>EXTMOD</name>
352 
              <description>EXTMOD</description>
353 
              <bitOffset>14</bitOffset>
354 
              <bitWidth>1</bitWidth>
355 
            </field>
356 
            <field>
357 
              <name>WAITEN</name>
358 
              <description>WAITEN</description>
359 
              <bitOffset>13</bitOffset>
360 
              <bitWidth>1</bitWidth>
361 
            </field>
362 
            <field>
363 
              <name>WREN</name>
364 
              <description>WREN</description>
365 
              <bitOffset>12</bitOffset>
366 
              <bitWidth>1</bitWidth>
367 
            </field>
368 
            <field>
369 
              <name>WAITCFG</name>
370 
              <description>WAITCFG</description>
371 
              <bitOffset>11</bitOffset>
372 
              <bitWidth>1</bitWidth>
373 
            </field>
374 
            <field>
375 
              <name>WRAPMOD</name>
376 
              <description>WRAPMOD</description>
377 
              <bitOffset>10</bitOffset>
378 
              <bitWidth>1</bitWidth>
379 
            </field>
380 
            <field>
381 
              <name>WAITPOL</name>
382 
              <description>WAITPOL</description>
383 
              <bitOffset>9</bitOffset>
384 
              <bitWidth>1</bitWidth>
385 
            </field>
386 
            <field>
387 
              <name>BURSTEN</name>
388 
              <description>BURSTEN</description>
389 
              <bitOffset>8</bitOffset>
390 
              <bitWidth>1</bitWidth>
391 
            </field>
392 
            <field>
393 
              <name>FACCEN</name>
394 
              <description>FACCEN</description>
395 
              <bitOffset>6</bitOffset>
396 
              <bitWidth>1</bitWidth>
397 
            </field>
398 
            <field>
399 
              <name>MWID</name>
400 
              <description>MWID</description>
401 
              <bitOffset>4</bitOffset>
402 
              <bitWidth>2</bitWidth>
403 
            </field>
404 
            <field>
405 
              <name>MTYP</name>
406 
              <description>MTYP</description>
407 
              <bitOffset>2</bitOffset>
408 
              <bitWidth>2</bitWidth>
409 
            </field>
410 
            <field>
411 
              <name>MUXEN</name>
412 
              <description>MUXEN</description>
413 
              <bitOffset>1</bitOffset>
414 
              <bitWidth>1</bitWidth>
415 
            </field>
416 
            <field>
417 
              <name>MBKEN</name>
418 
              <description>MBKEN</description>
419 
              <bitOffset>0</bitOffset>
420 
              <bitWidth>1</bitWidth>
421 
            </field>
422 
          </fields>
423 
        </register>
424 
        <register>
425 
          <name>BTR3</name>
426 
          <displayName>BTR3</displayName>
427 
          <description>SRAM/NOR-Flash chip-select timing register
428 
          3</description>
429 
          <addressOffset>0x14</addressOffset>
430 
          <size>0x20</size>
431 
          <access>read-write</access>
432 
          <resetValue>0xFFFFFFFF</resetValue>
433 
          <fields>
434 
            <field>
435 
              <name>ACCMOD</name>
436 
              <description>ACCMOD</description>
437 
              <bitOffset>28</bitOffset>
438 
              <bitWidth>2</bitWidth>
439 
            </field>
440 
            <field>
441 
              <name>DATLAT</name>
442 
              <description>DATLAT</description>
443 
              <bitOffset>24</bitOffset>
444 
              <bitWidth>4</bitWidth>
445 
            </field>
446 
            <field>
447 
              <name>CLKDIV</name>
448 
              <description>CLKDIV</description>
449 
              <bitOffset>20</bitOffset>
450 
              <bitWidth>4</bitWidth>
451 
            </field>
452 
            <field>
453 
              <name>BUSTURN</name>
454 
              <description>BUSTURN</description>
455 
              <bitOffset>16</bitOffset>
456 
              <bitWidth>4</bitWidth>
457 
            </field>
458 
            <field>
459 
              <name>DATAST</name>
460 
              <description>DATAST</description>
461 
              <bitOffset>8</bitOffset>
462 
              <bitWidth>8</bitWidth>
463 
            </field>
464 
            <field>
465 
              <name>ADDHLD</name>
466 
              <description>ADDHLD</description>
467 
              <bitOffset>4</bitOffset>
468 
              <bitWidth>4</bitWidth>
469 
            </field>
470 
            <field>
471 
              <name>ADDSET</name>
472 
              <description>ADDSET</description>
473 
              <bitOffset>0</bitOffset>
474 
              <bitWidth>4</bitWidth>
475 
            </field>
476 
          </fields>
477 
        </register>
478 
        <register>
479 
          <name>BCR4</name>
480 
          <displayName>BCR4</displayName>
481 
          <description>SRAM/NOR-Flash chip-select control register
482 
          4</description>
483 
          <addressOffset>0x18</addressOffset>
484 
          <size>0x20</size>
485 
          <access>read-write</access>
486 
          <resetValue>0x000030D0</resetValue>
487 
          <fields>
488 
            <field>
489 
              <name>CBURSTRW</name>
490 
              <description>CBURSTRW</description>
491 
              <bitOffset>19</bitOffset>
492 
              <bitWidth>1</bitWidth>
493 
            </field>
494 
            <field>
495 
              <name>ASYNCWAIT</name>
496 
              <description>ASYNCWAIT</description>
497 
              <bitOffset>15</bitOffset>
498 
              <bitWidth>1</bitWidth>
499 
            </field>
500 
            <field>
501 
              <name>EXTMOD</name>
502 
              <description>EXTMOD</description>
503 
              <bitOffset>14</bitOffset>
504 
              <bitWidth>1</bitWidth>
505 
            </field>
506 
            <field>
507 
              <name>WAITEN</name>
508 
              <description>WAITEN</description>
509 
              <bitOffset>13</bitOffset>
510 
              <bitWidth>1</bitWidth>
511 
            </field>
512 
            <field>
513 
              <name>WREN</name>
514 
              <description>WREN</description>
515 
              <bitOffset>12</bitOffset>
516 
              <bitWidth>1</bitWidth>
517 
            </field>
518 
            <field>
519 
              <name>WAITCFG</name>
520 
              <description>WAITCFG</description>
521 
              <bitOffset>11</bitOffset>
522 
              <bitWidth>1</bitWidth>
523 
            </field>
524 
            <field>
525 
              <name>WRAPMOD</name>
526 
              <description>WRAPMOD</description>
527 
              <bitOffset>10</bitOffset>
528 
              <bitWidth>1</bitWidth>
529 
            </field>
530 
            <field>
531 
              <name>WAITPOL</name>
532 
              <description>WAITPOL</description>
533 
              <bitOffset>9</bitOffset>
534 
              <bitWidth>1</bitWidth>
535 
            </field>
536 
            <field>
537 
              <name>BURSTEN</name>
538 
              <description>BURSTEN</description>
539 
              <bitOffset>8</bitOffset>
540 
              <bitWidth>1</bitWidth>
541 
            </field>
542 
            <field>
543 
              <name>FACCEN</name>
544 
              <description>FACCEN</description>
545 
              <bitOffset>6</bitOffset>
546 
              <bitWidth>1</bitWidth>
547 
            </field>
548 
            <field>
549 
              <name>MWID</name>
550 
              <description>MWID</description>
551 
              <bitOffset>4</bitOffset>
552 
              <bitWidth>2</bitWidth>
553 
            </field>
554 
            <field>
555 
              <name>MTYP</name>
556 
              <description>MTYP</description>
557 
              <bitOffset>2</bitOffset>
558 
              <bitWidth>2</bitWidth>
559 
            </field>
560 
            <field>
561 
              <name>MUXEN</name>
562 
              <description>MUXEN</description>
563 
              <bitOffset>1</bitOffset>
564 
              <bitWidth>1</bitWidth>
565 
            </field>
566 
            <field>
567 
              <name>MBKEN</name>
568 
              <description>MBKEN</description>
569 
              <bitOffset>0</bitOffset>
570 
              <bitWidth>1</bitWidth>
571 
            </field>
572 
          </fields>
573 
        </register>
574 
        <register>
575 
          <name>BTR4</name>
576 
          <displayName>BTR4</displayName>
577 
          <description>SRAM/NOR-Flash chip-select timing register
578 
          4</description>
579 
          <addressOffset>0x1C</addressOffset>
580 
          <size>0x20</size>
581 
          <access>read-write</access>
582 
          <resetValue>0xFFFFFFFF</resetValue>
583 
          <fields>
584 
            <field>
585 
              <name>ACCMOD</name>
586 
              <description>ACCMOD</description>
587 
              <bitOffset>28</bitOffset>
588 
              <bitWidth>2</bitWidth>
589 
            </field>
590 
            <field>
591 
              <name>DATLAT</name>
592 
              <description>DATLAT</description>
593 
              <bitOffset>24</bitOffset>
594 
              <bitWidth>4</bitWidth>
595 
            </field>
596 
            <field>
597 
              <name>CLKDIV</name>
598 
              <description>CLKDIV</description>
599 
              <bitOffset>20</bitOffset>
600 
              <bitWidth>4</bitWidth>
601 
            </field>
602 
            <field>
603 
              <name>BUSTURN</name>
604 
              <description>BUSTURN</description>
605 
              <bitOffset>16</bitOffset>
606 
              <bitWidth>4</bitWidth>
607 
            </field>
608 
            <field>
609 
              <name>DATAST</name>
610 
              <description>DATAST</description>
611 
              <bitOffset>8</bitOffset>
612 
              <bitWidth>8</bitWidth>
613 
            </field>
614 
            <field>
615 
              <name>ADDHLD</name>
616 
              <description>ADDHLD</description>
617 
              <bitOffset>4</bitOffset>
618 
              <bitWidth>4</bitWidth>
619 
            </field>
620 
            <field>
621 
              <name>ADDSET</name>
622 
              <description>ADDSET</description>
623 
              <bitOffset>0</bitOffset>
624 
              <bitWidth>4</bitWidth>
625 
            </field>
626 
          </fields>
627 
        </register>
628 
        <register>
629 
          <name>PCR2</name>
630 
          <displayName>PCR2</displayName>
631 
          <description>PC Card/NAND Flash control register
632 
          2</description>
633 
          <addressOffset>0x60</addressOffset>
634 
          <size>0x20</size>
635 
          <access>read-write</access>
636 
          <resetValue>0x00000018</resetValue>
637 
          <fields>
638 
            <field>
639 
              <name>ECCPS</name>
640 
              <description>ECCPS</description>
641 
              <bitOffset>17</bitOffset>
642 
              <bitWidth>3</bitWidth>
643 
            </field>
644 
            <field>
645 
              <name>TAR</name>
646 
              <description>TAR</description>
647 
              <bitOffset>13</bitOffset>
648 
              <bitWidth>4</bitWidth>
649 
            </field>
650 
            <field>
651 
              <name>TCLR</name>
652 
              <description>TCLR</description>
653 
              <bitOffset>9</bitOffset>
654 
              <bitWidth>4</bitWidth>
655 
            </field>
656 
            <field>
657 
              <name>ECCEN</name>
658 
              <description>ECCEN</description>
659 
              <bitOffset>6</bitOffset>
660 
              <bitWidth>1</bitWidth>
661 
            </field>
662 
            <field>
663 
              <name>PWID</name>
664 
              <description>PWID</description>
665 
              <bitOffset>4</bitOffset>
666 
              <bitWidth>2</bitWidth>
667 
            </field>
668 
            <field>
669 
              <name>PTYP</name>
670 
              <description>PTYP</description>
671 
              <bitOffset>3</bitOffset>
672 
              <bitWidth>1</bitWidth>
673 
            </field>
674 
            <field>
675 
              <name>PBKEN</name>
676 
              <description>PBKEN</description>
677 
              <bitOffset>2</bitOffset>
678 
              <bitWidth>1</bitWidth>
679 
            </field>
680 
            <field>
681 
              <name>PWAITEN</name>
682 
              <description>PWAITEN</description>
683 
              <bitOffset>1</bitOffset>
684 
              <bitWidth>1</bitWidth>
685 
            </field>
686 
          </fields>
687 
        </register>
688 
        <register>
689 
          <name>SR2</name>
690 
          <displayName>SR2</displayName>
691 
          <description>FIFO status and interrupt register
692 
          2</description>
693 
          <addressOffset>0x64</addressOffset>
694 
          <size>0x20</size>
695 
          <resetValue>0x00000040</resetValue>
696 
          <fields>
697 
            <field>
698 
              <name>FEMPT</name>
699 
              <description>FEMPT</description>
700 
              <bitOffset>6</bitOffset>
701 
              <bitWidth>1</bitWidth>
702 
              <access>read-only</access>
703 
            </field>
704 
            <field>
705 
              <name>IFEN</name>
706 
              <description>IFEN</description>
707 
              <bitOffset>5</bitOffset>
708 
              <bitWidth>1</bitWidth>
709 
              <access>read-write</access>
710 
            </field>
711 
            <field>
712 
              <name>ILEN</name>
713 
              <description>ILEN</description>
714 
              <bitOffset>4</bitOffset>
715 
              <bitWidth>1</bitWidth>
716 
              <access>read-write</access>
717 
            </field>
718 
            <field>
719 
              <name>IREN</name>
720 
              <description>IREN</description>
721 
              <bitOffset>3</bitOffset>
722 
              <bitWidth>1</bitWidth>
723 
              <access>read-write</access>
724 
            </field>
725 
            <field>
726 
              <name>IFS</name>
727 
              <description>IFS</description>
728 
              <bitOffset>2</bitOffset>
729 
              <bitWidth>1</bitWidth>
730 
              <access>read-write</access>
731 
            </field>
732 
            <field>
733 
              <name>ILS</name>
734 
              <description>ILS</description>
735 
              <bitOffset>1</bitOffset>
736 
              <bitWidth>1</bitWidth>
737 
              <access>read-write</access>
738 
            </field>
739 
            <field>
740 
              <name>IRS</name>
741 
              <description>IRS</description>
742 
              <bitOffset>0</bitOffset>
743 
              <bitWidth>1</bitWidth>
744 
              <access>read-write</access>
745 
            </field>
746 
          </fields>
747 
        </register>
748 
        <register>
749 
          <name>PMEM2</name>
750 
          <displayName>PMEM2</displayName>
751 
          <description>Common memory space timing register
752 
          2</description>
753 
          <addressOffset>0x68</addressOffset>
754 
          <size>0x20</size>
755 
          <access>read-write</access>
756 
          <resetValue>0xFCFCFCFC</resetValue>
757 
          <fields>
758 
            <field>
759 
              <name>MEMHIZx</name>
760 
              <description>MEMHIZx</description>
761 
              <bitOffset>24</bitOffset>
762 
              <bitWidth>8</bitWidth>
763 
            </field>
764 
            <field>
765 
              <name>MEMHOLDx</name>
766 
              <description>MEMHOLDx</description>
767 
              <bitOffset>16</bitOffset>
768 
              <bitWidth>8</bitWidth>
769 
            </field>
770 
            <field>
771 
              <name>MEMWAITx</name>
772 
              <description>MEMWAITx</description>
773 
              <bitOffset>8</bitOffset>
774 
              <bitWidth>8</bitWidth>
775 
            </field>
776 
            <field>
777 
              <name>MEMSETx</name>
778 
              <description>MEMSETx</description>
779 
              <bitOffset>0</bitOffset>
780 
              <bitWidth>8</bitWidth>
781 
            </field>
782 
          </fields>
783 
        </register>
784 
        <register>
785 
          <name>PATT2</name>
786 
          <displayName>PATT2</displayName>
787 
          <description>Attribute memory space timing register
788 
          2</description>
789 
          <addressOffset>0x6C</addressOffset>
790 
          <size>0x20</size>
791 
          <access>read-write</access>
792 
          <resetValue>0xFCFCFCFC</resetValue>
793 
          <fields>
794 
            <field>
795 
              <name>ATTHIZx</name>
796 
              <description>Attribute memory x databus HiZ
797 
              time</description>
798 
              <bitOffset>24</bitOffset>
799 
              <bitWidth>8</bitWidth>
800 
            </field>
801 
            <field>
802 
              <name>ATTHOLDx</name>
803 
              <description>Attribute memory x hold
804 
              time</description>
805 
              <bitOffset>16</bitOffset>
806 
              <bitWidth>8</bitWidth>
807 
            </field>
808 
            <field>
809 
              <name>ATTWAITx</name>
810 
              <description>Attribute memory x wait
811 
              time</description>
812 
              <bitOffset>8</bitOffset>
813 
              <bitWidth>8</bitWidth>
814 
            </field>
815 
            <field>
816 
              <name>ATTSETx</name>
817 
              <description>Attribute memory x setup
818 
              time</description>
819 
              <bitOffset>0</bitOffset>
820 
              <bitWidth>8</bitWidth>
821 
            </field>
822 
          </fields>
823 
        </register>
824 
        <register>
825 
          <name>ECCR2</name>
826 
          <displayName>ECCR2</displayName>
827 
          <description>ECC result register 2</description>
828 
          <addressOffset>0x74</addressOffset>
829 
          <size>0x20</size>
830 
          <access>read-only</access>
831 
          <resetValue>0x00000000</resetValue>
832 
          <fields>
833 
            <field>
834 
              <name>ECCx</name>
835 
              <description>ECC result</description>
836 
              <bitOffset>0</bitOffset>
837 
              <bitWidth>32</bitWidth>
838 
            </field>
839 
          </fields>
840 
        </register>
841 
        <register>
842 
          <name>PCR3</name>
843 
          <displayName>PCR3</displayName>
844 
          <description>PC Card/NAND Flash control register
845 
          3</description>
846 
          <addressOffset>0x80</addressOffset>
847 
          <size>0x20</size>
848 
          <access>read-write</access>
849 
          <resetValue>0x00000018</resetValue>
850 
          <fields>
851 
            <field>
852 
              <name>ECCPS</name>
853 
              <description>ECCPS</description>
854 
              <bitOffset>17</bitOffset>
855 
              <bitWidth>3</bitWidth>
856 
            </field>
857 
            <field>
858 
              <name>TAR</name>
859 
              <description>TAR</description>
860 
              <bitOffset>13</bitOffset>
861 
              <bitWidth>4</bitWidth>
862 
            </field>
863 
            <field>
864 
              <name>TCLR</name>
865 
              <description>TCLR</description>
866 
              <bitOffset>9</bitOffset>
867 
              <bitWidth>4</bitWidth>
868 
            </field>
869 
            <field>
870 
              <name>ECCEN</name>
871 
              <description>ECCEN</description>
872 
              <bitOffset>6</bitOffset>
873 
              <bitWidth>1</bitWidth>
874 
            </field>
875 
            <field>
876 
              <name>PWID</name>
877 
              <description>PWID</description>
878 
              <bitOffset>4</bitOffset>
879 
              <bitWidth>2</bitWidth>
880 
            </field>
881 
            <field>
882 
              <name>PTYP</name>
883 
              <description>PTYP</description>
884 
              <bitOffset>3</bitOffset>
885 
              <bitWidth>1</bitWidth>
886 
            </field>
887 
            <field>
888 
              <name>PBKEN</name>
889 
              <description>PBKEN</description>
890 
              <bitOffset>2</bitOffset>
891 
              <bitWidth>1</bitWidth>
892 
            </field>
893 
            <field>
894 
              <name>PWAITEN</name>
895 
              <description>PWAITEN</description>
896 
              <bitOffset>1</bitOffset>
897 
              <bitWidth>1</bitWidth>
898 
            </field>
899 
          </fields>
900 
        </register>
901 
        <register>
902 
          <name>SR3</name>
903 
          <displayName>SR3</displayName>
904 
          <description>FIFO status and interrupt register
905 
          3</description>
906 
          <addressOffset>0x84</addressOffset>
907 
          <size>0x20</size>
908 
          <resetValue>0x00000040</resetValue>
909 
          <fields>
910 
            <field>
911 
              <name>FEMPT</name>
912 
              <description>FEMPT</description>
913 
              <bitOffset>6</bitOffset>
914 
              <bitWidth>1</bitWidth>
915 
              <access>read-only</access>
916 
            </field>
917 
            <field>
918 
              <name>IFEN</name>
919 
              <description>IFEN</description>
920 
              <bitOffset>5</bitOffset>
921 
              <bitWidth>1</bitWidth>
922 
              <access>read-write</access>
923 
            </field>
924 
            <field>
925 
              <name>ILEN</name>
926 
              <description>ILEN</description>
927 
              <bitOffset>4</bitOffset>
928 
              <bitWidth>1</bitWidth>
929 
              <access>read-write</access>
930 
            </field>
931 
            <field>
932 
              <name>IREN</name>
933 
              <description>IREN</description>
934 
              <bitOffset>3</bitOffset>
935 
              <bitWidth>1</bitWidth>
936 
              <access>read-write</access>
937 
            </field>
938 
            <field>
939 
              <name>IFS</name>
940 
              <description>IFS</description>
941 
              <bitOffset>2</bitOffset>
942 
              <bitWidth>1</bitWidth>
943 
              <access>read-write</access>
944 
            </field>
945 
            <field>
946 
              <name>ILS</name>
947 
              <description>ILS</description>
948 
              <bitOffset>1</bitOffset>
949 
              <bitWidth>1</bitWidth>
950 
              <access>read-write</access>
951 
            </field>
952 
            <field>
953 
              <name>IRS</name>
954 
              <description>IRS</description>
955 
              <bitOffset>0</bitOffset>
956 
              <bitWidth>1</bitWidth>
957 
              <access>read-write</access>
958 
            </field>
959 
          </fields>
960 
        </register>
961 
        <register>
962 
          <name>PMEM3</name>
963 
          <displayName>PMEM3</displayName>
964 
          <description>Common memory space timing register
965 
          3</description>
966 
          <addressOffset>0x88</addressOffset>
967 
          <size>0x20</size>
968 
          <access>read-write</access>
969 
          <resetValue>0xFCFCFCFC</resetValue>
970 
          <fields>
971 
            <field>
972 
              <name>MEMHIZx</name>
973 
              <description>MEMHIZx</description>
974 
              <bitOffset>24</bitOffset>
975 
              <bitWidth>8</bitWidth>
976 
            </field>
977 
            <field>
978 
              <name>MEMHOLDx</name>
979 
              <description>MEMHOLDx</description>
980 
              <bitOffset>16</bitOffset>
981 
              <bitWidth>8</bitWidth>
982 
            </field>
983 
            <field>
984 
              <name>MEMWAITx</name>
985 
              <description>MEMWAITx</description>
986 
              <bitOffset>8</bitOffset>
987 
              <bitWidth>8</bitWidth>
988 
            </field>
989 
            <field>
990 
              <name>MEMSETx</name>
991 
              <description>MEMSETx</description>
992 
              <bitOffset>0</bitOffset>
993 
              <bitWidth>8</bitWidth>
994 
            </field>
995 
          </fields>
996 
        </register>
997 
        <register>
998 
          <name>PATT3</name>
999 
          <displayName>PATT3</displayName>
1000 
          <description>Attribute memory space timing register
1001 
          3</description>
1002 
          <addressOffset>0x8C</addressOffset>
1003 
          <size>0x20</size>
1004 
          <access>read-write</access>
1005 
          <resetValue>0xFCFCFCFC</resetValue>
1006 
          <fields>
1007 
            <field>
1008 
              <name>ATTHIZx</name>
1009 
              <description>ATTHIZx</description>
1010 
              <bitOffset>24</bitOffset>
1011 
              <bitWidth>8</bitWidth>
1012 
            </field>
1013 
            <field>
1014 
              <name>ATTHOLDx</name>
1015 
              <description>ATTHOLDx</description>
1016 
              <bitOffset>16</bitOffset>
1017 
              <bitWidth>8</bitWidth>
1018 
            </field>
1019 
            <field>
1020 
              <name>ATTWAITx</name>
1021 
              <description>ATTWAITx</description>
1022 
              <bitOffset>8</bitOffset>
1023 
              <bitWidth>8</bitWidth>
1024 
            </field>
1025 
            <field>
1026 
              <name>ATTSETx</name>
1027 
              <description>ATTSETx</description>
1028 
              <bitOffset>0</bitOffset>
1029 
              <bitWidth>8</bitWidth>
1030 
            </field>
1031 
          </fields>
1032 
        </register>
1033 
        <register>
1034 
          <name>ECCR3</name>
1035 
          <displayName>ECCR3</displayName>
1036 
          <description>ECC result register 3</description>
1037 
          <addressOffset>0x94</addressOffset>
1038 
          <size>0x20</size>
1039 
          <access>read-only</access>
1040 
          <resetValue>0x00000000</resetValue>
1041 
          <fields>
1042 
            <field>
1043 
              <name>ECCx</name>
1044 
              <description>ECCx</description>
1045 
              <bitOffset>0</bitOffset>
1046 
              <bitWidth>32</bitWidth>
1047 
            </field>
1048 
          </fields>
1049 
        </register>
1050 
        <register>
1051 
          <name>PCR4</name>
1052 
          <displayName>PCR4</displayName>
1053 
          <description>PC Card/NAND Flash control register
1054 
          4</description>
1055 
          <addressOffset>0xA0</addressOffset>
1056 
          <size>0x20</size>
1057 
          <access>read-write</access>
1058 
          <resetValue>0x00000018</resetValue>
1059 
          <fields>
1060 
            <field>
1061 
              <name>ECCPS</name>
1062 
              <description>ECCPS</description>
1063 
              <bitOffset>17</bitOffset>
1064 
              <bitWidth>3</bitWidth>
1065 
            </field>
1066 
            <field>
1067 
              <name>TAR</name>
1068 
              <description>TAR</description>
1069 
              <bitOffset>13</bitOffset>
1070 
              <bitWidth>4</bitWidth>
1071 
            </field>
1072 
            <field>
1073 
              <name>TCLR</name>
1074 
              <description>TCLR</description>
1075 
              <bitOffset>9</bitOffset>
1076 
              <bitWidth>4</bitWidth>
1077 
            </field>
1078 
            <field>
1079 
              <name>ECCEN</name>
1080 
              <description>ECCEN</description>
1081 
              <bitOffset>6</bitOffset>
1082 
              <bitWidth>1</bitWidth>
1083 
            </field>
1084 
            <field>
1085 
              <name>PWID</name>
1086 
              <description>PWID</description>
1087 
              <bitOffset>4</bitOffset>
1088 
              <bitWidth>2</bitWidth>
1089 
            </field>
1090 
            <field>
1091 
              <name>PTYP</name>
1092 
              <description>PTYP</description>
1093 
              <bitOffset>3</bitOffset>
1094 
              <bitWidth>1</bitWidth>
1095 
            </field>
1096 
            <field>
1097 
              <name>PBKEN</name>
1098 
              <description>PBKEN</description>
1099 
              <bitOffset>2</bitOffset>
1100 
              <bitWidth>1</bitWidth>
1101 
            </field>
1102 
            <field>
1103 
              <name>PWAITEN</name>
1104 
              <description>PWAITEN</description>
1105 
              <bitOffset>1</bitOffset>
1106 
              <bitWidth>1</bitWidth>
1107 
            </field>
1108 
          </fields>
1109 
        </register>
1110 
        <register>
1111 
          <name>SR4</name>
1112 
          <displayName>SR4</displayName>
1113 
          <description>FIFO status and interrupt register
1114 
          4</description>
1115 
          <addressOffset>0xA4</addressOffset>
1116 
          <size>0x20</size>
1117 
          <resetValue>0x00000040</resetValue>
1118 
          <fields>
1119 
            <field>
1120 
              <name>FEMPT</name>
1121 
              <description>FEMPT</description>
1122 
              <bitOffset>6</bitOffset>
1123 
              <bitWidth>1</bitWidth>
1124 
              <access>read-only</access>
1125 
            </field>
1126 
            <field>
1127 
              <name>IFEN</name>
1128 
              <description>IFEN</description>
1129 
              <bitOffset>5</bitOffset>
1130 
              <bitWidth>1</bitWidth>
1131 
              <access>read-write</access>
1132 
            </field>
1133 
            <field>
1134 
              <name>ILEN</name>
1135 
              <description>ILEN</description>
1136 
              <bitOffset>4</bitOffset>
1137 
              <bitWidth>1</bitWidth>
1138 
              <access>read-write</access>
1139 
            </field>
1140 
            <field>
1141 
              <name>IREN</name>
1142 
              <description>IREN</description>
1143 
              <bitOffset>3</bitOffset>
1144 
              <bitWidth>1</bitWidth>
1145 
              <access>read-write</access>
1146 
            </field>
1147 
            <field>
1148 
              <name>IFS</name>
1149 
              <description>IFS</description>
1150 
              <bitOffset>2</bitOffset>
1151 
              <bitWidth>1</bitWidth>
1152 
              <access>read-write</access>
1153 
            </field>
1154 
            <field>
1155 
              <name>ILS</name>
1156 
              <description>ILS</description>
1157 
              <bitOffset>1</bitOffset>
1158 
              <bitWidth>1</bitWidth>
1159 
              <access>read-write</access>
1160 
            </field>
1161 
            <field>
1162 
              <name>IRS</name>
1163 
              <description>IRS</description>
1164 
              <bitOffset>0</bitOffset>
1165 
              <bitWidth>1</bitWidth>
1166 
              <access>read-write</access>
1167 
            </field>
1168 
          </fields>
1169 
        </register>
1170 
        <register>
1171 
          <name>PMEM4</name>
1172 
          <displayName>PMEM4</displayName>
1173 
          <description>Common memory space timing register
1174 
          4</description>
1175 
          <addressOffset>0xA8</addressOffset>
1176 
          <size>0x20</size>
1177 
          <access>read-write</access>
1178 
          <resetValue>0xFCFCFCFC</resetValue>
1179 
          <fields>
1180 
            <field>
1181 
              <name>MEMHIZx</name>
1182 
              <description>MEMHIZx</description>
1183 
              <bitOffset>24</bitOffset>
1184 
              <bitWidth>8</bitWidth>
1185 
            </field>
1186 
            <field>
1187 
              <name>MEMHOLDx</name>
1188 
              <description>MEMHOLDx</description>
1189 
              <bitOffset>16</bitOffset>
1190 
              <bitWidth>8</bitWidth>
1191 
            </field>
1192 
            <field>
1193 
              <name>MEMWAITx</name>
1194 
              <description>MEMWAITx</description>
1195 
              <bitOffset>8</bitOffset>
1196 
              <bitWidth>8</bitWidth>
1197 
            </field>
1198 
            <field>
1199 
              <name>MEMSETx</name>
1200 
              <description>MEMSETx</description>
1201 
              <bitOffset>0</bitOffset>
1202 
              <bitWidth>8</bitWidth>
1203 
            </field>
1204 
          </fields>
1205 
        </register>
1206 
        <register>
1207 
          <name>PATT4</name>
1208 
          <displayName>PATT4</displayName>
1209 
          <description>Attribute memory space timing register
1210 
          4</description>
1211 
          <addressOffset>0xAC</addressOffset>
1212 
          <size>0x20</size>
1213 
          <access>read-write</access>
1214 
          <resetValue>0xFCFCFCFC</resetValue>
1215 
          <fields>
1216 
            <field>
1217 
              <name>ATTHIZx</name>
1218 
              <description>ATTHIZx</description>
1219 
              <bitOffset>24</bitOffset>
1220 
              <bitWidth>8</bitWidth>
1221 
            </field>
1222 
            <field>
1223 
              <name>ATTHOLDx</name>
1224 
              <description>ATTHOLDx</description>
1225 
              <bitOffset>16</bitOffset>
1226 
              <bitWidth>8</bitWidth>
1227 
            </field>
1228 
            <field>
1229 
              <name>ATTWAITx</name>
1230 
              <description>ATTWAITx</description>
1231 
              <bitOffset>8</bitOffset>
1232 
              <bitWidth>8</bitWidth>
1233 
            </field>
1234 
            <field>
1235 
              <name>ATTSETx</name>
1236 
              <description>ATTSETx</description>
1237 
              <bitOffset>0</bitOffset>
1238 
              <bitWidth>8</bitWidth>
1239 
            </field>
1240 
          </fields>
1241 
        </register>
1242 
        <register>
1243 
          <name>PIO4</name>
1244 
          <displayName>PIO4</displayName>
1245 
          <description>I/O space timing register 4</description>
1246 
          <addressOffset>0xB0</addressOffset>
1247 
          <size>0x20</size>
1248 
          <access>read-write</access>
1249 
          <resetValue>0xFCFCFCFC</resetValue>
1250 
          <fields>
1251 
            <field>
1252 
              <name>IOHIZx</name>
1253 
              <description>IOHIZx</description>
1254 
              <bitOffset>24</bitOffset>
1255 
              <bitWidth>8</bitWidth>
1256 
            </field>
1257 
            <field>
1258 
              <name>IOHOLDx</name>
1259 
              <description>IOHOLDx</description>
1260 
              <bitOffset>16</bitOffset>
1261 
              <bitWidth>8</bitWidth>
1262 
            </field>
1263 
            <field>
1264 
              <name>IOWAITx</name>
1265 
              <description>IOWAITx</description>
1266 
              <bitOffset>8</bitOffset>
1267 
              <bitWidth>8</bitWidth>
1268 
            </field>
1269 
            <field>
1270 
              <name>IOSETx</name>
1271 
              <description>IOSETx</description>
1272 
              <bitOffset>0</bitOffset>
1273 
              <bitWidth>8</bitWidth>
1274 
            </field>
1275 
          </fields>
1276 
        </register>
1277 
        <register>
1278 
          <name>BWTR1</name>
1279 
          <displayName>BWTR1</displayName>
1280 
          <description>SRAM/NOR-Flash write timing registers
1281 
          1</description>
1282 
          <addressOffset>0x104</addressOffset>
1283 
          <size>0x20</size>
1284 
          <access>read-write</access>
1285 
          <resetValue>0x0FFFFFFF</resetValue>
1286 
          <fields>
1287 
            <field>
1288 
              <name>ACCMOD</name>
1289 
              <description>ACCMOD</description>
1290 
              <bitOffset>28</bitOffset>
1291 
              <bitWidth>2</bitWidth>
1292 
            </field>
1293 
            <field>
1294 
              <name>DATLAT</name>
1295 
              <description>DATLAT</description>
1296 
              <bitOffset>24</bitOffset>
1297 
              <bitWidth>4</bitWidth>
1298 
            </field>
1299 
            <field>
1300 
              <name>CLKDIV</name>
1301 
              <description>CLKDIV</description>
1302 
              <bitOffset>20</bitOffset>
1303 
              <bitWidth>4</bitWidth>
1304 
            </field>
1305 
            <field>
1306 
              <name>DATAST</name>
1307 
              <description>DATAST</description>
1308 
              <bitOffset>8</bitOffset>
1309 
              <bitWidth>8</bitWidth>
1310 
            </field>
1311 
            <field>
1312 
              <name>ADDHLD</name>
1313 
              <description>ADDHLD</description>
1314 
              <bitOffset>4</bitOffset>
1315 
              <bitWidth>4</bitWidth>
1316 
            </field>
1317 
            <field>
1318 
              <name>ADDSET</name>
1319 
              <description>ADDSET</description>
1320 
              <bitOffset>0</bitOffset>
1321 
              <bitWidth>4</bitWidth>
1322 
            </field>
1323 
          </fields>
1324 
        </register>
1325 
        <register>
1326 
          <name>BWTR2</name>
1327 
          <displayName>BWTR2</displayName>
1328 
          <description>SRAM/NOR-Flash write timing registers
1329 
          2</description>
1330 
          <addressOffset>0x10C</addressOffset>
1331 
          <size>0x20</size>
1332 
          <access>read-write</access>
1333 
          <resetValue>0x0FFFFFFF</resetValue>
1334 
          <fields>
1335 
            <field>
1336 
              <name>ACCMOD</name>
1337 
              <description>ACCMOD</description>
1338 
              <bitOffset>28</bitOffset>
1339 
              <bitWidth>2</bitWidth>
1340 
            </field>
1341 
            <field>
1342 
              <name>DATLAT</name>
1343 
              <description>DATLAT</description>
1344 
              <bitOffset>24</bitOffset>
1345 
              <bitWidth>4</bitWidth>
1346 
            </field>
1347 
            <field>
1348 
              <name>CLKDIV</name>
1349 
              <description>CLKDIV</description>
1350 
              <bitOffset>20</bitOffset>
1351 
              <bitWidth>4</bitWidth>
1352 
            </field>
1353 
            <field>
1354 
              <name>DATAST</name>
1355 
              <description>DATAST</description>
1356 
              <bitOffset>8</bitOffset>
1357 
              <bitWidth>8</bitWidth>
1358 
            </field>
1359 
            <field>
1360 
              <name>ADDHLD</name>
1361 
              <description>ADDHLD</description>
1362 
              <bitOffset>4</bitOffset>
1363 
              <bitWidth>4</bitWidth>
1364 
            </field>
1365 
            <field>
1366 
              <name>ADDSET</name>
1367 
              <description>ADDSET</description>
1368 
              <bitOffset>0</bitOffset>
1369 
              <bitWidth>4</bitWidth>
1370 
            </field>
1371 
          </fields>
1372 
        </register>
1373 
        <register>
1374 
          <name>BWTR3</name>
1375 
          <displayName>BWTR3</displayName>
1376 
          <description>SRAM/NOR-Flash write timing registers
1377 
          3</description>
1378 
          <addressOffset>0x114</addressOffset>
1379 
          <size>0x20</size>
1380 
          <access>read-write</access>
1381 
          <resetValue>0x0FFFFFFF</resetValue>
1382 
          <fields>
1383 
            <field>
1384 
              <name>ACCMOD</name>
1385 
              <description>ACCMOD</description>
1386 
              <bitOffset>28</bitOffset>
1387 
              <bitWidth>2</bitWidth>
1388 
            </field>
1389 
            <field>
1390 
              <name>DATLAT</name>
1391 
              <description>DATLAT</description>
1392 
              <bitOffset>24</bitOffset>
1393 
              <bitWidth>4</bitWidth>
1394 
            </field>
1395 
            <field>
1396 
              <name>CLKDIV</name>
1397 
              <description>CLKDIV</description>
1398 
              <bitOffset>20</bitOffset>
1399 
              <bitWidth>4</bitWidth>
1400 
            </field>
1401 
            <field>
1402 
              <name>DATAST</name>
1403 
              <description>DATAST</description>
1404 
              <bitOffset>8</bitOffset>
1405 
              <bitWidth>8</bitWidth>
1406 
            </field>
1407 
            <field>
1408 
              <name>ADDHLD</name>
1409 
              <description>ADDHLD</description>
1410 
              <bitOffset>4</bitOffset>
1411 
              <bitWidth>4</bitWidth>
1412 
            </field>
1413 
            <field>
1414 
              <name>ADDSET</name>
1415 
              <description>ADDSET</description>
1416 
              <bitOffset>0</bitOffset>
1417 
              <bitWidth>4</bitWidth>
1418 
            </field>
1419 
          </fields>
1420 
        </register>
1421 
        <register>
1422 
          <name>BWTR4</name>
1423 
          <displayName>BWTR4</displayName>
1424 
          <description>SRAM/NOR-Flash write timing registers
1425 
          4</description>
1426 
          <addressOffset>0x11C</addressOffset>
1427 
          <size>0x20</size>
1428 
          <access>read-write</access>
1429 
          <resetValue>0x0FFFFFFF</resetValue>
1430 
          <fields>
1431 
            <field>
1432 
              <name>ACCMOD</name>
1433 
              <description>ACCMOD</description>
1434 
              <bitOffset>28</bitOffset>
1435 
              <bitWidth>2</bitWidth>
1436 
            </field>
1437 
            <field>
1438 
              <name>DATLAT</name>
1439 
              <description>DATLAT</description>
1440 
              <bitOffset>24</bitOffset>
1441 
              <bitWidth>4</bitWidth>
1442 
            </field>
1443 
            <field>
1444 
              <name>CLKDIV</name>
1445 
              <description>CLKDIV</description>
1446 
              <bitOffset>20</bitOffset>
1447 
              <bitWidth>4</bitWidth>
1448 
            </field>
1449 
            <field>
1450 
              <name>DATAST</name>
1451 
              <description>DATAST</description>
1452 
              <bitOffset>8</bitOffset>
1453 
              <bitWidth>8</bitWidth>
1454 
            </field>
1455 
            <field>
1456 
              <name>ADDHLD</name>
1457 
              <description>ADDHLD</description>
1458 
              <bitOffset>4</bitOffset>
1459 
              <bitWidth>4</bitWidth>
1460 
            </field>
1461 
            <field>
1462 
              <name>ADDSET</name>
1463 
              <description>ADDSET</description>
1464 
              <bitOffset>0</bitOffset>
1465 
              <bitWidth>4</bitWidth>
1466 
            </field>
1467 
          </fields>
1468 
        </register>
1469 
      </registers>
1470 
    </peripheral>
1471 
    <peripheral>
1472 
      <name>PWR</name>
1473 
      <description>Power control</description>
1474 
      <groupName>PWR</groupName>
1475 
      <baseAddress>0x40007000</baseAddress>
1476 
      <addressBlock>
1477 
        <offset>0x0</offset>
1478 
        <size>0x400</size>
1479 
        <usage>registers</usage>
1480 
      </addressBlock>
1481 
      <interrupt>
1482 
        <name>PVD</name>
1483 
        <description>PVD through EXTI line detection
1484 
        interrupt</description>
1485 
        <value>1</value>
1486 
      </interrupt>
1487 
      <registers>
1488 
        <register>
1489 
          <name>CR</name>
1490 
          <displayName>CR</displayName>
1491 
          <description>Power control register
1492 
          (PWR_CR)</description>
1493 
          <addressOffset>0x0</addressOffset>
1494 
          <size>0x20</size>
1495 
          <access>read-write</access>
1496 
          <resetValue>0x00000000</resetValue>
1497 
          <fields>
1498 
            <field>
1499 
              <name>LPDS</name>
1500 
              <description>Low Power Deep Sleep</description>
1501 
              <bitOffset>0</bitOffset>
1502 
              <bitWidth>1</bitWidth>
1503 
            </field>
1504 
            <field>
1505 
              <name>PDDS</name>
1506 
              <description>Power Down Deep Sleep</description>
1507 
              <bitOffset>1</bitOffset>
1508 
              <bitWidth>1</bitWidth>
1509 
            </field>
1510 
            <field>
1511 
              <name>CWUF</name>
1512 
              <description>Clear Wake-up Flag</description>
1513 
              <bitOffset>2</bitOffset>
1514 
              <bitWidth>1</bitWidth>
1515 
            </field>
1516 
            <field>
1517 
              <name>CSBF</name>
1518 
              <description>Clear STANDBY Flag</description>
1519 
              <bitOffset>3</bitOffset>
1520 
              <bitWidth>1</bitWidth>
1521 
            </field>
1522 
            <field>
1523 
              <name>PVDE</name>
1524 
              <description>Power Voltage Detector
1525 
              Enable</description>
1526 
              <bitOffset>4</bitOffset>
1527 
              <bitWidth>1</bitWidth>
1528 
            </field>
1529 
            <field>
1530 
              <name>PLS</name>
1531 
              <description>PVD Level Selection</description>
1532 
              <bitOffset>5</bitOffset>
1533 
              <bitWidth>3</bitWidth>
1534 
            </field>
1535 
            <field>
1536 
              <name>DBP</name>
1537 
              <description>Disable Backup Domain write
1538 
              protection</description>
1539 
              <bitOffset>8</bitOffset>
1540 
              <bitWidth>1</bitWidth>
1541 
            </field>
1542 
          </fields>
1543 
        </register>
1544 
        <register>
1545 
          <name>CSR</name>
1546 
          <displayName>CSR</displayName>
1547 
          <description>Power control register
1548 
          (PWR_CR)</description>
1549 
          <addressOffset>0x4</addressOffset>
1550 
          <size>0x20</size>
1551 
          <resetValue>0x00000000</resetValue>
1552 
          <fields>
1553 
            <field>
1554 
              <name>WUF</name>
1555 
              <description>Wake-Up Flag</description>
1556 
              <bitOffset>0</bitOffset>
1557 
              <bitWidth>1</bitWidth>
1558 
              <access>read-only</access>
1559 
            </field>
1560 
            <field>
1561 
              <name>SBF</name>
1562 
              <description>STANDBY Flag</description>
1563 
              <bitOffset>1</bitOffset>
1564 
              <bitWidth>1</bitWidth>
1565 
              <access>read-only</access>
1566 
            </field>
1567 
            <field>
1568 
              <name>PVDO</name>
1569 
              <description>PVD Output</description>
1570 
              <bitOffset>2</bitOffset>
1571 
              <bitWidth>1</bitWidth>
1572 
              <access>read-only</access>
1573 
            </field>
1574 
            <field>
1575 
              <name>EWUP</name>
1576 
              <description>Enable WKUP pin</description>
1577 
              <bitOffset>8</bitOffset>
1578 
              <bitWidth>1</bitWidth>
1579 
              <access>read-write</access>
1580 
            </field>
1581 
          </fields>
1582 
        </register>
1583 
      </registers>
1584 
    </peripheral>
1585 
    <peripheral>
1586 
      <name>RCC</name>
1587 
      <description>Reset and clock control</description>
1588 
      <groupName>RCC</groupName>
1589 
      <baseAddress>0x40021000</baseAddress>
1590 
      <addressBlock>
1591 
        <offset>0x0</offset>
1592 
        <size>0x400</size>
1593 
        <usage>registers</usage>
1594 
      </addressBlock>
1595 
      <interrupt>
1596 
        <name>RCC</name>
1597 
        <description>RCC global interrupt</description>
1598 
        <value>5</value>
1599 
      </interrupt>
1600 
      <registers>
1601 
        <register>
1602 
          <name>CR</name>
1603 
          <displayName>CR</displayName>
1604 
          <description>Clock control register</description>
1605 
          <addressOffset>0x0</addressOffset>
1606 
          <size>0x20</size>
1607 
          <resetValue>0x00000083</resetValue>
1608 
          <fields>
1609 
            <field>
1610 
              <name>HSION</name>
1611 
              <description>Internal High Speed clock
1612 
              enable</description>
1613 
              <bitOffset>0</bitOffset>
1614 
              <bitWidth>1</bitWidth>
1615 
              <access>read-write</access>
1616 
            </field>
1617 
            <field>
1618 
              <name>HSIRDY</name>
1619 
              <description>Internal High Speed clock ready
1620 
              flag</description>
1621 
              <bitOffset>1</bitOffset>
1622 
              <bitWidth>1</bitWidth>
1623 
              <access>read-only</access>
1624 
            </field>
1625 
            <field>
1626 
              <name>HSITRIM</name>
1627 
              <description>Internal High Speed clock
1628 
              trimming</description>
1629 
              <bitOffset>3</bitOffset>
1630 
              <bitWidth>5</bitWidth>
1631 
              <access>read-write</access>
1632 
            </field>
1633 
            <field>
1634 
              <name>HSICAL</name>
1635 
              <description>Internal High Speed clock
1636 
              Calibration</description>
1637 
              <bitOffset>8</bitOffset>
1638 
              <bitWidth>8</bitWidth>
1639 
              <access>read-only</access>
1640 
            </field>
1641 
            <field>
1642 
              <name>HSEON</name>
1643 
              <description>External High Speed clock
1644 
              enable</description>
1645 
              <bitOffset>16</bitOffset>
1646 
              <bitWidth>1</bitWidth>
1647 
              <access>read-write</access>
1648 
            </field>
1649 
            <field>
1650 
              <name>HSERDY</name>
1651 
              <description>External High Speed clock ready
1652 
              flag</description>
1653 
              <bitOffset>17</bitOffset>
1654 
              <bitWidth>1</bitWidth>
1655 
              <access>read-only</access>
1656 
            </field>
1657 
            <field>
1658 
              <name>HSEBYP</name>
1659 
              <description>External High Speed clock
1660 
              Bypass</description>
1661 
              <bitOffset>18</bitOffset>
1662 
              <bitWidth>1</bitWidth>
1663 
              <access>read-write</access>
1664 
            </field>
1665 
            <field>
1666 
              <name>CSSON</name>
1667 
              <description>Clock Security System
1668 
              enable</description>
1669 
              <bitOffset>19</bitOffset>
1670 
              <bitWidth>1</bitWidth>
1671 
              <access>read-write</access>
1672 
            </field>
1673 
            <field>
1674 
              <name>PLLON</name>
1675 
              <description>PLL enable</description>
1676 
              <bitOffset>24</bitOffset>
1677 
              <bitWidth>1</bitWidth>
1678 
              <access>read-write</access>
1679 
            </field>
1680 
            <field>
1681 
              <name>PLLRDY</name>
1682 
              <description>PLL clock ready flag</description>
1683 
              <bitOffset>25</bitOffset>
1684 
              <bitWidth>1</bitWidth>
1685 
              <access>read-only</access>
1686 
            </field>
1687 
          </fields>
1688 
        </register>
1689 
        <register>
1690 
          <name>CFGR</name>
1691 
          <displayName>CFGR</displayName>
1692 
          <description>Clock configuration register
1693 
          (RCC_CFGR)</description>
1694 
          <addressOffset>0x4</addressOffset>
1695 
          <size>0x20</size>
1696 
          <resetValue>0x00000000</resetValue>
1697 
          <fields>
1698 
            <field>
1699 
              <name>SW</name>
1700 
              <description>System clock Switch</description>
1701 
              <bitOffset>0</bitOffset>
1702 
              <bitWidth>2</bitWidth>
1703 
              <access>read-write</access>
1704 
            </field>
1705 
            <field>
1706 
              <name>SWS</name>
1707 
              <description>System Clock Switch Status</description>
1708 
              <bitOffset>2</bitOffset>
1709 
              <bitWidth>2</bitWidth>
1710 
              <access>read-only</access>
1711 
            </field>
1712 
            <field>
1713 
              <name>HPRE</name>
1714 
              <description>AHB prescaler</description>
1715 
              <bitOffset>4</bitOffset>
1716 
              <bitWidth>4</bitWidth>
1717 
              <access>read-write</access>
1718 
            </field>
1719 
            <field>
1720 
              <name>PPRE1</name>
1721 
              <description>APB Low speed prescaler
1722 
              (APB1)</description>
1723 
              <bitOffset>8</bitOffset>
1724 
              <bitWidth>3</bitWidth>
1725 
              <access>read-write</access>
1726 
            </field>
1727 
            <field>
1728 
              <name>PPRE2</name>
1729 
              <description>APB High speed prescaler
1730 
              (APB2)</description>
1731 
              <bitOffset>11</bitOffset>
1732 
              <bitWidth>3</bitWidth>
1733 
              <access>read-write</access>
1734 
            </field>
1735 
            <field>
1736 
              <name>ADCPRE</name>
1737 
              <description>ADC prescaler</description>
1738 
              <bitOffset>14</bitOffset>
1739 
              <bitWidth>2</bitWidth>
1740 
              <access>read-write</access>
1741 
            </field>
1742 
            <field>
1743 
              <name>PLLSRC</name>
1744 
              <description>PLL entry clock source</description>
1745 
              <bitOffset>16</bitOffset>
1746 
              <bitWidth>1</bitWidth>
1747 
              <access>read-write</access>
1748 
            </field>
1749 
            <field>
1750 
              <name>PLLXTPRE</name>
1751 
              <description>HSE divider for PLL entry</description>
1752 
              <bitOffset>17</bitOffset>
1753 
              <bitWidth>1</bitWidth>
1754 
              <access>read-write</access>
1755 
            </field>
1756 
            <field>
1757 
              <name>PLLMUL</name>
1758 
              <description>PLL Multiplication Factor</description>
1759 
              <bitOffset>18</bitOffset>
1760 
              <bitWidth>4</bitWidth>
1761 
              <access>read-write</access>
1762 
            </field>
1763 
            <field>
1764 
              <name>OTGFSPRE</name>
1765 
              <description>USB OTG FS prescaler</description>
1766 
              <bitOffset>22</bitOffset>
1767 
              <bitWidth>1</bitWidth>
1768 
              <access>read-write</access>
1769 
            </field>
1770 
            <field>
1771 
              <name>MCO</name>
1772 
              <description>Microcontroller clock
1773 
              output</description>
1774 
              <bitOffset>24</bitOffset>
1775 
              <bitWidth>3</bitWidth>
1776 
              <access>read-write</access>
1777 
            </field>
1778 
          </fields>
1779 
        </register>
1780 
        <register>
1781 
          <name>CIR</name>
1782 
          <displayName>CIR</displayName>
1783 
          <description>Clock interrupt register
1784 
          (RCC_CIR)</description>
1785 
          <addressOffset>0x8</addressOffset>
1786 
          <size>0x20</size>
1787 
          <resetValue>0x00000000</resetValue>
1788 
          <fields>
1789 
            <field>
1790 
              <name>LSIRDYF</name>
1791 
              <description>LSI Ready Interrupt flag</description>
1792 
              <bitOffset>0</bitOffset>
1793 
              <bitWidth>1</bitWidth>
1794 
              <access>read-only</access>
1795 
            </field>
1796 
            <field>
1797 
              <name>LSERDYF</name>
1798 
              <description>LSE Ready Interrupt flag</description>
1799 
              <bitOffset>1</bitOffset>
1800 
              <bitWidth>1</bitWidth>
1801 
              <access>read-only</access>
1802 
            </field>
1803 
            <field>
1804 
              <name>HSIRDYF</name>
1805 
              <description>HSI Ready Interrupt flag</description>
1806 
              <bitOffset>2</bitOffset>
1807 
              <bitWidth>1</bitWidth>
1808 
              <access>read-only</access>
1809 
            </field>
1810 
            <field>
1811 
              <name>HSERDYF</name>
1812 
              <description>HSE Ready Interrupt flag</description>
1813 
              <bitOffset>3</bitOffset>
1814 
              <bitWidth>1</bitWidth>
1815 
              <access>read-only</access>
1816 
            </field>
1817 
            <field>
1818 
              <name>PLLRDYF</name>
1819 
              <description>PLL Ready Interrupt flag</description>
1820 
              <bitOffset>4</bitOffset>
1821 
              <bitWidth>1</bitWidth>
1822 
              <access>read-only</access>
1823 
            </field>
1824 
            <field>
1825 
              <name>CSSF</name>
1826 
              <description>Clock Security System Interrupt
1827 
              flag</description>
1828 
              <bitOffset>7</bitOffset>
1829 
              <bitWidth>1</bitWidth>
1830 
              <access>read-only</access>
1831 
            </field>
1832 
            <field>
1833 
              <name>LSIRDYIE</name>
1834 
              <description>LSI Ready Interrupt Enable</description>
1835 
              <bitOffset>8</bitOffset>
1836 
              <bitWidth>1</bitWidth>
1837 
              <access>read-write</access>
1838 
            </field>
1839 
            <field>
1840 
              <name>LSERDYIE</name>
1841 
              <description>LSE Ready Interrupt Enable</description>
1842 
              <bitOffset>9</bitOffset>
1843 
              <bitWidth>1</bitWidth>
1844 
              <access>read-write</access>
1845 
            </field>
1846 
            <field>
1847 
              <name>HSIRDYIE</name>
1848 
              <description>HSI Ready Interrupt Enable</description>
1849 
              <bitOffset>10</bitOffset>
1850 
              <bitWidth>1</bitWidth>
1851 
              <access>read-write</access>
1852 
            </field>
1853 
            <field>
1854 
              <name>HSERDYIE</name>
1855 
              <description>HSE Ready Interrupt Enable</description>
1856 
              <bitOffset>11</bitOffset>
1857 
              <bitWidth>1</bitWidth>
1858 
              <access>read-write</access>
1859 
            </field>
1860 
            <field>
1861 
              <name>PLLRDYIE</name>
1862 
              <description>PLL Ready Interrupt Enable</description>
1863 
              <bitOffset>12</bitOffset>
1864 
              <bitWidth>1</bitWidth>
1865 
              <access>read-write</access>
1866 
            </field>
1867 
            <field>
1868 
              <name>LSIRDYC</name>
1869 
              <description>LSI Ready Interrupt Clear</description>
1870 
              <bitOffset>16</bitOffset>
1871 
              <bitWidth>1</bitWidth>
1872 
              <access>write-only</access>
1873 
            </field>
1874 
            <field>
1875 
              <name>LSERDYC</name>
1876 
              <description>LSE Ready Interrupt Clear</description>
1877 
              <bitOffset>17</bitOffset>
1878 
              <bitWidth>1</bitWidth>
1879 
              <access>write-only</access>
1880 
            </field>
1881 
            <field>
1882 
              <name>HSIRDYC</name>
1883 
              <description>HSI Ready Interrupt Clear</description>
1884 
              <bitOffset>18</bitOffset>
1885 
              <bitWidth>1</bitWidth>
1886 
              <access>write-only</access>
1887 
            </field>
1888 
            <field>
1889 
              <name>HSERDYC</name>
1890 
              <description>HSE Ready Interrupt Clear</description>
1891 
              <bitOffset>19</bitOffset>
1892 
              <bitWidth>1</bitWidth>
1893 
              <access>write-only</access>
1894 
            </field>
1895 
            <field>
1896 
              <name>PLLRDYC</name>
1897 
              <description>PLL Ready Interrupt Clear</description>
1898 
              <bitOffset>20</bitOffset>
1899 
              <bitWidth>1</bitWidth>
1900 
              <access>write-only</access>
1901 
            </field>
1902 
            <field>
1903 
              <name>CSSC</name>
1904 
              <description>Clock security system interrupt
1905 
              clear</description>
1906 
              <bitOffset>23</bitOffset>
1907 
              <bitWidth>1</bitWidth>
1908 
              <access>write-only</access>
1909 
            </field>
1910 
          </fields>
1911 
        </register>
1912 
        <register>
1913 
          <name>APB2RSTR</name>
1914 
          <displayName>APB2RSTR</displayName>
1915 
          <description>APB2 peripheral reset register
1916 
          (RCC_APB2RSTR)</description>
1917 
          <addressOffset>0xC</addressOffset>
1918 
          <size>0x20</size>
1919 
          <access>read-write</access>
1920 
          <resetValue>0x000000000</resetValue>
1921 
          <fields>
1922 
            <field>
1923 
              <name>AFIORST</name>
1924 
              <description>Alternate function I/O
1925 
              reset</description>
1926 
              <bitOffset>0</bitOffset>
1927 
              <bitWidth>1</bitWidth>
1928 
            </field>
1929 
            <field>
1930 
              <name>IOPARST</name>
1931 
              <description>IO port A reset</description>
1932 
              <bitOffset>2</bitOffset>
1933 
              <bitWidth>1</bitWidth>
1934 
            </field>
1935 
            <field>
1936 
              <name>IOPBRST</name>
1937 
              <description>IO port B reset</description>
1938 
              <bitOffset>3</bitOffset>
1939 
              <bitWidth>1</bitWidth>
1940 
            </field>
1941 
            <field>
1942 
              <name>IOPCRST</name>
1943 
              <description>IO port C reset</description>
1944 
              <bitOffset>4</bitOffset>
1945 
              <bitWidth>1</bitWidth>
1946 
            </field>
1947 
            <field>
1948 
              <name>IOPDRST</name>
1949 
              <description>IO port D reset</description>
1950 
              <bitOffset>5</bitOffset>
1951 
              <bitWidth>1</bitWidth>
1952 
            </field>
1953 
            <field>
1954 
              <name>IOPERST</name>
1955 
              <description>IO port E reset</description>
1956 
              <bitOffset>6</bitOffset>
1957 
              <bitWidth>1</bitWidth>
1958 
            </field>
1959 
            <field>
1960 
              <name>IOPFRST</name>
1961 
              <description>IO port F reset</description>
1962 
              <bitOffset>7</bitOffset>
1963 
              <bitWidth>1</bitWidth>
1964 
            </field>
1965 
            <field>
1966 
              <name>IOPGRST</name>
1967 
              <description>IO port G reset</description>
1968 
              <bitOffset>8</bitOffset>
1969 
              <bitWidth>1</bitWidth>
1970 
            </field>
1971 
            <field>
1972 
              <name>ADC1RST</name>
1973 
              <description>ADC 1 interface reset</description>
1974 
              <bitOffset>9</bitOffset>
1975 
              <bitWidth>1</bitWidth>
1976 
            </field>
1977 
            <field>
1978 
              <name>ADC2RST</name>
1979 
              <description>ADC 2 interface reset</description>
1980 
              <bitOffset>10</bitOffset>
1981 
              <bitWidth>1</bitWidth>
1982 
            </field>
1983 
            <field>
1984 
              <name>TIM1RST</name>
1985 
              <description>TIM1 timer reset</description>
1986 
              <bitOffset>11</bitOffset>
1987 
              <bitWidth>1</bitWidth>
1988 
            </field>
1989 
            <field>
1990 
              <name>SPI1RST</name>
1991 
              <description>SPI 1 reset</description>
1992 
              <bitOffset>12</bitOffset>
1993 
              <bitWidth>1</bitWidth>
1994 
            </field>
1995 
            <field>
1996 
              <name>TIM8RST</name>
1997 
              <description>TIM8 timer reset</description>
1998 
              <bitOffset>13</bitOffset>
1999 
              <bitWidth>1</bitWidth>
2000 
            </field>
2001 
            <field>
2002 
              <name>USART1RST</name>
2003 
              <description>USART1 reset</description>
2004 
              <bitOffset>14</bitOffset>
2005 
              <bitWidth>1</bitWidth>
2006 
            </field>
2007 
            <field>
2008 
              <name>ADC3RST</name>
2009 
              <description>ADC 3 interface reset</description>
2010 
              <bitOffset>15</bitOffset>
2011 
              <bitWidth>1</bitWidth>
2012 
            </field>
2013 
            <field>
2014 
              <name>TIM9RST</name>
2015 
              <description>TIM9 timer reset</description>
2016 
              <bitOffset>19</bitOffset>
2017 
              <bitWidth>1</bitWidth>
2018 
            </field>
2019 
            <field>
2020 
              <name>TIM10RST</name>
2021 
              <description>TIM10 timer reset</description>
2022 
              <bitOffset>20</bitOffset>
2023 
              <bitWidth>1</bitWidth>
2024 
            </field>
2025 
            <field>
2026 
              <name>TIM11RST</name>
2027 
              <description>TIM11 timer reset</description>
2028 
              <bitOffset>21</bitOffset>
2029 
              <bitWidth>1</bitWidth>
2030 
            </field>
2031 
          </fields>
2032 
        </register>
2033 
        <register>
2034 
          <name>APB1RSTR</name>
2035 
          <displayName>APB1RSTR</displayName>
2036 
          <description>APB1 peripheral reset register
2037 
          (RCC_APB1RSTR)</description>
2038 
          <addressOffset>0x10</addressOffset>
2039 
          <size>0x20</size>
2040 
          <access>read-write</access>
2041 
          <resetValue>0x00000000</resetValue>
2042 
          <fields>
2043 
            <field>
2044 
              <name>TIM2RST</name>
2045 
              <description>Timer 2 reset</description>
2046 
              <bitOffset>0</bitOffset>
2047 
              <bitWidth>1</bitWidth>
2048 
            </field>
2049 
            <field>
2050 
              <name>TIM3RST</name>
2051 
              <description>Timer 3 reset</description>
2052 
              <bitOffset>1</bitOffset>
2053 
              <bitWidth>1</bitWidth>
2054 
            </field>
2055 
            <field>
2056 
              <name>TIM4RST</name>
2057 
              <description>Timer 4 reset</description>
2058 
              <bitOffset>2</bitOffset>
2059 
              <bitWidth>1</bitWidth>
2060 
            </field>
2061 
            <field>
2062 
              <name>TIM5RST</name>
2063 
              <description>Timer 5 reset</description>
2064 
              <bitOffset>3</bitOffset>
2065 
              <bitWidth>1</bitWidth>
2066 
            </field>
2067 
            <field>
2068 
              <name>TIM6RST</name>
2069 
              <description>Timer 6 reset</description>
2070 
              <bitOffset>4</bitOffset>
2071 
              <bitWidth>1</bitWidth>
2072 
            </field>
2073 
            <field>
2074 
              <name>TIM7RST</name>
2075 
              <description>Timer 7 reset</description>
2076 
              <bitOffset>5</bitOffset>
2077 
              <bitWidth>1</bitWidth>
2078 
            </field>
2079 
            <field>
2080 
              <name>TIM12RST</name>
2081 
              <description>Timer 12 reset</description>
2082 
              <bitOffset>6</bitOffset>
2083 
              <bitWidth>1</bitWidth>
2084 
            </field>
2085 
            <field>
2086 
              <name>TIM13RST</name>
2087 
              <description>Timer 13 reset</description>
2088 
              <bitOffset>7</bitOffset>
2089 
              <bitWidth>1</bitWidth>
2090 
            </field>
2091 
            <field>
2092 
              <name>TIM14RST</name>
2093 
              <description>Timer 14 reset</description>
2094 
              <bitOffset>8</bitOffset>
2095 
              <bitWidth>1</bitWidth>
2096 
            </field>
2097 
            <field>
2098 
              <name>WWDGRST</name>
2099 
              <description>Window watchdog reset</description>
2100 
              <bitOffset>11</bitOffset>
2101 
              <bitWidth>1</bitWidth>
2102 
            </field>
2103 
            <field>
2104 
              <name>SPI2RST</name>
2105 
              <description>SPI2 reset</description>
2106 
              <bitOffset>14</bitOffset>
2107 
              <bitWidth>1</bitWidth>
2108 
            </field>
2109 
            <field>
2110 
              <name>SPI3RST</name>
2111 
              <description>SPI3 reset</description>
2112 
              <bitOffset>15</bitOffset>
2113 
              <bitWidth>1</bitWidth>
2114 
            </field>
2115 
            <field>
2116 
              <name>USART2RST</name>
2117 
              <description>USART 2 reset</description>
2118 
              <bitOffset>17</bitOffset>
2119 
              <bitWidth>1</bitWidth>
2120 
            </field>
2121 
            <field>
2122 
              <name>USART3RST</name>
2123 
              <description>USART 3 reset</description>
2124 
              <bitOffset>18</bitOffset>
2125 
              <bitWidth>1</bitWidth>
2126 
            </field>
2127 
            <field>
2128 
              <name>UART4RST</name>
2129 
              <description>UART 4 reset</description>
2130 
              <bitOffset>19</bitOffset>
2131 
              <bitWidth>1</bitWidth>
2132 
            </field>
2133 
            <field>
2134 
              <name>UART5RST</name>
2135 
              <description>UART 5 reset</description>
2136 
              <bitOffset>20</bitOffset>
2137 
              <bitWidth>1</bitWidth>
2138 
            </field>
2139 
            <field>
2140 
              <name>I2C1RST</name>
2141 
              <description>I2C1 reset</description>
2142 
              <bitOffset>21</bitOffset>
2143 
              <bitWidth>1</bitWidth>
2144 
            </field>
2145 
            <field>
2146 
              <name>I2C2RST</name>
2147 
              <description>I2C2 reset</description>
2148 
              <bitOffset>22</bitOffset>
2149 
              <bitWidth>1</bitWidth>
2150 
            </field>
2151 
            <field>
2152 
              <name>USBRST</name>
2153 
              <description>USB reset</description>
2154 
              <bitOffset>23</bitOffset>
2155 
              <bitWidth>1</bitWidth>
2156 
            </field>
2157 
            <field>
2158 
              <name>CANRST</name>
2159 
              <description>CAN reset</description>
2160 
              <bitOffset>25</bitOffset>
2161 
              <bitWidth>1</bitWidth>
2162 
            </field>
2163 
            <field>
2164 
              <name>BKPRST</name>
2165 
              <description>Backup interface reset</description>
2166 
              <bitOffset>27</bitOffset>
2167 
              <bitWidth>1</bitWidth>
2168 
            </field>
2169 
            <field>
2170 
              <name>PWRRST</name>
2171 
              <description>Power interface reset</description>
2172 
              <bitOffset>28</bitOffset>
2173 
              <bitWidth>1</bitWidth>
2174 
            </field>
2175 
            <field>
2176 
              <name>DACRST</name>
2177 
              <description>DAC interface reset</description>
2178 
              <bitOffset>29</bitOffset>
2179 
              <bitWidth>1</bitWidth>
2180 
            </field>
2181 
          </fields>
2182 
        </register>
2183 
        <register>
2184 
          <name>AHBENR</name>
2185 
          <displayName>AHBENR</displayName>
2186 
          <description>AHB Peripheral Clock enable register
2187 
          (RCC_AHBENR)</description>
2188 
          <addressOffset>0x14</addressOffset>
2189 
          <size>0x20</size>
2190 
          <access>read-write</access>
2191 
          <resetValue>0x00000014</resetValue>
2192 
          <fields>
2193 
            <field>
2194 
              <name>DMA1EN</name>
2195 
              <description>DMA1 clock enable</description>
2196 
              <bitOffset>0</bitOffset>
2197 
              <bitWidth>1</bitWidth>
2198 
            </field>
2199 
            <field>
2200 
              <name>DMA2EN</name>
2201 
              <description>DMA2 clock enable</description>
2202 
              <bitOffset>1</bitOffset>
2203 
              <bitWidth>1</bitWidth>
2204 
            </field>
2205 
            <field>
2206 
              <name>SRAMEN</name>
2207 
              <description>SRAM interface clock
2208 
              enable</description>
2209 
              <bitOffset>2</bitOffset>
2210 
              <bitWidth>1</bitWidth>
2211 
            </field>
2212 
            <field>
2213 
              <name>FLITFEN</name>
2214 
              <description>FLITF clock enable</description>
2215 
              <bitOffset>4</bitOffset>
2216 
              <bitWidth>1</bitWidth>
2217 
            </field>
2218 
            <field>
2219 
              <name>CRCEN</name>
2220 
              <description>CRC clock enable</description>
2221 
              <bitOffset>6</bitOffset>
2222 
              <bitWidth>1</bitWidth>
2223 
            </field>
2224 
            <field>
2225 
              <name>FSMCEN</name>
2226 
              <description>FSMC clock enable</description>
2227 
              <bitOffset>8</bitOffset>
2228 
              <bitWidth>1</bitWidth>
2229 
            </field>
2230 
            <field>
2231 
              <name>SDIOEN</name>
2232 
              <description>SDIO clock enable</description>
2233 
              <bitOffset>10</bitOffset>
2234 
              <bitWidth>1</bitWidth>
2235 
            </field>
2236 
          </fields>
2237 
        </register>
2238 
        <register>
2239 
          <name>APB2ENR</name>
2240 
          <displayName>APB2ENR</displayName>
2241 
          <description>APB2 peripheral clock enable register
2242 
          (RCC_APB2ENR)</description>
2243 
          <addressOffset>0x18</addressOffset>
2244 
          <size>0x20</size>
2245 
          <access>read-write</access>
2246 
          <resetValue>0x00000000</resetValue>
2247 
          <fields>
2248 
            <field>
2249 
              <name>AFIOEN</name>
2250 
              <description>Alternate function I/O clock
2251 
              enable</description>
2252 
              <bitOffset>0</bitOffset>
2253 
              <bitWidth>1</bitWidth>
2254 
            </field>
2255 
            <field>
2256 
              <name>IOPAEN</name>
2257 
              <description>I/O port A clock enable</description>
2258 
              <bitOffset>2</bitOffset>
2259 
              <bitWidth>1</bitWidth>
2260 
            </field>
2261 
            <field>
2262 
              <name>IOPBEN</name>
2263 
              <description>I/O port B clock enable</description>
2264 
              <bitOffset>3</bitOffset>
2265 
              <bitWidth>1</bitWidth>
2266 
            </field>
2267 
            <field>
2268 
              <name>IOPCEN</name>
2269 
              <description>I/O port C clock enable</description>
2270 
              <bitOffset>4</bitOffset>
2271 
              <bitWidth>1</bitWidth>
2272 
            </field>
2273 
            <field>
2274 
              <name>IOPDEN</name>
2275 
              <description>I/O port D clock enable</description>
2276 
              <bitOffset>5</bitOffset>
2277 
              <bitWidth>1</bitWidth>
2278 
            </field>
2279 
            <field>
2280 
              <name>IOPEEN</name>
2281 
              <description>I/O port E clock enable</description>
2282 
              <bitOffset>6</bitOffset>
2283 
              <bitWidth>1</bitWidth>
2284 
            </field>
2285 
            <field>
2286 
              <name>IOPFEN</name>
2287 
              <description>I/O port F clock enable</description>
2288 
              <bitOffset>7</bitOffset>
2289 
              <bitWidth>1</bitWidth>
2290 
            </field>
2291 
            <field>
2292 
              <name>IOPGEN</name>
2293 
              <description>I/O port G clock enable</description>
2294 
              <bitOffset>8</bitOffset>
2295 
              <bitWidth>1</bitWidth>
2296 
            </field>
2297 
            <field>
2298 
              <name>ADC1EN</name>
2299 
              <description>ADC 1 interface clock
2300 
              enable</description>
2301 
              <bitOffset>9</bitOffset>
2302 
              <bitWidth>1</bitWidth>
2303 
            </field>
2304 
            <field>
2305 
              <name>ADC2EN</name>
2306 
              <description>ADC 2 interface clock
2307 
              enable</description>
2308 
              <bitOffset>10</bitOffset>
2309 
              <bitWidth>1</bitWidth>
2310 
            </field>
2311 
            <field>
2312 
              <name>TIM1EN</name>
2313 
              <description>TIM1 Timer clock enable</description>
2314 
              <bitOffset>11</bitOffset>
2315 
              <bitWidth>1</bitWidth>
2316 
            </field>
2317 
            <field>
2318 
              <name>SPI1EN</name>
2319 
              <description>SPI 1 clock enable</description>
2320 
              <bitOffset>12</bitOffset>
2321 
              <bitWidth>1</bitWidth>
2322 
            </field>
2323 
            <field>
2324 
              <name>TIM8EN</name>
2325 
              <description>TIM8 Timer clock enable</description>
2326 
              <bitOffset>13</bitOffset>
2327 
              <bitWidth>1</bitWidth>
2328 
            </field>
2329 
            <field>
2330 
              <name>USART1EN</name>
2331 
              <description>USART1 clock enable</description>
2332 
              <bitOffset>14</bitOffset>
2333 
              <bitWidth>1</bitWidth>
2334 
            </field>
2335 
            <field>
2336 
              <name>ADC3EN</name>
2337 
              <description>ADC3 interface clock
2338 
              enable</description>
2339 
              <bitOffset>15</bitOffset>
2340 
              <bitWidth>1</bitWidth>
2341 
            </field>
2342 
            <field>
2343 
              <name>TIM9EN</name>
2344 
              <description>TIM9 Timer clock enable</description>
2345 
              <bitOffset>19</bitOffset>
2346 
              <bitWidth>1</bitWidth>
2347 
            </field>
2348 
            <field>
2349 
              <name>TIM10EN</name>
2350 
              <description>TIM10 Timer clock enable</description>
2351 
              <bitOffset>20</bitOffset>
2352 
              <bitWidth>1</bitWidth>
2353 
            </field>
2354 
            <field>
2355 
              <name>TIM11EN</name>
2356 
              <description>TIM11 Timer clock enable</description>
2357 
              <bitOffset>21</bitOffset>
2358 
              <bitWidth>1</bitWidth>
2359 
            </field>
2360 
          </fields>
2361 
        </register>
2362 
        <register>
2363 
          <name>APB1ENR</name>
2364 
          <displayName>APB1ENR</displayName>
2365 
          <description>APB1 peripheral clock enable register
2366 
          (RCC_APB1ENR)</description>
2367 
          <addressOffset>0x1C</addressOffset>
2368 
          <size>0x20</size>
2369 
          <access>read-write</access>
2370 
          <resetValue>0x00000000</resetValue>
2371 
          <fields>
2372 
            <field>
2373 
              <name>TIM2EN</name>
2374 
              <description>Timer 2 clock enable</description>
2375 
              <bitOffset>0</bitOffset>
2376 
              <bitWidth>1</bitWidth>
2377 
            </field>
2378 
            <field>
2379 
              <name>TIM3EN</name>
2380 
              <description>Timer 3 clock enable</description>
2381 
              <bitOffset>1</bitOffset>
2382 
              <bitWidth>1</bitWidth>
2383 
            </field>
2384 
            <field>
2385 
              <name>TIM4EN</name>
2386 
              <description>Timer 4 clock enable</description>
2387 
              <bitOffset>2</bitOffset>
2388 
              <bitWidth>1</bitWidth>
2389 
            </field>
2390 
            <field>
2391 
              <name>TIM5EN</name>
2392 
              <description>Timer 5 clock enable</description>
2393 
              <bitOffset>3</bitOffset>
2394 
              <bitWidth>1</bitWidth>
2395 
            </field>
2396 
            <field>
2397 
              <name>TIM6EN</name>
2398 
              <description>Timer 6 clock enable</description>
2399 
              <bitOffset>4</bitOffset>
2400 
              <bitWidth>1</bitWidth>
2401 
            </field>
2402 
            <field>
2403 
              <name>TIM7EN</name>
2404 
              <description>Timer 7 clock enable</description>
2405 
              <bitOffset>5</bitOffset>
2406 
              <bitWidth>1</bitWidth>
2407 
            </field>
2408 
            <field>
2409 
              <name>TIM12EN</name>
2410 
              <description>Timer 12 clock enable</description>
2411 
              <bitOffset>6</bitOffset>
2412 
              <bitWidth>1</bitWidth>
2413 
            </field>
2414 
            <field>
2415 
              <name>TIM13EN</name>
2416 
              <description>Timer 13 clock enable</description>
2417 
              <bitOffset>7</bitOffset>
2418 
              <bitWidth>1</bitWidth>
2419 
            </field>
2420 
            <field>
2421 
              <name>TIM14EN</name>
2422 
              <description>Timer 14 clock enable</description>
2423 
              <bitOffset>8</bitOffset>
2424 
              <bitWidth>1</bitWidth>
2425 
            </field>
2426 
            <field>
2427 
              <name>WWDGEN</name>
2428 
              <description>Window watchdog clock
2429 
              enable</description>
2430 
              <bitOffset>11</bitOffset>
2431 
              <bitWidth>1</bitWidth>
2432 
            </field>
2433 
            <field>
2434 
              <name>SPI2EN</name>
2435 
              <description>SPI 2 clock enable</description>
2436 
              <bitOffset>14</bitOffset>
2437 
              <bitWidth>1</bitWidth>
2438 
            </field>
2439 
            <field>
2440 
              <name>SPI3EN</name>
2441 
              <description>SPI 3 clock enable</description>
2442 
              <bitOffset>15</bitOffset>
2443 
              <bitWidth>1</bitWidth>
2444 
            </field>
2445 
            <field>
2446 
              <name>USART2EN</name>
2447 
              <description>USART 2 clock enable</description>
2448 
              <bitOffset>17</bitOffset>
2449 
              <bitWidth>1</bitWidth>
2450 
            </field>
2451 
            <field>
2452 
              <name>USART3EN</name>
2453 
              <description>USART 3 clock enable</description>
2454 
              <bitOffset>18</bitOffset>
2455 
              <bitWidth>1</bitWidth>
2456 
            </field>
2457 
            <field>
2458 
              <name>UART4EN</name>
2459 
              <description>UART 4 clock enable</description>
2460 
              <bitOffset>19</bitOffset>
2461 
              <bitWidth>1</bitWidth>
2462 
            </field>
2463 
            <field>
2464 
              <name>UART5EN</name>
2465 
              <description>UART 5 clock enable</description>
2466 
              <bitOffset>20</bitOffset>
2467 
              <bitWidth>1</bitWidth>
2468 
            </field>
2469 
            <field>
2470 
              <name>I2C1EN</name>
2471 
              <description>I2C 1 clock enable</description>
2472 
              <bitOffset>21</bitOffset>
2473 
              <bitWidth>1</bitWidth>
2474 
            </field>
2475 
            <field>
2476 
              <name>I2C2EN</name>
2477 
              <description>I2C 2 clock enable</description>
2478 
              <bitOffset>22</bitOffset>
2479 
              <bitWidth>1</bitWidth>
2480 
            </field>
2481 
            <field>
2482 
              <name>USBEN</name>
2483 
              <description>USB clock enable</description>
2484 
              <bitOffset>23</bitOffset>
2485 
              <bitWidth>1</bitWidth>
2486 
            </field>
2487 
            <field>
2488 
              <name>CANEN</name>
2489 
              <description>CAN clock enable</description>
2490 
              <bitOffset>25</bitOffset>
2491 
              <bitWidth>1</bitWidth>
2492 
            </field>
2493 
            <field>
2494 
              <name>BKPEN</name>
2495 
              <description>Backup interface clock
2496 
              enable</description>
2497 
              <bitOffset>27</bitOffset>
2498 
              <bitWidth>1</bitWidth>
2499 
            </field>
2500 
            <field>
2501 
              <name>PWREN</name>
2502 
              <description>Power interface clock
2503 
              enable</description>
2504 
              <bitOffset>28</bitOffset>
2505 
              <bitWidth>1</bitWidth>
2506 
            </field>
2507 
            <field>
2508 
              <name>DACEN</name>
2509 
              <description>DAC interface clock enable</description>
2510 
              <bitOffset>29</bitOffset>
2511 
              <bitWidth>1</bitWidth>
2512 
            </field>
2513 
          </fields>
2514 
        </register>
2515 
        <register>
2516 
          <name>BDCR</name>
2517 
          <displayName>BDCR</displayName>
2518 
          <description>Backup domain control register
2519 
          (RCC_BDCR)</description>
2520 
          <addressOffset>0x20</addressOffset>
2521 
          <size>0x20</size>
2522 
          <resetValue>0x00000000</resetValue>
2523 
          <fields>
2524 
            <field>
2525 
              <name>LSEON</name>
2526 
              <description>External Low Speed oscillator
2527 
              enable</description>
2528 
              <bitOffset>0</bitOffset>
2529 
              <bitWidth>1</bitWidth>
2530 
              <access>read-write</access>
2531 
            </field>
2532 
            <field>
2533 
              <name>LSERDY</name>
2534 
              <description>External Low Speed oscillator
2535 
              ready</description>
2536 
              <bitOffset>1</bitOffset>
2537 
              <bitWidth>1</bitWidth>
2538 
              <access>read-only</access>
2539 
            </field>
2540 
            <field>
2541 
              <name>LSEBYP</name>
2542 
              <description>External Low Speed oscillator
2543 
              bypass</description>
2544 
              <bitOffset>2</bitOffset>
2545 
              <bitWidth>1</bitWidth>
2546 
              <access>read-write</access>
2547 
            </field>
2548 
            <field>
2549 
              <name>RTCSEL</name>
2550 
              <description>RTC clock source selection</description>
2551 
              <bitOffset>8</bitOffset>
2552 
              <bitWidth>2</bitWidth>
2553 
              <access>read-write</access>
2554 
            </field>
2555 
            <field>
2556 
              <name>RTCEN</name>
2557 
              <description>RTC clock enable</description>
2558 
              <bitOffset>15</bitOffset>
2559 
              <bitWidth>1</bitWidth>
2560 
              <access>read-write</access>
2561 
            </field>
2562 
            <field>
2563 
              <name>BDRST</name>
2564 
              <description>Backup domain software
2565 
              reset</description>
2566 
              <bitOffset>16</bitOffset>
2567 
              <bitWidth>1</bitWidth>
2568 
              <access>read-write</access>
2569 
            </field>
2570 
          </fields>
2571 
        </register>
2572 
        <register>
2573 
          <name>CSR</name>
2574 
          <displayName>CSR</displayName>
2575 
          <description>Control/status register
2576 
          (RCC_CSR)</description>
2577 
          <addressOffset>0x24</addressOffset>
2578 
          <size>0x20</size>
2579 
          <resetValue>0x0C000000</resetValue>
2580 
          <fields>
2581 
            <field>
2582 
              <name>LSION</name>
2583 
              <description>Internal low speed oscillator
2584 
              enable</description>
2585 
              <bitOffset>0</bitOffset>
2586 
              <bitWidth>1</bitWidth>
2587 
              <access>read-write</access>
2588 
            </field>
2589 
            <field>
2590 
              <name>LSIRDY</name>
2591 
              <description>Internal low speed oscillator
2592 
              ready</description>
2593 
              <bitOffset>1</bitOffset>
2594 
              <bitWidth>1</bitWidth>
2595 
              <access>read-only</access>
2596 
            </field>
2597 
            <field>
2598 
              <name>RMVF</name>
2599 
              <description>Remove reset flag</description>
2600 
              <bitOffset>24</bitOffset>
2601 
              <bitWidth>1</bitWidth>
2602 
              <access>read-write</access>
2603 
            </field>
2604 
            <field>
2605 
              <name>PINRSTF</name>
2606 
              <description>PIN reset flag</description>
2607 
              <bitOffset>26</bitOffset>
2608 
              <bitWidth>1</bitWidth>
2609 
              <access>read-write</access>
2610 
            </field>
2611 
            <field>
2612 
              <name>PORRSTF</name>
2613 
              <description>POR/PDR reset flag</description>
2614 
              <bitOffset>27</bitOffset>
2615 
              <bitWidth>1</bitWidth>
2616 
              <access>read-write</access>
2617 
            </field>
2618 
            <field>
2619 
              <name>SFTRSTF</name>
2620 
              <description>Software reset flag</description>
2621 
              <bitOffset>28</bitOffset>
2622 
              <bitWidth>1</bitWidth>
2623 
              <access>read-write</access>
2624 
            </field>
2625 
            <field>
2626 
              <name>IWDGRSTF</name>
2627 
              <description>Independent watchdog reset
2628 
              flag</description>
2629 
              <bitOffset>29</bitOffset>
2630 
              <bitWidth>1</bitWidth>
2631 
              <access>read-write</access>
2632 
            </field>
2633 
            <field>
2634 
              <name>WWDGRSTF</name>
2635 
              <description>Window watchdog reset flag</description>
2636 
              <bitOffset>30</bitOffset>
2637 
              <bitWidth>1</bitWidth>
2638 
              <access>read-write</access>
2639 
            </field>
2640 
            <field>
2641 
              <name>LPWRRSTF</name>
2642 
              <description>Low-power reset flag</description>
2643 
              <bitOffset>31</bitOffset>
2644 
              <bitWidth>1</bitWidth>
2645 
              <access>read-write</access>
2646 
            </field>
2647 
          </fields>
2648 
        </register>
2649 
      </registers>
2650 
    </peripheral>
2651 
    <peripheral>
2652 
      <name>GPIOA</name>
2653 
      <description>General purpose I/O</description>
2654 
      <groupName>GPIO</groupName>
2655 
      <baseAddress>0x40010800</baseAddress>
2656 
      <addressBlock>
2657 
        <offset>0x0</offset>
2658 
        <size>0x400</size>
2659 
        <usage>registers</usage>
2660 
      </addressBlock>
2661 
      <registers>
2662 
        <register>
2663 
          <name>CRL</name>
2664 
          <displayName>CRL</displayName>
2665 
          <description>Port configuration register low
2666 
          (GPIOn_CRL)</description>
2667 
          <addressOffset>0x0</addressOffset>
2668 
          <size>0x20</size>
2669 
          <access>read-write</access>
2670 
          <resetValue>0x44444444</resetValue>
2671 
          <fields>
2672 
            <field>
2673 
              <name>MODE0</name>
2674 
              <description>Port n.0 mode bits</description>
2675 
              <bitOffset>0</bitOffset>
2676 
              <bitWidth>2</bitWidth>
2677 
            </field>
2678 
            <field>
2679 
              <name>CNF0</name>
2680 
              <description>Port n.0 configuration
2681 
              bits</description>
2682 
              <bitOffset>2</bitOffset>
2683 
              <bitWidth>2</bitWidth>
2684 
            </field>
2685 
            <field>
2686 
              <name>MODE1</name>
2687 
              <description>Port n.1 mode bits</description>
2688 
              <bitOffset>4</bitOffset>
2689 
              <bitWidth>2</bitWidth>
2690 
            </field>
2691 
            <field>
2692 
              <name>CNF1</name>
2693 
              <description>Port n.1 configuration
2694 
              bits</description>
2695 
              <bitOffset>6</bitOffset>
2696 
              <bitWidth>2</bitWidth>
2697 
            </field>
2698 
            <field>
2699 
              <name>MODE2</name>
2700 
              <description>Port n.2 mode bits</description>
2701 
              <bitOffset>8</bitOffset>
2702 
              <bitWidth>2</bitWidth>
2703 
            </field>
2704 
            <field>
2705 
              <name>CNF2</name>
2706 
              <description>Port n.2 configuration
2707 
              bits</description>
2708 
              <bitOffset>10</bitOffset>
2709 
              <bitWidth>2</bitWidth>
2710 
            </field>
2711 
            <field>
2712 
              <name>MODE3</name>
2713 
              <description>Port n.3 mode bits</description>
2714 
              <bitOffset>12</bitOffset>
2715 
              <bitWidth>2</bitWidth>
2716 
            </field>
2717 
            <field>
2718 
              <name>CNF3</name>
2719 
              <description>Port n.3 configuration
2720 
              bits</description>
2721 
              <bitOffset>14</bitOffset>
2722 
              <bitWidth>2</bitWidth>
2723 
            </field>
2724 
            <field>
2725 
              <name>MODE4</name>
2726 
              <description>Port n.4 mode bits</description>
2727 
              <bitOffset>16</bitOffset>
2728 
              <bitWidth>2</bitWidth>
2729 
            </field>
2730 
            <field>
2731 
              <name>CNF4</name>
2732 
              <description>Port n.4 configuration
2733 
              bits</description>
2734 
              <bitOffset>18</bitOffset>
2735 
              <bitWidth>2</bitWidth>
2736 
            </field>
2737 
            <field>
2738 
              <name>MODE5</name>
2739 
              <description>Port n.5 mode bits</description>
2740 
              <bitOffset>20</bitOffset>
2741 
              <bitWidth>2</bitWidth>
2742 
            </field>
2743 
            <field>
2744 
              <name>CNF5</name>
2745 
              <description>Port n.5 configuration
2746 
              bits</description>
2747 
              <bitOffset>22</bitOffset>
2748 
              <bitWidth>2</bitWidth>
2749 
            </field>
2750 
            <field>
2751 
              <name>MODE6</name>
2752 
              <description>Port n.6 mode bits</description>
2753 
              <bitOffset>24</bitOffset>
2754 
              <bitWidth>2</bitWidth>
2755 
            </field>
2756 
            <field>
2757 
              <name>CNF6</name>
2758 
              <description>Port n.6 configuration
2759 
              bits</description>
2760 
              <bitOffset>26</bitOffset>
2761 
              <bitWidth>2</bitWidth>
2762 
            </field>
2763 
            <field>
2764 
              <name>MODE7</name>
2765 
              <description>Port n.7 mode bits</description>
2766 
              <bitOffset>28</bitOffset>
2767 
              <bitWidth>2</bitWidth>
2768 
            </field>
2769 
            <field>
2770 
              <name>CNF7</name>
2771 
              <description>Port n.7 configuration
2772 
              bits</description>
2773 
              <bitOffset>30</bitOffset>
2774 
              <bitWidth>2</bitWidth>
2775 
            </field>
2776 
          </fields>
2777 
        </register>
2778 
        <register>
2779 
          <name>CRH</name>
2780 
          <displayName>CRH</displayName>
2781 
          <description>Port configuration register high
2782 
          (GPIOn_CRL)</description>
2783 
          <addressOffset>0x4</addressOffset>
2784 
          <size>0x20</size>
2785 
          <access>read-write</access>
2786 
          <resetValue>0x44444444</resetValue>
2787 
          <fields>
2788 
            <field>
2789 
              <name>MODE8</name>
2790 
              <description>Port n.8 mode bits</description>
2791 
              <bitOffset>0</bitOffset>
2792 
              <bitWidth>2</bitWidth>
2793 
            </field>
2794 
            <field>
2795 
              <name>CNF8</name>
2796 
              <description>Port n.8 configuration
2797 
              bits</description>
2798 
              <bitOffset>2</bitOffset>
2799 
              <bitWidth>2</bitWidth>
2800 
            </field>
2801 
            <field>
2802 
              <name>MODE9</name>
2803 
              <description>Port n.9 mode bits</description>
2804 
              <bitOffset>4</bitOffset>
2805 
              <bitWidth>2</bitWidth>
2806 
            </field>
2807 
            <field>
2808 
              <name>CNF9</name>
2809 
              <description>Port n.9 configuration
2810 
              bits</description>
2811 
              <bitOffset>6</bitOffset>
2812 
              <bitWidth>2</bitWidth>
2813 
            </field>
2814 
            <field>
2815 
              <name>MODE10</name>
2816 
              <description>Port n.10 mode bits</description>
2817 
              <bitOffset>8</bitOffset>
2818 
              <bitWidth>2</bitWidth>
2819 
            </field>
2820 
            <field>
2821 
              <name>CNF10</name>
2822 
              <description>Port n.10 configuration
2823 
              bits</description>
2824 
              <bitOffset>10</bitOffset>
2825 
              <bitWidth>2</bitWidth>
2826 
            </field>
2827 
            <field>
2828 
              <name>MODE11</name>
2829 
              <description>Port n.11 mode bits</description>
2830 
              <bitOffset>12</bitOffset>
2831 
              <bitWidth>2</bitWidth>
2832 
            </field>
2833 
            <field>
2834 
              <name>CNF11</name>
2835 
              <description>Port n.11 configuration
2836 
              bits</description>
2837 
              <bitOffset>14</bitOffset>
2838 
              <bitWidth>2</bitWidth>
2839 
            </field>
2840 
            <field>
2841 
              <name>MODE12</name>
2842 
              <description>Port n.12 mode bits</description>
2843 
              <bitOffset>16</bitOffset>
2844 
              <bitWidth>2</bitWidth>
2845 
            </field>
2846 
            <field>
2847 
              <name>CNF12</name>
2848 
              <description>Port n.12 configuration
2849 
              bits</description>
2850 
              <bitOffset>18</bitOffset>
2851 
              <bitWidth>2</bitWidth>
2852 
            </field>
2853 
            <field>
2854 
              <name>MODE13</name>
2855 
              <description>Port n.13 mode bits</description>
2856 
              <bitOffset>20</bitOffset>
2857 
              <bitWidth>2</bitWidth>
2858 
            </field>
2859 
            <field>
2860 
              <name>CNF13</name>
2861 
              <description>Port n.13 configuration
2862 
              bits</description>
2863 
              <bitOffset>22</bitOffset>
2864 
              <bitWidth>2</bitWidth>
2865 
            </field>
2866 
            <field>
2867 
              <name>MODE14</name>
2868 
              <description>Port n.14 mode bits</description>
2869 
              <bitOffset>24</bitOffset>
2870 
              <bitWidth>2</bitWidth>
2871 
            </field>
2872 
            <field>
2873 
              <name>CNF14</name>
2874 
              <description>Port n.14 configuration
2875 
              bits</description>
2876 
              <bitOffset>26</bitOffset>
2877 
              <bitWidth>2</bitWidth>
2878 
            </field>
2879 
            <field>
2880 
              <name>MODE15</name>
2881 
              <description>Port n.15 mode bits</description>
2882 
              <bitOffset>28</bitOffset>
2883 
              <bitWidth>2</bitWidth>
2884 
            </field>
2885 
            <field>
2886 
              <name>CNF15</name>
2887 
              <description>Port n.15 configuration
2888 
              bits</description>
2889 
              <bitOffset>30</bitOffset>
2890 
              <bitWidth>2</bitWidth>
2891 
            </field>
2892 
          </fields>
2893 
        </register>
2894 
        <register>
2895 
          <name>IDR</name>
2896 
          <displayName>IDR</displayName>
2897 
          <description>Port input data register
2898 
          (GPIOn_IDR)</description>
2899 
          <addressOffset>0x8</addressOffset>
2900 
          <size>0x20</size>
2901 
          <access>read-only</access>
2902 
          <resetValue>0x00000000</resetValue>
2903 
          <fields>
2904 
            <field>
2905 
              <name>IDR0</name>
2906 
              <description>Port input data</description>
2907 
              <bitOffset>0</bitOffset>
2908 
              <bitWidth>1</bitWidth>
2909 
            </field>
2910 
            <field>
2911 
              <name>IDR1</name>
2912 
              <description>Port input data</description>
2913 
              <bitOffset>1</bitOffset>
2914 
              <bitWidth>1</bitWidth>
2915 
            </field>
2916 
            <field>
2917 
              <name>IDR2</name>
2918 
              <description>Port input data</description>
2919 
              <bitOffset>2</bitOffset>
2920 
              <bitWidth>1</bitWidth>
2921 
            </field>
2922 
            <field>
2923 
              <name>IDR3</name>
2924 
              <description>Port input data</description>
2925 
              <bitOffset>3</bitOffset>
2926 
              <bitWidth>1</bitWidth>
2927 
            </field>
2928 
            <field>
2929 
              <name>IDR4</name>
2930 
              <description>Port input data</description>
2931 
              <bitOffset>4</bitOffset>
2932 
              <bitWidth>1</bitWidth>
2933 
            </field>
2934 
            <field>
2935 
              <name>IDR5</name>
2936 
              <description>Port input data</description>
2937 
              <bitOffset>5</bitOffset>
2938 
              <bitWidth>1</bitWidth>
2939 
            </field>
2940 
            <field>
2941 
              <name>IDR6</name>
2942 
              <description>Port input data</description>
2943 
              <bitOffset>6</bitOffset>
2944 
              <bitWidth>1</bitWidth>
2945 
            </field>
2946 
            <field>
2947 
              <name>IDR7</name>
2948 
              <description>Port input data</description>
2949 
              <bitOffset>7</bitOffset>
2950 
              <bitWidth>1</bitWidth>
2951 
            </field>
2952 
            <field>
2953 
              <name>IDR8</name>
2954 
              <description>Port input data</description>
2955 
              <bitOffset>8</bitOffset>
2956 
              <bitWidth>1</bitWidth>
2957 
            </field>
2958 
            <field>
2959 
              <name>IDR9</name>
2960 
              <description>Port input data</description>
2961 
              <bitOffset>9</bitOffset>
2962 
              <bitWidth>1</bitWidth>
2963 
            </field>
2964 
            <field>
2965 
              <name>IDR10</name>
2966 
              <description>Port input data</description>
2967 
              <bitOffset>10</bitOffset>
2968 
              <bitWidth>1</bitWidth>
2969 
            </field>
2970 
            <field>
2971 
              <name>IDR11</name>
2972 
              <description>Port input data</description>
2973 
              <bitOffset>11</bitOffset>
2974 
              <bitWidth>1</bitWidth>
2975 
            </field>
2976 
            <field>
2977 
              <name>IDR12</name>
2978 
              <description>Port input data</description>
2979 
              <bitOffset>12</bitOffset>
2980 
              <bitWidth>1</bitWidth>
2981 
            </field>
2982 
            <field>
2983 
              <name>IDR13</name>
2984 
              <description>Port input data</description>
2985 
              <bitOffset>13</bitOffset>
2986 
              <bitWidth>1</bitWidth>
2987 
            </field>
2988 
            <field>
2989 
              <name>IDR14</name>
2990 
              <description>Port input data</description>
2991 
              <bitOffset>14</bitOffset>
2992 
              <bitWidth>1</bitWidth>
2993 
            </field>
2994 
            <field>
2995 
              <name>IDR15</name>
2996 
              <description>Port input data</description>
2997 
              <bitOffset>15</bitOffset>
2998 
              <bitWidth>1</bitWidth>
2999 
            </field>
3000 
          </fields>
3001 
        </register>
3002 
        <register>
3003 
          <name>ODR</name>
3004 
          <displayName>ODR</displayName>
3005 
          <description>Port output data register
3006 
          (GPIOn_ODR)</description>
3007 
          <addressOffset>0xC</addressOffset>
3008 
          <size>0x20</size>
3009 
          <access>read-write</access>
3010 
          <resetValue>0x00000000</resetValue>
3011 
          <fields>
3012 
            <field>
3013 
              <name>ODR0</name>
3014 
              <description>Port output data</description>
3015 
              <bitOffset>0</bitOffset>
3016 
              <bitWidth>1</bitWidth>
3017 
            </field>
3018 
            <field>
3019 
              <name>ODR1</name>
3020 
              <description>Port output data</description>
3021 
              <bitOffset>1</bitOffset>
3022 
              <bitWidth>1</bitWidth>
3023 
            </field>
3024 
            <field>
3025 
              <name>ODR2</name>
3026 
              <description>Port output data</description>
3027 
              <bitOffset>2</bitOffset>
3028 
              <bitWidth>1</bitWidth>
3029 
            </field>
3030 
            <field>
3031 
              <name>ODR3</name>
3032 
              <description>Port output data</description>
3033 
              <bitOffset>3</bitOffset>
3034 
              <bitWidth>1</bitWidth>
3035 
            </field>
3036 
            <field>
3037 
              <name>ODR4</name>
3038 
              <description>Port output data</description>
3039 
              <bitOffset>4</bitOffset>
3040 
              <bitWidth>1</bitWidth>
3041 
            </field>
3042 
            <field>
3043 
              <name>ODR5</name>
3044 
              <description>Port output data</description>
3045 
              <bitOffset>5</bitOffset>
3046 
              <bitWidth>1</bitWidth>
3047 
            </field>
3048 
            <field>
3049 
              <name>ODR6</name>
3050 
              <description>Port output data</description>
3051 
              <bitOffset>6</bitOffset>
3052 
              <bitWidth>1</bitWidth>
3053 
            </field>
3054 
            <field>
3055 
              <name>ODR7</name>
3056 
              <description>Port output data</description>
3057 
              <bitOffset>7</bitOffset>
3058 
              <bitWidth>1</bitWidth>
3059 
            </field>
3060 
            <field>
3061 
              <name>ODR8</name>
3062 
              <description>Port output data</description>
3063 
              <bitOffset>8</bitOffset>
3064 
              <bitWidth>1</bitWidth>
3065 
            </field>
3066 
            <field>
3067 
              <name>ODR9</name>
3068 
              <description>Port output data</description>
3069 
              <bitOffset>9</bitOffset>
3070 
              <bitWidth>1</bitWidth>
3071 
            </field>
3072 
            <field>
3073 
              <name>ODR10</name>
3074 
              <description>Port output data</description>
3075 
              <bitOffset>10</bitOffset>
3076 
              <bitWidth>1</bitWidth>
3077 
            </field>
3078 
            <field>
3079 
              <name>ODR11</name>
3080 
              <description>Port output data</description>
3081 
              <bitOffset>11</bitOffset>
3082 
              <bitWidth>1</bitWidth>
3083 
            </field>
3084 
            <field>
3085 
              <name>ODR12</name>
3086 
              <description>Port output data</description>
3087 
              <bitOffset>12</bitOffset>
3088 
              <bitWidth>1</bitWidth>
3089 
            </field>
3090 
            <field>
3091 
              <name>ODR13</name>
3092 
              <description>Port output data</description>
3093 
              <bitOffset>13</bitOffset>
3094 
              <bitWidth>1</bitWidth>
3095 
            </field>
3096 
            <field>
3097 
              <name>ODR14</name>
3098 
              <description>Port output data</description>
3099 
              <bitOffset>14</bitOffset>
3100 
              <bitWidth>1</bitWidth>
3101 
            </field>
3102 
            <field>
3103 
              <name>ODR15</name>
3104 
              <description>Port output data</description>
3105 
              <bitOffset>15</bitOffset>
3106 
              <bitWidth>1</bitWidth>
3107 
            </field>
3108 
          </fields>
3109 
        </register>
3110 
        <register>
3111 
          <name>BSRR</name>
3112 
          <displayName>BSRR</displayName>
3113 
          <description>Port bit set/reset register
3114 
          (GPIOn_BSRR)</description>
3115 
          <addressOffset>0x10</addressOffset>
3116 
          <size>0x20</size>
3117 
          <access>write-only</access>
3118 
          <resetValue>0x00000000</resetValue>
3119 
          <fields>
3120 
            <field>
3121 
              <name>BS0</name>
3122 
              <description>Set bit 0</description>
3123 
              <bitOffset>0</bitOffset>
3124 
              <bitWidth>1</bitWidth>
3125 
            </field>
3126 
            <field>
3127 
              <name>BS1</name>
3128 
              <description>Set bit 1</description>
3129 
              <bitOffset>1</bitOffset>
3130 
              <bitWidth>1</bitWidth>
3131 
            </field>
3132 
            <field>
3133 
              <name>BS2</name>
3134 
              <description>Set bit 1</description>
3135 
              <bitOffset>2</bitOffset>
3136 
              <bitWidth>1</bitWidth>
3137 
            </field>
3138 
            <field>
3139 
              <name>BS3</name>
3140 
              <description>Set bit 3</description>
3141 
              <bitOffset>3</bitOffset>
3142 
              <bitWidth>1</bitWidth>
3143 
            </field>
3144 
            <field>
3145 
              <name>BS4</name>
3146 
              <description>Set bit 4</description>
3147 
              <bitOffset>4</bitOffset>
3148 
              <bitWidth>1</bitWidth>
3149 
            </field>
3150 
            <field>
3151 
              <name>BS5</name>
3152 
              <description>Set bit 5</description>
3153 
              <bitOffset>5</bitOffset>
3154 
              <bitWidth>1</bitWidth>
3155 
            </field>
3156 
            <field>
3157 
              <name>BS6</name>
3158 
              <description>Set bit 6</description>
3159 
              <bitOffset>6</bitOffset>
3160 
              <bitWidth>1</bitWidth>
3161 
            </field>
3162 
            <field>
3163 
              <name>BS7</name>
3164 
              <description>Set bit 7</description>
3165 
              <bitOffset>7</bitOffset>
3166 
              <bitWidth>1</bitWidth>
3167 
            </field>
3168 
            <field>
3169 
              <name>BS8</name>
3170 
              <description>Set bit 8</description>
3171 
              <bitOffset>8</bitOffset>
3172 
              <bitWidth>1</bitWidth>
3173 
            </field>
3174 
            <field>
3175 
              <name>BS9</name>
3176 
              <description>Set bit 9</description>
3177 
              <bitOffset>9</bitOffset>
3178 
              <bitWidth>1</bitWidth>
3179 
            </field>
3180 
            <field>
3181 
              <name>BS10</name>
3182 
              <description>Set bit 10</description>
3183 
              <bitOffset>10</bitOffset>
3184 
              <bitWidth>1</bitWidth>
3185 
            </field>
3186 
            <field>
3187 
              <name>BS11</name>
3188 
              <description>Set bit 11</description>
3189 
              <bitOffset>11</bitOffset>
3190 
              <bitWidth>1</bitWidth>
3191 
            </field>
3192 
            <field>
3193 
              <name>BS12</name>
3194 
              <description>Set bit 12</description>
3195 
              <bitOffset>12</bitOffset>
3196 
              <bitWidth>1</bitWidth>
3197 
            </field>
3198 
            <field>
3199 
              <name>BS13</name>
3200 
              <description>Set bit 13</description>
3201 
              <bitOffset>13</bitOffset>
3202 
              <bitWidth>1</bitWidth>
3203 
            </field>
3204 
            <field>
3205 
              <name>BS14</name>
3206 
              <description>Set bit 14</description>
3207 
              <bitOffset>14</bitOffset>
3208 
              <bitWidth>1</bitWidth>
3209 
            </field>
3210 
            <field>
3211 
              <name>BS15</name>
3212 
              <description>Set bit 15</description>
3213 
              <bitOffset>15</bitOffset>
3214 
              <bitWidth>1</bitWidth>
3215 
            </field>
3216 
            <field>
3217 
              <name>BR0</name>
3218 
              <description>Reset bit 0</description>
3219 
              <bitOffset>16</bitOffset>
3220 
              <bitWidth>1</bitWidth>
3221 
            </field>
3222 
            <field>
3223 
              <name>BR1</name>
3224 
              <description>Reset bit 1</description>
3225 
              <bitOffset>17</bitOffset>
3226 
              <bitWidth>1</bitWidth>
3227 
            </field>
3228 
            <field>
3229 
              <name>BR2</name>
3230 
              <description>Reset bit 2</description>
3231 
              <bitOffset>18</bitOffset>
3232 
              <bitWidth>1</bitWidth>
3233 
            </field>
3234 
            <field>
3235 
              <name>BR3</name>
3236 
              <description>Reset bit 3</description>
3237 
              <bitOffset>19</bitOffset>
3238 
              <bitWidth>1</bitWidth>
3239 
            </field>
3240 
            <field>
3241 
              <name>BR4</name>
3242 
              <description>Reset bit 4</description>
3243 
              <bitOffset>20</bitOffset>
3244 
              <bitWidth>1</bitWidth>
3245 
            </field>
3246 
            <field>
3247 
              <name>BR5</name>
3248 
              <description>Reset bit 5</description>
3249 
              <bitOffset>21</bitOffset>
3250 
              <bitWidth>1</bitWidth>
3251 
            </field>
3252 
            <field>
3253 
              <name>BR6</name>
3254 
              <description>Reset bit 6</description>
3255 
              <bitOffset>22</bitOffset>
3256 
              <bitWidth>1</bitWidth>
3257 
            </field>
3258 
            <field>
3259 
              <name>BR7</name>
3260 
              <description>Reset bit 7</description>
3261 
              <bitOffset>23</bitOffset>
3262 
              <bitWidth>1</bitWidth>
3263 
            </field>
3264 
            <field>
3265 
              <name>BR8</name>
3266 
              <description>Reset bit 8</description>
3267 
              <bitOffset>24</bitOffset>
3268 
              <bitWidth>1</bitWidth>
3269 
            </field>
3270 
            <field>
3271 
              <name>BR9</name>
3272 
              <description>Reset bit 9</description>
3273 
              <bitOffset>25</bitOffset>
3274 
              <bitWidth>1</bitWidth>
3275 
            </field>
3276 
            <field>
3277 
              <name>BR10</name>
3278 
              <description>Reset bit 10</description>
3279 
              <bitOffset>26</bitOffset>
3280 
              <bitWidth>1</bitWidth>
3281 
            </field>
3282 
            <field>
3283 
              <name>BR11</name>
3284 
              <description>Reset bit 11</description>
3285 
              <bitOffset>27</bitOffset>
3286 
              <bitWidth>1</bitWidth>
3287 
            </field>
3288 
            <field>
3289 
              <name>BR12</name>
3290 
              <description>Reset bit 12</description>
3291 
              <bitOffset>28</bitOffset>
3292 
              <bitWidth>1</bitWidth>
3293 
            </field>
3294 
            <field>
3295 
              <name>BR13</name>
3296 
              <description>Reset bit 13</description>
3297 
              <bitOffset>29</bitOffset>
3298 
              <bitWidth>1</bitWidth>
3299 
            </field>
3300 
            <field>
3301 
              <name>BR14</name>
3302 
              <description>Reset bit 14</description>
3303 
              <bitOffset>30</bitOffset>
3304 
              <bitWidth>1</bitWidth>
3305 
            </field>
3306 
            <field>
3307 
              <name>BR15</name>
3308 
              <description>Reset bit 15</description>
3309 
              <bitOffset>31</bitOffset>
3310 
              <bitWidth>1</bitWidth>
3311 
            </field>
3312 
          </fields>
3313 
        </register>
3314 
        <register>
3315 
          <name>BRR</name>
3316 
          <displayName>BRR</displayName>
3317 
          <description>Port bit reset register
3318 
          (GPIOn_BRR)</description>
3319 
          <addressOffset>0x14</addressOffset>
3320 
          <size>0x20</size>
3321 
          <access>write-only</access>
3322 
          <resetValue>0x00000000</resetValue>
3323 
          <fields>
3324 
            <field>
3325 
              <name>BR0</name>
3326 
              <description>Reset bit 0</description>
3327 
              <bitOffset>0</bitOffset>
3328 
              <bitWidth>1</bitWidth>
3329 
            </field>
3330 
            <field>
3331 
              <name>BR1</name>
3332 
              <description>Reset bit 1</description>
3333 
              <bitOffset>1</bitOffset>
3334 
              <bitWidth>1</bitWidth>
3335 
            </field>
3336 
            <field>
3337 
              <name>BR2</name>
3338 
              <description>Reset bit 1</description>
3339 
              <bitOffset>2</bitOffset>
3340 
              <bitWidth>1</bitWidth>
3341 
            </field>
3342 
            <field>
3343 
              <name>BR3</name>
3344 
              <description>Reset bit 3</description>
3345 
              <bitOffset>3</bitOffset>
3346 
              <bitWidth>1</bitWidth>
3347 
            </field>
3348 
            <field>
3349 
              <name>BR4</name>
3350 
              <description>Reset bit 4</description>
3351 
              <bitOffset>4</bitOffset>
3352 
              <bitWidth>1</bitWidth>
3353 
            </field>
3354 
            <field>
3355 
              <name>BR5</name>
3356 
              <description>Reset bit 5</description>
3357 
              <bitOffset>5</bitOffset>
3358 
              <bitWidth>1</bitWidth>
3359 
            </field>
3360 
            <field>
3361 
              <name>BR6</name>
3362 
              <description>Reset bit 6</description>
3363 
              <bitOffset>6</bitOffset>
3364 
              <bitWidth>1</bitWidth>
3365 
            </field>
3366 
            <field>
3367 
              <name>BR7</name>
3368 
              <description>Reset bit 7</description>
3369 
              <bitOffset>7</bitOffset>
3370 
              <bitWidth>1</bitWidth>
3371 
            </field>
3372 
            <field>
3373 
              <name>BR8</name>
3374 
              <description>Reset bit 8</description>
3375 
              <bitOffset>8</bitOffset>
3376 
              <bitWidth>1</bitWidth>
3377 
            </field>
3378 
            <field>
3379 
              <name>BR9</name>
3380 
              <description>Reset bit 9</description>
3381 
              <bitOffset>9</bitOffset>
3382 
              <bitWidth>1</bitWidth>
3383 
            </field>
3384 
            <field>
3385 
              <name>BR10</name>
3386 
              <description>Reset bit 10</description>
3387 
              <bitOffset>10</bitOffset>
3388 
              <bitWidth>1</bitWidth>
3389 
            </field>
3390 
            <field>
3391 
              <name>BR11</name>
3392 
              <description>Reset bit 11</description>
3393 
              <bitOffset>11</bitOffset>
3394 
              <bitWidth>1</bitWidth>
3395 
            </field>
3396 
            <field>
3397 
              <name>BR12</name>
3398 
              <description>Reset bit 12</description>
3399 
              <bitOffset>12</bitOffset>
3400 
              <bitWidth>1</bitWidth>
3401 
            </field>
3402 
            <field>
3403 
              <name>BR13</name>
3404 
              <description>Reset bit 13</description>
3405 
              <bitOffset>13</bitOffset>
3406 
              <bitWidth>1</bitWidth>
3407 
            </field>
3408 
            <field>
3409 
              <name>BR14</name>
3410 
              <description>Reset bit 14</description>
3411 
              <bitOffset>14</bitOffset>
3412 
              <bitWidth>1</bitWidth>
3413 
            </field>
3414 
            <field>
3415 
              <name>BR15</name>
3416 
              <description>Reset bit 15</description>
3417 
              <bitOffset>15</bitOffset>
3418 
              <bitWidth>1</bitWidth>
3419 
            </field>
3420 
          </fields>
3421 
        </register>
3422 
        <register>
3423 
          <name>LCKR</name>
3424 
          <displayName>LCKR</displayName>
3425 
          <description>Port configuration lock
3426 
          register</description>
3427 
          <addressOffset>0x18</addressOffset>
3428 
          <size>0x20</size>
3429 
          <access>read-write</access>
3430 
          <resetValue>0x00000000</resetValue>
3431 
          <fields>
3432 
            <field>
3433 
              <name>LCK0</name>
3434 
              <description>Port A Lock bit 0</description>
3435 
              <bitOffset>0</bitOffset>
3436 
              <bitWidth>1</bitWidth>
3437 
            </field>
3438 
            <field>
3439 
              <name>LCK1</name>
3440 
              <description>Port A Lock bit 1</description>
3441 
              <bitOffset>1</bitOffset>
3442 
              <bitWidth>1</bitWidth>
3443 
            </field>
3444 
            <field>
3445 
              <name>LCK2</name>
3446 
              <description>Port A Lock bit 2</description>
3447 
              <bitOffset>2</bitOffset>
3448 
              <bitWidth>1</bitWidth>
3449 
            </field>
3450 
            <field>
3451 
              <name>LCK3</name>
3452 
              <description>Port A Lock bit 3</description>
3453 
              <bitOffset>3</bitOffset>
3454 
              <bitWidth>1</bitWidth>
3455 
            </field>
3456 
            <field>
3457 
              <name>LCK4</name>
3458 
              <description>Port A Lock bit 4</description>
3459 
              <bitOffset>4</bitOffset>
3460 
              <bitWidth>1</bitWidth>
3461 
            </field>
3462 
            <field>
3463 
              <name>LCK5</name>
3464 
              <description>Port A Lock bit 5</description>
3465 
              <bitOffset>5</bitOffset>
3466 
              <bitWidth>1</bitWidth>
3467 
            </field>
3468 
            <field>
3469 
              <name>LCK6</name>
3470 
              <description>Port A Lock bit 6</description>
3471 
              <bitOffset>6</bitOffset>
3472 
              <bitWidth>1</bitWidth>
3473 
            </field>
3474 
            <field>
3475 
              <name>LCK7</name>
3476 
              <description>Port A Lock bit 7</description>
3477 
              <bitOffset>7</bitOffset>
3478 
              <bitWidth>1</bitWidth>
3479 
            </field>
3480 
            <field>
3481 
              <name>LCK8</name>
3482 
              <description>Port A Lock bit 8</description>
3483 
              <bitOffset>8</bitOffset>
3484 
              <bitWidth>1</bitWidth>
3485 
            </field>
3486 
            <field>
3487 
              <name>LCK9</name>
3488 
              <description>Port A Lock bit 9</description>
3489 
              <bitOffset>9</bitOffset>
3490 
              <bitWidth>1</bitWidth>
3491 
            </field>
3492 
            <field>
3493 
              <name>LCK10</name>
3494 
              <description>Port A Lock bit 10</description>
3495 
              <bitOffset>10</bitOffset>
3496 
              <bitWidth>1</bitWidth>
3497 
            </field>
3498 
            <field>
3499 
              <name>LCK11</name>
3500 
              <description>Port A Lock bit 11</description>
3501 
              <bitOffset>11</bitOffset>
3502 
              <bitWidth>1</bitWidth>
3503 
            </field>
3504 
            <field>
3505 
              <name>LCK12</name>
3506 
              <description>Port A Lock bit 12</description>
3507 
              <bitOffset>12</bitOffset>
3508 
              <bitWidth>1</bitWidth>
3509 
            </field>
3510 
            <field>
3511 
              <name>LCK13</name>
3512 
              <description>Port A Lock bit 13</description>
3513 
              <bitOffset>13</bitOffset>
3514 
              <bitWidth>1</bitWidth>
3515 
            </field>
3516 
            <field>
3517 
              <name>LCK14</name>
3518 
              <description>Port A Lock bit 14</description>
3519 
              <bitOffset>14</bitOffset>
3520 
              <bitWidth>1</bitWidth>
3521 
            </field>
3522 
            <field>
3523 
              <name>LCK15</name>
3524 
              <description>Port A Lock bit 15</description>
3525 
              <bitOffset>15</bitOffset>
3526 
              <bitWidth>1</bitWidth>
3527 
            </field>
3528 
            <field>
3529 
              <name>LCKK</name>
3530 
              <description>Lock key</description>
3531 
              <bitOffset>16</bitOffset>
3532 
              <bitWidth>1</bitWidth>
3533 
            </field>
3534 
          </fields>
3535 
        </register>
3536 
      </registers>
3537 
    </peripheral>
3538 
    <peripheral derivedFrom="GPIOA">
3539 
      <name>GPIOB</name>
3540 
      <baseAddress>0x40010C00</baseAddress>
3541 
    </peripheral>
3542 
    <peripheral derivedFrom="GPIOA">
3543 
      <name>GPIOC</name>
3544 
      <baseAddress>0x40011000</baseAddress>
3545 
    </peripheral>
3546 
    <peripheral derivedFrom="GPIOA">
3547 
      <name>GPIOD</name>
3548 
      <baseAddress>0x40011400</baseAddress>
3549 
    </peripheral>
3550 
    <peripheral derivedFrom="GPIOA">
3551 
      <name>GPIOE</name>
3552 
      <baseAddress>0x40011800</baseAddress>
3553 
    </peripheral>
3554 
    <peripheral derivedFrom="GPIOA">
3555 
      <name>GPIOF</name>
3556 
      <baseAddress>0x40011C00</baseAddress>
3557 
    </peripheral>
3558 
    <peripheral derivedFrom="GPIOA">
3559 
      <name>GPIOG</name>
3560 
      <baseAddress>0x40012000</baseAddress>
3561 
    </peripheral>
3562 
    <peripheral>
3563 
      <name>AFIO</name>
3564 
      <description>Alternate function I/O</description>
3565 
      <groupName>AFIO</groupName>
3566 
      <baseAddress>0x40010000</baseAddress>
3567 
      <addressBlock>
3568 
        <offset>0x0</offset>
3569 
        <size>0x400</size>
3570 
        <usage>registers</usage>
3571 
      </addressBlock>
3572 
      <registers>
3573 
        <register>
3574 
          <name>EVCR</name>
3575 
          <displayName>EVCR</displayName>
3576 
          <description>Event Control Register
3577 
          (AFIO_EVCR)</description>
3578 
          <addressOffset>0x0</addressOffset>
3579 
          <size>0x20</size>
3580 
          <access>read-write</access>
3581 
          <resetValue>0x00000000</resetValue>
3582 
          <fields>
3583 
            <field>
3584 
              <name>PIN</name>
3585 
              <description>Pin selection</description>
3586 
              <bitOffset>0</bitOffset>
3587 
              <bitWidth>4</bitWidth>
3588 
            </field>
3589 
            <field>
3590 
              <name>PORT</name>
3591 
              <description>Port selection</description>
3592 
              <bitOffset>4</bitOffset>
3593 
              <bitWidth>3</bitWidth>
3594 
            </field>
3595 
            <field>
3596 
              <name>EVOE</name>
3597 
              <description>Event Output Enable</description>
3598 
              <bitOffset>7</bitOffset>
3599 
              <bitWidth>1</bitWidth>
3600 
            </field>
3601 
          </fields>
3602 
        </register>
3603 
        <register>
3604 
          <name>MAPR</name>
3605 
          <displayName>MAPR</displayName>
3606 
          <description>AF remap and debug I/O configuration
3607 
          register (AFIO_MAPR)</description>
3608 
          <addressOffset>0x4</addressOffset>
3609 
          <size>0x20</size>
3610 
          <resetValue>0x00000000</resetValue>
3611 
          <fields>
3612 
            <field>
3613 
              <name>SPI1_REMAP</name>
3614 
              <description>SPI1 remapping</description>
3615 
              <bitOffset>0</bitOffset>
3616 
              <bitWidth>1</bitWidth>
3617 
              <access>read-write</access>
3618 
            </field>
3619 
            <field>
3620 
              <name>I2C1_REMAP</name>
3621 
              <description>I2C1 remapping</description>
3622 
              <bitOffset>1</bitOffset>
3623 
              <bitWidth>1</bitWidth>
3624 
              <access>read-write</access>
3625 
            </field>
3626 
            <field>
3627 
              <name>USART1_REMAP</name>
3628 
              <description>USART1 remapping</description>
3629 
              <bitOffset>2</bitOffset>
3630 
              <bitWidth>1</bitWidth>
3631 
              <access>read-write</access>
3632 
            </field>
3633 
            <field>
3634 
              <name>USART2_REMAP</name>
3635 
              <description>USART2 remapping</description>
3636 
              <bitOffset>3</bitOffset>
3637 
              <bitWidth>1</bitWidth>
3638 
              <access>read-write</access>
3639 
            </field>
3640 
            <field>
3641 
              <name>USART3_REMAP</name>
3642 
              <description>USART3 remapping</description>
3643 
              <bitOffset>4</bitOffset>
3644 
              <bitWidth>2</bitWidth>
3645 
              <access>read-write</access>
3646 
            </field>
3647 
            <field>
3648 
              <name>TIM1_REMAP</name>
3649 
              <description>TIM1 remapping</description>
3650 
              <bitOffset>6</bitOffset>
3651 
              <bitWidth>2</bitWidth>
3652 
              <access>read-write</access>
3653 
            </field>
3654 
            <field>
3655 
              <name>TIM2_REMAP</name>
3656 
              <description>TIM2 remapping</description>
3657 
              <bitOffset>8</bitOffset>
3658 
              <bitWidth>2</bitWidth>
3659 
              <access>read-write</access>
3660 
            </field>
3661 
            <field>
3662 
              <name>TIM3_REMAP</name>
3663 
              <description>TIM3 remapping</description>
3664 
              <bitOffset>10</bitOffset>
3665 
              <bitWidth>2</bitWidth>
3666 
              <access>read-write</access>
3667 
            </field>
3668 
            <field>
3669 
              <name>TIM4_REMAP</name>
3670 
              <description>TIM4 remapping</description>
3671 
              <bitOffset>12</bitOffset>
3672 
              <bitWidth>1</bitWidth>
3673 
              <access>read-write</access>
3674 
            </field>
3675 
            <field>
3676 
              <name>CAN_REMAP</name>
3677 
              <description>CAN1 remapping</description>
3678 
              <bitOffset>13</bitOffset>
3679 
              <bitWidth>2</bitWidth>
3680 
              <access>read-write</access>
3681 
            </field>
3682 
            <field>
3683 
              <name>PD01_REMAP</name>
3684 
              <description>Port D0/Port D1 mapping on
3685 
              OSCIN/OSCOUT</description>
3686 
              <bitOffset>15</bitOffset>
3687 
              <bitWidth>1</bitWidth>
3688 
              <access>read-write</access>
3689 
            </field>
3690 
            <field>
3691 
              <name>TIM5CH4_IREMAP</name>
3692 
              <description>Set and cleared by
3693 
              software</description>
3694 
              <bitOffset>16</bitOffset>
3695 
              <bitWidth>1</bitWidth>
3696 
              <access>read-write</access>
3697 
            </field>
3698 
            <field>
3699 
              <name>ADC1_ETRGINJ_REMAP</name>
3700 
              <description>ADC 1 External trigger injected
3701 
              conversion remapping</description>
3702 
              <bitOffset>17</bitOffset>
3703 
              <bitWidth>1</bitWidth>
3704 
              <access>read-write</access>
3705 
            </field>
3706 
            <field>
3707 
              <name>ADC1_ETRGREG_REMAP</name>
3708 
              <description>ADC 1 external trigger regular
3709 
              conversion remapping</description>
3710 
              <bitOffset>18</bitOffset>
3711 
              <bitWidth>1</bitWidth>
3712 
              <access>read-write</access>
3713 
            </field>
3714 
            <field>
3715 
              <name>ADC2_ETRGINJ_REMAP</name>
3716 
              <description>ADC 2 external trigger injected
3717 
              conversion remapping</description>
3718 
              <bitOffset>19</bitOffset>
3719 
              <bitWidth>1</bitWidth>
3720 
              <access>read-write</access>
3721 
            </field>
3722 
            <field>
3723 
              <name>ADC2_ETRGREG_REMAP</name>
3724 
              <description>ADC 2 external trigger regular
3725 
              conversion remapping</description>
3726 
              <bitOffset>20</bitOffset>
3727 
              <bitWidth>1</bitWidth>
3728 
              <access>read-write</access>
3729 
            </field>
3730 
            <field>
3731 
              <name>SWJ_CFG</name>
3732 
              <description>Serial wire JTAG
3733 
              configuration</description>
3734 
              <bitOffset>24</bitOffset>
3735 
              <bitWidth>3</bitWidth>
3736 
              <access>write-only</access>
3737 
            </field>
3738 
          </fields>
3739 
        </register>
3740 
        <register>
3741 
          <name>EXTICR1</name>
3742 
          <displayName>EXTICR1</displayName>
3743 
          <description>External interrupt configuration register 1
3744 
          (AFIO_EXTICR1)</description>
3745 
          <addressOffset>0x8</addressOffset>
3746 
          <size>0x20</size>
3747 
          <access>read-write</access>
3748 
          <resetValue>0x00000000</resetValue>
3749 
          <fields>
3750 
            <field>
3751 
              <name>EXTI0</name>
3752 
              <description>EXTI0 configuration</description>
3753 
              <bitOffset>0</bitOffset>
3754 
              <bitWidth>4</bitWidth>
3755 
            </field>
3756 
            <field>
3757 
              <name>EXTI1</name>
3758 
              <description>EXTI1 configuration</description>
3759 
              <bitOffset>4</bitOffset>
3760 
              <bitWidth>4</bitWidth>
3761 
            </field>
3762 
            <field>
3763 
              <name>EXTI2</name>
3764 
              <description>EXTI2 configuration</description>
3765 
              <bitOffset>8</bitOffset>
3766 
              <bitWidth>4</bitWidth>
3767 
            </field>
3768 
            <field>
3769 
              <name>EXTI3</name>
3770 
              <description>EXTI3 configuration</description>
3771 
              <bitOffset>12</bitOffset>
3772 
              <bitWidth>4</bitWidth>
3773 
            </field>
3774 
          </fields>
3775 
        </register>
3776 
        <register>
3777 
          <name>EXTICR2</name>
3778 
          <displayName>EXTICR2</displayName>
3779 
          <description>External interrupt configuration register 2
3780 
          (AFIO_EXTICR2)</description>
3781 
          <addressOffset>0xC</addressOffset>
3782 
          <size>0x20</size>
3783 
          <access>read-write</access>
3784 
          <resetValue>0x00000000</resetValue>
3785 
          <fields>
3786 
            <field>
3787 
              <name>EXTI4</name>
3788 
              <description>EXTI4 configuration</description>
3789 
              <bitOffset>0</bitOffset>
3790 
              <bitWidth>4</bitWidth>
3791 
            </field>
3792 
            <field>
3793 
              <name>EXTI5</name>
3794 
              <description>EXTI5 configuration</description>
3795 
              <bitOffset>4</bitOffset>
3796 
              <bitWidth>4</bitWidth>
3797 
            </field>
3798 
            <field>
3799 
              <name>EXTI6</name>
3800 
              <description>EXTI6 configuration</description>
3801 
              <bitOffset>8</bitOffset>
3802 
              <bitWidth>4</bitWidth>
3803 
            </field>
3804 
            <field>
3805 
              <name>EXTI7</name>
3806 
              <description>EXTI7 configuration</description>
3807 
              <bitOffset>12</bitOffset>
3808 
              <bitWidth>4</bitWidth>
3809 
            </field>
3810 
          </fields>
3811 
        </register>
3812 
        <register>
3813 
          <name>EXTICR3</name>
3814 
          <displayName>EXTICR3</displayName>
3815 
          <description>External interrupt configuration register 3
3816 
          (AFIO_EXTICR3)</description>
3817 
          <addressOffset>0x10</addressOffset>
3818 
          <size>0x20</size>
3819 
          <access>read-write</access>
3820 
          <resetValue>0x00000000</resetValue>
3821 
          <fields>
3822 
            <field>
3823 
              <name>EXTI8</name>
3824 
              <description>EXTI8 configuration</description>
3825 
              <bitOffset>0</bitOffset>
3826 
              <bitWidth>4</bitWidth>
3827 
            </field>
3828 
            <field>
3829 
              <name>EXTI9</name>
3830 
              <description>EXTI9 configuration</description>
3831 
              <bitOffset>4</bitOffset>
3832 
              <bitWidth>4</bitWidth>
3833 
            </field>
3834 
            <field>
3835 
              <name>EXTI10</name>
3836 
              <description>EXTI10 configuration</description>
3837 
              <bitOffset>8</bitOffset>
3838 
              <bitWidth>4</bitWidth>
3839 
            </field>
3840 
            <field>
3841 
              <name>EXTI11</name>
3842 
              <description>EXTI11 configuration</description>
3843 
              <bitOffset>12</bitOffset>
3844 
              <bitWidth>4</bitWidth>
3845 
            </field>
3846 
          </fields>
3847 
        </register>
3848 
        <register>
3849 
          <name>EXTICR4</name>
3850 
          <displayName>EXTICR4</displayName>
3851 
          <description>External interrupt configuration register 4
3852 
          (AFIO_EXTICR4)</description>
3853 
          <addressOffset>0x14</addressOffset>
3854 
          <size>0x20</size>
3855 
          <access>read-write</access>
3856 
          <resetValue>0x00000000</resetValue>
3857 
          <fields>
3858 
            <field>
3859 
              <name>EXTI12</name>
3860 
              <description>EXTI12 configuration</description>
3861 
              <bitOffset>0</bitOffset>
3862 
              <bitWidth>4</bitWidth>
3863 
            </field>
3864 
            <field>
3865 
              <name>EXTI13</name>
3866 
              <description>EXTI13 configuration</description>
3867 
              <bitOffset>4</bitOffset>
3868 
              <bitWidth>4</bitWidth>
3869 
            </field>
3870 
            <field>
3871 
              <name>EXTI14</name>
3872 
              <description>EXTI14 configuration</description>
3873 
              <bitOffset>8</bitOffset>
3874 
              <bitWidth>4</bitWidth>
3875 
            </field>
3876 
            <field>
3877 
              <name>EXTI15</name>
3878 
              <description>EXTI15 configuration</description>
3879 
              <bitOffset>12</bitOffset>
3880 
              <bitWidth>4</bitWidth>
3881 
            </field>
3882 
          </fields>
3883 
        </register>
3884 
        <register>
3885 
          <name>MAPR2</name>
3886 
          <displayName>MAPR2</displayName>
3887 
          <description>AF remap and debug I/O configuration
3888 
          register</description>
3889 
          <addressOffset>0x1C</addressOffset>
3890 
          <size>0x20</size>
3891 
          <access>read-write</access>
3892 
          <resetValue>0x00000000</resetValue>
3893 
          <fields>
3894 
            <field>
3895 
              <name>TIM9_REMAP</name>
3896 
              <description>TIM9 remapping</description>
3897 
              <bitOffset>5</bitOffset>
3898 
              <bitWidth>1</bitWidth>
3899 
            </field>
3900 
            <field>
3901 
              <name>TIM10_REMAP</name>
3902 
              <description>TIM10 remapping</description>
3903 
              <bitOffset>6</bitOffset>
3904 
              <bitWidth>1</bitWidth>
3905 
            </field>
3906 
            <field>
3907 
              <name>TIM11_REMAP</name>
3908 
              <description>TIM11 remapping</description>
3909 
              <bitOffset>7</bitOffset>
3910 
              <bitWidth>1</bitWidth>
3911 
            </field>
3912 
            <field>
3913 
              <name>TIM13_REMAP</name>
3914 
              <description>TIM13 remapping</description>
3915 
              <bitOffset>8</bitOffset>
3916 
              <bitWidth>1</bitWidth>
3917 
            </field>
3918 
            <field>
3919 
              <name>TIM14_REMAP</name>
3920 
              <description>TIM14 remapping</description>
3921 
              <bitOffset>9</bitOffset>
3922 
              <bitWidth>1</bitWidth>
3923 
            </field>
3924 
            <field>
3925 
              <name>FSMC_NADV</name>
3926 
              <description>NADV connect/disconnect</description>
3927 
              <bitOffset>10</bitOffset>
3928 
              <bitWidth>1</bitWidth>
3929 
            </field>
3930 
          </fields>
3931 
        </register>
3932 
      </registers>
3933 
    </peripheral>
3934 
    <peripheral>
3935 
      <name>EXTI</name>
3936 
      <description>EXTI</description>
3937 
      <groupName>EXTI</groupName>
3938 
      <baseAddress>0x40010400</baseAddress>
3939 
      <addressBlock>
3940 
        <offset>0x0</offset>
3941 
        <size>0x400</size>
3942 
        <usage>registers</usage>
3943 
      </addressBlock>
3944 
      <interrupt>
3945 
        <name>TAMPER</name>
3946 
        <description>Tamper interrupt</description>
3947 
        <value>2</value>
3948 
      </interrupt>
3949 
      <interrupt>
3950 
        <name>EXTI0</name>
3951 
        <description>EXTI Line0 interrupt</description>
3952 
        <value>6</value>
3953 
      </interrupt>
3954 
      <interrupt>
3955 
        <name>EXTI1</name>
3956 
        <description>EXTI Line1 interrupt</description>
3957 
        <value>7</value>
3958 
      </interrupt>
3959 
      <interrupt>
3960 
        <name>EXTI2</name>
3961 
        <description>EXTI Line2 interrupt</description>
3962 
        <value>8</value>
3963 
      </interrupt>
3964 
      <interrupt>
3965 
        <name>EXTI3</name>
3966 
        <description>EXTI Line3 interrupt</description>
3967 
        <value>9</value>
3968 
      </interrupt>
3969 
      <interrupt>
3970 
        <name>EXTI4</name>
3971 
        <description>EXTI Line4 interrupt</description>
3972 
        <value>10</value>
3973 
      </interrupt>
3974 
      <interrupt>
3975 
        <name>EXTI9_5</name>
3976 
        <description>EXTI Line[9:5] interrupts</description>
3977 
        <value>23</value>
3978 
      </interrupt>
3979 
      <interrupt>
3980 
        <name>EXTI15_10</name>
3981 
        <description>EXTI Line[15:10] interrupts</description>
3982 
        <value>40</value>
3983 
      </interrupt>
3984 
      <registers>
3985 
        <register>
3986 
          <name>IMR</name>
3987 
          <displayName>IMR</displayName>
3988 
          <description>Interrupt mask register
3989 
          (EXTI_IMR)</description>
3990 
          <addressOffset>0x0</addressOffset>
3991 
          <size>0x20</size>
3992 
          <access>read-write</access>
3993 
          <resetValue>0x00000000</resetValue>
3994 
          <fields>
3995 
            <field>
3996 
              <name>MR0</name>
3997 
              <description>Interrupt Mask on line 0</description>
3998 
              <bitOffset>0</bitOffset>
3999 
              <bitWidth>1</bitWidth>
4000 
            </field>
4001 
            <field>
4002 
              <name>MR1</name>
4003 
              <description>Interrupt Mask on line 1</description>
4004 
              <bitOffset>1</bitOffset>
4005 
              <bitWidth>1</bitWidth>
4006 
            </field>
4007 
            <field>
4008 
              <name>MR2</name>
4009 
              <description>Interrupt Mask on line 2</description>
4010 
              <bitOffset>2</bitOffset>
4011 
              <bitWidth>1</bitWidth>
4012 
            </field>
4013 
            <field>
4014 
              <name>MR3</name>
4015 
              <description>Interrupt Mask on line 3</description>
4016 
              <bitOffset>3</bitOffset>
4017 
              <bitWidth>1</bitWidth>
4018 
            </field>
4019 
            <field>
4020 
              <name>MR4</name>
4021 
              <description>Interrupt Mask on line 4</description>
4022 
              <bitOffset>4</bitOffset>
4023 
              <bitWidth>1</bitWidth>
4024 
            </field>
4025 
            <field>
4026 
              <name>MR5</name>
4027 
              <description>Interrupt Mask on line 5</description>
4028 
              <bitOffset>5</bitOffset>
4029 
              <bitWidth>1</bitWidth>
4030 
            </field>
4031 
            <field>
4032 
              <name>MR6</name>
4033 
              <description>Interrupt Mask on line 6</description>
4034 
              <bitOffset>6</bitOffset>
4035 
              <bitWidth>1</bitWidth>
4036 
            </field>
4037 
            <field>
4038 
              <name>MR7</name>
4039 
              <description>Interrupt Mask on line 7</description>
4040 
              <bitOffset>7</bitOffset>
4041 
              <bitWidth>1</bitWidth>
4042 
            </field>
4043 
            <field>
4044 
              <name>MR8</name>
4045 
              <description>Interrupt Mask on line 8</description>
4046 
              <bitOffset>8</bitOffset>
4047 
              <bitWidth>1</bitWidth>
4048 
            </field>
4049 
            <field>
4050 
              <name>MR9</name>
4051 
              <description>Interrupt Mask on line 9</description>
4052 
              <bitOffset>9</bitOffset>
4053 
              <bitWidth>1</bitWidth>
4054 
            </field>
4055 
            <field>
4056 
              <name>MR10</name>
4057 
              <description>Interrupt Mask on line 10</description>
4058 
              <bitOffset>10</bitOffset>
4059 
              <bitWidth>1</bitWidth>
4060 
            </field>
4061 
            <field>
4062 
              <name>MR11</name>
4063 
              <description>Interrupt Mask on line 11</description>
4064 
              <bitOffset>11</bitOffset>
4065 
              <bitWidth>1</bitWidth>
4066 
            </field>
4067 
            <field>
4068 
              <name>MR12</name>
4069 
              <description>Interrupt Mask on line 12</description>
4070 
              <bitOffset>12</bitOffset>
4071 
              <bitWidth>1</bitWidth>
4072 
            </field>
4073 
            <field>
4074 
              <name>MR13</name>
4075 
              <description>Interrupt Mask on line 13</description>
4076 
              <bitOffset>13</bitOffset>
4077 
              <bitWidth>1</bitWidth>
4078 
            </field>
4079 
            <field>
4080 
              <name>MR14</name>
4081 
              <description>Interrupt Mask on line 14</description>
4082 
              <bitOffset>14</bitOffset>
4083 
              <bitWidth>1</bitWidth>
4084 
            </field>
4085 
            <field>
4086 
              <name>MR15</name>
4087 
              <description>Interrupt Mask on line 15</description>
4088 
              <bitOffset>15</bitOffset>
4089 
              <bitWidth>1</bitWidth>
4090 
            </field>
4091 
            <field>
4092 
              <name>MR16</name>
4093 
              <description>Interrupt Mask on line 16</description>
4094 
              <bitOffset>16</bitOffset>
4095 
              <bitWidth>1</bitWidth>
4096 
            </field>
4097 
            <field>
4098 
              <name>MR17</name>
4099 
              <description>Interrupt Mask on line 17</description>
4100 
              <bitOffset>17</bitOffset>
4101 
              <bitWidth>1</bitWidth>
4102 
            </field>
4103 
            <field>
4104 
              <name>MR18</name>
4105 
              <description>Interrupt Mask on line 18</description>
4106 
              <bitOffset>18</bitOffset>
4107 
              <bitWidth>1</bitWidth>
4108 
            </field>
4109 
          </fields>
4110 
        </register>
4111 
        <register>
4112 
          <name>EMR</name>
4113 
          <displayName>EMR</displayName>
4114 
          <description>Event mask register (EXTI_EMR)</description>
4115 
          <addressOffset>0x4</addressOffset>
4116 
          <size>0x20</size>
4117 
          <access>read-write</access>
4118 
          <resetValue>0x00000000</resetValue>
4119 
          <fields>
4120 
            <field>
4121 
              <name>MR0</name>
4122 
              <description>Event Mask on line 0</description>
4123 
              <bitOffset>0</bitOffset>
4124 
              <bitWidth>1</bitWidth>
4125 
            </field>
4126 
            <field>
4127 
              <name>MR1</name>
4128 
              <description>Event Mask on line 1</description>
4129 
              <bitOffset>1</bitOffset>
4130 
              <bitWidth>1</bitWidth>
4131 
            </field>
4132 
            <field>
4133 
              <name>MR2</name>
4134 
              <description>Event Mask on line 2</description>
4135 
              <bitOffset>2</bitOffset>
4136 
              <bitWidth>1</bitWidth>
4137 
            </field>
4138 
            <field>
4139 
              <name>MR3</name>
4140 
              <description>Event Mask on line 3</description>
4141 
              <bitOffset>3</bitOffset>
4142 
              <bitWidth>1</bitWidth>
4143 
            </field>
4144 
            <field>
4145 
              <name>MR4</name>
4146 
              <description>Event Mask on line 4</description>
4147 
              <bitOffset>4</bitOffset>
4148 
              <bitWidth>1</bitWidth>
4149 
            </field>
4150 
            <field>
4151 
              <name>MR5</name>
4152 
              <description>Event Mask on line 5</description>
4153 
              <bitOffset>5</bitOffset>
4154 
              <bitWidth>1</bitWidth>
4155 
            </field>
4156 
            <field>
4157 
              <name>MR6</name>
4158 
              <description>Event Mask on line 6</description>
4159 
              <bitOffset>6</bitOffset>
4160 
              <bitWidth>1</bitWidth>
4161 
            </field>
4162 
            <field>
4163 
              <name>MR7</name>
4164 
              <description>Event Mask on line 7</description>
4165 
              <bitOffset>7</bitOffset>
4166 
              <bitWidth>1</bitWidth>
4167 
            </field>
4168 
            <field>
4169 
              <name>MR8</name>
4170 
              <description>Event Mask on line 8</description>
4171 
              <bitOffset>8</bitOffset>
4172 
              <bitWidth>1</bitWidth>
4173 
            </field>
4174 
            <field>
4175 
              <name>MR9</name>
4176 
              <description>Event Mask on line 9</description>
4177 
              <bitOffset>9</bitOffset>
4178 
              <bitWidth>1</bitWidth>
4179 
            </field>
4180 
            <field>
4181 
              <name>MR10</name>
4182 
              <description>Event Mask on line 10</description>
4183 
              <bitOffset>10</bitOffset>
4184 
              <bitWidth>1</bitWidth>
4185 
            </field>
4186 
            <field>
4187 
              <name>MR11</name>
4188 
              <description>Event Mask on line 11</description>
4189 
              <bitOffset>11</bitOffset>
4190 
              <bitWidth>1</bitWidth>
4191 
            </field>
4192 
            <field>
4193 
              <name>MR12</name>
4194 
              <description>Event Mask on line 12</description>
4195 
              <bitOffset>12</bitOffset>
4196 
              <bitWidth>1</bitWidth>
4197 
            </field>
4198 
            <field>
4199 
              <name>MR13</name>
4200 
              <description>Event Mask on line 13</description>
4201 
              <bitOffset>13</bitOffset>
4202 
              <bitWidth>1</bitWidth>
4203 
            </field>
4204 
            <field>
4205 
              <name>MR14</name>
4206 
              <description>Event Mask on line 14</description>
4207 
              <bitOffset>14</bitOffset>
4208 
              <bitWidth>1</bitWidth>
4209 
            </field>
4210 
            <field>
4211 
              <name>MR15</name>
4212 
              <description>Event Mask on line 15</description>
4213 
              <bitOffset>15</bitOffset>
4214 
              <bitWidth>1</bitWidth>
4215 
            </field>
4216 
            <field>
4217 
              <name>MR16</name>
4218 
              <description>Event Mask on line 16</description>
4219 
              <bitOffset>16</bitOffset>
4220 
              <bitWidth>1</bitWidth>
4221 
            </field>
4222 
            <field>
4223 
              <name>MR17</name>
4224 
              <description>Event Mask on line 17</description>
4225 
              <bitOffset>17</bitOffset>
4226 
              <bitWidth>1</bitWidth>
4227 
            </field>
4228 
            <field>
4229 
              <name>MR18</name>
4230 
              <description>Event Mask on line 18</description>
4231 
              <bitOffset>18</bitOffset>
4232 
              <bitWidth>1</bitWidth>
4233 
            </field>
4234 
          </fields>
4235 
        </register>
4236 
        <register>
4237 
          <name>RTSR</name>
4238 
          <displayName>RTSR</displayName>
4239 
          <description>Rising Trigger selection register
4240 
          (EXTI_RTSR)</description>
4241 
          <addressOffset>0x8</addressOffset>
4242 
          <size>0x20</size>
4243 
          <access>read-write</access>
4244 
          <resetValue>0x00000000</resetValue>
4245 
          <fields>
4246 
            <field>
4247 
              <name>TR0</name>
4248 
              <description>Rising trigger event configuration of
4249 
              line 0</description>
4250 
              <bitOffset>0</bitOffset>
4251 
              <bitWidth>1</bitWidth>
4252 
            </field>
4253 
            <field>
4254 
              <name>TR1</name>
4255 
              <description>Rising trigger event configuration of
4256 
              line 1</description>
4257 
              <bitOffset>1</bitOffset>
4258 
              <bitWidth>1</bitWidth>
4259 
            </field>
4260 
            <field>
4261 
              <name>TR2</name>
4262 
              <description>Rising trigger event configuration of
4263 
              line 2</description>
4264 
              <bitOffset>2</bitOffset>
4265 
              <bitWidth>1</bitWidth>
4266 
            </field>
4267 
            <field>
4268 
              <name>TR3</name>
4269 
              <description>Rising trigger event configuration of
4270 
              line 3</description>
4271 
              <bitOffset>3</bitOffset>
4272 
              <bitWidth>1</bitWidth>
4273 
            </field>
4274 
            <field>
4275 
              <name>TR4</name>
4276 
              <description>Rising trigger event configuration of
4277 
              line 4</description>
4278 
              <bitOffset>4</bitOffset>
4279 
              <bitWidth>1</bitWidth>
4280 
            </field>
4281 
            <field>
4282 
              <name>TR5</name>
4283 
              <description>Rising trigger event configuration of
4284 
              line 5</description>
4285 
              <bitOffset>5</bitOffset>
4286 
              <bitWidth>1</bitWidth>
4287 
            </field>
4288 
            <field>
4289 
              <name>TR6</name>
4290 
              <description>Rising trigger event configuration of
4291 
              line 6</description>
4292 
              <bitOffset>6</bitOffset>
4293 
              <bitWidth>1</bitWidth>
4294 
            </field>
4295 
            <field>
4296 
              <name>TR7</name>
4297 
              <description>Rising trigger event configuration of
4298 
              line 7</description>
4299 
              <bitOffset>7</bitOffset>
4300 
              <bitWidth>1</bitWidth>
4301 
            </field>
4302 
            <field>
4303 
              <name>TR8</name>
4304 
              <description>Rising trigger event configuration of
4305 
              line 8</description>
4306 
              <bitOffset>8</bitOffset>
4307 
              <bitWidth>1</bitWidth>
4308 
            </field>
4309 
            <field>
4310 
              <name>TR9</name>
4311 
              <description>Rising trigger event configuration of
4312 
              line 9</description>
4313 
              <bitOffset>9</bitOffset>
4314 
              <bitWidth>1</bitWidth>
4315 
            </field>
4316 
            <field>
4317 
              <name>TR10</name>
4318 
              <description>Rising trigger event configuration of
4319 
              line 10</description>
4320 
              <bitOffset>10</bitOffset>
4321 
              <bitWidth>1</bitWidth>
4322 
            </field>
4323 
            <field>
4324 
              <name>TR11</name>
4325 
              <description>Rising trigger event configuration of
4326 
              line 11</description>
4327 
              <bitOffset>11</bitOffset>
4328 
              <bitWidth>1</bitWidth>
4329 
            </field>
4330 
            <field>
4331 
              <name>TR12</name>
4332 
              <description>Rising trigger event configuration of
4333 
              line 12</description>
4334 
              <bitOffset>12</bitOffset>
4335 
              <bitWidth>1</bitWidth>
4336 
            </field>
4337 
            <field>
4338 
              <name>TR13</name>
4339 
              <description>Rising trigger event configuration of
4340 
              line 13</description>
4341 
              <bitOffset>13</bitOffset>
4342 
              <bitWidth>1</bitWidth>
4343 
            </field>
4344 
            <field>
4345 
              <name>TR14</name>
4346 
              <description>Rising trigger event configuration of
4347 
              line 14</description>
4348 
              <bitOffset>14</bitOffset>
4349 
              <bitWidth>1</bitWidth>
4350 
            </field>
4351 
            <field>
4352 
              <name>TR15</name>
4353 
              <description>Rising trigger event configuration of
4354 
              line 15</description>
4355 
              <bitOffset>15</bitOffset>
4356 
              <bitWidth>1</bitWidth>
4357 
            </field>
4358 
            <field>
4359 
              <name>TR16</name>
4360 
              <description>Rising trigger event configuration of
4361 
              line 16</description>
4362 
              <bitOffset>16</bitOffset>
4363 
              <bitWidth>1</bitWidth>
4364 
            </field>
4365 
            <field>
4366 
              <name>TR17</name>
4367 
              <description>Rising trigger event configuration of
4368 
              line 17</description>
4369 
              <bitOffset>17</bitOffset>
4370 
              <bitWidth>1</bitWidth>
4371 
            </field>
4372 
            <field>
4373 
              <name>TR18</name>
4374 
              <description>Rising trigger event configuration of
4375 
              line 18</description>
4376 
              <bitOffset>18</bitOffset>
4377 
              <bitWidth>1</bitWidth>
4378 
            </field>
4379 
          </fields>
4380 
        </register>
4381 
        <register>
4382 
          <name>FTSR</name>
4383 
          <displayName>FTSR</displayName>
4384 
          <description>Falling Trigger selection register
4385 
          (EXTI_FTSR)</description>
4386 
          <addressOffset>0xC</addressOffset>
4387 
          <size>0x20</size>
4388 
          <access>read-write</access>
4389 
          <resetValue>0x00000000</resetValue>
4390 
          <fields>
4391 
            <field>
4392 
              <name>TR0</name>
4393 
              <description>Falling trigger event configuration of
4394 
              line 0</description>
4395 
              <bitOffset>0</bitOffset>
4396 
              <bitWidth>1</bitWidth>
4397 
            </field>
4398 
            <field>
4399 
              <name>TR1</name>
4400 
              <description>Falling trigger event configuration of
4401 
              line 1</description>
4402 
              <bitOffset>1</bitOffset>
4403 
              <bitWidth>1</bitWidth>
4404 
            </field>
4405 
            <field>
4406 
              <name>TR2</name>
4407 
              <description>Falling trigger event configuration of
4408 
              line 2</description>
4409 
              <bitOffset>2</bitOffset>
4410 
              <bitWidth>1</bitWidth>
4411 
            </field>
4412 
            <field>
4413 
              <name>TR3</name>
4414 
              <description>Falling trigger event configuration of
4415 
              line 3</description>
4416 
              <bitOffset>3</bitOffset>
4417 
              <bitWidth>1</bitWidth>
4418 
            </field>
4419 
            <field>
4420 
              <name>TR4</name>
4421 
              <description>Falling trigger event configuration of
4422 
              line 4</description>
4423 
              <bitOffset>4</bitOffset>
4424 
              <bitWidth>1</bitWidth>
4425 
            </field>
4426 
            <field>
4427 
              <name>TR5</name>
4428 
              <description>Falling trigger event configuration of
4429 
              line 5</description>
4430 
              <bitOffset>5</bitOffset>
4431 
              <bitWidth>1</bitWidth>
4432 
            </field>
4433 
            <field>
4434 
              <name>TR6</name>
4435 
              <description>Falling trigger event configuration of
4436 
              line 6</description>
4437 
              <bitOffset>6</bitOffset>
4438 
              <bitWidth>1</bitWidth>
4439 
            </field>
4440 
            <field>
4441 
              <name>TR7</name>
4442 
              <description>Falling trigger event configuration of
4443 
              line 7</description>
4444 
              <bitOffset>7</bitOffset>
4445 
              <bitWidth>1</bitWidth>
4446 
            </field>
4447 
            <field>
4448 
              <name>TR8</name>
4449 
              <description>Falling trigger event configuration of
4450 
              line 8</description>
4451 
              <bitOffset>8</bitOffset>
4452 
              <bitWidth>1</bitWidth>
4453 
            </field>
4454 
            <field>
4455 
              <name>TR9</name>
4456 
              <description>Falling trigger event configuration of
4457 
              line 9</description>
4458 
              <bitOffset>9</bitOffset>
4459 
              <bitWidth>1</bitWidth>
4460 
            </field>
4461 
            <field>
4462 
              <name>TR10</name>
4463 
              <description>Falling trigger event configuration of
4464 
              line 10</description>
4465 
              <bitOffset>10</bitOffset>
4466 
              <bitWidth>1</bitWidth>
4467 
            </field>
4468 
            <field>
4469 
              <name>TR11</name>
4470 
              <description>Falling trigger event configuration of
4471 
              line 11</description>
4472 
              <bitOffset>11</bitOffset>
4473 
              <bitWidth>1</bitWidth>
4474 
            </field>
4475 
            <field>
4476 
              <name>TR12</name>
4477 
              <description>Falling trigger event configuration of
4478 
              line 12</description>
4479 
              <bitOffset>12</bitOffset>
4480 
              <bitWidth>1</bitWidth>
4481 
            </field>
4482 
            <field>
4483 
              <name>TR13</name>
4484 
              <description>Falling trigger event configuration of
4485 
              line 13</description>
4486 
              <bitOffset>13</bitOffset>
4487 
              <bitWidth>1</bitWidth>
4488 
            </field>
4489 
            <field>
4490 
              <name>TR14</name>
4491 
              <description>Falling trigger event configuration of
4492 
              line 14</description>
4493 
              <bitOffset>14</bitOffset>
4494 
              <bitWidth>1</bitWidth>
4495 
            </field>
4496 
            <field>
4497 
              <name>TR15</name>
4498 
              <description>Falling trigger event configuration of
4499 
              line 15</description>
4500 
              <bitOffset>15</bitOffset>
4501 
              <bitWidth>1</bitWidth>
4502 
            </field>
4503 
            <field>
4504 
              <name>TR16</name>
4505 
              <description>Falling trigger event configuration of
4506 
              line 16</description>
4507 
              <bitOffset>16</bitOffset>
4508 
              <bitWidth>1</bitWidth>
4509 
            </field>
4510 
            <field>
4511 
              <name>TR17</name>
4512 
              <description>Falling trigger event configuration of
4513 
              line 17</description>
4514 
              <bitOffset>17</bitOffset>
4515 
              <bitWidth>1</bitWidth>
4516 
            </field>
4517 
            <field>
4518 
              <name>TR18</name>
4519 
              <description>Falling trigger event configuration of
4520 
              line 18</description>
4521 
              <bitOffset>18</bitOffset>
4522 
              <bitWidth>1</bitWidth>
4523 
            </field>
4524 
          </fields>
4525 
        </register>
4526 
        <register>
4527 
          <name>SWIER</name>
4528 
          <displayName>SWIER</displayName>
4529 
          <description>Software interrupt event register
4530 
          (EXTI_SWIER)</description>
4531 
          <addressOffset>0x10</addressOffset>
4532 
          <size>0x20</size>
4533 
          <access>read-write</access>
4534 
          <resetValue>0x00000000</resetValue>
4535 
          <fields>
4536 
            <field>
4537 
              <name>SWIER0</name>
4538 
              <description>Software Interrupt on line
4539 
              0</description>
4540 
              <bitOffset>0</bitOffset>
4541 
              <bitWidth>1</bitWidth>
4542 
            </field>
4543 
            <field>
4544 
              <name>SWIER1</name>
4545 
              <description>Software Interrupt on line
4546 
              1</description>
4547 
              <bitOffset>1</bitOffset>
4548 
              <bitWidth>1</bitWidth>
4549 
            </field>
4550 
            <field>
4551 
              <name>SWIER2</name>
4552 
              <description>Software Interrupt on line
4553 
              2</description>
4554 
              <bitOffset>2</bitOffset>
4555 
              <bitWidth>1</bitWidth>
4556 
            </field>
4557 
            <field>
4558 
              <name>SWIER3</name>
4559 
              <description>Software Interrupt on line
4560 
              3</description>
4561 
              <bitOffset>3</bitOffset>
4562 
              <bitWidth>1</bitWidth>
4563 
            </field>
4564 
            <field>
4565 
              <name>SWIER4</name>
4566 
              <description>Software Interrupt on line
4567 
              4</description>
4568 
              <bitOffset>4</bitOffset>
4569 
              <bitWidth>1</bitWidth>
4570 
            </field>
4571 
            <field>
4572 
              <name>SWIER5</name>
4573 
              <description>Software Interrupt on line
4574 
              5</description>
4575 
              <bitOffset>5</bitOffset>
4576 
              <bitWidth>1</bitWidth>
4577 
            </field>
4578 
            <field>
4579 
              <name>SWIER6</name>
4580 
              <description>Software Interrupt on line
4581 
              6</description>
4582 
              <bitOffset>6</bitOffset>
4583 
              <bitWidth>1</bitWidth>
4584 
            </field>
4585 
            <field>
4586 
              <name>SWIER7</name>
4587 
              <description>Software Interrupt on line
4588 
              7</description>
4589 
              <bitOffset>7</bitOffset>
4590 
              <bitWidth>1</bitWidth>
4591 
            </field>
4592 
            <field>
4593 
              <name>SWIER8</name>
4594 
              <description>Software Interrupt on line
4595 
              8</description>
4596 
              <bitOffset>8</bitOffset>
4597 
              <bitWidth>1</bitWidth>
4598 
            </field>
4599 
            <field>
4600 
              <name>SWIER9</name>
4601 
              <description>Software Interrupt on line
4602 
              9</description>
4603 
              <bitOffset>9</bitOffset>
4604 
              <bitWidth>1</bitWidth>
4605 
            </field>
4606 
            <field>
4607 
              <name>SWIER10</name>
4608 
              <description>Software Interrupt on line
4609 
              10</description>
4610 
              <bitOffset>10</bitOffset>
4611 
              <bitWidth>1</bitWidth>
4612 
            </field>
4613 
            <field>
4614 
              <name>SWIER11</name>
4615 
              <description>Software Interrupt on line
4616 
              11</description>
4617 
              <bitOffset>11</bitOffset>
4618 
              <bitWidth>1</bitWidth>
4619 
            </field>
4620 
            <field>
4621 
              <name>SWIER12</name>
4622 
              <description>Software Interrupt on line
4623 
              12</description>
4624 
              <bitOffset>12</bitOffset>
4625 
              <bitWidth>1</bitWidth>
4626 
            </field>
4627 
            <field>
4628 
              <name>SWIER13</name>
4629 
              <description>Software Interrupt on line
4630 
              13</description>
4631 
              <bitOffset>13</bitOffset>
4632 
              <bitWidth>1</bitWidth>
4633 
            </field>
4634 
            <field>
4635 
              <name>SWIER14</name>
4636 
              <description>Software Interrupt on line
4637 
              14</description>
4638 
              <bitOffset>14</bitOffset>
4639 
              <bitWidth>1</bitWidth>
4640 
            </field>
4641 
            <field>
4642 
              <name>SWIER15</name>
4643 
              <description>Software Interrupt on line
4644 
              15</description>
4645 
              <bitOffset>15</bitOffset>
4646 
              <bitWidth>1</bitWidth>
4647 
            </field>
4648 
            <field>
4649 
              <name>SWIER16</name>
4650 
              <description>Software Interrupt on line
4651 
              16</description>
4652 
              <bitOffset>16</bitOffset>
4653 
              <bitWidth>1</bitWidth>
4654 
            </field>
4655 
            <field>
4656 
              <name>SWIER17</name>
4657 
              <description>Software Interrupt on line
4658 
              17</description>
4659 
              <bitOffset>17</bitOffset>
4660 
              <bitWidth>1</bitWidth>
4661 
            </field>
4662 
            <field>
4663 
              <name>SWIER18</name>
4664 
              <description>Software Interrupt on line
4665 
              18</description>
4666 
              <bitOffset>18</bitOffset>
4667 
              <bitWidth>1</bitWidth>
4668 
            </field>
4669 
          </fields>
4670 
        </register>
4671 
        <register>
4672 
          <name>PR</name>
4673 
          <displayName>PR</displayName>
4674 
          <description>Pending register (EXTI_PR)</description>
4675 
          <addressOffset>0x14</addressOffset>
4676 
          <size>0x20</size>
4677 
          <access>read-write</access>
4678 
          <resetValue>0x00000000</resetValue>
4679 
          <fields>
4680 
            <field>
4681 
              <name>PR0</name>
4682 
              <description>Pending bit 0</description>
4683 
              <bitOffset>0</bitOffset>
4684 
              <bitWidth>1</bitWidth>
4685 
            </field>
4686 
            <field>
4687 
              <name>PR1</name>
4688 
              <description>Pending bit 1</description>
4689 
              <bitOffset>1</bitOffset>
4690 
              <bitWidth>1</bitWidth>
4691 
            </field>
4692 
            <field>
4693 
              <name>PR2</name>
4694 
              <description>Pending bit 2</description>
4695 
              <bitOffset>2</bitOffset>
4696 
              <bitWidth>1</bitWidth>
4697 
            </field>
4698 
            <field>
4699 
              <name>PR3</name>
4700 
              <description>Pending bit 3</description>
4701 
              <bitOffset>3</bitOffset>
4702 
              <bitWidth>1</bitWidth>
4703 
            </field>
4704 
            <field>
4705 
              <name>PR4</name>
4706 
              <description>Pending bit 4</description>
4707 
              <bitOffset>4</bitOffset>
4708 
              <bitWidth>1</bitWidth>
4709 
            </field>
4710 
            <field>
4711 
              <name>PR5</name>
4712 
              <description>Pending bit 5</description>
4713 
              <bitOffset>5</bitOffset>
4714 
              <bitWidth>1</bitWidth>
4715 
            </field>
4716 
            <field>
4717 
              <name>PR6</name>
4718 
              <description>Pending bit 6</description>
4719 
              <bitOffset>6</bitOffset>
4720 
              <bitWidth>1</bitWidth>
4721 
            </field>
4722 
            <field>
4723 
              <name>PR7</name>
4724 
              <description>Pending bit 7</description>
4725 
              <bitOffset>7</bitOffset>
4726 
              <bitWidth>1</bitWidth>
4727 
            </field>
4728 
            <field>
4729 
              <name>PR8</name>
4730 
              <description>Pending bit 8</description>
4731 
              <bitOffset>8</bitOffset>
4732 
              <bitWidth>1</bitWidth>
4733 
            </field>
4734 
            <field>
4735 
              <name>PR9</name>
4736 
              <description>Pending bit 9</description>
4737 
              <bitOffset>9</bitOffset>
4738 
              <bitWidth>1</bitWidth>
4739 
            </field>
4740 
            <field>
4741 
              <name>PR10</name>
4742 
              <description>Pending bit 10</description>
4743 
              <bitOffset>10</bitOffset>
4744 
              <bitWidth>1</bitWidth>
4745 
            </field>
4746 
            <field>
4747 
              <name>PR11</name>
4748 
              <description>Pending bit 11</description>
4749 
              <bitOffset>11</bitOffset>
4750 
              <bitWidth>1</bitWidth>
4751 
            </field>
4752 
            <field>
4753 
              <name>PR12</name>
4754 
              <description>Pending bit 12</description>
4755 
              <bitOffset>12</bitOffset>
4756 
              <bitWidth>1</bitWidth>
4757 
            </field>
4758 
            <field>
4759 
              <name>PR13</name>
4760 
              <description>Pending bit 13</description>
4761 
              <bitOffset>13</bitOffset>
4762 
              <bitWidth>1</bitWidth>
4763 
            </field>
4764 
            <field>
4765 
              <name>PR14</name>
4766 
              <description>Pending bit 14</description>
4767 
              <bitOffset>14</bitOffset>
4768 
              <bitWidth>1</bitWidth>
4769 
            </field>
4770 
            <field>
4771 
              <name>PR15</name>
4772 
              <description>Pending bit 15</description>
4773 
              <bitOffset>15</bitOffset>
4774 
              <bitWidth>1</bitWidth>
4775 
            </field>
4776 
            <field>
4777 
              <name>PR16</name>
4778 
              <description>Pending bit 16</description>
4779 
              <bitOffset>16</bitOffset>
4780 
              <bitWidth>1</bitWidth>
4781 
            </field>
4782 
            <field>
4783 
              <name>PR17</name>
4784 
              <description>Pending bit 17</description>
4785 
              <bitOffset>17</bitOffset>
4786 
              <bitWidth>1</bitWidth>
4787 
            </field>
4788 
            <field>
4789 
              <name>PR18</name>
4790 
              <description>Pending bit 18</description>
4791 
              <bitOffset>18</bitOffset>
4792 
              <bitWidth>1</bitWidth>
4793 
            </field>
4794 
          </fields>
4795 
        </register>
4796 
      </registers>
4797 
    </peripheral>
4798 
    <peripheral>
4799 
      <name>DMA1</name>
4800 
      <description>DMA controller</description>
4801 
      <groupName>DMA</groupName>
4802 
      <baseAddress>0x40020000</baseAddress>
4803 
      <addressBlock>
4804 
        <offset>0x0</offset>
4805 
        <size>0x400</size>
4806 
        <usage>registers</usage>
4807 
      </addressBlock>
4808 
      <interrupt>
4809 
        <name>DMA1_Channel1</name>
4810 
        <description>DMA1 Channel1 global interrupt</description>
4811 
        <value>11</value>
4812 
      </interrupt>
4813 
      <interrupt>
4814 
        <name>DMA1_Channel2</name>
4815 
        <description>DMA1 Channel2 global interrupt</description>
4816 
        <value>12</value>
4817 
      </interrupt>
4818 
      <interrupt>
4819 
        <name>DMA1_Channel3</name>
4820 
        <description>DMA1 Channel3 global interrupt</description>
4821 
        <value>13</value>
4822 
      </interrupt>
4823 
      <interrupt>
4824 
        <name>DMA1_Channel4</name>
4825 
        <description>DMA1 Channel4 global interrupt</description>
4826 
        <value>14</value>
4827 
      </interrupt>
4828 
      <interrupt>
4829 
        <name>DMA1_Channel5</name>
4830 
        <description>DMA1 Channel5 global interrupt</description>
4831 
        <value>15</value>
4832 
      </interrupt>
4833 
      <interrupt>
4834 
        <name>DMA1_Channel6</name>
4835 
        <description>DMA1 Channel6 global interrupt</description>
4836 
        <value>16</value>
4837 
      </interrupt>
4838 
      <interrupt>
4839 
        <name>DMA1_Channel7</name>
4840 
        <description>DMA1 Channel7 global interrupt</description>
4841 
        <value>17</value>
4842 
      </interrupt>
4843 
      <registers>
4844 
        <register>
4845 
          <name>ISR</name>
4846 
          <displayName>ISR</displayName>
4847 
          <description>DMA interrupt status register
4848 
          (DMA_ISR)</description>
4849 
          <addressOffset>0x0</addressOffset>
4850 
          <size>0x20</size>
4851 
          <access>read-only</access>
4852 
          <resetValue>0x00000000</resetValue>
4853 
          <fields>
4854 
            <field>
4855 
              <name>GIF1</name>
4856 
              <description>Channel 1 Global interrupt
4857 
              flag</description>
4858 
              <bitOffset>0</bitOffset>
4859 
              <bitWidth>1</bitWidth>
4860 
            </field>
4861 
            <field>
4862 
              <name>TCIF1</name>
4863 
              <description>Channel 1 Transfer Complete
4864 
              flag</description>
4865 
              <bitOffset>1</bitOffset>
4866 
              <bitWidth>1</bitWidth>
4867 
            </field>
4868 
            <field>
4869 
              <name>HTIF1</name>
4870 
              <description>Channel 1 Half Transfer Complete
4871 
              flag</description>
4872 
              <bitOffset>2</bitOffset>
4873 
              <bitWidth>1</bitWidth>
4874 
            </field>
4875 
            <field>
4876 
              <name>TEIF1</name>
4877 
              <description>Channel 1 Transfer Error
4878 
              flag</description>
4879 
              <bitOffset>3</bitOffset>
4880 
              <bitWidth>1</bitWidth>
4881 
            </field>
4882 
            <field>
4883 
              <name>GIF2</name>
4884 
              <description>Channel 2 Global interrupt
4885 
              flag</description>
4886 
              <bitOffset>4</bitOffset>
4887 
              <bitWidth>1</bitWidth>
4888 
            </field>
4889 
            <field>
4890 
              <name>TCIF2</name>
4891 
              <description>Channel 2 Transfer Complete
4892 
              flag</description>
4893 
              <bitOffset>5</bitOffset>
4894 
              <bitWidth>1</bitWidth>
4895 
            </field>
4896 
            <field>
4897 
              <name>HTIF2</name>
4898 
              <description>Channel 2 Half Transfer Complete
4899 
              flag</description>
4900 
              <bitOffset>6</bitOffset>
4901 
              <bitWidth>1</bitWidth>
4902 
            </field>
4903 
            <field>
4904 
              <name>TEIF2</name>
4905 
              <description>Channel 2 Transfer Error
4906 
              flag</description>
4907 
              <bitOffset>7</bitOffset>
4908 
              <bitWidth>1</bitWidth>
4909 
            </field>
4910 
            <field>
4911 
              <name>GIF3</name>
4912 
              <description>Channel 3 Global interrupt
4913 
              flag</description>
4914 
              <bitOffset>8</bitOffset>
4915 
              <bitWidth>1</bitWidth>
4916 
            </field>
4917 
            <field>
4918 
              <name>TCIF3</name>
4919 
              <description>Channel 3 Transfer Complete
4920 
              flag</description>
4921 
              <bitOffset>9</bitOffset>
4922 
              <bitWidth>1</bitWidth>
4923 
            </field>
4924 
            <field>
4925 
              <name>HTIF3</name>
4926 
              <description>Channel 3 Half Transfer Complete
4927 
              flag</description>
4928 
              <bitOffset>10</bitOffset>
4929 
              <bitWidth>1</bitWidth>
4930 
            </field>
4931 
            <field>
4932 
              <name>TEIF3</name>
4933 
              <description>Channel 3 Transfer Error
4934 
              flag</description>
4935 
              <bitOffset>11</bitOffset>
4936 
              <bitWidth>1</bitWidth>
4937 
            </field>
4938 
            <field>
4939 
              <name>GIF4</name>
4940 
              <description>Channel 4 Global interrupt
4941 
              flag</description>
4942 
              <bitOffset>12</bitOffset>
4943 
              <bitWidth>1</bitWidth>
4944 
            </field>
4945 
            <field>
4946 
              <name>TCIF4</name>
4947 
              <description>Channel 4 Transfer Complete
4948 
              flag</description>
4949 
              <bitOffset>13</bitOffset>
4950 
              <bitWidth>1</bitWidth>
4951 
            </field>
4952 
            <field>
4953 
              <name>HTIF4</name>
4954 
              <description>Channel 4 Half Transfer Complete
4955 
              flag</description>
4956 
              <bitOffset>14</bitOffset>
4957 
              <bitWidth>1</bitWidth>
4958 
            </field>
4959 
            <field>
4960 
              <name>TEIF4</name>
4961 
              <description>Channel 4 Transfer Error
4962 
              flag</description>
4963 
              <bitOffset>15</bitOffset>
4964 
              <bitWidth>1</bitWidth>
4965 
            </field>
4966 
            <field>
4967 
              <name>GIF5</name>
4968 
              <description>Channel 5 Global interrupt
4969 
              flag</description>
4970 
              <bitOffset>16</bitOffset>
4971 
              <bitWidth>1</bitWidth>
4972 
            </field>
4973 
            <field>
4974 
              <name>TCIF5</name>
4975 
              <description>Channel 5 Transfer Complete
4976 
              flag</description>
4977 
              <bitOffset>17</bitOffset>
4978 
              <bitWidth>1</bitWidth>
4979 
            </field>
4980 
            <field>
4981 
              <name>HTIF5</name>
4982 
              <description>Channel 5 Half Transfer Complete
4983 
              flag</description>
4984 
              <bitOffset>18</bitOffset>
4985 
              <bitWidth>1</bitWidth>
4986 
            </field>
4987 
            <field>
4988 
              <name>TEIF5</name>
4989 
              <description>Channel 5 Transfer Error
4990 
              flag</description>
4991 
              <bitOffset>19</bitOffset>
4992 
              <bitWidth>1</bitWidth>
4993 
            </field>
4994 
            <field>
4995 
              <name>GIF6</name>
4996 
              <description>Channel 6 Global interrupt
4997 
              flag</description>
4998 
              <bitOffset>20</bitOffset>
4999 
              <bitWidth>1</bitWidth>
5000 
            </field>
5001 
            <field>
5002 
              <name>TCIF6</name>
5003 
              <description>Channel 6 Transfer Complete
5004 
              flag</description>
5005 
              <bitOffset>21</bitOffset>
5006 
              <bitWidth>1</bitWidth>
5007 
            </field>
5008 
            <field>
5009 
              <name>HTIF6</name>
5010 
              <description>Channel 6 Half Transfer Complete
5011 
              flag</description>
5012 
              <bitOffset>22</bitOffset>
5013 
              <bitWidth>1</bitWidth>
5014 
            </field>
5015 
            <field>
5016 
              <name>TEIF6</name>
5017 
              <description>Channel 6 Transfer Error
5018 
              flag</description>
5019 
              <bitOffset>23</bitOffset>
5020 
              <bitWidth>1</bitWidth>
5021 
            </field>
5022 
            <field>
5023 
              <name>GIF7</name>
5024 
              <description>Channel 7 Global interrupt
5025 
              flag</description>
5026 
              <bitOffset>24</bitOffset>
5027 
              <bitWidth>1</bitWidth>
5028 
            </field>
5029 
            <field>
5030 
              <name>TCIF7</name>
5031 
              <description>Channel 7 Transfer Complete
5032 
              flag</description>
5033 
              <bitOffset>25</bitOffset>
5034 
              <bitWidth>1</bitWidth>
5035 
            </field>
5036 
            <field>
5037 
              <name>HTIF7</name>
5038 
              <description>Channel 7 Half Transfer Complete
5039 
              flag</description>
5040 
              <bitOffset>26</bitOffset>
5041 
              <bitWidth>1</bitWidth>
5042 
            </field>
5043 
            <field>
5044 
              <name>TEIF7</name>
5045 
              <description>Channel 7 Transfer Error
5046 
              flag</description>
5047 
              <bitOffset>27</bitOffset>
5048 
              <bitWidth>1</bitWidth>
5049 
            </field>
5050 
          </fields>
5051 
        </register>
5052 
        <register>
5053 
          <name>IFCR</name>
5054 
          <displayName>IFCR</displayName>
5055 
          <description>DMA interrupt flag clear register
5056 
          (DMA_IFCR)</description>
5057 
          <addressOffset>0x4</addressOffset>
5058 
          <size>0x20</size>
5059 
          <access>write-only</access>
5060 
          <resetValue>0x00000000</resetValue>
5061 
          <fields>
5062 
            <field>
5063 
              <name>CGIF1</name>
5064 
              <description>Channel 1 Global interrupt
5065 
              clear</description>
5066 
              <bitOffset>0</bitOffset>
5067 
              <bitWidth>1</bitWidth>
5068 
            </field>
5069 
            <field>
5070 
              <name>CGIF2</name>
5071 
              <description>Channel 2 Global interrupt
5072 
              clear</description>
5073 
              <bitOffset>4</bitOffset>
5074 
              <bitWidth>1</bitWidth>
5075 
            </field>
5076 
            <field>
5077 
              <name>CGIF3</name>
5078 
              <description>Channel 3 Global interrupt
5079 
              clear</description>
5080 
              <bitOffset>8</bitOffset>
5081 
              <bitWidth>1</bitWidth>
5082 
            </field>
5083 
            <field>
5084 
              <name>CGIF4</name>
5085 
              <description>Channel 4 Global interrupt
5086 
              clear</description>
5087 
              <bitOffset>12</bitOffset>
5088 
              <bitWidth>1</bitWidth>
5089 
            </field>
5090 
            <field>
5091 
              <name>CGIF5</name>
5092 
              <description>Channel 5 Global interrupt
5093 
              clear</description>
5094 
              <bitOffset>16</bitOffset>
5095 
              <bitWidth>1</bitWidth>
5096 
            </field>
5097 
            <field>
5098 
              <name>CGIF6</name>
5099 
              <description>Channel 6 Global interrupt
5100 
              clear</description>
5101 
              <bitOffset>20</bitOffset>
5102 
              <bitWidth>1</bitWidth>
5103 
            </field>
5104 
            <field>
5105 
              <name>CGIF7</name>
5106 
              <description>Channel 7 Global interrupt
5107 
              clear</description>
5108 
              <bitOffset>24</bitOffset>
5109 
              <bitWidth>1</bitWidth>
5110 
            </field>
5111 
            <field>
5112 
              <name>CTCIF1</name>
5113 
              <description>Channel 1 Transfer Complete
5114 
              clear</description>
5115 
              <bitOffset>1</bitOffset>
5116 
              <bitWidth>1</bitWidth>
5117 
            </field>
5118 
            <field>
5119 
              <name>CTCIF2</name>
5120 
              <description>Channel 2 Transfer Complete
5121 
              clear</description>
5122 
              <bitOffset>5</bitOffset>
5123 
              <bitWidth>1</bitWidth>
5124 
            </field>
5125 
            <field>
5126 
              <name>CTCIF3</name>
5127 
              <description>Channel 3 Transfer Complete
5128 
              clear</description>
5129 
              <bitOffset>9</bitOffset>
5130 
              <bitWidth>1</bitWidth>
5131 
            </field>
5132 
            <field>
5133 
              <name>CTCIF4</name>
5134 
              <description>Channel 4 Transfer Complete
5135 
              clear</description>
5136 
              <bitOffset>13</bitOffset>
5137 
              <bitWidth>1</bitWidth>
5138 
            </field>
5139 
            <field>
5140 
              <name>CTCIF5</name>
5141 
              <description>Channel 5 Transfer Complete
5142 
              clear</description>
5143 
              <bitOffset>17</bitOffset>
5144 
              <bitWidth>1</bitWidth>
5145 
            </field>
5146 
            <field>
5147 
              <name>CTCIF6</name>
5148 
              <description>Channel 6 Transfer Complete
5149 
              clear</description>
5150 
              <bitOffset>21</bitOffset>
5151 
              <bitWidth>1</bitWidth>
5152 
            </field>
5153 
            <field>
5154 
              <name>CTCIF7</name>
5155 
              <description>Channel 7 Transfer Complete
5156 
              clear</description>
5157 
              <bitOffset>25</bitOffset>
5158 
              <bitWidth>1</bitWidth>
5159 
            </field>
5160 
            <field>
5161 
              <name>CHTIF1</name>
5162 
              <description>Channel 1 Half Transfer
5163 
              clear</description>
5164 
              <bitOffset>2</bitOffset>
5165 
              <bitWidth>1</bitWidth>
5166 
            </field>
5167 
            <field>
5168 
              <name>CHTIF2</name>
5169 
              <description>Channel 2 Half Transfer
5170 
              clear</description>
5171 
              <bitOffset>6</bitOffset>
5172 
              <bitWidth>1</bitWidth>
5173 
            </field>
5174 
            <field>
5175 
              <name>CHTIF3</name>
5176 
              <description>Channel 3 Half Transfer
5177 
              clear</description>
5178 
              <bitOffset>10</bitOffset>
5179 
              <bitWidth>1</bitWidth>
5180 
            </field>
5181 
            <field>
5182 
              <name>CHTIF4</name>
5183 
              <description>Channel 4 Half Transfer
5184 
              clear</description>
5185 
              <bitOffset>14</bitOffset>
5186 
              <bitWidth>1</bitWidth>
5187 
            </field>
5188 
            <field>
5189 
              <name>CHTIF5</name>
5190 
              <description>Channel 5 Half Transfer
5191 
              clear</description>
5192 
              <bitOffset>18</bitOffset>
5193 
              <bitWidth>1</bitWidth>
5194 
            </field>
5195 
            <field>
5196 
              <name>CHTIF6</name>
5197 
              <description>Channel 6 Half Transfer
5198 
              clear</description>
5199 
              <bitOffset>22</bitOffset>
5200 
              <bitWidth>1</bitWidth>
5201 
            </field>
5202 
            <field>
5203 
              <name>CHTIF7</name>
5204 
              <description>Channel 7 Half Transfer
5205 
              clear</description>
5206 
              <bitOffset>26</bitOffset>
5207 
              <bitWidth>1</bitWidth>
5208 
            </field>
5209 
            <field>
5210 
              <name>CTEIF1</name>
5211 
              <description>Channel 1 Transfer Error
5212 
              clear</description>
5213 
              <bitOffset>3</bitOffset>
5214 
              <bitWidth>1</bitWidth>
5215 
            </field>
5216 
            <field>
5217 
              <name>CTEIF2</name>
5218 
              <description>Channel 2 Transfer Error
5219 
              clear</description>
5220 
              <bitOffset>7</bitOffset>
5221 
              <bitWidth>1</bitWidth>
5222 
            </field>
5223 
            <field>
5224 
              <name>CTEIF3</name>
5225 
              <description>Channel 3 Transfer Error
5226 
              clear</description>
5227 
              <bitOffset>11</bitOffset>
5228 
              <bitWidth>1</bitWidth>
5229 
            </field>
5230 
            <field>
5231 
              <name>CTEIF4</name>
5232 
              <description>Channel 4 Transfer Error
5233 
              clear</description>
5234 
              <bitOffset>15</bitOffset>
5235 
              <bitWidth>1</bitWidth>
5236 
            </field>
5237 
            <field>
5238 
              <name>CTEIF5</name>
5239 
              <description>Channel 5 Transfer Error
5240 
              clear</description>
5241 
              <bitOffset>19</bitOffset>
5242 
              <bitWidth>1</bitWidth>
5243 
            </field>
5244 
            <field>
5245 
              <name>CTEIF6</name>
5246 
              <description>Channel 6 Transfer Error
5247 
              clear</description>
5248 
              <bitOffset>23</bitOffset>
5249 
              <bitWidth>1</bitWidth>
5250 
            </field>
5251 
            <field>
5252 
              <name>CTEIF7</name>
5253 
              <description>Channel 7 Transfer Error
5254 
              clear</description>
5255 
              <bitOffset>27</bitOffset>
5256 
              <bitWidth>1</bitWidth>
5257 
            </field>
5258 
          </fields>
5259 
        </register>
5260 
        <register>
5261 
          <name>CCR1</name>
5262 
          <displayName>CCR1</displayName>
5263 
          <description>DMA channel configuration register
5264 
          (DMA_CCR)</description>
5265 
          <addressOffset>0x8</addressOffset>
5266 
          <size>0x20</size>
5267 
          <access>read-write</access>
5268 
          <resetValue>0x00000000</resetValue>
5269 
          <fields>
5270 
            <field>
5271 
              <name>EN</name>
5272 
              <description>Channel enable</description>
5273 
              <bitOffset>0</bitOffset>
5274 
              <bitWidth>1</bitWidth>
5275 
            </field>
5276 
            <field>
5277 
              <name>TCIE</name>
5278 
              <description>Transfer complete interrupt
5279 
              enable</description>
5280 
              <bitOffset>1</bitOffset>
5281 
              <bitWidth>1</bitWidth>
5282 
            </field>
5283 
            <field>
5284 
              <name>HTIE</name>
5285 
              <description>Half Transfer interrupt
5286 
              enable</description>
5287 
              <bitOffset>2</bitOffset>
5288 
              <bitWidth>1</bitWidth>
5289 
            </field>
5290 
            <field>
5291 
              <name>TEIE</name>
5292 
              <description>Transfer error interrupt
5293 
              enable</description>
5294 
              <bitOffset>3</bitOffset>
5295 
              <bitWidth>1</bitWidth>
5296 
            </field>
5297 
            <field>
5298 
              <name>DIR</name>
5299 
              <description>Data transfer direction</description>
5300 
              <bitOffset>4</bitOffset>
5301 
              <bitWidth>1</bitWidth>
5302 
            </field>
5303 
            <field>
5304 
              <name>CIRC</name>
5305 
              <description>Circular mode</description>
5306 
              <bitOffset>5</bitOffset>
5307 
              <bitWidth>1</bitWidth>
5308 
            </field>
5309 
            <field>
5310 
              <name>PINC</name>
5311 
              <description>Peripheral increment mode</description>
5312 
              <bitOffset>6</bitOffset>
5313 
              <bitWidth>1</bitWidth>
5314 
            </field>
5315 
            <field>
5316 
              <name>MINC</name>
5317 
              <description>Memory increment mode</description>
5318 
              <bitOffset>7</bitOffset>
5319 
              <bitWidth>1</bitWidth>
5320 
            </field>
5321 
            <field>
5322 
              <name>PSIZE</name>
5323 
              <description>Peripheral size</description>
5324 
              <bitOffset>8</bitOffset>
5325 
              <bitWidth>2</bitWidth>
5326 
            </field>
5327 
            <field>
5328 
              <name>MSIZE</name>
5329 
              <description>Memory size</description>
5330 
              <bitOffset>10</bitOffset>
5331 
              <bitWidth>2</bitWidth>
5332 
            </field>
5333 
            <field>
5334 
              <name>PL</name>
5335 
              <description>Channel Priority level</description>
5336 
              <bitOffset>12</bitOffset>
5337 
              <bitWidth>2</bitWidth>
5338 
            </field>
5339 
            <field>
5340 
              <name>MEM2MEM</name>
5341 
              <description>Memory to memory mode</description>
5342 
              <bitOffset>14</bitOffset>
5343 
              <bitWidth>1</bitWidth>
5344 
            </field>
5345 
          </fields>
5346 
        </register>
5347 
        <register>
5348 
          <name>CNDTR1</name>
5349 
          <displayName>CNDTR1</displayName>
5350 
          <description>DMA channel 1 number of data
5351 
          register</description>
5352 
          <addressOffset>0xC</addressOffset>
5353 
          <size>0x20</size>
5354 
          <access>read-write</access>
5355 
          <resetValue>0x00000000</resetValue>
5356 
          <fields>
5357 
            <field>
5358 
              <name>NDT</name>
5359 
              <description>Number of data to transfer</description>
5360 
              <bitOffset>0</bitOffset>
5361 
              <bitWidth>16</bitWidth>
5362 
            </field>
5363 
          </fields>
5364 
        </register>
5365 
        <register>
5366 
          <name>CPAR1</name>
5367 
          <displayName>CPAR1</displayName>
5368 
          <description>DMA channel 1 peripheral address
5369 
          register</description>
5370 
          <addressOffset>0x10</addressOffset>
5371 
          <size>0x20</size>
5372 
          <access>read-write</access>
5373 
          <resetValue>0x00000000</resetValue>
5374 
          <fields>
5375 
            <field>
5376 
              <name>PA</name>
5377 
              <description>Peripheral address</description>
5378 
              <bitOffset>0</bitOffset>
5379 
              <bitWidth>32</bitWidth>
5380 
            </field>
5381 
          </fields>
5382 
        </register>
5383 
        <register>
5384 
          <name>CMAR1</name>
5385 
          <displayName>CMAR1</displayName>
5386 
          <description>DMA channel 1 memory address
5387 
          register</description>
5388 
          <addressOffset>0x14</addressOffset>
5389 
          <size>0x20</size>
5390 
          <access>read-write</access>
5391 
          <resetValue>0x00000000</resetValue>
5392 
          <fields>
5393 
            <field>
5394 
              <name>MA</name>
5395 
              <description>Memory address</description>
5396 
              <bitOffset>0</bitOffset>
5397 
              <bitWidth>32</bitWidth>
5398 
            </field>
5399 
          </fields>
5400 
        </register>
5401 
        <register>
5402 
          <name>CCR2</name>
5403 
          <displayName>CCR2</displayName>
5404 
          <description>DMA channel configuration register
5405 
          (DMA_CCR)</description>
5406 
          <addressOffset>0x1C</addressOffset>
5407 
          <size>0x20</size>
5408 
          <access>read-write</access>
5409 
          <resetValue>0x00000000</resetValue>
5410 
          <fields>
5411 
            <field>
5412 
              <name>EN</name>
5413 
              <description>Channel enable</description>
5414 
              <bitOffset>0</bitOffset>
5415 
              <bitWidth>1</bitWidth>
5416 
            </field>
5417 
            <field>
5418 
              <name>TCIE</name>
5419 
              <description>Transfer complete interrupt
5420 
              enable</description>
5421 
              <bitOffset>1</bitOffset>
5422 
              <bitWidth>1</bitWidth>
5423 
            </field>
5424 
            <field>
5425 
              <name>HTIE</name>
5426 
              <description>Half Transfer interrupt
5427 
              enable</description>
5428 
              <bitOffset>2</bitOffset>
5429 
              <bitWidth>1</bitWidth>
5430 
            </field>
5431 
            <field>
5432 
              <name>TEIE</name>
5433 
              <description>Transfer error interrupt
5434 
              enable</description>
5435 
              <bitOffset>3</bitOffset>
5436 
              <bitWidth>1</bitWidth>
5437 
            </field>
5438 
            <field>
5439 
              <name>DIR</name>
5440 
              <description>Data transfer direction</description>
5441 
              <bitOffset>4</bitOffset>
5442 
              <bitWidth>1</bitWidth>
5443 
            </field>
5444 
            <field>
5445 
              <name>CIRC</name>
5446 
              <description>Circular mode</description>
5447 
              <bitOffset>5</bitOffset>
5448 
              <bitWidth>1</bitWidth>
5449 
            </field>
5450 
            <field>
5451 
              <name>PINC</name>
5452 
              <description>Peripheral increment mode</description>
5453 
              <bitOffset>6</bitOffset>
5454 
              <bitWidth>1</bitWidth>
5455 
            </field>
5456 
            <field>
5457 
              <name>MINC</name>
5458 
              <description>Memory increment mode</description>
5459 
              <bitOffset>7</bitOffset>
5460 
              <bitWidth>1</bitWidth>
5461 
            </field>
5462 
            <field>
5463 
              <name>PSIZE</name>
5464 
              <description>Peripheral size</description>
5465 
              <bitOffset>8</bitOffset>
5466 
              <bitWidth>2</bitWidth>
5467 
            </field>
5468 
            <field>
5469 
              <name>MSIZE</name>
5470 
              <description>Memory size</description>
5471 
              <bitOffset>10</bitOffset>
5472 
              <bitWidth>2</bitWidth>
5473 
            </field>
5474 
            <field>
5475 
              <name>PL</name>
5476 
              <description>Channel Priority level</description>
5477 
              <bitOffset>12</bitOffset>
5478 
              <bitWidth>2</bitWidth>
5479 
            </field>
5480 
            <field>
5481 
              <name>MEM2MEM</name>
5482 
              <description>Memory to memory mode</description>
5483 
              <bitOffset>14</bitOffset>
5484 
              <bitWidth>1</bitWidth>
5485 
            </field>
5486 
          </fields>
5487 
        </register>
5488 
        <register>
5489 
          <name>CNDTR2</name>
5490 
          <displayName>CNDTR2</displayName>
5491 
          <description>DMA channel 2 number of data
5492 
          register</description>
5493 
          <addressOffset>0x20</addressOffset>
5494 
          <size>0x20</size>
5495 
          <access>read-write</access>
5496 
          <resetValue>0x00000000</resetValue>
5497 
          <fields>
5498 
            <field>
5499 
              <name>NDT</name>
5500 
              <description>Number of data to transfer</description>
5501 
              <bitOffset>0</bitOffset>
5502 
              <bitWidth>16</bitWidth>
5503 
            </field>
5504 
          </fields>
5505 
        </register>
5506 
        <register>
5507 
          <name>CPAR2</name>
5508 
          <displayName>CPAR2</displayName>
5509 
          <description>DMA channel 2 peripheral address
5510 
          register</description>
5511 
          <addressOffset>0x24</addressOffset>
5512 
          <size>0x20</size>
5513 
          <access>read-write</access>
5514 
          <resetValue>0x00000000</resetValue>
5515 
          <fields>
5516 
            <field>
5517 
              <name>PA</name>
5518 
              <description>Peripheral address</description>
5519 
              <bitOffset>0</bitOffset>
5520 
              <bitWidth>32</bitWidth>
5521 
            </field>
5522 
          </fields>
5523 
        </register>
5524 
        <register>
5525 
          <name>CMAR2</name>
5526 
          <displayName>CMAR2</displayName>
5527 
          <description>DMA channel 2 memory address
5528 
          register</description>
5529 
          <addressOffset>0x28</addressOffset>
5530 
          <size>0x20</size>
5531 
          <access>read-write</access>
5532 
          <resetValue>0x00000000</resetValue>
5533 
          <fields>
5534 
            <field>
5535 
              <name>MA</name>
5536 
              <description>Memory address</description>
5537 
              <bitOffset>0</bitOffset>
5538 
              <bitWidth>32</bitWidth>
5539 
            </field>
5540 
          </fields>
5541 
        </register>
5542 
        <register>
5543 
          <name>CCR3</name>
5544 
          <displayName>CCR3</displayName>
5545 
          <description>DMA channel configuration register
5546 
          (DMA_CCR)</description>
5547 
          <addressOffset>0x30</addressOffset>
5548 
          <size>0x20</size>
5549 
          <access>read-write</access>
5550 
          <resetValue>0x00000000</resetValue>
5551 
          <fields>
5552 
            <field>
5553 
              <name>EN</name>
5554 
              <description>Channel enable</description>
5555 
              <bitOffset>0</bitOffset>
5556 
              <bitWidth>1</bitWidth>
5557 
            </field>
5558 
            <field>
5559 
              <name>TCIE</name>
5560 
              <description>Transfer complete interrupt
5561 
              enable</description>
5562 
              <bitOffset>1</bitOffset>
5563 
              <bitWidth>1</bitWidth>
5564 
            </field>
5565 
            <field>
5566 
              <name>HTIE</name>
5567 
              <description>Half Transfer interrupt
5568 
              enable</description>
5569 
              <bitOffset>2</bitOffset>
5570 
              <bitWidth>1</bitWidth>
5571 
            </field>
5572 
            <field>
5573 
              <name>TEIE</name>
5574 
              <description>Transfer error interrupt
5575 
              enable</description>
5576 
              <bitOffset>3</bitOffset>
5577 
              <bitWidth>1</bitWidth>
5578 
            </field>
5579 
            <field>
5580 
              <name>DIR</name>
5581 
              <description>Data transfer direction</description>
5582 
              <bitOffset>4</bitOffset>
5583 
              <bitWidth>1</bitWidth>
5584 
            </field>
5585 
            <field>
5586 
              <name>CIRC</name>
5587 
              <description>Circular mode</description>
5588 
              <bitOffset>5</bitOffset>
5589 
              <bitWidth>1</bitWidth>
5590 
            </field>
5591 
            <field>
5592 
              <name>PINC</name>
5593 
              <description>Peripheral increment mode</description>
5594 
              <bitOffset>6</bitOffset>
5595 
              <bitWidth>1</bitWidth>
5596 
            </field>
5597 
            <field>
5598 
              <name>MINC</name>
5599 
              <description>Memory increment mode</description>
5600 
              <bitOffset>7</bitOffset>
5601 
              <bitWidth>1</bitWidth>
5602 
            </field>
5603 
            <field>
5604 
              <name>PSIZE</name>
5605 
              <description>Peripheral size</description>
5606 
              <bitOffset>8</bitOffset>
5607 
              <bitWidth>2</bitWidth>
5608 
            </field>
5609 
            <field>
5610 
              <name>MSIZE</name>
5611 
              <description>Memory size</description>
5612 
              <bitOffset>10</bitOffset>
5613 
              <bitWidth>2</bitWidth>
5614 
            </field>
5615 
            <field>
5616 
              <name>PL</name>
5617 
              <description>Channel Priority level</description>
5618 
              <bitOffset>12</bitOffset>
5619 
              <bitWidth>2</bitWidth>
5620 
            </field>
5621 
            <field>
5622 
              <name>MEM2MEM</name>
5623 
              <description>Memory to memory mode</description>
5624 
              <bitOffset>14</bitOffset>
5625 
              <bitWidth>1</bitWidth>
5626 
            </field>
5627 
          </fields>
5628 
        </register>
5629 
        <register>
5630 
          <name>CNDTR3</name>
5631 
          <displayName>CNDTR3</displayName>
5632 
          <description>DMA channel 3 number of data
5633 
          register</description>
5634 
          <addressOffset>0x34</addressOffset>
5635 
          <size>0x20</size>
5636 
          <access>read-write</access>
5637 
          <resetValue>0x00000000</resetValue>
5638 
          <fields>
5639 
            <field>
5640 
              <name>NDT</name>
5641 
              <description>Number of data to transfer</description>
5642 
              <bitOffset>0</bitOffset>
5643 
              <bitWidth>16</bitWidth>
5644 
            </field>
5645 
          </fields>
5646 
        </register>
5647 
        <register>
5648 
          <name>CPAR3</name>
5649 
          <displayName>CPAR3</displayName>
5650 
          <description>DMA channel 3 peripheral address
5651 
          register</description>
5652 
          <addressOffset>0x38</addressOffset>
5653 
          <size>0x20</size>
5654 
          <access>read-write</access>
5655 
          <resetValue>0x00000000</resetValue>
5656 
          <fields>
5657 
            <field>
5658 
              <name>PA</name>
5659 
              <description>Peripheral address</description>
5660 
              <bitOffset>0</bitOffset>
5661 
              <bitWidth>32</bitWidth>
5662 
            </field>
5663 
          </fields>
5664 
        </register>
5665 
        <register>
5666 
          <name>CMAR3</name>
5667 
          <displayName>CMAR3</displayName>
5668 
          <description>DMA channel 3 memory address
5669 
          register</description>
5670 
          <addressOffset>0x3C</addressOffset>
5671 
          <size>0x20</size>
5672 
          <access>read-write</access>
5673 
          <resetValue>0x00000000</resetValue>
5674 
          <fields>
5675 
            <field>
5676 
              <name>MA</name>
5677 
              <description>Memory address</description>
5678 
              <bitOffset>0</bitOffset>
5679 
              <bitWidth>32</bitWidth>
5680 
            </field>
5681 
          </fields>
5682 
        </register>
5683 
        <register>
5684 
          <name>CCR4</name>
5685 
          <displayName>CCR4</displayName>
5686 
          <description>DMA channel configuration register
5687 
          (DMA_CCR)</description>
5688 
          <addressOffset>0x44</addressOffset>
5689 
          <size>0x20</size>
5690 
          <access>read-write</access>
5691 
          <resetValue>0x00000000</resetValue>
5692 
          <fields>
5693 
            <field>
5694 
              <name>EN</name>
5695 
              <description>Channel enable</description>
5696 
              <bitOffset>0</bitOffset>
5697 
              <bitWidth>1</bitWidth>
5698 
            </field>
5699 
            <field>
5700 
              <name>TCIE</name>
5701 
              <description>Transfer complete interrupt
5702 
              enable</description>
5703 
              <bitOffset>1</bitOffset>
5704 
              <bitWidth>1</bitWidth>
5705 
            </field>
5706 
            <field>
5707 
              <name>HTIE</name>
5708 
              <description>Half Transfer interrupt
5709 
              enable</description>
5710 
              <bitOffset>2</bitOffset>
5711 
              <bitWidth>1</bitWidth>
5712 
            </field>
5713 
            <field>
5714 
              <name>TEIE</name>
5715 
              <description>Transfer error interrupt
5716 
              enable</description>
5717 
              <bitOffset>3</bitOffset>
5718 
              <bitWidth>1</bitWidth>
5719 
            </field>
5720 
            <field>
5721 
              <name>DIR</name>
5722 
              <description>Data transfer direction</description>
5723 
              <bitOffset>4</bitOffset>
5724 
              <bitWidth>1</bitWidth>
5725 
            </field>
5726 
            <field>
5727 
              <name>CIRC</name>
5728 
              <description>Circular mode</description>
5729 
              <bitOffset>5</bitOffset>
5730 
              <bitWidth>1</bitWidth>
5731 
            </field>
5732 
            <field>
5733 
              <name>PINC</name>
5734 
              <description>Peripheral increment mode</description>
5735 
              <bitOffset>6</bitOffset>
5736 
              <bitWidth>1</bitWidth>
5737 
            </field>
5738 
            <field>
5739 
              <name>MINC</name>
5740 
              <description>Memory increment mode</description>
5741 
              <bitOffset>7</bitOffset>
5742 
              <bitWidth>1</bitWidth>
5743 
            </field>
5744 
            <field>
5745 
              <name>PSIZE</name>
5746 
              <description>Peripheral size</description>
5747 
              <bitOffset>8</bitOffset>
5748 
              <bitWidth>2</bitWidth>
5749 
            </field>
5750 
            <field>
5751 
              <name>MSIZE</name>
5752 
              <description>Memory size</description>
5753 
              <bitOffset>10</bitOffset>
5754 
              <bitWidth>2</bitWidth>
5755 
            </field>
5756 
            <field>
5757 
              <name>PL</name>
5758 
              <description>Channel Priority level</description>
5759 
              <bitOffset>12</bitOffset>
5760 
              <bitWidth>2</bitWidth>
5761 
            </field>
5762 
            <field>
5763 
              <name>MEM2MEM</name>
5764 
              <description>Memory to memory mode</description>
5765 
              <bitOffset>14</bitOffset>
5766 
              <bitWidth>1</bitWidth>
5767 
            </field>
5768 
          </fields>
5769 
        </register>
5770 
        <register>
5771 
          <name>CNDTR4</name>
5772 
          <displayName>CNDTR4</displayName>
5773 
          <description>DMA channel 4 number of data
5774 
          register</description>
5775 
          <addressOffset>0x48</addressOffset>
5776 
          <size>0x20</size>
5777 
          <access>read-write</access>
5778 
          <resetValue>0x00000000</resetValue>
5779 
          <fields>
5780 
            <field>
5781 
              <name>NDT</name>
5782 
              <description>Number of data to transfer</description>
5783 
              <bitOffset>0</bitOffset>
5784 
              <bitWidth>16</bitWidth>
5785 
            </field>
5786 
          </fields>
5787 
        </register>
5788 
        <register>
5789 
          <name>CPAR4</name>
5790 
          <displayName>CPAR4</displayName>
5791 
          <description>DMA channel 4 peripheral address
5792 
          register</description>
5793 
          <addressOffset>0x4C</addressOffset>
5794 
          <size>0x20</size>
5795 
          <access>read-write</access>
5796 
          <resetValue>0x00000000</resetValue>
5797 
          <fields>
5798 
            <field>
5799 
              <name>PA</name>
5800 
              <description>Peripheral address</description>
5801 
              <bitOffset>0</bitOffset>
5802 
              <bitWidth>32</bitWidth>
5803 
            </field>
5804 
          </fields>
5805 
        </register>
5806 
        <register>
5807 
          <name>CMAR4</name>
5808 
          <displayName>CMAR4</displayName>
5809 
          <description>DMA channel 4 memory address
5810 
          register</description>
5811 
          <addressOffset>0x50</addressOffset>
5812 
          <size>0x20</size>
5813 
          <access>read-write</access>
5814 
          <resetValue>0x00000000</resetValue>
5815 
          <fields>
5816 
            <field>
5817 
              <name>MA</name>
5818 
              <description>Memory address</description>
5819 
              <bitOffset>0</bitOffset>
5820 
              <bitWidth>32</bitWidth>
5821 
            </field>
5822 
          </fields>
5823 
        </register>
5824 
        <register>
5825 
          <name>CCR5</name>
5826 
          <displayName>CCR5</displayName>
5827 
          <description>DMA channel configuration register
5828 
          (DMA_CCR)</description>
5829 
          <addressOffset>0x58</addressOffset>
5830 
          <size>0x20</size>
5831 
          <access>read-write</access>
5832 
          <resetValue>0x00000000</resetValue>
5833 
          <fields>
5834 
            <field>
5835 
              <name>EN</name>
5836 
              <description>Channel enable</description>
5837 
              <bitOffset>0</bitOffset>
5838 
              <bitWidth>1</bitWidth>
5839 
            </field>
5840 
            <field>
5841 
              <name>TCIE</name>
5842 
              <description>Transfer complete interrupt
5843 
              enable</description>
5844 
              <bitOffset>1</bitOffset>
5845 
              <bitWidth>1</bitWidth>
5846 
            </field>
5847 
            <field>
5848 
              <name>HTIE</name>
5849 
              <description>Half Transfer interrupt
5850 
              enable</description>
5851 
              <bitOffset>2</bitOffset>
5852 
              <bitWidth>1</bitWidth>
5853 
            </field>
5854 
            <field>
5855 
              <name>TEIE</name>
5856 
              <description>Transfer error interrupt
5857 
              enable</description>
5858 
              <bitOffset>3</bitOffset>
5859 
              <bitWidth>1</bitWidth>
5860 
            </field>
5861 
            <field>
5862 
              <name>DIR</name>
5863 
              <description>Data transfer direction</description>
5864 
              <bitOffset>4</bitOffset>
5865 
              <bitWidth>1</bitWidth>
5866 
            </field>
5867 
            <field>
5868 
              <name>CIRC</name>
5869 
              <description>Circular mode</description>
5870 
              <bitOffset>5</bitOffset>
5871 
              <bitWidth>1</bitWidth>
5872 
            </field>
5873 
            <field>
5874 
              <name>PINC</name>
5875 
              <description>Peripheral increment mode</description>
5876 
              <bitOffset>6</bitOffset>
5877 
              <bitWidth>1</bitWidth>
5878 
            </field>
5879 
            <field>
5880 
              <name>MINC</name>
5881 
              <description>Memory increment mode</description>
5882 
              <bitOffset>7</bitOffset>
5883 
              <bitWidth>1</bitWidth>
5884 
            </field>
5885 
            <field>
5886 
              <name>PSIZE</name>
5887 
              <description>Peripheral size</description>
5888 
              <bitOffset>8</bitOffset>
5889 
              <bitWidth>2</bitWidth>
5890 
            </field>
5891 
            <field>
5892 
              <name>MSIZE</name>
5893 
              <description>Memory size</description>
5894 
              <bitOffset>10</bitOffset>
5895 
              <bitWidth>2</bitWidth>
5896 
            </field>
5897 
            <field>
5898 
              <name>PL</name>
5899 
              <description>Channel Priority level</description>
5900 
              <bitOffset>12</bitOffset>
5901 
              <bitWidth>2</bitWidth>
5902 
            </field>
5903 
            <field>
5904 
              <name>MEM2MEM</name>
5905 
              <description>Memory to memory mode</description>
5906 
              <bitOffset>14</bitOffset>
5907 
              <bitWidth>1</bitWidth>
5908 
            </field>
5909 
          </fields>
5910 
        </register>
5911 
        <register>
5912 
          <name>CNDTR5</name>
5913 
          <displayName>CNDTR5</displayName>
5914 
          <description>DMA channel 5 number of data
5915 
          register</description>
5916 
          <addressOffset>0x5C</addressOffset>
5917 
          <size>0x20</size>
5918 
          <access>read-write</access>
5919 
          <resetValue>0x00000000</resetValue>
5920 
          <fields>
5921 
            <field>
5922 
              <name>NDT</name>
5923 
              <description>Number of data to transfer</description>
5924 
              <bitOffset>0</bitOffset>
5925 
              <bitWidth>16</bitWidth>
5926 
            </field>
5927 
          </fields>
5928 
        </register>
5929 
        <register>
5930 
          <name>CPAR5</name>
5931 
          <displayName>CPAR5</displayName>
5932 
          <description>DMA channel 5 peripheral address
5933 
          register</description>
5934 
          <addressOffset>0x60</addressOffset>
5935 
          <size>0x20</size>
5936 
          <access>read-write</access>
5937 
          <resetValue>0x00000000</resetValue>
5938 
          <fields>
5939 
            <field>
5940 
              <name>PA</name>
5941 
              <description>Peripheral address</description>
5942 
              <bitOffset>0</bitOffset>
5943 
              <bitWidth>32</bitWidth>
5944 
            </field>
5945 
          </fields>
5946 
        </register>
5947 
        <register>
5948 
          <name>CMAR5</name>
5949 
          <displayName>CMAR5</displayName>
5950 
          <description>DMA channel 5 memory address
5951 
          register</description>
5952 
          <addressOffset>0x64</addressOffset>
5953 
          <size>0x20</size>
5954 
          <access>read-write</access>
5955 
          <resetValue>0x00000000</resetValue>
5956 
          <fields>
5957 
            <field>
5958 
              <name>MA</name>
5959 
              <description>Memory address</description>
5960 
              <bitOffset>0</bitOffset>
5961 
              <bitWidth>32</bitWidth>
5962 
            </field>
5963 
          </fields>
5964 
        </register>
5965 
        <register>
5966 
          <name>CCR6</name>
5967 
          <displayName>CCR6</displayName>
5968 
          <description>DMA channel configuration register
5969 
          (DMA_CCR)</description>
5970 
          <addressOffset>0x6C</addressOffset>
5971 
          <size>0x20</size>
5972 
          <access>read-write</access>
5973 
          <resetValue>0x00000000</resetValue>
5974 
          <fields>
5975 
            <field>
5976 
              <name>EN</name>
5977 
              <description>Channel enable</description>
5978 
              <bitOffset>0</bitOffset>
5979 
              <bitWidth>1</bitWidth>
5980 
            </field>
5981 
            <field>
5982 
              <name>TCIE</name>
5983 
              <description>Transfer complete interrupt
5984 
              enable</description>
5985 
              <bitOffset>1</bitOffset>
5986 
              <bitWidth>1</bitWidth>
5987 
            </field>
5988 
            <field>
5989 
              <name>HTIE</name>
5990 
              <description>Half Transfer interrupt
5991 
              enable</description>
5992 
              <bitOffset>2</bitOffset>
5993 
              <bitWidth>1</bitWidth>
5994 
            </field>
5995 
            <field>
5996 
              <name>TEIE</name>
5997 
              <description>Transfer error interrupt
5998 
              enable</description>
5999 
              <bitOffset>3</bitOffset>
6000 
              <bitWidth>1</bitWidth>
6001 
            </field>
6002 
            <field>
6003 
              <name>DIR</name>
6004 
              <description>Data transfer direction</description>
6005 
              <bitOffset>4</bitOffset>
6006 
              <bitWidth>1</bitWidth>
6007 
            </field>
6008 
            <field>
6009 
              <name>CIRC</name>
6010 
              <description>Circular mode</description>
6011 
              <bitOffset>5</bitOffset>
6012 
              <bitWidth>1</bitWidth>
6013 
            </field>
6014 
            <field>
6015 
              <name>PINC</name>
6016 
              <description>Peripheral increment mode</description>
6017 
              <bitOffset>6</bitOffset>
6018 
              <bitWidth>1</bitWidth>
6019 
            </field>
6020 
            <field>
6021 
              <name>MINC</name>
6022 
              <description>Memory increment mode</description>
6023 
              <bitOffset>7</bitOffset>
6024 
              <bitWidth>1</bitWidth>
6025 
            </field>
6026 
            <field>
6027 
              <name>PSIZE</name>
6028 
              <description>Peripheral size</description>
6029 
              <bitOffset>8</bitOffset>
6030 
              <bitWidth>2</bitWidth>
6031 
            </field>
6032 
            <field>
6033 
              <name>MSIZE</name>
6034 
              <description>Memory size</description>
6035 
              <bitOffset>10</bitOffset>
6036 
              <bitWidth>2</bitWidth>
6037 
            </field>
6038 
            <field>
6039 
              <name>PL</name>
6040 
              <description>Channel Priority level</description>
6041 
              <bitOffset>12</bitOffset>
6042 
              <bitWidth>2</bitWidth>
6043 
            </field>
6044 
            <field>
6045 
              <name>MEM2MEM</name>
6046 
              <description>Memory to memory mode</description>
6047 
              <bitOffset>14</bitOffset>
6048 
              <bitWidth>1</bitWidth>
6049 
            </field>
6050 
          </fields>
6051 
        </register>
6052 
        <register>
6053 
          <name>CNDTR6</name>
6054 
          <displayName>CNDTR6</displayName>
6055 
          <description>DMA channel 6 number of data
6056 
          register</description>
6057 
          <addressOffset>0x70</addressOffset>
6058 
          <size>0x20</size>
6059 
          <access>read-write</access>
6060 
          <resetValue>0x00000000</resetValue>
6061 
          <fields>
6062 
            <field>
6063 
              <name>NDT</name>
6064 
              <description>Number of data to transfer</description>
6065 
              <bitOffset>0</bitOffset>
6066 
              <bitWidth>16</bitWidth>
6067 
            </field>
6068 
          </fields>
6069 
        </register>
6070 
        <register>
6071 
          <name>CPAR6</name>
6072 
          <displayName>CPAR6</displayName>
6073 
          <description>DMA channel 6 peripheral address
6074 
          register</description>
6075 
          <addressOffset>0x74</addressOffset>
6076 
          <size>0x20</size>
6077 
          <access>read-write</access>
6078 
          <resetValue>0x00000000</resetValue>
6079 
          <fields>
6080 
            <field>
6081 
              <name>PA</name>
6082 
              <description>Peripheral address</description>
6083 
              <bitOffset>0</bitOffset>
6084 
              <bitWidth>32</bitWidth>
6085 
            </field>
6086 
          </fields>
6087 
        </register>
6088 
        <register>
6089 
          <name>CMAR6</name>
6090 
          <displayName>CMAR6</displayName>
6091 
          <description>DMA channel 6 memory address
6092 
          register</description>
6093 
          <addressOffset>0x78</addressOffset>
6094 
          <size>0x20</size>
6095 
          <access>read-write</access>
6096 
          <resetValue>0x00000000</resetValue>
6097 
          <fields>
6098 
            <field>
6099 
              <name>MA</name>
6100 
              <description>Memory address</description>
6101 
              <bitOffset>0</bitOffset>
6102 
              <bitWidth>32</bitWidth>
6103 
            </field>
6104 
          </fields>
6105 
        </register>
6106 
        <register>
6107 
          <name>CCR7</name>
6108 
          <displayName>CCR7</displayName>
6109 
          <description>DMA channel configuration register
6110 
          (DMA_CCR)</description>
6111 
          <addressOffset>0x80</addressOffset>
6112 
          <size>0x20</size>
6113 
          <access>read-write</access>
6114 
          <resetValue>0x00000000</resetValue>
6115 
          <fields>
6116 
            <field>
6117 
              <name>EN</name>
6118 
              <description>Channel enable</description>
6119 
              <bitOffset>0</bitOffset>
6120 
              <bitWidth>1</bitWidth>
6121 
            </field>
6122 
            <field>
6123 
              <name>TCIE</name>
6124 
              <description>Transfer complete interrupt
6125 
              enable</description>
6126 
              <bitOffset>1</bitOffset>
6127 
              <bitWidth>1</bitWidth>
6128 
            </field>
6129 
            <field>
6130 
              <name>HTIE</name>
6131 
              <description>Half Transfer interrupt
6132 
              enable</description>
6133 
              <bitOffset>2</bitOffset>
6134 
              <bitWidth>1</bitWidth>
6135 
            </field>
6136 
            <field>
6137 
              <name>TEIE</name>
6138 
              <description>Transfer error interrupt
6139 
              enable</description>
6140 
              <bitOffset>3</bitOffset>
6141 
              <bitWidth>1</bitWidth>
6142 
            </field>
6143 
            <field>
6144 
              <name>DIR</name>
6145 
              <description>Data transfer direction</description>
6146 
              <bitOffset>4</bitOffset>
6147 
              <bitWidth>1</bitWidth>
6148 
            </field>
6149 
            <field>
6150 
              <name>CIRC</name>
6151 
              <description>Circular mode</description>
6152 
              <bitOffset>5</bitOffset>
6153 
              <bitWidth>1</bitWidth>
6154 
            </field>
6155 
            <field>
6156 
              <name>PINC</name>
6157 
              <description>Peripheral increment mode</description>
6158 
              <bitOffset>6</bitOffset>
6159 
              <bitWidth>1</bitWidth>
6160 
            </field>
6161 
            <field>
6162 
              <name>MINC</name>
6163 
              <description>Memory increment mode</description>
6164 
              <bitOffset>7</bitOffset>
6165 
              <bitWidth>1</bitWidth>
6166 
            </field>
6167 
            <field>
6168 
              <name>PSIZE</name>
6169 
              <description>Peripheral size</description>
6170 
              <bitOffset>8</bitOffset>
6171 
              <bitWidth>2</bitWidth>
6172 
            </field>
6173 
            <field>
6174 
              <name>MSIZE</name>
6175 
              <description>Memory size</description>
6176 
              <bitOffset>10</bitOffset>
6177 
              <bitWidth>2</bitWidth>
6178 
            </field>
6179 
            <field>
6180 
              <name>PL</name>
6181 
              <description>Channel Priority level</description>
6182 
              <bitOffset>12</bitOffset>
6183 
              <bitWidth>2</bitWidth>
6184 
            </field>
6185 
            <field>
6186 
              <name>MEM2MEM</name>
6187 
              <description>Memory to memory mode</description>
6188 
              <bitOffset>14</bitOffset>
6189 
              <bitWidth>1</bitWidth>
6190 
            </field>
6191 
          </fields>
6192 
        </register>
6193 
        <register>
6194 
          <name>CNDTR7</name>
6195 
          <displayName>CNDTR7</displayName>
6196 
          <description>DMA channel 7 number of data
6197 
          register</description>
6198 
          <addressOffset>0x84</addressOffset>
6199 
          <size>0x20</size>
6200 
          <access>read-write</access>
6201 
          <resetValue>0x00000000</resetValue>
6202 
          <fields>
6203 
            <field>
6204 
              <name>NDT</name>
6205 
              <description>Number of data to transfer</description>
6206 
              <bitOffset>0</bitOffset>
6207 
              <bitWidth>16</bitWidth>
6208 
            </field>
6209 
          </fields>
6210 
        </register>
6211 
        <register>
6212 
          <name>CPAR7</name>
6213 
          <displayName>CPAR7</displayName>
6214 
          <description>DMA channel 7 peripheral address
6215 
          register</description>
6216 
          <addressOffset>0x88</addressOffset>
6217 
          <size>0x20</size>
6218 
          <access>read-write</access>
6219 
          <resetValue>0x00000000</resetValue>
6220 
          <fields>
6221 
            <field>
6222 
              <name>PA</name>
6223 
              <description>Peripheral address</description>
6224 
              <bitOffset>0</bitOffset>
6225 
              <bitWidth>32</bitWidth>
6226 
            </field>
6227 
          </fields>
6228 
        </register>
6229 
        <register>
6230 
          <name>CMAR7</name>
6231 
          <displayName>CMAR7</displayName>
6232 
          <description>DMA channel 7 memory address
6233 
          register</description>
6234 
          <addressOffset>0x8C</addressOffset>
6235 
          <size>0x20</size>
6236 
          <access>read-write</access>
6237 
          <resetValue>0x00000000</resetValue>
6238 
          <fields>
6239 
            <field>
6240 
              <name>MA</name>
6241 
              <description>Memory address</description>
6242 
              <bitOffset>0</bitOffset>
6243 
              <bitWidth>32</bitWidth>
6244 
            </field>
6245 
          </fields>
6246 
        </register>
6247 
      </registers>
6248 
    </peripheral>
6249 
    <peripheral derivedFrom="DMA1">
6250 
      <name>DMA2</name>
6251 
      <baseAddress>0x40020400</baseAddress>
6252 
      <interrupt>
6253 
        <name>DMA2_Channel1</name>
6254 
        <description>DMA2 Channel1 global interrupt</description>
6255 
        <value>56</value>
6256 
      </interrupt>
6257 
      <interrupt>
6258 
        <name>DMA2_Channel2</name>
6259 
        <description>DMA2 Channel2 global interrupt</description>
6260 
        <value>57</value>
6261 
      </interrupt>
6262 
      <interrupt>
6263 
        <name>DMA2_Channel3</name>
6264 
        <description>DMA2 Channel3 global interrupt</description>
6265 
        <value>58</value>
6266 
      </interrupt>
6267 
      <interrupt>
6268 
        <name>DMA2_Channel4_5</name>
6269 
        <description>DMA2 Channel4 and DMA2 Channel5 global
6270 
        interrupt</description>
6271 
        <value>59</value>
6272 
      </interrupt>
6273 
    </peripheral>
6274 
    <peripheral>
6275 
      <name>SDIO</name>
6276 
      <description>Secure digital input/output
6277 
      interface</description>
6278 
      <groupName>SDIO</groupName>
6279 
      <baseAddress>0x40018000</baseAddress>
6280 
      <addressBlock>
6281 
        <offset>0x0</offset>
6282 
        <size>0x400</size>
6283 
        <usage>registers</usage>
6284 
      </addressBlock>
6285 
      <interrupt>
6286 
        <name>SDIO</name>
6287 
        <description>SDIO global interrupt</description>
6288 
        <value>49</value>
6289 
      </interrupt>
6290 
      <registers>
6291 
        <register>
6292 
          <name>POWER</name>
6293 
          <displayName>POWER</displayName>
6294 
          <description>Bits 1:0 = PWRCTRL: Power supply control
6295 
          bits</description>
6296 
          <addressOffset>0x0</addressOffset>
6297 
          <size>0x20</size>
6298 
          <access>read-write</access>
6299 
          <resetValue>0x00000000</resetValue>
6300 
          <fields>
6301 
            <field>
6302 
              <name>PWRCTRL</name>
6303 
              <description>PWRCTRL</description>
6304 
              <bitOffset>0</bitOffset>
6305 
              <bitWidth>2</bitWidth>
6306 
            </field>
6307 
          </fields>
6308 
        </register>
6309 
        <register>
6310 
          <name>CLKCR</name>
6311 
          <displayName>CLKCR</displayName>
6312 
          <description>SDI clock control register
6313 
          (SDIO_CLKCR)</description>
6314 
          <addressOffset>0x4</addressOffset>
6315 
          <size>0x20</size>
6316 
          <access>read-write</access>
6317 
          <resetValue>0x00000000</resetValue>
6318 
          <fields>
6319 
            <field>
6320 
              <name>CLKDIV</name>
6321 
              <description>Clock divide factor</description>
6322 
              <bitOffset>0</bitOffset>
6323 
              <bitWidth>8</bitWidth>
6324 
            </field>
6325 
            <field>
6326 
              <name>CLKEN</name>
6327 
              <description>Clock enable bit</description>
6328 
              <bitOffset>8</bitOffset>
6329 
              <bitWidth>1</bitWidth>
6330 
            </field>
6331 
            <field>
6332 
              <name>PWRSAV</name>
6333 
              <description>Power saving configuration
6334 
              bit</description>
6335 
              <bitOffset>9</bitOffset>
6336 
              <bitWidth>1</bitWidth>
6337 
            </field>
6338 
            <field>
6339 
              <name>BYPASS</name>
6340 
              <description>Clock divider bypass enable
6341 
              bit</description>
6342 
              <bitOffset>10</bitOffset>
6343 
              <bitWidth>1</bitWidth>
6344 
            </field>
6345 
            <field>
6346 
              <name>WIDBUS</name>
6347 
              <description>Wide bus mode enable bit</description>
6348 
              <bitOffset>11</bitOffset>
6349 
              <bitWidth>2</bitWidth>
6350 
            </field>
6351 
            <field>
6352 
              <name>NEGEDGE</name>
6353 
              <description>SDIO_CK dephasing selection
6354 
              bit</description>
6355 
              <bitOffset>13</bitOffset>
6356 
              <bitWidth>1</bitWidth>
6357 
            </field>
6358 
            <field>
6359 
              <name>HWFC_EN</name>
6360 
              <description>HW Flow Control enable</description>
6361 
              <bitOffset>14</bitOffset>
6362 
              <bitWidth>1</bitWidth>
6363 
            </field>
6364 
          </fields>
6365 
        </register>
6366 
        <register>
6367 
          <name>ARG</name>
6368 
          <displayName>ARG</displayName>
6369 
          <description>Bits 31:0 = : Command argument</description>
6370 
          <addressOffset>0x8</addressOffset>
6371 
          <size>0x20</size>
6372 
          <access>read-write</access>
6373 
          <resetValue>0x00000000</resetValue>
6374 
          <fields>
6375 
            <field>
6376 
              <name>CMDARG</name>
6377 
              <description>Command argument</description>
6378 
              <bitOffset>0</bitOffset>
6379 
              <bitWidth>32</bitWidth>
6380 
            </field>
6381 
          </fields>
6382 
        </register>
6383 
        <register>
6384 
          <name>CMD</name>
6385 
          <displayName>CMD</displayName>
6386 
          <description>SDIO command register
6387 
          (SDIO_CMD)</description>
6388 
          <addressOffset>0xC</addressOffset>
6389 
          <size>0x20</size>
6390 
          <access>read-write</access>
6391 
          <resetValue>0x00000000</resetValue>
6392 
          <fields>
6393 
            <field>
6394 
              <name>CMDINDEX</name>
6395 
              <description>CMDINDEX</description>
6396 
              <bitOffset>0</bitOffset>
6397 
              <bitWidth>6</bitWidth>
6398 
            </field>
6399 
            <field>
6400 
              <name>WAITRESP</name>
6401 
              <description>WAITRESP</description>
6402 
              <bitOffset>6</bitOffset>
6403 
              <bitWidth>2</bitWidth>
6404 
            </field>
6405 
            <field>
6406 
              <name>WAITINT</name>
6407 
              <description>WAITINT</description>
6408 
              <bitOffset>8</bitOffset>
6409 
              <bitWidth>1</bitWidth>
6410 
            </field>
6411 
            <field>
6412 
              <name>WAITPEND</name>
6413 
              <description>WAITPEND</description>
6414 
              <bitOffset>9</bitOffset>
6415 
              <bitWidth>1</bitWidth>
6416 
            </field>
6417 
            <field>
6418 
              <name>CPSMEN</name>
6419 
              <description>CPSMEN</description>
6420 
              <bitOffset>10</bitOffset>
6421 
              <bitWidth>1</bitWidth>
6422 
            </field>
6423 
            <field>
6424 
              <name>SDIOSuspend</name>
6425 
              <description>SDIOSuspend</description>
6426 
              <bitOffset>11</bitOffset>
6427 
              <bitWidth>1</bitWidth>
6428 
            </field>
6429 
            <field>
6430 
              <name>ENCMDcompl</name>
6431 
              <description>ENCMDcompl</description>
6432 
              <bitOffset>12</bitOffset>
6433 
              <bitWidth>1</bitWidth>
6434 
            </field>
6435 
            <field>
6436 
              <name>nIEN</name>
6437 
              <description>nIEN</description>
6438 
              <bitOffset>13</bitOffset>
6439 
              <bitWidth>1</bitWidth>
6440 
            </field>
6441 
            <field>
6442 
              <name>CE_ATACMD</name>
6443 
              <description>CE_ATACMD</description>
6444 
              <bitOffset>14</bitOffset>
6445 
              <bitWidth>1</bitWidth>
6446 
            </field>
6447 
          </fields>
6448 
        </register>
6449 
        <register>
6450 
          <name>RESPCMD</name>
6451 
          <displayName>RESPCMD</displayName>
6452 
          <description>SDIO command register</description>
6453 
          <addressOffset>0x10</addressOffset>
6454 
          <size>0x20</size>
6455 
          <access>read-only</access>
6456 
          <resetValue>0x00000000</resetValue>
6457 
          <fields>
6458 
            <field>
6459 
              <name>RESPCMD</name>
6460 
              <description>RESPCMD</description>
6461 
              <bitOffset>0</bitOffset>
6462 
              <bitWidth>6</bitWidth>
6463 
            </field>
6464 
          </fields>
6465 
        </register>
6466 
        <register>
6467 
          <name>RESPI1</name>
6468 
          <displayName>RESPI1</displayName>
6469 
          <description>Bits 31:0 = CARDSTATUS1</description>
6470 
          <addressOffset>0x14</addressOffset>
6471 
          <size>0x20</size>
6472 
          <access>read-only</access>
6473 
          <resetValue>0x00000000</resetValue>
6474 
          <fields>
6475 
            <field>
6476 
              <name>CARDSTATUS1</name>
6477 
              <description>CARDSTATUS1</description>
6478 
              <bitOffset>0</bitOffset>
6479 
              <bitWidth>32</bitWidth>
6480 
            </field>
6481 
          </fields>
6482 
        </register>
6483 
        <register>
6484 
          <name>RESP2</name>
6485 
          <displayName>RESP2</displayName>
6486 
          <description>Bits 31:0 = CARDSTATUS2</description>
6487 
          <addressOffset>0x18</addressOffset>
6488 
          <size>0x20</size>
6489 
          <access>read-only</access>
6490 
          <resetValue>0x00000000</resetValue>
6491 
          <fields>
6492 
            <field>
6493 
              <name>CARDSTATUS2</name>
6494 
              <description>CARDSTATUS2</description>
6495 
              <bitOffset>0</bitOffset>
6496 
              <bitWidth>32</bitWidth>
6497 
            </field>
6498 
          </fields>
6499 
        </register>
6500 
        <register>
6501 
          <name>RESP3</name>
6502 
          <displayName>RESP3</displayName>
6503 
          <description>Bits 31:0 = CARDSTATUS3</description>
6504 
          <addressOffset>0x1C</addressOffset>
6505 
          <size>0x20</size>
6506 
          <access>read-only</access>
6507 
          <resetValue>0x00000000</resetValue>
6508 
          <fields>
6509 
            <field>
6510 
              <name>CARDSTATUS3</name>
6511 
              <description>CARDSTATUS3</description>
6512 
              <bitOffset>0</bitOffset>
6513 
              <bitWidth>32</bitWidth>
6514 
            </field>
6515 
          </fields>
6516 
        </register>
6517 
        <register>
6518 
          <name>RESP4</name>
6519 
          <displayName>RESP4</displayName>
6520 
          <description>Bits 31:0 = CARDSTATUS4</description>
6521 
          <addressOffset>0x20</addressOffset>
6522 
          <size>0x20</size>
6523 
          <access>read-only</access>
6524 
          <resetValue>0x00000000</resetValue>
6525 
          <fields>
6526 
            <field>
6527 
              <name>CARDSTATUS4</name>
6528 
              <description>CARDSTATUS4</description>
6529 
              <bitOffset>0</bitOffset>
6530 
              <bitWidth>32</bitWidth>
6531 
            </field>
6532 
          </fields>
6533 
        </register>
6534 
        <register>
6535 
          <name>DTIMER</name>
6536 
          <displayName>DTIMER</displayName>
6537 
          <description>Bits 31:0 = DATATIME: Data timeout
6538 
          period</description>
6539 
          <addressOffset>0x24</addressOffset>
6540 
          <size>0x20</size>
6541 
          <access>read-write</access>
6542 
          <resetValue>0x00000000</resetValue>
6543 
          <fields>
6544 
            <field>
6545 
              <name>DATATIME</name>
6546 
              <description>Data timeout period</description>
6547 
              <bitOffset>0</bitOffset>
6548 
              <bitWidth>32</bitWidth>
6549 
            </field>
6550 
          </fields>
6551 
        </register>
6552 
        <register>
6553 
          <name>DLEN</name>
6554 
          <displayName>DLEN</displayName>
6555 
          <description>Bits 24:0 = DATALENGTH: Data length
6556 
          value</description>
6557 
          <addressOffset>0x28</addressOffset>
6558 
          <size>0x20</size>
6559 
          <access>read-write</access>
6560 
          <resetValue>0x00000000</resetValue>
6561 
          <fields>
6562 
            <field>
6563 
              <name>DATALENGTH</name>
6564 
              <description>Data length value</description>
6565 
              <bitOffset>0</bitOffset>
6566 
              <bitWidth>25</bitWidth>
6567 
            </field>
6568 
          </fields>
6569 
        </register>
6570 
        <register>
6571 
          <name>DCTRL</name>
6572 
          <displayName>DCTRL</displayName>
6573 
          <description>SDIO data control register
6574 
          (SDIO_DCTRL)</description>
6575 
          <addressOffset>0x2C</addressOffset>
6576 
          <size>0x20</size>
6577 
          <access>read-write</access>
6578 
          <resetValue>0x00000000</resetValue>
6579 
          <fields>
6580 
            <field>
6581 
              <name>DTEN</name>
6582 
              <description>DTEN</description>
6583 
              <bitOffset>0</bitOffset>
6584 
              <bitWidth>1</bitWidth>
6585 
            </field>
6586 
            <field>
6587 
              <name>DTDIR</name>
6588 
              <description>DTDIR</description>
6589 
              <bitOffset>1</bitOffset>
6590 
              <bitWidth>1</bitWidth>
6591 
            </field>
6592 
            <field>
6593 
              <name>DTMODE</name>
6594 
              <description>DTMODE</description>
6595 
              <bitOffset>2</bitOffset>
6596 
              <bitWidth>1</bitWidth>
6597 
            </field>
6598 
            <field>
6599 
              <name>DMAEN</name>
6600 
              <description>DMAEN</description>
6601 
              <bitOffset>3</bitOffset>
6602 
              <bitWidth>1</bitWidth>
6603 
            </field>
6604 
            <field>
6605 
              <name>DBLOCKSIZE</name>
6606 
              <description>DBLOCKSIZE</description>
6607 
              <bitOffset>4</bitOffset>
6608 
              <bitWidth>4</bitWidth>
6609 
            </field>
6610 
            <field>
6611 
              <name>PWSTART</name>
6612 
              <description>PWSTART</description>
6613 
              <bitOffset>8</bitOffset>
6614 
              <bitWidth>1</bitWidth>
6615 
            </field>
6616 
            <field>
6617 
              <name>PWSTOP</name>
6618 
              <description>PWSTOP</description>
6619 
              <bitOffset>9</bitOffset>
6620 
              <bitWidth>1</bitWidth>
6621 
            </field>
6622 
            <field>
6623 
              <name>RWMOD</name>
6624 
              <description>RWMOD</description>
6625 
              <bitOffset>10</bitOffset>
6626 
              <bitWidth>1</bitWidth>
6627 
            </field>
6628 
            <field>
6629 
              <name>SDIOEN</name>
6630 
              <description>SDIOEN</description>
6631 
              <bitOffset>11</bitOffset>
6632 
              <bitWidth>1</bitWidth>
6633 
            </field>
6634 
          </fields>
6635 
        </register>
6636 
        <register>
6637 
          <name>DCOUNT</name>
6638 
          <displayName>DCOUNT</displayName>
6639 
          <description>Bits 24:0 = DATACOUNT: Data count
6640 
          value</description>
6641 
          <addressOffset>0x30</addressOffset>
6642 
          <size>0x20</size>
6643 
          <access>read-only</access>
6644 
          <resetValue>0x00000000</resetValue>
6645 
          <fields>
6646 
            <field>
6647 
              <name>DATACOUNT</name>
6648 
              <description>Data count value</description>
6649 
              <bitOffset>0</bitOffset>
6650 
              <bitWidth>25</bitWidth>
6651 
            </field>
6652 
          </fields>
6653 
        </register>
6654 
        <register>
6655 
          <name>STA</name>
6656 
          <displayName>STA</displayName>
6657 
          <description>SDIO status register
6658 
          (SDIO_STA)</description>
6659 
          <addressOffset>0x34</addressOffset>
6660 
          <size>0x20</size>
6661 
          <access>read-only</access>
6662 
          <resetValue>0x00000000</resetValue>
6663 
          <fields>
6664 
            <field>
6665 
              <name>CCRCFAIL</name>
6666 
              <description>CCRCFAIL</description>
6667 
              <bitOffset>0</bitOffset>
6668 
              <bitWidth>1</bitWidth>
6669 
            </field>
6670 
            <field>
6671 
              <name>DCRCFAIL</name>
6672 
              <description>DCRCFAIL</description>
6673 
              <bitOffset>1</bitOffset>
6674 
              <bitWidth>1</bitWidth>
6675 
            </field>
6676 
            <field>
6677 
              <name>CTIMEOUT</name>
6678 
              <description>CTIMEOUT</description>
6679 
              <bitOffset>2</bitOffset>
6680 
              <bitWidth>1</bitWidth>
6681 
            </field>
6682 
            <field>
6683 
              <name>DTIMEOUT</name>
6684 
              <description>DTIMEOUT</description>
6685 
              <bitOffset>3</bitOffset>
6686 
              <bitWidth>1</bitWidth>
6687 
            </field>
6688 
            <field>
6689 
              <name>TXUNDERR</name>
6690 
              <description>TXUNDERR</description>
6691 
              <bitOffset>4</bitOffset>
6692 
              <bitWidth>1</bitWidth>
6693 
            </field>
6694 
            <field>
6695 
              <name>RXOVERR</name>
6696 
              <description>RXOVERR</description>
6697 
              <bitOffset>5</bitOffset>
6698 
              <bitWidth>1</bitWidth>
6699 
            </field>
6700 
            <field>
6701 
              <name>CMDREND</name>
6702 
              <description>CMDREND</description>
6703 
              <bitOffset>6</bitOffset>
6704 
              <bitWidth>1</bitWidth>
6705 
            </field>
6706 
            <field>
6707 
              <name>CMDSENT</name>
6708 
              <description>CMDSENT</description>
6709 
              <bitOffset>7</bitOffset>
6710 
              <bitWidth>1</bitWidth>
6711 
            </field>
6712 
            <field>
6713 
              <name>DATAEND</name>
6714 
              <description>DATAEND</description>
6715 
              <bitOffset>8</bitOffset>
6716 
              <bitWidth>1</bitWidth>
6717 
            </field>
6718 
            <field>
6719 
              <name>STBITERR</name>
6720 
              <description>STBITERR</description>
6721 
              <bitOffset>9</bitOffset>
6722 
              <bitWidth>1</bitWidth>
6723 
            </field>
6724 
            <field>
6725 
              <name>DBCKEND</name>
6726 
              <description>DBCKEND</description>
6727 
              <bitOffset>10</bitOffset>
6728 
              <bitWidth>1</bitWidth>
6729 
            </field>
6730 
            <field>
6731 
              <name>CMDACT</name>
6732 
              <description>CMDACT</description>
6733 
              <bitOffset>11</bitOffset>
6734 
              <bitWidth>1</bitWidth>
6735 
            </field>
6736 
            <field>
6737 
              <name>TXACT</name>
6738 
              <description>TXACT</description>
6739 
              <bitOffset>12</bitOffset>
6740 
              <bitWidth>1</bitWidth>
6741 
            </field>
6742 
            <field>
6743 
              <name>RXACT</name>
6744 
              <description>RXACT</description>
6745 
              <bitOffset>13</bitOffset>
6746 
              <bitWidth>1</bitWidth>
6747 
            </field>
6748 
            <field>
6749 
              <name>TXFIFOHE</name>
6750 
              <description>TXFIFOHE</description>
6751 
              <bitOffset>14</bitOffset>
6752 
              <bitWidth>1</bitWidth>
6753 
            </field>
6754 
            <field>
6755 
              <name>RXFIFOHF</name>
6756 
              <description>RXFIFOHF</description>
6757 
              <bitOffset>15</bitOffset>
6758 
              <bitWidth>1</bitWidth>
6759 
            </field>
6760 
            <field>
6761 
              <name>TXFIFOF</name>
6762 
              <description>TXFIFOF</description>
6763 
              <bitOffset>16</bitOffset>
6764 
              <bitWidth>1</bitWidth>
6765 
            </field>
6766 
            <field>
6767 
              <name>RXFIFOF</name>
6768 
              <description>RXFIFOF</description>
6769 
              <bitOffset>17</bitOffset>
6770 
              <bitWidth>1</bitWidth>
6771 
            </field>
6772 
            <field>
6773 
              <name>TXFIFOE</name>
6774 
              <description>TXFIFOE</description>
6775 
              <bitOffset>18</bitOffset>
6776 
              <bitWidth>1</bitWidth>
6777 
            </field>
6778 
            <field>
6779 
              <name>RXFIFOE</name>
6780 
              <description>RXFIFOE</description>
6781 
              <bitOffset>19</bitOffset>
6782 
              <bitWidth>1</bitWidth>
6783 
            </field>
6784 
            <field>
6785 
              <name>TXDAVL</name>
6786 
              <description>TXDAVL</description>
6787 
              <bitOffset>20</bitOffset>
6788 
              <bitWidth>1</bitWidth>
6789 
            </field>
6790 
            <field>
6791 
              <name>RXDAVL</name>
6792 
              <description>RXDAVL</description>
6793 
              <bitOffset>21</bitOffset>
6794 
              <bitWidth>1</bitWidth>
6795 
            </field>
6796 
            <field>
6797 
              <name>SDIOIT</name>
6798 
              <description>SDIOIT</description>
6799 
              <bitOffset>22</bitOffset>
6800 
              <bitWidth>1</bitWidth>
6801 
            </field>
6802 
            <field>
6803 
              <name>CEATAEND</name>
6804 
              <description>CEATAEND</description>
6805 
              <bitOffset>23</bitOffset>
6806 
              <bitWidth>1</bitWidth>
6807 
            </field>
6808 
          </fields>
6809 
        </register>
6810 
        <register>
6811 
          <name>ICR</name>
6812 
          <displayName>ICR</displayName>
6813 
          <description>SDIO interrupt clear register
6814 
          (SDIO_ICR)</description>
6815 
          <addressOffset>0x38</addressOffset>
6816 
          <size>0x20</size>
6817 
          <access>read-write</access>
6818 
          <resetValue>0x00000000</resetValue>
6819 
          <fields>
6820 
            <field>
6821 
              <name>CCRCFAILC</name>
6822 
              <description>CCRCFAILC</description>
6823 
              <bitOffset>0</bitOffset>
6824 
              <bitWidth>1</bitWidth>
6825 
            </field>
6826 
            <field>
6827 
              <name>DCRCFAILC</name>
6828 
              <description>DCRCFAILC</description>
6829 
              <bitOffset>1</bitOffset>
6830 
              <bitWidth>1</bitWidth>
6831 
            </field>
6832 
            <field>
6833 
              <name>CTIMEOUTC</name>
6834 
              <description>CTIMEOUTC</description>
6835 
              <bitOffset>2</bitOffset>
6836 
              <bitWidth>1</bitWidth>
6837 
            </field>
6838 
            <field>
6839 
              <name>DTIMEOUTC</name>
6840 
              <description>DTIMEOUTC</description>
6841 
              <bitOffset>3</bitOffset>
6842 
              <bitWidth>1</bitWidth>
6843 
            </field>
6844 
            <field>
6845 
              <name>TXUNDERRC</name>
6846 
              <description>TXUNDERRC</description>
6847 
              <bitOffset>4</bitOffset>
6848 
              <bitWidth>1</bitWidth>
6849 
            </field>
6850 
            <field>
6851 
              <name>RXOVERRC</name>
6852 
              <description>RXOVERRC</description>
6853 
              <bitOffset>5</bitOffset>
6854 
              <bitWidth>1</bitWidth>
6855 
            </field>
6856 
            <field>
6857 
              <name>CMDRENDC</name>
6858 
              <description>CMDRENDC</description>
6859 
              <bitOffset>6</bitOffset>
6860 
              <bitWidth>1</bitWidth>
6861 
            </field>
6862 
            <field>
6863 
              <name>CMDSENTC</name>
6864 
              <description>CMDSENTC</description>
6865 
              <bitOffset>7</bitOffset>
6866 
              <bitWidth>1</bitWidth>
6867 
            </field>
6868 
            <field>
6869 
              <name>DATAENDC</name>
6870 
              <description>DATAENDC</description>
6871 
              <bitOffset>8</bitOffset>
6872 
              <bitWidth>1</bitWidth>
6873 
            </field>
6874 
            <field>
6875 
              <name>STBITERRC</name>
6876 
              <description>STBITERRC</description>
6877 
              <bitOffset>9</bitOffset>
6878 
              <bitWidth>1</bitWidth>
6879 
            </field>
6880 
            <field>
6881 
              <name>DBCKENDC</name>
6882 
              <description>DBCKENDC</description>
6883 
              <bitOffset>10</bitOffset>
6884 
              <bitWidth>1</bitWidth>
6885 
            </field>
6886 
            <field>
6887 
              <name>SDIOITC</name>
6888 
              <description>SDIOITC</description>
6889 
              <bitOffset>22</bitOffset>
6890 
              <bitWidth>1</bitWidth>
6891 
            </field>
6892 
            <field>
6893 
              <name>CEATAENDC</name>
6894 
              <description>CEATAENDC</description>
6895 
              <bitOffset>23</bitOffset>
6896 
              <bitWidth>1</bitWidth>
6897 
            </field>
6898 
          </fields>
6899 
        </register>
6900 
        <register>
6901 
          <name>MASK</name>
6902 
          <displayName>MASK</displayName>
6903 
          <description>SDIO mask register (SDIO_MASK)</description>
6904 
          <addressOffset>0x3C</addressOffset>
6905 
          <size>0x20</size>
6906 
          <access>read-write</access>
6907 
          <resetValue>0x00000000</resetValue>
6908 
          <fields>
6909 
            <field>
6910 
              <name>CCRCFAILIE</name>
6911 
              <description>CCRCFAILIE</description>
6912 
              <bitOffset>0</bitOffset>
6913 
              <bitWidth>1</bitWidth>
6914 
            </field>
6915 
            <field>
6916 
              <name>DCRCFAILIE</name>
6917 
              <description>DCRCFAILIE</description>
6918 
              <bitOffset>1</bitOffset>
6919 
              <bitWidth>1</bitWidth>
6920 
            </field>
6921 
            <field>
6922 
              <name>CTIMEOUTIE</name>
6923 
              <description>CTIMEOUTIE</description>
6924 
              <bitOffset>2</bitOffset>
6925 
              <bitWidth>1</bitWidth>
6926 
            </field>
6927 
            <field>
6928 
              <name>DTIMEOUTIE</name>
6929 
              <description>DTIMEOUTIE</description>
6930 
              <bitOffset>3</bitOffset>
6931 
              <bitWidth>1</bitWidth>
6932 
            </field>
6933 
            <field>
6934 
              <name>TXUNDERRIE</name>
6935 
              <description>TXUNDERRIE</description>
6936 
              <bitOffset>4</bitOffset>
6937 
              <bitWidth>1</bitWidth>
6938 
            </field>
6939 
            <field>
6940 
              <name>RXOVERRIE</name>
6941 
              <description>RXOVERRIE</description>
6942 
              <bitOffset>5</bitOffset>
6943 
              <bitWidth>1</bitWidth>
6944 
            </field>
6945 
            <field>
6946 
              <name>CMDRENDIE</name>
6947 
              <description>CMDRENDIE</description>
6948 
              <bitOffset>6</bitOffset>
6949 
              <bitWidth>1</bitWidth>
6950 
            </field>
6951 
            <field>
6952 
              <name>CMDSENTIE</name>
6953 
              <description>CMDSENTIE</description>
6954 
              <bitOffset>7</bitOffset>
6955 
              <bitWidth>1</bitWidth>
6956 
            </field>
6957 
            <field>
6958 
              <name>DATAENDIE</name>
6959 
              <description>DATAENDIE</description>
6960 
              <bitOffset>8</bitOffset>
6961 
              <bitWidth>1</bitWidth>
6962 
            </field>
6963 
            <field>
6964 
              <name>STBITERRIE</name>
6965 
              <description>STBITERRIE</description>
6966 
              <bitOffset>9</bitOffset>
6967 
              <bitWidth>1</bitWidth>
6968 
            </field>
6969 
            <field>
6970 
              <name>DBACKENDIE</name>
6971 
              <description>DBACKENDIE</description>
6972 
              <bitOffset>10</bitOffset>
6973 
              <bitWidth>1</bitWidth>
6974 
            </field>
6975 
            <field>
6976 
              <name>CMDACTIE</name>
6977 
              <description>CMDACTIE</description>
6978 
              <bitOffset>11</bitOffset>
6979 
              <bitWidth>1</bitWidth>
6980 
            </field>
6981 
            <field>
6982 
              <name>TXACTIE</name>
6983 
              <description>TXACTIE</description>
6984 
              <bitOffset>12</bitOffset>
6985 
              <bitWidth>1</bitWidth>
6986 
            </field>
6987 
            <field>
6988 
              <name>RXACTIE</name>
6989 
              <description>RXACTIE</description>
6990 
              <bitOffset>13</bitOffset>
6991 
              <bitWidth>1</bitWidth>
6992 
            </field>
6993 
            <field>
6994 
              <name>TXFIFOHEIE</name>
6995 
              <description>TXFIFOHEIE</description>
6996 
              <bitOffset>14</bitOffset>
6997 
              <bitWidth>1</bitWidth>
6998 
            </field>
6999 
            <field>
7000 
              <name>RXFIFOHFIE</name>
7001 
              <description>RXFIFOHFIE</description>
7002 
              <bitOffset>15</bitOffset>
7003 
              <bitWidth>1</bitWidth>
7004 
            </field>
7005 
            <field>
7006 
              <name>TXFIFOFIE</name>
7007 
              <description>TXFIFOFIE</description>
7008 
              <bitOffset>16</bitOffset>
7009 
              <bitWidth>1</bitWidth>
7010 
            </field>
7011 
            <field>
7012 
              <name>RXFIFOFIE</name>
7013 
              <description>RXFIFOFIE</description>
7014 
              <bitOffset>17</bitOffset>
7015 
              <bitWidth>1</bitWidth>
7016 
            </field>
7017 
            <field>
7018 
              <name>TXFIFOEIE</name>
7019 
              <description>TXFIFOEIE</description>
7020 
              <bitOffset>18</bitOffset>
7021 
              <bitWidth>1</bitWidth>
7022 
            </field>
7023 
            <field>
7024 
              <name>RXFIFOEIE</name>
7025 
              <description>RXFIFOEIE</description>
7026 
              <bitOffset>19</bitOffset>
7027 
              <bitWidth>1</bitWidth>
7028 
            </field>
7029 
            <field>
7030 
              <name>TXDAVLIE</name>
7031 
              <description>TXDAVLIE</description>
7032 
              <bitOffset>20</bitOffset>
7033 
              <bitWidth>1</bitWidth>
7034 
            </field>
7035 
            <field>
7036 
              <name>RXDAVLIE</name>
7037 
              <description>RXDAVLIE</description>
7038 
              <bitOffset>21</bitOffset>
7039 
              <bitWidth>1</bitWidth>
7040 
            </field>
7041 
            <field>
7042 
              <name>SDIOITIE</name>
7043 
              <description>SDIOITIE</description>
7044 
              <bitOffset>22</bitOffset>
7045 
              <bitWidth>1</bitWidth>
7046 
            </field>
7047 
            <field>
7048 
              <name>CEATENDIE</name>
7049 
              <description>CEATENDIE</description>
7050 
              <bitOffset>23</bitOffset>
7051 
              <bitWidth>1</bitWidth>
7052 
            </field>
7053 
          </fields>
7054 
        </register>
7055 
        <register>
7056 
          <name>FIFOCNT</name>
7057 
          <displayName>FIFOCNT</displayName>
7058 
          <description>Bits 23:0 = FIFOCOUNT: Remaining number of
7059 
          words to be written to or read from the
7060 
          FIFO</description>
7061 
          <addressOffset>0x48</addressOffset>
7062 
          <size>0x20</size>
7063 
          <access>read-only</access>
7064 
          <resetValue>0x00000000</resetValue>
7065 
          <fields>
7066 
            <field>
7067 
              <name>FIF0COUNT</name>
7068 
              <description>FIF0COUNT</description>
7069 
              <bitOffset>0</bitOffset>
7070 
              <bitWidth>24</bitWidth>
7071 
            </field>
7072 
          </fields>
7073 
        </register>
7074 
        <register>
7075 
          <name>FIFO</name>
7076 
          <displayName>FIFO</displayName>
7077 
          <description>bits 31:0 = FIFOData: Receive and transmit
7078 
          FIFO data</description>
7079 
          <addressOffset>0x80</addressOffset>
7080 
          <size>0x20</size>
7081 
          <access>read-write</access>
7082 
          <resetValue>0x00000000</resetValue>
7083 
          <fields>
7084 
            <field>
7085 
              <name>FIFOData</name>
7086 
              <description>FIFOData</description>
7087 
              <bitOffset>0</bitOffset>
7088 
              <bitWidth>32</bitWidth>
7089 
            </field>
7090 
          </fields>
7091 
        </register>
7092 
      </registers>
7093 
    </peripheral>
7094 
    <peripheral>
7095 
      <name>RTC</name>
7096 
      <description>Real time clock</description>
7097 
      <groupName>RTC</groupName>
7098 
      <baseAddress>0x40002800</baseAddress>
7099 
      <addressBlock>
7100 
        <offset>0x0</offset>
7101 
        <size>0x400</size>
7102 
        <usage>registers</usage>
7103 
      </addressBlock>
7104 
      <interrupt>
7105 
        <name>RTC</name>
7106 
        <description>RTC global interrupt</description>
7107 
        <value>3</value>
7108 
      </interrupt>
7109 
      <interrupt>
7110 
        <name>RTCAlarm</name>
7111 
        <description>RTC Alarms through EXTI line
7112 
        interrupt</description>
7113 
        <value>41</value>
7114 
      </interrupt>
7115 
      <registers>
7116 
        <register>
7117 
          <name>CRH</name>
7118 
          <displayName>CRH</displayName>
7119 
          <description>RTC Control Register High</description>
7120 
          <addressOffset>0x0</addressOffset>
7121 
          <size>0x20</size>
7122 
          <access>read-write</access>
7123 
          <resetValue>0x00000000</resetValue>
7124 
          <fields>
7125 
            <field>
7126 
              <name>SECIE</name>
7127 
              <description>Second interrupt Enable</description>
7128 
              <bitOffset>0</bitOffset>
7129 
              <bitWidth>1</bitWidth>
7130 
            </field>
7131 
            <field>
7132 
              <name>ALRIE</name>
7133 
              <description>Alarm interrupt Enable</description>
7134 
              <bitOffset>1</bitOffset>
7135 
              <bitWidth>1</bitWidth>
7136 
            </field>
7137 
            <field>
7138 
              <name>OWIE</name>
7139 
              <description>Overflow interrupt Enable</description>
7140 
              <bitOffset>2</bitOffset>
7141 
              <bitWidth>1</bitWidth>
7142 
            </field>
7143 
          </fields>
7144 
        </register>
7145 
        <register>
7146 
          <name>CRL</name>
7147 
          <displayName>CRL</displayName>
7148 
          <description>RTC Control Register Low</description>
7149 
          <addressOffset>0x4</addressOffset>
7150 
          <size>0x20</size>
7151 
          <resetValue>0x00000020</resetValue>
7152 
          <fields>
7153 
            <field>
7154 
              <name>SECF</name>
7155 
              <description>Second Flag</description>
7156 
              <bitOffset>0</bitOffset>
7157 
              <bitWidth>1</bitWidth>
7158 
              <access>read-write</access>
7159 
            </field>
7160 
            <field>
7161 
              <name>ALRF</name>
7162 
              <description>Alarm Flag</description>
7163 
              <bitOffset>1</bitOffset>
7164 
              <bitWidth>1</bitWidth>
7165 
              <access>read-write</access>
7166 
            </field>
7167 
            <field>
7168 
              <name>OWF</name>
7169 
              <description>Overflow Flag</description>
7170 
              <bitOffset>2</bitOffset>
7171 
              <bitWidth>1</bitWidth>
7172 
              <access>read-write</access>
7173 
            </field>
7174 
            <field>
7175 
              <name>RSF</name>
7176 
              <description>Registers Synchronized
7177 
              Flag</description>
7178 
              <bitOffset>3</bitOffset>
7179 
              <bitWidth>1</bitWidth>
7180 
              <access>read-write</access>
7181 
            </field>
7182 
            <field>
7183 
              <name>CNF</name>
7184 
              <description>Configuration Flag</description>
7185 
              <bitOffset>4</bitOffset>
7186 
              <bitWidth>1</bitWidth>
7187 
              <access>read-write</access>
7188 
            </field>
7189 
            <field>
7190 
              <name>RTOFF</name>
7191 
              <description>RTC operation OFF</description>
7192 
              <bitOffset>5</bitOffset>
7193 
              <bitWidth>1</bitWidth>
7194 
              <access>read-only</access>
7195 
            </field>
7196 
          </fields>
7197 
        </register>
7198 
        <register>
7199 
          <name>PRLH</name>
7200 
          <displayName>PRLH</displayName>
7201 
          <description>RTC Prescaler Load Register
7202 
          High</description>
7203 
          <addressOffset>0x8</addressOffset>
7204 
          <size>0x20</size>
7205 
          <access>write-only</access>
7206 
          <resetValue>0x00000000</resetValue>
7207 
          <fields>
7208 
            <field>
7209 
              <name>PRLH</name>
7210 
              <description>RTC Prescaler Load Register
7211 
              High</description>
7212 
              <bitOffset>0</bitOffset>
7213 
              <bitWidth>4</bitWidth>
7214 
            </field>
7215 
          </fields>
7216 
        </register>
7217 
        <register>
7218 
          <name>PRLL</name>
7219 
          <displayName>PRLL</displayName>
7220 
          <description>RTC Prescaler Load Register
7221 
          Low</description>
7222 
          <addressOffset>0xC</addressOffset>
7223 
          <size>0x20</size>
7224 
          <access>write-only</access>
7225 
          <resetValue>0x8000</resetValue>
7226 
          <fields>
7227 
            <field>
7228 
              <name>PRLL</name>
7229 
              <description>RTC Prescaler Divider Register
7230 
              Low</description>
7231 
              <bitOffset>0</bitOffset>
7232 
              <bitWidth>16</bitWidth>
7233 
            </field>
7234 
          </fields>
7235 
        </register>
7236 
        <register>
7237 
          <name>DIVH</name>
7238 
          <displayName>DIVH</displayName>
7239 
          <description>RTC Prescaler Divider Register
7240 
          High</description>
7241 
          <addressOffset>0x10</addressOffset>
7242 
          <size>0x20</size>
7243 
          <access>read-only</access>
7244 
          <resetValue>0x00000000</resetValue>
7245 
          <fields>
7246 
            <field>
7247 
              <name>DIVH</name>
7248 
              <description>RTC prescaler divider register
7249 
              high</description>
7250 
              <bitOffset>0</bitOffset>
7251 
              <bitWidth>4</bitWidth>
7252 
            </field>
7253 
          </fields>
7254 
        </register>
7255 
        <register>
7256 
          <name>DIVL</name>
7257 
          <displayName>DIVL</displayName>
7258 
          <description>RTC Prescaler Divider Register
7259 
          Low</description>
7260 
          <addressOffset>0x14</addressOffset>
7261 
          <size>0x20</size>
7262 
          <access>read-only</access>
7263 
          <resetValue>0x8000</resetValue>
7264 
          <fields>
7265 
            <field>
7266 
              <name>DIVL</name>
7267 
              <description>RTC prescaler divider register
7268 
              Low</description>
7269 
              <bitOffset>0</bitOffset>
7270 
              <bitWidth>16</bitWidth>
7271 
            </field>
7272 
          </fields>
7273 
        </register>
7274 
        <register>
7275 
          <name>CNTH</name>
7276 
          <displayName>CNTH</displayName>
7277 
          <description>RTC Counter Register High</description>
7278 
          <addressOffset>0x18</addressOffset>
7279 
          <size>0x20</size>
7280 
          <access>read-write</access>
7281 
          <resetValue>0x00000000</resetValue>
7282 
          <fields>
7283 
            <field>
7284 
              <name>CNTH</name>
7285 
              <description>RTC counter register high</description>
7286 
              <bitOffset>0</bitOffset>
7287 
              <bitWidth>16</bitWidth>
7288 
            </field>
7289 
          </fields>
7290 
        </register>
7291 
        <register>
7292 
          <name>CNTL</name>
7293 
          <displayName>CNTL</displayName>
7294 
          <description>RTC Counter Register Low</description>
7295 
          <addressOffset>0x1C</addressOffset>
7296 
          <size>0x20</size>
7297 
          <access>read-write</access>
7298 
          <resetValue>0x00000000</resetValue>
7299 
          <fields>
7300 
            <field>
7301 
              <name>CNTL</name>
7302 
              <description>RTC counter register Low</description>
7303 
              <bitOffset>0</bitOffset>
7304 
              <bitWidth>16</bitWidth>
7305 
            </field>
7306 
          </fields>
7307 
        </register>
7308 
        <register>
7309 
          <name>ALRH</name>
7310 
          <displayName>ALRH</displayName>
7311 
          <description>RTC Alarm Register High</description>
7312 
          <addressOffset>0x20</addressOffset>
7313 
          <size>0x20</size>
7314 
          <access>write-only</access>
7315 
          <resetValue>0xFFFF</resetValue>
7316 
          <fields>
7317 
            <field>
7318 
              <name>ALRH</name>
7319 
              <description>RTC alarm register high</description>
7320 
              <bitOffset>0</bitOffset>
7321 
              <bitWidth>16</bitWidth>
7322 
            </field>
7323 
          </fields>
7324 
        </register>
7325 
        <register>
7326 
          <name>ALRL</name>
7327 
          <displayName>ALRL</displayName>
7328 
          <description>RTC Alarm Register Low</description>
7329 
          <addressOffset>0x24</addressOffset>
7330 
          <size>0x20</size>
7331 
          <access>write-only</access>
7332 
          <resetValue>0xFFFF</resetValue>
7333 
          <fields>
7334 
            <field>
7335 
              <name>ALRL</name>
7336 
              <description>RTC alarm register low</description>
7337 
              <bitOffset>0</bitOffset>
7338 
              <bitWidth>16</bitWidth>
7339 
            </field>
7340 
          </fields>
7341 
        </register>
7342 
      </registers>
7343 
    </peripheral>
7344 
    <peripheral>
7345 
      <name>BKP</name>
7346 
      <description>Backup registers</description>
7347 
      <groupName>BKP</groupName>
7348 
      <baseAddress>0x40006C04</baseAddress>
7349 
      <addressBlock>
7350 
        <offset>0x0</offset>
7351 
        <size>0x400</size>
7352 
        <usage>registers</usage>
7353 
      </addressBlock>
7354 
      <registers>
7355 
        <register>
7356 
          <name>DR1</name>
7357 
          <displayName>DR1</displayName>
7358 
          <description>Backup data register (BKP_DR)</description>
7359 
          <addressOffset>0x0</addressOffset>
7360 
          <size>0x20</size>
7361 
          <access>read-write</access>
7362 
          <resetValue>0x00000000</resetValue>
7363 
          <fields>
7364 
            <field>
7365 
              <name>D1</name>
7366 
              <description>Backup data</description>
7367 
              <bitOffset>0</bitOffset>
7368 
              <bitWidth>16</bitWidth>
7369 
            </field>
7370 
          </fields>
7371 
        </register>
7372 
        <register>
7373 
          <name>DR2</name>
7374 
          <displayName>DR2</displayName>
7375 
          <description>Backup data register (BKP_DR)</description>
7376 
          <addressOffset>0x4</addressOffset>
7377 
          <size>0x20</size>
7378 
          <access>read-write</access>
7379 
          <resetValue>0x00000000</resetValue>
7380 
          <fields>
7381 
            <field>
7382 
              <name>D2</name>
7383 
              <description>Backup data</description>
7384 
              <bitOffset>0</bitOffset>
7385 
              <bitWidth>16</bitWidth>
7386 
            </field>
7387 
          </fields>
7388 
        </register>
7389 
        <register>
7390 
          <name>DR3</name>
7391 
          <displayName>DR3</displayName>
7392 
          <description>Backup data register (BKP_DR)</description>
7393 
          <addressOffset>0x8</addressOffset>
7394 
          <size>0x20</size>
7395 
          <access>read-write</access>
7396 
          <resetValue>0x00000000</resetValue>
7397 
          <fields>
7398 
            <field>
7399 
              <name>D3</name>
7400 
              <description>Backup data</description>
7401 
              <bitOffset>0</bitOffset>
7402 
              <bitWidth>16</bitWidth>
7403 
            </field>
7404 
          </fields>
7405 
        </register>
7406 
        <register>
7407 
          <name>DR4</name>
7408 
          <displayName>DR4</displayName>
7409 
          <description>Backup data register (BKP_DR)</description>
7410 
          <addressOffset>0xC</addressOffset>
7411 
          <size>0x20</size>
7412 
          <access>read-write</access>
7413 
          <resetValue>0x00000000</resetValue>
7414 
          <fields>
7415 
            <field>
7416 
              <name>D4</name>
7417 
              <description>Backup data</description>
7418 
              <bitOffset>0</bitOffset>
7419 
              <bitWidth>16</bitWidth>
7420 
            </field>
7421 
          </fields>
7422 
        </register>
7423 
        <register>
7424 
          <name>DR5</name>
7425 
          <displayName>DR5</displayName>
7426 
          <description>Backup data register (BKP_DR)</description>
7427 
          <addressOffset>0x10</addressOffset>
7428 
          <size>0x20</size>
7429 
          <access>read-write</access>
7430 
          <resetValue>0x00000000</resetValue>
7431 
          <fields>
7432 
            <field>
7433 
              <name>D5</name>
7434 
              <description>Backup data</description>
7435 
              <bitOffset>0</bitOffset>
7436 
              <bitWidth>16</bitWidth>
7437 
            </field>
7438 
          </fields>
7439 
        </register>
7440 
        <register>
7441 
          <name>DR6</name>
7442 
          <displayName>DR6</displayName>
7443 
          <description>Backup data register (BKP_DR)</description>
7444 
          <addressOffset>0x14</addressOffset>
7445 
          <size>0x20</size>
7446 
          <access>read-write</access>
7447 
          <resetValue>0x00000000</resetValue>
7448 
          <fields>
7449 
            <field>
7450 
              <name>D6</name>
7451 
              <description>Backup data</description>
7452 
              <bitOffset>0</bitOffset>
7453 
              <bitWidth>16</bitWidth>
7454 
            </field>
7455 
          </fields>
7456 
        </register>
7457 
        <register>
7458 
          <name>DR7</name>
7459 
          <displayName>DR7</displayName>
7460 
          <description>Backup data register (BKP_DR)</description>
7461 
          <addressOffset>0x18</addressOffset>
7462 
          <size>0x20</size>
7463 
          <access>read-write</access>
7464 
          <resetValue>0x00000000</resetValue>
7465 
          <fields>
7466 
            <field>
7467 
              <name>D7</name>
7468 
              <description>Backup data</description>
7469 
              <bitOffset>0</bitOffset>
7470 
              <bitWidth>16</bitWidth>
7471 
            </field>
7472 
          </fields>
7473 
        </register>
7474 
        <register>
7475 
          <name>DR8</name>
7476 
          <displayName>DR8</displayName>
7477 
          <description>Backup data register (BKP_DR)</description>
7478 
          <addressOffset>0x1C</addressOffset>
7479 
          <size>0x20</size>
7480 
          <access>read-write</access>
7481 
          <resetValue>0x00000000</resetValue>
7482 
          <fields>
7483 
            <field>
7484 
              <name>D8</name>
7485 
              <description>Backup data</description>
7486 
              <bitOffset>0</bitOffset>
7487 
              <bitWidth>16</bitWidth>
7488 
            </field>
7489 
          </fields>
7490 
        </register>
7491 
        <register>
7492 
          <name>DR9</name>
7493 
          <displayName>DR9</displayName>
7494 
          <description>Backup data register (BKP_DR)</description>
7495 
          <addressOffset>0x20</addressOffset>
7496 
          <size>0x20</size>
7497 
          <access>read-write</access>
7498 
          <resetValue>0x00000000</resetValue>
7499 
          <fields>
7500 
            <field>
7501 
              <name>D9</name>
7502 
              <description>Backup data</description>
7503 
              <bitOffset>0</bitOffset>
7504 
              <bitWidth>16</bitWidth>
7505 
            </field>
7506 
          </fields>
7507 
        </register>
7508 
        <register>
7509 
          <name>DR10</name>
7510 
          <displayName>DR10</displayName>
7511 
          <description>Backup data register (BKP_DR)</description>
7512 
          <addressOffset>0x24</addressOffset>
7513 
          <size>0x20</size>
7514 
          <access>read-write</access>
7515 
          <resetValue>0x00000000</resetValue>
7516 
          <fields>
7517 
            <field>
7518 
              <name>D10</name>
7519 
              <description>Backup data</description>
7520 
              <bitOffset>0</bitOffset>
7521 
              <bitWidth>16</bitWidth>
7522 
            </field>
7523 
          </fields>
7524 
        </register>
7525 
        <register>
7526 
          <name>DR11</name>
7527 
          <displayName>DR11</displayName>
7528 
          <description>Backup data register (BKP_DR)</description>
7529 
          <addressOffset>0x3C</addressOffset>
7530 
          <size>0x20</size>
7531 
          <access>read-write</access>
7532 
          <resetValue>0x00000000</resetValue>
7533 
          <fields>
7534 
            <field>
7535 
              <name>DR11</name>
7536 
              <description>Backup data</description>
7537 
              <bitOffset>0</bitOffset>
7538 
              <bitWidth>16</bitWidth>
7539 
            </field>
7540 
          </fields>
7541 
        </register>
7542 
        <register>
7543 
          <name>DR12</name>
7544 
          <displayName>DR12</displayName>
7545 
          <description>Backup data register (BKP_DR)</description>
7546 
          <addressOffset>0x40</addressOffset>
7547 
          <size>0x20</size>
7548 
          <access>read-write</access>
7549 
          <resetValue>0x00000000</resetValue>
7550 
          <fields>
7551 
            <field>
7552 
              <name>DR12</name>
7553 
              <description>Backup data</description>
7554 
              <bitOffset>0</bitOffset>
7555 
              <bitWidth>16</bitWidth>
7556 
            </field>
7557 
          </fields>
7558 
        </register>
7559 
        <register>
7560 
          <name>DR13</name>
7561 
          <displayName>DR13</displayName>
7562 
          <description>Backup data register (BKP_DR)</description>
7563 
          <addressOffset>0x44</addressOffset>
7564 
          <size>0x20</size>
7565 
          <access>read-write</access>
7566 
          <resetValue>0x00000000</resetValue>
7567 
          <fields>
7568 
            <field>
7569 
              <name>DR13</name>
7570 
              <description>Backup data</description>
7571 
              <bitOffset>0</bitOffset>
7572 
              <bitWidth>16</bitWidth>
7573 
            </field>
7574 
          </fields>
7575 
        </register>
7576 
        <register>
7577 
          <name>DR14</name>
7578 
          <displayName>DR14</displayName>
7579 
          <description>Backup data register (BKP_DR)</description>
7580 
          <addressOffset>0x48</addressOffset>
7581 
          <size>0x20</size>
7582 
          <access>read-write</access>
7583 
          <resetValue>0x00000000</resetValue>
7584 
          <fields>
7585 
            <field>
7586 
              <name>D14</name>
7587 
              <description>Backup data</description>
7588 
              <bitOffset>0</bitOffset>
7589 
              <bitWidth>16</bitWidth>
7590 
            </field>
7591 
          </fields>
7592 
        </register>
7593 
        <register>
7594 
          <name>DR15</name>
7595 
          <displayName>DR15</displayName>
7596 
          <description>Backup data register (BKP_DR)</description>
7597 
          <addressOffset>0x4C</addressOffset>
7598 
          <size>0x20</size>
7599 
          <access>read-write</access>
7600 
          <resetValue>0x00000000</resetValue>
7601 
          <fields>
7602 
            <field>
7603 
              <name>D15</name>
7604 
              <description>Backup data</description>
7605 
              <bitOffset>0</bitOffset>
7606 
              <bitWidth>16</bitWidth>
7607 
            </field>
7608 
          </fields>
7609 
        </register>
7610 
        <register>
7611 
          <name>DR16</name>
7612 
          <displayName>DR16</displayName>
7613 
          <description>Backup data register (BKP_DR)</description>
7614 
          <addressOffset>0x50</addressOffset>
7615 
          <size>0x20</size>
7616 
          <access>read-write</access>
7617 
          <resetValue>0x00000000</resetValue>
7618 
          <fields>
7619 
            <field>
7620 
              <name>D16</name>
7621 
              <description>Backup data</description>
7622 
              <bitOffset>0</bitOffset>
7623 
              <bitWidth>16</bitWidth>
7624 
            </field>
7625 
          </fields>
7626 
        </register>
7627 
        <register>
7628 
          <name>DR17</name>
7629 
          <displayName>DR17</displayName>
7630 
          <description>Backup data register (BKP_DR)</description>
7631 
          <addressOffset>0x54</addressOffset>
7632 
          <size>0x20</size>
7633 
          <access>read-write</access>
7634 
          <resetValue>0x00000000</resetValue>
7635 
          <fields>
7636 
            <field>
7637 
              <name>D17</name>
7638 
              <description>Backup data</description>
7639 
              <bitOffset>0</bitOffset>
7640 
              <bitWidth>16</bitWidth>
7641 
            </field>
7642 
          </fields>
7643 
        </register>
7644 
        <register>
7645 
          <name>DR18</name>
7646 
          <displayName>DR18</displayName>
7647 
          <description>Backup data register (BKP_DR)</description>
7648 
          <addressOffset>0x58</addressOffset>
7649 
          <size>0x20</size>
7650 
          <access>read-write</access>
7651 
          <resetValue>0x00000000</resetValue>
7652 
          <fields>
7653 
            <field>
7654 
              <name>D18</name>
7655 
              <description>Backup data</description>
7656 
              <bitOffset>0</bitOffset>
7657 
              <bitWidth>16</bitWidth>
7658 
            </field>
7659 
          </fields>
7660 
        </register>
7661 
        <register>
7662 
          <name>DR19</name>
7663 
          <displayName>DR19</displayName>
7664 
          <description>Backup data register (BKP_DR)</description>
7665 
          <addressOffset>0x5C</addressOffset>
7666 
          <size>0x20</size>
7667 
          <access>read-write</access>
7668 
          <resetValue>0x00000000</resetValue>
7669 
          <fields>
7670 
            <field>
7671 
              <name>D19</name>
7672 
              <description>Backup data</description>
7673 
              <bitOffset>0</bitOffset>
7674 
              <bitWidth>16</bitWidth>
7675 
            </field>
7676 
          </fields>
7677 
        </register>
7678 
        <register>
7679 
          <name>DR20</name>
7680 
          <displayName>DR20</displayName>
7681 
          <description>Backup data register (BKP_DR)</description>
7682 
          <addressOffset>0x60</addressOffset>
7683 
          <size>0x20</size>
7684 
          <access>read-write</access>
7685 
          <resetValue>0x00000000</resetValue>
7686 
          <fields>
7687 
            <field>
7688 
              <name>D20</name>
7689 
              <description>Backup data</description>
7690 
              <bitOffset>0</bitOffset>
7691 
              <bitWidth>16</bitWidth>
7692 
            </field>
7693 
          </fields>
7694 
        </register>
7695 
        <register>
7696 
          <name>DR21</name>
7697 
          <displayName>DR21</displayName>
7698 
          <description>Backup data register (BKP_DR)</description>
7699 
          <addressOffset>0x64</addressOffset>
7700 
          <size>0x20</size>
7701 
          <access>read-write</access>
7702 
          <resetValue>0x00000000</resetValue>
7703 
          <fields>
7704 
            <field>
7705 
              <name>D21</name>
7706 
              <description>Backup data</description>
7707 
              <bitOffset>0</bitOffset>
7708 
              <bitWidth>16</bitWidth>
7709 
            </field>
7710 
          </fields>
7711 
        </register>
7712 
        <register>
7713 
          <name>DR22</name>
7714 
          <displayName>DR22</displayName>
7715 
          <description>Backup data register (BKP_DR)</description>
7716 
          <addressOffset>0x68</addressOffset>
7717 
          <size>0x20</size>
7718 
          <access>read-write</access>
7719 
          <resetValue>0x00000000</resetValue>
7720 
          <fields>
7721 
            <field>
7722 
              <name>D22</name>
7723 
              <description>Backup data</description>
7724 
              <bitOffset>0</bitOffset>
7725 
              <bitWidth>16</bitWidth>
7726 
            </field>
7727 
          </fields>
7728 
        </register>
7729 
        <register>
7730 
          <name>DR23</name>
7731 
          <displayName>DR23</displayName>
7732 
          <description>Backup data register (BKP_DR)</description>
7733 
          <addressOffset>0x6C</addressOffset>
7734 
          <size>0x20</size>
7735 
          <access>read-write</access>
7736 
          <resetValue>0x00000000</resetValue>
7737 
          <fields>
7738 
            <field>
7739 
              <name>D23</name>
7740 
              <description>Backup data</description>
7741 
              <bitOffset>0</bitOffset>
7742 
              <bitWidth>16</bitWidth>
7743 
            </field>
7744 
          </fields>
7745 
        </register>
7746 
        <register>
7747 
          <name>DR24</name>
7748 
          <displayName>DR24</displayName>
7749 
          <description>Backup data register (BKP_DR)</description>
7750 
          <addressOffset>0x70</addressOffset>
7751 
          <size>0x20</size>
7752 
          <access>read-write</access>
7753 
          <resetValue>0x00000000</resetValue>
7754 
          <fields>
7755 
            <field>
7756 
              <name>D24</name>
7757 
              <description>Backup data</description>
7758 
              <bitOffset>0</bitOffset>
7759 
              <bitWidth>16</bitWidth>
7760 
            </field>
7761 
          </fields>
7762 
        </register>
7763 
        <register>
7764 
          <name>DR25</name>
7765 
          <displayName>DR25</displayName>
7766 
          <description>Backup data register (BKP_DR)</description>
7767 
          <addressOffset>0x74</addressOffset>
7768 
          <size>0x20</size>
7769 
          <access>read-write</access>
7770 
          <resetValue>0x00000000</resetValue>
7771 
          <fields>
7772 
            <field>
7773 
              <name>D25</name>
7774 
              <description>Backup data</description>
7775 
              <bitOffset>0</bitOffset>
7776 
              <bitWidth>16</bitWidth>
7777 
            </field>
7778 
          </fields>
7779 
        </register>
7780 
        <register>
7781 
          <name>DR26</name>
7782 
          <displayName>DR26</displayName>
7783 
          <description>Backup data register (BKP_DR)</description>
7784 
          <addressOffset>0x78</addressOffset>
7785 
          <size>0x20</size>
7786 
          <access>read-write</access>
7787 
          <resetValue>0x00000000</resetValue>
7788 
          <fields>
7789 
            <field>
7790 
              <name>D26</name>
7791 
              <description>Backup data</description>
7792 
              <bitOffset>0</bitOffset>
7793 
              <bitWidth>16</bitWidth>
7794 
            </field>
7795 
          </fields>
7796 
        </register>
7797 
        <register>
7798 
          <name>DR27</name>
7799 
          <displayName>DR27</displayName>
7800 
          <description>Backup data register (BKP_DR)</description>
7801 
          <addressOffset>0x7C</addressOffset>
7802 
          <size>0x20</size>
7803 
          <access>read-write</access>
7804 
          <resetValue>0x00000000</resetValue>
7805 
          <fields>
7806 
            <field>
7807 
              <name>D27</name>
7808 
              <description>Backup data</description>
7809 
              <bitOffset>0</bitOffset>
7810 
              <bitWidth>16</bitWidth>
7811 
            </field>
7812 
          </fields>
7813 
        </register>
7814 
        <register>
7815 
          <name>DR28</name>
7816 
          <displayName>DR28</displayName>
7817 
          <description>Backup data register (BKP_DR)</description>
7818 
          <addressOffset>0x80</addressOffset>
7819 
          <size>0x20</size>
7820 
          <access>read-write</access>
7821 
          <resetValue>0x00000000</resetValue>
7822 
          <fields>
7823 
            <field>
7824 
              <name>D28</name>
7825 
              <description>Backup data</description>
7826 
              <bitOffset>0</bitOffset>
7827 
              <bitWidth>16</bitWidth>
7828 
            </field>
7829 
          </fields>
7830 
        </register>
7831 
        <register>
7832 
          <name>DR29</name>
7833 
          <displayName>DR29</displayName>
7834 
          <description>Backup data register (BKP_DR)</description>
7835 
          <addressOffset>0x84</addressOffset>
7836 
          <size>0x20</size>
7837 
          <access>read-write</access>
7838 
          <resetValue>0x00000000</resetValue>
7839 
          <fields>
7840 
            <field>
7841 
              <name>D29</name>
7842 
              <description>Backup data</description>
7843 
              <bitOffset>0</bitOffset>
7844 
              <bitWidth>16</bitWidth>
7845 
            </field>
7846 
          </fields>
7847 
        </register>
7848 
        <register>
7849 
          <name>DR30</name>
7850 
          <displayName>DR30</displayName>
7851 
          <description>Backup data register (BKP_DR)</description>
7852 
          <addressOffset>0x88</addressOffset>
7853 
          <size>0x20</size>
7854 
          <access>read-write</access>
7855 
          <resetValue>0x00000000</resetValue>
7856 
          <fields>
7857 
            <field>
7858 
              <name>D30</name>
7859 
              <description>Backup data</description>
7860 
              <bitOffset>0</bitOffset>
7861 
              <bitWidth>16</bitWidth>
7862 
            </field>
7863 
          </fields>
7864 
        </register>
7865 
        <register>
7866 
          <name>DR31</name>
7867 
          <displayName>DR31</displayName>
7868 
          <description>Backup data register (BKP_DR)</description>
7869 
          <addressOffset>0x8C</addressOffset>
7870 
          <size>0x20</size>
7871 
          <access>read-write</access>
7872 
          <resetValue>0x00000000</resetValue>
7873 
          <fields>
7874 
            <field>
7875 
              <name>D31</name>
7876 
              <description>Backup data</description>
7877 
              <bitOffset>0</bitOffset>
7878 
              <bitWidth>16</bitWidth>
7879 
            </field>
7880 
          </fields>
7881 
        </register>
7882 
        <register>
7883 
          <name>DR32</name>
7884 
          <displayName>DR32</displayName>
7885 
          <description>Backup data register (BKP_DR)</description>
7886 
          <addressOffset>0x90</addressOffset>
7887 
          <size>0x20</size>
7888 
          <access>read-write</access>
7889 
          <resetValue>0x00000000</resetValue>
7890 
          <fields>
7891 
            <field>
7892 
              <name>D32</name>
7893 
              <description>Backup data</description>
7894 
              <bitOffset>0</bitOffset>
7895 
              <bitWidth>16</bitWidth>
7896 
            </field>
7897 
          </fields>
7898 
        </register>
7899 
        <register>
7900 
          <name>DR33</name>
7901 
          <displayName>DR33</displayName>
7902 
          <description>Backup data register (BKP_DR)</description>
7903 
          <addressOffset>0x94</addressOffset>
7904 
          <size>0x20</size>
7905 
          <access>read-write</access>
7906 
          <resetValue>0x00000000</resetValue>
7907 
          <fields>
7908 
            <field>
7909 
              <name>D33</name>
7910 
              <description>Backup data</description>
7911 
              <bitOffset>0</bitOffset>
7912 
              <bitWidth>16</bitWidth>
7913 
            </field>
7914 
          </fields>
7915 
        </register>
7916 
        <register>
7917 
          <name>DR34</name>
7918 
          <displayName>DR34</displayName>
7919 
          <description>Backup data register (BKP_DR)</description>
7920 
          <addressOffset>0x98</addressOffset>
7921 
          <size>0x20</size>
7922 
          <access>read-write</access>
7923 
          <resetValue>0x00000000</resetValue>
7924 
          <fields>
7925 
            <field>
7926 
              <name>D34</name>
7927 
              <description>Backup data</description>
7928 
              <bitOffset>0</bitOffset>
7929 
              <bitWidth>16</bitWidth>
7930 
            </field>
7931 
          </fields>
7932 
        </register>
7933 
        <register>
7934 
          <name>DR35</name>
7935 
          <displayName>DR35</displayName>
7936 
          <description>Backup data register (BKP_DR)</description>
7937 
          <addressOffset>0x9C</addressOffset>
7938 
          <size>0x20</size>
7939 
          <access>read-write</access>
7940 
          <resetValue>0x00000000</resetValue>
7941 
          <fields>
7942 
            <field>
7943 
              <name>D35</name>
7944 
              <description>Backup data</description>
7945 
              <bitOffset>0</bitOffset>
7946 
              <bitWidth>16</bitWidth>
7947 
            </field>
7948 
          </fields>
7949 
        </register>
7950 
        <register>
7951 
          <name>DR36</name>
7952 
          <displayName>DR36</displayName>
7953 
          <description>Backup data register (BKP_DR)</description>
7954 
          <addressOffset>0xA0</addressOffset>
7955 
          <size>0x20</size>
7956 
          <access>read-write</access>
7957 
          <resetValue>0x00000000</resetValue>
7958 
          <fields>
7959 
            <field>
7960 
              <name>D36</name>
7961 
              <description>Backup data</description>
7962 
              <bitOffset>0</bitOffset>
7963 
              <bitWidth>16</bitWidth>
7964 
            </field>
7965 
          </fields>
7966 
        </register>
7967 
        <register>
7968 
          <name>DR37</name>
7969 
          <displayName>DR37</displayName>
7970 
          <description>Backup data register (BKP_DR)</description>
7971 
          <addressOffset>0xA4</addressOffset>
7972 
          <size>0x20</size>
7973 
          <access>read-write</access>
7974 
          <resetValue>0x00000000</resetValue>
7975 
          <fields>
7976 
            <field>
7977 
              <name>D37</name>
7978 
              <description>Backup data</description>
7979 
              <bitOffset>0</bitOffset>
7980 
              <bitWidth>16</bitWidth>
7981 
            </field>
7982 
          </fields>
7983 
        </register>
7984 
        <register>
7985 
          <name>DR38</name>
7986 
          <displayName>DR38</displayName>
7987 
          <description>Backup data register (BKP_DR)</description>
7988 
          <addressOffset>0xA8</addressOffset>
7989 
          <size>0x20</size>
7990 
          <access>read-write</access>
7991 
          <resetValue>0x00000000</resetValue>
7992 
          <fields>
7993 
            <field>
7994 
              <name>D38</name>
7995 
              <description>Backup data</description>
7996 
              <bitOffset>0</bitOffset>
7997 
              <bitWidth>16</bitWidth>
7998 
            </field>
7999 
          </fields>
8000 
        </register>
8001 
        <register>
8002 
          <name>DR39</name>
8003 
          <displayName>DR39</displayName>
8004 
          <description>Backup data register (BKP_DR)</description>
8005 
          <addressOffset>0xAC</addressOffset>
8006 
          <size>0x20</size>
8007 
          <access>read-write</access>
8008 
          <resetValue>0x00000000</resetValue>
8009 
          <fields>
8010 
            <field>
8011 
              <name>D39</name>
8012 
              <description>Backup data</description>
8013 
              <bitOffset>0</bitOffset>
8014 
              <bitWidth>16</bitWidth>
8015 
            </field>
8016 
          </fields>
8017 
        </register>
8018 
        <register>
8019 
          <name>DR40</name>
8020 
          <displayName>DR40</displayName>
8021 
          <description>Backup data register (BKP_DR)</description>
8022 
          <addressOffset>0xB0</addressOffset>
8023 
          <size>0x20</size>
8024 
          <access>read-write</access>
8025 
          <resetValue>0x00000000</resetValue>
8026 
          <fields>
8027 
            <field>
8028 
              <name>D40</name>
8029 
              <description>Backup data</description>
8030 
              <bitOffset>0</bitOffset>
8031 
              <bitWidth>16</bitWidth>
8032 
            </field>
8033 
          </fields>
8034 
        </register>
8035 
        <register>
8036 
          <name>DR41</name>
8037 
          <displayName>DR41</displayName>
8038 
          <description>Backup data register (BKP_DR)</description>
8039 
          <addressOffset>0xB4</addressOffset>
8040 
          <size>0x20</size>
8041 
          <access>read-write</access>
8042 
          <resetValue>0x00000000</resetValue>
8043 
          <fields>
8044 
            <field>
8045 
              <name>D41</name>
8046 
              <description>Backup data</description>
8047 
              <bitOffset>0</bitOffset>
8048 
              <bitWidth>16</bitWidth>
8049 
            </field>
8050 
          </fields>
8051 
        </register>
8052 
        <register>
8053 
          <name>DR42</name>
8054 
          <displayName>DR42</displayName>
8055 
          <description>Backup data register (BKP_DR)</description>
8056 
          <addressOffset>0xB8</addressOffset>
8057 
          <size>0x20</size>
8058 
          <access>read-write</access>
8059 
          <resetValue>0x00000000</resetValue>
8060 
          <fields>
8061 
            <field>
8062 
              <name>D42</name>
8063 
              <description>Backup data</description>
8064 
              <bitOffset>0</bitOffset>
8065 
              <bitWidth>16</bitWidth>
8066 
            </field>
8067 
          </fields>
8068 
        </register>
8069 
        <register>
8070 
          <name>RTCCR</name>
8071 
          <displayName>RTCCR</displayName>
8072 
          <description>RTC clock calibration register
8073 
          (BKP_RTCCR)</description>
8074 
          <addressOffset>0x28</addressOffset>
8075 
          <size>0x20</size>
8076 
          <access>read-write</access>
8077 
          <resetValue>0x00000000</resetValue>
8078 
          <fields>
8079 
            <field>
8080 
              <name>CAL</name>
8081 
              <description>Calibration value</description>
8082 
              <bitOffset>0</bitOffset>
8083 
              <bitWidth>7</bitWidth>
8084 
            </field>
8085 
            <field>
8086 
              <name>CCO</name>
8087 
              <description>Calibration Clock Output</description>
8088 
              <bitOffset>7</bitOffset>
8089 
              <bitWidth>1</bitWidth>
8090 
            </field>
8091 
            <field>
8092 
              <name>ASOE</name>
8093 
              <description>Alarm or second output
8094 
              enable</description>
8095 
              <bitOffset>8</bitOffset>
8096 
              <bitWidth>1</bitWidth>
8097 
            </field>
8098 
            <field>
8099 
              <name>ASOS</name>
8100 
              <description>Alarm or second output
8101 
              selection</description>
8102 
              <bitOffset>9</bitOffset>
8103 
              <bitWidth>1</bitWidth>
8104 
            </field>
8105 
          </fields>
8106 
        </register>
8107 
        <register>
8108 
          <name>CR</name>
8109 
          <displayName>CR</displayName>
8110 
          <description>Backup control register
8111 
          (BKP_CR)</description>
8112 
          <addressOffset>0x2C</addressOffset>
8113 
          <size>0x20</size>
8114 
          <access>read-write</access>
8115 
          <resetValue>0x00000000</resetValue>
8116 
          <fields>
8117 
            <field>
8118 
              <name>TPE</name>
8119 
              <description>Tamper pin enable</description>
8120 
              <bitOffset>0</bitOffset>
8121 
              <bitWidth>1</bitWidth>
8122 
            </field>
8123 
            <field>
8124 
              <name>TPAL</name>
8125 
              <description>Tamper pin active level</description>
8126 
              <bitOffset>1</bitOffset>
8127 
              <bitWidth>1</bitWidth>
8128 
            </field>
8129 
          </fields>
8130 
        </register>
8131 
        <register>
8132 
          <name>CSR</name>
8133 
          <displayName>CSR</displayName>
8134 
          <description>BKP_CSR control/status register
8135 
          (BKP_CSR)</description>
8136 
          <addressOffset>0x30</addressOffset>
8137 
          <size>0x20</size>
8138 
          <resetValue>0x00000000</resetValue>
8139 
          <fields>
8140 
            <field>
8141 
              <name>CTE</name>
8142 
              <description>Clear Tamper event</description>
8143 
              <bitOffset>0</bitOffset>
8144 
              <bitWidth>1</bitWidth>
8145 
              <access>write-only</access>
8146 
            </field>
8147 
            <field>
8148 
              <name>CTI</name>
8149 
              <description>Clear Tamper Interrupt</description>
8150 
              <bitOffset>1</bitOffset>
8151 
              <bitWidth>1</bitWidth>
8152 
              <access>write-only</access>
8153 
            </field>
8154 
            <field>
8155 
              <name>TPIE</name>
8156 
              <description>Tamper Pin interrupt
8157 
              enable</description>
8158 
              <bitOffset>2</bitOffset>
8159 
              <bitWidth>1</bitWidth>
8160 
              <access>read-write</access>
8161 
            </field>
8162 
            <field>
8163 
              <name>TEF</name>
8164 
              <description>Tamper Event Flag</description>
8165 
              <bitOffset>8</bitOffset>
8166 
              <bitWidth>1</bitWidth>
8167 
              <access>read-only</access>
8168 
            </field>
8169 
            <field>
8170 
              <name>TIF</name>
8171 
              <description>Tamper Interrupt Flag</description>
8172 
              <bitOffset>9</bitOffset>
8173 
              <bitWidth>1</bitWidth>
8174 
              <access>read-only</access>
8175 
            </field>
8176 
          </fields>
8177 
        </register>
8178 
      </registers>
8179 
    </peripheral>
8180 
    <peripheral>
8181 
      <name>IWDG</name>
8182 
      <description>Independent watchdog</description>
8183 
      <groupName>IWDG</groupName>
8184 
      <baseAddress>0x40003000</baseAddress>
8185 
      <addressBlock>
8186 
        <offset>0x0</offset>
8187 
        <size>0x400</size>
8188 
        <usage>registers</usage>
8189 
      </addressBlock>
8190 
      <registers>
8191 
        <register>
8192 
          <name>KR</name>
8193 
          <displayName>KR</displayName>
8194 
          <description>Key register (IWDG_KR)</description>
8195 
          <addressOffset>0x0</addressOffset>
8196 
          <size>0x20</size>
8197 
          <access>write-only</access>
8198 
          <resetValue>0x00000000</resetValue>
8199 
          <fields>
8200 
            <field>
8201 
              <name>KEY</name>
8202 
              <description>Key value</description>
8203 
              <bitOffset>0</bitOffset>
8204 
              <bitWidth>16</bitWidth>
8205 
            </field>
8206 
          </fields>
8207 
        </register>
8208 
        <register>
8209 
          <name>PR</name>
8210 
          <displayName>PR</displayName>
8211 
          <description>Prescaler register (IWDG_PR)</description>
8212 
          <addressOffset>0x4</addressOffset>
8213 
          <size>0x20</size>
8214 
          <access>read-write</access>
8215 
          <resetValue>0x00000000</resetValue>
8216 
          <fields>
8217 
            <field>
8218 
              <name>PR</name>
8219 
              <description>Prescaler divider</description>
8220 
              <bitOffset>0</bitOffset>
8221 
              <bitWidth>3</bitWidth>
8222 
            </field>
8223 
          </fields>
8224 
        </register>
8225 
        <register>
8226 
          <name>RLR</name>
8227 
          <displayName>RLR</displayName>
8228 
          <description>Reload register (IWDG_RLR)</description>
8229 
          <addressOffset>0x8</addressOffset>
8230 
          <size>0x20</size>
8231 
          <access>read-write</access>
8232 
          <resetValue>0x00000FFF</resetValue>
8233 
          <fields>
8234 
            <field>
8235 
              <name>RL</name>
8236 
              <description>Watchdog counter reload
8237 
              value</description>
8238 
              <bitOffset>0</bitOffset>
8239 
              <bitWidth>12</bitWidth>
8240 
            </field>
8241 
          </fields>
8242 
        </register>
8243 
        <register>
8244 
          <name>SR</name>
8245 
          <displayName>SR</displayName>
8246 
          <description>Status register (IWDG_SR)</description>
8247 
          <addressOffset>0xC</addressOffset>
8248 
          <size>0x20</size>
8249 
          <access>read-only</access>
8250 
          <resetValue>0x00000000</resetValue>
8251 
          <fields>
8252 
            <field>
8253 
              <name>PVU</name>
8254 
              <description>Watchdog prescaler value
8255 
              update</description>
8256 
              <bitOffset>0</bitOffset>
8257 
              <bitWidth>1</bitWidth>
8258 
            </field>
8259 
            <field>
8260 
              <name>RVU</name>
8261 
              <description>Watchdog counter reload value
8262 
              update</description>
8263 
              <bitOffset>1</bitOffset>
8264 
              <bitWidth>1</bitWidth>
8265 
            </field>
8266 
          </fields>
8267 
        </register>
8268 
      </registers>
8269 
    </peripheral>
8270 
    <peripheral>
8271 
      <name>WWDG</name>
8272 
      <description>Window watchdog</description>
8273 
      <groupName>WWDG</groupName>
8274 
      <baseAddress>0x40002C00</baseAddress>
8275 
      <addressBlock>
8276 
        <offset>0x0</offset>
8277 
        <size>0x400</size>
8278 
        <usage>registers</usage>
8279 
      </addressBlock>
8280 
      <interrupt>
8281 
        <name>WWDG</name>
8282 
        <description>Window Watchdog interrupt</description>
8283 
        <value>0</value>
8284 
      </interrupt>
8285 
      <registers>
8286 
        <register>
8287 
          <name>CR</name>
8288 
          <displayName>CR</displayName>
8289 
          <description>Control register (WWDG_CR)</description>
8290 
          <addressOffset>0x0</addressOffset>
8291 
          <size>0x20</size>
8292 
          <access>read-write</access>
8293 
          <resetValue>0x0000007F</resetValue>
8294 
          <fields>
8295 
            <field>
8296 
              <name>T</name>
8297 
              <description>7-bit counter (MSB to LSB)</description>
8298 
              <bitOffset>0</bitOffset>
8299 
              <bitWidth>7</bitWidth>
8300 
            </field>
8301 
            <field>
8302 
              <name>WDGA</name>
8303 
              <description>Activation bit</description>
8304 
              <bitOffset>7</bitOffset>
8305 
              <bitWidth>1</bitWidth>
8306 
            </field>
8307 
          </fields>
8308 
        </register>
8309 
        <register>
8310 
          <name>CFR</name>
8311 
          <displayName>CFR</displayName>
8312 
          <description>Configuration register
8313 
          (WWDG_CFR)</description>
8314 
          <addressOffset>0x4</addressOffset>
8315 
          <size>0x20</size>
8316 
          <access>read-write</access>
8317 
          <resetValue>0x0000007F</resetValue>
8318 
          <fields>
8319 
            <field>
8320 
              <name>W</name>
8321 
              <description>7-bit window value</description>
8322 
              <bitOffset>0</bitOffset>
8323 
              <bitWidth>7</bitWidth>
8324 
            </field>
8325 
            <field>
8326 
              <name>WDGTB</name>
8327 
              <description>Timer Base</description>
8328 
              <bitOffset>7</bitOffset>
8329 
              <bitWidth>2</bitWidth>
8330 
            </field>
8331 
            <field>
8332 
              <name>EWI</name>
8333 
              <description>Early Wakeup Interrupt</description>
8334 
              <bitOffset>9</bitOffset>
8335 
              <bitWidth>1</bitWidth>
8336 
            </field>
8337 
          </fields>
8338 
        </register>
8339 
        <register>
8340 
          <name>SR</name>
8341 
          <displayName>SR</displayName>
8342 
          <description>Status register (WWDG_SR)</description>
8343 
          <addressOffset>0x8</addressOffset>
8344 
          <size>0x20</size>
8345 
          <access>read-write</access>
8346 
          <resetValue>0x00000000</resetValue>
8347 
          <fields>
8348 
            <field>
8349 
              <name>EWI</name>
8350 
              <description>Early Wakeup Interrupt</description>
8351 
              <bitOffset>0</bitOffset>
8352 
              <bitWidth>1</bitWidth>
8353 
            </field>
8354 
          </fields>
8355 
        </register>
8356 
      </registers>
8357 
    </peripheral>
8358 
    <peripheral>
8359 
      <name>TIM1</name>
8360 
      <description>Advanced timer</description>
8361 
      <groupName>TIM</groupName>
8362 
      <baseAddress>0x40012C00</baseAddress>
8363 
      <addressBlock>
8364 
        <offset>0x0</offset>
8365 
        <size>0x400</size>
8366 
        <usage>registers</usage>
8367 
      </addressBlock>
8368 
      <interrupt>
8369 
        <name>TIM1_BRK_TIM9</name>
8370 
        <description>TIM1 Break interrupt and TIM9 global
8371 
        interrupt</description>
8372 
        <value>24</value>
8373 
      </interrupt>
8374 
      <interrupt>
8375 
        <name>TIM1_UP_TIM10</name>
8376 
        <description>TIM1 Update interrupt and TIM10 global
8377 
        interrupt</description>
8378 
        <value>25</value>
8379 
      </interrupt>
8380 
      <interrupt>
8381 
        <name>TIM1_TRG_COM_TIM11</name>
8382 
        <description>TIM1 Trigger and Commutation interrupts and
8383 
        TIM11 global interrupt</description>
8384 
        <value>26</value>
8385 
      </interrupt>
8386 
      <interrupt>
8387 
        <name>TIM1_CC</name>
8388 
        <description>TIM1 Capture Compare interrupt</description>
8389 
        <value>27</value>
8390 
      </interrupt>
8391 
      <registers>
8392 
        <register>
8393 
          <name>CR1</name>
8394 
          <displayName>CR1</displayName>
8395 
          <description>control register 1</description>
8396 
          <addressOffset>0x0</addressOffset>
8397 
          <size>0x20</size>
8398 
          <access>read-write</access>
8399 
          <resetValue>0x0000</resetValue>
8400 
          <fields>
8401 
            <field>
8402 
              <name>CKD</name>
8403 
              <description>Clock division</description>
8404 
              <bitOffset>8</bitOffset>
8405 
              <bitWidth>2</bitWidth>
8406 
            </field>
8407 
            <field>
8408 
              <name>ARPE</name>
8409 
              <description>Auto-reload preload enable</description>
8410 
              <bitOffset>7</bitOffset>
8411 
              <bitWidth>1</bitWidth>
8412 
            </field>
8413 
            <field>
8414 
              <name>CMS</name>
8415 
              <description>Center-aligned mode
8416 
              selection</description>
8417 
              <bitOffset>5</bitOffset>
8418 
              <bitWidth>2</bitWidth>
8419 
            </field>
8420 
            <field>
8421 
              <name>DIR</name>
8422 
              <description>Direction</description>
8423 
              <bitOffset>4</bitOffset>
8424 
              <bitWidth>1</bitWidth>
8425 
            </field>
8426 
            <field>
8427 
              <name>OPM</name>
8428 
              <description>One-pulse mode</description>
8429 
              <bitOffset>3</bitOffset>
8430 
              <bitWidth>1</bitWidth>
8431 
            </field>
8432 
            <field>
8433 
              <name>URS</name>
8434 
              <description>Update request source</description>
8435 
              <bitOffset>2</bitOffset>
8436 
              <bitWidth>1</bitWidth>
8437 
            </field>
8438 
            <field>
8439 
              <name>UDIS</name>
8440 
              <description>Update disable</description>
8441 
              <bitOffset>1</bitOffset>
8442 
              <bitWidth>1</bitWidth>
8443 
            </field>
8444 
            <field>
8445 
              <name>CEN</name>
8446 
              <description>Counter enable</description>
8447 
              <bitOffset>0</bitOffset>
8448 
              <bitWidth>1</bitWidth>
8449 
            </field>
8450 
          </fields>
8451 
        </register>
8452 
        <register>
8453 
          <name>CR2</name>
8454 
          <displayName>CR2</displayName>
8455 
          <description>control register 2</description>
8456 
          <addressOffset>0x4</addressOffset>
8457 
          <size>0x20</size>
8458 
          <access>read-write</access>
8459 
          <resetValue>0x0000</resetValue>
8460 
          <fields>
8461 
            <field>
8462 
              <name>OIS4</name>
8463 
              <description>Output Idle state 4</description>
8464 
              <bitOffset>14</bitOffset>
8465 
              <bitWidth>1</bitWidth>
8466 
            </field>
8467 
            <field>
8468 
              <name>OIS3N</name>
8469 
              <description>Output Idle state 3</description>
8470 
              <bitOffset>13</bitOffset>
8471 
              <bitWidth>1</bitWidth>
8472 
            </field>
8473 
            <field>
8474 
              <name>OIS3</name>
8475 
              <description>Output Idle state 3</description>
8476 
              <bitOffset>12</bitOffset>
8477 
              <bitWidth>1</bitWidth>
8478 
            </field>
8479 
            <field>
8480 
              <name>OIS2N</name>
8481 
              <description>Output Idle state 2</description>
8482 
              <bitOffset>11</bitOffset>
8483 
              <bitWidth>1</bitWidth>
8484 
            </field>
8485 
            <field>
8486 
              <name>OIS2</name>
8487 
              <description>Output Idle state 2</description>
8488 
              <bitOffset>10</bitOffset>
8489 
              <bitWidth>1</bitWidth>
8490 
            </field>
8491 
            <field>
8492 
              <name>OIS1N</name>
8493 
              <description>Output Idle state 1</description>
8494 
              <bitOffset>9</bitOffset>
8495 
              <bitWidth>1</bitWidth>
8496 
            </field>
8497 
            <field>
8498 
              <name>OIS1</name>
8499 
              <description>Output Idle state 1</description>
8500 
              <bitOffset>8</bitOffset>
8501 
              <bitWidth>1</bitWidth>
8502 
            </field>
8503 
            <field>
8504 
              <name>TI1S</name>
8505 
              <description>TI1 selection</description>
8506 
              <bitOffset>7</bitOffset>
8507 
              <bitWidth>1</bitWidth>
8508 
            </field>
8509 
            <field>
8510 
              <name>MMS</name>
8511 
              <description>Master mode selection</description>
8512 
              <bitOffset>4</bitOffset>
8513 
              <bitWidth>3</bitWidth>
8514 
            </field>
8515 
            <field>
8516 
              <name>CCDS</name>
8517 
              <description>Capture/compare DMA
8518 
              selection</description>
8519 
              <bitOffset>3</bitOffset>
8520 
              <bitWidth>1</bitWidth>
8521 
            </field>
8522 
            <field>
8523 
              <name>CCUS</name>
8524 
              <description>Capture/compare control update
8525 
              selection</description>
8526 
              <bitOffset>2</bitOffset>
8527 
              <bitWidth>1</bitWidth>
8528 
            </field>
8529 
            <field>
8530 
              <name>CCPC</name>
8531 
              <description>Capture/compare preloaded
8532 
              control</description>
8533 
              <bitOffset>0</bitOffset>
8534 
              <bitWidth>1</bitWidth>
8535 
            </field>
8536 
          </fields>
8537 
        </register>
8538 
        <register>
8539 
          <name>SMCR</name>
8540 
          <displayName>SMCR</displayName>
8541 
          <description>slave mode control register</description>
8542 
          <addressOffset>0x8</addressOffset>
8543 
          <size>0x20</size>
8544 
          <access>read-write</access>
8545 
          <resetValue>0x0000</resetValue>
8546 
          <fields>
8547 
            <field>
8548 
              <name>ETP</name>
8549 
              <description>External trigger polarity</description>
8550 
              <bitOffset>15</bitOffset>
8551 
              <bitWidth>1</bitWidth>
8552 
            </field>
8553 
            <field>
8554 
              <name>ECE</name>
8555 
              <description>External clock enable</description>
8556 
              <bitOffset>14</bitOffset>
8557 
              <bitWidth>1</bitWidth>
8558 
            </field>
8559 
            <field>
8560 
              <name>ETPS</name>
8561 
              <description>External trigger prescaler</description>
8562 
              <bitOffset>12</bitOffset>
8563 
              <bitWidth>2</bitWidth>
8564 
            </field>
8565 
            <field>
8566 
              <name>ETF</name>
8567 
              <description>External trigger filter</description>
8568 
              <bitOffset>8</bitOffset>
8569 
              <bitWidth>4</bitWidth>
8570 
            </field>
8571 
            <field>
8572 
              <name>MSM</name>
8573 
              <description>Master/Slave mode</description>
8574 
              <bitOffset>7</bitOffset>
8575 
              <bitWidth>1</bitWidth>
8576 
            </field>
8577 
            <field>
8578 
              <name>TS</name>
8579 
              <description>Trigger selection</description>
8580 
              <bitOffset>4</bitOffset>
8581 
              <bitWidth>3</bitWidth>
8582 
            </field>
8583 
            <field>
8584 
              <name>SMS</name>
8585 
              <description>Slave mode selection</description>
8586 
              <bitOffset>0</bitOffset>
8587 
              <bitWidth>3</bitWidth>
8588 
            </field>
8589 
          </fields>
8590 
        </register>
8591 
        <register>
8592 
          <name>DIER</name>
8593 
          <displayName>DIER</displayName>
8594 
          <description>DMA/Interrupt enable register</description>
8595 
          <addressOffset>0xC</addressOffset>
8596 
          <size>0x20</size>
8597 
          <access>read-write</access>
8598 
          <resetValue>0x0000</resetValue>
8599 
          <fields>
8600 
            <field>
8601 
              <name>TDE</name>
8602 
              <description>Trigger DMA request enable</description>
8603 
              <bitOffset>14</bitOffset>
8604 
              <bitWidth>1</bitWidth>
8605 
            </field>
8606 
            <field>
8607 
              <name>COMDE</name>
8608 
              <description>COM DMA request enable</description>
8609 
              <bitOffset>13</bitOffset>
8610 
              <bitWidth>1</bitWidth>
8611 
            </field>
8612 
            <field>
8613 
              <name>CC4DE</name>
8614 
              <description>Capture/Compare 4 DMA request
8615 
              enable</description>
8616 
              <bitOffset>12</bitOffset>
8617 
              <bitWidth>1</bitWidth>
8618 
            </field>
8619 
            <field>
8620 
              <name>CC3DE</name>
8621 
              <description>Capture/Compare 3 DMA request
8622 
              enable</description>
8623 
              <bitOffset>11</bitOffset>
8624 
              <bitWidth>1</bitWidth>
8625 
            </field>
8626 
            <field>
8627 
              <name>CC2DE</name>
8628 
              <description>Capture/Compare 2 DMA request
8629 
              enable</description>
8630 
              <bitOffset>10</bitOffset>
8631 
              <bitWidth>1</bitWidth>
8632 
            </field>
8633 
            <field>
8634 
              <name>CC1DE</name>
8635 
              <description>Capture/Compare 1 DMA request
8636 
              enable</description>
8637 
              <bitOffset>9</bitOffset>
8638 
              <bitWidth>1</bitWidth>
8639 
            </field>
8640 
            <field>
8641 
              <name>UDE</name>
8642 
              <description>Update DMA request enable</description>
8643 
              <bitOffset>8</bitOffset>
8644 
              <bitWidth>1</bitWidth>
8645 
            </field>
8646 
            <field>
8647 
              <name>TIE</name>
8648 
              <description>Trigger interrupt enable</description>
8649 
              <bitOffset>6</bitOffset>
8650 
              <bitWidth>1</bitWidth>
8651 
            </field>
8652 
            <field>
8653 
              <name>CC4IE</name>
8654 
              <description>Capture/Compare 4 interrupt
8655 
              enable</description>
8656 
              <bitOffset>4</bitOffset>
8657 
              <bitWidth>1</bitWidth>
8658 
            </field>
8659 
            <field>
8660 
              <name>CC3IE</name>
8661 
              <description>Capture/Compare 3 interrupt
8662 
              enable</description>
8663 
              <bitOffset>3</bitOffset>
8664 
              <bitWidth>1</bitWidth>
8665 
            </field>
8666 
            <field>
8667 
              <name>CC2IE</name>
8668 
              <description>Capture/Compare 2 interrupt
8669 
              enable</description>
8670 
              <bitOffset>2</bitOffset>
8671 
              <bitWidth>1</bitWidth>
8672 
            </field>
8673 
            <field>
8674 
              <name>CC1IE</name>
8675 
              <description>Capture/Compare 1 interrupt
8676 
              enable</description>
8677 
              <bitOffset>1</bitOffset>
8678 
              <bitWidth>1</bitWidth>
8679 
            </field>
8680 
            <field>
8681 
              <name>UIE</name>
8682 
              <description>Update interrupt enable</description>
8683 
              <bitOffset>0</bitOffset>
8684 
              <bitWidth>1</bitWidth>
8685 
            </field>
8686 
            <field>
8687 
              <name>BIE</name>
8688 
              <description>Break interrupt enable</description>
8689 
              <bitOffset>7</bitOffset>
8690 
              <bitWidth>1</bitWidth>
8691 
            </field>
8692 
            <field>
8693 
              <name>COMIE</name>
8694 
              <description>COM interrupt enable</description>
8695 
              <bitOffset>5</bitOffset>
8696 
              <bitWidth>1</bitWidth>
8697 
            </field>
8698 
          </fields>
8699 
        </register>
8700 
        <register>
8701 
          <name>SR</name>
8702 
          <displayName>SR</displayName>
8703 
          <description>status register</description>
8704 
          <addressOffset>0x10</addressOffset>
8705 
          <size>0x20</size>
8706 
          <access>read-write</access>
8707 
          <resetValue>0x0000</resetValue>
8708 
          <fields>
8709 
            <field>
8710 
              <name>CC4OF</name>
8711 
              <description>Capture/Compare 4 overcapture
8712 
              flag</description>
8713 
              <bitOffset>12</bitOffset>
8714 
              <bitWidth>1</bitWidth>
8715 
            </field>
8716 
            <field>
8717 
              <name>CC3OF</name>
8718 
              <description>Capture/Compare 3 overcapture
8719 
              flag</description>
8720 
              <bitOffset>11</bitOffset>
8721 
              <bitWidth>1</bitWidth>
8722 
            </field>
8723 
            <field>
8724 
              <name>CC2OF</name>
8725 
              <description>Capture/compare 2 overcapture
8726 
              flag</description>
8727 
              <bitOffset>10</bitOffset>
8728 
              <bitWidth>1</bitWidth>
8729 
            </field>
8730 
            <field>
8731 
              <name>CC1OF</name>
8732 
              <description>Capture/Compare 1 overcapture
8733 
              flag</description>
8734 
              <bitOffset>9</bitOffset>
8735 
              <bitWidth>1</bitWidth>
8736 
            </field>
8737 
            <field>
8738 
              <name>BIF</name>
8739 
              <description>Break interrupt flag</description>
8740 
              <bitOffset>7</bitOffset>
8741 
              <bitWidth>1</bitWidth>
8742 
            </field>
8743 
            <field>
8744 
              <name>TIF</name>
8745 
              <description>Trigger interrupt flag</description>
8746 
              <bitOffset>6</bitOffset>
8747 
              <bitWidth>1</bitWidth>
8748 
            </field>
8749 
            <field>
8750 
              <name>COMIF</name>
8751 
              <description>COM interrupt flag</description>
8752 
              <bitOffset>5</bitOffset>
8753 
              <bitWidth>1</bitWidth>
8754 
            </field>
8755 
            <field>
8756 
              <name>CC4IF</name>
8757 
              <description>Capture/Compare 4 interrupt
8758 
              flag</description>
8759 
              <bitOffset>4</bitOffset>
8760 
              <bitWidth>1</bitWidth>
8761 
            </field>
8762 
            <field>
8763 
              <name>CC3IF</name>
8764 
              <description>Capture/Compare 3 interrupt
8765 
              flag</description>
8766 
              <bitOffset>3</bitOffset>
8767 
              <bitWidth>1</bitWidth>
8768 
            </field>
8769 
            <field>
8770 
              <name>CC2IF</name>
8771 
              <description>Capture/Compare 2 interrupt
8772 
              flag</description>
8773 
              <bitOffset>2</bitOffset>
8774 
              <bitWidth>1</bitWidth>
8775 
            </field>
8776 
            <field>
8777 
              <name>CC1IF</name>
8778 
              <description>Capture/compare 1 interrupt
8779 
              flag</description>
8780 
              <bitOffset>1</bitOffset>
8781 
              <bitWidth>1</bitWidth>
8782 
            </field>
8783 
            <field>
8784 
              <name>UIF</name>
8785 
              <description>Update interrupt flag</description>
8786 
              <bitOffset>0</bitOffset>
8787 
              <bitWidth>1</bitWidth>
8788 
            </field>
8789 
          </fields>
8790 
        </register>
8791 
        <register>
8792 
          <name>EGR</name>
8793 
          <displayName>EGR</displayName>
8794 
          <description>event generation register</description>
8795 
          <addressOffset>0x14</addressOffset>
8796 
          <size>0x20</size>
8797 
          <access>write-only</access>
8798 
          <resetValue>0x0000</resetValue>
8799 
          <fields>
8800 
            <field>
8801 
              <name>BG</name>
8802 
              <description>Break generation</description>
8803 
              <bitOffset>7</bitOffset>
8804 
              <bitWidth>1</bitWidth>
8805 
            </field>
8806 
            <field>
8807 
              <name>TG</name>
8808 
              <description>Trigger generation</description>
8809 
              <bitOffset>6</bitOffset>
8810 
              <bitWidth>1</bitWidth>
8811 
            </field>
8812 
            <field>
8813 
              <name>COMG</name>
8814 
              <description>Capture/Compare control update
8815 
              generation</description>
8816 
              <bitOffset>5</bitOffset>
8817 
              <bitWidth>1</bitWidth>
8818 
            </field>
8819 
            <field>
8820 
              <name>CC4G</name>
8821 
              <description>Capture/compare 4
8822 
              generation</description>
8823 
              <bitOffset>4</bitOffset>
8824 
              <bitWidth>1</bitWidth>
8825 
            </field>
8826 
            <field>
8827 
              <name>CC3G</name>
8828 
              <description>Capture/compare 3
8829 
              generation</description>
8830 
              <bitOffset>3</bitOffset>
8831 
              <bitWidth>1</bitWidth>
8832 
            </field>
8833 
            <field>
8834 
              <name>CC2G</name>
8835 
              <description>Capture/compare 2
8836 
              generation</description>
8837 
              <bitOffset>2</bitOffset>
8838 
              <bitWidth>1</bitWidth>
8839 
            </field>
8840 
            <field>
8841 
              <name>CC1G</name>
8842 
              <description>Capture/compare 1
8843 
              generation</description>
8844 
              <bitOffset>1</bitOffset>
8845 
              <bitWidth>1</bitWidth>
8846 
            </field>
8847 
            <field>
8848 
              <name>UG</name>
8849 
              <description>Update generation</description>
8850 
              <bitOffset>0</bitOffset>
8851 
              <bitWidth>1</bitWidth>
8852 
            </field>
8853 
          </fields>
8854 
        </register>
8855 
        <register>
8856 
          <name>CCMR1_Output</name>
8857 
          <displayName>CCMR1_Output</displayName>
8858 
          <description>capture/compare mode register (output
8859 
          mode)</description>
8860 
          <addressOffset>0x18</addressOffset>
8861 
          <size>0x20</size>
8862 
          <access>read-write</access>
8863 
          <resetValue>0x00000000</resetValue>
8864 
          <fields>
8865 
            <field>
8866 
              <name>OC2CE</name>
8867 
              <description>Output Compare 2 clear
8868 
              enable</description>
8869 
              <bitOffset>15</bitOffset>
8870 
              <bitWidth>1</bitWidth>
8871 
            </field>
8872 
            <field>
8873 
              <name>OC2M</name>
8874 
              <description>Output Compare 2 mode</description>
8875 
              <bitOffset>12</bitOffset>
8876 
              <bitWidth>3</bitWidth>
8877 
            </field>
8878 
            <field>
8879 
              <name>OC2PE</name>
8880 
              <description>Output Compare 2 preload
8881 
              enable</description>
8882 
              <bitOffset>11</bitOffset>
8883 
              <bitWidth>1</bitWidth>
8884 
            </field>
8885 
            <field>
8886 
              <name>OC2FE</name>
8887 
              <description>Output Compare 2 fast
8888 
              enable</description>
8889 
              <bitOffset>10</bitOffset>
8890 
              <bitWidth>1</bitWidth>
8891 
            </field>
8892 
            <field>
8893 
              <name>CC2S</name>
8894 
              <description>Capture/Compare 2
8895 
              selection</description>
8896 
              <bitOffset>8</bitOffset>
8897 
              <bitWidth>2</bitWidth>
8898 
            </field>
8899 
            <field>
8900 
              <name>OC1CE</name>
8901 
              <description>Output Compare 1 clear
8902 
              enable</description>
8903 
              <bitOffset>7</bitOffset>
8904 
              <bitWidth>1</bitWidth>
8905 
            </field>
8906 
            <field>
8907 
              <name>OC1M</name>
8908 
              <description>Output Compare 1 mode</description>
8909 
              <bitOffset>4</bitOffset>
8910 
              <bitWidth>3</bitWidth>
8911 
            </field>
8912 
            <field>
8913 
              <name>OC1PE</name>
8914 
              <description>Output Compare 1 preload
8915 
              enable</description>
8916 
              <bitOffset>3</bitOffset>
8917 
              <bitWidth>1</bitWidth>
8918 
            </field>
8919 
            <field>
8920 
              <name>OC1FE</name>
8921 
              <description>Output Compare 1 fast
8922 
              enable</description>
8923 
              <bitOffset>2</bitOffset>
8924 
              <bitWidth>1</bitWidth>
8925 
            </field>
8926 
            <field>
8927 
              <name>CC1S</name>
8928 
              <description>Capture/Compare 1
8929 
              selection</description>
8930 
              <bitOffset>0</bitOffset>
8931 
              <bitWidth>2</bitWidth>
8932 
            </field>
8933 
          </fields>
8934 
        </register>
8935 
        <register>
8936 
          <name>CCMR1_Input</name>
8937 
          <displayName>CCMR1_Input</displayName>
8938 
          <description>capture/compare mode register 1 (input
8939 
          mode)</description>
8940 
          <alternateRegister>CCMR1_Output</alternateRegister>
8941 
          <addressOffset>0x18</addressOffset>
8942 
          <size>0x20</size>
8943 
          <access>read-write</access>
8944 
          <resetValue>0x00000000</resetValue>
8945 
          <fields>
8946 
            <field>
8947 
              <name>IC2F</name>
8948 
              <description>Input capture 2 filter</description>
8949 
              <bitOffset>12</bitOffset>
8950 
              <bitWidth>4</bitWidth>
8951 
            </field>
8952 
            <field>
8953 
              <name>IC2PCS</name>
8954 
              <description>Input capture 2 prescaler</description>
8955 
              <bitOffset>10</bitOffset>
8956 
              <bitWidth>2</bitWidth>
8957 
            </field>
8958 
            <field>
8959 
              <name>CC2S</name>
8960 
              <description>Capture/Compare 2
8961 
              selection</description>
8962 
              <bitOffset>8</bitOffset>
8963 
              <bitWidth>2</bitWidth>
8964 
            </field>
8965 
            <field>
8966 
              <name>IC1F</name>
8967 
              <description>Input capture 1 filter</description>
8968 
              <bitOffset>4</bitOffset>
8969 
              <bitWidth>4</bitWidth>
8970 
            </field>
8971 
            <field>
8972 
              <name>ICPCS</name>
8973 
              <description>Input capture 1 prescaler</description>
8974 
              <bitOffset>2</bitOffset>
8975 
              <bitWidth>2</bitWidth>
8976 
            </field>
8977 
            <field>
8978 
              <name>CC1S</name>
8979 
              <description>Capture/Compare 1
8980 
              selection</description>
8981 
              <bitOffset>0</bitOffset>
8982 
              <bitWidth>2</bitWidth>
8983 
            </field>
8984 
          </fields>
8985 
        </register>
8986 
        <register>
8987 
          <name>CCMR2_Output</name>
8988 
          <displayName>CCMR2_Output</displayName>
8989 
          <description>capture/compare mode register (output
8990 
          mode)</description>
8991 
          <addressOffset>0x1C</addressOffset>
8992 
          <size>0x20</size>
8993 
          <access>read-write</access>
8994 
          <resetValue>0x00000000</resetValue>
8995 
          <fields>
8996 
            <field>
8997 
              <name>OC4CE</name>
8998 
              <description>Output compare 4 clear
8999 
              enable</description>
9000 
              <bitOffset>15</bitOffset>
9001 
              <bitWidth>1</bitWidth>
9002 
            </field>
9003 
            <field>
9004 
              <name>OC4M</name>
9005 
              <description>Output compare 4 mode</description>
9006 
              <bitOffset>12</bitOffset>
9007 
              <bitWidth>3</bitWidth>
9008 
            </field>
9009 
            <field>
9010 
              <name>OC4PE</name>
9011 
              <description>Output compare 4 preload
9012 
              enable</description>
9013 
              <bitOffset>11</bitOffset>
9014 
              <bitWidth>1</bitWidth>
9015 
            </field>
9016 
            <field>
9017 
              <name>OC4FE</name>
9018 
              <description>Output compare 4 fast
9019 
              enable</description>
9020 
              <bitOffset>10</bitOffset>
9021 
              <bitWidth>1</bitWidth>
9022 
            </field>
9023 
            <field>
9024 
              <name>CC4S</name>
9025 
              <description>Capture/Compare 4
9026 
              selection</description>
9027 
              <bitOffset>8</bitOffset>
9028 
              <bitWidth>2</bitWidth>
9029 
            </field>
9030 
            <field>
9031 
              <name>OC3CE</name>
9032 
              <description>Output compare 3 clear
9033 
              enable</description>
9034 
              <bitOffset>7</bitOffset>
9035 
              <bitWidth>1</bitWidth>
9036 
            </field>
9037 
            <field>
9038 
              <name>OC3M</name>
9039 
              <description>Output compare 3 mode</description>
9040 
              <bitOffset>4</bitOffset>
9041 
              <bitWidth>3</bitWidth>
9042 
            </field>
9043 
            <field>
9044 
              <name>OC3PE</name>
9045 
              <description>Output compare 3 preload
9046 
              enable</description>
9047 
              <bitOffset>3</bitOffset>
9048 
              <bitWidth>1</bitWidth>
9049 
            </field>
9050 
            <field>
9051 
              <name>OC3FE</name>
9052 
              <description>Output compare 3 fast
9053 
              enable</description>
9054 
              <bitOffset>2</bitOffset>
9055 
              <bitWidth>1</bitWidth>
9056 
            </field>
9057 
            <field>
9058 
              <name>CC3S</name>
9059 
              <description>Capture/Compare 3
9060 
              selection</description>
9061 
              <bitOffset>0</bitOffset>
9062 
              <bitWidth>2</bitWidth>
9063 
            </field>
9064 
          </fields>
9065 
        </register>
9066 
        <register>
9067 
          <name>CCMR2_Input</name>
9068 
          <displayName>CCMR2_Input</displayName>
9069 
          <description>capture/compare mode register 2 (input
9070 
          mode)</description>
9071 
          <alternateRegister>CCMR2_Output</alternateRegister>
9072 
          <addressOffset>0x1C</addressOffset>
9073 
          <size>0x20</size>
9074 
          <access>read-write</access>
9075 
          <resetValue>0x00000000</resetValue>
9076 
          <fields>
9077 
            <field>
9078 
              <name>IC4F</name>
9079 
              <description>Input capture 4 filter</description>
9080 
              <bitOffset>12</bitOffset>
9081 
              <bitWidth>4</bitWidth>
9082 
            </field>
9083 
            <field>
9084 
              <name>IC4PSC</name>
9085 
              <description>Input capture 4 prescaler</description>
9086 
              <bitOffset>10</bitOffset>
9087 
              <bitWidth>2</bitWidth>
9088 
            </field>
9089 
            <field>
9090 
              <name>CC4S</name>
9091 
              <description>Capture/Compare 4
9092 
              selection</description>
9093 
              <bitOffset>8</bitOffset>
9094 
              <bitWidth>2</bitWidth>
9095 
            </field>
9096 
            <field>
9097 
              <name>IC3F</name>
9098 
              <description>Input capture 3 filter</description>
9099 
              <bitOffset>4</bitOffset>
9100 
              <bitWidth>4</bitWidth>
9101 
            </field>
9102 
            <field>
9103 
              <name>IC3PSC</name>
9104 
              <description>Input capture 3 prescaler</description>
9105 
              <bitOffset>2</bitOffset>
9106 
              <bitWidth>2</bitWidth>
9107 
            </field>
9108 
            <field>
9109 
              <name>CC3S</name>
9110 
              <description>Capture/compare 3
9111 
              selection</description>
9112 
              <bitOffset>0</bitOffset>
9113 
              <bitWidth>2</bitWidth>
9114 
            </field>
9115 
          </fields>
9116 
        </register>
9117 
        <register>
9118 
          <name>CCER</name>
9119 
          <displayName>CCER</displayName>
9120 
          <description>capture/compare enable
9121 
          register</description>
9122 
          <addressOffset>0x20</addressOffset>
9123 
          <size>0x20</size>
9124 
          <access>read-write</access>
9125 
          <resetValue>0x0000</resetValue>
9126 
          <fields>
9127 
            <field>
9128 
              <name>CC4P</name>
9129 
              <description>Capture/Compare 3 output
9130 
              Polarity</description>
9131 
              <bitOffset>13</bitOffset>
9132 
              <bitWidth>1</bitWidth>
9133 
            </field>
9134 
            <field>
9135 
              <name>CC4E</name>
9136 
              <description>Capture/Compare 4 output
9137 
              enable</description>
9138 
              <bitOffset>12</bitOffset>
9139 
              <bitWidth>1</bitWidth>
9140 
            </field>
9141 
            <field>
9142 
              <name>CC3NP</name>
9143 
              <description>Capture/Compare 3 output
9144 
              Polarity</description>
9145 
              <bitOffset>11</bitOffset>
9146 
              <bitWidth>1</bitWidth>
9147 
            </field>
9148 
            <field>
9149 
              <name>CC3NE</name>
9150 
              <description>Capture/Compare 3 complementary output
9151 
              enable</description>
9152 
              <bitOffset>10</bitOffset>
9153 
              <bitWidth>1</bitWidth>
9154 
            </field>
9155 
            <field>
9156 
              <name>CC3P</name>
9157 
              <description>Capture/Compare 3 output
9158 
              Polarity</description>
9159 
              <bitOffset>9</bitOffset>
9160 
              <bitWidth>1</bitWidth>
9161 
            </field>
9162 
            <field>
9163 
              <name>CC3E</name>
9164 
              <description>Capture/Compare 3 output
9165 
              enable</description>
9166 
              <bitOffset>8</bitOffset>
9167 
              <bitWidth>1</bitWidth>
9168 
            </field>
9169 
            <field>
9170 
              <name>CC2NP</name>
9171 
              <description>Capture/Compare 2 output
9172 
              Polarity</description>
9173 
              <bitOffset>7</bitOffset>
9174 
              <bitWidth>1</bitWidth>
9175 
            </field>
9176 
            <field>
9177 
              <name>CC2NE</name>
9178 
              <description>Capture/Compare 2 complementary output
9179 
              enable</description>
9180 
              <bitOffset>6</bitOffset>
9181 
              <bitWidth>1</bitWidth>
9182 
            </field>
9183 
            <field>
9184 
              <name>CC2P</name>
9185 
              <description>Capture/Compare 2 output
9186 
              Polarity</description>
9187 
              <bitOffset>5</bitOffset>
9188 
              <bitWidth>1</bitWidth>
9189 
            </field>
9190 
            <field>
9191 
              <name>CC2E</name>
9192 
              <description>Capture/Compare 2 output
9193 
              enable</description>
9194 
              <bitOffset>4</bitOffset>
9195 
              <bitWidth>1</bitWidth>
9196 
            </field>
9197 
            <field>
9198 
              <name>CC1NP</name>
9199 
              <description>Capture/Compare 1 output
9200 
              Polarity</description>
9201 
              <bitOffset>3</bitOffset>
9202 
              <bitWidth>1</bitWidth>
9203 
            </field>
9204 
            <field>
9205 
              <name>CC1NE</name>
9206 
              <description>Capture/Compare 1 complementary output
9207 
              enable</description>
9208 
              <bitOffset>2</bitOffset>
9209 
              <bitWidth>1</bitWidth>
9210 
            </field>
9211 
            <field>
9212 
              <name>CC1P</name>
9213 
              <description>Capture/Compare 1 output
9214 
              Polarity</description>
9215 
              <bitOffset>1</bitOffset>
9216 
              <bitWidth>1</bitWidth>
9217 
            </field>
9218 
            <field>
9219 
              <name>CC1E</name>
9220 
              <description>Capture/Compare 1 output
9221 
              enable</description>
9222 
              <bitOffset>0</bitOffset>
9223 
              <bitWidth>1</bitWidth>
9224 
            </field>
9225 
          </fields>
9226 
        </register>
9227 
        <register>
9228 
          <name>CNT</name>
9229 
          <displayName>CNT</displayName>
9230 
          <description>counter</description>
9231 
          <addressOffset>0x24</addressOffset>
9232 
          <size>0x20</size>
9233 
          <access>read-write</access>
9234 
          <resetValue>0x00000000</resetValue>
9235 
          <fields>
9236 
            <field>
9237 
              <name>CNT</name>
9238 
              <description>counter value</description>
9239 
              <bitOffset>0</bitOffset>
9240 
              <bitWidth>16</bitWidth>
9241 
            </field>
9242 
          </fields>
9243 
        </register>
9244 
        <register>
9245 
          <name>PSC</name>
9246 
          <displayName>PSC</displayName>
9247 
          <description>prescaler</description>
9248 
          <addressOffset>0x28</addressOffset>
9249 
          <size>0x20</size>
9250 
          <access>read-write</access>
9251 
          <resetValue>0x0000</resetValue>
9252 
          <fields>
9253 
            <field>
9254 
              <name>PSC</name>
9255 
              <description>Prescaler value</description>
9256 
              <bitOffset>0</bitOffset>
9257 
              <bitWidth>16</bitWidth>
9258 
            </field>
9259 
          </fields>
9260 
        </register>
9261 
        <register>
9262 
          <name>ARR</name>
9263 
          <displayName>ARR</displayName>
9264 
          <description>auto-reload register</description>
9265 
          <addressOffset>0x2C</addressOffset>
9266 
          <size>0x20</size>
9267 
          <access>read-write</access>
9268 
          <resetValue>0x00000000</resetValue>
9269 
          <fields>
9270 
            <field>
9271 
              <name>ARR</name>
9272 
              <description>Auto-reload value</description>
9273 
              <bitOffset>0</bitOffset>
9274 
              <bitWidth>16</bitWidth>
9275 
            </field>
9276 
          </fields>
9277 
        </register>
9278 
        <register>
9279 
          <name>CCR1</name>
9280 
          <displayName>CCR1</displayName>
9281 
          <description>capture/compare register 1</description>
9282 
          <addressOffset>0x34</addressOffset>
9283 
          <size>0x20</size>
9284 
          <access>read-write</access>
9285 
          <resetValue>0x00000000</resetValue>
9286 
          <fields>
9287 
            <field>
9288 
              <name>CCR1</name>
9289 
              <description>Capture/Compare 1 value</description>
9290 
              <bitOffset>0</bitOffset>
9291 
              <bitWidth>16</bitWidth>
9292 
            </field>
9293 
          </fields>
9294 
        </register>
9295 
        <register>
9296 
          <name>CCR2</name>
9297 
          <displayName>CCR2</displayName>
9298 
          <description>capture/compare register 2</description>
9299 
          <addressOffset>0x38</addressOffset>
9300 
          <size>0x20</size>
9301 
          <access>read-write</access>
9302 
          <resetValue>0x00000000</resetValue>
9303 
          <fields>
9304 
            <field>
9305 
              <name>CCR2</name>
9306 
              <description>Capture/Compare 2 value</description>
9307 
              <bitOffset>0</bitOffset>
9308 
              <bitWidth>16</bitWidth>
9309 
            </field>
9310 
          </fields>
9311 
        </register>
9312 
        <register>
9313 
          <name>CCR3</name>
9314 
          <displayName>CCR3</displayName>
9315 
          <description>capture/compare register 3</description>
9316 
          <addressOffset>0x3C</addressOffset>
9317 
          <size>0x20</size>
9318 
          <access>read-write</access>
9319 
          <resetValue>0x00000000</resetValue>
9320 
          <fields>
9321 
            <field>
9322 
              <name>CCR3</name>
9323 
              <description>Capture/Compare value</description>
9324 
              <bitOffset>0</bitOffset>
9325 
              <bitWidth>16</bitWidth>
9326 
            </field>
9327 
          </fields>
9328 
        </register>
9329 
        <register>
9330 
          <name>CCR4</name>
9331 
          <displayName>CCR4</displayName>
9332 
          <description>capture/compare register 4</description>
9333 
          <addressOffset>0x40</addressOffset>
9334 
          <size>0x20</size>
9335 
          <access>read-write</access>
9336 
          <resetValue>0x00000000</resetValue>
9337 
          <fields>
9338 
            <field>
9339 
              <name>CCR4</name>
9340 
              <description>Capture/Compare value</description>
9341 
              <bitOffset>0</bitOffset>
9342 
              <bitWidth>16</bitWidth>
9343 
            </field>
9344 
          </fields>
9345 
        </register>
9346 
        <register>
9347 
          <name>DCR</name>
9348 
          <displayName>DCR</displayName>
9349 
          <description>DMA control register</description>
9350 
          <addressOffset>0x48</addressOffset>
9351 
          <size>0x20</size>
9352 
          <access>read-write</access>
9353 
          <resetValue>0x0000</resetValue>
9354 
          <fields>
9355 
            <field>
9356 
              <name>DBL</name>
9357 
              <description>DMA burst length</description>
9358 
              <bitOffset>8</bitOffset>
9359 
              <bitWidth>5</bitWidth>
9360 
            </field>
9361 
            <field>
9362 
              <name>DBA</name>
9363 
              <description>DMA base address</description>
9364 
              <bitOffset>0</bitOffset>
9365 
              <bitWidth>5</bitWidth>
9366 
            </field>
9367 
          </fields>
9368 
        </register>
9369 
        <register>
9370 
          <name>DMAR</name>
9371 
          <displayName>DMAR</displayName>
9372 
          <description>DMA address for full transfer</description>
9373 
          <addressOffset>0x4C</addressOffset>
9374 
          <size>0x20</size>
9375 
          <access>read-write</access>
9376 
          <resetValue>0x0000</resetValue>
9377 
          <fields>
9378 
            <field>
9379 
              <name>DMAB</name>
9380 
              <description>DMA register for burst
9381 
              accesses</description>
9382 
              <bitOffset>0</bitOffset>
9383 
              <bitWidth>16</bitWidth>
9384 
            </field>
9385 
          </fields>
9386 
        </register>
9387 
        <register>
9388 
          <name>RCR</name>
9389 
          <displayName>RCR</displayName>
9390 
          <description>repetition counter register</description>
9391 
          <addressOffset>0x30</addressOffset>
9392 
          <size>0x20</size>
9393 
          <access>read-write</access>
9394 
          <resetValue>0x0000</resetValue>
9395 
          <fields>
9396 
            <field>
9397 
              <name>REP</name>
9398 
              <description>Repetition counter value</description>
9399 
              <bitOffset>0</bitOffset>
9400 
              <bitWidth>8</bitWidth>
9401 
            </field>
9402 
          </fields>
9403 
        </register>
9404 
        <register>
9405 
          <name>BDTR</name>
9406 
          <displayName>BDTR</displayName>
9407 
          <description>break and dead-time register</description>
9408 
          <addressOffset>0x44</addressOffset>
9409 
          <size>0x20</size>
9410 
          <access>read-write</access>
9411 
          <resetValue>0x0000</resetValue>
9412 
          <fields>
9413 
            <field>
9414 
              <name>MOE</name>
9415 
              <description>Main output enable</description>
9416 
              <bitOffset>15</bitOffset>
9417 
              <bitWidth>1</bitWidth>
9418 
            </field>
9419 
            <field>
9420 
              <name>AOE</name>
9421 
              <description>Automatic output enable</description>
9422 
              <bitOffset>14</bitOffset>
9423 
              <bitWidth>1</bitWidth>
9424 
            </field>
9425 
            <field>
9426 
              <name>BKP</name>
9427 
              <description>Break polarity</description>
9428 
              <bitOffset>13</bitOffset>
9429 
              <bitWidth>1</bitWidth>
9430 
            </field>
9431 
            <field>
9432 
              <name>BKE</name>
9433 
              <description>Break enable</description>
9434 
              <bitOffset>12</bitOffset>
9435 
              <bitWidth>1</bitWidth>
9436 
            </field>
9437 
            <field>
9438 
              <name>OSSR</name>
9439 
              <description>Off-state selection for Run
9440 
              mode</description>
9441 
              <bitOffset>11</bitOffset>
9442 
              <bitWidth>1</bitWidth>
9443 
            </field>
9444 
            <field>
9445 
              <name>OSSI</name>
9446 
              <description>Off-state selection for Idle
9447 
              mode</description>
9448 
              <bitOffset>10</bitOffset>
9449 
              <bitWidth>1</bitWidth>
9450 
            </field>
9451 
            <field>
9452 
              <name>LOCK</name>
9453 
              <description>Lock configuration</description>
9454 
              <bitOffset>8</bitOffset>
9455 
              <bitWidth>2</bitWidth>
9456 
            </field>
9457 
            <field>
9458 
              <name>DTG</name>
9459 
              <description>Dead-time generator setup</description>
9460 
              <bitOffset>0</bitOffset>
9461 
              <bitWidth>8</bitWidth>
9462 
            </field>
9463 
          </fields>
9464 
        </register>
9465 
      </registers>
9466 
    </peripheral>
9467 
    <peripheral derivedFrom="TIM1">
9468 
      <name>TIM8</name>
9469 
      <baseAddress>0x40013400</baseAddress>
9470 
      <interrupt>
9471 
        <name>TIM8_BRK_TIM12</name>
9472 
        <description>TIM8 Break interrupt and TIM12 global
9473 
        interrupt</description>
9474 
        <value>43</value>
9475 
      </interrupt>
9476 
      <interrupt>
9477 
        <name>TIM8_UP_TIM13</name>
9478 
        <description>TIM8 Update interrupt and TIM13 global
9479 
        interrupt</description>
9480 
        <value>44</value>
9481 
      </interrupt>
9482 
      <interrupt>
9483 
        <name>TIM8_TRG_COM_TIM14</name>
9484 
        <description>TIM8 Trigger and Commutation interrupts and
9485 
        TIM14 global interrupt</description>
9486 
        <value>45</value>
9487 
      </interrupt>
9488 
      <interrupt>
9489 
        <name>TIM8_CC</name>
9490 
        <description>TIM8 Capture Compare interrupt</description>
9491 
        <value>46</value>
9492 
      </interrupt>
9493 
    </peripheral>
9494 
    <peripheral>
9495 
      <name>TIM2</name>
9496 
      <description>General purpose timer</description>
9497 
      <groupName>TIM</groupName>
9498 
      <baseAddress>0x40000000</baseAddress>
9499 
      <addressBlock>
9500 
        <offset>0x0</offset>
9501 
        <size>0x400</size>
9502 
        <usage>registers</usage>
9503 
      </addressBlock>
9504 
      <interrupt>
9505 
        <name>TIM2</name>
9506 
        <description>TIM2 global interrupt</description>
9507 
        <value>28</value>
9508 
      </interrupt>
9509 
      <registers>
9510 
        <register>
9511 
          <name>CR1</name>
9512 
          <displayName>CR1</displayName>
9513 
          <description>control register 1</description>
9514 
          <addressOffset>0x0</addressOffset>
9515 
          <size>0x20</size>
9516 
          <access>read-write</access>
9517 
          <resetValue>0x0000</resetValue>
9518 
          <fields>
9519 
            <field>
9520 
              <name>CKD</name>
9521 
              <description>Clock division</description>
9522 
              <bitOffset>8</bitOffset>
9523 
              <bitWidth>2</bitWidth>
9524 
            </field>
9525 
            <field>
9526 
              <name>ARPE</name>
9527 
              <description>Auto-reload preload enable</description>
9528 
              <bitOffset>7</bitOffset>
9529 
              <bitWidth>1</bitWidth>
9530 
            </field>
9531 
            <field>
9532 
              <name>CMS</name>
9533 
              <description>Center-aligned mode
9534 
              selection</description>
9535 
              <bitOffset>5</bitOffset>
9536 
              <bitWidth>2</bitWidth>
9537 
            </field>
9538 
            <field>
9539 
              <name>DIR</name>
9540 
              <description>Direction</description>
9541 
              <bitOffset>4</bitOffset>
9542 
              <bitWidth>1</bitWidth>
9543 
            </field>
9544 
            <field>
9545 
              <name>OPM</name>
9546 
              <description>One-pulse mode</description>
9547 
              <bitOffset>3</bitOffset>
9548 
              <bitWidth>1</bitWidth>
9549 
            </field>
9550 
            <field>
9551 
              <name>URS</name>
9552 
              <description>Update request source</description>
9553 
              <bitOffset>2</bitOffset>
9554 
              <bitWidth>1</bitWidth>
9555 
            </field>
9556 
            <field>
9557 
              <name>UDIS</name>
9558 
              <description>Update disable</description>
9559 
              <bitOffset>1</bitOffset>
9560 
              <bitWidth>1</bitWidth>
9561 
            </field>
9562 
            <field>
9563 
              <name>CEN</name>
9564 
              <description>Counter enable</description>
9565 
              <bitOffset>0</bitOffset>
9566 
              <bitWidth>1</bitWidth>
9567 
            </field>
9568 
          </fields>
9569 
        </register>
9570 
        <register>
9571 
          <name>CR2</name>
9572 
          <displayName>CR2</displayName>
9573 
          <description>control register 2</description>
9574 
          <addressOffset>0x4</addressOffset>
9575 
          <size>0x20</size>
9576 
          <access>read-write</access>
9577 
          <resetValue>0x0000</resetValue>
9578 
          <fields>
9579 
            <field>
9580 
              <name>TI1S</name>
9581 
              <description>TI1 selection</description>
9582 
              <bitOffset>7</bitOffset>
9583 
              <bitWidth>1</bitWidth>
9584 
            </field>
9585 
            <field>
9586 
              <name>MMS</name>
9587 
              <description>Master mode selection</description>
9588 
              <bitOffset>4</bitOffset>
9589 
              <bitWidth>3</bitWidth>
9590 
            </field>
9591 
            <field>
9592 
              <name>CCDS</name>
9593 
              <description>Capture/compare DMA
9594 
              selection</description>
9595 
              <bitOffset>3</bitOffset>
9596 
              <bitWidth>1</bitWidth>
9597 
            </field>
9598 
          </fields>
9599 
        </register>
9600 
        <register>
9601 
          <name>SMCR</name>
9602 
          <displayName>SMCR</displayName>
9603 
          <description>slave mode control register</description>
9604 
          <addressOffset>0x8</addressOffset>
9605 
          <size>0x20</size>
9606 
          <access>read-write</access>
9607 
          <resetValue>0x0000</resetValue>
9608 
          <fields>
9609 
            <field>
9610 
              <name>ETP</name>
9611 
              <description>External trigger polarity</description>
9612 
              <bitOffset>15</bitOffset>
9613 
              <bitWidth>1</bitWidth>
9614 
            </field>
9615 
            <field>
9616 
              <name>ECE</name>
9617 
              <description>External clock enable</description>
9618 
              <bitOffset>14</bitOffset>
9619 
              <bitWidth>1</bitWidth>
9620 
            </field>
9621 
            <field>
9622 
              <name>ETPS</name>
9623 
              <description>External trigger prescaler</description>
9624 
              <bitOffset>12</bitOffset>
9625 
              <bitWidth>2</bitWidth>
9626 
            </field>
9627 
            <field>
9628 
              <name>ETF</name>
9629 
              <description>External trigger filter</description>
9630 
              <bitOffset>8</bitOffset>
9631 
              <bitWidth>4</bitWidth>
9632 
            </field>
9633 
            <field>
9634 
              <name>MSM</name>
9635 
              <description>Master/Slave mode</description>
9636 
              <bitOffset>7</bitOffset>
9637 
              <bitWidth>1</bitWidth>
9638 
            </field>
9639 
            <field>
9640 
              <name>TS</name>
9641 
              <description>Trigger selection</description>
9642 
              <bitOffset>4</bitOffset>
9643 
              <bitWidth>3</bitWidth>
9644 
            </field>
9645 
            <field>
9646 
              <name>SMS</name>
9647 
              <description>Slave mode selection</description>
9648 
              <bitOffset>0</bitOffset>
9649 
              <bitWidth>3</bitWidth>
9650 
            </field>
9651 
          </fields>
9652 
        </register>
9653 
        <register>
9654 
          <name>DIER</name>
9655 
          <displayName>DIER</displayName>
9656 
          <description>DMA/Interrupt enable register</description>
9657 
          <addressOffset>0xC</addressOffset>
9658 
          <size>0x20</size>
9659 
          <access>read-write</access>
9660 
          <resetValue>0x0000</resetValue>
9661 
          <fields>
9662 
            <field>
9663 
              <name>TDE</name>
9664 
              <description>Trigger DMA request enable</description>
9665 
              <bitOffset>14</bitOffset>
9666 
              <bitWidth>1</bitWidth>
9667 
            </field>
9668 
            <field>
9669 
              <name>CC4DE</name>
9670 
              <description>Capture/Compare 4 DMA request
9671 
              enable</description>
9672 
              <bitOffset>12</bitOffset>
9673 
              <bitWidth>1</bitWidth>
9674 
            </field>
9675 
            <field>
9676 
              <name>CC3DE</name>
9677 
              <description>Capture/Compare 3 DMA request
9678 
              enable</description>
9679 
              <bitOffset>11</bitOffset>
9680 
              <bitWidth>1</bitWidth>
9681 
            </field>
9682 
            <field>
9683 
              <name>CC2DE</name>
9684 
              <description>Capture/Compare 2 DMA request
9685 
              enable</description>
9686 
              <bitOffset>10</bitOffset>
9687 
              <bitWidth>1</bitWidth>
9688 
            </field>
9689 
            <field>
9690 
              <name>CC1DE</name>
9691 
              <description>Capture/Compare 1 DMA request
9692 
              enable</description>
9693 
              <bitOffset>9</bitOffset>
9694 
              <bitWidth>1</bitWidth>
9695 
            </field>
9696 
            <field>
9697 
              <name>UDE</name>
9698 
              <description>Update DMA request enable</description>
9699 
              <bitOffset>8</bitOffset>
9700 
              <bitWidth>1</bitWidth>
9701 
            </field>
9702 
            <field>
9703 
              <name>TIE</name>
9704 
              <description>Trigger interrupt enable</description>
9705 
              <bitOffset>6</bitOffset>
9706 
              <bitWidth>1</bitWidth>
9707 
            </field>
9708 
            <field>
9709 
              <name>CC4IE</name>
9710 
              <description>Capture/Compare 4 interrupt
9711 
              enable</description>
9712 
              <bitOffset>4</bitOffset>
9713 
              <bitWidth>1</bitWidth>
9714 
            </field>
9715 
            <field>
9716 
              <name>CC3IE</name>
9717 
              <description>Capture/Compare 3 interrupt
9718 
              enable</description>
9719 
              <bitOffset>3</bitOffset>
9720 
              <bitWidth>1</bitWidth>
9721 
            </field>
9722 
            <field>
9723 
              <name>CC2IE</name>
9724 
              <description>Capture/Compare 2 interrupt
9725 
              enable</description>
9726 
              <bitOffset>2</bitOffset>
9727 
              <bitWidth>1</bitWidth>
9728 
            </field>
9729 
            <field>
9730 
              <name>CC1IE</name>
9731 
              <description>Capture/Compare 1 interrupt
9732 
              enable</description>
9733 
              <bitOffset>1</bitOffset>
9734 
              <bitWidth>1</bitWidth>
9735 
            </field>
9736 
            <field>
9737 
              <name>UIE</name>
9738 
              <description>Update interrupt enable</description>
9739 
              <bitOffset>0</bitOffset>
9740 
              <bitWidth>1</bitWidth>
9741 
            </field>
9742 
          </fields>
9743 
        </register>
9744 
        <register>
9745 
          <name>SR</name>
9746 
          <displayName>SR</displayName>
9747 
          <description>status register</description>
9748 
          <addressOffset>0x10</addressOffset>
9749 
          <size>0x20</size>
9750 
          <access>read-write</access>
9751 
          <resetValue>0x0000</resetValue>
9752 
          <fields>
9753 
            <field>
9754 
              <name>CC4OF</name>
9755 
              <description>Capture/Compare 4 overcapture
9756 
              flag</description>
9757 
              <bitOffset>12</bitOffset>
9758 
              <bitWidth>1</bitWidth>
9759 
            </field>
9760 
            <field>
9761 
              <name>CC3OF</name>
9762 
              <description>Capture/Compare 3 overcapture
9763 
              flag</description>
9764 
              <bitOffset>11</bitOffset>
9765 
              <bitWidth>1</bitWidth>
9766 
            </field>
9767 
            <field>
9768 
              <name>CC2OF</name>
9769 
              <description>Capture/compare 2 overcapture
9770 
              flag</description>
9771 
              <bitOffset>10</bitOffset>
9772 
              <bitWidth>1</bitWidth>
9773 
            </field>
9774 
            <field>
9775 
              <name>CC1OF</name>
9776 
              <description>Capture/Compare 1 overcapture
9777 
              flag</description>
9778 
              <bitOffset>9</bitOffset>
9779 
              <bitWidth>1</bitWidth>
9780 
            </field>
9781 
            <field>
9782 
              <name>TIF</name>
9783 
              <description>Trigger interrupt flag</description>
9784 
              <bitOffset>6</bitOffset>
9785 
              <bitWidth>1</bitWidth>
9786 
            </field>
9787 
            <field>
9788 
              <name>CC4IF</name>
9789 
              <description>Capture/Compare 4 interrupt
9790 
              flag</description>
9791 
              <bitOffset>4</bitOffset>
9792 
              <bitWidth>1</bitWidth>
9793 
            </field>
9794 
            <field>
9795 
              <name>CC3IF</name>
9796 
              <description>Capture/Compare 3 interrupt
9797 
              flag</description>
9798 
              <bitOffset>3</bitOffset>
9799 
              <bitWidth>1</bitWidth>
9800 
            </field>
9801 
            <field>
9802 
              <name>CC2IF</name>
9803 
              <description>Capture/Compare 2 interrupt
9804 
              flag</description>
9805 
              <bitOffset>2</bitOffset>
9806 
              <bitWidth>1</bitWidth>
9807 
            </field>
9808 
            <field>
9809 
              <name>CC1IF</name>
9810 
              <description>Capture/compare 1 interrupt
9811 
              flag</description>
9812 
              <bitOffset>1</bitOffset>
9813 
              <bitWidth>1</bitWidth>
9814 
            </field>
9815 
            <field>
9816 
              <name>UIF</name>
9817 
              <description>Update interrupt flag</description>
9818 
              <bitOffset>0</bitOffset>
9819 
              <bitWidth>1</bitWidth>
9820 
            </field>
9821 
          </fields>
9822 
        </register>
9823 
        <register>
9824 
          <name>EGR</name>
9825 
          <displayName>EGR</displayName>
9826 
          <description>event generation register</description>
9827 
          <addressOffset>0x14</addressOffset>
9828 
          <size>0x20</size>
9829 
          <access>write-only</access>
9830 
          <resetValue>0x0000</resetValue>
9831 
          <fields>
9832 
            <field>
9833 
              <name>TG</name>
9834 
              <description>Trigger generation</description>
9835 
              <bitOffset>6</bitOffset>
9836 
              <bitWidth>1</bitWidth>
9837 
            </field>
9838 
            <field>
9839 
              <name>CC4G</name>
9840 
              <description>Capture/compare 4
9841 
              generation</description>
9842 
              <bitOffset>4</bitOffset>
9843 
              <bitWidth>1</bitWidth>
9844 
            </field>
9845 
            <field>
9846 
              <name>CC3G</name>
9847 
              <description>Capture/compare 3
9848 
              generation</description>
9849 
              <bitOffset>3</bitOffset>
9850 
              <bitWidth>1</bitWidth>
9851 
            </field>
9852 
            <field>
9853 
              <name>CC2G</name>
9854 
              <description>Capture/compare 2
9855 
              generation</description>
9856 
              <bitOffset>2</bitOffset>
9857 
              <bitWidth>1</bitWidth>
9858 
            </field>
9859 
            <field>
9860 
              <name>CC1G</name>
9861 
              <description>Capture/compare 1
9862 
              generation</description>
9863 
              <bitOffset>1</bitOffset>
9864 
              <bitWidth>1</bitWidth>
9865 
            </field>
9866 
            <field>
9867 
              <name>UG</name>
9868 
              <description>Update generation</description>
9869 
              <bitOffset>0</bitOffset>
9870 
              <bitWidth>1</bitWidth>
9871 
            </field>
9872 
          </fields>
9873 
        </register>
9874 
        <register>
9875 
          <name>CCMR1_Output</name>
9876 
          <displayName>CCMR1_Output</displayName>
9877 
          <description>capture/compare mode register 1 (output
9878 
          mode)</description>
9879 
          <addressOffset>0x18</addressOffset>
9880 
          <size>0x20</size>
9881 
          <access>read-write</access>
9882 
          <resetValue>0x00000000</resetValue>
9883 
          <fields>
9884 
            <field>
9885 
              <name>OC2CE</name>
9886 
              <description>Output compare 2 clear
9887 
              enable</description>
9888 
              <bitOffset>15</bitOffset>
9889 
              <bitWidth>1</bitWidth>
9890 
            </field>
9891 
            <field>
9892 
              <name>OC2M</name>
9893 
              <description>Output compare 2 mode</description>
9894 
              <bitOffset>12</bitOffset>
9895 
              <bitWidth>3</bitWidth>
9896 
            </field>
9897 
            <field>
9898 
              <name>OC2PE</name>
9899 
              <description>Output compare 2 preload
9900 
              enable</description>
9901 
              <bitOffset>11</bitOffset>
9902 
              <bitWidth>1</bitWidth>
9903 
            </field>
9904 
            <field>
9905 
              <name>OC2FE</name>
9906 
              <description>Output compare 2 fast
9907 
              enable</description>
9908 
              <bitOffset>10</bitOffset>
9909 
              <bitWidth>1</bitWidth>
9910 
            </field>
9911 
            <field>
9912 
              <name>CC2S</name>
9913 
              <description>Capture/Compare 2
9914 
              selection</description>
9915 
              <bitOffset>8</bitOffset>
9916 
              <bitWidth>2</bitWidth>
9917 
            </field>
9918 
            <field>
9919 
              <name>OC1CE</name>
9920 
              <description>Output compare 1 clear
9921 
              enable</description>
9922 
              <bitOffset>7</bitOffset>
9923 
              <bitWidth>1</bitWidth>
9924 
            </field>
9925 
            <field>
9926 
              <name>OC1M</name>
9927 
              <description>Output compare 1 mode</description>
9928 
              <bitOffset>4</bitOffset>
9929 
              <bitWidth>3</bitWidth>
9930 
            </field>
9931 
            <field>
9932 
              <name>OC1PE</name>
9933 
              <description>Output compare 1 preload
9934 
              enable</description>
9935 
              <bitOffset>3</bitOffset>
9936 
              <bitWidth>1</bitWidth>
9937 
            </field>
9938 
            <field>
9939 
              <name>OC1FE</name>
9940 
              <description>Output compare 1 fast
9941 
              enable</description>
9942 
              <bitOffset>2</bitOffset>
9943 
              <bitWidth>1</bitWidth>
9944 
            </field>
9945 
            <field>
9946 
              <name>CC1S</name>
9947 
              <description>Capture/Compare 1
9948 
              selection</description>
9949 
              <bitOffset>0</bitOffset>
9950 
              <bitWidth>2</bitWidth>
9951 
            </field>
9952 
          </fields>
9953 
        </register>
9954 
        <register>
9955 
          <name>CCMR1_Input</name>
9956 
          <displayName>CCMR1_Input</displayName>
9957 
          <description>capture/compare mode register 1 (input
9958 
          mode)</description>
9959 
          <alternateRegister>CCMR1_Output</alternateRegister>
9960 
          <addressOffset>0x18</addressOffset>
9961 
          <size>0x20</size>
9962 
          <access>read-write</access>
9963 
          <resetValue>0x00000000</resetValue>
9964 
          <fields>
9965 
            <field>
9966 
              <name>IC2F</name>
9967 
              <description>Input capture 2 filter</description>
9968 
              <bitOffset>12</bitOffset>
9969 
              <bitWidth>4</bitWidth>
9970 
            </field>
9971 
            <field>
9972 
              <name>IC2PSC</name>
9973 
              <description>Input capture 2 prescaler</description>
9974 
              <bitOffset>10</bitOffset>
9975 
              <bitWidth>2</bitWidth>
9976 
            </field>
9977 
            <field>
9978 
              <name>CC2S</name>
9979 
              <description>Capture/compare 2
9980 
              selection</description>
9981 
              <bitOffset>8</bitOffset>
9982 
              <bitWidth>2</bitWidth>
9983 
            </field>
9984 
            <field>
9985 
              <name>IC1F</name>
9986 
              <description>Input capture 1 filter</description>
9987 
              <bitOffset>4</bitOffset>
9988 
              <bitWidth>4</bitWidth>
9989 
            </field>
9990 
            <field>
9991 
              <name>IC1PSC</name>
9992 
              <description>Input capture 1 prescaler</description>
9993 
              <bitOffset>2</bitOffset>
9994 
              <bitWidth>2</bitWidth>
9995 
            </field>
9996 
            <field>
9997 
              <name>CC1S</name>
9998 
              <description>Capture/Compare 1
9999 
              selection</description>
10000 
              <bitOffset>0</bitOffset>
10001 
              <bitWidth>2</bitWidth>
10002 
            </field>
10003 
          </fields>
10004 
        </register>
10005 
        <register>
10006 
          <name>CCMR2_Output</name>
10007 
          <displayName>CCMR2_Output</displayName>
10008 
          <description>capture/compare mode register 2 (output
10009 
          mode)</description>
10010 
          <addressOffset>0x1C</addressOffset>
10011 
          <size>0x20</size>
10012 
          <access>read-write</access>
10013 
          <resetValue>0x00000000</resetValue>
10014 
          <fields>
10015 
            <field>
10016 
              <name>O24CE</name>
10017 
              <description>Output compare 4 clear
10018 
              enable</description>
10019 
              <bitOffset>15</bitOffset>
10020 
              <bitWidth>1</bitWidth>
10021 
            </field>
10022 
            <field>
10023 
              <name>OC4M</name>
10024 
              <description>Output compare 4 mode</description>
10025 
              <bitOffset>12</bitOffset>
10026 
              <bitWidth>3</bitWidth>
10027 
            </field>
10028 
            <field>
10029 
              <name>OC4PE</name>
10030 
              <description>Output compare 4 preload
10031 
              enable</description>
10032 
              <bitOffset>11</bitOffset>
10033 
              <bitWidth>1</bitWidth>
10034 
            </field>
10035 
            <field>
10036 
              <name>OC4FE</name>
10037 
              <description>Output compare 4 fast
10038 
              enable</description>
10039 
              <bitOffset>10</bitOffset>
10040 
              <bitWidth>1</bitWidth>
10041 
            </field>
10042 
            <field>
10043 
              <name>CC4S</name>
10044 
              <description>Capture/Compare 4
10045 
              selection</description>
10046 
              <bitOffset>8</bitOffset>
10047 
              <bitWidth>2</bitWidth>
10048 
            </field>
10049 
            <field>
10050 
              <name>OC3CE</name>
10051 
              <description>Output compare 3 clear
10052 
              enable</description>
10053 
              <bitOffset>7</bitOffset>
10054 
              <bitWidth>1</bitWidth>
10055 
            </field>
10056 
            <field>
10057 
              <name>OC3M</name>
10058 
              <description>Output compare 3 mode</description>
10059 
              <bitOffset>4</bitOffset>
10060 
              <bitWidth>3</bitWidth>
10061 
            </field>
10062 
            <field>
10063 
              <name>OC3PE</name>
10064 
              <description>Output compare 3 preload
10065 
              enable</description>
10066 
              <bitOffset>3</bitOffset>
10067 
              <bitWidth>1</bitWidth>
10068 
            </field>
10069 
            <field>
10070 
              <name>OC3FE</name>
10071 
              <description>Output compare 3 fast
10072 
              enable</description>
10073 
              <bitOffset>2</bitOffset>
10074 
              <bitWidth>1</bitWidth>
10075 
            </field>
10076 
            <field>
10077 
              <name>CC3S</name>
10078 
              <description>Capture/Compare 3
10079 
              selection</description>
10080 
              <bitOffset>0</bitOffset>
10081 
              <bitWidth>2</bitWidth>
10082 
            </field>
10083 
          </fields>
10084 
        </register>
10085 
        <register>
10086 
          <name>CCMR2_Input</name>
10087 
          <displayName>CCMR2_Input</displayName>
10088 
          <description>capture/compare mode register 2 (input
10089 
          mode)</description>
10090 
          <alternateRegister>CCMR2_Output</alternateRegister>
10091 
          <addressOffset>0x1C</addressOffset>
10092 
          <size>0x20</size>
10093 
          <access>read-write</access>
10094 
          <resetValue>0x00000000</resetValue>
10095 
          <fields>
10096 
            <field>
10097 
              <name>IC4F</name>
10098 
              <description>Input capture 4 filter</description>
10099 
              <bitOffset>12</bitOffset>
10100 
              <bitWidth>4</bitWidth>
10101 
            </field>
10102 
            <field>
10103 
              <name>IC4PSC</name>
10104 
              <description>Input capture 4 prescaler</description>
10105 
              <bitOffset>10</bitOffset>
10106 
              <bitWidth>2</bitWidth>
10107 
            </field>
10108 
            <field>
10109 
              <name>CC4S</name>
10110 
              <description>Capture/Compare 4
10111 
              selection</description>
10112 
              <bitOffset>8</bitOffset>
10113 
              <bitWidth>2</bitWidth>
10114 
            </field>
10115 
            <field>
10116 
              <name>IC3F</name>
10117 
              <description>Input capture 3 filter</description>
10118 
              <bitOffset>4</bitOffset>
10119 
              <bitWidth>4</bitWidth>
10120 
            </field>
10121 
            <field>
10122 
              <name>IC3PSC</name>
10123 
              <description>Input capture 3 prescaler</description>
10124 
              <bitOffset>2</bitOffset>
10125 
              <bitWidth>2</bitWidth>
10126 
            </field>
10127 
            <field>
10128 
              <name>CC3S</name>
10129 
              <description>Capture/Compare 3
10130 
              selection</description>
10131 
              <bitOffset>0</bitOffset>
10132 
              <bitWidth>2</bitWidth>
10133 
            </field>
10134 
          </fields>
10135 
        </register>
10136 
        <register>
10137 
          <name>CCER</name>
10138 
          <displayName>CCER</displayName>
10139 
          <description>capture/compare enable
10140 
          register</description>
10141 
          <addressOffset>0x20</addressOffset>
10142 
          <size>0x20</size>
10143 
          <access>read-write</access>
10144 
          <resetValue>0x0000</resetValue>
10145 
          <fields>
10146 
            <field>
10147 
              <name>CC4P</name>
10148 
              <description>Capture/Compare 3 output
10149 
              Polarity</description>
10150 
              <bitOffset>13</bitOffset>
10151 
              <bitWidth>1</bitWidth>
10152 
            </field>
10153 
            <field>
10154 
              <name>CC4E</name>
10155 
              <description>Capture/Compare 4 output
10156 
              enable</description>
10157 
              <bitOffset>12</bitOffset>
10158 
              <bitWidth>1</bitWidth>
10159 
            </field>
10160 
            <field>
10161 
              <name>CC3P</name>
10162 
              <description>Capture/Compare 3 output
10163 
              Polarity</description>
10164 
              <bitOffset>9</bitOffset>
10165 
              <bitWidth>1</bitWidth>
10166 
            </field>
10167 
            <field>
10168 
              <name>CC3E</name>
10169 
              <description>Capture/Compare 3 output
10170 
              enable</description>
10171 
              <bitOffset>8</bitOffset>
10172 
              <bitWidth>1</bitWidth>
10173 
            </field>
10174 
            <field>
10175 
              <name>CC2P</name>
10176 
              <description>Capture/Compare 2 output
10177 
              Polarity</description>
10178 
              <bitOffset>5</bitOffset>
10179 
              <bitWidth>1</bitWidth>
10180 
            </field>
10181 
            <field>
10182 
              <name>CC2E</name>
10183 
              <description>Capture/Compare 2 output
10184 
              enable</description>
10185 
              <bitOffset>4</bitOffset>
10186 
              <bitWidth>1</bitWidth>
10187 
            </field>
10188 
            <field>
10189 
              <name>CC1P</name>
10190 
              <description>Capture/Compare 1 output
10191 
              Polarity</description>
10192 
              <bitOffset>1</bitOffset>
10193 
              <bitWidth>1</bitWidth>
10194 
            </field>
10195 
            <field>
10196 
              <name>CC1E</name>
10197 
              <description>Capture/Compare 1 output
10198 
              enable</description>
10199 
              <bitOffset>0</bitOffset>
10200 
              <bitWidth>1</bitWidth>
10201 
            </field>
10202 
          </fields>
10203 
        </register>
10204 
        <register>
10205 
          <name>CNT</name>
10206 
          <displayName>CNT</displayName>
10207 
          <description>counter</description>
10208 
          <addressOffset>0x24</addressOffset>
10209 
          <size>0x20</size>
10210 
          <access>read-write</access>
10211 
          <resetValue>0x00000000</resetValue>
10212 
          <fields>
10213 
            <field>
10214 
              <name>CNT</name>
10215 
              <description>counter value</description>
10216 
              <bitOffset>0</bitOffset>
10217 
              <bitWidth>16</bitWidth>
10218 
            </field>
10219 
          </fields>
10220 
        </register>
10221 
        <register>
10222 
          <name>PSC</name>
10223 
          <displayName>PSC</displayName>
10224 
          <description>prescaler</description>
10225 
          <addressOffset>0x28</addressOffset>
10226 
          <size>0x20</size>
10227 
          <access>read-write</access>
10228 
          <resetValue>0x0000</resetValue>
10229 
          <fields>
10230 
            <field>
10231 
              <name>PSC</name>
10232 
              <description>Prescaler value</description>
10233 
              <bitOffset>0</bitOffset>
10234 
              <bitWidth>16</bitWidth>
10235 
            </field>
10236 
          </fields>
10237 
        </register>
10238 
        <register>
10239 
          <name>ARR</name>
10240 
          <displayName>ARR</displayName>
10241 
          <description>auto-reload register</description>
10242 
          <addressOffset>0x2C</addressOffset>
10243 
          <size>0x20</size>
10244 
          <access>read-write</access>
10245 
          <resetValue>0x00000000</resetValue>
10246 
          <fields>
10247 
            <field>
10248 
              <name>ARR</name>
10249 
              <description>Auto-reload value</description>
10250 
              <bitOffset>0</bitOffset>
10251 
              <bitWidth>16</bitWidth>
10252 
            </field>
10253 
          </fields>
10254 
        </register>
10255 
        <register>
10256 
          <name>CCR1</name>
10257 
          <displayName>CCR1</displayName>
10258 
          <description>capture/compare register 1</description>
10259 
          <addressOffset>0x34</addressOffset>
10260 
          <size>0x20</size>
10261 
          <access>read-write</access>
10262 
          <resetValue>0x00000000</resetValue>
10263 
          <fields>
10264 
            <field>
10265 
              <name>CCR1</name>
10266 
              <description>Capture/Compare 1 value</description>
10267 
              <bitOffset>0</bitOffset>
10268 
              <bitWidth>16</bitWidth>
10269 
            </field>
10270 
          </fields>
10271 
        </register>
10272 
        <register>
10273 
          <name>CCR2</name>
10274 
          <displayName>CCR2</displayName>
10275 
          <description>capture/compare register 2</description>
10276 
          <addressOffset>0x38</addressOffset>
10277 
          <size>0x20</size>
10278 
          <access>read-write</access>
10279 
          <resetValue>0x00000000</resetValue>
10280 
          <fields>
10281 
            <field>
10282 
              <name>CCR2</name>
10283 
              <description>Capture/Compare 2 value</description>
10284 
              <bitOffset>0</bitOffset>
10285 
              <bitWidth>16</bitWidth>
10286 
            </field>
10287 
          </fields>
10288 
        </register>
10289 
        <register>
10290 
          <name>CCR3</name>
10291 
          <displayName>CCR3</displayName>
10292 
          <description>capture/compare register 3</description>
10293 
          <addressOffset>0x3C</addressOffset>
10294 
          <size>0x20</size>
10295 
          <access>read-write</access>
10296 
          <resetValue>0x00000000</resetValue>
10297 
          <fields>
10298 
            <field>
10299 
              <name>CCR3</name>
10300 
              <description>Capture/Compare value</description>
10301 
              <bitOffset>0</bitOffset>
10302 
              <bitWidth>16</bitWidth>
10303 
            </field>
10304 
          </fields>
10305 
        </register>
10306 
        <register>
10307 
          <name>CCR4</name>
10308 
          <displayName>CCR4</displayName>
10309 
          <description>capture/compare register 4</description>
10310 
          <addressOffset>0x40</addressOffset>
10311 
          <size>0x20</size>
10312 
          <access>read-write</access>
10313 
          <resetValue>0x00000000</resetValue>
10314 
          <fields>
10315 
            <field>
10316 
              <name>CCR4</name>
10317 
              <description>Capture/Compare value</description>
10318 
              <bitOffset>0</bitOffset>
10319 
              <bitWidth>16</bitWidth>
10320 
            </field>
10321 
          </fields>
10322 
        </register>
10323 
        <register>
10324 
          <name>DCR</name>
10325 
          <displayName>DCR</displayName>
10326 
          <description>DMA control register</description>
10327 
          <addressOffset>0x48</addressOffset>
10328 
          <size>0x20</size>
10329 
          <access>read-write</access>
10330 
          <resetValue>0x0000</resetValue>
10331 
          <fields>
10332 
            <field>
10333 
              <name>DBL</name>
10334 
              <description>DMA burst length</description>
10335 
              <bitOffset>8</bitOffset>
10336 
              <bitWidth>5</bitWidth>
10337 
            </field>
10338 
            <field>
10339 
              <name>DBA</name>
10340 
              <description>DMA base address</description>
10341 
              <bitOffset>0</bitOffset>
10342 
              <bitWidth>5</bitWidth>
10343 
            </field>
10344 
          </fields>
10345 
        </register>
10346 
        <register>
10347 
          <name>DMAR</name>
10348 
          <displayName>DMAR</displayName>
10349 
          <description>DMA address for full transfer</description>
10350 
          <addressOffset>0x4C</addressOffset>
10351 
          <size>0x20</size>
10352 
          <access>read-write</access>
10353 
          <resetValue>0x0000</resetValue>
10354 
          <fields>
10355 
            <field>
10356 
              <name>DMAB</name>
10357 
              <description>DMA register for burst
10358 
              accesses</description>
10359 
              <bitOffset>0</bitOffset>
10360 
              <bitWidth>16</bitWidth>
10361 
            </field>
10362 
          </fields>
10363 
        </register>
10364 
      </registers>
10365 
    </peripheral>
10366 
    <peripheral derivedFrom="TIM2">
10367 
      <name>TIM3</name>
10368 
      <baseAddress>0x40000400</baseAddress>
10369 
      <interrupt>
10370 
        <name>TIM3</name>
10371 
        <description>TIM3 global interrupt</description>
10372 
        <value>29</value>
10373 
      </interrupt>
10374 
    </peripheral>
10375 
    <peripheral derivedFrom="TIM2">
10376 
      <name>TIM4</name>
10377 
      <baseAddress>0x40000800</baseAddress>
10378 
      <interrupt>
10379 
        <name>TIM4</name>
10380 
        <description>TIM4 global interrupt</description>
10381 
        <value>30</value>
10382 
      </interrupt>
10383 
    </peripheral>
10384 
    <peripheral derivedFrom="TIM2">
10385 
      <name>TIM5</name>
10386 
      <baseAddress>0x40000C00</baseAddress>
10387 
      <interrupt>
10388 
        <name>TIM5</name>
10389 
        <description>TIM5 global interrupt</description>
10390 
        <value>50</value>
10391 
      </interrupt>
10392 
    </peripheral>
10393 
    <peripheral>
10394 
      <name>TIM9</name>
10395 
      <description>General purpose timer</description>
10396 
      <groupName>TIM</groupName>
10397 
      <baseAddress>0x40014C00</baseAddress>
10398 
      <addressBlock>
10399 
        <offset>0x0</offset>
10400 
        <size>0x400</size>
10401 
        <usage>registers</usage>
10402 
      </addressBlock>
10403 
      <interrupt>
10404 
        <name>TIM1_BRK_TIM9</name>
10405 
        <description>TIM1 Break interrupt and TIM9 global
10406 
        interrupt</description>
10407 
        <value>24</value>
10408 
      </interrupt>
10409 
      <registers>
10410 
        <register>
10411 
          <name>CR1</name>
10412 
          <displayName>CR1</displayName>
10413 
          <description>control register 1</description>
10414 
          <addressOffset>0x0</addressOffset>
10415 
          <size>0x20</size>
10416 
          <access>read-write</access>
10417 
          <resetValue>0x0000</resetValue>
10418 
          <fields>
10419 
            <field>
10420 
              <name>CKD</name>
10421 
              <description>Clock division</description>
10422 
              <bitOffset>8</bitOffset>
10423 
              <bitWidth>2</bitWidth>
10424 
            </field>
10425 
            <field>
10426 
              <name>ARPE</name>
10427 
              <description>Auto-reload preload enable</description>
10428 
              <bitOffset>7</bitOffset>
10429 
              <bitWidth>1</bitWidth>
10430 
            </field>
10431 
            <field>
10432 
              <name>OPM</name>
10433 
              <description>One-pulse mode</description>
10434 
              <bitOffset>3</bitOffset>
10435 
              <bitWidth>1</bitWidth>
10436 
            </field>
10437 
            <field>
10438 
              <name>URS</name>
10439 
              <description>Update request source</description>
10440 
              <bitOffset>2</bitOffset>
10441 
              <bitWidth>1</bitWidth>
10442 
            </field>
10443 
            <field>
10444 
              <name>UDIS</name>
10445 
              <description>Update disable</description>
10446 
              <bitOffset>1</bitOffset>
10447 
              <bitWidth>1</bitWidth>
10448 
            </field>
10449 
            <field>
10450 
              <name>CEN</name>
10451 
              <description>Counter enable</description>
10452 
              <bitOffset>0</bitOffset>
10453 
              <bitWidth>1</bitWidth>
10454 
            </field>
10455 
          </fields>
10456 
        </register>
10457 
        <register>
10458 
          <name>CR2</name>
10459 
          <displayName>CR2</displayName>
10460 
          <description>control register 2</description>
10461 
          <addressOffset>0x4</addressOffset>
10462 
          <size>0x20</size>
10463 
          <access>read-write</access>
10464 
          <resetValue>0x0000</resetValue>
10465 
          <fields>
10466 
            <field>
10467 
              <name>MMS</name>
10468 
              <description>Master mode selection</description>
10469 
              <bitOffset>4</bitOffset>
10470 
              <bitWidth>3</bitWidth>
10471 
            </field>
10472 
          </fields>
10473 
        </register>
10474 
        <register>
10475 
          <name>SMCR</name>
10476 
          <displayName>SMCR</displayName>
10477 
          <description>slave mode control register</description>
10478 
          <addressOffset>0x8</addressOffset>
10479 
          <size>0x20</size>
10480 
          <access>read-write</access>
10481 
          <resetValue>0x0000</resetValue>
10482 
          <fields>
10483 
            <field>
10484 
              <name>MSM</name>
10485 
              <description>Master/Slave mode</description>
10486 
              <bitOffset>7</bitOffset>
10487 
              <bitWidth>1</bitWidth>
10488 
            </field>
10489 
            <field>
10490 
              <name>TS</name>
10491 
              <description>Trigger selection</description>
10492 
              <bitOffset>4</bitOffset>
10493 
              <bitWidth>3</bitWidth>
10494 
            </field>
10495 
            <field>
10496 
              <name>SMS</name>
10497 
              <description>Slave mode selection</description>
10498 
              <bitOffset>0</bitOffset>
10499 
              <bitWidth>3</bitWidth>
10500 
            </field>
10501 
          </fields>
10502 
        </register>
10503 
        <register>
10504 
          <name>DIER</name>
10505 
          <displayName>DIER</displayName>
10506 
          <description>DMA/Interrupt enable register</description>
10507 
          <addressOffset>0xC</addressOffset>
10508 
          <size>0x20</size>
10509 
          <access>read-write</access>
10510 
          <resetValue>0x0000</resetValue>
10511 
          <fields>
10512 
            <field>
10513 
              <name>TIE</name>
10514 
              <description>Trigger interrupt enable</description>
10515 
              <bitOffset>6</bitOffset>
10516 
              <bitWidth>1</bitWidth>
10517 
            </field>
10518 
            <field>
10519 
              <name>CC2IE</name>
10520 
              <description>Capture/Compare 2 interrupt
10521 
              enable</description>
10522 
              <bitOffset>2</bitOffset>
10523 
              <bitWidth>1</bitWidth>
10524 
            </field>
10525 
            <field>
10526 
              <name>CC1IE</name>
10527 
              <description>Capture/Compare 1 interrupt
10528 
              enable</description>
10529 
              <bitOffset>1</bitOffset>
10530 
              <bitWidth>1</bitWidth>
10531 
            </field>
10532 
            <field>
10533 
              <name>UIE</name>
10534 
              <description>Update interrupt enable</description>
10535 
              <bitOffset>0</bitOffset>
10536 
              <bitWidth>1</bitWidth>
10537 
            </field>
10538 
          </fields>
10539 
        </register>
10540 
        <register>
10541 
          <name>SR</name>
10542 
          <displayName>SR</displayName>
10543 
          <description>status register</description>
10544 
          <addressOffset>0x10</addressOffset>
10545 
          <size>0x20</size>
10546 
          <access>read-write</access>
10547 
          <resetValue>0x0000</resetValue>
10548 
          <fields>
10549 
            <field>
10550 
              <name>CC2OF</name>
10551 
              <description>Capture/compare 2 overcapture
10552 
              flag</description>
10553 
              <bitOffset>10</bitOffset>
10554 
              <bitWidth>1</bitWidth>
10555 
            </field>
10556 
            <field>
10557 
              <name>CC1OF</name>
10558 
              <description>Capture/Compare 1 overcapture
10559 
              flag</description>
10560 
              <bitOffset>9</bitOffset>
10561 
              <bitWidth>1</bitWidth>
10562 
            </field>
10563 
            <field>
10564 
              <name>TIF</name>
10565 
              <description>Trigger interrupt flag</description>
10566 
              <bitOffset>6</bitOffset>
10567 
              <bitWidth>1</bitWidth>
10568 
            </field>
10569 
            <field>
10570 
              <name>CC2IF</name>
10571 
              <description>Capture/Compare 2 interrupt
10572 
              flag</description>
10573 
              <bitOffset>2</bitOffset>
10574 
              <bitWidth>1</bitWidth>
10575 
            </field>
10576 
            <field>
10577 
              <name>CC1IF</name>
10578 
              <description>Capture/compare 1 interrupt
10579 
              flag</description>
10580 
              <bitOffset>1</bitOffset>
10581 
              <bitWidth>1</bitWidth>
10582 
            </field>
10583 
            <field>
10584 
              <name>UIF</name>
10585 
              <description>Update interrupt flag</description>
10586 
              <bitOffset>0</bitOffset>
10587 
              <bitWidth>1</bitWidth>
10588 
            </field>
10589 
          </fields>
10590 
        </register>
10591 
        <register>
10592 
          <name>EGR</name>
10593 
          <displayName>EGR</displayName>
10594 
          <description>event generation register</description>
10595 
          <addressOffset>0x14</addressOffset>
10596 
          <size>0x20</size>
10597 
          <access>write-only</access>
10598 
          <resetValue>0x0000</resetValue>
10599 
          <fields>
10600 
            <field>
10601 
              <name>TG</name>
10602 
              <description>Trigger generation</description>
10603 
              <bitOffset>6</bitOffset>
10604 
              <bitWidth>1</bitWidth>
10605 
            </field>
10606 
            <field>
10607 
              <name>CC2G</name>
10608 
              <description>Capture/compare 2
10609 
              generation</description>
10610 
              <bitOffset>2</bitOffset>
10611 
              <bitWidth>1</bitWidth>
10612 
            </field>
10613 
            <field>
10614 
              <name>CC1G</name>
10615 
              <description>Capture/compare 1
10616 
              generation</description>
10617 
              <bitOffset>1</bitOffset>
10618 
              <bitWidth>1</bitWidth>
10619 
            </field>
10620 
            <field>
10621 
              <name>UG</name>
10622 
              <description>Update generation</description>
10623 
              <bitOffset>0</bitOffset>
10624 
              <bitWidth>1</bitWidth>
10625 
            </field>
10626 
          </fields>
10627 
        </register>
10628 
        <register>
10629 
          <name>CCMR1_Output</name>
10630 
          <displayName>CCMR1_Output</displayName>
10631 
          <description>capture/compare mode register 1 (output
10632 
          mode)</description>
10633 
          <addressOffset>0x18</addressOffset>
10634 
          <size>0x20</size>
10635 
          <access>read-write</access>
10636 
          <resetValue>0x00000000</resetValue>
10637 
          <fields>
10638 
            <field>
10639 
              <name>OC2M</name>
10640 
              <description>Output Compare 2 mode</description>
10641 
              <bitOffset>12</bitOffset>
10642 
              <bitWidth>3</bitWidth>
10643 
            </field>
10644 
            <field>
10645 
              <name>OC2PE</name>
10646 
              <description>Output Compare 2 preload
10647 
              enable</description>
10648 
              <bitOffset>11</bitOffset>
10649 
              <bitWidth>1</bitWidth>
10650 
            </field>
10651 
            <field>
10652 
              <name>OC2FE</name>
10653 
              <description>Output Compare 2 fast
10654 
              enable</description>
10655 
              <bitOffset>10</bitOffset>
10656 
              <bitWidth>1</bitWidth>
10657 
            </field>
10658 
            <field>
10659 
              <name>CC2S</name>
10660 
              <description>Capture/Compare 2
10661 
              selection</description>
10662 
              <bitOffset>8</bitOffset>
10663 
              <bitWidth>2</bitWidth>
10664 
            </field>
10665 
            <field>
10666 
              <name>OC1M</name>
10667 
              <description>Output Compare 1 mode</description>
10668 
              <bitOffset>4</bitOffset>
10669 
              <bitWidth>3</bitWidth>
10670 
            </field>
10671 
            <field>
10672 
              <name>OC1PE</name>
10673 
              <description>Output Compare 1 preload
10674 
              enable</description>
10675 
              <bitOffset>3</bitOffset>
10676 
              <bitWidth>1</bitWidth>
10677 
            </field>
10678 
            <field>
10679 
              <name>OC1FE</name>
10680 
              <description>Output Compare 1 fast
10681 
              enable</description>
10682 
              <bitOffset>2</bitOffset>
10683 
              <bitWidth>1</bitWidth>
10684 
            </field>
10685 
            <field>
10686 
              <name>CC1S</name>
10687 
              <description>Capture/Compare 1
10688 
              selection</description>
10689 
              <bitOffset>0</bitOffset>
10690 
              <bitWidth>2</bitWidth>
10691 
            </field>
10692 
          </fields>
10693 
        </register>
10694 
        <register>
10695 
          <name>CCMR1_Input</name>
10696 
          <displayName>CCMR1_Input</displayName>
10697 
          <description>capture/compare mode register 1 (input
10698 
          mode)</description>
10699 
          <alternateRegister>CCMR1_Output</alternateRegister>
10700 
          <addressOffset>0x18</addressOffset>
10701 
          <size>0x20</size>
10702 
          <access>read-write</access>
10703 
          <resetValue>0x00000000</resetValue>
10704 
          <fields>
10705 
            <field>
10706 
              <name>IC2F</name>
10707 
              <description>Input capture 2 filter</description>
10708 
              <bitOffset>12</bitOffset>
10709 
              <bitWidth>4</bitWidth>
10710 
            </field>
10711 
            <field>
10712 
              <name>IC2PSC</name>
10713 
              <description>Input capture 2 prescaler</description>
10714 
              <bitOffset>10</bitOffset>
10715 
              <bitWidth>2</bitWidth>
10716 
            </field>
10717 
            <field>
10718 
              <name>CC2S</name>
10719 
              <description>Capture/Compare 2
10720 
              selection</description>
10721 
              <bitOffset>8</bitOffset>
10722 
              <bitWidth>2</bitWidth>
10723 
            </field>
10724 
            <field>
10725 
              <name>IC1F</name>
10726 
              <description>Input capture 1 filter</description>
10727 
              <bitOffset>4</bitOffset>
10728 
              <bitWidth>4</bitWidth>
10729 
            </field>
10730 
            <field>
10731 
              <name>IC1PSC</name>
10732 
              <description>Input capture 1 prescaler</description>
10733 
              <bitOffset>2</bitOffset>
10734 
              <bitWidth>2</bitWidth>
10735 
            </field>
10736 
            <field>
10737 
              <name>CC1S</name>
10738 
              <description>Capture/Compare 1
10739 
              selection</description>
10740 
              <bitOffset>0</bitOffset>
10741 
              <bitWidth>2</bitWidth>
10742 
            </field>
10743 
          </fields>
10744 
        </register>
10745 
        <register>
10746 
          <name>CCER</name>
10747 
          <displayName>CCER</displayName>
10748 
          <description>capture/compare enable
10749 
          register</description>
10750 
          <addressOffset>0x20</addressOffset>
10751 
          <size>0x20</size>
10752 
          <access>read-write</access>
10753 
          <resetValue>0x0000</resetValue>
10754 
          <fields>
10755 
            <field>
10756 
              <name>CC2NP</name>
10757 
              <description>Capture/Compare 2 output
10758 
              Polarity</description>
10759 
              <bitOffset>7</bitOffset>
10760 
              <bitWidth>1</bitWidth>
10761 
            </field>
10762 
            <field>
10763 
              <name>CC2P</name>
10764 
              <description>Capture/Compare 2 output
10765 
              Polarity</description>
10766 
              <bitOffset>5</bitOffset>
10767 
              <bitWidth>1</bitWidth>
10768 
            </field>
10769 
            <field>
10770 
              <name>CC2E</name>
10771 
              <description>Capture/Compare 2 output
10772 
              enable</description>
10773 
              <bitOffset>4</bitOffset>
10774 
              <bitWidth>1</bitWidth>
10775 
            </field>
10776 
            <field>
10777 
              <name>CC1NP</name>
10778 
              <description>Capture/Compare 1 output
10779 
              Polarity</description>
10780 
              <bitOffset>3</bitOffset>
10781 
              <bitWidth>1</bitWidth>
10782 
            </field>
10783 
            <field>
10784 
              <name>CC1P</name>
10785 
              <description>Capture/Compare 1 output
10786 
              Polarity</description>
10787 
              <bitOffset>1</bitOffset>
10788 
              <bitWidth>1</bitWidth>
10789 
            </field>
10790 
            <field>
10791 
              <name>CC1E</name>
10792 
              <description>Capture/Compare 1 output
10793 
              enable</description>
10794 
              <bitOffset>0</bitOffset>
10795 
              <bitWidth>1</bitWidth>
10796 
            </field>
10797 
          </fields>
10798 
        </register>
10799 
        <register>
10800 
          <name>CNT</name>
10801 
          <displayName>CNT</displayName>
10802 
          <description>counter</description>
10803 
          <addressOffset>0x24</addressOffset>
10804 
          <size>0x20</size>
10805 
          <access>read-write</access>
10806 
          <resetValue>0x00000000</resetValue>
10807 
          <fields>
10808 
            <field>
10809 
              <name>CNT</name>
10810 
              <description>counter value</description>
10811 
              <bitOffset>0</bitOffset>
10812 
              <bitWidth>16</bitWidth>
10813 
            </field>
10814 
          </fields>
10815 
        </register>
10816 
        <register>
10817 
          <name>PSC</name>
10818 
          <displayName>PSC</displayName>
10819 
          <description>prescaler</description>
10820 
          <addressOffset>0x28</addressOffset>
10821 
          <size>0x20</size>
10822 
          <access>read-write</access>
10823 
          <resetValue>0x0000</resetValue>
10824 
          <fields>
10825 
            <field>
10826 
              <name>PSC</name>
10827 
              <description>Prescaler value</description>
10828 
              <bitOffset>0</bitOffset>
10829 
              <bitWidth>16</bitWidth>
10830 
            </field>
10831 
          </fields>
10832 
        </register>
10833 
        <register>
10834 
          <name>ARR</name>
10835 
          <displayName>ARR</displayName>
10836 
          <description>auto-reload register</description>
10837 
          <addressOffset>0x2C</addressOffset>
10838 
          <size>0x20</size>
10839 
          <access>read-write</access>
10840 
          <resetValue>0x00000000</resetValue>
10841 
          <fields>
10842 
            <field>
10843 
              <name>ARR</name>
10844 
              <description>Auto-reload value</description>
10845 
              <bitOffset>0</bitOffset>
10846 
              <bitWidth>16</bitWidth>
10847 
            </field>
10848 
          </fields>
10849 
        </register>
10850 
        <register>
10851 
          <name>CCR1</name>
10852 
          <displayName>CCR1</displayName>
10853 
          <description>capture/compare register 1</description>
10854 
          <addressOffset>0x34</addressOffset>
10855 
          <size>0x20</size>
10856 
          <access>read-write</access>
10857 
          <resetValue>0x00000000</resetValue>
10858 
          <fields>
10859 
            <field>
10860 
              <name>CCR1</name>
10861 
              <description>Capture/Compare 1 value</description>
10862 
              <bitOffset>0</bitOffset>
10863 
              <bitWidth>16</bitWidth>
10864 
            </field>
10865 
          </fields>
10866 
        </register>
10867 
        <register>
10868 
          <name>CCR2</name>
10869 
          <displayName>CCR2</displayName>
10870 
          <description>capture/compare register 2</description>
10871 
          <addressOffset>0x38</addressOffset>
10872 
          <size>0x20</size>
10873 
          <access>read-write</access>
10874 
          <resetValue>0x00000000</resetValue>
10875 
          <fields>
10876 
            <field>
10877 
              <name>CCR2</name>
10878 
              <description>Capture/Compare 2 value</description>
10879 
              <bitOffset>0</bitOffset>
10880 
              <bitWidth>16</bitWidth>
10881 
            </field>
10882 
          </fields>
10883 
        </register>
10884 
      </registers>
10885 
    </peripheral>
10886 
    <peripheral derivedFrom="TIM9">
10887 
      <name>TIM12</name>
10888 
      <baseAddress>0x40001800</baseAddress>
10889 
      <interrupt>
10890 
        <name>TIM8_BRK_TIM12</name>
10891 
        <description>TIM8 Break interrupt and TIM12 global
10892 
        interrupt</description>
10893 
        <value>43</value>
10894 
      </interrupt>
10895 
    </peripheral>
10896 
    <peripheral>
10897 
      <name>TIM10</name>
10898 
      <description>General purpose timer</description>
10899 
      <groupName>TIM</groupName>
10900 
      <baseAddress>0x40015000</baseAddress>
10901 
      <addressBlock>
10902 
        <offset>0x0</offset>
10903 
        <size>0x400</size>
10904 
        <usage>registers</usage>
10905 
      </addressBlock>
10906 
      <interrupt>
10907 
        <name>TIM1_UP_TIM10</name>
10908 
        <description>TIM1 Update interrupt and TIM10 global
10909 
        interrupt</description>
10910 
        <value>25</value>
10911 
      </interrupt>
10912 
      <registers>
10913 
        <register>
10914 
          <name>CR1</name>
10915 
          <displayName>CR1</displayName>
10916 
          <description>control register 1</description>
10917 
          <addressOffset>0x0</addressOffset>
10918 
          <size>0x20</size>
10919 
          <access>read-write</access>
10920 
          <resetValue>0x0000</resetValue>
10921 
          <fields>
10922 
            <field>
10923 
              <name>CKD</name>
10924 
              <description>Clock division</description>
10925 
              <bitOffset>8</bitOffset>
10926 
              <bitWidth>2</bitWidth>
10927 
            </field>
10928 
            <field>
10929 
              <name>ARPE</name>
10930 
              <description>Auto-reload preload enable</description>
10931 
              <bitOffset>7</bitOffset>
10932 
              <bitWidth>1</bitWidth>
10933 
            </field>
10934 
            <field>
10935 
              <name>URS</name>
10936 
              <description>Update request source</description>
10937 
              <bitOffset>2</bitOffset>
10938 
              <bitWidth>1</bitWidth>
10939 
            </field>
10940 
            <field>
10941 
              <name>UDIS</name>
10942 
              <description>Update disable</description>
10943 
              <bitOffset>1</bitOffset>
10944 
              <bitWidth>1</bitWidth>
10945 
            </field>
10946 
            <field>
10947 
              <name>CEN</name>
10948 
              <description>Counter enable</description>
10949 
              <bitOffset>0</bitOffset>
10950 
              <bitWidth>1</bitWidth>
10951 
            </field>
10952 
          </fields>
10953 
        </register>
10954 
        <register>
10955 
          <name>CR2</name>
10956 
          <displayName>CR2</displayName>
10957 
          <description>control register 2</description>
10958 
          <addressOffset>0x4</addressOffset>
10959 
          <size>0x20</size>
10960 
          <access>read-write</access>
10961 
          <resetValue>0x0000</resetValue>
10962 
          <fields>
10963 
            <field>
10964 
              <name>MMS</name>
10965 
              <description>Master mode selection</description>
10966 
              <bitOffset>4</bitOffset>
10967 
              <bitWidth>3</bitWidth>
10968 
            </field>
10969 
          </fields>
10970 
        </register>
10971 
        <register>
10972 
          <name>DIER</name>
10973 
          <displayName>DIER</displayName>
10974 
          <description>DMA/Interrupt enable register</description>
10975 
          <addressOffset>0xC</addressOffset>
10976 
          <size>0x20</size>
10977 
          <access>read-write</access>
10978 
          <resetValue>0x0000</resetValue>
10979 
          <fields>
10980 
            <field>
10981 
              <name>CC1IE</name>
10982 
              <description>Capture/Compare 1 interrupt
10983 
              enable</description>
10984 
              <bitOffset>1</bitOffset>
10985 
              <bitWidth>1</bitWidth>
10986 
            </field>
10987 
            <field>
10988 
              <name>UIE</name>
10989 
              <description>Update interrupt enable</description>
10990 
              <bitOffset>0</bitOffset>
10991 
              <bitWidth>1</bitWidth>
10992 
            </field>
10993 
          </fields>
10994 
        </register>
10995 
        <register>
10996 
          <name>SR</name>
10997 
          <displayName>SR</displayName>
10998 
          <description>status register</description>
10999 
          <addressOffset>0x10</addressOffset>
11000 
          <size>0x20</size>
11001 
          <access>read-write</access>
11002 
          <resetValue>0x0000</resetValue>
11003 
          <fields>
11004 
            <field>
11005 
              <name>CC1OF</name>
11006 
              <description>Capture/Compare 1 overcapture
11007 
              flag</description>
11008 
              <bitOffset>9</bitOffset>
11009 
              <bitWidth>1</bitWidth>
11010 
            </field>
11011 
            <field>
11012 
              <name>CC1IF</name>
11013 
              <description>Capture/compare 1 interrupt
11014 
              flag</description>
11015 
              <bitOffset>1</bitOffset>
11016 
              <bitWidth>1</bitWidth>
11017 
            </field>
11018 
            <field>
11019 
              <name>UIF</name>
11020 
              <description>Update interrupt flag</description>
11021 
              <bitOffset>0</bitOffset>
11022 
              <bitWidth>1</bitWidth>
11023 
            </field>
11024 
          </fields>
11025 
        </register>
11026 
        <register>
11027 
          <name>EGR</name>
11028 
          <displayName>EGR</displayName>
11029 
          <description>event generation register</description>
11030 
          <addressOffset>0x14</addressOffset>
11031 
          <size>0x20</size>
11032 
          <access>write-only</access>
11033 
          <resetValue>0x0000</resetValue>
11034 
          <fields>
11035 
            <field>
11036 
              <name>CC1G</name>
11037 
              <description>Capture/compare 1
11038 
              generation</description>
11039 
              <bitOffset>1</bitOffset>
11040 
              <bitWidth>1</bitWidth>
11041 
            </field>
11042 
            <field>
11043 
              <name>UG</name>
11044 
              <description>Update generation</description>
11045 
              <bitOffset>0</bitOffset>
11046 
              <bitWidth>1</bitWidth>
11047 
            </field>
11048 
          </fields>
11049 
        </register>
11050 
        <register>
11051 
          <name>CCMR1_Output</name>
11052 
          <displayName>CCMR1_Output</displayName>
11053 
          <description>capture/compare mode register (output
11054 
          mode)</description>
11055 
          <addressOffset>0x18</addressOffset>
11056 
          <size>0x20</size>
11057 
          <access>read-write</access>
11058 
          <resetValue>0x00000000</resetValue>
11059 
          <fields>
11060 
            <field>
11061 
              <name>OC1M</name>
11062 
              <description>Output Compare 1 mode</description>
11063 
              <bitOffset>4</bitOffset>
11064 
              <bitWidth>3</bitWidth>
11065 
            </field>
11066 
            <field>
11067 
              <name>OC1PE</name>
11068 
              <description>Output Compare 1 preload
11069 
              enable</description>
11070 
              <bitOffset>3</bitOffset>
11071 
              <bitWidth>1</bitWidth>
11072 
            </field>
11073 
            <field>
11074 
              <name>CC1S</name>
11075 
              <description>Capture/Compare 1
11076 
              selection</description>
11077 
              <bitOffset>0</bitOffset>
11078 
              <bitWidth>2</bitWidth>
11079 
            </field>
11080 
          </fields>
11081 
        </register>
11082 
        <register>
11083 
          <name>CCMR1_Input</name>
11084 
          <displayName>CCMR1_Input</displayName>
11085 
          <description>capture/compare mode register (input
11086 
          mode)</description>
11087 
          <alternateRegister>CCMR1_Output</alternateRegister>
11088 
          <addressOffset>0x18</addressOffset>
11089 
          <size>0x20</size>
11090 
          <access>read-write</access>
11091 
          <resetValue>0x00000000</resetValue>
11092 
          <fields>
11093 
            <field>
11094 
              <name>IC1F</name>
11095 
              <description>Input capture 1 filter</description>
11096 
              <bitOffset>4</bitOffset>
11097 
              <bitWidth>4</bitWidth>
11098 
            </field>
11099 
            <field>
11100 
              <name>IC1PSC</name>
11101 
              <description>Input capture 1 prescaler</description>
11102 
              <bitOffset>2</bitOffset>
11103 
              <bitWidth>2</bitWidth>
11104 
            </field>
11105 
            <field>
11106 
              <name>CC1S</name>
11107 
              <description>Capture/Compare 1
11108 
              selection</description>
11109 
              <bitOffset>0</bitOffset>
11110 
              <bitWidth>2</bitWidth>
11111 
            </field>
11112 
          </fields>
11113 
        </register>
11114 
        <register>
11115 
          <name>CCER</name>
11116 
          <displayName>CCER</displayName>
11117 
          <description>capture/compare enable
11118 
          register</description>
11119 
          <addressOffset>0x20</addressOffset>
11120 
          <size>0x20</size>
11121 
          <access>read-write</access>
11122 
          <resetValue>0x0000</resetValue>
11123 
          <fields>
11124 
            <field>
11125 
              <name>CC1NP</name>
11126 
              <description>Capture/Compare 1 output
11127 
              Polarity</description>
11128 
              <bitOffset>3</bitOffset>
11129 
              <bitWidth>1</bitWidth>
11130 
            </field>
11131 
            <field>
11132 
              <name>CC1P</name>
11133 
              <description>Capture/Compare 1 output
11134 
              Polarity</description>
11135 
              <bitOffset>1</bitOffset>
11136 
              <bitWidth>1</bitWidth>
11137 
            </field>
11138 
            <field>
11139 
              <name>CC1E</name>
11140 
              <description>Capture/Compare 1 output
11141 
              enable</description>
11142 
              <bitOffset>0</bitOffset>
11143 
              <bitWidth>1</bitWidth>
11144 
            </field>
11145 
          </fields>
11146 
        </register>
11147 
        <register>
11148 
          <name>CNT</name>
11149 
          <displayName>CNT</displayName>
11150 
          <description>counter</description>
11151 
          <addressOffset>0x24</addressOffset>
11152 
          <size>0x20</size>
11153 
          <access>read-write</access>
11154 
          <resetValue>0x00000000</resetValue>
11155 
          <fields>
11156 
            <field>
11157 
              <name>CNT</name>
11158 
              <description>counter value</description>
11159 
              <bitOffset>0</bitOffset>
11160 
              <bitWidth>16</bitWidth>
11161 
            </field>
11162 
          </fields>
11163 
        </register>
11164 
        <register>
11165 
          <name>PSC</name>
11166 
          <displayName>PSC</displayName>
11167 
          <description>prescaler</description>
11168 
          <addressOffset>0x28</addressOffset>
11169 
          <size>0x20</size>
11170 
          <access>read-write</access>
11171 
          <resetValue>0x0000</resetValue>
11172 
          <fields>
11173 
            <field>
11174 
              <name>PSC</name>
11175 
              <description>Prescaler value</description>
11176 
              <bitOffset>0</bitOffset>
11177 
              <bitWidth>16</bitWidth>
11178 
            </field>
11179 
          </fields>
11180 
        </register>
11181 
        <register>
11182 
          <name>ARR</name>
11183 
          <displayName>ARR</displayName>
11184 
          <description>auto-reload register</description>
11185 
          <addressOffset>0x2C</addressOffset>
11186 
          <size>0x20</size>
11187 
          <access>read-write</access>
11188 
          <resetValue>0x00000000</resetValue>
11189 
          <fields>
11190 
            <field>
11191 
              <name>ARR</name>
11192 
              <description>Auto-reload value</description>
11193 
              <bitOffset>0</bitOffset>
11194 
              <bitWidth>16</bitWidth>
11195 
            </field>
11196 
          </fields>
11197 
        </register>
11198 
        <register>
11199 
          <name>CCR1</name>
11200 
          <displayName>CCR1</displayName>
11201 
          <description>capture/compare register 1</description>
11202 
          <addressOffset>0x34</addressOffset>
11203 
          <size>0x20</size>
11204 
          <access>read-write</access>
11205 
          <resetValue>0x00000000</resetValue>
11206 
          <fields>
11207 
            <field>
11208 
              <name>CCR1</name>
11209 
              <description>Capture/Compare 1 value</description>
11210 
              <bitOffset>0</bitOffset>
11211 
              <bitWidth>16</bitWidth>
11212 
            </field>
11213 
          </fields>
11214 
        </register>
11215 
      </registers>
11216 
    </peripheral>
11217 
    <peripheral derivedFrom="TIM10">
11218 
      <name>TIM11</name>
11219 
      <baseAddress>0x40015400</baseAddress>
11220 
      <interrupt>
11221 
        <name>TIM1_TRG_COM_TIM11</name>
11222 
        <description>TIM1 Trigger and Commutation interrupts and
11223 
        TIM11 global interrupt</description>
11224 
        <value>26</value>
11225 
      </interrupt>
11226 
    </peripheral>
11227 
    <peripheral derivedFrom="TIM10">
11228 
      <name>TIM13</name>
11229 
      <baseAddress>0x40001C00</baseAddress>
11230 
      <interrupt>
11231 
        <name>TIM8_UP_TIM13</name>
11232 
        <description>TIM8 Update interrupt and TIM13 global
11233 
        interrupt</description>
11234 
        <value>44</value>
11235 
      </interrupt>
11236 
    </peripheral>
11237 
    <peripheral derivedFrom="TIM10">
11238 
      <name>TIM14</name>
11239 
      <baseAddress>0x40002000</baseAddress>
11240 
      <interrupt>
11241 
        <name>TIM8_TRG_COM_TIM14</name>
11242 
        <description>TIM8 Trigger and Commutation interrupts and
11243 
        TIM14 global interrupt</description>
11244 
        <value>45</value>
11245 
      </interrupt>
11246 
    </peripheral>
11247 
    <peripheral>
11248 
      <name>TIM6</name>
11249 
      <description>Basic timer</description>
11250 
      <groupName>TIM</groupName>
11251 
      <baseAddress>0x40001000</baseAddress>
11252 
      <addressBlock>
11253 
        <offset>0x0</offset>
11254 
        <size>0x400</size>
11255 
        <usage>registers</usage>
11256 
      </addressBlock>
11257 
      <interrupt>
11258 
        <name>TIM6</name>
11259 
        <description>TIM6 global interrupt</description>
11260 
        <value>54</value>
11261 
      </interrupt>
11262 
      <registers>
11263 
        <register>
11264 
          <name>CR1</name>
11265 
          <displayName>CR1</displayName>
11266 
          <description>control register 1</description>
11267 
          <addressOffset>0x0</addressOffset>
11268 
          <size>0x20</size>
11269 
          <access>read-write</access>
11270 
          <resetValue>0x0000</resetValue>
11271 
          <fields>
11272 
            <field>
11273 
              <name>ARPE</name>
11274 
              <description>Auto-reload preload enable</description>
11275 
              <bitOffset>7</bitOffset>
11276 
              <bitWidth>1</bitWidth>
11277 
            </field>
11278 
            <field>
11279 
              <name>OPM</name>
11280 
              <description>One-pulse mode</description>
11281 
              <bitOffset>3</bitOffset>
11282 
              <bitWidth>1</bitWidth>
11283 
            </field>
11284 
            <field>
11285 
              <name>URS</name>
11286 
              <description>Update request source</description>
11287 
              <bitOffset>2</bitOffset>
11288 
              <bitWidth>1</bitWidth>
11289 
            </field>
11290 
            <field>
11291 
              <name>UDIS</name>
11292 
              <description>Update disable</description>
11293 
              <bitOffset>1</bitOffset>
11294 
              <bitWidth>1</bitWidth>
11295 
            </field>
11296 
            <field>
11297 
              <name>CEN</name>
11298 
              <description>Counter enable</description>
11299 
              <bitOffset>0</bitOffset>
11300 
              <bitWidth>1</bitWidth>
11301 
            </field>
11302 
          </fields>
11303 
        </register>
11304 
        <register>
11305 
          <name>CR2</name>
11306 
          <displayName>CR2</displayName>
11307 
          <description>control register 2</description>
11308 
          <addressOffset>0x4</addressOffset>
11309 
          <size>0x20</size>
11310 
          <access>read-write</access>
11311 
          <resetValue>0x0000</resetValue>
11312 
          <fields>
11313 
            <field>
11314 
              <name>MMS</name>
11315 
              <description>Master mode selection</description>
11316 
              <bitOffset>4</bitOffset>
11317 
              <bitWidth>3</bitWidth>
11318 
            </field>
11319 
          </fields>
11320 
        </register>
11321 
        <register>
11322 
          <name>DIER</name>
11323 
          <displayName>DIER</displayName>
11324 
          <description>DMA/Interrupt enable register</description>
11325 
          <addressOffset>0xC</addressOffset>
11326 
          <size>0x20</size>
11327 
          <access>read-write</access>
11328 
          <resetValue>0x0000</resetValue>
11329 
          <fields>
11330 
            <field>
11331 
              <name>UDE</name>
11332 
              <description>Update DMA request enable</description>
11333 
              <bitOffset>8</bitOffset>
11334 
              <bitWidth>1</bitWidth>
11335 
            </field>
11336 
            <field>
11337 
              <name>UIE</name>
11338 
              <description>Update interrupt enable</description>
11339 
              <bitOffset>0</bitOffset>
11340 
              <bitWidth>1</bitWidth>
11341 
            </field>
11342 
          </fields>
11343 
        </register>
11344 
        <register>
11345 
          <name>SR</name>
11346 
          <displayName>SR</displayName>
11347 
          <description>status register</description>
11348 
          <addressOffset>0x10</addressOffset>
11349 
          <size>0x20</size>
11350 
          <access>read-write</access>
11351 
          <resetValue>0x0000</resetValue>
11352 
          <fields>
11353 
            <field>
11354 
              <name>UIF</name>
11355 
              <description>Update interrupt flag</description>
11356 
              <bitOffset>0</bitOffset>
11357 
              <bitWidth>1</bitWidth>
11358 
            </field>
11359 
          </fields>
11360 
        </register>
11361 
        <register>
11362 
          <name>EGR</name>
11363 
          <displayName>EGR</displayName>
11364 
          <description>event generation register</description>
11365 
          <addressOffset>0x14</addressOffset>
11366 
          <size>0x20</size>
11367 
          <access>write-only</access>
11368 
          <resetValue>0x0000</resetValue>
11369 
          <fields>
11370 
            <field>
11371 
              <name>UG</name>
11372 
              <description>Update generation</description>
11373 
              <bitOffset>0</bitOffset>
11374 
              <bitWidth>1</bitWidth>
11375 
            </field>
11376 
          </fields>
11377 
        </register>
11378 
        <register>
11379 
          <name>CNT</name>
11380 
          <displayName>CNT</displayName>
11381 
          <description>counter</description>
11382 
          <addressOffset>0x24</addressOffset>
11383 
          <size>0x20</size>
11384 
          <access>read-write</access>
11385 
          <resetValue>0x00000000</resetValue>
11386 
          <fields>
11387 
            <field>
11388 
              <name>CNT</name>
11389 
              <description>Low counter value</description>
11390 
              <bitOffset>0</bitOffset>
11391 
              <bitWidth>16</bitWidth>
11392 
            </field>
11393 
          </fields>
11394 
        </register>
11395 
        <register>
11396 
          <name>PSC</name>
11397 
          <displayName>PSC</displayName>
11398 
          <description>prescaler</description>
11399 
          <addressOffset>0x28</addressOffset>
11400 
          <size>0x20</size>
11401 
          <access>read-write</access>
11402 
          <resetValue>0x0000</resetValue>
11403 
          <fields>
11404 
            <field>
11405 
              <name>PSC</name>
11406 
              <description>Prescaler value</description>
11407 
              <bitOffset>0</bitOffset>
11408 
              <bitWidth>16</bitWidth>
11409 
            </field>
11410 
          </fields>
11411 
        </register>
11412 
        <register>
11413 
          <name>ARR</name>
11414 
          <displayName>ARR</displayName>
11415 
          <description>auto-reload register</description>
11416 
          <addressOffset>0x2C</addressOffset>
11417 
          <size>0x20</size>
11418 
          <access>read-write</access>
11419 
          <resetValue>0x00000000</resetValue>
11420 
          <fields>
11421 
            <field>
11422 
              <name>ARR</name>
11423 
              <description>Low Auto-reload value</description>
11424 
              <bitOffset>0</bitOffset>
11425 
              <bitWidth>16</bitWidth>
11426 
            </field>
11427 
          </fields>
11428 
        </register>
11429 
      </registers>
11430 
    </peripheral>
11431 
    <peripheral derivedFrom="TIM6">
11432 
      <name>TIM7</name>
11433 
      <baseAddress>0x40001400</baseAddress>
11434 
      <interrupt>
11435 
        <name>TIM7</name>
11436 
        <description>TIM7 global interrupt</description>
11437 
        <value>55</value>
11438 
      </interrupt>
11439 
    </peripheral>
11440 
    <peripheral>
11441 
      <name>I2C1</name>
11442 
      <description>Inter integrated circuit</description>
11443 
      <groupName>I2C</groupName>
11444 
      <baseAddress>0x40005400</baseAddress>
11445 
      <addressBlock>
11446 
        <offset>0x0</offset>
11447 
        <size>0x400</size>
11448 
        <usage>registers</usage>
11449 
      </addressBlock>
11450 
      <interrupt>
11451 
        <name>I2C1_EV</name>
11452 
        <description>I2C1 event interrupt</description>
11453 
        <value>31</value>
11454 
      </interrupt>
11455 
      <interrupt>
11456 
        <name>I2C1_ER</name>
11457 
        <description>I2C1 error interrupt</description>
11458 
        <value>32</value>
11459 
      </interrupt>
11460 
      <registers>
11461 
        <register>
11462 
          <name>CR1</name>
11463 
          <displayName>CR1</displayName>
11464 
          <description>Control register 1</description>
11465 
          <addressOffset>0x0</addressOffset>
11466 
          <size>0x20</size>
11467 
          <access>read-write</access>
11468 
          <resetValue>0x0000</resetValue>
11469 
          <fields>
11470 
            <field>
11471 
              <name>SWRST</name>
11472 
              <description>Software reset</description>
11473 
              <bitOffset>15</bitOffset>
11474 
              <bitWidth>1</bitWidth>
11475 
            </field>
11476 
            <field>
11477 
              <name>ALERT</name>
11478 
              <description>SMBus alert</description>
11479 
              <bitOffset>13</bitOffset>
11480 
              <bitWidth>1</bitWidth>
11481 
            </field>
11482 
            <field>
11483 
              <name>PEC</name>
11484 
              <description>Packet error checking</description>
11485 
              <bitOffset>12</bitOffset>
11486 
              <bitWidth>1</bitWidth>
11487 
            </field>
11488 
            <field>
11489 
              <name>POS</name>
11490 
              <description>Acknowledge/PEC Position (for data
11491 
              reception)</description>
11492 
              <bitOffset>11</bitOffset>
11493 
              <bitWidth>1</bitWidth>
11494 
            </field>
11495 
            <field>
11496 
              <name>ACK</name>
11497 
              <description>Acknowledge enable</description>
11498 
              <bitOffset>10</bitOffset>
11499 
              <bitWidth>1</bitWidth>
11500 
            </field>
11501 
            <field>
11502 
              <name>STOP</name>
11503 
              <description>Stop generation</description>
11504 
              <bitOffset>9</bitOffset>
11505 
              <bitWidth>1</bitWidth>
11506 
            </field>
11507 
            <field>
11508 
              <name>START</name>
11509 
              <description>Start generation</description>
11510 
              <bitOffset>8</bitOffset>
11511 
              <bitWidth>1</bitWidth>
11512 
            </field>
11513 
            <field>
11514 
              <name>NOSTRETCH</name>
11515 
              <description>Clock stretching disable (Slave
11516 
              mode)</description>
11517 
              <bitOffset>7</bitOffset>
11518 
              <bitWidth>1</bitWidth>
11519 
            </field>
11520 
            <field>
11521 
              <name>ENGC</name>
11522 
              <description>General call enable</description>
11523 
              <bitOffset>6</bitOffset>
11524 
              <bitWidth>1</bitWidth>
11525 
            </field>
11526 
            <field>
11527 
              <name>ENPEC</name>
11528 
              <description>PEC enable</description>
11529 
              <bitOffset>5</bitOffset>
11530 
              <bitWidth>1</bitWidth>
11531 
            </field>
11532 
            <field>
11533 
              <name>ENARP</name>
11534 
              <description>ARP enable</description>
11535 
              <bitOffset>4</bitOffset>
11536 
              <bitWidth>1</bitWidth>
11537 
            </field>
11538 
            <field>
11539 
              <name>SMBTYPE</name>
11540 
              <description>SMBus type</description>
11541 
              <bitOffset>3</bitOffset>
11542 
              <bitWidth>1</bitWidth>
11543 
            </field>
11544 
            <field>
11545 
              <name>SMBUS</name>
11546 
              <description>SMBus mode</description>
11547 
              <bitOffset>1</bitOffset>
11548 
              <bitWidth>1</bitWidth>
11549 
            </field>
11550 
            <field>
11551 
              <name>PE</name>
11552 
              <description>Peripheral enable</description>
11553 
              <bitOffset>0</bitOffset>
11554 
              <bitWidth>1</bitWidth>
11555 
            </field>
11556 
          </fields>
11557 
        </register>
11558 
        <register>
11559 
          <name>CR2</name>
11560 
          <displayName>CR2</displayName>
11561 
          <description>Control register 2</description>
11562 
          <addressOffset>0x4</addressOffset>
11563 
          <size>0x20</size>
11564 
          <access>read-write</access>
11565 
          <resetValue>0x0000</resetValue>
11566 
          <fields>
11567 
            <field>
11568 
              <name>LAST</name>
11569 
              <description>DMA last transfer</description>
11570 
              <bitOffset>12</bitOffset>
11571 
              <bitWidth>1</bitWidth>
11572 
            </field>
11573 
            <field>
11574 
              <name>DMAEN</name>
11575 
              <description>DMA requests enable</description>
11576 
              <bitOffset>11</bitOffset>
11577 
              <bitWidth>1</bitWidth>
11578 
            </field>
11579 
            <field>
11580 
              <name>ITBUFEN</name>
11581 
              <description>Buffer interrupt enable</description>
11582 
              <bitOffset>10</bitOffset>
11583 
              <bitWidth>1</bitWidth>
11584 
            </field>
11585 
            <field>
11586 
              <name>ITEVTEN</name>
11587 
              <description>Event interrupt enable</description>
11588 
              <bitOffset>9</bitOffset>
11589 
              <bitWidth>1</bitWidth>
11590 
            </field>
11591 
            <field>
11592 
              <name>ITERREN</name>
11593 
              <description>Error interrupt enable</description>
11594 
              <bitOffset>8</bitOffset>
11595 
              <bitWidth>1</bitWidth>
11596 
            </field>
11597 
            <field>
11598 
              <name>FREQ</name>
11599 
              <description>Peripheral clock frequency</description>
11600 
              <bitOffset>0</bitOffset>
11601 
              <bitWidth>6</bitWidth>
11602 
            </field>
11603 
          </fields>
11604 
        </register>
11605 
        <register>
11606 
          <name>OAR1</name>
11607 
          <displayName>OAR1</displayName>
11608 
          <description>Own address register 1</description>
11609 
          <addressOffset>0x8</addressOffset>
11610 
          <size>0x20</size>
11611 
          <access>read-write</access>
11612 
          <resetValue>0x0000</resetValue>
11613 
          <fields>
11614 
            <field>
11615 
              <name>ADDMODE</name>
11616 
              <description>Addressing mode (slave
11617 
              mode)</description>
11618 
              <bitOffset>15</bitOffset>
11619 
              <bitWidth>1</bitWidth>
11620 
            </field>
11621 
            <field>
11622 
              <name>ADD10</name>
11623 
              <description>Interface address</description>
11624 
              <bitOffset>8</bitOffset>
11625 
              <bitWidth>2</bitWidth>
11626 
            </field>
11627 
            <field>
11628 
              <name>ADD7</name>
11629 
              <description>Interface address</description>
11630 
              <bitOffset>1</bitOffset>
11631 
              <bitWidth>7</bitWidth>
11632 
            </field>
11633 
            <field>
11634 
              <name>ADD0</name>
11635 
              <description>Interface address</description>
11636 
              <bitOffset>0</bitOffset>
11637 
              <bitWidth>1</bitWidth>
11638 
            </field>
11639 
          </fields>
11640 
        </register>
11641 
        <register>
11642 
          <name>OAR2</name>
11643 
          <displayName>OAR2</displayName>
11644 
          <description>Own address register 2</description>
11645 
          <addressOffset>0xC</addressOffset>
11646 
          <size>0x20</size>
11647 
          <access>read-write</access>
11648 
          <resetValue>0x0000</resetValue>
11649 
          <fields>
11650 
            <field>
11651 
              <name>ADD2</name>
11652 
              <description>Interface address</description>
11653 
              <bitOffset>1</bitOffset>
11654 
              <bitWidth>7</bitWidth>
11655 
            </field>
11656 
            <field>
11657 
              <name>ENDUAL</name>
11658 
              <description>Dual addressing mode
11659 
              enable</description>
11660 
              <bitOffset>0</bitOffset>
11661 
              <bitWidth>1</bitWidth>
11662 
            </field>
11663 
          </fields>
11664 
        </register>
11665 
        <register>
11666 
          <name>DR</name>
11667 
          <displayName>DR</displayName>
11668 
          <description>Data register</description>
11669 
          <addressOffset>0x10</addressOffset>
11670 
          <size>0x20</size>
11671 
          <access>read-write</access>
11672 
          <resetValue>0x0000</resetValue>
11673 
          <fields>
11674 
            <field>
11675 
              <name>DR</name>
11676 
              <description>8-bit data register</description>
11677 
              <bitOffset>0</bitOffset>
11678 
              <bitWidth>8</bitWidth>
11679 
            </field>
11680 
          </fields>
11681 
        </register>
11682 
        <register>
11683 
          <name>SR1</name>
11684 
          <displayName>SR1</displayName>
11685 
          <description>Status register 1</description>
11686 
          <addressOffset>0x14</addressOffset>
11687 
          <size>0x20</size>
11688 
          <resetValue>0x0000</resetValue>
11689 
          <fields>
11690 
            <field>
11691 
              <name>SMBALERT</name>
11692 
              <description>SMBus alert</description>
11693 
              <bitOffset>15</bitOffset>
11694 
              <bitWidth>1</bitWidth>
11695 
              <access>read-write</access>
11696 
            </field>
11697 
            <field>
11698 
              <name>TIMEOUT</name>
11699 
              <description>Timeout or Tlow error</description>
11700 
              <bitOffset>14</bitOffset>
11701 
              <bitWidth>1</bitWidth>
11702 
              <access>read-write</access>
11703 
            </field>
11704 
            <field>
11705 
              <name>PECERR</name>
11706 
              <description>PEC Error in reception</description>
11707 
              <bitOffset>12</bitOffset>
11708 
              <bitWidth>1</bitWidth>
11709 
              <access>read-write</access>
11710 
            </field>
11711 
            <field>
11712 
              <name>OVR</name>
11713 
              <description>Overrun/Underrun</description>
11714 
              <bitOffset>11</bitOffset>
11715 
              <bitWidth>1</bitWidth>
11716 
              <access>read-write</access>
11717 
            </field>
11718 
            <field>
11719 
              <name>AF</name>
11720 
              <description>Acknowledge failure</description>
11721 
              <bitOffset>10</bitOffset>
11722 
              <bitWidth>1</bitWidth>
11723 
              <access>read-write</access>
11724 
            </field>
11725 
            <field>
11726 
              <name>ARLO</name>
11727 
              <description>Arbitration lost (master
11728 
              mode)</description>
11729 
              <bitOffset>9</bitOffset>
11730 
              <bitWidth>1</bitWidth>
11731 
              <access>read-write</access>
11732 
            </field>
11733 
            <field>
11734 
              <name>BERR</name>
11735 
              <description>Bus error</description>
11736 
              <bitOffset>8</bitOffset>
11737 
              <bitWidth>1</bitWidth>
11738 
              <access>read-write</access>
11739 
            </field>
11740 
            <field>
11741 
              <name>TxE</name>
11742 
              <description>Data register empty
11743 
              (transmitters)</description>
11744 
              <bitOffset>7</bitOffset>
11745 
              <bitWidth>1</bitWidth>
11746 
              <access>read-only</access>
11747 
            </field>
11748 
            <field>
11749 
              <name>RxNE</name>
11750 
              <description>Data register not empty
11751 
              (receivers)</description>
11752 
              <bitOffset>6</bitOffset>
11753 
              <bitWidth>1</bitWidth>
11754 
              <access>read-only</access>
11755 
            </field>
11756 
            <field>
11757 
              <name>STOPF</name>
11758 
              <description>Stop detection (slave
11759 
              mode)</description>
11760 
              <bitOffset>4</bitOffset>
11761 
              <bitWidth>1</bitWidth>
11762 
              <access>read-only</access>
11763 
            </field>
11764 
            <field>
11765 
              <name>ADD10</name>
11766 
              <description>10-bit header sent (Master
11767 
              mode)</description>
11768 
              <bitOffset>3</bitOffset>
11769 
              <bitWidth>1</bitWidth>
11770 
              <access>read-only</access>
11771 
            </field>
11772 
            <field>
11773 
              <name>BTF</name>
11774 
              <description>Byte transfer finished</description>
11775 
              <bitOffset>2</bitOffset>
11776 
              <bitWidth>1</bitWidth>
11777 
              <access>read-only</access>
11778 
            </field>
11779 
            <field>
11780 
              <name>ADDR</name>
11781 
              <description>Address sent (master mode)/matched
11782 
              (slave mode)</description>
11783 
              <bitOffset>1</bitOffset>
11784 
              <bitWidth>1</bitWidth>
11785 
              <access>read-only</access>
11786 
            </field>
11787 
            <field>
11788 
              <name>SB</name>
11789 
              <description>Start bit (Master mode)</description>
11790 
              <bitOffset>0</bitOffset>
11791 
              <bitWidth>1</bitWidth>
11792 
              <access>read-only</access>
11793 
            </field>
11794 
          </fields>
11795 
        </register>
11796 
        <register>
11797 
          <name>SR2</name>
11798 
          <displayName>SR2</displayName>
11799 
          <description>Status register 2</description>
11800 
          <addressOffset>0x18</addressOffset>
11801 
          <size>0x20</size>
11802 
          <access>read-only</access>
11803 
          <resetValue>0x0000</resetValue>
11804 
          <fields>
11805 
            <field>
11806 
              <name>PEC</name>
11807 
              <description>acket error checking
11808 
              register</description>
11809 
              <bitOffset>8</bitOffset>
11810 
              <bitWidth>8</bitWidth>
11811 
            </field>
11812 
            <field>
11813 
              <name>DUALF</name>
11814 
              <description>Dual flag (Slave mode)</description>
11815 
              <bitOffset>7</bitOffset>
11816 
              <bitWidth>1</bitWidth>
11817 
            </field>
11818 
            <field>
11819 
              <name>SMBHOST</name>
11820 
              <description>SMBus host header (Slave
11821 
              mode)</description>
11822 
              <bitOffset>6</bitOffset>
11823 
              <bitWidth>1</bitWidth>
11824 
            </field>
11825 
            <field>
11826 
              <name>SMBDEFAULT</name>
11827 
              <description>SMBus device default address (Slave
11828 
              mode)</description>
11829 
              <bitOffset>5</bitOffset>
11830 
              <bitWidth>1</bitWidth>
11831 
            </field>
11832 
            <field>
11833 
              <name>GENCALL</name>
11834 
              <description>General call address (Slave
11835 
              mode)</description>
11836 
              <bitOffset>4</bitOffset>
11837 
              <bitWidth>1</bitWidth>
11838 
            </field>
11839 
            <field>
11840 
              <name>TRA</name>
11841 
              <description>Transmitter/receiver</description>
11842 
              <bitOffset>2</bitOffset>
11843 
              <bitWidth>1</bitWidth>
11844 
            </field>
11845 
            <field>
11846 
              <name>BUSY</name>
11847 
              <description>Bus busy</description>
11848 
              <bitOffset>1</bitOffset>
11849 
              <bitWidth>1</bitWidth>
11850 
            </field>
11851 
            <field>
11852 
              <name>MSL</name>
11853 
              <description>Master/slave</description>
11854 
              <bitOffset>0</bitOffset>
11855 
              <bitWidth>1</bitWidth>
11856 
            </field>
11857 
          </fields>
11858 
        </register>
11859 
        <register>
11860 
          <name>CCR</name>
11861 
          <displayName>CCR</displayName>
11862 
          <description>Clock control register</description>
11863 
          <addressOffset>0x1C</addressOffset>
11864 
          <size>0x20</size>
11865 
          <access>read-write</access>
11866 
          <resetValue>0x0000</resetValue>
11867 
          <fields>
11868 
            <field>
11869 
              <name>F_S</name>
11870 
              <description>I2C master mode selection</description>
11871 
              <bitOffset>15</bitOffset>
11872 
              <bitWidth>1</bitWidth>
11873 
            </field>
11874 
            <field>
11875 
              <name>DUTY</name>
11876 
              <description>Fast mode duty cycle</description>
11877 
              <bitOffset>14</bitOffset>
11878 
              <bitWidth>1</bitWidth>
11879 
            </field>
11880 
            <field>
11881 
              <name>CCR</name>
11882 
              <description>Clock control register in Fast/Standard
11883 
              mode (Master mode)</description>
11884 
              <bitOffset>0</bitOffset>
11885 
              <bitWidth>12</bitWidth>
11886 
            </field>
11887 
          </fields>
11888 
        </register>
11889 
        <register>
11890 
          <name>TRISE</name>
11891 
          <displayName>TRISE</displayName>
11892 
          <description>TRISE register</description>
11893 
          <addressOffset>0x20</addressOffset>
11894 
          <size>0x20</size>
11895 
          <access>read-write</access>
11896 
          <resetValue>0x0002</resetValue>
11897 
          <fields>
11898 
            <field>
11899 
              <name>TRISE</name>
11900 
              <description>Maximum rise time in Fast/Standard mode
11901 
              (Master mode)</description>
11902 
              <bitOffset>0</bitOffset>
11903 
              <bitWidth>6</bitWidth>
11904 
            </field>
11905 
          </fields>
11906 
        </register>
11907 
      </registers>
11908 
    </peripheral>
11909 
    <peripheral derivedFrom="I2C1">
11910 
      <name>I2C2</name>
11911 
      <baseAddress>0x40005800</baseAddress>
11912 
      <interrupt>
11913 
        <name>I2C2_EV</name>
11914 
        <description>I2C2 event interrupt</description>
11915 
        <value>33</value>
11916 
      </interrupt>
11917 
      <interrupt>
11918 
        <name>I2C2_ER</name>
11919 
        <description>I2C2 error interrupt</description>
11920 
        <value>34</value>
11921 
      </interrupt>
11922 
    </peripheral>
11923 
    <peripheral>
11924 
      <name>SPI1</name>
11925 
      <description>Serial peripheral interface</description>
11926 
      <groupName>SPI</groupName>
11927 
      <baseAddress>0x40013000</baseAddress>
11928 
      <addressBlock>
11929 
        <offset>0x0</offset>
11930 
        <size>0x400</size>
11931 
        <usage>registers</usage>
11932 
      </addressBlock>
11933 
      <interrupt>
11934 
        <name>SPI1</name>
11935 
        <description>SPI1 global interrupt</description>
11936 
        <value>35</value>
11937 
      </interrupt>
11938 
      <registers>
11939 
        <register>
11940 
          <name>CR1</name>
11941 
          <displayName>CR1</displayName>
11942 
          <description>control register 1</description>
11943 
          <addressOffset>0x0</addressOffset>
11944 
          <size>0x20</size>
11945 
          <access>read-write</access>
11946 
          <resetValue>0x0000</resetValue>
11947 
          <fields>
11948 
            <field>
11949 
              <name>BIDIMODE</name>
11950 
              <description>Bidirectional data mode
11951 
              enable</description>
11952 
              <bitOffset>15</bitOffset>
11953 
              <bitWidth>1</bitWidth>
11954 
            </field>
11955 
            <field>
11956 
              <name>BIDIOE</name>
11957 
              <description>Output enable in bidirectional
11958 
              mode</description>
11959 
              <bitOffset>14</bitOffset>
11960 
              <bitWidth>1</bitWidth>
11961 
            </field>
11962 
            <field>
11963 
              <name>CRCEN</name>
11964 
              <description>Hardware CRC calculation
11965 
              enable</description>
11966 
              <bitOffset>13</bitOffset>
11967 
              <bitWidth>1</bitWidth>
11968 
            </field>
11969 
            <field>
11970 
              <name>CRCNEXT</name>
11971 
              <description>CRC transfer next</description>
11972 
              <bitOffset>12</bitOffset>
11973 
              <bitWidth>1</bitWidth>
11974 
            </field>
11975 
            <field>
11976 
              <name>DFF</name>
11977 
              <description>Data frame format</description>
11978 
              <bitOffset>11</bitOffset>
11979 
              <bitWidth>1</bitWidth>
11980 
            </field>
11981 
            <field>
11982 
              <name>RXONLY</name>
11983 
              <description>Receive only</description>
11984 
              <bitOffset>10</bitOffset>
11985 
              <bitWidth>1</bitWidth>
11986 
            </field>
11987 
            <field>
11988 
              <name>SSM</name>
11989 
              <description>Software slave management</description>
11990 
              <bitOffset>9</bitOffset>
11991 
              <bitWidth>1</bitWidth>
11992 
            </field>
11993 
            <field>
11994 
              <name>SSI</name>
11995 
              <description>Internal slave select</description>
11996 
              <bitOffset>8</bitOffset>
11997 
              <bitWidth>1</bitWidth>
11998 
            </field>
11999 
            <field>
12000 
              <name>LSBFIRST</name>
12001 
              <description>Frame format</description>
12002 
              <bitOffset>7</bitOffset>
12003 
              <bitWidth>1</bitWidth>
12004 
            </field>
12005 
            <field>
12006 
              <name>SPE</name>
12007 
              <description>SPI enable</description>
12008 
              <bitOffset>6</bitOffset>
12009 
              <bitWidth>1</bitWidth>
12010 
            </field>
12011 
            <field>
12012 
              <name>BR</name>
12013 
              <description>Baud rate control</description>
12014 
              <bitOffset>3</bitOffset>
12015 
              <bitWidth>3</bitWidth>
12016 
            </field>
12017 
            <field>
12018 
              <name>MSTR</name>
12019 
              <description>Master selection</description>
12020 
              <bitOffset>2</bitOffset>
12021 
              <bitWidth>1</bitWidth>
12022 
            </field>
12023 
            <field>
12024 
              <name>CPOL</name>
12025 
              <description>Clock polarity</description>
12026 
              <bitOffset>1</bitOffset>
12027 
              <bitWidth>1</bitWidth>
12028 
            </field>
12029 
            <field>
12030 
              <name>CPHA</name>
12031 
              <description>Clock phase</description>
12032 
              <bitOffset>0</bitOffset>
12033 
              <bitWidth>1</bitWidth>
12034 
            </field>
12035 
          </fields>
12036 
        </register>
12037 
        <register>
12038 
          <name>CR2</name>
12039 
          <displayName>CR2</displayName>
12040 
          <description>control register 2</description>
12041 
          <addressOffset>0x4</addressOffset>
12042 
          <size>0x20</size>
12043 
          <access>read-write</access>
12044 
          <resetValue>0x0000</resetValue>
12045 
          <fields>
12046 
            <field>
12047 
              <name>TXEIE</name>
12048 
              <description>Tx buffer empty interrupt
12049 
              enable</description>
12050 
              <bitOffset>7</bitOffset>
12051 
              <bitWidth>1</bitWidth>
12052 
            </field>
12053 
            <field>
12054 
              <name>RXNEIE</name>
12055 
              <description>RX buffer not empty interrupt
12056 
              enable</description>
12057 
              <bitOffset>6</bitOffset>
12058 
              <bitWidth>1</bitWidth>
12059 
            </field>
12060 
            <field>
12061 
              <name>ERRIE</name>
12062 
              <description>Error interrupt enable</description>
12063 
              <bitOffset>5</bitOffset>
12064 
              <bitWidth>1</bitWidth>
12065 
            </field>
12066 
            <field>
12067 
              <name>SSOE</name>
12068 
              <description>SS output enable</description>
12069 
              <bitOffset>2</bitOffset>
12070 
              <bitWidth>1</bitWidth>
12071 
            </field>
12072 
            <field>
12073 
              <name>TXDMAEN</name>
12074 
              <description>Tx buffer DMA enable</description>
12075 
              <bitOffset>1</bitOffset>
12076 
              <bitWidth>1</bitWidth>
12077 
            </field>
12078 
            <field>
12079 
              <name>RXDMAEN</name>
12080 
              <description>Rx buffer DMA enable</description>
12081 
              <bitOffset>0</bitOffset>
12082 
              <bitWidth>1</bitWidth>
12083 
            </field>
12084 
          </fields>
12085 
        </register>
12086 
        <register>
12087 
          <name>SR</name>
12088 
          <displayName>SR</displayName>
12089 
          <description>status register</description>
12090 
          <addressOffset>0x8</addressOffset>
12091 
          <size>0x20</size>
12092 
          <resetValue>0x0002</resetValue>
12093 
          <fields>
12094 
            <field>
12095 
              <name>BSY</name>
12096 
              <description>Busy flag</description>
12097 
              <bitOffset>7</bitOffset>
12098 
              <bitWidth>1</bitWidth>
12099 
              <access>read-only</access>
12100 
            </field>
12101 
            <field>
12102 
              <name>OVR</name>
12103 
              <description>Overrun flag</description>
12104 
              <bitOffset>6</bitOffset>
12105 
              <bitWidth>1</bitWidth>
12106 
              <access>read-only</access>
12107 
            </field>
12108 
            <field>
12109 
              <name>MODF</name>
12110 
              <description>Mode fault</description>
12111 
              <bitOffset>5</bitOffset>
12112 
              <bitWidth>1</bitWidth>
12113 
              <access>read-only</access>
12114 
            </field>
12115 
            <field>
12116 
              <name>CRCERR</name>
12117 
              <description>CRC error flag</description>
12118 
              <bitOffset>4</bitOffset>
12119 
              <bitWidth>1</bitWidth>
12120 
              <access>read-write</access>
12121 
            </field>
12122 
            <field>
12123 
              <name>UDR</name>
12124 
              <description>Underrun flag</description>
12125 
              <bitOffset>3</bitOffset>
12126 
              <bitWidth>1</bitWidth>
12127 
              <access>read-only</access>
12128 
            </field>
12129 
            <field>
12130 
              <name>CHSIDE</name>
12131 
              <description>Channel side</description>
12132 
              <bitOffset>2</bitOffset>
12133 
              <bitWidth>1</bitWidth>
12134 
              <access>read-only</access>
12135 
            </field>
12136 
            <field>
12137 
              <name>TXE</name>
12138 
              <description>Transmit buffer empty</description>
12139 
              <bitOffset>1</bitOffset>
12140 
              <bitWidth>1</bitWidth>
12141 
              <access>read-only</access>
12142 
            </field>
12143 
            <field>
12144 
              <name>RXNE</name>
12145 
              <description>Receive buffer not empty</description>
12146 
              <bitOffset>0</bitOffset>
12147 
              <bitWidth>1</bitWidth>
12148 
              <access>read-only</access>
12149 
            </field>
12150 
          </fields>
12151 
        </register>
12152 
        <register>
12153 
          <name>DR</name>
12154 
          <displayName>DR</displayName>
12155 
          <description>data register</description>
12156 
          <addressOffset>0xC</addressOffset>
12157 
          <size>0x20</size>
12158 
          <access>read-write</access>
12159 
          <resetValue>0x0000</resetValue>
12160 
          <fields>
12161 
            <field>
12162 
              <name>DR</name>
12163 
              <description>Data register</description>
12164 
              <bitOffset>0</bitOffset>
12165 
              <bitWidth>16</bitWidth>
12166 
            </field>
12167 
          </fields>
12168 
        </register>
12169 
        <register>
12170 
          <name>CRCPR</name>
12171 
          <displayName>CRCPR</displayName>
12172 
          <description>CRC polynomial register</description>
12173 
          <addressOffset>0x10</addressOffset>
12174 
          <size>0x20</size>
12175 
          <access>read-write</access>
12176 
          <resetValue>0x0007</resetValue>
12177 
          <fields>
12178 
            <field>
12179 
              <name>CRCPOLY</name>
12180 
              <description>CRC polynomial register</description>
12181 
              <bitOffset>0</bitOffset>
12182 
              <bitWidth>16</bitWidth>
12183 
            </field>
12184 
          </fields>
12185 
        </register>
12186 
        <register>
12187 
          <name>RXCRCR</name>
12188 
          <displayName>RXCRCR</displayName>
12189 
          <description>RX CRC register</description>
12190 
          <addressOffset>0x14</addressOffset>
12191 
          <size>0x20</size>
12192 
          <access>read-only</access>
12193 
          <resetValue>0x0000</resetValue>
12194 
          <fields>
12195 
            <field>
12196 
              <name>RxCRC</name>
12197 
              <description>Rx CRC register</description>
12198 
              <bitOffset>0</bitOffset>
12199 
              <bitWidth>16</bitWidth>
12200 
            </field>
12201 
          </fields>
12202 
        </register>
12203 
        <register>
12204 
          <name>TXCRCR</name>
12205 
          <displayName>TXCRCR</displayName>
12206 
          <description>TX CRC register</description>
12207 
          <addressOffset>0x18</addressOffset>
12208 
          <size>0x20</size>
12209 
          <access>read-only</access>
12210 
          <resetValue>0x0000</resetValue>
12211 
          <fields>
12212 
            <field>
12213 
              <name>TxCRC</name>
12214 
              <description>Tx CRC register</description>
12215 
              <bitOffset>0</bitOffset>
12216 
              <bitWidth>16</bitWidth>
12217 
            </field>
12218 
          </fields>
12219 
        </register>
12220 
        <register>
12221 
          <name>I2SCFGR</name>
12222 
          <displayName>I2SCFGR</displayName>
12223 
          <description>I2S configuration register</description>
12224 
          <addressOffset>0x1C</addressOffset>
12225 
          <size>0x20</size>
12226 
          <access>read-write</access>
12227 
          <resetValue>0x0000</resetValue>
12228 
          <fields>
12229 
            <field>
12230 
              <name>I2SMOD</name>
12231 
              <description>I2S mode selection</description>
12232 
              <bitOffset>11</bitOffset>
12233 
              <bitWidth>1</bitWidth>
12234 
            </field>
12235 
            <field>
12236 
              <name>I2SE</name>
12237 
              <description>I2S Enable</description>
12238 
              <bitOffset>10</bitOffset>
12239 
              <bitWidth>1</bitWidth>
12240 
            </field>
12241 
            <field>
12242 
              <name>I2SCFG</name>
12243 
              <description>I2S configuration mode</description>
12244 
              <bitOffset>8</bitOffset>
12245 
              <bitWidth>2</bitWidth>
12246 
            </field>
12247 
            <field>
12248 
              <name>PCMSYNC</name>
12249 
              <description>PCM frame synchronization</description>
12250 
              <bitOffset>7</bitOffset>
12251 
              <bitWidth>1</bitWidth>
12252 
            </field>
12253 
            <field>
12254 
              <name>I2SSTD</name>
12255 
              <description>I2S standard selection</description>
12256 
              <bitOffset>4</bitOffset>
12257 
              <bitWidth>2</bitWidth>
12258 
            </field>
12259 
            <field>
12260 
              <name>CKPOL</name>
12261 
              <description>Steady state clock
12262 
              polarity</description>
12263 
              <bitOffset>3</bitOffset>
12264 
              <bitWidth>1</bitWidth>
12265 
            </field>
12266 
            <field>
12267 
              <name>DATLEN</name>
12268 
              <description>Data length to be
12269 
              transferred</description>
12270 
              <bitOffset>1</bitOffset>
12271 
              <bitWidth>2</bitWidth>
12272 
            </field>
12273 
            <field>
12274 
              <name>CHLEN</name>
12275 
              <description>Channel length (number of bits per audio
12276 
              channel)</description>
12277 
              <bitOffset>0</bitOffset>
12278 
              <bitWidth>1</bitWidth>
12279 
            </field>
12280 
          </fields>
12281 
        </register>
12282 
        <register>
12283 
          <name>I2SPR</name>
12284 
          <displayName>I2SPR</displayName>
12285 
          <description>I2S prescaler register</description>
12286 
          <addressOffset>0x20</addressOffset>
12287 
          <size>0x20</size>
12288 
          <access>read-write</access>
12289 
          <resetValue>00000010</resetValue>
12290 
          <fields>
12291 
            <field>
12292 
              <name>MCKOE</name>
12293 
              <description>Master clock output enable</description>
12294 
              <bitOffset>9</bitOffset>
12295 
              <bitWidth>1</bitWidth>
12296 
            </field>
12297 
            <field>
12298 
              <name>ODD</name>
12299 
              <description>Odd factor for the
12300 
              prescaler</description>
12301 
              <bitOffset>8</bitOffset>
12302 
              <bitWidth>1</bitWidth>
12303 
            </field>
12304 
            <field>
12305 
              <name>I2SDIV</name>
12306 
              <description>I2S Linear prescaler</description>
12307 
              <bitOffset>0</bitOffset>
12308 
              <bitWidth>8</bitWidth>
12309 
            </field>
12310 
          </fields>
12311 
        </register>
12312 
      </registers>
12313 
    </peripheral>
12314 
    <peripheral derivedFrom="SPI1">
12315 
      <name>SPI2</name>
12316 
      <baseAddress>0x40003800</baseAddress>
12317 
      <interrupt>
12318 
        <name>SPI2</name>
12319 
        <description>SPI2 global interrupt</description>
12320 
        <value>36</value>
12321 
      </interrupt>
12322 
    </peripheral>
12323 
    <peripheral derivedFrom="SPI1">
12324 
      <name>SPI3</name>
12325 
      <baseAddress>0x40003C00</baseAddress>
12326 
      <interrupt>
12327 
        <name>SPI3</name>
12328 
        <description>SPI3 global interrupt</description>
12329 
        <value>51</value>
12330 
      </interrupt>
12331 
    </peripheral>
12332 
    <peripheral>
12333 
      <name>USART1</name>
12334 
      <description>Universal synchronous asynchronous receiver
12335 
      transmitter</description>
12336 
      <groupName>USART</groupName>
12337 
      <baseAddress>0x40013800</baseAddress>
12338 
      <addressBlock>
12339 
        <offset>0x0</offset>
12340 
        <size>0x400</size>
12341 
        <usage>registers</usage>
12342 
      </addressBlock>
12343 
      <interrupt>
12344 
        <name>USART1</name>
12345 
        <description>USART1 global interrupt</description>
12346 
        <value>37</value>
12347 
      </interrupt>
12348 
      <registers>
12349 
        <register>
12350 
          <name>SR</name>
12351 
          <displayName>SR</displayName>
12352 
          <description>Status register</description>
12353 
          <addressOffset>0x0</addressOffset>
12354 
          <size>0x20</size>
12355 
          <resetValue>0x00C0</resetValue>
12356 
          <fields>
12357 
            <field>
12358 
              <name>CTS</name>
12359 
              <description>CTS flag</description>
12360 
              <bitOffset>9</bitOffset>
12361 
              <bitWidth>1</bitWidth>
12362 
              <access>read-write</access>
12363 
            </field>
12364 
            <field>
12365 
              <name>LBD</name>
12366 
              <description>LIN break detection flag</description>
12367 
              <bitOffset>8</bitOffset>
12368 
              <bitWidth>1</bitWidth>
12369 
              <access>read-write</access>
12370 
            </field>
12371 
            <field>
12372 
              <name>TXE</name>
12373 
              <description>Transmit data register
12374 
              empty</description>
12375 
              <bitOffset>7</bitOffset>
12376 
              <bitWidth>1</bitWidth>
12377 
              <access>read-only</access>
12378 
            </field>
12379 
            <field>
12380 
              <name>TC</name>
12381 
              <description>Transmission complete</description>
12382 
              <bitOffset>6</bitOffset>
12383 
              <bitWidth>1</bitWidth>
12384 
              <access>read-write</access>
12385 
            </field>
12386 
            <field>
12387 
              <name>RXNE</name>
12388 
              <description>Read data register not
12389 
              empty</description>
12390 
              <bitOffset>5</bitOffset>
12391 
              <bitWidth>1</bitWidth>
12392 
              <access>read-write</access>
12393 
            </field>
12394 
            <field>
12395 
              <name>IDLE</name>
12396 
              <description>IDLE line detected</description>
12397 
              <bitOffset>4</bitOffset>
12398 
              <bitWidth>1</bitWidth>
12399 
              <access>read-only</access>
12400 
            </field>
12401 
            <field>
12402 
              <name>ORE</name>
12403 
              <description>Overrun error</description>
12404 
              <bitOffset>3</bitOffset>
12405 
              <bitWidth>1</bitWidth>
12406 
              <access>read-only</access>
12407 
            </field>
12408 
            <field>
12409 
              <name>NE</name>
12410 
              <description>Noise error flag</description>
12411 
              <bitOffset>2</bitOffset>
12412 
              <bitWidth>1</bitWidth>
12413 
              <access>read-only</access>
12414 
            </field>
12415 
            <field>
12416 
              <name>FE</name>
12417 
              <description>Framing error</description>
12418 
              <bitOffset>1</bitOffset>
12419 
              <bitWidth>1</bitWidth>
12420 
              <access>read-only</access>
12421 
            </field>
12422 
            <field>
12423 
              <name>PE</name>
12424 
              <description>Parity error</description>
12425 
              <bitOffset>0</bitOffset>
12426 
              <bitWidth>1</bitWidth>
12427 
              <access>read-only</access>
12428 
            </field>
12429 
          </fields>
12430 
        </register>
12431 
        <register>
12432 
          <name>DR</name>
12433 
          <displayName>DR</displayName>
12434 
          <description>Data register</description>
12435 
          <addressOffset>0x4</addressOffset>
12436 
          <size>0x20</size>
12437 
          <access>read-write</access>
12438 
          <resetValue>0x00000000</resetValue>
12439 
          <fields>
12440 
            <field>
12441 
              <name>DR</name>
12442 
              <description>Data value</description>
12443 
              <bitOffset>0</bitOffset>
12444 
              <bitWidth>9</bitWidth>
12445 
            </field>
12446 
          </fields>
12447 
        </register>
12448 
        <register>
12449 
          <name>BRR</name>
12450 
          <displayName>BRR</displayName>
12451 
          <description>Baud rate register</description>
12452 
          <addressOffset>0x8</addressOffset>
12453 
          <size>0x20</size>
12454 
          <access>read-write</access>
12455 
          <resetValue>0x0000</resetValue>
12456 
          <fields>
12457 
            <field>
12458 
              <name>DIV_Mantissa</name>
12459 
              <description>mantissa of USARTDIV</description>
12460 
              <bitOffset>4</bitOffset>
12461 
              <bitWidth>12</bitWidth>
12462 
            </field>
12463 
            <field>
12464 
              <name>DIV_Fraction</name>
12465 
              <description>fraction of USARTDIV</description>
12466 
              <bitOffset>0</bitOffset>
12467 
              <bitWidth>4</bitWidth>
12468 
            </field>
12469 
          </fields>
12470 
        </register>
12471 
        <register>
12472 
          <name>CR1</name>
12473 
          <displayName>CR1</displayName>
12474 
          <description>Control register 1</description>
12475 
          <addressOffset>0xC</addressOffset>
12476 
          <size>0x20</size>
12477 
          <access>read-write</access>
12478 
          <resetValue>0x0000</resetValue>
12479 
          <fields>
12480 
            <field>
12481 
              <name>UE</name>
12482 
              <description>USART enable</description>
12483 
              <bitOffset>13</bitOffset>
12484 
              <bitWidth>1</bitWidth>
12485 
            </field>
12486 
            <field>
12487 
              <name>M</name>
12488 
              <description>Word length</description>
12489 
              <bitOffset>12</bitOffset>
12490 
              <bitWidth>1</bitWidth>
12491 
            </field>
12492 
            <field>
12493 
              <name>WAKE</name>
12494 
              <description>Wakeup method</description>
12495 
              <bitOffset>11</bitOffset>
12496 
              <bitWidth>1</bitWidth>
12497 
            </field>
12498 
            <field>
12499 
              <name>PCE</name>
12500 
              <description>Parity control enable</description>
12501 
              <bitOffset>10</bitOffset>
12502 
              <bitWidth>1</bitWidth>
12503 
            </field>
12504 
            <field>
12505 
              <name>PS</name>
12506 
              <description>Parity selection</description>
12507 
              <bitOffset>9</bitOffset>
12508 
              <bitWidth>1</bitWidth>
12509 
            </field>
12510 
            <field>
12511 
              <name>PEIE</name>
12512 
              <description>PE interrupt enable</description>
12513 
              <bitOffset>8</bitOffset>
12514 
              <bitWidth>1</bitWidth>
12515 
            </field>
12516 
            <field>
12517 
              <name>TXEIE</name>
12518 
              <description>TXE interrupt enable</description>
12519 
              <bitOffset>7</bitOffset>
12520 
              <bitWidth>1</bitWidth>
12521 
            </field>
12522 
            <field>
12523 
              <name>TCIE</name>
12524 
              <description>Transmission complete interrupt
12525 
              enable</description>
12526 
              <bitOffset>6</bitOffset>
12527 
              <bitWidth>1</bitWidth>
12528 
            </field>
12529 
            <field>
12530 
              <name>RXNEIE</name>
12531 
              <description>RXNE interrupt enable</description>
12532 
              <bitOffset>5</bitOffset>
12533 
              <bitWidth>1</bitWidth>
12534 
            </field>
12535 
            <field>
12536 
              <name>IDLEIE</name>
12537 
              <description>IDLE interrupt enable</description>
12538 
              <bitOffset>4</bitOffset>
12539 
              <bitWidth>1</bitWidth>
12540 
            </field>
12541 
            <field>
12542 
              <name>TE</name>
12543 
              <description>Transmitter enable</description>
12544 
              <bitOffset>3</bitOffset>
12545 
              <bitWidth>1</bitWidth>
12546 
            </field>
12547 
            <field>
12548 
              <name>RE</name>
12549 
              <description>Receiver enable</description>
12550 
              <bitOffset>2</bitOffset>
12551 
              <bitWidth>1</bitWidth>
12552 
            </field>
12553 
            <field>
12554 
              <name>RWU</name>
12555 
              <description>Receiver wakeup</description>
12556 
              <bitOffset>1</bitOffset>
12557 
              <bitWidth>1</bitWidth>
12558 
            </field>
12559 
            <field>
12560 
              <name>SBK</name>
12561 
              <description>Send break</description>
12562 
              <bitOffset>0</bitOffset>
12563 
              <bitWidth>1</bitWidth>
12564 
            </field>
12565 
          </fields>
12566 
        </register>
12567 
        <register>
12568 
          <name>CR2</name>
12569 
          <displayName>CR2</displayName>
12570 
          <description>Control register 2</description>
12571 
          <addressOffset>0x10</addressOffset>
12572 
          <size>0x20</size>
12573 
          <access>read-write</access>
12574 
          <resetValue>0x0000</resetValue>
12575 
          <fields>
12576 
            <field>
12577 
              <name>LINEN</name>
12578 
              <description>LIN mode enable</description>
12579 
              <bitOffset>14</bitOffset>
12580 
              <bitWidth>1</bitWidth>
12581 
            </field>
12582 
            <field>
12583 
              <name>STOP</name>
12584 
              <description>STOP bits</description>
12585 
              <bitOffset>12</bitOffset>
12586 
              <bitWidth>2</bitWidth>
12587 
            </field>
12588 
            <field>
12589 
              <name>CLKEN</name>
12590 
              <description>Clock enable</description>
12591 
              <bitOffset>11</bitOffset>
12592 
              <bitWidth>1</bitWidth>
12593 
            </field>
12594 
            <field>
12595 
              <name>CPOL</name>
12596 
              <description>Clock polarity</description>
12597 
              <bitOffset>10</bitOffset>
12598 
              <bitWidth>1</bitWidth>
12599 
            </field>
12600 
            <field>
12601 
              <name>CPHA</name>
12602 
              <description>Clock phase</description>
12603 
              <bitOffset>9</bitOffset>
12604 
              <bitWidth>1</bitWidth>
12605 
            </field>
12606 
            <field>
12607 
              <name>LBCL</name>
12608 
              <description>Last bit clock pulse</description>
12609 
              <bitOffset>8</bitOffset>
12610 
              <bitWidth>1</bitWidth>
12611 
            </field>
12612 
            <field>
12613 
              <name>LBDIE</name>
12614 
              <description>LIN break detection interrupt
12615 
              enable</description>
12616 
              <bitOffset>6</bitOffset>
12617 
              <bitWidth>1</bitWidth>
12618 
            </field>
12619 
            <field>
12620 
              <name>LBDL</name>
12621 
              <description>lin break detection length</description>
12622 
              <bitOffset>5</bitOffset>
12623 
              <bitWidth>1</bitWidth>
12624 
            </field>
12625 
            <field>
12626 
              <name>ADD</name>
12627 
              <description>Address of the USART node</description>
12628 
              <bitOffset>0</bitOffset>
12629 
              <bitWidth>4</bitWidth>
12630 
            </field>
12631 
          </fields>
12632 
        </register>
12633 
        <register>
12634 
          <name>CR3</name>
12635 
          <displayName>CR3</displayName>
12636 
          <description>Control register 3</description>
12637 
          <addressOffset>0x14</addressOffset>
12638 
          <size>0x20</size>
12639 
          <access>read-write</access>
12640 
          <resetValue>0x0000</resetValue>
12641 
          <fields>
12642 
            <field>
12643 
              <name>CTSIE</name>
12644 
              <description>CTS interrupt enable</description>
12645 
              <bitOffset>10</bitOffset>
12646 
              <bitWidth>1</bitWidth>
12647 
            </field>
12648 
            <field>
12649 
              <name>CTSE</name>
12650 
              <description>CTS enable</description>
12651 
              <bitOffset>9</bitOffset>
12652 
              <bitWidth>1</bitWidth>
12653 
            </field>
12654 
            <field>
12655 
              <name>RTSE</name>
12656 
              <description>RTS enable</description>
12657 
              <bitOffset>8</bitOffset>
12658 
              <bitWidth>1</bitWidth>
12659 
            </field>
12660 
            <field>
12661 
              <name>DMAT</name>
12662 
              <description>DMA enable transmitter</description>
12663 
              <bitOffset>7</bitOffset>
12664 
              <bitWidth>1</bitWidth>
12665 
            </field>
12666 
            <field>
12667 
              <name>DMAR</name>
12668 
              <description>DMA enable receiver</description>
12669 
              <bitOffset>6</bitOffset>
12670 
              <bitWidth>1</bitWidth>
12671 
            </field>
12672 
            <field>
12673 
              <name>SCEN</name>
12674 
              <description>Smartcard mode enable</description>
12675 
              <bitOffset>5</bitOffset>
12676 
              <bitWidth>1</bitWidth>
12677 
            </field>
12678 
            <field>
12679 
              <name>NACK</name>
12680 
              <description>Smartcard NACK enable</description>
12681 
              <bitOffset>4</bitOffset>
12682 
              <bitWidth>1</bitWidth>
12683 
            </field>
12684 
            <field>
12685 
              <name>HDSEL</name>
12686 
              <description>Half-duplex selection</description>
12687 
              <bitOffset>3</bitOffset>
12688 
              <bitWidth>1</bitWidth>
12689 
            </field>
12690 
            <field>
12691 
              <name>IRLP</name>
12692 
              <description>IrDA low-power</description>
12693 
              <bitOffset>2</bitOffset>
12694 
              <bitWidth>1</bitWidth>
12695 
            </field>
12696 
            <field>
12697 
              <name>IREN</name>
12698 
              <description>IrDA mode enable</description>
12699 
              <bitOffset>1</bitOffset>
12700 
              <bitWidth>1</bitWidth>
12701 
            </field>
12702 
            <field>
12703 
              <name>EIE</name>
12704 
              <description>Error interrupt enable</description>
12705 
              <bitOffset>0</bitOffset>
12706 
              <bitWidth>1</bitWidth>
12707 
            </field>
12708 
          </fields>
12709 
        </register>
12710 
        <register>
12711 
          <name>GTPR</name>
12712 
          <displayName>GTPR</displayName>
12713 
          <description>Guard time and prescaler
12714 
          register</description>
12715 
          <addressOffset>0x18</addressOffset>
12716 
          <size>0x20</size>
12717 
          <access>read-write</access>
12718 
          <resetValue>0x0000</resetValue>
12719 
          <fields>
12720 
            <field>
12721 
              <name>GT</name>
12722 
              <description>Guard time value</description>
12723 
              <bitOffset>8</bitOffset>
12724 
              <bitWidth>8</bitWidth>
12725 
            </field>
12726 
            <field>
12727 
              <name>PSC</name>
12728 
              <description>Prescaler value</description>
12729 
              <bitOffset>0</bitOffset>
12730 
              <bitWidth>8</bitWidth>
12731 
            </field>
12732 
          </fields>
12733 
        </register>
12734 
      </registers>
12735 
    </peripheral>
12736 
    <peripheral derivedFrom="USART1">
12737 
      <name>USART2</name>
12738 
      <baseAddress>0x40004400</baseAddress>
12739 
      <interrupt>
12740 
        <name>USART2</name>
12741 
        <description>USART2 global interrupt</description>
12742 
        <value>38</value>
12743 
      </interrupt>
12744 
    </peripheral>
12745 
    <peripheral derivedFrom="USART1">
12746 
      <name>USART3</name>
12747 
      <baseAddress>0x40004800</baseAddress>
12748 
      <interrupt>
12749 
        <name>USART3</name>
12750 
        <description>USART3 global interrupt</description>
12751 
        <value>39</value>
12752 
      </interrupt>
12753 
    </peripheral>
12754 
    <peripheral>
12755 
      <name>ADC1</name>
12756 
      <description>Analog to digital converter</description>
12757 
      <groupName>ADC</groupName>
12758 
      <baseAddress>0x40012400</baseAddress>
12759 
      <addressBlock>
12760 
        <offset>0x0</offset>
12761 
        <size>0x400</size>
12762 
        <usage>registers</usage>
12763 
      </addressBlock>
12764 
      <interrupt>
12765 
        <name>ADC</name>
12766 
        <description>ADC1 global interrupt</description>
12767 
        <value>18</value>
12768 
      </interrupt>
12769 
      <registers>
12770 
        <register>
12771 
          <name>SR</name>
12772 
          <displayName>SR</displayName>
12773 
          <description>status register</description>
12774 
          <addressOffset>0x0</addressOffset>
12775 
          <size>0x20</size>
12776 
          <access>read-write</access>
12777 
          <resetValue>0x00000000</resetValue>
12778 
          <fields>
12779 
            <field>
12780 
              <name>STRT</name>
12781 
              <description>Regular channel start flag</description>
12782 
              <bitOffset>4</bitOffset>
12783 
              <bitWidth>1</bitWidth>
12784 
            </field>
12785 
            <field>
12786 
              <name>JSTRT</name>
12787 
              <description>Injected channel start
12788 
              flag</description>
12789 
              <bitOffset>3</bitOffset>
12790 
              <bitWidth>1</bitWidth>
12791 
            </field>
12792 
            <field>
12793 
              <name>JEOC</name>
12794 
              <description>Injected channel end of
12795 
              conversion</description>
12796 
              <bitOffset>2</bitOffset>
12797 
              <bitWidth>1</bitWidth>
12798 
            </field>
12799 
            <field>
12800 
              <name>EOC</name>
12801 
              <description>Regular channel end of
12802 
              conversion</description>
12803 
              <bitOffset>1</bitOffset>
12804 
              <bitWidth>1</bitWidth>
12805 
            </field>
12806 
            <field>
12807 
              <name>AWD</name>
12808 
              <description>Analog watchdog flag</description>
12809 
              <bitOffset>0</bitOffset>
12810 
              <bitWidth>1</bitWidth>
12811 
            </field>
12812 
          </fields>
12813 
        </register>
12814 
        <register>
12815 
          <name>CR1</name>
12816 
          <displayName>CR1</displayName>
12817 
          <description>control register 1</description>
12818 
          <addressOffset>0x4</addressOffset>
12819 
          <size>0x20</size>
12820 
          <access>read-write</access>
12821 
          <resetValue>0x00000000</resetValue>
12822 
          <fields>
12823 
            <field>
12824 
              <name>AWDEN</name>
12825 
              <description>Analog watchdog enable on regular
12826 
              channels</description>
12827 
              <bitOffset>23</bitOffset>
12828 
              <bitWidth>1</bitWidth>
12829 
            </field>
12830 
            <field>
12831 
              <name>JAWDEN</name>
12832 
              <description>Analog watchdog enable on injected
12833 
              channels</description>
12834 
              <bitOffset>22</bitOffset>
12835 
              <bitWidth>1</bitWidth>
12836 
            </field>
12837 
            <field>
12838 
              <name>DUALMOD</name>
12839 
              <description>Dual mode selection</description>
12840 
              <bitOffset>16</bitOffset>
12841 
              <bitWidth>4</bitWidth>
12842 
            </field>
12843 
            <field>
12844 
              <name>DISCNUM</name>
12845 
              <description>Discontinuous mode channel
12846 
              count</description>
12847 
              <bitOffset>13</bitOffset>
12848 
              <bitWidth>3</bitWidth>
12849 
            </field>
12850 
            <field>
12851 
              <name>JDISCEN</name>
12852 
              <description>Discontinuous mode on injected
12853 
              channels</description>
12854 
              <bitOffset>12</bitOffset>
12855 
              <bitWidth>1</bitWidth>
12856 
            </field>
12857 
            <field>
12858 
              <name>DISCEN</name>
12859 
              <description>Discontinuous mode on regular
12860 
              channels</description>
12861 
              <bitOffset>11</bitOffset>
12862 
              <bitWidth>1</bitWidth>
12863 
            </field>
12864 
            <field>
12865 
              <name>JAUTO</name>
12866 
              <description>Automatic injected group
12867 
              conversion</description>
12868 
              <bitOffset>10</bitOffset>
12869 
              <bitWidth>1</bitWidth>
12870 
            </field>
12871 
            <field>
12872 
              <name>AWDSGL</name>
12873 
              <description>Enable the watchdog on a single channel
12874 
              in scan mode</description>
12875 
              <bitOffset>9</bitOffset>
12876 
              <bitWidth>1</bitWidth>
12877 
            </field>
12878 
            <field>
12879 
              <name>SCAN</name>
12880 
              <description>Scan mode</description>
12881 
              <bitOffset>8</bitOffset>
12882 
              <bitWidth>1</bitWidth>
12883 
            </field>
12884 
            <field>
12885 
              <name>JEOCIE</name>
12886 
              <description>Interrupt enable for injected
12887 
              channels</description>
12888 
              <bitOffset>7</bitOffset>
12889 
              <bitWidth>1</bitWidth>
12890 
            </field>
12891 
            <field>
12892 
              <name>AWDIE</name>
12893 
              <description>Analog watchdog interrupt
12894 
              enable</description>
12895 
              <bitOffset>6</bitOffset>
12896 
              <bitWidth>1</bitWidth>
12897 
            </field>
12898 
            <field>
12899 
              <name>EOCIE</name>
12900 
              <description>Interrupt enable for EOC</description>
12901 
              <bitOffset>5</bitOffset>
12902 
              <bitWidth>1</bitWidth>
12903 
            </field>
12904 
            <field>
12905 
              <name>AWDCH</name>
12906 
              <description>Analog watchdog channel select
12907 
              bits</description>
12908 
              <bitOffset>0</bitOffset>
12909 
              <bitWidth>5</bitWidth>
12910 
            </field>
12911 
          </fields>
12912 
        </register>
12913 
        <register>
12914 
          <name>CR2</name>
12915 
          <displayName>CR2</displayName>
12916 
          <description>control register 2</description>
12917 
          <addressOffset>0x8</addressOffset>
12918 
          <size>0x20</size>
12919 
          <access>read-write</access>
12920 
          <resetValue>0x00000000</resetValue>
12921 
          <fields>
12922 
            <field>
12923 
              <name>TSVREFE</name>
12924 
              <description>Temperature sensor and VREFINT
12925 
              enable</description>
12926 
              <bitOffset>23</bitOffset>
12927 
              <bitWidth>1</bitWidth>
12928 
            </field>
12929 
            <field>
12930 
              <name>SWSTART</name>
12931 
              <description>Start conversion of regular
12932 
              channels</description>
12933 
              <bitOffset>22</bitOffset>
12934 
              <bitWidth>1</bitWidth>
12935 
            </field>
12936 
            <field>
12937 
              <name>JSWSTART</name>
12938 
              <description>Start conversion of injected
12939 
              channels</description>
12940 
              <bitOffset>21</bitOffset>
12941 
              <bitWidth>1</bitWidth>
12942 
            </field>
12943 
            <field>
12944 
              <name>EXTTRIG</name>
12945 
              <description>External trigger conversion mode for
12946 
              regular channels</description>
12947 
              <bitOffset>20</bitOffset>
12948 
              <bitWidth>1</bitWidth>
12949 
            </field>
12950 
            <field>
12951 
              <name>EXTSEL</name>
12952 
              <description>External event select for regular
12953 
              group</description>
12954 
              <bitOffset>17</bitOffset>
12955 
              <bitWidth>3</bitWidth>
12956 
            </field>
12957 
            <field>
12958 
              <name>JEXTTRIG</name>
12959 
              <description>External trigger conversion mode for
12960 
              injected channels</description>
12961 
              <bitOffset>15</bitOffset>
12962 
              <bitWidth>1</bitWidth>
12963 
            </field>
12964 
            <field>
12965 
              <name>JEXTSEL</name>
12966 
              <description>External event select for injected
12967 
              group</description>
12968 
              <bitOffset>12</bitOffset>
12969 
              <bitWidth>3</bitWidth>
12970 
            </field>
12971 
            <field>
12972 
              <name>ALIGN</name>
12973 
              <description>Data alignment</description>
12974 
              <bitOffset>11</bitOffset>
12975 
              <bitWidth>1</bitWidth>
12976 
            </field>
12977 
            <field>
12978 
              <name>DMA</name>
12979 
              <description>Direct memory access mode</description>
12980 
              <bitOffset>8</bitOffset>
12981 
              <bitWidth>1</bitWidth>
12982 
            </field>
12983 
            <field>
12984 
              <name>RSTCAL</name>
12985 
              <description>Reset calibration</description>
12986 
              <bitOffset>3</bitOffset>
12987 
              <bitWidth>1</bitWidth>
12988 
            </field>
12989 
            <field>
12990 
              <name>CAL</name>
12991 
              <description>A/D calibration</description>
12992 
              <bitOffset>2</bitOffset>
12993 
              <bitWidth>1</bitWidth>
12994 
            </field>
12995 
            <field>
12996 
              <name>CONT</name>
12997 
              <description>Continuous conversion</description>
12998 
              <bitOffset>1</bitOffset>
12999 
              <bitWidth>1</bitWidth>
13000 
            </field>
13001 
            <field>
13002 
              <name>ADON</name>
13003 
              <description>A/D converter ON / OFF</description>
13004 
              <bitOffset>0</bitOffset>
13005 
              <bitWidth>1</bitWidth>
13006 
            </field>
13007 
          </fields>
13008 
        </register>
13009 
        <register>
13010 
          <name>SMPR1</name>
13011 
          <displayName>SMPR1</displayName>
13012 
          <description>sample time register 1</description>
13013 
          <addressOffset>0xC</addressOffset>
13014 
          <size>0x20</size>
13015 
          <access>read-write</access>
13016 
          <resetValue>0x00000000</resetValue>
13017 
          <fields>
13018 
            <field>
13019 
              <name>SMP10</name>
13020 
              <description>Channel 10 sample time
13021 
              selection</description>
13022 
              <bitOffset>0</bitOffset>
13023 
              <bitWidth>3</bitWidth>
13024 
            </field>
13025 
            <field>
13026 
              <name>SMP11</name>
13027 
              <description>Channel 11 sample time
13028 
              selection</description>
13029 
              <bitOffset>3</bitOffset>
13030 
              <bitWidth>3</bitWidth>
13031 
            </field>
13032 
            <field>
13033 
              <name>SMP12</name>
13034 
              <description>Channel 12 sample time
13035 
              selection</description>
13036 
              <bitOffset>6</bitOffset>
13037 
              <bitWidth>3</bitWidth>
13038 
            </field>
13039 
            <field>
13040 
              <name>SMP13</name>
13041 
              <description>Channel 13 sample time
13042 
              selection</description>
13043 
              <bitOffset>9</bitOffset>
13044 
              <bitWidth>3</bitWidth>
13045 
            </field>
13046 
            <field>
13047 
              <name>SMP14</name>
13048 
              <description>Channel 14 sample time
13049 
              selection</description>
13050 
              <bitOffset>12</bitOffset>
13051 
              <bitWidth>3</bitWidth>
13052 
            </field>
13053 
            <field>
13054 
              <name>SMP15</name>
13055 
              <description>Channel 15 sample time
13056 
              selection</description>
13057 
              <bitOffset>15</bitOffset>
13058 
              <bitWidth>3</bitWidth>
13059 
            </field>
13060 
            <field>
13061 
              <name>SMP16</name>
13062 
              <description>Channel 16 sample time
13063 
              selection</description>
13064 
              <bitOffset>18</bitOffset>
13065 
              <bitWidth>3</bitWidth>
13066 
            </field>
13067 
            <field>
13068 
              <name>SMP17</name>
13069 
              <description>Channel 17 sample time
13070 
              selection</description>
13071 
              <bitOffset>21</bitOffset>
13072 
              <bitWidth>3</bitWidth>
13073 
            </field>
13074 
          </fields>
13075 
        </register>
13076 
        <register>
13077 
          <name>SMPR2</name>
13078 
          <displayName>SMPR2</displayName>
13079 
          <description>sample time register 2</description>
13080 
          <addressOffset>0x10</addressOffset>
13081 
          <size>0x20</size>
13082 
          <access>read-write</access>
13083 
          <resetValue>0x00000000</resetValue>
13084 
          <fields>
13085 
            <field>
13086 
              <name>SMP0</name>
13087 
              <description>Channel 0 sample time
13088 
              selection</description>
13089 
              <bitOffset>0</bitOffset>
13090 
              <bitWidth>3</bitWidth>
13091 
            </field>
13092 
            <field>
13093 
              <name>SMP1</name>
13094 
              <description>Channel 1 sample time
13095 
              selection</description>
13096 
              <bitOffset>3</bitOffset>
13097 
              <bitWidth>3</bitWidth>
13098 
            </field>
13099 
            <field>
13100 
              <name>SMP2</name>
13101 
              <description>Channel 2 sample time
13102 
              selection</description>
13103 
              <bitOffset>6</bitOffset>
13104 
              <bitWidth>3</bitWidth>
13105 
            </field>
13106 
            <field>
13107 
              <name>SMP3</name>
13108 
              <description>Channel 3 sample time
13109 
              selection</description>
13110 
              <bitOffset>9</bitOffset>
13111 
              <bitWidth>3</bitWidth>
13112 
            </field>
13113 
            <field>
13114 
              <name>SMP4</name>
13115 
              <description>Channel 4 sample time
13116 
              selection</description>
13117 
              <bitOffset>12</bitOffset>
13118 
              <bitWidth>3</bitWidth>
13119 
            </field>
13120 
            <field>
13121 
              <name>SMP5</name>
13122 
              <description>Channel 5 sample time
13123 
              selection</description>
13124 
              <bitOffset>15</bitOffset>
13125 
              <bitWidth>3</bitWidth>
13126 
            </field>
13127 
            <field>
13128 
              <name>SMP6</name>
13129 
              <description>Channel 6 sample time
13130 
              selection</description>
13131 
              <bitOffset>18</bitOffset>
13132 
              <bitWidth>3</bitWidth>
13133 
            </field>
13134 
            <field>
13135 
              <name>SMP7</name>
13136 
              <description>Channel 7 sample time
13137 
              selection</description>
13138 
              <bitOffset>21</bitOffset>
13139 
              <bitWidth>3</bitWidth>
13140 
            </field>
13141 
            <field>
13142 
              <name>SMP8</name>
13143 
              <description>Channel 8 sample time
13144 
              selection</description>
13145 
              <bitOffset>24</bitOffset>
13146 
              <bitWidth>3</bitWidth>
13147 
            </field>
13148 
            <field>
13149 
              <name>SMP9</name>
13150 
              <description>Channel 9 sample time
13151 
              selection</description>
13152 
              <bitOffset>27</bitOffset>
13153 
              <bitWidth>3</bitWidth>
13154 
            </field>
13155 
          </fields>
13156 
        </register>
13157 
        <register>
13158 
          <name>JOFR1</name>
13159 
          <displayName>JOFR1</displayName>
13160 
          <description>injected channel data offset register
13161 
          x</description>
13162 
          <addressOffset>0x14</addressOffset>
13163 
          <size>0x20</size>
13164 
          <access>read-write</access>
13165 
          <resetValue>0x00000000</resetValue>
13166 
          <fields>
13167 
            <field>
13168 
              <name>JOFFSET1</name>
13169 
              <description>Data offset for injected channel
13170 
              x</description>
13171 
              <bitOffset>0</bitOffset>
13172 
              <bitWidth>12</bitWidth>
13173 
            </field>
13174 
          </fields>
13175 
        </register>
13176 
        <register>
13177 
          <name>JOFR2</name>
13178 
          <displayName>JOFR2</displayName>
13179 
          <description>injected channel data offset register
13180 
          x</description>
13181 
          <addressOffset>0x18</addressOffset>
13182 
          <size>0x20</size>
13183 
          <access>read-write</access>
13184 
          <resetValue>0x00000000</resetValue>
13185 
          <fields>
13186 
            <field>
13187 
              <name>JOFFSET2</name>
13188 
              <description>Data offset for injected channel
13189 
              x</description>
13190 
              <bitOffset>0</bitOffset>
13191 
              <bitWidth>12</bitWidth>
13192 
            </field>
13193 
          </fields>
13194 
        </register>
13195 
        <register>
13196 
          <name>JOFR3</name>
13197 
          <displayName>JOFR3</displayName>
13198 
          <description>injected channel data offset register
13199 
          x</description>
13200 
          <addressOffset>0x1C</addressOffset>
13201 
          <size>0x20</size>
13202 
          <access>read-write</access>
13203 
          <resetValue>0x00000000</resetValue>
13204 
          <fields>
13205 
            <field>
13206 
              <name>JOFFSET3</name>
13207 
              <description>Data offset for injected channel
13208 
              x</description>
13209 
              <bitOffset>0</bitOffset>
13210 
              <bitWidth>12</bitWidth>
13211 
            </field>
13212 
          </fields>
13213 
        </register>
13214 
        <register>
13215 
          <name>JOFR4</name>
13216 
          <displayName>JOFR4</displayName>
13217 
          <description>injected channel data offset register
13218 
          x</description>
13219 
          <addressOffset>0x20</addressOffset>
13220 
          <size>0x20</size>
13221 
          <access>read-write</access>
13222 
          <resetValue>0x00000000</resetValue>
13223 
          <fields>
13224 
            <field>
13225 
              <name>JOFFSET4</name>
13226 
              <description>Data offset for injected channel
13227 
              x</description>
13228 
              <bitOffset>0</bitOffset>
13229 
              <bitWidth>12</bitWidth>
13230 
            </field>
13231 
          </fields>
13232 
        </register>
13233 
        <register>
13234 
          <name>HTR</name>
13235 
          <displayName>HTR</displayName>
13236 
          <description>watchdog higher threshold
13237 
          register</description>
13238 
          <addressOffset>0x24</addressOffset>
13239 
          <size>0x20</size>
13240 
          <access>read-write</access>
13241 
          <resetValue>0x00000FFF</resetValue>
13242 
          <fields>
13243 
            <field>
13244 
              <name>HT</name>
13245 
              <description>Analog watchdog higher
13246 
              threshold</description>
13247 
              <bitOffset>0</bitOffset>
13248 
              <bitWidth>12</bitWidth>
13249 
            </field>
13250 
          </fields>
13251 
        </register>
13252 
        <register>
13253 
          <name>LTR</name>
13254 
          <displayName>LTR</displayName>
13255 
          <description>watchdog lower threshold
13256 
          register</description>
13257 
          <addressOffset>0x28</addressOffset>
13258 
          <size>0x20</size>
13259 
          <access>read-write</access>
13260 
          <resetValue>0x00000000</resetValue>
13261 
          <fields>
13262 
            <field>
13263 
              <name>LT</name>
13264 
              <description>Analog watchdog lower
13265 
              threshold</description>
13266 
              <bitOffset>0</bitOffset>
13267 
              <bitWidth>12</bitWidth>
13268 
            </field>
13269 
          </fields>
13270 
        </register>
13271 
        <register>
13272 
          <name>SQR1</name>
13273 
          <displayName>SQR1</displayName>
13274 
          <description>regular sequence register 1</description>
13275 
          <addressOffset>0x2C</addressOffset>
13276 
          <size>0x20</size>
13277 
          <access>read-write</access>
13278 
          <resetValue>0x00000000</resetValue>
13279 
          <fields>
13280 
            <field>
13281 
              <name>L</name>
13282 
              <description>Regular channel sequence
13283 
              length</description>
13284 
              <bitOffset>20</bitOffset>
13285 
              <bitWidth>4</bitWidth>
13286 
            </field>
13287 
            <field>
13288 
              <name>SQ16</name>
13289 
              <description>16th conversion in regular
13290 
              sequence</description>
13291 
              <bitOffset>15</bitOffset>
13292 
              <bitWidth>5</bitWidth>
13293 
            </field>
13294 
            <field>
13295 
              <name>SQ15</name>
13296 
              <description>15th conversion in regular
13297 
              sequence</description>
13298 
              <bitOffset>10</bitOffset>
13299 
              <bitWidth>5</bitWidth>
13300 
            </field>
13301 
            <field>
13302 
              <name>SQ14</name>
13303 
              <description>14th conversion in regular
13304 
              sequence</description>
13305 
              <bitOffset>5</bitOffset>
13306 
              <bitWidth>5</bitWidth>
13307 
            </field>
13308 
            <field>
13309 
              <name>SQ13</name>
13310 
              <description>13th conversion in regular
13311 
              sequence</description>
13312 
              <bitOffset>0</bitOffset>
13313 
              <bitWidth>5</bitWidth>
13314 
            </field>
13315 
          </fields>
13316 
        </register>
13317 
        <register>
13318 
          <name>SQR2</name>
13319 
          <displayName>SQR2</displayName>
13320 
          <description>regular sequence register 2</description>
13321 
          <addressOffset>0x30</addressOffset>
13322 
          <size>0x20</size>
13323 
          <access>read-write</access>
13324 
          <resetValue>0x00000000</resetValue>
13325 
          <fields>
13326 
            <field>
13327 
              <name>SQ12</name>
13328 
              <description>12th conversion in regular
13329 
              sequence</description>
13330 
              <bitOffset>25</bitOffset>
13331 
              <bitWidth>5</bitWidth>
13332 
            </field>
13333 
            <field>
13334 
              <name>SQ11</name>
13335 
              <description>11th conversion in regular
13336 
              sequence</description>
13337 
              <bitOffset>20</bitOffset>
13338 
              <bitWidth>5</bitWidth>
13339 
            </field>
13340 
            <field>
13341 
              <name>SQ10</name>
13342 
              <description>10th conversion in regular
13343 
              sequence</description>
13344 
              <bitOffset>15</bitOffset>
13345 
              <bitWidth>5</bitWidth>
13346 
            </field>
13347 
            <field>
13348 
              <name>SQ9</name>
13349 
              <description>9th conversion in regular
13350 
              sequence</description>
13351 
              <bitOffset>10</bitOffset>
13352 
              <bitWidth>5</bitWidth>
13353 
            </field>
13354 
            <field>
13355 
              <name>SQ8</name>
13356 
              <description>8th conversion in regular
13357 
              sequence</description>
13358 
              <bitOffset>5</bitOffset>
13359 
              <bitWidth>5</bitWidth>
13360 
            </field>
13361 
            <field>
13362 
              <name>SQ7</name>
13363 
              <description>7th conversion in regular
13364 
              sequence</description>
13365 
              <bitOffset>0</bitOffset>
13366 
              <bitWidth>5</bitWidth>
13367 
            </field>
13368 
          </fields>
13369 
        </register>
13370 
        <register>
13371 
          <name>SQR3</name>
13372 
          <displayName>SQR3</displayName>
13373 
          <description>regular sequence register 3</description>
13374 
          <addressOffset>0x34</addressOffset>
13375 
          <size>0x20</size>
13376 
          <access>read-write</access>
13377 
          <resetValue>0x00000000</resetValue>
13378 
          <fields>
13379 
            <field>
13380 
              <name>SQ6</name>
13381 
              <description>6th conversion in regular
13382 
              sequence</description>
13383 
              <bitOffset>25</bitOffset>
13384 
              <bitWidth>5</bitWidth>
13385 
            </field>
13386 
            <field>
13387 
              <name>SQ5</name>
13388 
              <description>5th conversion in regular
13389 
              sequence</description>
13390 
              <bitOffset>20</bitOffset>
13391 
              <bitWidth>5</bitWidth>
13392 
            </field>
13393 
            <field>
13394 
              <name>SQ4</name>
13395 
              <description>4th conversion in regular
13396 
              sequence</description>
13397 
              <bitOffset>15</bitOffset>
13398 
              <bitWidth>5</bitWidth>
13399 
            </field>
13400 
            <field>
13401 
              <name>SQ3</name>
13402 
              <description>3rd conversion in regular
13403 
              sequence</description>
13404 
              <bitOffset>10</bitOffset>
13405 
              <bitWidth>5</bitWidth>
13406 
            </field>
13407 
            <field>
13408 
              <name>SQ2</name>
13409 
              <description>2nd conversion in regular
13410 
              sequence</description>
13411 
              <bitOffset>5</bitOffset>
13412 
              <bitWidth>5</bitWidth>
13413 
            </field>
13414 
            <field>
13415 
              <name>SQ1</name>
13416 
              <description>1st conversion in regular
13417 
              sequence</description>
13418 
              <bitOffset>0</bitOffset>
13419 
              <bitWidth>5</bitWidth>
13420 
            </field>
13421 
          </fields>
13422 
        </register>
13423 
        <register>
13424 
          <name>JSQR</name>
13425 
          <displayName>JSQR</displayName>
13426 
          <description>injected sequence register</description>
13427 
          <addressOffset>0x38</addressOffset>
13428 
          <size>0x20</size>
13429 
          <access>read-write</access>
13430 
          <resetValue>0x00000000</resetValue>
13431 
          <fields>
13432 
            <field>
13433 
              <name>JL</name>
13434 
              <description>Injected sequence length</description>
13435 
              <bitOffset>20</bitOffset>
13436 
              <bitWidth>2</bitWidth>
13437 
            </field>
13438 
            <field>
13439 
              <name>JSQ4</name>
13440 
              <description>4th conversion in injected
13441 
              sequence</description>
13442 
              <bitOffset>15</bitOffset>
13443 
              <bitWidth>5</bitWidth>
13444 
            </field>
13445 
            <field>
13446 
              <name>JSQ3</name>
13447 
              <description>3rd conversion in injected
13448 
              sequence</description>
13449 
              <bitOffset>10</bitOffset>
13450 
              <bitWidth>5</bitWidth>
13451 
            </field>
13452 
            <field>
13453 
              <name>JSQ2</name>
13454 
              <description>2nd conversion in injected
13455 
              sequence</description>
13456 
              <bitOffset>5</bitOffset>
13457 
              <bitWidth>5</bitWidth>
13458 
            </field>
13459 
            <field>
13460 
              <name>JSQ1</name>
13461 
              <description>1st conversion in injected
13462 
              sequence</description>
13463 
              <bitOffset>0</bitOffset>
13464 
              <bitWidth>5</bitWidth>
13465 
            </field>
13466 
          </fields>
13467 
        </register>
13468 
        <register>
13469 
          <name>JDR1</name>
13470 
          <displayName>JDR1</displayName>
13471 
          <description>injected data register x</description>
13472 
          <addressOffset>0x3C</addressOffset>
13473 
          <size>0x20</size>
13474 
          <access>read-only</access>
13475 
          <resetValue>0x00000000</resetValue>
13476 
          <fields>
13477 
            <field>
13478 
              <name>JDATA</name>
13479 
              <description>Injected data</description>
13480 
              <bitOffset>0</bitOffset>
13481 
              <bitWidth>16</bitWidth>
13482 
            </field>
13483 
          </fields>
13484 
        </register>
13485 
        <register>
13486 
          <name>JDR2</name>
13487 
          <displayName>JDR2</displayName>
13488 
          <description>injected data register x</description>
13489 
          <addressOffset>0x40</addressOffset>
13490 
          <size>0x20</size>
13491 
          <access>read-only</access>
13492 
          <resetValue>0x00000000</resetValue>
13493 
          <fields>
13494 
            <field>
13495 
              <name>JDATA</name>
13496 
              <description>Injected data</description>
13497 
              <bitOffset>0</bitOffset>
13498 
              <bitWidth>16</bitWidth>
13499 
            </field>
13500 
          </fields>
13501 
        </register>
13502 
        <register>
13503 
          <name>JDR3</name>
13504 
          <displayName>JDR3</displayName>
13505 
          <description>injected data register x</description>
13506 
          <addressOffset>0x44</addressOffset>
13507 
          <size>0x20</size>
13508 
          <access>read-only</access>
13509 
          <resetValue>0x00000000</resetValue>
13510 
          <fields>
13511 
            <field>
13512 
              <name>JDATA</name>
13513 
              <description>Injected data</description>
13514 
              <bitOffset>0</bitOffset>
13515 
              <bitWidth>16</bitWidth>
13516 
            </field>
13517 
          </fields>
13518 
        </register>
13519 
        <register>
13520 
          <name>JDR4</name>
13521 
          <displayName>JDR4</displayName>
13522 
          <description>injected data register x</description>
13523 
          <addressOffset>0x48</addressOffset>
13524 
          <size>0x20</size>
13525 
          <access>read-only</access>
13526 
          <resetValue>0x00000000</resetValue>
13527 
          <fields>
13528 
            <field>
13529 
              <name>JDATA</name>
13530 
              <description>Injected data</description>
13531 
              <bitOffset>0</bitOffset>
13532 
              <bitWidth>16</bitWidth>
13533 
            </field>
13534 
          </fields>
13535 
        </register>
13536 
        <register>
13537 
          <name>DR</name>
13538 
          <displayName>DR</displayName>
13539 
          <description>regular data register</description>
13540 
          <addressOffset>0x4C</addressOffset>
13541 
          <size>0x20</size>
13542 
          <access>read-only</access>
13543 
          <resetValue>0x00000000</resetValue>
13544 
          <fields>
13545 
            <field>
13546 
              <name>DATA</name>
13547 
              <description>Regular data</description>
13548 
              <bitOffset>0</bitOffset>
13549 
              <bitWidth>16</bitWidth>
13550 
            </field>
13551 
            <field>
13552 
              <name>ADC2DATA</name>
13553 
              <description>ADC2 data</description>
13554 
              <bitOffset>16</bitOffset>
13555 
              <bitWidth>16</bitWidth>
13556 
            </field>
13557 
          </fields>
13558 
        </register>
13559 
      </registers>
13560 
    </peripheral>
13561 
    <peripheral>
13562 
      <name>ADC2</name>
13563 
      <description>Analog to digital converter</description>
13564 
      <groupName>ADC</groupName>
13565 
      <baseAddress>0x40012800</baseAddress>
13566 
      <addressBlock>
13567 
        <offset>0x0</offset>
13568 
        <size>0x400</size>
13569 
        <usage>registers</usage>
13570 
      </addressBlock>
13571 
      <interrupt>
13572 
        <name>ADC</name>
13573 
        <description>ADC2 global interrupt</description>
13574 
        <value>18</value>
13575 
      </interrupt>
13576 
      <registers>
13577 
        <register>
13578 
          <name>SR</name>
13579 
          <displayName>SR</displayName>
13580 
          <description>status register</description>
13581 
          <addressOffset>0x0</addressOffset>
13582 
          <size>0x20</size>
13583 
          <access>read-write</access>
13584 
          <resetValue>0x00000000</resetValue>
13585 
          <fields>
13586 
            <field>
13587 
              <name>STRT</name>
13588 
              <description>Regular channel start flag</description>
13589 
              <bitOffset>4</bitOffset>
13590 
              <bitWidth>1</bitWidth>
13591 
            </field>
13592 
            <field>
13593 
              <name>JSTRT</name>
13594 
              <description>Injected channel start
13595 
              flag</description>
13596 
              <bitOffset>3</bitOffset>
13597 
              <bitWidth>1</bitWidth>
13598 
            </field>
13599 
            <field>
13600 
              <name>JEOC</name>
13601 
              <description>Injected channel end of
13602 
              conversion</description>
13603 
              <bitOffset>2</bitOffset>
13604 
              <bitWidth>1</bitWidth>
13605 
            </field>
13606 
            <field>
13607 
              <name>EOC</name>
13608 
              <description>Regular channel end of
13609 
              conversion</description>
13610 
              <bitOffset>1</bitOffset>
13611 
              <bitWidth>1</bitWidth>
13612 
            </field>
13613 
            <field>
13614 
              <name>AWD</name>
13615 
              <description>Analog watchdog flag</description>
13616 
              <bitOffset>0</bitOffset>
13617 
              <bitWidth>1</bitWidth>
13618 
            </field>
13619 
          </fields>
13620 
        </register>
13621 
        <register>
13622 
          <name>CR1</name>
13623 
          <displayName>CR1</displayName>
13624 
          <description>control register 1</description>
13625 
          <addressOffset>0x4</addressOffset>
13626 
          <size>0x20</size>
13627 
          <access>read-write</access>
13628 
          <resetValue>0x00000000</resetValue>
13629 
          <fields>
13630 
            <field>
13631 
              <name>AWDEN</name>
13632 
              <description>Analog watchdog enable on regular
13633 
              channels</description>
13634 
              <bitOffset>23</bitOffset>
13635 
              <bitWidth>1</bitWidth>
13636 
            </field>
13637 
            <field>
13638 
              <name>JAWDEN</name>
13639 
              <description>Analog watchdog enable on injected
13640 
              channels</description>
13641 
              <bitOffset>22</bitOffset>
13642 
              <bitWidth>1</bitWidth>
13643 
            </field>
13644 
            <field>
13645 
              <name>DISCNUM</name>
13646 
              <description>Discontinuous mode channel
13647 
              count</description>
13648 
              <bitOffset>13</bitOffset>
13649 
              <bitWidth>3</bitWidth>
13650 
            </field>
13651 
            <field>
13652 
              <name>JDISCEN</name>
13653 
              <description>Discontinuous mode on injected
13654 
              channels</description>
13655 
              <bitOffset>12</bitOffset>
13656 
              <bitWidth>1</bitWidth>
13657 
            </field>
13658 
            <field>
13659 
              <name>DISCEN</name>
13660 
              <description>Discontinuous mode on regular
13661 
              channels</description>
13662 
              <bitOffset>11</bitOffset>
13663 
              <bitWidth>1</bitWidth>
13664 
            </field>
13665 
            <field>
13666 
              <name>JAUTO</name>
13667 
              <description>Automatic injected group
13668 
              conversion</description>
13669 
              <bitOffset>10</bitOffset>
13670 
              <bitWidth>1</bitWidth>
13671 
            </field>
13672 
            <field>
13673 
              <name>AWDSGL</name>
13674 
              <description>Enable the watchdog on a single channel
13675 
              in scan mode</description>
13676 
              <bitOffset>9</bitOffset>
13677 
              <bitWidth>1</bitWidth>
13678 
            </field>
13679 
            <field>
13680 
              <name>SCAN</name>
13681 
              <description>Scan mode</description>
13682 
              <bitOffset>8</bitOffset>
13683 
              <bitWidth>1</bitWidth>
13684 
            </field>
13685 
            <field>
13686 
              <name>JEOCIE</name>
13687 
              <description>Interrupt enable for injected
13688 
              channels</description>
13689 
              <bitOffset>7</bitOffset>
13690 
              <bitWidth>1</bitWidth>
13691 
            </field>
13692 
            <field>
13693 
              <name>AWDIE</name>
13694 
              <description>Analog watchdog interrupt
13695 
              enable</description>
13696 
              <bitOffset>6</bitOffset>
13697 
              <bitWidth>1</bitWidth>
13698 
            </field>
13699 
            <field>
13700 
              <name>EOCIE</name>
13701 
              <description>Interrupt enable for EOC</description>
13702 
              <bitOffset>5</bitOffset>
13703 
              <bitWidth>1</bitWidth>
13704 
            </field>
13705 
            <field>
13706 
              <name>AWDCH</name>
13707 
              <description>Analog watchdog channel select
13708 
              bits</description>
13709 
              <bitOffset>0</bitOffset>
13710 
              <bitWidth>5</bitWidth>
13711 
            </field>
13712 
          </fields>
13713 
        </register>
13714 
        <register>
13715 
          <name>CR2</name>
13716 
          <displayName>CR2</displayName>
13717 
          <description>control register 2</description>
13718 
          <addressOffset>0x8</addressOffset>
13719 
          <size>0x20</size>
13720 
          <access>read-write</access>
13721 
          <resetValue>0x00000000</resetValue>
13722 
          <fields>
13723 
            <field>
13724 
              <name>TSVREFE</name>
13725 
              <description>Temperature sensor and VREFINT
13726 
              enable</description>
13727 
              <bitOffset>23</bitOffset>
13728 
              <bitWidth>1</bitWidth>
13729 
            </field>
13730 
            <field>
13731 
              <name>SWSTART</name>
13732 
              <description>Start conversion of regular
13733 
              channels</description>
13734 
              <bitOffset>22</bitOffset>
13735 
              <bitWidth>1</bitWidth>
13736 
            </field>
13737 
            <field>
13738 
              <name>JSWSTART</name>
13739 
              <description>Start conversion of injected
13740 
              channels</description>
13741 
              <bitOffset>21</bitOffset>
13742 
              <bitWidth>1</bitWidth>
13743 
            </field>
13744 
            <field>
13745 
              <name>EXTTRIG</name>
13746 
              <description>External trigger conversion mode for
13747 
              regular channels</description>
13748 
              <bitOffset>20</bitOffset>
13749 
              <bitWidth>1</bitWidth>
13750 
            </field>
13751 
            <field>
13752 
              <name>EXTSEL</name>
13753 
              <description>External event select for regular
13754 
              group</description>
13755 
              <bitOffset>17</bitOffset>
13756 
              <bitWidth>3</bitWidth>
13757 
            </field>
13758 
            <field>
13759 
              <name>JEXTTRIG</name>
13760 
              <description>External trigger conversion mode for
13761 
              injected channels</description>
13762 
              <bitOffset>15</bitOffset>
13763 
              <bitWidth>1</bitWidth>
13764 
            </field>
13765 
            <field>
13766 
              <name>JEXTSEL</name>
13767 
              <description>External event select for injected
13768 
              group</description>
13769 
              <bitOffset>12</bitOffset>
13770 
              <bitWidth>3</bitWidth>
13771 
            </field>
13772 
            <field>
13773 
              <name>ALIGN</name>
13774 
              <description>Data alignment</description>
13775 
              <bitOffset>11</bitOffset>
13776 
              <bitWidth>1</bitWidth>
13777 
            </field>
13778 
            <field>
13779 
              <name>DMA</name>
13780 
              <description>Direct memory access mode</description>
13781 
              <bitOffset>8</bitOffset>
13782 
              <bitWidth>1</bitWidth>
13783 
            </field>
13784 
            <field>
13785 
              <name>RSTCAL</name>
13786 
              <description>Reset calibration</description>
13787 
              <bitOffset>3</bitOffset>
13788 
              <bitWidth>1</bitWidth>
13789 
            </field>
13790 
            <field>
13791 
              <name>CAL</name>
13792 
              <description>A/D calibration</description>
13793 
              <bitOffset>2</bitOffset>
13794 
              <bitWidth>1</bitWidth>
13795 
            </field>
13796 
            <field>
13797 
              <name>CONT</name>
13798 
              <description>Continuous conversion</description>
13799 
              <bitOffset>1</bitOffset>
13800 
              <bitWidth>1</bitWidth>
13801 
            </field>
13802 
            <field>
13803 
              <name>ADON</name>
13804 
              <description>A/D converter ON / OFF</description>
13805 
              <bitOffset>0</bitOffset>
13806 
              <bitWidth>1</bitWidth>
13807 
            </field>
13808 
          </fields>
13809 
        </register>
13810 
        <register>
13811 
          <name>SMPR1</name>
13812 
          <displayName>SMPR1</displayName>
13813 
          <description>sample time register 1</description>
13814 
          <addressOffset>0xC</addressOffset>
13815 
          <size>0x20</size>
13816 
          <access>read-write</access>
13817 
          <resetValue>0x00000000</resetValue>
13818 
          <fields>
13819 
            <field>
13820 
              <name>SMP10</name>
13821 
              <description>Channel 10 sample time
13822 
              selection</description>
13823 
              <bitOffset>0</bitOffset>
13824 
              <bitWidth>3</bitWidth>
13825 
            </field>
13826 
            <field>
13827 
              <name>SMP11</name>
13828 
              <description>Channel 11 sample time
13829 
              selection</description>
13830 
              <bitOffset>3</bitOffset>
13831 
              <bitWidth>3</bitWidth>
13832 
            </field>
13833 
            <field>
13834 
              <name>SMP12</name>
13835 
              <description>Channel 12 sample time
13836 
              selection</description>
13837 
              <bitOffset>6</bitOffset>
13838 
              <bitWidth>3</bitWidth>
13839 
            </field>
13840 
            <field>
13841 
              <name>SMP13</name>
13842 
              <description>Channel 13 sample time
13843 
              selection</description>
13844 
              <bitOffset>9</bitOffset>
13845 
              <bitWidth>3</bitWidth>
13846 
            </field>
13847 
            <field>
13848 
              <name>SMP14</name>
13849 
              <description>Channel 14 sample time
13850 
              selection</description>
13851 
              <bitOffset>12</bitOffset>
13852 
              <bitWidth>3</bitWidth>
13853 
            </field>
13854 
            <field>
13855 
              <name>SMP15</name>
13856 
              <description>Channel 15 sample time
13857 
              selection</description>
13858 
              <bitOffset>15</bitOffset>
13859 
              <bitWidth>3</bitWidth>
13860 
            </field>
13861 
            <field>
13862 
              <name>SMP16</name>
13863 
              <description>Channel 16 sample time
13864 
              selection</description>
13865 
              <bitOffset>18</bitOffset>
13866 
              <bitWidth>3</bitWidth>
13867 
            </field>
13868 
            <field>
13869 
              <name>SMP17</name>
13870 
              <description>Channel 17 sample time
13871 
              selection</description>
13872 
              <bitOffset>21</bitOffset>
13873 
              <bitWidth>3</bitWidth>
13874 
            </field>
13875 
          </fields>
13876 
        </register>
13877 
        <register>
13878 
          <name>SMPR2</name>
13879 
          <displayName>SMPR2</displayName>
13880 
          <description>sample time register 2</description>
13881 
          <addressOffset>0x10</addressOffset>
13882 
          <size>0x20</size>
13883 
          <access>read-write</access>
13884 
          <resetValue>0x00000000</resetValue>
13885 
          <fields>
13886 
            <field>
13887 
              <name>SMP0</name>
13888 
              <description>Channel 0 sample time
13889 
              selection</description>
13890 
              <bitOffset>0</bitOffset>
13891 
              <bitWidth>3</bitWidth>
13892 
            </field>
13893 
            <field>
13894 
              <name>SMP1</name>
13895 
              <description>Channel 1 sample time
13896 
              selection</description>
13897 
              <bitOffset>3</bitOffset>
13898 
              <bitWidth>3</bitWidth>
13899 
            </field>
13900 
            <field>
13901 
              <name>SMP2</name>
13902 
              <description>Channel 2 sample time
13903 
              selection</description>
13904 
              <bitOffset>6</bitOffset>
13905 
              <bitWidth>3</bitWidth>
13906 
            </field>
13907 
            <field>
13908 
              <name>SMP3</name>
13909 
              <description>Channel 3 sample time
13910 
              selection</description>
13911 
              <bitOffset>9</bitOffset>
13912 
              <bitWidth>3</bitWidth>
13913 
            </field>
13914 
            <field>
13915 
              <name>SMP4</name>
13916 
              <description>Channel 4 sample time
13917 
              selection</description>
13918 
              <bitOffset>12</bitOffset>
13919 
              <bitWidth>3</bitWidth>
13920 
            </field>
13921 
            <field>
13922 
              <name>SMP5</name>
13923 
              <description>Channel 5 sample time
13924 
              selection</description>
13925 
              <bitOffset>15</bitOffset>
13926 
              <bitWidth>3</bitWidth>
13927 
            </field>
13928 
            <field>
13929 
              <name>SMP6</name>
13930 
              <description>Channel 6 sample time
13931 
              selection</description>
13932 
              <bitOffset>18</bitOffset>
13933 
              <bitWidth>3</bitWidth>
13934 
            </field>
13935 
            <field>
13936 
              <name>SMP7</name>
13937 
              <description>Channel 7 sample time
13938 
              selection</description>
13939 
              <bitOffset>21</bitOffset>
13940 
              <bitWidth>3</bitWidth>
13941 
            </field>
13942 
            <field>
13943 
              <name>SMP8</name>
13944 
              <description>Channel 8 sample time
13945 
              selection</description>
13946 
              <bitOffset>24</bitOffset>
13947 
              <bitWidth>3</bitWidth>
13948 
            </field>
13949 
            <field>
13950 
              <name>SMP9</name>
13951 
              <description>Channel 9 sample time
13952 
              selection</description>
13953 
              <bitOffset>27</bitOffset>
13954 
              <bitWidth>3</bitWidth>
13955 
            </field>
13956 
          </fields>
13957 
        </register>
13958 
        <register>
13959 
          <name>JOFR1</name>
13960 
          <displayName>JOFR1</displayName>
13961 
          <description>injected channel data offset register
13962 
          x</description>
13963 
          <addressOffset>0x14</addressOffset>
13964 
          <size>0x20</size>
13965 
          <access>read-write</access>
13966 
          <resetValue>0x00000000</resetValue>
13967 
          <fields>
13968 
            <field>
13969 
              <name>JOFFSET1</name>
13970 
              <description>Data offset for injected channel
13971 
              x</description>
13972 
              <bitOffset>0</bitOffset>
13973 
              <bitWidth>12</bitWidth>
13974 
            </field>
13975 
          </fields>
13976 
        </register>
13977 
        <register>
13978 
          <name>JOFR2</name>
13979 
          <displayName>JOFR2</displayName>
13980 
          <description>injected channel data offset register
13981 
          x</description>
13982 
          <addressOffset>0x18</addressOffset>
13983 
          <size>0x20</size>
13984 
          <access>read-write</access>
13985 
          <resetValue>0x00000000</resetValue>
13986 
          <fields>
13987 
            <field>
13988 
              <name>JOFFSET2</name>
13989 
              <description>Data offset for injected channel
13990 
              x</description>
13991 
              <bitOffset>0</bitOffset>
13992 
              <bitWidth>12</bitWidth>
13993 
            </field>
13994 
          </fields>
13995 
        </register>
13996 
        <register>
13997 
          <name>JOFR3</name>
13998 
          <displayName>JOFR3</displayName>
13999 
          <description>injected channel data offset register
14000 
          x</description>
14001 
          <addressOffset>0x1C</addressOffset>
14002 
          <size>0x20</size>
14003 
          <access>read-write</access>
14004 
          <resetValue>0x00000000</resetValue>
14005 
          <fields>
14006 
            <field>
14007 
              <name>JOFFSET3</name>
14008 
              <description>Data offset for injected channel
14009 
              x</description>
14010 
              <bitOffset>0</bitOffset>
14011 
              <bitWidth>12</bitWidth>
14012 
            </field>
14013 
          </fields>
14014 
        </register>
14015 
        <register>
14016 
          <name>JOFR4</name>
14017 
          <displayName>JOFR4</displayName>
14018 
          <description>injected channel data offset register
14019 
          x</description>
14020 
          <addressOffset>0x20</addressOffset>
14021 
          <size>0x20</size>
14022 
          <access>read-write</access>
14023 
          <resetValue>0x00000000</resetValue>
14024 
          <fields>
14025 
            <field>
14026 
              <name>JOFFSET4</name>
14027 
              <description>Data offset for injected channel
14028 
              x</description>
14029 
              <bitOffset>0</bitOffset>
14030 
              <bitWidth>12</bitWidth>
14031 
            </field>
14032 
          </fields>
14033 
        </register>
14034 
        <register>
14035 
          <name>HTR</name>
14036 
          <displayName>HTR</displayName>
14037 
          <description>watchdog higher threshold
14038 
          register</description>
14039 
          <addressOffset>0x24</addressOffset>
14040 
          <size>0x20</size>
14041 
          <access>read-write</access>
14042 
          <resetValue>0x00000FFF</resetValue>
14043 
          <fields>
14044 
            <field>
14045 
              <name>HT</name>
14046 
              <description>Analog watchdog higher
14047 
              threshold</description>
14048 
              <bitOffset>0</bitOffset>
14049 
              <bitWidth>12</bitWidth>
14050 
            </field>
14051 
          </fields>
14052 
        </register>
14053 
        <register>
14054 
          <name>LTR</name>
14055 
          <displayName>LTR</displayName>
14056 
          <description>watchdog lower threshold
14057 
          register</description>
14058 
          <addressOffset>0x28</addressOffset>
14059 
          <size>0x20</size>
14060 
          <access>read-write</access>
14061 
          <resetValue>0x00000000</resetValue>
14062 
          <fields>
14063 
            <field>
14064 
              <name>LT</name>
14065 
              <description>Analog watchdog lower
14066 
              threshold</description>
14067 
              <bitOffset>0</bitOffset>
14068 
              <bitWidth>12</bitWidth>
14069 
            </field>
14070 
          </fields>
14071 
        </register>
14072 
        <register>
14073 
          <name>SQR1</name>
14074 
          <displayName>SQR1</displayName>
14075 
          <description>regular sequence register 1</description>
14076 
          <addressOffset>0x2C</addressOffset>
14077 
          <size>0x20</size>
14078 
          <access>read-write</access>
14079 
          <resetValue>0x00000000</resetValue>
14080 
          <fields>
14081 
            <field>
14082 
              <name>L</name>
14083 
              <description>Regular channel sequence
14084 
              length</description>
14085 
              <bitOffset>20</bitOffset>
14086 
              <bitWidth>4</bitWidth>
14087 
            </field>
14088 
            <field>
14089 
              <name>SQ16</name>
14090 
              <description>16th conversion in regular
14091 
              sequence</description>
14092 
              <bitOffset>15</bitOffset>
14093 
              <bitWidth>5</bitWidth>
14094 
            </field>
14095 
            <field>
14096 
              <name>SQ15</name>
14097 
              <description>15th conversion in regular
14098 
              sequence</description>
14099 
              <bitOffset>10</bitOffset>
14100 
              <bitWidth>5</bitWidth>
14101 
            </field>
14102 
            <field>
14103 
              <name>SQ14</name>
14104 
              <description>14th conversion in regular
14105 
              sequence</description>
14106 
              <bitOffset>5</bitOffset>
14107 
              <bitWidth>5</bitWidth>
14108 
            </field>
14109 
            <field>
14110 
              <name>SQ13</name>
14111 
              <description>13th conversion in regular
14112 
              sequence</description>
14113 
              <bitOffset>0</bitOffset>
14114 
              <bitWidth>5</bitWidth>
14115 
            </field>
14116 
          </fields>
14117 
        </register>
14118 
        <register>
14119 
          <name>SQR2</name>
14120 
          <displayName>SQR2</displayName>
14121 
          <description>regular sequence register 2</description>
14122 
          <addressOffset>0x30</addressOffset>
14123 
          <size>0x20</size>
14124 
          <access>read-write</access>
14125 
          <resetValue>0x00000000</resetValue>
14126 
          <fields>
14127 
            <field>
14128 
              <name>SQ12</name>
14129 
              <description>12th conversion in regular
14130 
              sequence</description>
14131 
              <bitOffset>25</bitOffset>
14132 
              <bitWidth>5</bitWidth>
14133 
            </field>
14134 
            <field>
14135 
              <name>SQ11</name>
14136 
              <description>11th conversion in regular
14137 
              sequence</description>
14138 
              <bitOffset>20</bitOffset>
14139 
              <bitWidth>5</bitWidth>
14140 
            </field>
14141 
            <field>
14142 
              <name>SQ10</name>
14143 
              <description>10th conversion in regular
14144 
              sequence</description>
14145 
              <bitOffset>15</bitOffset>
14146 
              <bitWidth>5</bitWidth>
14147 
            </field>
14148 
            <field>
14149 
              <name>SQ9</name>
14150 
              <description>9th conversion in regular
14151 
              sequence</description>
14152 
              <bitOffset>10</bitOffset>
14153 
              <bitWidth>5</bitWidth>
14154 
            </field>
14155 
            <field>
14156 
              <name>SQ8</name>
14157 
              <description>8th conversion in regular
14158 
              sequence</description>
14159 
              <bitOffset>5</bitOffset>
14160 
              <bitWidth>5</bitWidth>
14161 
            </field>
14162 
            <field>
14163 
              <name>SQ7</name>
14164 
              <description>7th conversion in regular
14165 
              sequence</description>
14166 
              <bitOffset>0</bitOffset>
14167 
              <bitWidth>5</bitWidth>
14168 
            </field>
14169 
          </fields>
14170 
        </register>
14171 
        <register>
14172 
          <name>SQR3</name>
14173 
          <displayName>SQR3</displayName>
14174 
          <description>regular sequence register 3</description>
14175 
          <addressOffset>0x34</addressOffset>
14176 
          <size>0x20</size>
14177 
          <access>read-write</access>
14178 
          <resetValue>0x00000000</resetValue>
14179 
          <fields>
14180 
            <field>
14181 
              <name>SQ6</name>
14182 
              <description>6th conversion in regular
14183 
              sequence</description>
14184 
              <bitOffset>25</bitOffset>
14185 
              <bitWidth>5</bitWidth>
14186 
            </field>
14187 
            <field>
14188 
              <name>SQ5</name>
14189 
              <description>5th conversion in regular
14190 
              sequence</description>
14191 
              <bitOffset>20</bitOffset>
14192 
              <bitWidth>5</bitWidth>
14193 
            </field>
14194 
            <field>
14195 
              <name>SQ4</name>
14196 
              <description>4th conversion in regular
14197 
              sequence</description>
14198 
              <bitOffset>15</bitOffset>
14199 
              <bitWidth>5</bitWidth>
14200 
            </field>
14201 
            <field>
14202 
              <name>SQ3</name>
14203 
              <description>3rd conversion in regular
14204 
              sequence</description>
14205 
              <bitOffset>10</bitOffset>
14206 
              <bitWidth>5</bitWidth>
14207 
            </field>
14208 
            <field>
14209 
              <name>SQ2</name>
14210 
              <description>2nd conversion in regular
14211 
              sequence</description>
14212 
              <bitOffset>5</bitOffset>
14213 
              <bitWidth>5</bitWidth>
14214 
            </field>
14215 
            <field>
14216 
              <name>SQ1</name>
14217 
              <description>1st conversion in regular
14218 
              sequence</description>
14219 
              <bitOffset>0</bitOffset>
14220 
              <bitWidth>5</bitWidth>
14221 
            </field>
14222 
          </fields>
14223 
        </register>
14224 
        <register>
14225 
          <name>JSQR</name>
14226 
          <displayName>JSQR</displayName>
14227 
          <description>injected sequence register</description>
14228 
          <addressOffset>0x38</addressOffset>
14229 
          <size>0x20</size>
14230 
          <access>read-write</access>
14231 
          <resetValue>0x00000000</resetValue>
14232 
          <fields>
14233 
            <field>
14234 
              <name>JL</name>
14235 
              <description>Injected sequence length</description>
14236 
              <bitOffset>20</bitOffset>
14237 
              <bitWidth>2</bitWidth>
14238 
            </field>
14239 
            <field>
14240 
              <name>JSQ4</name>
14241 
              <description>4th conversion in injected
14242 
              sequence</description>
14243 
              <bitOffset>15</bitOffset>
14244 
              <bitWidth>5</bitWidth>
14245 
            </field>
14246 
            <field>
14247 
              <name>JSQ3</name>
14248 
              <description>3rd conversion in injected
14249 
              sequence</description>
14250 
              <bitOffset>10</bitOffset>
14251 
              <bitWidth>5</bitWidth>
14252 
            </field>
14253 
            <field>
14254 
              <name>JSQ2</name>
14255 
              <description>2nd conversion in injected
14256 
              sequence</description>
14257 
              <bitOffset>5</bitOffset>
14258 
              <bitWidth>5</bitWidth>
14259 
            </field>
14260 
            <field>
14261 
              <name>JSQ1</name>
14262 
              <description>1st conversion in injected
14263 
              sequence</description>
14264 
              <bitOffset>0</bitOffset>
14265 
              <bitWidth>5</bitWidth>
14266 
            </field>
14267 
          </fields>
14268 
        </register>
14269 
        <register>
14270 
          <name>JDR1</name>
14271 
          <displayName>JDR1</displayName>
14272 
          <description>injected data register x</description>
14273 
          <addressOffset>0x3C</addressOffset>
14274 
          <size>0x20</size>
14275 
          <access>read-only</access>
14276 
          <resetValue>0x00000000</resetValue>
14277 
          <fields>
14278 
            <field>
14279 
              <name>JDATA</name>
14280 
              <description>Injected data</description>
14281 
              <bitOffset>0</bitOffset>
14282 
              <bitWidth>16</bitWidth>
14283 
            </field>
14284 
          </fields>
14285 
        </register>
14286 
        <register>
14287 
          <name>JDR2</name>
14288 
          <displayName>JDR2</displayName>
14289 
          <description>injected data register x</description>
14290 
          <addressOffset>0x40</addressOffset>
14291 
          <size>0x20</size>
14292 
          <access>read-only</access>
14293 
          <resetValue>0x00000000</resetValue>
14294 
          <fields>
14295 
            <field>
14296 
              <name>JDATA</name>
14297 
              <description>Injected data</description>
14298 
              <bitOffset>0</bitOffset>
14299 
              <bitWidth>16</bitWidth>
14300 
            </field>
14301 
          </fields>
14302 
        </register>
14303 
        <register>
14304 
          <name>JDR3</name>
14305 
          <displayName>JDR3</displayName>
14306 
          <description>injected data register x</description>
14307 
          <addressOffset>0x44</addressOffset>
14308 
          <size>0x20</size>
14309 
          <access>read-only</access>
14310 
          <resetValue>0x00000000</resetValue>
14311 
          <fields>
14312 
            <field>
14313 
              <name>JDATA</name>
14314 
              <description>Injected data</description>
14315 
              <bitOffset>0</bitOffset>
14316 
              <bitWidth>16</bitWidth>
14317 
            </field>
14318 
          </fields>
14319 
        </register>
14320 
        <register>
14321 
          <name>JDR4</name>
14322 
          <displayName>JDR4</displayName>
14323 
          <description>injected data register x</description>
14324 
          <addressOffset>0x48</addressOffset>
14325 
          <size>0x20</size>
14326 
          <access>read-only</access>
14327 
          <resetValue>0x00000000</resetValue>
14328 
          <fields>
14329 
            <field>
14330 
              <name>JDATA</name>
14331 
              <description>Injected data</description>
14332 
              <bitOffset>0</bitOffset>
14333 
              <bitWidth>16</bitWidth>
14334 
            </field>
14335 
          </fields>
14336 
        </register>
14337 
        <register>
14338 
          <name>DR</name>
14339 
          <displayName>DR</displayName>
14340 
          <description>regular data register</description>
14341 
          <addressOffset>0x4C</addressOffset>
14342 
          <size>0x20</size>
14343 
          <access>read-only</access>
14344 
          <resetValue>0x00000000</resetValue>
14345 
          <fields>
14346 
            <field>
14347 
              <name>DATA</name>
14348 
              <description>Regular data</description>
14349 
              <bitOffset>0</bitOffset>
14350 
              <bitWidth>16</bitWidth>
14351 
            </field>
14352 
          </fields>
14353 
        </register>
14354 
      </registers>
14355 
    </peripheral>
14356 
    <peripheral derivedFrom="ADC2">
14357 
      <name>ADC3</name>
14358 
      <baseAddress>0x40013C00</baseAddress>
14359 
      <interrupt>
14360 
        <name>ADC3</name>
14361 
        <description>ADC3 global interrupt</description>
14362 
        <value>47</value>
14363 
      </interrupt>
14364 
    </peripheral>
14365 
    <peripheral>
14366 
      <name>CAN</name>
14367 
      <description>Controller area network</description>
14368 
      <groupName>CAN</groupName>
14369 
      <baseAddress>0x40006400</baseAddress>
14370 
      <addressBlock>
14371 
        <offset>0x0</offset>
14372 
        <size>0x400</size>
14373 
        <usage>registers</usage>
14374 
      </addressBlock>
14375 
      <interrupt>
14376 
        <name>CAN1_TX</name>
14377 
        <description>CAN1 TX interrupts</description>
14378 
        <value>19</value>
14379 
      </interrupt>
14380 
      <interrupt>
14381 
        <name>CAN1_RX0</name>
14382 
        <description>CAN1 RX0 interrupts</description>
14383 
        <value>20</value>
14384 
      </interrupt>
14385 
      <interrupt>
14386 
        <name>CAN1_RX1</name>
14387 
        <description>CAN1 RX1 interrupt</description>
14388 
        <value>21</value>
14389 
      </interrupt>
14390 
      <interrupt>
14391 
        <name>CAN1_SCE</name>
14392 
        <description>CAN1 SCE interrupt</description>
14393 
        <value>22</value>
14394 
      </interrupt>
14395 
      <registers>
14396 
        <register>
14397 
          <name>CAN_MCR</name>
14398 
          <displayName>CAN_MCR</displayName>
14399 
          <description>CAN_MCR</description>
14400 
          <addressOffset>0x0</addressOffset>
14401 
          <size>0x20</size>
14402 
          <access>read-write</access>
14403 
          <resetValue>0x00000000</resetValue>
14404 
          <fields>
14405 
            <field>
14406 
              <name>DBF</name>
14407 
              <description>DBF</description>
14408 
              <bitOffset>16</bitOffset>
14409 
              <bitWidth>1</bitWidth>
14410 
            </field>
14411 
            <field>
14412 
              <name>RESET</name>
14413 
              <description>RESET</description>
14414 
              <bitOffset>15</bitOffset>
14415 
              <bitWidth>1</bitWidth>
14416 
            </field>
14417 
            <field>
14418 
              <name>TTCM</name>
14419 
              <description>TTCM</description>
14420 
              <bitOffset>7</bitOffset>
14421 
              <bitWidth>1</bitWidth>
14422 
            </field>
14423 
            <field>
14424 
              <name>ABOM</name>
14425 
              <description>ABOM</description>
14426 
              <bitOffset>6</bitOffset>
14427 
              <bitWidth>1</bitWidth>
14428 
            </field>
14429 
            <field>
14430 
              <name>AWUM</name>
14431 
              <description>AWUM</description>
14432 
              <bitOffset>5</bitOffset>
14433 
              <bitWidth>1</bitWidth>
14434 
            </field>
14435 
            <field>
14436 
              <name>NART</name>
14437 
              <description>NART</description>
14438 
              <bitOffset>4</bitOffset>
14439 
              <bitWidth>1</bitWidth>
14440 
            </field>
14441 
            <field>
14442 
              <name>RFLM</name>
14443 
              <description>RFLM</description>
14444 
              <bitOffset>3</bitOffset>
14445 
              <bitWidth>1</bitWidth>
14446 
            </field>
14447 
            <field>
14448 
              <name>TXFP</name>
14449 
              <description>TXFP</description>
14450 
              <bitOffset>2</bitOffset>
14451 
              <bitWidth>1</bitWidth>
14452 
            </field>
14453 
            <field>
14454 
              <name>SLEEP</name>
14455 
              <description>SLEEP</description>
14456 
              <bitOffset>1</bitOffset>
14457 
              <bitWidth>1</bitWidth>
14458 
            </field>
14459 
            <field>
14460 
              <name>INRQ</name>
14461 
              <description>INRQ</description>
14462 
              <bitOffset>0</bitOffset>
14463 
              <bitWidth>1</bitWidth>
14464 
            </field>
14465 
          </fields>
14466 
        </register>
14467 
        <register>
14468 
          <name>CAN_MSR</name>
14469 
          <displayName>CAN_MSR</displayName>
14470 
          <description>CAN_MSR</description>
14471 
          <addressOffset>0x4</addressOffset>
14472 
          <size>0x20</size>
14473 
          <resetValue>0x00000000</resetValue>
14474 
          <fields>
14475 
            <field>
14476 
              <name>RX</name>
14477 
              <description>RX</description>
14478 
              <bitOffset>11</bitOffset>
14479 
              <bitWidth>1</bitWidth>
14480 
              <access>read-only</access>
14481 
            </field>
14482 
            <field>
14483 
              <name>SAMP</name>
14484 
              <description>SAMP</description>
14485 
              <bitOffset>10</bitOffset>
14486 
              <bitWidth>1</bitWidth>
14487 
              <access>read-only</access>
14488 
            </field>
14489 
            <field>
14490 
              <name>RXM</name>
14491 
              <description>RXM</description>
14492 
              <bitOffset>9</bitOffset>
14493 
              <bitWidth>1</bitWidth>
14494 
              <access>read-only</access>
14495 
            </field>
14496 
            <field>
14497 
              <name>TXM</name>
14498 
              <description>TXM</description>
14499 
              <bitOffset>8</bitOffset>
14500 
              <bitWidth>1</bitWidth>
14501 
              <access>read-only</access>
14502 
            </field>
14503 
            <field>
14504 
              <name>SLAKI</name>
14505 
              <description>SLAKI</description>
14506 
              <bitOffset>4</bitOffset>
14507 
              <bitWidth>1</bitWidth>
14508 
              <access>read-write</access>
14509 
            </field>
14510 
            <field>
14511 
              <name>WKUI</name>
14512 
              <description>WKUI</description>
14513 
              <bitOffset>3</bitOffset>
14514 
              <bitWidth>1</bitWidth>
14515 
              <access>read-write</access>
14516 
            </field>
14517 
            <field>
14518 
              <name>ERRI</name>
14519 
              <description>ERRI</description>
14520 
              <bitOffset>2</bitOffset>
14521 
              <bitWidth>1</bitWidth>
14522 
              <access>read-write</access>
14523 
            </field>
14524 
            <field>
14525 
              <name>SLAK</name>
14526 
              <description>SLAK</description>
14527 
              <bitOffset>1</bitOffset>
14528 
              <bitWidth>1</bitWidth>
14529 
              <access>read-only</access>
14530 
            </field>
14531 
            <field>
14532 
              <name>INAK</name>
14533 
              <description>INAK</description>
14534 
              <bitOffset>0</bitOffset>
14535 
              <bitWidth>1</bitWidth>
14536 
              <access>read-only</access>
14537 
            </field>
14538 
          </fields>
14539 
        </register>
14540 
        <register>
14541 
          <name>CAN_TSR</name>
14542 
          <displayName>CAN_TSR</displayName>
14543 
          <description>CAN_TSR</description>
14544 
          <addressOffset>0x8</addressOffset>
14545 
          <size>0x20</size>
14546 
          <resetValue>0x00000000</resetValue>
14547 
          <fields>
14548 
            <field>
14549 
              <name>LOW2</name>
14550 
              <description>Lowest priority flag for mailbox
14551 
              2</description>
14552 
              <bitOffset>31</bitOffset>
14553 
              <bitWidth>1</bitWidth>
14554 
              <access>read-only</access>
14555 
            </field>
14556 
            <field>
14557 
              <name>LOW1</name>
14558 
              <description>Lowest priority flag for mailbox
14559 
              1</description>
14560 
              <bitOffset>30</bitOffset>
14561 
              <bitWidth>1</bitWidth>
14562 
              <access>read-only</access>
14563 
            </field>
14564 
            <field>
14565 
              <name>LOW0</name>
14566 
              <description>Lowest priority flag for mailbox
14567 
              0</description>
14568 
              <bitOffset>29</bitOffset>
14569 
              <bitWidth>1</bitWidth>
14570 
              <access>read-only</access>
14571 
            </field>
14572 
            <field>
14573 
              <name>TME2</name>
14574 
              <description>Lowest priority flag for mailbox
14575 
              2</description>
14576 
              <bitOffset>28</bitOffset>
14577 
              <bitWidth>1</bitWidth>
14578 
              <access>read-only</access>
14579 
            </field>
14580 
            <field>
14581 
              <name>TME1</name>
14582 
              <description>Lowest priority flag for mailbox
14583 
              1</description>
14584 
              <bitOffset>27</bitOffset>
14585 
              <bitWidth>1</bitWidth>
14586 
              <access>read-only</access>
14587 
            </field>
14588 
            <field>
14589 
              <name>TME0</name>
14590 
              <description>Lowest priority flag for mailbox
14591 
              0</description>
14592 
              <bitOffset>26</bitOffset>
14593 
              <bitWidth>1</bitWidth>
14594 
              <access>read-only</access>
14595 
            </field>
14596 
            <field>
14597 
              <name>CODE</name>
14598 
              <description>CODE</description>
14599 
              <bitOffset>24</bitOffset>
14600 
              <bitWidth>2</bitWidth>
14601 
              <access>read-only</access>
14602 
            </field>
14603 
            <field>
14604 
              <name>ABRQ2</name>
14605 
              <description>ABRQ2</description>
14606 
              <bitOffset>23</bitOffset>
14607 
              <bitWidth>1</bitWidth>
14608 
              <access>read-write</access>
14609 
            </field>
14610 
            <field>
14611 
              <name>TERR2</name>
14612 
              <description>TERR2</description>
14613 
              <bitOffset>19</bitOffset>
14614 
              <bitWidth>1</bitWidth>
14615 
              <access>read-write</access>
14616 
            </field>
14617 
            <field>
14618 
              <name>ALST2</name>
14619 
              <description>ALST2</description>
14620 
              <bitOffset>18</bitOffset>
14621 
              <bitWidth>1</bitWidth>
14622 
              <access>read-write</access>
14623 
            </field>
14624 
            <field>
14625 
              <name>TXOK2</name>
14626 
              <description>TXOK2</description>
14627 
              <bitOffset>17</bitOffset>
14628 
              <bitWidth>1</bitWidth>
14629 
              <access>read-write</access>
14630 
            </field>
14631 
            <field>
14632 
              <name>RQCP2</name>
14633 
              <description>RQCP2</description>
14634 
              <bitOffset>16</bitOffset>
14635 
              <bitWidth>1</bitWidth>
14636 
              <access>read-write</access>
14637 
            </field>
14638 
            <field>
14639 
              <name>ABRQ1</name>
14640 
              <description>ABRQ1</description>
14641 
              <bitOffset>15</bitOffset>
14642 
              <bitWidth>1</bitWidth>
14643 
              <access>read-write</access>
14644 
            </field>
14645 
            <field>
14646 
              <name>TERR1</name>
14647 
              <description>TERR1</description>
14648 
              <bitOffset>11</bitOffset>
14649 
              <bitWidth>1</bitWidth>
14650 
              <access>read-write</access>
14651 
            </field>
14652 
            <field>
14653 
              <name>ALST1</name>
14654 
              <description>ALST1</description>
14655 
              <bitOffset>10</bitOffset>
14656 
              <bitWidth>1</bitWidth>
14657 
              <access>read-write</access>
14658 
            </field>
14659 
            <field>
14660 
              <name>TXOK1</name>
14661 
              <description>TXOK1</description>
14662 
              <bitOffset>9</bitOffset>
14663 
              <bitWidth>1</bitWidth>
14664 
              <access>read-write</access>
14665 
            </field>
14666 
            <field>
14667 
              <name>RQCP1</name>
14668 
              <description>RQCP1</description>
14669 
              <bitOffset>8</bitOffset>
14670 
              <bitWidth>1</bitWidth>
14671 
              <access>read-write</access>
14672 
            </field>
14673 
            <field>
14674 
              <name>ABRQ0</name>
14675 
              <description>ABRQ0</description>
14676 
              <bitOffset>7</bitOffset>
14677 
              <bitWidth>1</bitWidth>
14678 
              <access>read-write</access>
14679 
            </field>
14680 
            <field>
14681 
              <name>TERR0</name>
14682 
              <description>TERR0</description>
14683 
              <bitOffset>3</bitOffset>
14684 
              <bitWidth>1</bitWidth>
14685 
              <access>read-write</access>
14686 
            </field>
14687 
            <field>
14688 
              <name>ALST0</name>
14689 
              <description>ALST0</description>
14690 
              <bitOffset>2</bitOffset>
14691 
              <bitWidth>1</bitWidth>
14692 
              <access>read-write</access>
14693 
            </field>
14694 
            <field>
14695 
              <name>TXOK0</name>
14696 
              <description>TXOK0</description>
14697 
              <bitOffset>1</bitOffset>
14698 
              <bitWidth>1</bitWidth>
14699 
              <access>read-write</access>
14700 
            </field>
14701 
            <field>
14702 
              <name>RQCP0</name>
14703 
              <description>RQCP0</description>
14704 
              <bitOffset>0</bitOffset>
14705 
              <bitWidth>1</bitWidth>
14706 
              <access>read-write</access>
14707 
            </field>
14708 
          </fields>
14709 
        </register>
14710 
        <register>
14711 
          <name>CAN_RF0R</name>
14712 
          <displayName>CAN_RF0R</displayName>
14713 
          <description>CAN_RF0R</description>
14714 
          <addressOffset>0xC</addressOffset>
14715 
          <size>0x20</size>
14716 
          <resetValue>0x00000000</resetValue>
14717 
          <fields>
14718 
            <field>
14719 
              <name>RFOM0</name>
14720 
              <description>RFOM0</description>
14721 
              <bitOffset>5</bitOffset>
14722 
              <bitWidth>1</bitWidth>
14723 
              <access>read-write</access>
14724 
            </field>
14725 
            <field>
14726 
              <name>FOVR0</name>
14727 
              <description>FOVR0</description>
14728 
              <bitOffset>4</bitOffset>
14729 
              <bitWidth>1</bitWidth>
14730 
              <access>read-write</access>
14731 
            </field>
14732 
            <field>
14733 
              <name>FULL0</name>
14734 
              <description>FULL0</description>
14735 
              <bitOffset>3</bitOffset>
14736 
              <bitWidth>1</bitWidth>
14737 
              <access>read-write</access>
14738 
            </field>
14739 
            <field>
14740 
              <name>FMP0</name>
14741 
              <description>FMP0</description>
14742 
              <bitOffset>0</bitOffset>
14743 
              <bitWidth>2</bitWidth>
14744 
              <access>read-only</access>
14745 
            </field>
14746 
          </fields>
14747 
        </register>
14748 
        <register>
14749 
          <name>CAN_RF1R</name>
14750 
          <displayName>CAN_RF1R</displayName>
14751 
          <description>CAN_RF1R</description>
14752 
          <addressOffset>0x10</addressOffset>
14753 
          <size>0x20</size>
14754 
          <resetValue>0x00000000</resetValue>
14755 
          <fields>
14756 
            <field>
14757 
              <name>RFOM1</name>
14758 
              <description>RFOM1</description>
14759 
              <bitOffset>5</bitOffset>
14760 
              <bitWidth>1</bitWidth>
14761 
              <access>read-write</access>
14762 
            </field>
14763 
            <field>
14764 
              <name>FOVR1</name>
14765 
              <description>FOVR1</description>
14766 
              <bitOffset>4</bitOffset>
14767 
              <bitWidth>1</bitWidth>
14768 
              <access>read-write</access>
14769 
            </field>
14770 
            <field>
14771 
              <name>FULL1</name>
14772 
              <description>FULL1</description>
14773 
              <bitOffset>3</bitOffset>
14774 
              <bitWidth>1</bitWidth>
14775 
              <access>read-write</access>
14776 
            </field>
14777 
            <field>
14778 
              <name>FMP1</name>
14779 
              <description>FMP1</description>
14780 
              <bitOffset>0</bitOffset>
14781 
              <bitWidth>2</bitWidth>
14782 
              <access>read-only</access>
14783 
            </field>
14784 
          </fields>
14785 
        </register>
14786 
        <register>
14787 
          <name>CAN_IER</name>
14788 
          <displayName>CAN_IER</displayName>
14789 
          <description>CAN_IER</description>
14790 
          <addressOffset>0x14</addressOffset>
14791 
          <size>0x20</size>
14792 
          <access>read-write</access>
14793 
          <resetValue>0x00000000</resetValue>
14794 
          <fields>
14795 
            <field>
14796 
              <name>SLKIE</name>
14797 
              <description>SLKIE</description>
14798 
              <bitOffset>17</bitOffset>
14799 
              <bitWidth>1</bitWidth>
14800 
            </field>
14801 
            <field>
14802 
              <name>WKUIE</name>
14803 
              <description>WKUIE</description>
14804 
              <bitOffset>16</bitOffset>
14805 
              <bitWidth>1</bitWidth>
14806 
            </field>
14807 
            <field>
14808 
              <name>ERRIE</name>
14809 
              <description>ERRIE</description>
14810 
              <bitOffset>15</bitOffset>
14811 
              <bitWidth>1</bitWidth>
14812 
            </field>
14813 
            <field>
14814 
              <name>LECIE</name>
14815 
              <description>LECIE</description>
14816 
              <bitOffset>11</bitOffset>
14817 
              <bitWidth>1</bitWidth>
14818 
            </field>
14819 
            <field>
14820 
              <name>BOFIE</name>
14821 
              <description>BOFIE</description>
14822 
              <bitOffset>10</bitOffset>
14823 
              <bitWidth>1</bitWidth>
14824 
            </field>
14825 
            <field>
14826 
              <name>EPVIE</name>
14827 
              <description>EPVIE</description>
14828 
              <bitOffset>9</bitOffset>
14829 
              <bitWidth>1</bitWidth>
14830 
            </field>
14831 
            <field>
14832 
              <name>EWGIE</name>
14833 
              <description>EWGIE</description>
14834 
              <bitOffset>8</bitOffset>
14835 
              <bitWidth>1</bitWidth>
14836 
            </field>
14837 
            <field>
14838 
              <name>FOVIE1</name>
14839 
              <description>FOVIE1</description>
14840 
              <bitOffset>6</bitOffset>
14841 
              <bitWidth>1</bitWidth>
14842 
            </field>
14843 
            <field>
14844 
              <name>FFIE1</name>
14845 
              <description>FFIE1</description>
14846 
              <bitOffset>5</bitOffset>
14847 
              <bitWidth>1</bitWidth>
14848 
            </field>
14849 
            <field>
14850 
              <name>FMPIE1</name>
14851 
              <description>FMPIE1</description>
14852 
              <bitOffset>4</bitOffset>
14853 
              <bitWidth>1</bitWidth>
14854 
            </field>
14855 
            <field>
14856 
              <name>FOVIE0</name>
14857 
              <description>FOVIE0</description>
14858 
              <bitOffset>3</bitOffset>
14859 
              <bitWidth>1</bitWidth>
14860 
            </field>
14861 
            <field>
14862 
              <name>FFIE0</name>
14863 
              <description>FFIE0</description>
14864 
              <bitOffset>2</bitOffset>
14865 
              <bitWidth>1</bitWidth>
14866 
            </field>
14867 
            <field>
14868 
              <name>FMPIE0</name>
14869 
              <description>FMPIE0</description>
14870 
              <bitOffset>1</bitOffset>
14871 
              <bitWidth>1</bitWidth>
14872 
            </field>
14873 
            <field>
14874 
              <name>TMEIE</name>
14875 
              <description>TMEIE</description>
14876 
              <bitOffset>0</bitOffset>
14877 
              <bitWidth>1</bitWidth>
14878 
            </field>
14879 
          </fields>
14880 
        </register>
14881 
        <register>
14882 
          <name>CAN_ESR</name>
14883 
          <displayName>CAN_ESR</displayName>
14884 
          <description>CAN_ESR</description>
14885 
          <addressOffset>0x18</addressOffset>
14886 
          <size>0x20</size>
14887 
          <resetValue>0x00000000</resetValue>
14888 
          <fields>
14889 
            <field>
14890 
              <name>REC</name>
14891 
              <description>REC</description>
14892 
              <bitOffset>24</bitOffset>
14893 
              <bitWidth>8</bitWidth>
14894 
              <access>read-only</access>
14895 
            </field>
14896 
            <field>
14897 
              <name>TEC</name>
14898 
              <description>TEC</description>
14899 
              <bitOffset>16</bitOffset>
14900 
              <bitWidth>8</bitWidth>
14901 
              <access>read-only</access>
14902 
            </field>
14903 
            <field>
14904 
              <name>LEC</name>
14905 
              <description>LEC</description>
14906 
              <bitOffset>4</bitOffset>
14907 
              <bitWidth>3</bitWidth>
14908 
              <access>read-write</access>
14909 
            </field>
14910 
            <field>
14911 
              <name>BOFF</name>
14912 
              <description>BOFF</description>
14913 
              <bitOffset>2</bitOffset>
14914 
              <bitWidth>1</bitWidth>
14915 
              <access>read-only</access>
14916 
            </field>
14917 
            <field>
14918 
              <name>EPVF</name>
14919 
              <description>EPVF</description>
14920 
              <bitOffset>1</bitOffset>
14921 
              <bitWidth>1</bitWidth>
14922 
              <access>read-only</access>
14923 
            </field>
14924 
            <field>
14925 
              <name>EWGF</name>
14926 
              <description>EWGF</description>
14927 
              <bitOffset>0</bitOffset>
14928 
              <bitWidth>1</bitWidth>
14929 
              <access>read-only</access>
14930 
            </field>
14931 
          </fields>
14932 
        </register>
14933 
        <register>
14934 
          <name>CAN_BTR</name>
14935 
          <displayName>CAN_BTR</displayName>
14936 
          <description>CAN_BTR</description>
14937 
          <addressOffset>0x1C</addressOffset>
14938 
          <size>0x20</size>
14939 
          <access>read-write</access>
14940 
          <resetValue>0x00000000</resetValue>
14941 
          <fields>
14942 
            <field>
14943 
              <name>SILM</name>
14944 
              <description>SILM</description>
14945 
              <bitOffset>31</bitOffset>
14946 
              <bitWidth>1</bitWidth>
14947 
            </field>
14948 
            <field>
14949 
              <name>LBKM</name>
14950 
              <description>LBKM</description>
14951 
              <bitOffset>30</bitOffset>
14952 
              <bitWidth>1</bitWidth>
14953 
            </field>
14954 
            <field>
14955 
              <name>SJW</name>
14956 
              <description>SJW</description>
14957 
              <bitOffset>24</bitOffset>
14958 
              <bitWidth>2</bitWidth>
14959 
            </field>
14960 
            <field>
14961 
              <name>TS2</name>
14962 
              <description>TS2</description>
14963 
              <bitOffset>20</bitOffset>
14964 
              <bitWidth>3</bitWidth>
14965 
            </field>
14966 
            <field>
14967 
              <name>TS1</name>
14968 
              <description>TS1</description>
14969 
              <bitOffset>16</bitOffset>
14970 
              <bitWidth>4</bitWidth>
14971 
            </field>
14972 
            <field>
14973 
              <name>BRP</name>
14974 
              <description>BRP</description>
14975 
              <bitOffset>0</bitOffset>
14976 
              <bitWidth>10</bitWidth>
14977 
            </field>
14978 
          </fields>
14979 
        </register>
14980 
        <register>
14981 
          <name>CAN_TI0R</name>
14982 
          <displayName>CAN_TI0R</displayName>
14983 
          <description>CAN_TI0R</description>
14984 
          <addressOffset>0x180</addressOffset>
14985 
          <size>0x20</size>
14986 
          <access>read-write</access>
14987 
          <resetValue>0x00000000</resetValue>
14988 
          <fields>
14989 
            <field>
14990 
              <name>STID</name>
14991 
              <description>STID</description>
14992 
              <bitOffset>21</bitOffset>
14993 
              <bitWidth>11</bitWidth>
14994 
            </field>
14995 
            <field>
14996 
              <name>EXID</name>
14997 
              <description>EXID</description>
14998 
              <bitOffset>3</bitOffset>
14999 
              <bitWidth>18</bitWidth>
15000 
            </field>
15001 
            <field>
15002 
              <name>IDE</name>
15003 
              <description>IDE</description>
15004 
              <bitOffset>2</bitOffset>
15005 
              <bitWidth>1</bitWidth>
15006 
            </field>
15007 
            <field>
15008 
              <name>RTR</name>
15009 
              <description>RTR</description>
15010 
              <bitOffset>1</bitOffset>
15011 
              <bitWidth>1</bitWidth>
15012 
            </field>
15013 
            <field>
15014 
              <name>TXRQ</name>
15015 
              <description>TXRQ</description>
15016 
              <bitOffset>0</bitOffset>
15017 
              <bitWidth>1</bitWidth>
15018 
            </field>
15019 
          </fields>
15020 
        </register>
15021 
        <register>
15022 
          <name>CAN_TDT0R</name>
15023 
          <displayName>CAN_TDT0R</displayName>
15024 
          <description>CAN_TDT0R</description>
15025 
          <addressOffset>0x184</addressOffset>
15026 
          <size>0x20</size>
15027 
          <access>read-write</access>
15028 
          <resetValue>0x00000000</resetValue>
15029 
          <fields>
15030 
            <field>
15031 
              <name>TIME</name>
15032 
              <description>TIME</description>
15033 
              <bitOffset>16</bitOffset>
15034 
              <bitWidth>16</bitWidth>
15035 
            </field>
15036 
            <field>
15037 
              <name>TGT</name>
15038 
              <description>TGT</description>
15039 
              <bitOffset>8</bitOffset>
15040 
              <bitWidth>1</bitWidth>
15041 
            </field>
15042 
            <field>
15043 
              <name>DLC</name>
15044 
              <description>DLC</description>
15045 
              <bitOffset>0</bitOffset>
15046 
              <bitWidth>4</bitWidth>
15047 
            </field>
15048 
          </fields>
15049 
        </register>
15050 
        <register>
15051 
          <name>CAN_TDL0R</name>
15052 
          <displayName>CAN_TDL0R</displayName>
15053 
          <description>CAN_TDL0R</description>
15054 
          <addressOffset>0x188</addressOffset>
15055 
          <size>0x20</size>
15056 
          <access>read-write</access>
15057 
          <resetValue>0x00000000</resetValue>
15058 
          <fields>
15059 
            <field>
15060 
              <name>DATA3</name>
15061 
              <description>DATA3</description>
15062 
              <bitOffset>24</bitOffset>
15063 
              <bitWidth>8</bitWidth>
15064 
            </field>
15065 
            <field>
15066 
              <name>DATA2</name>
15067 
              <description>DATA2</description>
15068 
              <bitOffset>16</bitOffset>
15069 
              <bitWidth>8</bitWidth>
15070 
            </field>
15071 
            <field>
15072 
              <name>DATA1</name>
15073 
              <description>DATA1</description>
15074 
              <bitOffset>8</bitOffset>
15075 
              <bitWidth>8</bitWidth>
15076 
            </field>
15077 
            <field>
15078 
              <name>DATA0</name>
15079 
              <description>DATA0</description>
15080 
              <bitOffset>0</bitOffset>
15081 
              <bitWidth>8</bitWidth>
15082 
            </field>
15083 
          </fields>
15084 
        </register>
15085 
        <register>
15086 
          <name>CAN_TDH0R</name>
15087 
          <displayName>CAN_TDH0R</displayName>
15088 
          <description>CAN_TDH0R</description>
15089 
          <addressOffset>0x18C</addressOffset>
15090 
          <size>0x20</size>
15091 
          <access>read-write</access>
15092 
          <resetValue>0x00000000</resetValue>
15093 
          <fields>
15094 
            <field>
15095 
              <name>DATA7</name>
15096 
              <description>DATA7</description>
15097 
              <bitOffset>24</bitOffset>
15098 
              <bitWidth>8</bitWidth>
15099 
            </field>
15100 
            <field>
15101 
              <name>DATA6</name>
15102 
              <description>DATA6</description>
15103 
              <bitOffset>16</bitOffset>
15104 
              <bitWidth>8</bitWidth>
15105 
            </field>
15106 
            <field>
15107 
              <name>DATA5</name>
15108 
              <description>DATA5</description>
15109 
              <bitOffset>8</bitOffset>
15110 
              <bitWidth>8</bitWidth>
15111 
            </field>
15112 
            <field>
15113 
              <name>DATA4</name>
15114 
              <description>DATA4</description>
15115 
              <bitOffset>0</bitOffset>
15116 
              <bitWidth>8</bitWidth>
15117 
            </field>
15118 
          </fields>
15119 
        </register>
15120 
        <register>
15121 
          <name>CAN_TI1R</name>
15122 
          <displayName>CAN_TI1R</displayName>
15123 
          <description>CAN_TI1R</description>
15124 
          <addressOffset>0x190</addressOffset>
15125 
          <size>0x20</size>
15126 
          <access>read-write</access>
15127 
          <resetValue>0x00000000</resetValue>
15128 
          <fields>
15129 
            <field>
15130 
              <name>STID</name>
15131 
              <description>STID</description>
15132 
              <bitOffset>21</bitOffset>
15133 
              <bitWidth>11</bitWidth>
15134 
            </field>
15135 
            <field>
15136 
              <name>EXID</name>
15137 
              <description>EXID</description>
15138 
              <bitOffset>3</bitOffset>
15139 
              <bitWidth>18</bitWidth>
15140 
            </field>
15141 
            <field>
15142 
              <name>IDE</name>
15143 
              <description>IDE</description>
15144 
              <bitOffset>2</bitOffset>
15145 
              <bitWidth>1</bitWidth>
15146 
            </field>
15147 
            <field>
15148 
              <name>RTR</name>
15149 
              <description>RTR</description>
15150 
              <bitOffset>1</bitOffset>
15151 
              <bitWidth>1</bitWidth>
15152 
            </field>
15153 
            <field>
15154 
              <name>TXRQ</name>
15155 
              <description>TXRQ</description>
15156 
              <bitOffset>0</bitOffset>
15157 
              <bitWidth>1</bitWidth>
15158 
            </field>
15159 
          </fields>
15160 
        </register>
15161 
        <register>
15162 
          <name>CAN_TDT1R</name>
15163 
          <displayName>CAN_TDT1R</displayName>
15164 
          <description>CAN_TDT1R</description>
15165 
          <addressOffset>0x194</addressOffset>
15166 
          <size>0x20</size>
15167 
          <access>read-write</access>
15168 
          <resetValue>0x00000000</resetValue>
15169 
          <fields>
15170 
            <field>
15171 
              <name>TIME</name>
15172 
              <description>TIME</description>
15173 
              <bitOffset>16</bitOffset>
15174 
              <bitWidth>16</bitWidth>
15175 
            </field>
15176 
            <field>
15177 
              <name>TGT</name>
15178 
              <description>TGT</description>
15179 
              <bitOffset>8</bitOffset>
15180 
              <bitWidth>1</bitWidth>
15181 
            </field>
15182 
            <field>
15183 
              <name>DLC</name>
15184 
              <description>DLC</description>
15185 
              <bitOffset>0</bitOffset>
15186 
              <bitWidth>4</bitWidth>
15187 
            </field>
15188 
          </fields>
15189 
        </register>
15190 
        <register>
15191 
          <name>CAN_TDL1R</name>
15192 
          <displayName>CAN_TDL1R</displayName>
15193 
          <description>CAN_TDL1R</description>
15194 
          <addressOffset>0x198</addressOffset>
15195 
          <size>0x20</size>
15196 
          <access>read-write</access>
15197 
          <resetValue>0x00000000</resetValue>
15198 
          <fields>
15199 
            <field>
15200 
              <name>DATA3</name>
15201 
              <description>DATA3</description>
15202 
              <bitOffset>24</bitOffset>
15203 
              <bitWidth>8</bitWidth>
15204 
            </field>
15205 
            <field>
15206 
              <name>DATA2</name>
15207 
              <description>DATA2</description>
15208 
              <bitOffset>16</bitOffset>
15209 
              <bitWidth>8</bitWidth>
15210 
            </field>
15211 
            <field>
15212 
              <name>DATA1</name>
15213 
              <description>DATA1</description>
15214 
              <bitOffset>8</bitOffset>
15215 
              <bitWidth>8</bitWidth>
15216 
            </field>
15217 
            <field>
15218 
              <name>DATA0</name>
15219 
              <description>DATA0</description>
15220 
              <bitOffset>0</bitOffset>
15221 
              <bitWidth>8</bitWidth>
15222 
            </field>
15223 
          </fields>
15224 
        </register>
15225 
        <register>
15226 
          <name>CAN_TDH1R</name>
15227 
          <displayName>CAN_TDH1R</displayName>
15228 
          <description>CAN_TDH1R</description>
15229 
          <addressOffset>0x19C</addressOffset>
15230 
          <size>0x20</size>
15231 
          <access>read-write</access>
15232 
          <resetValue>0x00000000</resetValue>
15233 
          <fields>
15234 
            <field>
15235 
              <name>DATA7</name>
15236 
              <description>DATA7</description>
15237 
              <bitOffset>24</bitOffset>
15238 
              <bitWidth>8</bitWidth>
15239 
            </field>
15240 
            <field>
15241 
              <name>DATA6</name>
15242 
              <description>DATA6</description>
15243 
              <bitOffset>16</bitOffset>
15244 
              <bitWidth>8</bitWidth>
15245 
            </field>
15246 
            <field>
15247 
              <name>DATA5</name>
15248 
              <description>DATA5</description>
15249 
              <bitOffset>8</bitOffset>
15250 
              <bitWidth>8</bitWidth>
15251 
            </field>
15252 
            <field>
15253 
              <name>DATA4</name>
15254 
              <description>DATA4</description>
15255 
              <bitOffset>0</bitOffset>
15256 
              <bitWidth>8</bitWidth>
15257 
            </field>
15258 
          </fields>
15259 
        </register>
15260 
        <register>
15261 
          <name>CAN_TI2R</name>
15262 
          <displayName>CAN_TI2R</displayName>
15263 
          <description>CAN_TI2R</description>
15264 
          <addressOffset>0x1A0</addressOffset>
15265 
          <size>0x20</size>
15266 
          <access>read-write</access>
15267 
          <resetValue>0x00000000</resetValue>
15268 
          <fields>
15269 
            <field>
15270 
              <name>STID</name>
15271 
              <description>STID</description>
15272 
              <bitOffset>21</bitOffset>
15273 
              <bitWidth>11</bitWidth>
15274 
            </field>
15275 
            <field>
15276 
              <name>EXID</name>
15277 
              <description>EXID</description>
15278 
              <bitOffset>3</bitOffset>
15279 
              <bitWidth>18</bitWidth>
15280 
            </field>
15281 
            <field>
15282 
              <name>IDE</name>
15283 
              <description>IDE</description>
15284 
              <bitOffset>2</bitOffset>
15285 
              <bitWidth>1</bitWidth>
15286 
            </field>
15287 
            <field>
15288 
              <name>RTR</name>
15289 
              <description>RTR</description>
15290 
              <bitOffset>1</bitOffset>
15291 
              <bitWidth>1</bitWidth>
15292 
            </field>
15293 
            <field>
15294 
              <name>TXRQ</name>
15295 
              <description>TXRQ</description>
15296 
              <bitOffset>0</bitOffset>
15297 
              <bitWidth>1</bitWidth>
15298 
            </field>
15299 
          </fields>
15300 
        </register>
15301 
        <register>
15302 
          <name>CAN_TDT2R</name>
15303 
          <displayName>CAN_TDT2R</displayName>
15304 
          <description>CAN_TDT2R</description>
15305 
          <addressOffset>0x1A4</addressOffset>
15306 
          <size>0x20</size>
15307 
          <access>read-write</access>
15308 
          <resetValue>0x00000000</resetValue>
15309 
          <fields>
15310 
            <field>
15311 
              <name>TIME</name>
15312 
              <description>TIME</description>
15313 
              <bitOffset>16</bitOffset>
15314 
              <bitWidth>16</bitWidth>
15315 
            </field>
15316 
            <field>
15317 
              <name>TGT</name>
15318 
              <description>TGT</description>
15319 
              <bitOffset>8</bitOffset>
15320 
              <bitWidth>1</bitWidth>
15321 
            </field>
15322 
            <field>
15323 
              <name>DLC</name>
15324 
              <description>DLC</description>
15325 
              <bitOffset>0</bitOffset>
15326 
              <bitWidth>4</bitWidth>
15327 
            </field>
15328 
          </fields>
15329 
        </register>
15330 
        <register>
15331 
          <name>CAN_TDL2R</name>
15332 
          <displayName>CAN_TDL2R</displayName>
15333 
          <description>CAN_TDL2R</description>
15334 
          <addressOffset>0x1A8</addressOffset>
15335 
          <size>0x20</size>
15336 
          <access>read-write</access>
15337 
          <resetValue>0x00000000</resetValue>
15338 
          <fields>
15339 
            <field>
15340 
              <name>DATA3</name>
15341 
              <description>DATA3</description>
15342 
              <bitOffset>24</bitOffset>
15343 
              <bitWidth>8</bitWidth>
15344 
            </field>
15345 
            <field>
15346 
              <name>DATA2</name>
15347 
              <description>DATA2</description>
15348 
              <bitOffset>16</bitOffset>
15349 
              <bitWidth>8</bitWidth>
15350 
            </field>
15351 
            <field>
15352 
              <name>DATA1</name>
15353 
              <description>DATA1</description>
15354 
              <bitOffset>8</bitOffset>
15355 
              <bitWidth>8</bitWidth>
15356 
            </field>
15357 
            <field>
15358 
              <name>DATA0</name>
15359 
              <description>DATA0</description>
15360 
              <bitOffset>0</bitOffset>
15361 
              <bitWidth>8</bitWidth>
15362 
            </field>
15363 
          </fields>
15364 
        </register>
15365 
        <register>
15366 
          <name>CAN_TDH2R</name>
15367 
          <displayName>CAN_TDH2R</displayName>
15368 
          <description>CAN_TDH2R</description>
15369 
          <addressOffset>0x1AC</addressOffset>
15370 
          <size>0x20</size>
15371 
          <access>read-write</access>
15372 
          <resetValue>0x00000000</resetValue>
15373 
          <fields>
15374 
            <field>
15375 
              <name>DATA7</name>
15376 
              <description>DATA7</description>
15377 
              <bitOffset>24</bitOffset>
15378 
              <bitWidth>8</bitWidth>
15379 
            </field>
15380 
            <field>
15381 
              <name>DATA6</name>
15382 
              <description>DATA6</description>
15383 
              <bitOffset>16</bitOffset>
15384 
              <bitWidth>8</bitWidth>
15385 
            </field>
15386 
            <field>
15387 
              <name>DATA5</name>
15388 
              <description>DATA5</description>
15389 
              <bitOffset>8</bitOffset>
15390 
              <bitWidth>8</bitWidth>
15391 
            </field>
15392 
            <field>
15393 
              <name>DATA4</name>
15394 
              <description>DATA4</description>
15395 
              <bitOffset>0</bitOffset>
15396 
              <bitWidth>8</bitWidth>
15397 
            </field>
15398 
          </fields>
15399 
        </register>
15400 
        <register>
15401 
          <name>CAN_RI0R</name>
15402 
          <displayName>CAN_RI0R</displayName>
15403 
          <description>CAN_RI0R</description>
15404 
          <addressOffset>0x1B0</addressOffset>
15405 
          <size>0x20</size>
15406 
          <access>read-only</access>
15407 
          <resetValue>0x00000000</resetValue>
15408 
          <fields>
15409 
            <field>
15410 
              <name>STID</name>
15411 
              <description>STID</description>
15412 
              <bitOffset>21</bitOffset>
15413 
              <bitWidth>11</bitWidth>
15414 
            </field>
15415 
            <field>
15416 
              <name>EXID</name>
15417 
              <description>EXID</description>
15418 
              <bitOffset>3</bitOffset>
15419 
              <bitWidth>18</bitWidth>
15420 
            </field>
15421 
            <field>
15422 
              <name>IDE</name>
15423 
              <description>IDE</description>
15424 
              <bitOffset>2</bitOffset>
15425 
              <bitWidth>1</bitWidth>
15426 
            </field>
15427 
            <field>
15428 
              <name>RTR</name>
15429 
              <description>RTR</description>
15430 
              <bitOffset>1</bitOffset>
15431 
              <bitWidth>1</bitWidth>
15432 
            </field>
15433 
          </fields>
15434 
        </register>
15435 
        <register>
15436 
          <name>CAN_RDT0R</name>
15437 
          <displayName>CAN_RDT0R</displayName>
15438 
          <description>CAN_RDT0R</description>
15439 
          <addressOffset>0x1B4</addressOffset>
15440 
          <size>0x20</size>
15441 
          <access>read-only</access>
15442 
          <resetValue>0x00000000</resetValue>
15443 
          <fields>
15444 
            <field>
15445 
              <name>TIME</name>
15446 
              <description>TIME</description>
15447 
              <bitOffset>16</bitOffset>
15448 
              <bitWidth>16</bitWidth>
15449 
            </field>
15450 
            <field>
15451 
              <name>FMI</name>
15452 
              <description>FMI</description>
15453 
              <bitOffset>8</bitOffset>
15454 
              <bitWidth>8</bitWidth>
15455 
            </field>
15456 
            <field>
15457 
              <name>DLC</name>
15458 
              <description>DLC</description>
15459 
              <bitOffset>0</bitOffset>
15460 
              <bitWidth>4</bitWidth>
15461 
            </field>
15462 
          </fields>
15463 
        </register>
15464 
        <register>
15465 
          <name>CAN_RDL0R</name>
15466 
          <displayName>CAN_RDL0R</displayName>
15467 
          <description>CAN_RDL0R</description>
15468 
          <addressOffset>0x1B8</addressOffset>
15469 
          <size>0x20</size>
15470 
          <access>read-only</access>
15471 
          <resetValue>0x00000000</resetValue>
15472 
          <fields>
15473 
            <field>
15474 
              <name>DATA3</name>
15475 
              <description>DATA3</description>
15476 
              <bitOffset>24</bitOffset>
15477 
              <bitWidth>8</bitWidth>
15478 
            </field>
15479 
            <field>
15480 
              <name>DATA2</name>
15481 
              <description>DATA2</description>
15482 
              <bitOffset>16</bitOffset>
15483 
              <bitWidth>8</bitWidth>
15484 
            </field>
15485 
            <field>
15486 
              <name>DATA1</name>
15487 
              <description>DATA1</description>
15488 
              <bitOffset>8</bitOffset>
15489 
              <bitWidth>8</bitWidth>
15490 
            </field>
15491 
            <field>
15492 
              <name>DATA0</name>
15493 
              <description>DATA0</description>
15494 
              <bitOffset>0</bitOffset>
15495 
              <bitWidth>8</bitWidth>
15496 
            </field>
15497 
          </fields>
15498 
        </register>
15499 
        <register>
15500 
          <name>CAN_RDH0R</name>
15501 
          <displayName>CAN_RDH0R</displayName>
15502 
          <description>CAN_RDH0R</description>
15503 
          <addressOffset>0x1BC</addressOffset>
15504 
          <size>0x20</size>
15505 
          <access>read-only</access>
15506 
          <resetValue>0x00000000</resetValue>
15507 
          <fields>
15508 
            <field>
15509 
              <name>DATA7</name>
15510 
              <description>DATA7</description>
15511 
              <bitOffset>24</bitOffset>
15512 
              <bitWidth>8</bitWidth>
15513 
            </field>
15514 
            <field>
15515 
              <name>DATA6</name>
15516 
              <description>DATA6</description>
15517 
              <bitOffset>16</bitOffset>
15518 
              <bitWidth>8</bitWidth>
15519 
            </field>
15520 
            <field>
15521 
              <name>DATA5</name>
15522 
              <description>DATA5</description>
15523 
              <bitOffset>8</bitOffset>
15524 
              <bitWidth>8</bitWidth>
15525 
            </field>
15526 
            <field>
15527 
              <name>DATA4</name>
15528 
              <description>DATA4</description>
15529 
              <bitOffset>0</bitOffset>
15530 
              <bitWidth>8</bitWidth>
15531 
            </field>
15532 
          </fields>
15533 
        </register>
15534 
        <register>
15535 
          <name>CAN_RI1R</name>
15536 
          <displayName>CAN_RI1R</displayName>
15537 
          <description>CAN_RI1R</description>
15538 
          <addressOffset>0x1C0</addressOffset>
15539 
          <size>0x20</size>
15540 
          <access>read-only</access>
15541 
          <resetValue>0x00000000</resetValue>
15542 
          <fields>
15543 
            <field>
15544 
              <name>STID</name>
15545 
              <description>STID</description>
15546 
              <bitOffset>21</bitOffset>
15547 
              <bitWidth>11</bitWidth>
15548 
            </field>
15549 
            <field>
15550 
              <name>EXID</name>
15551 
              <description>EXID</description>
15552 
              <bitOffset>3</bitOffset>
15553 
              <bitWidth>18</bitWidth>
15554 
            </field>
15555 
            <field>
15556 
              <name>IDE</name>
15557 
              <description>IDE</description>
15558 
              <bitOffset>2</bitOffset>
15559 
              <bitWidth>1</bitWidth>
15560 
            </field>
15561 
            <field>
15562 
              <name>RTR</name>
15563 
              <description>RTR</description>
15564 
              <bitOffset>1</bitOffset>
15565 
              <bitWidth>1</bitWidth>
15566 
            </field>
15567 
          </fields>
15568 
        </register>
15569 
        <register>
15570 
          <name>CAN_RDT1R</name>
15571 
          <displayName>CAN_RDT1R</displayName>
15572 
          <description>CAN_RDT1R</description>
15573 
          <addressOffset>0x1C4</addressOffset>
15574 
          <size>0x20</size>
15575 
          <access>read-only</access>
15576 
          <resetValue>0x00000000</resetValue>
15577 
          <fields>
15578 
            <field>
15579 
              <name>TIME</name>
15580 
              <description>TIME</description>
15581 
              <bitOffset>16</bitOffset>
15582 
              <bitWidth>16</bitWidth>
15583 
            </field>
15584 
            <field>
15585 
              <name>FMI</name>
15586 
              <description>FMI</description>
15587 
              <bitOffset>8</bitOffset>
15588 
              <bitWidth>8</bitWidth>
15589 
            </field>
15590 
            <field>
15591 
              <name>DLC</name>
15592 
              <description>DLC</description>
15593 
              <bitOffset>0</bitOffset>
15594 
              <bitWidth>4</bitWidth>
15595 
            </field>
15596 
          </fields>
15597 
        </register>
15598 
        <register>
15599 
          <name>CAN_RDL1R</name>
15600 
          <displayName>CAN_RDL1R</displayName>
15601 
          <description>CAN_RDL1R</description>
15602 
          <addressOffset>0x1C8</addressOffset>
15603 
          <size>0x20</size>
15604 
          <access>read-only</access>
15605 
          <resetValue>0x00000000</resetValue>
15606 
          <fields>
15607 
            <field>
15608 
              <name>DATA3</name>
15609 
              <description>DATA3</description>
15610 
              <bitOffset>24</bitOffset>
15611 
              <bitWidth>8</bitWidth>
15612 
            </field>
15613 
            <field>
15614 
              <name>DATA2</name>
15615 
              <description>DATA2</description>
15616 
              <bitOffset>16</bitOffset>
15617 
              <bitWidth>8</bitWidth>
15618 
            </field>
15619 
            <field>
15620 
              <name>DATA1</name>
15621 
              <description>DATA1</description>
15622 
              <bitOffset>8</bitOffset>
15623 
              <bitWidth>8</bitWidth>
15624 
            </field>
15625 
            <field>
15626 
              <name>DATA0</name>
15627 
              <description>DATA0</description>
15628 
              <bitOffset>0</bitOffset>
15629 
              <bitWidth>8</bitWidth>
15630 
            </field>
15631 
          </fields>
15632 
        </register>
15633 
        <register>
15634 
          <name>CAN_RDH1R</name>
15635 
          <displayName>CAN_RDH1R</displayName>
15636 
          <description>CAN_RDH1R</description>
15637 
          <addressOffset>0x1CC</addressOffset>
15638 
          <size>0x20</size>
15639 
          <access>read-only</access>
15640 
          <resetValue>0x00000000</resetValue>
15641 
          <fields>
15642 
            <field>
15643 
              <name>DATA7</name>
15644 
              <description>DATA7</description>
15645 
              <bitOffset>24</bitOffset>
15646 
              <bitWidth>8</bitWidth>
15647 
            </field>
15648 
            <field>
15649 
              <name>DATA6</name>
15650 
              <description>DATA6</description>
15651 
              <bitOffset>16</bitOffset>
15652 
              <bitWidth>8</bitWidth>
15653 
            </field>
15654 
            <field>
15655 
              <name>DATA5</name>
15656 
              <description>DATA5</description>
15657 
              <bitOffset>8</bitOffset>
15658 
              <bitWidth>8</bitWidth>
15659 
            </field>
15660 
            <field>
15661 
              <name>DATA4</name>
15662 
              <description>DATA4</description>
15663 
              <bitOffset>0</bitOffset>
15664 
              <bitWidth>8</bitWidth>
15665 
            </field>
15666 
          </fields>
15667 
        </register>
15668 
        <register>
15669 
          <name>CAN_FMR</name>
15670 
          <displayName>CAN_FMR</displayName>
15671 
          <description>CAN_FMR</description>
15672 
          <addressOffset>0x200</addressOffset>
15673 
          <size>0x20</size>
15674 
          <access>read-write</access>
15675 
          <resetValue>0x00000000</resetValue>
15676 
          <fields>
15677 
            <field>
15678 
              <name>FINIT</name>
15679 
              <description>FINIT</description>
15680 
              <bitOffset>0</bitOffset>
15681 
              <bitWidth>1</bitWidth>
15682 
            </field>
15683 
          </fields>
15684 
        </register>
15685 
        <register>
15686 
          <name>CAN_FM1R</name>
15687 
          <displayName>CAN_FM1R</displayName>
15688 
          <description>CAN_FM1R</description>
15689 
          <addressOffset>0x204</addressOffset>
15690 
          <size>0x20</size>
15691 
          <access>read-write</access>
15692 
          <resetValue>0x00000000</resetValue>
15693 
          <fields>
15694 
            <field>
15695 
              <name>FBM0</name>
15696 
              <description>Filter mode</description>
15697 
              <bitOffset>0</bitOffset>
15698 
              <bitWidth>1</bitWidth>
15699 
            </field>
15700 
            <field>
15701 
              <name>FBM1</name>
15702 
              <description>Filter mode</description>
15703 
              <bitOffset>1</bitOffset>
15704 
              <bitWidth>1</bitWidth>
15705 
            </field>
15706 
            <field>
15707 
              <name>FBM2</name>
15708 
              <description>Filter mode</description>
15709 
              <bitOffset>2</bitOffset>
15710 
              <bitWidth>1</bitWidth>
15711 
            </field>
15712 
            <field>
15713 
              <name>FBM3</name>
15714 
              <description>Filter mode</description>
15715 
              <bitOffset>3</bitOffset>
15716 
              <bitWidth>1</bitWidth>
15717 
            </field>
15718 
            <field>
15719 
              <name>FBM4</name>
15720 
              <description>Filter mode</description>
15721 
              <bitOffset>4</bitOffset>
15722 
              <bitWidth>1</bitWidth>
15723 
            </field>
15724 
            <field>
15725 
              <name>FBM5</name>
15726 
              <description>Filter mode</description>
15727 
              <bitOffset>5</bitOffset>
15728 
              <bitWidth>1</bitWidth>
15729 
            </field>
15730 
            <field>
15731 
              <name>FBM6</name>
15732 
              <description>Filter mode</description>
15733 
              <bitOffset>6</bitOffset>
15734 
              <bitWidth>1</bitWidth>
15735 
            </field>
15736 
            <field>
15737 
              <name>FBM7</name>
15738 
              <description>Filter mode</description>
15739 
              <bitOffset>7</bitOffset>
15740 
              <bitWidth>1</bitWidth>
15741 
            </field>
15742 
            <field>
15743 
              <name>FBM8</name>
15744 
              <description>Filter mode</description>
15745 
              <bitOffset>8</bitOffset>
15746 
              <bitWidth>1</bitWidth>
15747 
            </field>
15748 
            <field>
15749 
              <name>FBM9</name>
15750 
              <description>Filter mode</description>
15751 
              <bitOffset>9</bitOffset>
15752 
              <bitWidth>1</bitWidth>
15753 
            </field>
15754 
            <field>
15755 
              <name>FBM10</name>
15756 
              <description>Filter mode</description>
15757 
              <bitOffset>10</bitOffset>
15758 
              <bitWidth>1</bitWidth>
15759 
            </field>
15760 
            <field>
15761 
              <name>FBM11</name>
15762 
              <description>Filter mode</description>
15763 
              <bitOffset>11</bitOffset>
15764 
              <bitWidth>1</bitWidth>
15765 
            </field>
15766 
            <field>
15767 
              <name>FBM12</name>
15768 
              <description>Filter mode</description>
15769 
              <bitOffset>12</bitOffset>
15770 
              <bitWidth>1</bitWidth>
15771 
            </field>
15772 
            <field>
15773 
              <name>FBM13</name>
15774 
              <description>Filter mode</description>
15775 
              <bitOffset>13</bitOffset>
15776 
              <bitWidth>1</bitWidth>
15777 
            </field>
15778 
          </fields>
15779 
        </register>
15780 
        <register>
15781 
          <name>CAN_FS1R</name>
15782 
          <displayName>CAN_FS1R</displayName>
15783 
          <description>CAN_FS1R</description>
15784 
          <addressOffset>0x20C</addressOffset>
15785 
          <size>0x20</size>
15786 
          <access>read-write</access>
15787 
          <resetValue>0x00000000</resetValue>
15788 
          <fields>
15789 
            <field>
15790 
              <name>FSC0</name>
15791 
              <description>Filter scale configuration</description>
15792 
              <bitOffset>0</bitOffset>
15793 
              <bitWidth>1</bitWidth>
15794 
            </field>
15795 
            <field>
15796 
              <name>FSC1</name>
15797 
              <description>Filter scale configuration</description>
15798 
              <bitOffset>1</bitOffset>
15799 
              <bitWidth>1</bitWidth>
15800 
            </field>
15801 
            <field>
15802 
              <name>FSC2</name>
15803 
              <description>Filter scale configuration</description>
15804 
              <bitOffset>2</bitOffset>
15805 
              <bitWidth>1</bitWidth>
15806 
            </field>
15807 
            <field>
15808 
              <name>FSC3</name>
15809 
              <description>Filter scale configuration</description>
15810 
              <bitOffset>3</bitOffset>
15811 
              <bitWidth>1</bitWidth>
15812 
            </field>
15813 
            <field>
15814 
              <name>FSC4</name>
15815 
              <description>Filter scale configuration</description>
15816 
              <bitOffset>4</bitOffset>
15817 
              <bitWidth>1</bitWidth>
15818 
            </field>
15819 
            <field>
15820 
              <name>FSC5</name>
15821 
              <description>Filter scale configuration</description>
15822 
              <bitOffset>5</bitOffset>
15823 
              <bitWidth>1</bitWidth>
15824 
            </field>
15825 
            <field>
15826 
              <name>FSC6</name>
15827 
              <description>Filter scale configuration</description>
15828 
              <bitOffset>6</bitOffset>
15829 
              <bitWidth>1</bitWidth>
15830 
            </field>
15831 
            <field>
15832 
              <name>FSC7</name>
15833 
              <description>Filter scale configuration</description>
15834 
              <bitOffset>7</bitOffset>
15835 
              <bitWidth>1</bitWidth>
15836 
            </field>
15837 
            <field>
15838 
              <name>FSC8</name>
15839 
              <description>Filter scale configuration</description>
15840 
              <bitOffset>8</bitOffset>
15841 
              <bitWidth>1</bitWidth>
15842 
            </field>
15843 
            <field>
15844 
              <name>FSC9</name>
15845 
              <description>Filter scale configuration</description>
15846 
              <bitOffset>9</bitOffset>
15847 
              <bitWidth>1</bitWidth>
15848 
            </field>
15849 
            <field>
15850 
              <name>FSC10</name>
15851 
              <description>Filter scale configuration</description>
15852 
              <bitOffset>10</bitOffset>
15853 
              <bitWidth>1</bitWidth>
15854 
            </field>
15855 
            <field>
15856 
              <name>FSC11</name>
15857 
              <description>Filter scale configuration</description>
15858 
              <bitOffset>11</bitOffset>
15859 
              <bitWidth>1</bitWidth>
15860 
            </field>
15861 
            <field>
15862 
              <name>FSC12</name>
15863 
              <description>Filter scale configuration</description>
15864 
              <bitOffset>12</bitOffset>
15865 
              <bitWidth>1</bitWidth>
15866 
            </field>
15867 
            <field>
15868 
              <name>FSC13</name>
15869 
              <description>Filter scale configuration</description>
15870 
              <bitOffset>13</bitOffset>
15871 
              <bitWidth>1</bitWidth>
15872 
            </field>
15873 
          </fields>
15874 
        </register>
15875 
        <register>
15876 
          <name>CAN_FFA1R</name>
15877 
          <displayName>CAN_FFA1R</displayName>
15878 
          <description>CAN_FFA1R</description>
15879 
          <addressOffset>0x214</addressOffset>
15880 
          <size>0x20</size>
15881 
          <access>read-write</access>
15882 
          <resetValue>0x00000000</resetValue>
15883 
          <fields>
15884 
            <field>
15885 
              <name>FFA0</name>
15886 
              <description>Filter FIFO assignment for filter
15887 
              0</description>
15888 
              <bitOffset>0</bitOffset>
15889 
              <bitWidth>1</bitWidth>
15890 
            </field>
15891 
            <field>
15892 
              <name>FFA1</name>
15893 
              <description>Filter FIFO assignment for filter
15894 
              1</description>
15895 
              <bitOffset>1</bitOffset>
15896 
              <bitWidth>1</bitWidth>
15897 
            </field>
15898 
            <field>
15899 
              <name>FFA2</name>
15900 
              <description>Filter FIFO assignment for filter
15901 
              2</description>
15902 
              <bitOffset>2</bitOffset>
15903 
              <bitWidth>1</bitWidth>
15904 
            </field>
15905 
            <field>
15906 
              <name>FFA3</name>
15907 
              <description>Filter FIFO assignment for filter
15908 
              3</description>
15909 
              <bitOffset>3</bitOffset>
15910 
              <bitWidth>1</bitWidth>
15911 
            </field>
15912 
            <field>
15913 
              <name>FFA4</name>
15914 
              <description>Filter FIFO assignment for filter
15915 
              4</description>
15916 
              <bitOffset>4</bitOffset>
15917 
              <bitWidth>1</bitWidth>
15918 
            </field>
15919 
            <field>
15920 
              <name>FFA5</name>
15921 
              <description>Filter FIFO assignment for filter
15922 
              5</description>
15923 
              <bitOffset>5</bitOffset>
15924 
              <bitWidth>1</bitWidth>
15925 
            </field>
15926 
            <field>
15927 
              <name>FFA6</name>
15928 
              <description>Filter FIFO assignment for filter
15929 
              6</description>
15930 
              <bitOffset>6</bitOffset>
15931 
              <bitWidth>1</bitWidth>
15932 
            </field>
15933 
            <field>
15934 
              <name>FFA7</name>
15935 
              <description>Filter FIFO assignment for filter
15936 
              7</description>
15937 
              <bitOffset>7</bitOffset>
15938 
              <bitWidth>1</bitWidth>
15939 
            </field>
15940 
            <field>
15941 
              <name>FFA8</name>
15942 
              <description>Filter FIFO assignment for filter
15943 
              8</description>
15944 
              <bitOffset>8</bitOffset>
15945 
              <bitWidth>1</bitWidth>
15946 
            </field>
15947 
            <field>
15948 
              <name>FFA9</name>
15949 
              <description>Filter FIFO assignment for filter
15950 
              9</description>
15951 
              <bitOffset>9</bitOffset>
15952 
              <bitWidth>1</bitWidth>
15953 
            </field>
15954 
            <field>
15955 
              <name>FFA10</name>
15956 
              <description>Filter FIFO assignment for filter
15957 
              10</description>
15958 
              <bitOffset>10</bitOffset>
15959 
              <bitWidth>1</bitWidth>
15960 
            </field>
15961 
            <field>
15962 
              <name>FFA11</name>
15963 
              <description>Filter FIFO assignment for filter
15964 
              11</description>
15965 
              <bitOffset>11</bitOffset>
15966 
              <bitWidth>1</bitWidth>
15967 
            </field>
15968 
            <field>
15969 
              <name>FFA12</name>
15970 
              <description>Filter FIFO assignment for filter
15971 
              12</description>
15972 
              <bitOffset>12</bitOffset>
15973 
              <bitWidth>1</bitWidth>
15974 
            </field>
15975 
            <field>
15976 
              <name>FFA13</name>
15977 
              <description>Filter FIFO assignment for filter
15978 
              13</description>
15979 
              <bitOffset>13</bitOffset>
15980 
              <bitWidth>1</bitWidth>
15981 
            </field>
15982 
          </fields>
15983 
        </register>
15984 
        <register>
15985 
          <name>CAN_FA1R</name>
15986 
          <displayName>CAN_FA1R</displayName>
15987 
          <description>CAN_FA1R</description>
15988 
          <addressOffset>0x21C</addressOffset>
15989 
          <size>0x20</size>
15990 
          <access>read-write</access>
15991 
          <resetValue>0x00000000</resetValue>
15992 
          <fields>
15993 
            <field>
15994 
              <name>FACT0</name>
15995 
              <description>Filter active</description>
15996 
              <bitOffset>0</bitOffset>
15997 
              <bitWidth>1</bitWidth>
15998 
            </field>
15999 
            <field>
16000 
              <name>FACT1</name>
16001 
              <description>Filter active</description>
16002 
              <bitOffset>1</bitOffset>
16003 
              <bitWidth>1</bitWidth>
16004 
            </field>
16005 
            <field>
16006 
              <name>FACT2</name>
16007 
              <description>Filter active</description>
16008 
              <bitOffset>2</bitOffset>
16009 
              <bitWidth>1</bitWidth>
16010 
            </field>
16011 
            <field>
16012 
              <name>FACT3</name>
16013 
              <description>Filter active</description>
16014 
              <bitOffset>3</bitOffset>
16015 
              <bitWidth>1</bitWidth>
16016 
            </field>
16017 
            <field>
16018 
              <name>FACT4</name>
16019 
              <description>Filter active</description>
16020 
              <bitOffset>4</bitOffset>
16021 
              <bitWidth>1</bitWidth>
16022 
            </field>
16023 
            <field>
16024 
              <name>FACT5</name>
16025 
              <description>Filter active</description>
16026 
              <bitOffset>5</bitOffset>
16027 
              <bitWidth>1</bitWidth>
16028 
            </field>
16029 
            <field>
16030 
              <name>FACT6</name>
16031 
              <description>Filter active</description>
16032 
              <bitOffset>6</bitOffset>
16033 
              <bitWidth>1</bitWidth>
16034 
            </field>
16035 
            <field>
16036 
              <name>FACT7</name>
16037 
              <description>Filter active</description>
16038 
              <bitOffset>7</bitOffset>
16039 
              <bitWidth>1</bitWidth>
16040 
            </field>
16041 
            <field>
16042 
              <name>FACT8</name>
16043 
              <description>Filter active</description>
16044 
              <bitOffset>8</bitOffset>
16045 
              <bitWidth>1</bitWidth>
16046 
            </field>
16047 
            <field>
16048 
              <name>FACT9</name>
16049 
              <description>Filter active</description>
16050 
              <bitOffset>9</bitOffset>
16051 
              <bitWidth>1</bitWidth>
16052 
            </field>
16053 
            <field>
16054 
              <name>FACT10</name>
16055 
              <description>Filter active</description>
16056 
              <bitOffset>10</bitOffset>
16057 
              <bitWidth>1</bitWidth>
16058 
            </field>
16059 
            <field>
16060 
              <name>FACT11</name>
16061 
              <description>Filter active</description>
16062 
              <bitOffset>11</bitOffset>
16063 
              <bitWidth>1</bitWidth>
16064 
            </field>
16065 
            <field>
16066 
              <name>FACT12</name>
16067 
              <description>Filter active</description>
16068 
              <bitOffset>12</bitOffset>
16069 
              <bitWidth>1</bitWidth>
16070 
            </field>
16071 
            <field>
16072 
              <name>FACT13</name>
16073 
              <description>Filter active</description>
16074 
              <bitOffset>13</bitOffset>
16075 
              <bitWidth>1</bitWidth>
16076 
            </field>
16077 
          </fields>
16078 
        </register>
16079 
        <register>
16080 
          <name>F0R1</name>
16081 
          <displayName>F0R1</displayName>
16082 
          <description>Filter bank 0 register 1</description>
16083 
          <addressOffset>0x240</addressOffset>
16084 
          <size>0x20</size>
16085 
          <access>read-write</access>
16086 
          <resetValue>0x00000000</resetValue>
16087 
          <fields>
16088 
            <field>
16089 
              <name>FB0</name>
16090 
              <description>Filter bits</description>
16091 
              <bitOffset>0</bitOffset>
16092 
              <bitWidth>1</bitWidth>
16093 
            </field>
16094 
            <field>
16095 
              <name>FB1</name>
16096 
              <description>Filter bits</description>
16097 
              <bitOffset>1</bitOffset>
16098 
              <bitWidth>1</bitWidth>
16099 
            </field>
16100 
            <field>
16101 
              <name>FB2</name>
16102 
              <description>Filter bits</description>
16103 
              <bitOffset>2</bitOffset>
16104 
              <bitWidth>1</bitWidth>
16105 
            </field>
16106 
            <field>
16107 
              <name>FB3</name>
16108 
              <description>Filter bits</description>
16109 
              <bitOffset>3</bitOffset>
16110 
              <bitWidth>1</bitWidth>
16111 
            </field>
16112 
            <field>
16113 
              <name>FB4</name>
16114 
              <description>Filter bits</description>
16115 
              <bitOffset>4</bitOffset>
16116 
              <bitWidth>1</bitWidth>
16117 
            </field>
16118 
            <field>
16119 
              <name>FB5</name>
16120 
              <description>Filter bits</description>
16121 
              <bitOffset>5</bitOffset>
16122 
              <bitWidth>1</bitWidth>
16123 
            </field>
16124 
            <field>
16125 
              <name>FB6</name>
16126 
              <description>Filter bits</description>
16127 
              <bitOffset>6</bitOffset>
16128 
              <bitWidth>1</bitWidth>
16129 
            </field>
16130 
            <field>
16131 
              <name>FB7</name>
16132 
              <description>Filter bits</description>
16133 
              <bitOffset>7</bitOffset>
16134 
              <bitWidth>1</bitWidth>
16135 
            </field>
16136 
            <field>
16137 
              <name>FB8</name>
16138 
              <description>Filter bits</description>
16139 
              <bitOffset>8</bitOffset>
16140 
              <bitWidth>1</bitWidth>
16141 
            </field>
16142 
            <field>
16143 
              <name>FB9</name>
16144 
              <description>Filter bits</description>
16145 
              <bitOffset>9</bitOffset>
16146 
              <bitWidth>1</bitWidth>
16147 
            </field>
16148 
            <field>
16149 
              <name>FB10</name>
16150 
              <description>Filter bits</description>
16151 
              <bitOffset>10</bitOffset>
16152 
              <bitWidth>1</bitWidth>
16153 
            </field>
16154 
            <field>
16155 
              <name>FB11</name>
16156 
              <description>Filter bits</description>
16157 
              <bitOffset>11</bitOffset>
16158 
              <bitWidth>1</bitWidth>
16159 
            </field>
16160 
            <field>
16161 
              <name>FB12</name>
16162 
              <description>Filter bits</description>
16163 
              <bitOffset>12</bitOffset>
16164 
              <bitWidth>1</bitWidth>
16165 
            </field>
16166 
            <field>
16167 
              <name>FB13</name>
16168 
              <description>Filter bits</description>
16169 
              <bitOffset>13</bitOffset>
16170 
              <bitWidth>1</bitWidth>
16171 
            </field>
16172 
            <field>
16173 
              <name>FB14</name>
16174 
              <description>Filter bits</description>
16175 
              <bitOffset>14</bitOffset>
16176 
              <bitWidth>1</bitWidth>
16177 
            </field>
16178 
            <field>
16179 
              <name>FB15</name>
16180 
              <description>Filter bits</description>
16181 
              <bitOffset>15</bitOffset>
16182 
              <bitWidth>1</bitWidth>
16183 
            </field>
16184 
            <field>
16185 
              <name>FB16</name>
16186 
              <description>Filter bits</description>
16187 
              <bitOffset>16</bitOffset>
16188 
              <bitWidth>1</bitWidth>
16189 
            </field>
16190 
            <field>
16191 
              <name>FB17</name>
16192 
              <description>Filter bits</description>
16193 
              <bitOffset>17</bitOffset>
16194 
              <bitWidth>1</bitWidth>
16195 
            </field>
16196 
            <field>
16197 
              <name>FB18</name>
16198 
              <description>Filter bits</description>
16199 
              <bitOffset>18</bitOffset>
16200 
              <bitWidth>1</bitWidth>
16201 
            </field>
16202 
            <field>
16203 
              <name>FB19</name>
16204 
              <description>Filter bits</description>
16205 
              <bitOffset>19</bitOffset>
16206 
              <bitWidth>1</bitWidth>
16207 
            </field>
16208 
            <field>
16209 
              <name>FB20</name>
16210 
              <description>Filter bits</description>
16211 
              <bitOffset>20</bitOffset>
16212 
              <bitWidth>1</bitWidth>
16213 
            </field>
16214 
            <field>
16215 
              <name>FB21</name>
16216 
              <description>Filter bits</description>
16217 
              <bitOffset>21</bitOffset>
16218 
              <bitWidth>1</bitWidth>
16219 
            </field>
16220 
            <field>
16221 
              <name>FB22</name>
16222 
              <description>Filter bits</description>
16223 
              <bitOffset>22</bitOffset>
16224 
              <bitWidth>1</bitWidth>
16225 
            </field>
16226 
            <field>
16227 
              <name>FB23</name>
16228 
              <description>Filter bits</description>
16229 
              <bitOffset>23</bitOffset>
16230 
              <bitWidth>1</bitWidth>
16231 
            </field>
16232 
            <field>
16233 
              <name>FB24</name>
16234 
              <description>Filter bits</description>
16235 
              <bitOffset>24</bitOffset>
16236 
              <bitWidth>1</bitWidth>
16237 
            </field>
16238 
            <field>
16239 
              <name>FB25</name>
16240 
              <description>Filter bits</description>
16241 
              <bitOffset>25</bitOffset>
16242 
              <bitWidth>1</bitWidth>
16243 
            </field>
16244 
            <field>
16245 
              <name>FB26</name>
16246 
              <description>Filter bits</description>
16247 
              <bitOffset>26</bitOffset>
16248 
              <bitWidth>1</bitWidth>
16249 
            </field>
16250 
            <field>
16251 
              <name>FB27</name>
16252 
              <description>Filter bits</description>
16253 
              <bitOffset>27</bitOffset>
16254 
              <bitWidth>1</bitWidth>
16255 
            </field>
16256 
            <field>
16257 
              <name>FB28</name>
16258 
              <description>Filter bits</description>
16259 
              <bitOffset>28</bitOffset>
16260 
              <bitWidth>1</bitWidth>
16261 
            </field>
16262 
            <field>
16263 
              <name>FB29</name>
16264 
              <description>Filter bits</description>
16265 
              <bitOffset>29</bitOffset>
16266 
              <bitWidth>1</bitWidth>
16267 
            </field>
16268 
            <field>
16269 
              <name>FB30</name>
16270 
              <description>Filter bits</description>
16271 
              <bitOffset>30</bitOffset>
16272 
              <bitWidth>1</bitWidth>
16273 
            </field>
16274 
            <field>
16275 
              <name>FB31</name>
16276 
              <description>Filter bits</description>
16277 
              <bitOffset>31</bitOffset>
16278 
              <bitWidth>1</bitWidth>
16279 
            </field>
16280 
          </fields>
16281 
        </register>
16282 
        <register>
16283 
          <name>F0R2</name>
16284 
          <displayName>F0R2</displayName>
16285 
          <description>Filter bank 0 register 2</description>
16286 
          <addressOffset>0x244</addressOffset>
16287 
          <size>0x20</size>
16288 
          <access>read-write</access>
16289 
          <resetValue>0x00000000</resetValue>
16290 
          <fields>
16291 
            <field>
16292 
              <name>FB0</name>
16293 
              <description>Filter bits</description>
16294 
              <bitOffset>0</bitOffset>
16295 
              <bitWidth>1</bitWidth>
16296 
            </field>
16297 
            <field>
16298 
              <name>FB1</name>
16299 
              <description>Filter bits</description>
16300 
              <bitOffset>1</bitOffset>
16301 
              <bitWidth>1</bitWidth>
16302 
            </field>
16303 
            <field>
16304 
              <name>FB2</name>
16305 
              <description>Filter bits</description>
16306 
              <bitOffset>2</bitOffset>
16307 
              <bitWidth>1</bitWidth>
16308 
            </field>
16309 
            <field>
16310 
              <name>FB3</name>
16311 
              <description>Filter bits</description>
16312 
              <bitOffset>3</bitOffset>
16313 
              <bitWidth>1</bitWidth>
16314 
            </field>
16315 
            <field>
16316 
              <name>FB4</name>
16317 
              <description>Filter bits</description>
16318 
              <bitOffset>4</bitOffset>
16319 
              <bitWidth>1</bitWidth>
16320 
            </field>
16321 
            <field>
16322 
              <name>FB5</name>
16323 
              <description>Filter bits</description>
16324 
              <bitOffset>5</bitOffset>
16325 
              <bitWidth>1</bitWidth>
16326 
            </field>
16327 
            <field>
16328 
              <name>FB6</name>
16329 
              <description>Filter bits</description>
16330 
              <bitOffset>6</bitOffset>
16331 
              <bitWidth>1</bitWidth>
16332 
            </field>
16333 
            <field>
16334 
              <name>FB7</name>
16335 
              <description>Filter bits</description>
16336 
              <bitOffset>7</bitOffset>
16337 
              <bitWidth>1</bitWidth>
16338 
            </field>
16339 
            <field>
16340 
              <name>FB8</name>
16341 
              <description>Filter bits</description>
16342 
              <bitOffset>8</bitOffset>
16343 
              <bitWidth>1</bitWidth>
16344 
            </field>
16345 
            <field>
16346 
              <name>FB9</name>
16347 
              <description>Filter bits</description>
16348 
              <bitOffset>9</bitOffset>
16349 
              <bitWidth>1</bitWidth>
16350 
            </field>
16351 
            <field>
16352 
              <name>FB10</name>
16353 
              <description>Filter bits</description>
16354 
              <bitOffset>10</bitOffset>
16355 
              <bitWidth>1</bitWidth>
16356 
            </field>
16357 
            <field>
16358 
              <name>FB11</name>
16359 
              <description>Filter bits</description>
16360 
              <bitOffset>11</bitOffset>
16361 
              <bitWidth>1</bitWidth>
16362 
            </field>
16363 
            <field>
16364 
              <name>FB12</name>
16365 
              <description>Filter bits</description>
16366 
              <bitOffset>12</bitOffset>
16367 
              <bitWidth>1</bitWidth>
16368 
            </field>
16369 
            <field>
16370 
              <name>FB13</name>
16371 
              <description>Filter bits</description>
16372 
              <bitOffset>13</bitOffset>
16373 
              <bitWidth>1</bitWidth>
16374 
            </field>
16375 
            <field>
16376 
              <name>FB14</name>
16377 
              <description>Filter bits</description>
16378 
              <bitOffset>14</bitOffset>
16379 
              <bitWidth>1</bitWidth>
16380 
            </field>
16381 
            <field>
16382 
              <name>FB15</name>
16383 
              <description>Filter bits</description>
16384 
              <bitOffset>15</bitOffset>
16385 
              <bitWidth>1</bitWidth>
16386 
            </field>
16387 
            <field>
16388 
              <name>FB16</name>
16389 
              <description>Filter bits</description>
16390 
              <bitOffset>16</bitOffset>
16391 
              <bitWidth>1</bitWidth>
16392 
            </field>
16393 
            <field>
16394 
              <name>FB17</name>
16395 
              <description>Filter bits</description>
16396 
              <bitOffset>17</bitOffset>
16397 
              <bitWidth>1</bitWidth>
16398 
            </field>
16399 
            <field>
16400 
              <name>FB18</name>
16401 
              <description>Filter bits</description>
16402 
              <bitOffset>18</bitOffset>
16403 
              <bitWidth>1</bitWidth>
16404 
            </field>
16405 
            <field>
16406 
              <name>FB19</name>
16407 
              <description>Filter bits</description>
16408 
              <bitOffset>19</bitOffset>
16409 
              <bitWidth>1</bitWidth>
16410 
            </field>
16411 
            <field>
16412 
              <name>FB20</name>
16413 
              <description>Filter bits</description>
16414 
              <bitOffset>20</bitOffset>
16415 
              <bitWidth>1</bitWidth>
16416 
            </field>
16417 
            <field>
16418 
              <name>FB21</name>
16419 
              <description>Filter bits</description>
16420 
              <bitOffset>21</bitOffset>
16421 
              <bitWidth>1</bitWidth>
16422 
            </field>
16423 
            <field>
16424 
              <name>FB22</name>
16425 
              <description>Filter bits</description>
16426 
              <bitOffset>22</bitOffset>
16427 
              <bitWidth>1</bitWidth>
16428 
            </field>
16429 
            <field>
16430 
              <name>FB23</name>
16431 
              <description>Filter bits</description>
16432 
              <bitOffset>23</bitOffset>
16433 
              <bitWidth>1</bitWidth>
16434 
            </field>
16435 
            <field>
16436 
              <name>FB24</name>
16437 
              <description>Filter bits</description>
16438 
              <bitOffset>24</bitOffset>
16439 
              <bitWidth>1</bitWidth>
16440 
            </field>
16441 
            <field>
16442 
              <name>FB25</name>
16443 
              <description>Filter bits</description>
16444 
              <bitOffset>25</bitOffset>
16445 
              <bitWidth>1</bitWidth>
16446 
            </field>
16447 
            <field>
16448 
              <name>FB26</name>
16449 
              <description>Filter bits</description>
16450 
              <bitOffset>26</bitOffset>
16451 
              <bitWidth>1</bitWidth>
16452 
            </field>
16453 
            <field>
16454 
              <name>FB27</name>
16455 
              <description>Filter bits</description>
16456 
              <bitOffset>27</bitOffset>
16457 
              <bitWidth>1</bitWidth>
16458 
            </field>
16459 
            <field>
16460 
              <name>FB28</name>
16461 
              <description>Filter bits</description>
16462 
              <bitOffset>28</bitOffset>
16463 
              <bitWidth>1</bitWidth>
16464 
            </field>
16465 
            <field>
16466 
              <name>FB29</name>
16467 
              <description>Filter bits</description>
16468 
              <bitOffset>29</bitOffset>
16469 
              <bitWidth>1</bitWidth>
16470 
            </field>
16471 
            <field>
16472 
              <name>FB30</name>
16473 
              <description>Filter bits</description>
16474 
              <bitOffset>30</bitOffset>
16475 
              <bitWidth>1</bitWidth>
16476 
            </field>
16477 
            <field>
16478 
              <name>FB31</name>
16479 
              <description>Filter bits</description>
16480 
              <bitOffset>31</bitOffset>
16481 
              <bitWidth>1</bitWidth>
16482 
            </field>
16483 
          </fields>
16484 
        </register>
16485 
        <register>
16486 
          <name>F1R1</name>
16487 
          <displayName>F1R1</displayName>
16488 
          <description>Filter bank 1 register 1</description>
16489 
          <addressOffset>0x248</addressOffset>
16490 
          <size>0x20</size>
16491 
          <access>read-write</access>
16492 
          <resetValue>0x00000000</resetValue>
16493 
          <fields>
16494 
            <field>
16495 
              <name>FB0</name>
16496 
              <description>Filter bits</description>
16497 
              <bitOffset>0</bitOffset>
16498 
              <bitWidth>1</bitWidth>
16499 
            </field>
16500 
            <field>
16501 
              <name>FB1</name>
16502 
              <description>Filter bits</description>
16503 
              <bitOffset>1</bitOffset>
16504 
              <bitWidth>1</bitWidth>
16505 
            </field>
16506 
            <field>
16507 
              <name>FB2</name>
16508 
              <description>Filter bits</description>
16509 
              <bitOffset>2</bitOffset>
16510 
              <bitWidth>1</bitWidth>
16511 
            </field>
16512 
            <field>
16513 
              <name>FB3</name>
16514 
              <description>Filter bits</description>
16515 
              <bitOffset>3</bitOffset>
16516 
              <bitWidth>1</bitWidth>
16517 
            </field>
16518 
            <field>
16519 
              <name>FB4</name>
16520 
              <description>Filter bits</description>
16521 
              <bitOffset>4</bitOffset>
16522 
              <bitWidth>1</bitWidth>
16523 
            </field>
16524 
            <field>
16525 
              <name>FB5</name>
16526 
              <description>Filter bits</description>
16527 
              <bitOffset>5</bitOffset>
16528 
              <bitWidth>1</bitWidth>
16529 
            </field>
16530 
            <field>
16531 
              <name>FB6</name>
16532 
              <description>Filter bits</description>
16533 
              <bitOffset>6</bitOffset>
16534 
              <bitWidth>1</bitWidth>
16535 
            </field>
16536 
            <field>
16537 
              <name>FB7</name>
16538 
              <description>Filter bits</description>
16539 
              <bitOffset>7</bitOffset>
16540 
              <bitWidth>1</bitWidth>
16541 
            </field>
16542 
            <field>
16543 
              <name>FB8</name>
16544 
              <description>Filter bits</description>
16545 
              <bitOffset>8</bitOffset>
16546 
              <bitWidth>1</bitWidth>
16547 
            </field>
16548 
            <field>
16549 
              <name>FB9</name>
16550 
              <description>Filter bits</description>
16551 
              <bitOffset>9</bitOffset>
16552 
              <bitWidth>1</bitWidth>
16553 
            </field>
16554 
            <field>
16555 
              <name>FB10</name>
16556 
              <description>Filter bits</description>
16557 
              <bitOffset>10</bitOffset>
16558 
              <bitWidth>1</bitWidth>
16559 
            </field>
16560 
            <field>
16561 
              <name>FB11</name>
16562 
              <description>Filter bits</description>
16563 
              <bitOffset>11</bitOffset>
16564 
              <bitWidth>1</bitWidth>
16565 
            </field>
16566 
            <field>
16567 
              <name>FB12</name>
16568 
              <description>Filter bits</description>
16569 
              <bitOffset>12</bitOffset>
16570 
              <bitWidth>1</bitWidth>
16571 
            </field>
16572 
            <field>
16573 
              <name>FB13</name>
16574 
              <description>Filter bits</description>
16575 
              <bitOffset>13</bitOffset>
16576 
              <bitWidth>1</bitWidth>
16577 
            </field>
16578 
            <field>
16579 
              <name>FB14</name>
16580 
              <description>Filter bits</description>
16581 
              <bitOffset>14</bitOffset>
16582 
              <bitWidth>1</bitWidth>
16583 
            </field>
16584 
            <field>
16585 
              <name>FB15</name>
16586 
              <description>Filter bits</description>
16587 
              <bitOffset>15</bitOffset>
16588 
              <bitWidth>1</bitWidth>
16589 
            </field>
16590 
            <field>
16591 
              <name>FB16</name>
16592 
              <description>Filter bits</description>
16593 
              <bitOffset>16</bitOffset>
16594 
              <bitWidth>1</bitWidth>
16595 
            </field>
16596 
            <field>
16597 
              <name>FB17</name>
16598 
              <description>Filter bits</description>
16599 
              <bitOffset>17</bitOffset>
16600 
              <bitWidth>1</bitWidth>
16601 
            </field>
16602 
            <field>
16603 
              <name>FB18</name>
16604 
              <description>Filter bits</description>
16605 
              <bitOffset>18</bitOffset>
16606 
              <bitWidth>1</bitWidth>
16607 
            </field>
16608 
            <field>
16609 
              <name>FB19</name>
16610 
              <description>Filter bits</description>
16611 
              <bitOffset>19</bitOffset>
16612 
              <bitWidth>1</bitWidth>
16613 
            </field>
16614 
            <field>
16615 
              <name>FB20</name>
16616 
              <description>Filter bits</description>
16617 
              <bitOffset>20</bitOffset>
16618 
              <bitWidth>1</bitWidth>
16619 
            </field>
16620 
            <field>
16621 
              <name>FB21</name>
16622 
              <description>Filter bits</description>
16623 
              <bitOffset>21</bitOffset>
16624 
              <bitWidth>1</bitWidth>
16625 
            </field>
16626 
            <field>
16627 
              <name>FB22</name>
16628 
              <description>Filter bits</description>
16629 
              <bitOffset>22</bitOffset>
16630 
              <bitWidth>1</bitWidth>
16631 
            </field>
16632 
            <field>
16633 
              <name>FB23</name>
16634 
              <description>Filter bits</description>
16635 
              <bitOffset>23</bitOffset>
16636 
              <bitWidth>1</bitWidth>
16637 
            </field>
16638 
            <field>
16639 
              <name>FB24</name>
16640 
              <description>Filter bits</description>
16641 
              <bitOffset>24</bitOffset>
16642 
              <bitWidth>1</bitWidth>
16643 
            </field>
16644 
            <field>
16645 
              <name>FB25</name>
16646 
              <description>Filter bits</description>
16647 
              <bitOffset>25</bitOffset>
16648 
              <bitWidth>1</bitWidth>
16649 
            </field>
16650 
            <field>
16651 
              <name>FB26</name>
16652 
              <description>Filter bits</description>
16653 
              <bitOffset>26</bitOffset>
16654 
              <bitWidth>1</bitWidth>
16655 
            </field>
16656 
            <field>
16657 
              <name>FB27</name>
16658 
              <description>Filter bits</description>
16659 
              <bitOffset>27</bitOffset>
16660 
              <bitWidth>1</bitWidth>
16661 
            </field>
16662 
            <field>
16663 
              <name>FB28</name>
16664 
              <description>Filter bits</description>
16665 
              <bitOffset>28</bitOffset>
16666 
              <bitWidth>1</bitWidth>
16667 
            </field>
16668 
            <field>
16669 
              <name>FB29</name>
16670 
              <description>Filter bits</description>
16671 
              <bitOffset>29</bitOffset>
16672 
              <bitWidth>1</bitWidth>
16673 
            </field>
16674 
            <field>
16675 
              <name>FB30</name>
16676 
              <description>Filter bits</description>
16677 
              <bitOffset>30</bitOffset>
16678 
              <bitWidth>1</bitWidth>
16679 
            </field>
16680 
            <field>
16681 
              <name>FB31</name>
16682 
              <description>Filter bits</description>
16683 
              <bitOffset>31</bitOffset>
16684 
              <bitWidth>1</bitWidth>
16685 
            </field>
16686 
          </fields>
16687 
        </register>
16688 
        <register>
16689 
          <name>F1R2</name>
16690 
          <displayName>F1R2</displayName>
16691 
          <description>Filter bank 1 register 2</description>
16692 
          <addressOffset>0x24C</addressOffset>
16693 
          <size>0x20</size>
16694 
          <access>read-write</access>
16695 
          <resetValue>0x00000000</resetValue>
16696 
          <fields>
16697 
            <field>
16698 
              <name>FB0</name>
16699 
              <description>Filter bits</description>
16700 
              <bitOffset>0</bitOffset>
16701 
              <bitWidth>1</bitWidth>
16702 
            </field>
16703 
            <field>
16704 
              <name>FB1</name>
16705 
              <description>Filter bits</description>
16706 
              <bitOffset>1</bitOffset>
16707 
              <bitWidth>1</bitWidth>
16708 
            </field>
16709 
            <field>
16710 
              <name>FB2</name>
16711 
              <description>Filter bits</description>
16712 
              <bitOffset>2</bitOffset>
16713 
              <bitWidth>1</bitWidth>
16714 
            </field>
16715 
            <field>
16716 
              <name>FB3</name>
16717 
              <description>Filter bits</description>
16718 
              <bitOffset>3</bitOffset>
16719 
              <bitWidth>1</bitWidth>
16720 
            </field>
16721 
            <field>
16722 
              <name>FB4</name>
16723 
              <description>Filter bits</description>
16724 
              <bitOffset>4</bitOffset>
16725 
              <bitWidth>1</bitWidth>
16726 
            </field>
16727 
            <field>
16728 
              <name>FB5</name>
16729 
              <description>Filter bits</description>
16730 
              <bitOffset>5</bitOffset>
16731 
              <bitWidth>1</bitWidth>
16732 
            </field>
16733 
            <field>
16734 
              <name>FB6</name>
16735 
              <description>Filter bits</description>
16736 
              <bitOffset>6</bitOffset>
16737 
              <bitWidth>1</bitWidth>
16738 
            </field>
16739 
            <field>
16740 
              <name>FB7</name>
16741 
              <description>Filter bits</description>
16742 
              <bitOffset>7</bitOffset>
16743 
              <bitWidth>1</bitWidth>
16744 
            </field>
16745 
            <field>
16746 
              <name>FB8</name>
16747 
              <description>Filter bits</description>
16748 
              <bitOffset>8</bitOffset>
16749 
              <bitWidth>1</bitWidth>
16750 
            </field>
16751 
            <field>
16752 
              <name>FB9</name>
16753 
              <description>Filter bits</description>
16754 
              <bitOffset>9</bitOffset>
16755 
              <bitWidth>1</bitWidth>
16756 
            </field>
16757 
            <field>
16758 
              <name>FB10</name>
16759 
              <description>Filter bits</description>
16760 
              <bitOffset>10</bitOffset>
16761 
              <bitWidth>1</bitWidth>
16762 
            </field>
16763 
            <field>
16764 
              <name>FB11</name>
16765 
              <description>Filter bits</description>
16766 
              <bitOffset>11</bitOffset>
16767 
              <bitWidth>1</bitWidth>
16768 
            </field>
16769 
            <field>
16770 
              <name>FB12</name>
16771 
              <description>Filter bits</description>
16772 
              <bitOffset>12</bitOffset>
16773 
              <bitWidth>1</bitWidth>
16774 
            </field>
16775 
            <field>
16776 
              <name>FB13</name>
16777 
              <description>Filter bits</description>
16778 
              <bitOffset>13</bitOffset>
16779 
              <bitWidth>1</bitWidth>
16780 
            </field>
16781 
            <field>
16782 
              <name>FB14</name>
16783 
              <description>Filter bits</description>
16784 
              <bitOffset>14</bitOffset>
16785 
              <bitWidth>1</bitWidth>
16786 
            </field>
16787 
            <field>
16788 
              <name>FB15</name>
16789 
              <description>Filter bits</description>
16790 
              <bitOffset>15</bitOffset>
16791 
              <bitWidth>1</bitWidth>
16792 
            </field>
16793 
            <field>
16794 
              <name>FB16</name>
16795 
              <description>Filter bits</description>
16796 
              <bitOffset>16</bitOffset>
16797 
              <bitWidth>1</bitWidth>
16798 
            </field>
16799 
            <field>
16800 
              <name>FB17</name>
16801 
              <description>Filter bits</description>
16802 
              <bitOffset>17</bitOffset>
16803 
              <bitWidth>1</bitWidth>
16804 
            </field>
16805 
            <field>
16806 
              <name>FB18</name>
16807 
              <description>Filter bits</description>
16808 
              <bitOffset>18</bitOffset>
16809 
              <bitWidth>1</bitWidth>
16810 
            </field>
16811 
            <field>
16812 
              <name>FB19</name>
16813 
              <description>Filter bits</description>
16814 
              <bitOffset>19</bitOffset>
16815 
              <bitWidth>1</bitWidth>
16816 
            </field>
16817 
            <field>
16818 
              <name>FB20</name>
16819 
              <description>Filter bits</description>
16820 
              <bitOffset>20</bitOffset>
16821 
              <bitWidth>1</bitWidth>
16822 
            </field>
16823 
            <field>
16824 
              <name>FB21</name>
16825 
              <description>Filter bits</description>
16826 
              <bitOffset>21</bitOffset>
16827 
              <bitWidth>1</bitWidth>
16828 
            </field>
16829 
            <field>
16830 
              <name>FB22</name>
16831 
              <description>Filter bits</description>
16832 
              <bitOffset>22</bitOffset>
16833 
              <bitWidth>1</bitWidth>
16834 
            </field>
16835 
            <field>
16836 
              <name>FB23</name>
16837 
              <description>Filter bits</description>
16838 
              <bitOffset>23</bitOffset>
16839 
              <bitWidth>1</bitWidth>
16840 
            </field>
16841 
            <field>
16842 
              <name>FB24</name>
16843 
              <description>Filter bits</description>
16844 
              <bitOffset>24</bitOffset>
16845 
              <bitWidth>1</bitWidth>
16846 
            </field>
16847 
            <field>
16848 
              <name>FB25</name>
16849 
              <description>Filter bits</description>
16850 
              <bitOffset>25</bitOffset>
16851 
              <bitWidth>1</bitWidth>
16852 
            </field>
16853 
            <field>
16854 
              <name>FB26</name>
16855 
              <description>Filter bits</description>
16856 
              <bitOffset>26</bitOffset>
16857 
              <bitWidth>1</bitWidth>
16858 
            </field>
16859 
            <field>
16860 
              <name>FB27</name>
16861 
              <description>Filter bits</description>
16862 
              <bitOffset>27</bitOffset>
16863 
              <bitWidth>1</bitWidth>
16864 
            </field>
16865 
            <field>
16866 
              <name>FB28</name>
16867 
              <description>Filter bits</description>
16868 
              <bitOffset>28</bitOffset>
16869 
              <bitWidth>1</bitWidth>
16870 
            </field>
16871 
            <field>
16872 
              <name>FB29</name>
16873 
              <description>Filter bits</description>
16874 
              <bitOffset>29</bitOffset>
16875 
              <bitWidth>1</bitWidth>
16876 
            </field>
16877 
            <field>
16878 
              <name>FB30</name>
16879 
              <description>Filter bits</description>
16880 
              <bitOffset>30</bitOffset>
16881 
              <bitWidth>1</bitWidth>
16882 
            </field>
16883 
            <field>
16884 
              <name>FB31</name>
16885 
              <description>Filter bits</description>
16886 
              <bitOffset>31</bitOffset>
16887 
              <bitWidth>1</bitWidth>
16888 
            </field>
16889 
          </fields>
16890 
        </register>
16891 
        <register>
16892 
          <name>F2R1</name>
16893 
          <displayName>F2R1</displayName>
16894 
          <description>Filter bank 2 register 1</description>
16895 
          <addressOffset>0x250</addressOffset>
16896 
          <size>0x20</size>
16897 
          <access>read-write</access>
16898 
          <resetValue>0x00000000</resetValue>
16899 
          <fields>
16900 
            <field>
16901 
              <name>FB0</name>
16902 
              <description>Filter bits</description>
16903 
              <bitOffset>0</bitOffset>
16904 
              <bitWidth>1</bitWidth>
16905 
            </field>
16906 
            <field>
16907 
              <name>FB1</name>
16908 
              <description>Filter bits</description>
16909 
              <bitOffset>1</bitOffset>
16910 
              <bitWidth>1</bitWidth>
16911 
            </field>
16912 
            <field>
16913 
              <name>FB2</name>
16914 
              <description>Filter bits</description>
16915 
              <bitOffset>2</bitOffset>
16916 
              <bitWidth>1</bitWidth>
16917 
            </field>
16918 
            <field>
16919 
              <name>FB3</name>
16920 
              <description>Filter bits</description>
16921 
              <bitOffset>3</bitOffset>
16922 
              <bitWidth>1</bitWidth>
16923 
            </field>
16924 
            <field>
16925 
              <name>FB4</name>
16926 
              <description>Filter bits</description>
16927 
              <bitOffset>4</bitOffset>
16928 
              <bitWidth>1</bitWidth>
16929 
            </field>
16930 
            <field>
16931 
              <name>FB5</name>
16932 
              <description>Filter bits</description>
16933 
              <bitOffset>5</bitOffset>
16934 
              <bitWidth>1</bitWidth>
16935 
            </field>
16936 
            <field>
16937 
              <name>FB6</name>
16938 
              <description>Filter bits</description>
16939 
              <bitOffset>6</bitOffset>
16940 
              <bitWidth>1</bitWidth>
16941 
            </field>
16942 
            <field>
16943 
              <name>FB7</name>
16944 
              <description>Filter bits</description>
16945 
              <bitOffset>7</bitOffset>
16946 
              <bitWidth>1</bitWidth>
16947 
            </field>
16948 
            <field>
16949 
              <name>FB8</name>
16950 
              <description>Filter bits</description>
16951 
              <bitOffset>8</bitOffset>
16952 
              <bitWidth>1</bitWidth>
16953 
            </field>
16954 
            <field>
16955 
              <name>FB9</name>
16956 
              <description>Filter bits</description>
16957 
              <bitOffset>9</bitOffset>
16958 
              <bitWidth>1</bitWidth>
16959 
            </field>
16960 
            <field>
16961 
              <name>FB10</name>
16962 
              <description>Filter bits</description>
16963 
              <bitOffset>10</bitOffset>
16964 
              <bitWidth>1</bitWidth>
16965 
            </field>
16966 
            <field>
16967 
              <name>FB11</name>
16968 
              <description>Filter bits</description>
16969 
              <bitOffset>11</bitOffset>
16970 
              <bitWidth>1</bitWidth>
16971 
            </field>
16972 
            <field>
16973 
              <name>FB12</name>
16974 
              <description>Filter bits</description>
16975 
              <bitOffset>12</bitOffset>
16976 
              <bitWidth>1</bitWidth>
16977 
            </field>
16978 
            <field>
16979 
              <name>FB13</name>
16980 
              <description>Filter bits</description>
16981 
              <bitOffset>13</bitOffset>
16982 
              <bitWidth>1</bitWidth>
16983 
            </field>
16984 
            <field>
16985 
              <name>FB14</name>
16986 
              <description>Filter bits</description>
16987 
              <bitOffset>14</bitOffset>
16988 
              <bitWidth>1</bitWidth>
16989 
            </field>
16990 
            <field>
16991 
              <name>FB15</name>
16992 
              <description>Filter bits</description>
16993 
              <bitOffset>15</bitOffset>
16994 
              <bitWidth>1</bitWidth>
16995 
            </field>
16996 
            <field>
16997 
              <name>FB16</name>
16998 
              <description>Filter bits</description>
16999 
              <bitOffset>16</bitOffset>
17000 
              <bitWidth>1</bitWidth>
17001 
            </field>
17002 
            <field>
17003 
              <name>FB17</name>
17004 
              <description>Filter bits</description>
17005 
              <bitOffset>17</bitOffset>
17006 
              <bitWidth>1</bitWidth>
17007 
            </field>
17008 
            <field>
17009 
              <name>FB18</name>
17010 
              <description>Filter bits</description>
17011 
              <bitOffset>18</bitOffset>
17012 
              <bitWidth>1</bitWidth>
17013 
            </field>
17014 
            <field>
17015 
              <name>FB19</name>
17016 
              <description>Filter bits</description>
17017 
              <bitOffset>19</bitOffset>
17018 
              <bitWidth>1</bitWidth>
17019 
            </field>
17020 
            <field>
17021 
              <name>FB20</name>
17022 
              <description>Filter bits</description>
17023 
              <bitOffset>20</bitOffset>
17024 
              <bitWidth>1</bitWidth>
17025 
            </field>
17026 
            <field>
17027 
              <name>FB21</name>
17028 
              <description>Filter bits</description>
17029 
              <bitOffset>21</bitOffset>
17030 
              <bitWidth>1</bitWidth>
17031 
            </field>
17032 
            <field>
17033 
              <name>FB22</name>
17034 
              <description>Filter bits</description>
17035 
              <bitOffset>22</bitOffset>
17036 
              <bitWidth>1</bitWidth>
17037 
            </field>
17038 
            <field>
17039 
              <name>FB23</name>
17040 
              <description>Filter bits</description>
17041 
              <bitOffset>23</bitOffset>
17042 
              <bitWidth>1</bitWidth>
17043 
            </field>
17044 
            <field>
17045 
              <name>FB24</name>
17046 
              <description>Filter bits</description>
17047 
              <bitOffset>24</bitOffset>
17048 
              <bitWidth>1</bitWidth>
17049 
            </field>
17050 
            <field>
17051 
              <name>FB25</name>
17052 
              <description>Filter bits</description>
17053 
              <bitOffset>25</bitOffset>
17054 
              <bitWidth>1</bitWidth>
17055 
            </field>
17056 
            <field>
17057 
              <name>FB26</name>
17058 
              <description>Filter bits</description>
17059 
              <bitOffset>26</bitOffset>
17060 
              <bitWidth>1</bitWidth>
17061 
            </field>
17062 
            <field>
17063 
              <name>FB27</name>
17064 
              <description>Filter bits</description>
17065 
              <bitOffset>27</bitOffset>
17066 
              <bitWidth>1</bitWidth>
17067 
            </field>
17068 
            <field>
17069 
              <name>FB28</name>
17070 
              <description>Filter bits</description>
17071 
              <bitOffset>28</bitOffset>
17072 
              <bitWidth>1</bitWidth>
17073 
            </field>
17074 
            <field>
17075 
              <name>FB29</name>
17076 
              <description>Filter bits</description>
17077 
              <bitOffset>29</bitOffset>
17078 
              <bitWidth>1</bitWidth>
17079 
            </field>
17080 
            <field>
17081 
              <name>FB30</name>
17082 
              <description>Filter bits</description>
17083 
              <bitOffset>30</bitOffset>
17084 
              <bitWidth>1</bitWidth>
17085 
            </field>
17086 
            <field>
17087 
              <name>FB31</name>
17088 
              <description>Filter bits</description>
17089 
              <bitOffset>31</bitOffset>
17090 
              <bitWidth>1</bitWidth>
17091 
            </field>
17092 
          </fields>
17093 
        </register>
17094 
        <register>
17095 
          <name>F2R2</name>
17096 
          <displayName>F2R2</displayName>
17097 
          <description>Filter bank 2 register 2</description>
17098 
          <addressOffset>0x254</addressOffset>
17099 
          <size>0x20</size>
17100 
          <access>read-write</access>
17101 
          <resetValue>0x00000000</resetValue>
17102 
          <fields>
17103 
            <field>
17104 
              <name>FB0</name>
17105 
              <description>Filter bits</description>
17106 
              <bitOffset>0</bitOffset>
17107 
              <bitWidth>1</bitWidth>
17108 
            </field>
17109 
            <field>
17110 
              <name>FB1</name>
17111 
              <description>Filter bits</description>
17112 
              <bitOffset>1</bitOffset>
17113 
              <bitWidth>1</bitWidth>
17114 
            </field>
17115 
            <field>
17116 
              <name>FB2</name>
17117 
              <description>Filter bits</description>
17118 
              <bitOffset>2</bitOffset>
17119 
              <bitWidth>1</bitWidth>
17120 
            </field>
17121 
            <field>
17122 
              <name>FB3</name>
17123 
              <description>Filter bits</description>
17124 
              <bitOffset>3</bitOffset>
17125 
              <bitWidth>1</bitWidth>
17126 
            </field>
17127 
            <field>
17128 
              <name>FB4</name>
17129 
              <description>Filter bits</description>
17130 
              <bitOffset>4</bitOffset>
17131 
              <bitWidth>1</bitWidth>
17132 
            </field>
17133 
            <field>
17134 
              <name>FB5</name>
17135 
              <description>Filter bits</description>
17136 
              <bitOffset>5</bitOffset>
17137 
              <bitWidth>1</bitWidth>
17138 
            </field>
17139 
            <field>
17140 
              <name>FB6</name>
17141 
              <description>Filter bits</description>
17142 
              <bitOffset>6</bitOffset>
17143 
              <bitWidth>1</bitWidth>
17144 
            </field>
17145 
            <field>
17146 
              <name>FB7</name>
17147 
              <description>Filter bits</description>
17148 
              <bitOffset>7</bitOffset>
17149 
              <bitWidth>1</bitWidth>
17150 
            </field>
17151 
            <field>
17152 
              <name>FB8</name>
17153 
              <description>Filter bits</description>
17154 
              <bitOffset>8</bitOffset>
17155 
              <bitWidth>1</bitWidth>
17156 
            </field>
17157 
            <field>
17158 
              <name>FB9</name>
17159 
              <description>Filter bits</description>
17160 
              <bitOffset>9</bitOffset>
17161 
              <bitWidth>1</bitWidth>
17162 
            </field>
17163 
            <field>
17164 
              <name>FB10</name>
17165 
              <description>Filter bits</description>
17166 
              <bitOffset>10</bitOffset>
17167 
              <bitWidth>1</bitWidth>
17168 
            </field>
17169 
            <field>
17170 
              <name>FB11</name>
17171 
              <description>Filter bits</description>
17172 
              <bitOffset>11</bitOffset>
17173 
              <bitWidth>1</bitWidth>
17174 
            </field>
17175 
            <field>
17176 
              <name>FB12</name>
17177 
              <description>Filter bits</description>
17178 
              <bitOffset>12</bitOffset>
17179 
              <bitWidth>1</bitWidth>
17180 
            </field>
17181 
            <field>
17182 
              <name>FB13</name>
17183 
              <description>Filter bits</description>
17184 
              <bitOffset>13</bitOffset>
17185 
              <bitWidth>1</bitWidth>
17186 
            </field>
17187 
            <field>
17188 
              <name>FB14</name>
17189 
              <description>Filter bits</description>
17190 
              <bitOffset>14</bitOffset>
17191 
              <bitWidth>1</bitWidth>
17192 
            </field>
17193 
            <field>
17194 
              <name>FB15</name>
17195 
              <description>Filter bits</description>
17196 
              <bitOffset>15</bitOffset>
17197 
              <bitWidth>1</bitWidth>
17198 
            </field>
17199 
            <field>
17200 
              <name>FB16</name>
17201 
              <description>Filter bits</description>
17202 
              <bitOffset>16</bitOffset>
17203 
              <bitWidth>1</bitWidth>
17204 
            </field>
17205 
            <field>
17206 
              <name>FB17</name>
17207 
              <description>Filter bits</description>
17208 
              <bitOffset>17</bitOffset>
17209 
              <bitWidth>1</bitWidth>
17210 
            </field>
17211 
            <field>
17212 
              <name>FB18</name>
17213 
              <description>Filter bits</description>
17214 
              <bitOffset>18</bitOffset>
17215 
              <bitWidth>1</bitWidth>
17216 
            </field>
17217 
            <field>
17218 
              <name>FB19</name>
17219 
              <description>Filter bits</description>
17220 
              <bitOffset>19</bitOffset>
17221 
              <bitWidth>1</bitWidth>
17222 
            </field>
17223 
            <field>
17224 
              <name>FB20</name>
17225 
              <description>Filter bits</description>
17226 
              <bitOffset>20</bitOffset>
17227 
              <bitWidth>1</bitWidth>
17228 
            </field>
17229 
            <field>
17230 
              <name>FB21</name>
17231 
              <description>Filter bits</description>
17232 
              <bitOffset>21</bitOffset>
17233 
              <bitWidth>1</bitWidth>
17234 
            </field>
17235 
            <field>
17236 
              <name>FB22</name>
17237 
              <description>Filter bits</description>
17238 
              <bitOffset>22</bitOffset>
17239 
              <bitWidth>1</bitWidth>
17240 
            </field>
17241 
            <field>
17242 
              <name>FB23</name>
17243 
              <description>Filter bits</description>
17244 
              <bitOffset>23</bitOffset>
17245 
              <bitWidth>1</bitWidth>
17246 
            </field>
17247 
            <field>
17248 
              <name>FB24</name>
17249 
              <description>Filter bits</description>
17250 
              <bitOffset>24</bitOffset>
17251 
              <bitWidth>1</bitWidth>
17252 
            </field>
17253 
            <field>
17254 
              <name>FB25</name>
17255 
              <description>Filter bits</description>
17256 
              <bitOffset>25</bitOffset>
17257 
              <bitWidth>1</bitWidth>
17258 
            </field>
17259 
            <field>
17260 
              <name>FB26</name>
17261 
              <description>Filter bits</description>
17262 
              <bitOffset>26</bitOffset>
17263 
              <bitWidth>1</bitWidth>
17264 
            </field>
17265 
            <field>
17266 
              <name>FB27</name>
17267 
              <description>Filter bits</description>
17268 
              <bitOffset>27</bitOffset>
17269 
              <bitWidth>1</bitWidth>
17270 
            </field>
17271 
            <field>
17272 
              <name>FB28</name>
17273 
              <description>Filter bits</description>
17274 
              <bitOffset>28</bitOffset>
17275 
              <bitWidth>1</bitWidth>
17276 
            </field>
17277 
            <field>
17278 
              <name>FB29</name>
17279 
              <description>Filter bits</description>
17280 
              <bitOffset>29</bitOffset>
17281 
              <bitWidth>1</bitWidth>
17282 
            </field>
17283 
            <field>
17284 
              <name>FB30</name>
17285 
              <description>Filter bits</description>
17286 
              <bitOffset>30</bitOffset>
17287 
              <bitWidth>1</bitWidth>
17288 
            </field>
17289 
            <field>
17290 
              <name>FB31</name>
17291 
              <description>Filter bits</description>
17292 
              <bitOffset>31</bitOffset>
17293 
              <bitWidth>1</bitWidth>
17294 
            </field>
17295 
          </fields>
17296 
        </register>
17297 
		<register>
17298 
          <name>F3R1</name>
17299 
          <displayName>F3R1</displayName>
17300 
          <description>Filter bank 3 register 1</description>
17301 
          <addressOffset>0x258</addressOffset>
17302 
          <size>0x20</size>
17303 
          <access>read-write</access>
17304 
          <resetValue>0x00000000</resetValue>
17305 
		  <fields>
17306 
            <field>
17307 
              <name>FB0</name>
17308 
              <description>Filter bits</description>
17309 
              <bitOffset>0</bitOffset>
17310 
              <bitWidth>1</bitWidth>
17311 
            </field>
17312 
            <field>
17313 
              <name>FB1</name>
17314 
              <description>Filter bits</description>
17315 
              <bitOffset>1</bitOffset>
17316 
              <bitWidth>1</bitWidth>
17317 
            </field>
17318 
            <field>
17319 
              <name>FB2</name>
17320 
              <description>Filter bits</description>
17321 
              <bitOffset>2</bitOffset>
17322 
              <bitWidth>1</bitWidth>
17323 
            </field>
17324 
            <field>
17325 
              <name>FB3</name>
17326 
              <description>Filter bits</description>
17327 
              <bitOffset>3</bitOffset>
17328 
              <bitWidth>1</bitWidth>
17329 
            </field>
17330 
            <field>
17331 
              <name>FB4</name>
17332 
              <description>Filter bits</description>
17333 
              <bitOffset>4</bitOffset>
17334 
              <bitWidth>1</bitWidth>
17335 
            </field>
17336 
            <field>
17337 
              <name>FB5</name>
17338 
              <description>Filter bits</description>
17339 
              <bitOffset>5</bitOffset>
17340 
              <bitWidth>1</bitWidth>
17341 
            </field>
17342 
            <field>
17343 
              <name>FB6</name>
17344 
              <description>Filter bits</description>
17345 
              <bitOffset>6</bitOffset>
17346 
              <bitWidth>1</bitWidth>
17347 
            </field>
17348 
            <field>
17349 
              <name>FB7</name>
17350 
              <description>Filter bits</description>
17351 
              <bitOffset>7</bitOffset>
17352 
              <bitWidth>1</bitWidth>
17353 
            </field>
17354 
            <field>
17355 
              <name>FB8</name>
17356 
              <description>Filter bits</description>
17357 
              <bitOffset>8</bitOffset>
17358 
              <bitWidth>1</bitWidth>
17359 
            </field>
17360 
            <field>
17361 
              <name>FB9</name>
17362 
              <description>Filter bits</description>
17363 
              <bitOffset>9</bitOffset>
17364 
              <bitWidth>1</bitWidth>
17365 
            </field>
17366 
            <field>
17367 
              <name>FB10</name>
17368 
              <description>Filter bits</description>
17369 
              <bitOffset>10</bitOffset>
17370 
              <bitWidth>1</bitWidth>
17371 
            </field>
17372 
            <field>
17373 
              <name>FB11</name>
17374 
              <description>Filter bits</description>
17375 
              <bitOffset>11</bitOffset>
17376 
              <bitWidth>1</bitWidth>
17377 
            </field>
17378 
            <field>
17379 
              <name>FB12</name>
17380 
              <description>Filter bits</description>
17381 
              <bitOffset>12</bitOffset>
17382 
              <bitWidth>1</bitWidth>
17383 
            </field>
17384 
            <field>
17385 
              <name>FB13</name>
17386 
              <description>Filter bits</description>
17387 
              <bitOffset>13</bitOffset>
17388 
              <bitWidth>1</bitWidth>
17389 
            </field>
17390 
            <field>
17391 
              <name>FB14</name>
17392 
              <description>Filter bits</description>
17393 
              <bitOffset>14</bitOffset>
17394 
              <bitWidth>1</bitWidth>
17395 
            </field>
17396 
            <field>
17397 
              <name>FB15</name>
17398 
              <description>Filter bits</description>
17399 
              <bitOffset>15</bitOffset>
17400 
              <bitWidth>1</bitWidth>
17401 
            </field>
17402 
            <field>
17403 
              <name>FB16</name>
17404 
              <description>Filter bits</description>
17405 
              <bitOffset>16</bitOffset>
17406 
              <bitWidth>1</bitWidth>
17407 
            </field>
17408 
            <field>
17409 
              <name>FB17</name>
17410 
              <description>Filter bits</description>
17411 
              <bitOffset>17</bitOffset>
17412 
              <bitWidth>1</bitWidth>
17413 
            </field>
17414 
            <field>
17415 
              <name>FB18</name>
17416 
              <description>Filter bits</description>
17417 
              <bitOffset>18</bitOffset>
17418 
              <bitWidth>1</bitWidth>
17419 
            </field>
17420 
            <field>
17421 
              <name>FB19</name>
17422 
              <description>Filter bits</description>
17423 
              <bitOffset>19</bitOffset>
17424 
              <bitWidth>1</bitWidth>
17425 
            </field>
17426 
            <field>
17427 
              <name>FB20</name>
17428 
              <description>Filter bits</description>
17429 
              <bitOffset>20</bitOffset>
17430 
              <bitWidth>1</bitWidth>
17431 
            </field>
17432 
            <field>
17433 
              <name>FB21</name>
17434 
              <description>Filter bits</description>
17435 
              <bitOffset>21</bitOffset>
17436 
              <bitWidth>1</bitWidth>
17437 
            </field>
17438 
            <field>
17439 
              <name>FB22</name>
17440 
              <description>Filter bits</description>
17441 
              <bitOffset>22</bitOffset>
17442 
              <bitWidth>1</bitWidth>
17443 
            </field>
17444 
            <field>
17445 
              <name>FB23</name>
17446 
              <description>Filter bits</description>
17447 
              <bitOffset>23</bitOffset>
17448 
              <bitWidth>1</bitWidth>
17449 
            </field>
17450 
            <field>
17451 
              <name>FB24</name>
17452 
              <description>Filter bits</description>
17453 
              <bitOffset>24</bitOffset>
17454 
              <bitWidth>1</bitWidth>
17455 
            </field>
17456 
            <field>
17457 
              <name>FB25</name>
17458 
              <description>Filter bits</description>
17459 
              <bitOffset>25</bitOffset>
17460 
              <bitWidth>1</bitWidth>
17461 
            </field>
17462 
            <field>
17463 
              <name>FB26</name>
17464 
              <description>Filter bits</description>
17465 
              <bitOffset>26</bitOffset>
17466 
              <bitWidth>1</bitWidth>
17467 
            </field>
17468 
            <field>
17469 
              <name>FB27</name>
17470 
              <description>Filter bits</description>
17471 
              <bitOffset>27</bitOffset>
17472 
              <bitWidth>1</bitWidth>
17473 
            </field>
17474 
            <field>
17475 
              <name>FB28</name>
17476 
              <description>Filter bits</description>
17477 
              <bitOffset>28</bitOffset>
17478 
              <bitWidth>1</bitWidth>
17479 
            </field>
17480 
            <field>
17481 
              <name>FB29</name>
17482 
              <description>Filter bits</description>
17483 
              <bitOffset>29</bitOffset>
17484 
              <bitWidth>1</bitWidth>
17485 
            </field>
17486 
            <field>
17487 
              <name>FB30</name>
17488 
              <description>Filter bits</description>
17489 
              <bitOffset>30</bitOffset>
17490 
              <bitWidth>1</bitWidth>
17491 
            </field>
17492 
            <field>
17493 
              <name>FB31</name>
17494 
              <description>Filter bits</description>
17495 
              <bitOffset>31</bitOffset>
17496 
              <bitWidth>1</bitWidth>
17497 
            </field>
17498 
          </fields>
17499 
		</register>
17500 
		<register>
17501 
          <name>F3R2</name>
17502 
          <displayName>F3R2</displayName>
17503 
          <description>Filter bank 3 register 2</description>
17504 
          <addressOffset>0x25C</addressOffset>
17505 
          <size>0x20</size>
17506 
          <access>read-write</access>
17507 
          <resetValue>0x00000000</resetValue>
17508 
		  <fields>
17509 
            <field>
17510 
              <name>FB0</name>
17511 
              <description>Filter bits</description>
17512 
              <bitOffset>0</bitOffset>
17513 
              <bitWidth>1</bitWidth>
17514 
            </field>
17515 
            <field>
17516 
              <name>FB1</name>
17517 
              <description>Filter bits</description>
17518 
              <bitOffset>1</bitOffset>
17519 
              <bitWidth>1</bitWidth>
17520 
            </field>
17521 
            <field>
17522 
              <name>FB2</name>
17523 
              <description>Filter bits</description>
17524 
              <bitOffset>2</bitOffset>
17525 
              <bitWidth>1</bitWidth>
17526 
            </field>
17527 
            <field>
17528 
              <name>FB3</name>
17529 
              <description>Filter bits</description>
17530 
              <bitOffset>3</bitOffset>
17531 
              <bitWidth>1</bitWidth>
17532 
            </field>
17533 
            <field>
17534 
              <name>FB4</name>
17535 
              <description>Filter bits</description>
17536 
              <bitOffset>4</bitOffset>
17537 
              <bitWidth>1</bitWidth>
17538 
            </field>
17539 
            <field>
17540 
              <name>FB5</name>
17541 
              <description>Filter bits</description>
17542 
              <bitOffset>5</bitOffset>
17543 
              <bitWidth>1</bitWidth>
17544 
            </field>
17545 
            <field>
17546 
              <name>FB6</name>
17547 
              <description>Filter bits</description>
17548 
              <bitOffset>6</bitOffset>
17549 
              <bitWidth>1</bitWidth>
17550 
            </field>
17551 
            <field>
17552 
              <name>FB7</name>
17553 
              <description>Filter bits</description>
17554 
              <bitOffset>7</bitOffset>
17555 
              <bitWidth>1</bitWidth>
17556 
            </field>
17557 
            <field>
17558 
              <name>FB8</name>
17559 
              <description>Filter bits</description>
17560 
              <bitOffset>8</bitOffset>
17561 
              <bitWidth>1</bitWidth>
17562 
            </field>
17563 
            <field>
17564 
              <name>FB9</name>
17565 
              <description>Filter bits</description>
17566 
              <bitOffset>9</bitOffset>
17567 
              <bitWidth>1</bitWidth>
17568 
            </field>
17569 
            <field>
17570 
              <name>FB10</name>
17571 
              <description>Filter bits</description>
17572 
              <bitOffset>10</bitOffset>
17573 
              <bitWidth>1</bitWidth>
17574 
            </field>
17575 
            <field>
17576 
              <name>FB11</name>
17577 
              <description>Filter bits</description>
17578 
              <bitOffset>11</bitOffset>
17579 
              <bitWidth>1</bitWidth>
17580 
            </field>
17581 
            <field>
17582 
              <name>FB12</name>
17583 
              <description>Filter bits</description>
17584 
              <bitOffset>12</bitOffset>
17585 
              <bitWidth>1</bitWidth>
17586 
            </field>
17587 
            <field>
17588 
              <name>FB13</name>
17589 
              <description>Filter bits</description>
17590 
              <bitOffset>13</bitOffset>
17591 
              <bitWidth>1</bitWidth>
17592 
            </field>
17593 
            <field>
17594 
              <name>FB14</name>
17595 
              <description>Filter bits</description>
17596 
              <bitOffset>14</bitOffset>
17597 
              <bitWidth>1</bitWidth>
17598 
            </field>
17599 
            <field>
17600 
              <name>FB15</name>
17601 
              <description>Filter bits</description>
17602 
              <bitOffset>15</bitOffset>
17603 
              <bitWidth>1</bitWidth>
17604 
            </field>
17605 
            <field>
17606 
              <name>FB16</name>
17607 
              <description>Filter bits</description>
17608 
              <bitOffset>16</bitOffset>
17609 
              <bitWidth>1</bitWidth>
17610 
            </field>
17611 
            <field>
17612 
              <name>FB17</name>
17613 
              <description>Filter bits</description>
17614 
              <bitOffset>17</bitOffset>
17615 
              <bitWidth>1</bitWidth>
17616 
            </field>
17617 
            <field>
17618 
              <name>FB18</name>
17619 
              <description>Filter bits</description>
17620 
              <bitOffset>18</bitOffset>
17621 
              <bitWidth>1</bitWidth>
17622 
            </field>
17623 
            <field>
17624 
              <name>FB19</name>
17625 
              <description>Filter bits</description>
17626 
              <bitOffset>19</bitOffset>
17627 
              <bitWidth>1</bitWidth>
17628 
            </field>
17629 
            <field>
17630 
              <name>FB20</name>
17631 
              <description>Filter bits</description>
17632 
              <bitOffset>20</bitOffset>
17633 
              <bitWidth>1</bitWidth>
17634 
            </field>
17635 
            <field>
17636 
              <name>FB21</name>
17637 
              <description>Filter bits</description>
17638 
              <bitOffset>21</bitOffset>
17639 
              <bitWidth>1</bitWidth>
17640 
            </field>
17641 
            <field>
17642 
              <name>FB22</name>
17643 
              <description>Filter bits</description>
17644 
              <bitOffset>22</bitOffset>
17645 
              <bitWidth>1</bitWidth>
17646 
            </field>
17647 
            <field>
17648 
              <name>FB23</name>
17649 
              <description>Filter bits</description>
17650 
              <bitOffset>23</bitOffset>
17651 
              <bitWidth>1</bitWidth>
17652 
            </field>
17653 
            <field>
17654 
              <name>FB24</name>
17655 
              <description>Filter bits</description>
17656 
              <bitOffset>24</bitOffset>
17657 
              <bitWidth>1</bitWidth>
17658 
            </field>
17659 
            <field>
17660 
              <name>FB25</name>
17661 
              <description>Filter bits</description>
17662 
              <bitOffset>25</bitOffset>
17663 
              <bitWidth>1</bitWidth>
17664 
            </field>
17665 
            <field>
17666 
              <name>FB26</name>
17667 
              <description>Filter bits</description>
17668 
              <bitOffset>26</bitOffset>
17669 
              <bitWidth>1</bitWidth>
17670 
            </field>
17671 
            <field>
17672 
              <name>FB27</name>
17673 
              <description>Filter bits</description>
17674 
              <bitOffset>27</bitOffset>
17675 
              <bitWidth>1</bitWidth>
17676 
            </field>
17677 
            <field>
17678 
              <name>FB28</name>
17679 
              <description>Filter bits</description>
17680 
              <bitOffset>28</bitOffset>
17681 
              <bitWidth>1</bitWidth>
17682 
            </field>
17683 
            <field>
17684 
              <name>FB29</name>
17685 
              <description>Filter bits</description>
17686 
              <bitOffset>29</bitOffset>
17687 
              <bitWidth>1</bitWidth>
17688 
            </field>
17689 
            <field>
17690 
              <name>FB30</name>
17691 
              <description>Filter bits</description>
17692 
              <bitOffset>30</bitOffset>
17693 
              <bitWidth>1</bitWidth>
17694 
            </field>
17695 
            <field>
17696 
              <name>FB31</name>
17697 
              <description>Filter bits</description>
17698 
              <bitOffset>31</bitOffset>
17699 
              <bitWidth>1</bitWidth>
17700 
            </field>
17701 
          </fields>
17702 
		</register>
17703 
		<register>
17704 
          <name>F4R1</name>
17705 
          <displayName>F4R1</displayName>
17706 
          <description>Filter bank 4 register 1</description>
17707 
          <addressOffset>0x260</addressOffset>
17708 
          <size>0x20</size>
17709 
          <access>read-write</access>
17710 
          <resetValue>0x00000000</resetValue>
17711 
		  <fields>
17712 
            <field>
17713 
              <name>FB0</name>
17714 
              <description>Filter bits</description>
17715 
              <bitOffset>0</bitOffset>
17716 
              <bitWidth>1</bitWidth>
17717 
            </field>
17718 
            <field>
17719 
              <name>FB1</name>
17720 
              <description>Filter bits</description>
17721 
              <bitOffset>1</bitOffset>
17722 
              <bitWidth>1</bitWidth>
17723 
            </field>
17724 
            <field>
17725 
              <name>FB2</name>
17726 
              <description>Filter bits</description>
17727 
              <bitOffset>2</bitOffset>
17728 
              <bitWidth>1</bitWidth>
17729 
            </field>
17730 
            <field>
17731 
              <name>FB3</name>
17732 
              <description>Filter bits</description>
17733 
              <bitOffset>3</bitOffset>
17734 
              <bitWidth>1</bitWidth>
17735 
            </field>
17736 
            <field>
17737 
              <name>FB4</name>
17738 
              <description>Filter bits</description>
17739 
              <bitOffset>4</bitOffset>
17740 
              <bitWidth>1</bitWidth>
17741 
            </field>
17742 
            <field>
17743 
              <name>FB5</name>
17744 
              <description>Filter bits</description>
17745 
              <bitOffset>5</bitOffset>
17746 
              <bitWidth>1</bitWidth>
17747 
            </field>
17748 
            <field>
17749 
              <name>FB6</name>
17750 
              <description>Filter bits</description>
17751 
              <bitOffset>6</bitOffset>
17752 
              <bitWidth>1</bitWidth>
17753 
            </field>
17754 
            <field>
17755 
              <name>FB7</name>
17756 
              <description>Filter bits</description>
17757 
              <bitOffset>7</bitOffset>
17758 
              <bitWidth>1</bitWidth>
17759 
            </field>
17760 
            <field>
17761 
              <name>FB8</name>
17762 
              <description>Filter bits</description>
17763 
              <bitOffset>8</bitOffset>
17764 
              <bitWidth>1</bitWidth>
17765 
            </field>
17766 
            <field>
17767 
              <name>FB9</name>
17768 
              <description>Filter bits</description>
17769 
              <bitOffset>9</bitOffset>
17770 
              <bitWidth>1</bitWidth>
17771 
            </field>
17772 
            <field>
17773 
              <name>FB10</name>
17774 
              <description>Filter bits</description>
17775 
              <bitOffset>10</bitOffset>
17776 
              <bitWidth>1</bitWidth>
17777 
            </field>
17778 
            <field>
17779 
              <name>FB11</name>
17780 
              <description>Filter bits</description>
17781 
              <bitOffset>11</bitOffset>
17782 
              <bitWidth>1</bitWidth>
17783 
            </field>
17784 
            <field>
17785 
              <name>FB12</name>
17786 
              <description>Filter bits</description>
17787 
              <bitOffset>12</bitOffset>
17788 
              <bitWidth>1</bitWidth>
17789 
            </field>
17790 
            <field>
17791 
              <name>FB13</name>
17792 
              <description>Filter bits</description>
17793 
              <bitOffset>13</bitOffset>
17794 
              <bitWidth>1</bitWidth>
17795 
            </field>
17796 
            <field>
17797 
              <name>FB14</name>
17798 
              <description>Filter bits</description>
17799 
              <bitOffset>14</bitOffset>
17800 
              <bitWidth>1</bitWidth>
17801 
            </field>
17802 
            <field>
17803 
              <name>FB15</name>
17804 
              <description>Filter bits</description>
17805 
              <bitOffset>15</bitOffset>
17806 
              <bitWidth>1</bitWidth>
17807 
            </field>
17808 
            <field>
17809 
              <name>FB16</name>
17810 
              <description>Filter bits</description>
17811 
              <bitOffset>16</bitOffset>
17812 
              <bitWidth>1</bitWidth>
17813 
            </field>
17814 
            <field>
17815 
              <name>FB17</name>
17816 
              <description>Filter bits</description>
17817 
              <bitOffset>17</bitOffset>
17818 
              <bitWidth>1</bitWidth>
17819 
            </field>
17820 
            <field>
17821 
              <name>FB18</name>
17822 
              <description>Filter bits</description>
17823 
              <bitOffset>18</bitOffset>
17824 
              <bitWidth>1</bitWidth>
17825 
            </field>
17826 
            <field>
17827 
              <name>FB19</name>
17828 
              <description>Filter bits</description>
17829 
              <bitOffset>19</bitOffset>
17830 
              <bitWidth>1</bitWidth>
17831 
            </field>
17832 
            <field>
17833 
              <name>FB20</name>
17834 
              <description>Filter bits</description>
17835 
              <bitOffset>20</bitOffset>
17836 
              <bitWidth>1</bitWidth>
17837 
            </field>
17838 
            <field>
17839 
              <name>FB21</name>
17840 
              <description>Filter bits</description>
17841 
              <bitOffset>21</bitOffset>
17842 
              <bitWidth>1</bitWidth>
17843 
            </field>
17844 
            <field>
17845 
              <name>FB22</name>
17846 
              <description>Filter bits</description>
17847 
              <bitOffset>22</bitOffset>
17848 
              <bitWidth>1</bitWidth>
17849 
            </field>
17850 
            <field>
17851 
              <name>FB23</name>
17852 
              <description>Filter bits</description>
17853 
              <bitOffset>23</bitOffset>
17854 
              <bitWidth>1</bitWidth>
17855 
            </field>
17856 
            <field>
17857 
              <name>FB24</name>
17858 
              <description>Filter bits</description>
17859 
              <bitOffset>24</bitOffset>
17860 
              <bitWidth>1</bitWidth>
17861 
            </field>
17862 
            <field>
17863 
              <name>FB25</name>
17864 
              <description>Filter bits</description>
17865 
              <bitOffset>25</bitOffset>
17866 
              <bitWidth>1</bitWidth>
17867 
            </field>
17868 
            <field>
17869 
              <name>FB26</name>
17870 
              <description>Filter bits</description>
17871 
              <bitOffset>26</bitOffset>
17872 
              <bitWidth>1</bitWidth>
17873 
            </field>
17874 
            <field>
17875 
              <name>FB27</name>
17876 
              <description>Filter bits</description>
17877 
              <bitOffset>27</bitOffset>
17878 
              <bitWidth>1</bitWidth>
17879 
            </field>
17880 
            <field>
17881 
              <name>FB28</name>
17882 
              <description>Filter bits</description>
17883 
              <bitOffset>28</bitOffset>
17884 
              <bitWidth>1</bitWidth>
17885 
            </field>
17886 
            <field>
17887 
              <name>FB29</name>
17888 
              <description>Filter bits</description>
17889 
              <bitOffset>29</bitOffset>
17890 
              <bitWidth>1</bitWidth>
17891 
            </field>
17892 
            <field>
17893 
              <name>FB30</name>
17894 
              <description>Filter bits</description>
17895 
              <bitOffset>30</bitOffset>
17896 
              <bitWidth>1</bitWidth>
17897 
            </field>
17898 
            <field>
17899 
              <name>FB31</name>
17900 
              <description>Filter bits</description>
17901 
              <bitOffset>31</bitOffset>
17902 
              <bitWidth>1</bitWidth>
17903 
            </field>
17904 
          </fields>
17905 
		</register>
17906 
		<register>
17907 
          <name>F4R2</name>
17908 
          <displayName>F4R2</displayName>
17909 
          <description>Filter bank 4 register 2</description>
17910 
          <addressOffset>0x264</addressOffset>
17911 
          <size>0x20</size>
17912 
          <access>read-write</access>
17913 
          <resetValue>0x00000000</resetValue>
17914 
		  <fields>
17915 
            <field>
17916 
              <name>FB0</name>
17917 
              <description>Filter bits</description>
17918 
              <bitOffset>0</bitOffset>
17919 
              <bitWidth>1</bitWidth>
17920 
            </field>
17921 
            <field>
17922 
              <name>FB1</name>
17923 
              <description>Filter bits</description>
17924 
              <bitOffset>1</bitOffset>
17925 
              <bitWidth>1</bitWidth>
17926 
            </field>
17927 
            <field>
17928 
              <name>FB2</name>
17929 
              <description>Filter bits</description>
17930 
              <bitOffset>2</bitOffset>
17931 
              <bitWidth>1</bitWidth>
17932 
            </field>
17933 
            <field>
17934 
              <name>FB3</name>
17935 
              <description>Filter bits</description>
17936 
              <bitOffset>3</bitOffset>
17937 
              <bitWidth>1</bitWidth>
17938 
            </field>
17939 
            <field>
17940 
              <name>FB4</name>
17941 
              <description>Filter bits</description>
17942 
              <bitOffset>4</bitOffset>
17943 
              <bitWidth>1</bitWidth>
17944 
            </field>
17945 
            <field>
17946 
              <name>FB5</name>
17947 
              <description>Filter bits</description>
17948 
              <bitOffset>5</bitOffset>
17949 
              <bitWidth>1</bitWidth>
17950 
            </field>
17951 
            <field>
17952 
              <name>FB6</name>
17953 
              <description>Filter bits</description>
17954 
              <bitOffset>6</bitOffset>
17955 
              <bitWidth>1</bitWidth>
17956 
            </field>
17957 
            <field>
17958 
              <name>FB7</name>
17959 
              <description>Filter bits</description>
17960 
              <bitOffset>7</bitOffset>
17961 
              <bitWidth>1</bitWidth>
17962 
            </field>
17963 
            <field>
17964 
              <name>FB8</name>
17965 
              <description>Filter bits</description>
17966 
              <bitOffset>8</bitOffset>
17967 
              <bitWidth>1</bitWidth>
17968 
            </field>
17969 
            <field>
17970 
              <name>FB9</name>
17971 
              <description>Filter bits</description>
17972 
              <bitOffset>9</bitOffset>
17973 
              <bitWidth>1</bitWidth>
17974 
            </field>
17975 
            <field>
17976 
              <name>FB10</name>
17977 
              <description>Filter bits</description>
17978 
              <bitOffset>10</bitOffset>
17979 
              <bitWidth>1</bitWidth>
17980 
            </field>
17981 
            <field>
17982 
              <name>FB11</name>
17983 
              <description>Filter bits</description>
17984 
              <bitOffset>11</bitOffset>
17985 
              <bitWidth>1</bitWidth>
17986 
            </field>
17987 
            <field>
17988 
              <name>FB12</name>
17989 
              <description>Filter bits</description>
17990 
              <bitOffset>12</bitOffset>
17991 
              <bitWidth>1</bitWidth>
17992 
            </field>
17993 
            <field>
17994 
              <name>FB13</name>
17995 
              <description>Filter bits</description>
17996 
              <bitOffset>13</bitOffset>
17997 
              <bitWidth>1</bitWidth>
17998 
            </field>
17999 
            <field>
18000 
              <name>FB14</name>
18001 
              <description>Filter bits</description>
18002 
              <bitOffset>14</bitOffset>
18003 
              <bitWidth>1</bitWidth>
18004 
            </field>
18005 
            <field>
18006 
              <name>FB15</name>
18007 
              <description>Filter bits</description>
18008 
              <bitOffset>15</bitOffset>
18009 
              <bitWidth>1</bitWidth>
18010 
            </field>
18011 
            <field>
18012 
              <name>FB16</name>
18013 
              <description>Filter bits</description>
18014 
              <bitOffset>16</bitOffset>
18015 
              <bitWidth>1</bitWidth>
18016 
            </field>
18017 
            <field>
18018 
              <name>FB17</name>
18019 
              <description>Filter bits</description>
18020 
              <bitOffset>17</bitOffset>
18021 
              <bitWidth>1</bitWidth>
18022 
            </field>
18023 
            <field>
18024 
              <name>FB18</name>
18025 
              <description>Filter bits</description>
18026 
              <bitOffset>18</bitOffset>
18027 
              <bitWidth>1</bitWidth>
18028 
            </field>
18029 
            <field>
18030 
              <name>FB19</name>
18031 
              <description>Filter bits</description>
18032 
              <bitOffset>19</bitOffset>
18033 
              <bitWidth>1</bitWidth>
18034 
            </field>
18035 
            <field>
18036 
              <name>FB20</name>
18037 
              <description>Filter bits</description>
18038 
              <bitOffset>20</bitOffset>
18039 
              <bitWidth>1</bitWidth>
18040 
            </field>
18041 
            <field>
18042 
              <name>FB21</name>
18043 
              <description>Filter bits</description>
18044 
              <bitOffset>21</bitOffset>
18045 
              <bitWidth>1</bitWidth>
18046 
            </field>
18047 
            <field>
18048 
              <name>FB22</name>
18049 
              <description>Filter bits</description>
18050 
              <bitOffset>22</bitOffset>
18051 
              <bitWidth>1</bitWidth>
18052 
            </field>
18053 
            <field>
18054 
              <name>FB23</name>
18055 
              <description>Filter bits</description>
18056 
              <bitOffset>23</bitOffset>
18057 
              <bitWidth>1</bitWidth>
18058 
            </field>
18059 
            <field>
18060 
              <name>FB24</name>
18061 
              <description>Filter bits</description>
18062 
              <bitOffset>24</bitOffset>
18063 
              <bitWidth>1</bitWidth>
18064 
            </field>
18065 
            <field>
18066 
              <name>FB25</name>
18067 
              <description>Filter bits</description>
18068 
              <bitOffset>25</bitOffset>
18069 
              <bitWidth>1</bitWidth>
18070 
            </field>
18071 
            <field>
18072 
              <name>FB26</name>
18073 
              <description>Filter bits</description>
18074 
              <bitOffset>26</bitOffset>
18075 
              <bitWidth>1</bitWidth>
18076 
            </field>
18077 
            <field>
18078 
              <name>FB27</name>
18079 
              <description>Filter bits</description>
18080 
              <bitOffset>27</bitOffset>
18081 
              <bitWidth>1</bitWidth>
18082 
            </field>
18083 
            <field>
18084 
              <name>FB28</name>
18085 
              <description>Filter bits</description>
18086 
              <bitOffset>28</bitOffset>
18087 
              <bitWidth>1</bitWidth>
18088 
            </field>
18089 
            <field>
18090 
              <name>FB29</name>
18091 
              <description>Filter bits</description>
18092 
              <bitOffset>29</bitOffset>
18093 
              <bitWidth>1</bitWidth>
18094 
            </field>
18095 
            <field>
18096 
              <name>FB30</name>
18097 
              <description>Filter bits</description>
18098 
              <bitOffset>30</bitOffset>
18099 
              <bitWidth>1</bitWidth>
18100 
            </field>
18101 
            <field>
18102 
              <name>FB31</name>
18103 
              <description>Filter bits</description>
18104 
              <bitOffset>31</bitOffset>
18105 
              <bitWidth>1</bitWidth>
18106 
            </field>
18107 
          </fields>
18108 
		</register>
18109 
		<register>
18110 
          <name>F5R1</name>
18111 
          <displayName>F5R1</displayName>
18112 
          <description>Filter bank 5 register 1</description>
18113 
          <addressOffset>0x268</addressOffset>
18114 
          <size>0x20</size>
18115 
          <access>read-write</access>
18116 
          <resetValue>0x00000000</resetValue>
18117 
		  <fields>
18118 
            <field>
18119 
              <name>FB0</name>
18120 
              <description>Filter bits</description>
18121 
              <bitOffset>0</bitOffset>
18122 
              <bitWidth>1</bitWidth>
18123 
            </field>
18124 
            <field>
18125 
              <name>FB1</name>
18126 
              <description>Filter bits</description>
18127 
              <bitOffset>1</bitOffset>
18128 
              <bitWidth>1</bitWidth>
18129 
            </field>
18130 
            <field>
18131 
              <name>FB2</name>
18132 
              <description>Filter bits</description>
18133 
              <bitOffset>2</bitOffset>
18134 
              <bitWidth>1</bitWidth>
18135 
            </field>
18136 
            <field>
18137 
              <name>FB3</name>
18138 
              <description>Filter bits</description>
18139 
              <bitOffset>3</bitOffset>
18140 
              <bitWidth>1</bitWidth>
18141 
            </field>
18142 
            <field>
18143 
              <name>FB4</name>
18144 
              <description>Filter bits</description>
18145 
              <bitOffset>4</bitOffset>
18146 
              <bitWidth>1</bitWidth>
18147 
            </field>
18148 
            <field>
18149 
              <name>FB5</name>
18150 
              <description>Filter bits</description>
18151 
              <bitOffset>5</bitOffset>
18152 
              <bitWidth>1</bitWidth>
18153 
            </field>
18154 
            <field>
18155 
              <name>FB6</name>
18156 
              <description>Filter bits</description>
18157 
              <bitOffset>6</bitOffset>
18158 
              <bitWidth>1</bitWidth>
18159 
            </field>
18160 
            <field>
18161 
              <name>FB7</name>
18162 
              <description>Filter bits</description>
18163 
              <bitOffset>7</bitOffset>
18164 
              <bitWidth>1</bitWidth>
18165 
            </field>
18166 
            <field>
18167 
              <name>FB8</name>
18168 
              <description>Filter bits</description>
18169 
              <bitOffset>8</bitOffset>
18170 
              <bitWidth>1</bitWidth>
18171 
            </field>
18172 
            <field>
18173 
              <name>FB9</name>
18174 
              <description>Filter bits</description>
18175 
              <bitOffset>9</bitOffset>
18176 
              <bitWidth>1</bitWidth>
18177 
            </field>
18178 
            <field>
18179 
              <name>FB10</name>
18180 
              <description>Filter bits</description>
18181 
              <bitOffset>10</bitOffset>
18182 
              <bitWidth>1</bitWidth>
18183 
            </field>
18184 
            <field>
18185 
              <name>FB11</name>
18186 
              <description>Filter bits</description>
18187 
              <bitOffset>11</bitOffset>
18188 
              <bitWidth>1</bitWidth>
18189 
            </field>
18190 
            <field>
18191 
              <name>FB12</name>
18192 
              <description>Filter bits</description>
18193 
              <bitOffset>12</bitOffset>
18194 
              <bitWidth>1</bitWidth>
18195 
            </field>
18196 
            <field>
18197 
              <name>FB13</name>
18198 
              <description>Filter bits</description>
18199 
              <bitOffset>13</bitOffset>
18200 
              <bitWidth>1</bitWidth>
18201 
            </field>
18202 
            <field>
18203 
              <name>FB14</name>
18204 
              <description>Filter bits</description>
18205 
              <bitOffset>14</bitOffset>
18206 
              <bitWidth>1</bitWidth>
18207 
            </field>
18208 
            <field>
18209 
              <name>FB15</name>
18210 
              <description>Filter bits</description>
18211 
              <bitOffset>15</bitOffset>
18212 
              <bitWidth>1</bitWidth>
18213 
            </field>
18214 
            <field>
18215 
              <name>FB16</name>
18216 
              <description>Filter bits</description>
18217 
              <bitOffset>16</bitOffset>
18218 
              <bitWidth>1</bitWidth>
18219 
            </field>
18220 
            <field>
18221 
              <name>FB17</name>
18222 
              <description>Filter bits</description>
18223 
              <bitOffset>17</bitOffset>
18224 
              <bitWidth>1</bitWidth>
18225 
            </field>
18226 
            <field>
18227 
              <name>FB18</name>
18228 
              <description>Filter bits</description>
18229 
              <bitOffset>18</bitOffset>
18230 
              <bitWidth>1</bitWidth>
18231 
            </field>
18232 
            <field>
18233 
              <name>FB19</name>
18234 
              <description>Filter bits</description>
18235 
              <bitOffset>19</bitOffset>
18236 
              <bitWidth>1</bitWidth>
18237 
            </field>
18238 
            <field>
18239 
              <name>FB20</name>
18240 
              <description>Filter bits</description>
18241 
              <bitOffset>20</bitOffset>
18242 
              <bitWidth>1</bitWidth>
18243 
            </field>
18244 
            <field>
18245 
              <name>FB21</name>
18246 
              <description>Filter bits</description>
18247 
              <bitOffset>21</bitOffset>
18248 
              <bitWidth>1</bitWidth>
18249 
            </field>
18250 
            <field>
18251 
              <name>FB22</name>
18252 
              <description>Filter bits</description>
18253 
              <bitOffset>22</bitOffset>
18254 
              <bitWidth>1</bitWidth>
18255 
            </field>
18256 
            <field>
18257 
              <name>FB23</name>
18258 
              <description>Filter bits</description>
18259 
              <bitOffset>23</bitOffset>
18260 
              <bitWidth>1</bitWidth>
18261 
            </field>
18262 
            <field>
18263 
              <name>FB24</name>
18264 
              <description>Filter bits</description>
18265 
              <bitOffset>24</bitOffset>
18266 
              <bitWidth>1</bitWidth>
18267 
            </field>
18268 
            <field>
18269 
              <name>FB25</name>
18270 
              <description>Filter bits</description>
18271 
              <bitOffset>25</bitOffset>
18272 
              <bitWidth>1</bitWidth>
18273 
            </field>
18274 
            <field>
18275 
              <name>FB26</name>
18276 
              <description>Filter bits</description>
18277 
              <bitOffset>26</bitOffset>
18278 
              <bitWidth>1</bitWidth>
18279 
            </field>
18280 
            <field>
18281 
              <name>FB27</name>
18282 
              <description>Filter bits</description>
18283 
              <bitOffset>27</bitOffset>
18284 
              <bitWidth>1</bitWidth>
18285 
            </field>
18286 
            <field>
18287 
              <name>FB28</name>
18288 
              <description>Filter bits</description>
18289 
              <bitOffset>28</bitOffset>
18290 
              <bitWidth>1</bitWidth>
18291 
            </field>
18292 
            <field>
18293 
              <name>FB29</name>
18294 
              <description>Filter bits</description>
18295 
              <bitOffset>29</bitOffset>
18296 
              <bitWidth>1</bitWidth>
18297 
            </field>
18298 
            <field>
18299 
              <name>FB30</name>
18300 
              <description>Filter bits</description>
18301 
              <bitOffset>30</bitOffset>
18302 
              <bitWidth>1</bitWidth>
18303 
            </field>
18304 
            <field>
18305 
              <name>FB31</name>
18306 
              <description>Filter bits</description>
18307 
              <bitOffset>31</bitOffset>
18308 
              <bitWidth>1</bitWidth>
18309 
            </field>
18310 
          </fields>
18311 
		</register>
18312 
		<register>
18313 
          <name>F5R2</name>
18314 
          <displayName>F5R2</displayName>
18315 
          <description>Filter bank 5 register 2</description>
18316 
          <addressOffset>0x26C</addressOffset>
18317 
          <size>0x20</size>
18318 
          <access>read-write</access>
18319 
          <resetValue>0x00000000</resetValue>
18320 
		  <fields>
18321 
            <field>
18322 
              <name>FB0</name>
18323 
              <description>Filter bits</description>
18324 
              <bitOffset>0</bitOffset>
18325 
              <bitWidth>1</bitWidth>
18326 
            </field>
18327 
            <field>
18328 
              <name>FB1</name>
18329 
              <description>Filter bits</description>
18330 
              <bitOffset>1</bitOffset>
18331 
              <bitWidth>1</bitWidth>
18332 
            </field>
18333 
            <field>
18334 
              <name>FB2</name>
18335 
              <description>Filter bits</description>
18336 
              <bitOffset>2</bitOffset>
18337 
              <bitWidth>1</bitWidth>
18338 
            </field>
18339 
            <field>
18340 
              <name>FB3</name>
18341 
              <description>Filter bits</description>
18342 
              <bitOffset>3</bitOffset>
18343 
              <bitWidth>1</bitWidth>
18344 
            </field>
18345 
            <field>
18346 
              <name>FB4</name>
18347 
              <description>Filter bits</description>
18348 
              <bitOffset>4</bitOffset>
18349 
              <bitWidth>1</bitWidth>
18350 
            </field>
18351 
            <field>
18352 
              <name>FB5</name>
18353 
              <description>Filter bits</description>
18354 
              <bitOffset>5</bitOffset>
18355 
              <bitWidth>1</bitWidth>
18356 
            </field>
18357 
            <field>
18358 
              <name>FB6</name>
18359 
              <description>Filter bits</description>
18360 
              <bitOffset>6</bitOffset>
18361 
              <bitWidth>1</bitWidth>
18362 
            </field>
18363 
            <field>
18364 
              <name>FB7</name>
18365 
              <description>Filter bits</description>
18366 
              <bitOffset>7</bitOffset>
18367 
              <bitWidth>1</bitWidth>
18368 
            </field>
18369 
            <field>
18370 
              <name>FB8</name>
18371 
              <description>Filter bits</description>
18372 
              <bitOffset>8</bitOffset>
18373 
              <bitWidth>1</bitWidth>
18374 
            </field>
18375 
            <field>
18376 
              <name>FB9</name>
18377 
              <description>Filter bits</description>
18378 
              <bitOffset>9</bitOffset>
18379 
              <bitWidth>1</bitWidth>
18380 
            </field>
18381 
            <field>
18382 
              <name>FB10</name>
18383 
              <description>Filter bits</description>
18384 
              <bitOffset>10</bitOffset>
18385 
              <bitWidth>1</bitWidth>
18386 
            </field>
18387 
            <field>
18388 
              <name>FB11</name>
18389 
              <description>Filter bits</description>
18390 
              <bitOffset>11</bitOffset>
18391 
              <bitWidth>1</bitWidth>
18392 
            </field>
18393 
            <field>
18394 
              <name>FB12</name>
18395 
              <description>Filter bits</description>
18396 
              <bitOffset>12</bitOffset>
18397 
              <bitWidth>1</bitWidth>
18398 
            </field>
18399 
            <field>
18400 
              <name>FB13</name>
18401 
              <description>Filter bits</description>
18402 
              <bitOffset>13</bitOffset>
18403 
              <bitWidth>1</bitWidth>
18404 
            </field>
18405 
            <field>
18406 
              <name>FB14</name>
18407 
              <description>Filter bits</description>
18408 
              <bitOffset>14</bitOffset>
18409 
              <bitWidth>1</bitWidth>
18410 
            </field>
18411 
            <field>
18412 
              <name>FB15</name>
18413 
              <description>Filter bits</description>
18414 
              <bitOffset>15</bitOffset>
18415 
              <bitWidth>1</bitWidth>
18416 
            </field>
18417 
            <field>
18418 
              <name>FB16</name>
18419 
              <description>Filter bits</description>
18420 
              <bitOffset>16</bitOffset>
18421 
              <bitWidth>1</bitWidth>
18422 
            </field>
18423 
            <field>
18424 
              <name>FB17</name>
18425 
              <description>Filter bits</description>
18426 
              <bitOffset>17</bitOffset>
18427 
              <bitWidth>1</bitWidth>
18428 
            </field>
18429 
            <field>
18430 
              <name>FB18</name>
18431 
              <description>Filter bits</description>
18432 
              <bitOffset>18</bitOffset>
18433 
              <bitWidth>1</bitWidth>
18434 
            </field>
18435 
            <field>
18436 
              <name>FB19</name>
18437 
              <description>Filter bits</description>
18438 
              <bitOffset>19</bitOffset>
18439 
              <bitWidth>1</bitWidth>
18440 
            </field>
18441 
            <field>
18442 
              <name>FB20</name>
18443 
              <description>Filter bits</description>
18444 
              <bitOffset>20</bitOffset>
18445 
              <bitWidth>1</bitWidth>
18446 
            </field>
18447 
            <field>
18448 
              <name>FB21</name>
18449 
              <description>Filter bits</description>
18450 
              <bitOffset>21</bitOffset>
18451 
              <bitWidth>1</bitWidth>
18452 
            </field>
18453 
            <field>
18454 
              <name>FB22</name>
18455 
              <description>Filter bits</description>
18456 
              <bitOffset>22</bitOffset>
18457 
              <bitWidth>1</bitWidth>
18458 
            </field>
18459 
            <field>
18460 
              <name>FB23</name>
18461 
              <description>Filter bits</description>
18462 
              <bitOffset>23</bitOffset>
18463 
              <bitWidth>1</bitWidth>
18464 
            </field>
18465 
            <field>
18466 
              <name>FB24</name>
18467 
              <description>Filter bits</description>
18468 
              <bitOffset>24</bitOffset>
18469 
              <bitWidth>1</bitWidth>
18470 
            </field>
18471 
            <field>
18472 
              <name>FB25</name>
18473 
              <description>Filter bits</description>
18474 
              <bitOffset>25</bitOffset>
18475 
              <bitWidth>1</bitWidth>
18476 
            </field>
18477 
            <field>
18478 
              <name>FB26</name>
18479 
              <description>Filter bits</description>
18480 
              <bitOffset>26</bitOffset>
18481 
              <bitWidth>1</bitWidth>
18482 
            </field>
18483 
            <field>
18484 
              <name>FB27</name>
18485 
              <description>Filter bits</description>
18486 
              <bitOffset>27</bitOffset>
18487 
              <bitWidth>1</bitWidth>
18488 
            </field>
18489 
            <field>
18490 
              <name>FB28</name>
18491 
              <description>Filter bits</description>
18492 
              <bitOffset>28</bitOffset>
18493 
              <bitWidth>1</bitWidth>
18494 
            </field>
18495 
            <field>
18496 
              <name>FB29</name>
18497 
              <description>Filter bits</description>
18498 
              <bitOffset>29</bitOffset>
18499 
              <bitWidth>1</bitWidth>
18500 
            </field>
18501 
            <field>
18502 
              <name>FB30</name>
18503 
              <description>Filter bits</description>
18504 
              <bitOffset>30</bitOffset>
18505 
              <bitWidth>1</bitWidth>
18506 
            </field>
18507 
            <field>
18508 
              <name>FB31</name>
18509 
              <description>Filter bits</description>
18510 
              <bitOffset>31</bitOffset>
18511 
              <bitWidth>1</bitWidth>
18512 
            </field>
18513 
          </fields>
18514 
		</register>
18515 
		<register>
18516 
          <name>F6R1</name>
18517 
          <displayName>F6R1</displayName>
18518 
          <description>Filter bank 6 register 1</description>
18519 
          <addressOffset>0x270</addressOffset>
18520 
          <size>0x20</size>
18521 
          <access>read-write</access>
18522 
          <resetValue>0x00000000</resetValue>
18523 
		  <fields>
18524 
            <field>
18525 
              <name>FB0</name>
18526 
              <description>Filter bits</description>
18527 
              <bitOffset>0</bitOffset>
18528 
              <bitWidth>1</bitWidth>
18529 
            </field>
18530 
            <field>
18531 
              <name>FB1</name>
18532 
              <description>Filter bits</description>
18533 
              <bitOffset>1</bitOffset>
18534 
              <bitWidth>1</bitWidth>
18535 
            </field>
18536 
            <field>
18537 
              <name>FB2</name>
18538 
              <description>Filter bits</description>
18539 
              <bitOffset>2</bitOffset>
18540 
              <bitWidth>1</bitWidth>
18541 
            </field>
18542 
            <field>
18543 
              <name>FB3</name>
18544 
              <description>Filter bits</description>
18545 
              <bitOffset>3</bitOffset>
18546 
              <bitWidth>1</bitWidth>
18547 
            </field>
18548 
            <field>
18549 
              <name>FB4</name>
18550 
              <description>Filter bits</description>
18551 
              <bitOffset>4</bitOffset>
18552 
              <bitWidth>1</bitWidth>
18553 
            </field>
18554 
            <field>
18555 
              <name>FB5</name>
18556 
              <description>Filter bits</description>
18557 
              <bitOffset>5</bitOffset>
18558 
              <bitWidth>1</bitWidth>
18559 
            </field>
18560 
            <field>
18561 
              <name>FB6</name>
18562 
              <description>Filter bits</description>
18563 
              <bitOffset>6</bitOffset>
18564 
              <bitWidth>1</bitWidth>
18565 
            </field>
18566 
            <field>
18567 
              <name>FB7</name>
18568 
              <description>Filter bits</description>
18569 
              <bitOffset>7</bitOffset>
18570 
              <bitWidth>1</bitWidth>
18571 
            </field>
18572 
            <field>
18573 
              <name>FB8</name>
18574 
              <description>Filter bits</description>
18575 
              <bitOffset>8</bitOffset>
18576 
              <bitWidth>1</bitWidth>
18577 
            </field>
18578 
            <field>
18579 
              <name>FB9</name>
18580 
              <description>Filter bits</description>
18581 
              <bitOffset>9</bitOffset>
18582 
              <bitWidth>1</bitWidth>
18583 
            </field>
18584 
            <field>
18585 
              <name>FB10</name>
18586 
              <description>Filter bits</description>
18587 
              <bitOffset>10</bitOffset>
18588 
              <bitWidth>1</bitWidth>
18589 
            </field>
18590 
            <field>
18591 
              <name>FB11</name>
18592 
              <description>Filter bits</description>
18593 
              <bitOffset>11</bitOffset>
18594 
              <bitWidth>1</bitWidth>
18595 
            </field>
18596 
            <field>
18597 
              <name>FB12</name>
18598 
              <description>Filter bits</description>
18599 
              <bitOffset>12</bitOffset>
18600 
              <bitWidth>1</bitWidth>
18601 
            </field>
18602 
            <field>
18603 
              <name>FB13</name>
18604 
              <description>Filter bits</description>
18605 
              <bitOffset>13</bitOffset>
18606 
              <bitWidth>1</bitWidth>
18607 
            </field>
18608 
            <field>
18609 
              <name>FB14</name>
18610 
              <description>Filter bits</description>
18611 
              <bitOffset>14</bitOffset>
18612 
              <bitWidth>1</bitWidth>
18613 
            </field>
18614 
            <field>
18615 
              <name>FB15</name>
18616 
              <description>Filter bits</description>
18617 
              <bitOffset>15</bitOffset>
18618 
              <bitWidth>1</bitWidth>
18619 
            </field>
18620 
            <field>
18621 
              <name>FB16</name>
18622 
              <description>Filter bits</description>
18623 
              <bitOffset>16</bitOffset>
18624 
              <bitWidth>1</bitWidth>
18625 
            </field>
18626 
            <field>
18627 
              <name>FB17</name>
18628 
              <description>Filter bits</description>
18629 
              <bitOffset>17</bitOffset>
18630 
              <bitWidth>1</bitWidth>
18631 
            </field>
18632 
            <field>
18633 
              <name>FB18</name>
18634 
              <description>Filter bits</description>
18635 
              <bitOffset>18</bitOffset>
18636 
              <bitWidth>1</bitWidth>
18637 
            </field>
18638 
            <field>
18639 
              <name>FB19</name>
18640 
              <description>Filter bits</description>
18641 
              <bitOffset>19</bitOffset>
18642 
              <bitWidth>1</bitWidth>
18643 
            </field>
18644 
            <field>
18645 
              <name>FB20</name>
18646 
              <description>Filter bits</description>
18647 
              <bitOffset>20</bitOffset>
18648 
              <bitWidth>1</bitWidth>
18649 
            </field>
18650 
            <field>
18651 
              <name>FB21</name>
18652 
              <description>Filter bits</description>
18653 
              <bitOffset>21</bitOffset>
18654 
              <bitWidth>1</bitWidth>
18655 
            </field>
18656 
            <field>
18657 
              <name>FB22</name>
18658 
              <description>Filter bits</description>
18659 
              <bitOffset>22</bitOffset>
18660 
              <bitWidth>1</bitWidth>
18661 
            </field>
18662 
            <field>
18663 
              <name>FB23</name>
18664 
              <description>Filter bits</description>
18665 
              <bitOffset>23</bitOffset>
18666 
              <bitWidth>1</bitWidth>
18667 
            </field>
18668 
            <field>
18669 
              <name>FB24</name>
18670 
              <description>Filter bits</description>
18671 
              <bitOffset>24</bitOffset>
18672 
              <bitWidth>1</bitWidth>
18673 
            </field>
18674 
            <field>
18675 
              <name>FB25</name>
18676 
              <description>Filter bits</description>
18677 
              <bitOffset>25</bitOffset>
18678 
              <bitWidth>1</bitWidth>
18679 
            </field>
18680 
            <field>
18681 
              <name>FB26</name>
18682 
              <description>Filter bits</description>
18683 
              <bitOffset>26</bitOffset>
18684 
              <bitWidth>1</bitWidth>
18685 
            </field>
18686 
            <field>
18687 
              <name>FB27</name>
18688 
              <description>Filter bits</description>
18689 
              <bitOffset>27</bitOffset>
18690 
              <bitWidth>1</bitWidth>
18691 
            </field>
18692 
            <field>
18693 
              <name>FB28</name>
18694 
              <description>Filter bits</description>
18695 
              <bitOffset>28</bitOffset>
18696 
              <bitWidth>1</bitWidth>
18697 
            </field>
18698 
            <field>
18699 
              <name>FB29</name>
18700 
              <description>Filter bits</description>
18701 
              <bitOffset>29</bitOffset>
18702 
              <bitWidth>1</bitWidth>
18703 
            </field>
18704 
            <field>
18705 
              <name>FB30</name>
18706 
              <description>Filter bits</description>
18707 
              <bitOffset>30</bitOffset>
18708 
              <bitWidth>1</bitWidth>
18709 
            </field>
18710 
            <field>
18711 
              <name>FB31</name>
18712 
              <description>Filter bits</description>
18713 
              <bitOffset>31</bitOffset>
18714 
              <bitWidth>1</bitWidth>
18715 
            </field>
18716 
          </fields>
18717 
		</register>
18718 
		<register>
18719 
          <name>F6R2</name>
18720 
          <displayName>F6R2</displayName>
18721 
          <description>Filter bank 6 register 2</description>
18722 
          <addressOffset>0x274</addressOffset>
18723 
          <size>0x20</size>
18724 
          <access>read-write</access>
18725 
          <resetValue>0x00000000</resetValue>
18726 
		  <fields>
18727 
            <field>
18728 
              <name>FB0</name>
18729 
              <description>Filter bits</description>
18730 
              <bitOffset>0</bitOffset>
18731 
              <bitWidth>1</bitWidth>
18732 
            </field>
18733 
            <field>
18734 
              <name>FB1</name>
18735 
              <description>Filter bits</description>
18736 
              <bitOffset>1</bitOffset>
18737 
              <bitWidth>1</bitWidth>
18738 
            </field>
18739 
            <field>
18740 
              <name>FB2</name>
18741 
              <description>Filter bits</description>
18742 
              <bitOffset>2</bitOffset>
18743 
              <bitWidth>1</bitWidth>
18744 
            </field>
18745 
            <field>
18746 
              <name>FB3</name>
18747 
              <description>Filter bits</description>
18748 
              <bitOffset>3</bitOffset>
18749 
              <bitWidth>1</bitWidth>
18750 
            </field>
18751 
            <field>
18752 
              <name>FB4</name>
18753 
              <description>Filter bits</description>
18754 
              <bitOffset>4</bitOffset>
18755 
              <bitWidth>1</bitWidth>
18756 
            </field>
18757 
            <field>
18758 
              <name>FB5</name>
18759 
              <description>Filter bits</description>
18760 
              <bitOffset>5</bitOffset>
18761 
              <bitWidth>1</bitWidth>
18762 
            </field>
18763 
            <field>
18764 
              <name>FB6</name>
18765 
              <description>Filter bits</description>
18766 
              <bitOffset>6</bitOffset>
18767 
              <bitWidth>1</bitWidth>
18768 
            </field>
18769 
            <field>
18770 
              <name>FB7</name>
18771 
              <description>Filter bits</description>
18772 
              <bitOffset>7</bitOffset>
18773 
              <bitWidth>1</bitWidth>
18774 
            </field>
18775 
            <field>
18776 
              <name>FB8</name>
18777 
              <description>Filter bits</description>
18778 
              <bitOffset>8</bitOffset>
18779 
              <bitWidth>1</bitWidth>
18780 
            </field>
18781 
            <field>
18782 
              <name>FB9</name>
18783 
              <description>Filter bits</description>
18784 
              <bitOffset>9</bitOffset>
18785 
              <bitWidth>1</bitWidth>
18786 
            </field>
18787 
            <field>
18788 
              <name>FB10</name>
18789 
              <description>Filter bits</description>
18790 
              <bitOffset>10</bitOffset>
18791 
              <bitWidth>1</bitWidth>
18792 
            </field>
18793 
            <field>
18794 
              <name>FB11</name>
18795 
              <description>Filter bits</description>
18796 
              <bitOffset>11</bitOffset>
18797 
              <bitWidth>1</bitWidth>
18798 
            </field>
18799 
            <field>
18800 
              <name>FB12</name>
18801 
              <description>Filter bits</description>
18802 
              <bitOffset>12</bitOffset>
18803 
              <bitWidth>1</bitWidth>
18804 
            </field>
18805 
            <field>
18806 
              <name>FB13</name>
18807 
              <description>Filter bits</description>
18808 
              <bitOffset>13</bitOffset>
18809 
              <bitWidth>1</bitWidth>
18810 
            </field>
18811 
            <field>
18812 
              <name>FB14</name>
18813 
              <description>Filter bits</description>
18814 
              <bitOffset>14</bitOffset>
18815 
              <bitWidth>1</bitWidth>
18816 
            </field>
18817 
            <field>
18818 
              <name>FB15</name>
18819 
              <description>Filter bits</description>
18820 
              <bitOffset>15</bitOffset>
18821 
              <bitWidth>1</bitWidth>
18822 
            </field>
18823 
            <field>
18824 
              <name>FB16</name>
18825 
              <description>Filter bits</description>
18826 
              <bitOffset>16</bitOffset>
18827 
              <bitWidth>1</bitWidth>
18828 
            </field>
18829 
            <field>
18830 
              <name>FB17</name>
18831 
              <description>Filter bits</description>
18832 
              <bitOffset>17</bitOffset>
18833 
              <bitWidth>1</bitWidth>
18834 
            </field>
18835 
            <field>
18836 
              <name>FB18</name>
18837 
              <description>Filter bits</description>
18838 
              <bitOffset>18</bitOffset>
18839 
              <bitWidth>1</bitWidth>
18840 
            </field>
18841 
            <field>
18842 
              <name>FB19</name>
18843 
              <description>Filter bits</description>
18844 
              <bitOffset>19</bitOffset>
18845 
              <bitWidth>1</bitWidth>
18846 
            </field>
18847 
            <field>
18848 
              <name>FB20</name>
18849 
              <description>Filter bits</description>
18850 
              <bitOffset>20</bitOffset>
18851 
              <bitWidth>1</bitWidth>
18852 
            </field>
18853 
            <field>
18854 
              <name>FB21</name>
18855 
              <description>Filter bits</description>
18856 
              <bitOffset>21</bitOffset>
18857 
              <bitWidth>1</bitWidth>
18858 
            </field>
18859 
            <field>
18860 
              <name>FB22</name>
18861 
              <description>Filter bits</description>
18862 
              <bitOffset>22</bitOffset>
18863 
              <bitWidth>1</bitWidth>
18864 
            </field>
18865 
            <field>
18866 
              <name>FB23</name>
18867 
              <description>Filter bits</description>
18868 
              <bitOffset>23</bitOffset>
18869 
              <bitWidth>1</bitWidth>
18870 
            </field>
18871 
            <field>
18872 
              <name>FB24</name>
18873 
              <description>Filter bits</description>
18874 
              <bitOffset>24</bitOffset>
18875 
              <bitWidth>1</bitWidth>
18876 
            </field>
18877 
            <field>
18878 
              <name>FB25</name>
18879 
              <description>Filter bits</description>
18880 
              <bitOffset>25</bitOffset>
18881 
              <bitWidth>1</bitWidth>
18882 
            </field>
18883 
            <field>
18884 
              <name>FB26</name>
18885 
              <description>Filter bits</description>
18886 
              <bitOffset>26</bitOffset>
18887 
              <bitWidth>1</bitWidth>
18888 
            </field>
18889 
            <field>
18890 
              <name>FB27</name>
18891 
              <description>Filter bits</description>
18892 
              <bitOffset>27</bitOffset>
18893 
              <bitWidth>1</bitWidth>
18894 
            </field>
18895 
            <field>
18896 
              <name>FB28</name>
18897 
              <description>Filter bits</description>
18898 
              <bitOffset>28</bitOffset>
18899 
              <bitWidth>1</bitWidth>
18900 
            </field>
18901 
            <field>
18902 
              <name>FB29</name>
18903 
              <description>Filter bits</description>
18904 
              <bitOffset>29</bitOffset>
18905 
              <bitWidth>1</bitWidth>
18906 
            </field>
18907 
            <field>
18908 
              <name>FB30</name>
18909 
              <description>Filter bits</description>
18910 
              <bitOffset>30</bitOffset>
18911 
              <bitWidth>1</bitWidth>
18912 
            </field>
18913 
            <field>
18914 
              <name>FB31</name>
18915 
              <description>Filter bits</description>
18916 
              <bitOffset>31</bitOffset>
18917 
              <bitWidth>1</bitWidth>
18918 
            </field>
18919 
          </fields>
18920 
		</register>
18921 
 
18922 
		<register>
18923 
          <name>F7R1</name>
18924 
          <displayName>F7R1</displayName>
18925 
          <description>Filter bank 7 register 1</description>
18926 
          <addressOffset>0x278</addressOffset>
18927 
          <size>0x20</size>
18928 
          <access>read-write</access>
18929 
          <resetValue>0x00000000</resetValue>
18930 
		  <fields>
18931 
            <field>
18932 
              <name>FB0</name>
18933 
              <description>Filter bits</description>
18934 
              <bitOffset>0</bitOffset>
18935 
              <bitWidth>1</bitWidth>
18936 
            </field>
18937 
            <field>
18938 
              <name>FB1</name>
18939 
              <description>Filter bits</description>
18940 
              <bitOffset>1</bitOffset>
18941 
              <bitWidth>1</bitWidth>
18942 
            </field>
18943 
            <field>
18944 
              <name>FB2</name>
18945 
              <description>Filter bits</description>
18946 
              <bitOffset>2</bitOffset>
18947 
              <bitWidth>1</bitWidth>
18948 
            </field>
18949 
            <field>
18950 
              <name>FB3</name>
18951 
              <description>Filter bits</description>
18952 
              <bitOffset>3</bitOffset>
18953 
              <bitWidth>1</bitWidth>
18954 
            </field>
18955 
            <field>
18956 
              <name>FB4</name>
18957 
              <description>Filter bits</description>
18958 
              <bitOffset>4</bitOffset>
18959 
              <bitWidth>1</bitWidth>
18960 
            </field>
18961 
            <field>
18962 
              <name>FB5</name>
18963 
              <description>Filter bits</description>
18964 
              <bitOffset>5</bitOffset>
18965 
              <bitWidth>1</bitWidth>
18966 
            </field>
18967 
            <field>
18968 
              <name>FB6</name>
18969 
              <description>Filter bits</description>
18970 
              <bitOffset>6</bitOffset>
18971 
              <bitWidth>1</bitWidth>
18972 
            </field>
18973 
            <field>
18974 
              <name>FB7</name>
18975 
              <description>Filter bits</description>
18976 
              <bitOffset>7</bitOffset>
18977 
              <bitWidth>1</bitWidth>
18978 
            </field>
18979 
            <field>
18980 
              <name>FB8</name>
18981 
              <description>Filter bits</description>
18982 
              <bitOffset>8</bitOffset>
18983 
              <bitWidth>1</bitWidth>
18984 
            </field>
18985 
            <field>
18986 
              <name>FB9</name>
18987 
              <description>Filter bits</description>
18988 
              <bitOffset>9</bitOffset>
18989 
              <bitWidth>1</bitWidth>
18990 
            </field>
18991 
            <field>
18992 
              <name>FB10</name>
18993 
              <description>Filter bits</description>
18994 
              <bitOffset>10</bitOffset>
18995 
              <bitWidth>1</bitWidth>
18996 
            </field>
18997 
            <field>
18998 
              <name>FB11</name>
18999 
              <description>Filter bits</description>
19000 
              <bitOffset>11</bitOffset>
19001 
              <bitWidth>1</bitWidth>
19002 
            </field>
19003 
            <field>
19004 
              <name>FB12</name>
19005 
              <description>Filter bits</description>
19006 
              <bitOffset>12</bitOffset>
19007 
              <bitWidth>1</bitWidth>
19008 
            </field>
19009 
            <field>
19010 
              <name>FB13</name>
19011 
              <description>Filter bits</description>
19012 
              <bitOffset>13</bitOffset>
19013 
              <bitWidth>1</bitWidth>
19014 
            </field>
19015 
            <field>
19016 
              <name>FB14</name>
19017 
              <description>Filter bits</description>
19018 
              <bitOffset>14</bitOffset>
19019 
              <bitWidth>1</bitWidth>
19020 
            </field>
19021 
            <field>
19022 
              <name>FB15</name>
19023 
              <description>Filter bits</description>
19024 
              <bitOffset>15</bitOffset>
19025 
              <bitWidth>1</bitWidth>
19026 
            </field>
19027 
            <field>
19028 
              <name>FB16</name>
19029 
              <description>Filter bits</description>
19030 
              <bitOffset>16</bitOffset>
19031 
              <bitWidth>1</bitWidth>
19032 
            </field>
19033 
            <field>
19034 
              <name>FB17</name>
19035 
              <description>Filter bits</description>
19036 
              <bitOffset>17</bitOffset>
19037 
              <bitWidth>1</bitWidth>
19038 
            </field>
19039 
            <field>
19040 
              <name>FB18</name>
19041 
              <description>Filter bits</description>
19042 
              <bitOffset>18</bitOffset>
19043 
              <bitWidth>1</bitWidth>
19044 
            </field>
19045 
            <field>
19046 
              <name>FB19</name>
19047 
              <description>Filter bits</description>
19048 
              <bitOffset>19</bitOffset>
19049 
              <bitWidth>1</bitWidth>
19050 
            </field>
19051 
            <field>
19052 
              <name>FB20</name>
19053 
              <description>Filter bits</description>
19054 
              <bitOffset>20</bitOffset>
19055 
              <bitWidth>1</bitWidth>
19056 
            </field>
19057 
            <field>
19058 
              <name>FB21</name>
19059 
              <description>Filter bits</description>
19060 
              <bitOffset>21</bitOffset>
19061 
              <bitWidth>1</bitWidth>
19062 
            </field>
19063 
            <field>
19064 
              <name>FB22</name>
19065 
              <description>Filter bits</description>
19066 
              <bitOffset>22</bitOffset>
19067 
              <bitWidth>1</bitWidth>
19068 
            </field>
19069 
            <field>
19070 
              <name>FB23</name>
19071 
              <description>Filter bits</description>
19072 
              <bitOffset>23</bitOffset>
19073 
              <bitWidth>1</bitWidth>
19074 
            </field>
19075 
            <field>
19076 
              <name>FB24</name>
19077 
              <description>Filter bits</description>
19078 
              <bitOffset>24</bitOffset>
19079 
              <bitWidth>1</bitWidth>
19080 
            </field>
19081 
            <field>
19082 
              <name>FB25</name>
19083 
              <description>Filter bits</description>
19084 
              <bitOffset>25</bitOffset>
19085 
              <bitWidth>1</bitWidth>
19086 
            </field>
19087 
            <field>
19088 
              <name>FB26</name>
19089 
              <description>Filter bits</description>
19090 
              <bitOffset>26</bitOffset>
19091 
              <bitWidth>1</bitWidth>
19092 
            </field>
19093 
            <field>
19094 
              <name>FB27</name>
19095 
              <description>Filter bits</description>
19096 
              <bitOffset>27</bitOffset>
19097 
              <bitWidth>1</bitWidth>
19098 
            </field>
19099 
            <field>
19100 
              <name>FB28</name>
19101 
              <description>Filter bits</description>
19102 
              <bitOffset>28</bitOffset>
19103 
              <bitWidth>1</bitWidth>
19104 
            </field>
19105 
            <field>
19106 
              <name>FB29</name>
19107 
              <description>Filter bits</description>
19108 
              <bitOffset>29</bitOffset>
19109 
              <bitWidth>1</bitWidth>
19110 
            </field>
19111 
            <field>
19112 
              <name>FB30</name>
19113 
              <description>Filter bits</description>
19114 
              <bitOffset>30</bitOffset>
19115 
              <bitWidth>1</bitWidth>
19116 
            </field>
19117 
            <field>
19118 
              <name>FB31</name>
19119 
              <description>Filter bits</description>
19120 
              <bitOffset>31</bitOffset>
19121 
              <bitWidth>1</bitWidth>
19122 
            </field>
19123 
          </fields>
19124 
		</register>
19125 
		<register>
19126 
          <name>F7R2</name>
19127 
          <displayName>F7R2</displayName>
19128 
          <description>Filter bank 7 register 2</description>
19129 
          <addressOffset>0x27C</addressOffset>
19130 
          <size>0x20</size>
19131 
          <access>read-write</access>
19132 
          <resetValue>0x00000000</resetValue>
19133 
		  <fields>
19134 
            <field>
19135 
              <name>FB0</name>
19136 
              <description>Filter bits</description>
19137 
              <bitOffset>0</bitOffset>
19138 
              <bitWidth>1</bitWidth>
19139 
            </field>
19140 
            <field>
19141 
              <name>FB1</name>
19142 
              <description>Filter bits</description>
19143 
              <bitOffset>1</bitOffset>
19144 
              <bitWidth>1</bitWidth>
19145 
            </field>
19146 
            <field>
19147 
              <name>FB2</name>
19148 
              <description>Filter bits</description>
19149 
              <bitOffset>2</bitOffset>
19150 
              <bitWidth>1</bitWidth>
19151 
            </field>
19152 
            <field>
19153 
              <name>FB3</name>
19154 
              <description>Filter bits</description>
19155 
              <bitOffset>3</bitOffset>
19156 
              <bitWidth>1</bitWidth>
19157 
            </field>
19158 
            <field>
19159 
              <name>FB4</name>
19160 
              <description>Filter bits</description>
19161 
              <bitOffset>4</bitOffset>
19162 
              <bitWidth>1</bitWidth>
19163 
            </field>
19164 
            <field>
19165 
              <name>FB5</name>
19166 
              <description>Filter bits</description>
19167 
              <bitOffset>5</bitOffset>
19168 
              <bitWidth>1</bitWidth>
19169 
            </field>
19170 
            <field>
19171 
              <name>FB6</name>
19172 
              <description>Filter bits</description>
19173 
              <bitOffset>6</bitOffset>
19174 
              <bitWidth>1</bitWidth>
19175 
            </field>
19176 
            <field>
19177 
              <name>FB7</name>
19178 
              <description>Filter bits</description>
19179 
              <bitOffset>7</bitOffset>
19180 
              <bitWidth>1</bitWidth>
19181 
            </field>
19182 
            <field>
19183 
              <name>FB8</name>
19184 
              <description>Filter bits</description>
19185 
              <bitOffset>8</bitOffset>
19186 
              <bitWidth>1</bitWidth>
19187 
            </field>
19188 
            <field>
19189 
              <name>FB9</name>
19190 
              <description>Filter bits</description>
19191 
              <bitOffset>9</bitOffset>
19192 
              <bitWidth>1</bitWidth>
19193 
            </field>
19194 
            <field>
19195 
              <name>FB10</name>
19196 
              <description>Filter bits</description>
19197 
              <bitOffset>10</bitOffset>
19198 
              <bitWidth>1</bitWidth>
19199 
            </field>
19200 
            <field>
19201 
              <name>FB11</name>
19202 
              <description>Filter bits</description>
19203 
              <bitOffset>11</bitOffset>
19204 
              <bitWidth>1</bitWidth>
19205 
            </field>
19206 
            <field>
19207 
              <name>FB12</name>
19208 
              <description>Filter bits</description>
19209 
              <bitOffset>12</bitOffset>
19210 
              <bitWidth>1</bitWidth>
19211 
            </field>
19212 
            <field>
19213 
              <name>FB13</name>
19214 
              <description>Filter bits</description>
19215 
              <bitOffset>13</bitOffset>
19216 
              <bitWidth>1</bitWidth>
19217 
            </field>
19218 
            <field>
19219 
              <name>FB14</name>
19220 
              <description>Filter bits</description>
19221 
              <bitOffset>14</bitOffset>
19222 
              <bitWidth>1</bitWidth>
19223 
            </field>
19224 
            <field>
19225 
              <name>FB15</name>
19226 
              <description>Filter bits</description>
19227 
              <bitOffset>15</bitOffset>
19228 
              <bitWidth>1</bitWidth>
19229 
            </field>
19230 
            <field>
19231 
              <name>FB16</name>
19232 
              <description>Filter bits</description>
19233 
              <bitOffset>16</bitOffset>
19234 
              <bitWidth>1</bitWidth>
19235 
            </field>
19236 
            <field>
19237 
              <name>FB17</name>
19238 
              <description>Filter bits</description>
19239 
              <bitOffset>17</bitOffset>
19240 
              <bitWidth>1</bitWidth>
19241 
            </field>
19242 
            <field>
19243 
              <name>FB18</name>
19244 
              <description>Filter bits</description>
19245 
              <bitOffset>18</bitOffset>
19246 
              <bitWidth>1</bitWidth>
19247 
            </field>
19248 
            <field>
19249 
              <name>FB19</name>
19250 
              <description>Filter bits</description>
19251 
              <bitOffset>19</bitOffset>
19252 
              <bitWidth>1</bitWidth>
19253 
            </field>
19254 
            <field>
19255 
              <name>FB20</name>
19256 
              <description>Filter bits</description>
19257 
              <bitOffset>20</bitOffset>
19258 
              <bitWidth>1</bitWidth>
19259 
            </field>
19260 
            <field>
19261 
              <name>FB21</name>
19262 
              <description>Filter bits</description>
19263 
              <bitOffset>21</bitOffset>
19264 
              <bitWidth>1</bitWidth>
19265 
            </field>
19266 
            <field>
19267 
              <name>FB22</name>
19268 
              <description>Filter bits</description>
19269 
              <bitOffset>22</bitOffset>
19270 
              <bitWidth>1</bitWidth>
19271 
            </field>
19272 
            <field>
19273 
              <name>FB23</name>
19274 
              <description>Filter bits</description>
19275 
              <bitOffset>23</bitOffset>
19276 
              <bitWidth>1</bitWidth>
19277 
            </field>
19278 
            <field>
19279 
              <name>FB24</name>
19280 
              <description>Filter bits</description>
19281 
              <bitOffset>24</bitOffset>
19282 
              <bitWidth>1</bitWidth>
19283 
            </field>
19284 
            <field>
19285 
              <name>FB25</name>
19286 
              <description>Filter bits</description>
19287 
              <bitOffset>25</bitOffset>
19288 
              <bitWidth>1</bitWidth>
19289 
            </field>
19290 
            <field>
19291 
              <name>FB26</name>
19292 
              <description>Filter bits</description>
19293 
              <bitOffset>26</bitOffset>
19294 
              <bitWidth>1</bitWidth>
19295 
            </field>
19296 
            <field>
19297 
              <name>FB27</name>
19298 
              <description>Filter bits</description>
19299 
              <bitOffset>27</bitOffset>
19300 
              <bitWidth>1</bitWidth>
19301 
            </field>
19302 
            <field>
19303 
              <name>FB28</name>
19304 
              <description>Filter bits</description>
19305 
              <bitOffset>28</bitOffset>
19306 
              <bitWidth>1</bitWidth>
19307 
            </field>
19308 
            <field>
19309 
              <name>FB29</name>
19310 
              <description>Filter bits</description>
19311 
              <bitOffset>29</bitOffset>
19312 
              <bitWidth>1</bitWidth>
19313 
            </field>
19314 
            <field>
19315 
              <name>FB30</name>
19316 
              <description>Filter bits</description>
19317 
              <bitOffset>30</bitOffset>
19318 
              <bitWidth>1</bitWidth>
19319 
            </field>
19320 
            <field>
19321 
              <name>FB31</name>
19322 
              <description>Filter bits</description>
19323 
              <bitOffset>31</bitOffset>
19324 
              <bitWidth>1</bitWidth>
19325 
            </field>
19326 
          </fields>
19327 
		</register>
19328 
		<register>
19329 
          <name>F8R1</name>
19330 
          <displayName>F8R1</displayName>
19331 
          <description>Filter bank 8 register 1</description>
19332 
          <addressOffset>0x280</addressOffset>
19333 
          <size>0x20</size>
19334 
          <access>read-write</access>
19335 
          <resetValue>0x00000000</resetValue>
19336 
		  <fields>
19337 
            <field>
19338 
              <name>FB0</name>
19339 
              <description>Filter bits</description>
19340 
              <bitOffset>0</bitOffset>
19341 
              <bitWidth>1</bitWidth>
19342 
            </field>
19343 
            <field>
19344 
              <name>FB1</name>
19345 
              <description>Filter bits</description>
19346 
              <bitOffset>1</bitOffset>
19347 
              <bitWidth>1</bitWidth>
19348 
            </field>
19349 
            <field>
19350 
              <name>FB2</name>
19351 
              <description>Filter bits</description>
19352 
              <bitOffset>2</bitOffset>
19353 
              <bitWidth>1</bitWidth>
19354 
            </field>
19355 
            <field>
19356 
              <name>FB3</name>
19357 
              <description>Filter bits</description>
19358 
              <bitOffset>3</bitOffset>
19359 
              <bitWidth>1</bitWidth>
19360 
            </field>
19361 
            <field>
19362 
              <name>FB4</name>
19363 
              <description>Filter bits</description>
19364 
              <bitOffset>4</bitOffset>
19365 
              <bitWidth>1</bitWidth>
19366 
            </field>
19367 
            <field>
19368 
              <name>FB5</name>
19369 
              <description>Filter bits</description>
19370 
              <bitOffset>5</bitOffset>
19371 
              <bitWidth>1</bitWidth>
19372 
            </field>
19373 
            <field>
19374 
              <name>FB6</name>
19375 
              <description>Filter bits</description>
19376 
              <bitOffset>6</bitOffset>
19377 
              <bitWidth>1</bitWidth>
19378 
            </field>
19379 
            <field>
19380 
              <name>FB7</name>
19381 
              <description>Filter bits</description>
19382 
              <bitOffset>7</bitOffset>
19383 
              <bitWidth>1</bitWidth>
19384 
            </field>
19385 
            <field>
19386 
              <name>FB8</name>
19387 
              <description>Filter bits</description>
19388 
              <bitOffset>8</bitOffset>
19389 
              <bitWidth>1</bitWidth>
19390 
            </field>
19391 
            <field>
19392 
              <name>FB9</name>
19393 
              <description>Filter bits</description>
19394 
              <bitOffset>9</bitOffset>
19395 
              <bitWidth>1</bitWidth>
19396 
            </field>
19397 
            <field>
19398 
              <name>FB10</name>
19399 
              <description>Filter bits</description>
19400 
              <bitOffset>10</bitOffset>
19401 
              <bitWidth>1</bitWidth>
19402 
            </field>
19403 
            <field>
19404 
              <name>FB11</name>
19405 
              <description>Filter bits</description>
19406 
              <bitOffset>11</bitOffset>
19407 
              <bitWidth>1</bitWidth>
19408 
            </field>
19409 
            <field>
19410 
              <name>FB12</name>
19411 
              <description>Filter bits</description>
19412 
              <bitOffset>12</bitOffset>
19413 
              <bitWidth>1</bitWidth>
19414 
            </field>
19415 
            <field>
19416 
              <name>FB13</name>
19417 
              <description>Filter bits</description>
19418 
              <bitOffset>13</bitOffset>
19419 
              <bitWidth>1</bitWidth>
19420 
            </field>
19421 
            <field>
19422 
              <name>FB14</name>
19423 
              <description>Filter bits</description>
19424 
              <bitOffset>14</bitOffset>
19425 
              <bitWidth>1</bitWidth>
19426 
            </field>
19427 
            <field>
19428 
              <name>FB15</name>
19429 
              <description>Filter bits</description>
19430 
              <bitOffset>15</bitOffset>
19431 
              <bitWidth>1</bitWidth>
19432 
            </field>
19433 
            <field>
19434 
              <name>FB16</name>
19435 
              <description>Filter bits</description>
19436 
              <bitOffset>16</bitOffset>
19437 
              <bitWidth>1</bitWidth>
19438 
            </field>
19439 
            <field>
19440 
              <name>FB17</name>
19441 
              <description>Filter bits</description>
19442 
              <bitOffset>17</bitOffset>
19443 
              <bitWidth>1</bitWidth>
19444 
            </field>
19445 
            <field>
19446 
              <name>FB18</name>
19447 
              <description>Filter bits</description>
19448 
              <bitOffset>18</bitOffset>
19449 
              <bitWidth>1</bitWidth>
19450 
            </field>
19451 
            <field>
19452 
              <name>FB19</name>
19453 
              <description>Filter bits</description>
19454 
              <bitOffset>19</bitOffset>
19455 
              <bitWidth>1</bitWidth>
19456 
            </field>
19457 
            <field>
19458 
              <name>FB20</name>
19459 
              <description>Filter bits</description>
19460 
              <bitOffset>20</bitOffset>
19461 
              <bitWidth>1</bitWidth>
19462 
            </field>
19463 
            <field>
19464 
              <name>FB21</name>
19465 
              <description>Filter bits</description>
19466 
              <bitOffset>21</bitOffset>
19467 
              <bitWidth>1</bitWidth>
19468 
            </field>
19469 
            <field>
19470 
              <name>FB22</name>
19471 
              <description>Filter bits</description>
19472 
              <bitOffset>22</bitOffset>
19473 
              <bitWidth>1</bitWidth>
19474 
            </field>
19475 
            <field>
19476 
              <name>FB23</name>
19477 
              <description>Filter bits</description>
19478 
              <bitOffset>23</bitOffset>
19479 
              <bitWidth>1</bitWidth>
19480 
            </field>
19481 
            <field>
19482 
              <name>FB24</name>
19483 
              <description>Filter bits</description>
19484 
              <bitOffset>24</bitOffset>
19485 
              <bitWidth>1</bitWidth>
19486 
            </field>
19487 
            <field>
19488 
              <name>FB25</name>
19489 
              <description>Filter bits</description>
19490 
              <bitOffset>25</bitOffset>
19491 
              <bitWidth>1</bitWidth>
19492 
            </field>
19493 
            <field>
19494 
              <name>FB26</name>
19495 
              <description>Filter bits</description>
19496 
              <bitOffset>26</bitOffset>
19497 
              <bitWidth>1</bitWidth>
19498 
            </field>
19499 
            <field>
19500 
              <name>FB27</name>
19501 
              <description>Filter bits</description>
19502 
              <bitOffset>27</bitOffset>
19503 
              <bitWidth>1</bitWidth>
19504 
            </field>
19505 
            <field>
19506 
              <name>FB28</name>
19507 
              <description>Filter bits</description>
19508 
              <bitOffset>28</bitOffset>
19509 
              <bitWidth>1</bitWidth>
19510 
            </field>
19511 
            <field>
19512 
              <name>FB29</name>
19513 
              <description>Filter bits</description>
19514 
              <bitOffset>29</bitOffset>
19515 
              <bitWidth>1</bitWidth>
19516 
            </field>
19517 
            <field>
19518 
              <name>FB30</name>
19519 
              <description>Filter bits</description>
19520 
              <bitOffset>30</bitOffset>
19521 
              <bitWidth>1</bitWidth>
19522 
            </field>
19523 
            <field>
19524 
              <name>FB31</name>
19525 
              <description>Filter bits</description>
19526 
              <bitOffset>31</bitOffset>
19527 
              <bitWidth>1</bitWidth>
19528 
            </field>
19529 
          </fields>
19530 
		</register>
19531 
		<register>
19532 
          <name>F8R2</name>
19533 
          <displayName>F8R2</displayName>
19534 
          <description>Filter bank 8 register 2</description>
19535 
          <addressOffset>0x284</addressOffset>
19536 
          <size>0x20</size>
19537 
          <access>read-write</access>
19538 
          <resetValue>0x00000000</resetValue>
19539 
		  <fields>
19540 
            <field>
19541 
              <name>FB0</name>
19542 
              <description>Filter bits</description>
19543 
              <bitOffset>0</bitOffset>
19544 
              <bitWidth>1</bitWidth>
19545 
            </field>
19546 
            <field>
19547 
              <name>FB1</name>
19548 
              <description>Filter bits</description>
19549 
              <bitOffset>1</bitOffset>
19550 
              <bitWidth>1</bitWidth>
19551 
            </field>
19552 
            <field>
19553 
              <name>FB2</name>
19554 
              <description>Filter bits</description>
19555 
              <bitOffset>2</bitOffset>
19556 
              <bitWidth>1</bitWidth>
19557 
            </field>
19558 
            <field>
19559 
              <name>FB3</name>
19560 
              <description>Filter bits</description>
19561 
              <bitOffset>3</bitOffset>
19562 
              <bitWidth>1</bitWidth>
19563 
            </field>
19564 
            <field>
19565 
              <name>FB4</name>
19566 
              <description>Filter bits</description>
19567 
              <bitOffset>4</bitOffset>
19568 
              <bitWidth>1</bitWidth>
19569 
            </field>
19570 
            <field>
19571 
              <name>FB5</name>
19572 
              <description>Filter bits</description>
19573 
              <bitOffset>5</bitOffset>
19574 
              <bitWidth>1</bitWidth>
19575 
            </field>
19576 
            <field>
19577 
              <name>FB6</name>
19578 
              <description>Filter bits</description>
19579 
              <bitOffset>6</bitOffset>
19580 
              <bitWidth>1</bitWidth>
19581 
            </field>
19582 
            <field>
19583 
              <name>FB7</name>
19584 
              <description>Filter bits</description>
19585 
              <bitOffset>7</bitOffset>
19586 
              <bitWidth>1</bitWidth>
19587 
            </field>
19588 
            <field>
19589 
              <name>FB8</name>
19590 
              <description>Filter bits</description>
19591 
              <bitOffset>8</bitOffset>
19592 
              <bitWidth>1</bitWidth>
19593 
            </field>
19594 
            <field>
19595 
              <name>FB9</name>
19596 
              <description>Filter bits</description>
19597 
              <bitOffset>9</bitOffset>
19598 
              <bitWidth>1</bitWidth>
19599 
            </field>
19600 
            <field>
19601 
              <name>FB10</name>
19602 
              <description>Filter bits</description>
19603 
              <bitOffset>10</bitOffset>
19604 
              <bitWidth>1</bitWidth>
19605 
            </field>
19606 
            <field>
19607 
              <name>FB11</name>
19608 
              <description>Filter bits</description>
19609 
              <bitOffset>11</bitOffset>
19610 
              <bitWidth>1</bitWidth>
19611 
            </field>
19612 
            <field>
19613 
              <name>FB12</name>
19614 
              <description>Filter bits</description>
19615 
              <bitOffset>12</bitOffset>
19616 
              <bitWidth>1</bitWidth>
19617 
            </field>
19618 
            <field>
19619 
              <name>FB13</name>
19620 
              <description>Filter bits</description>
19621 
              <bitOffset>13</bitOffset>
19622 
              <bitWidth>1</bitWidth>
19623 
            </field>
19624 
            <field>
19625 
              <name>FB14</name>
19626 
              <description>Filter bits</description>
19627 
              <bitOffset>14</bitOffset>
19628 
              <bitWidth>1</bitWidth>
19629 
            </field>
19630 
            <field>
19631 
              <name>FB15</name>
19632 
              <description>Filter bits</description>
19633 
              <bitOffset>15</bitOffset>
19634 
              <bitWidth>1</bitWidth>
19635 
            </field>
19636 
            <field>
19637 
              <name>FB16</name>
19638 
              <description>Filter bits</description>
19639 
              <bitOffset>16</bitOffset>
19640 
              <bitWidth>1</bitWidth>
19641 
            </field>
19642 
            <field>
19643 
              <name>FB17</name>
19644 
              <description>Filter bits</description>
19645 
              <bitOffset>17</bitOffset>
19646 
              <bitWidth>1</bitWidth>
19647 
            </field>
19648 
            <field>
19649 
              <name>FB18</name>
19650 
              <description>Filter bits</description>
19651 
              <bitOffset>18</bitOffset>
19652 
              <bitWidth>1</bitWidth>
19653 
            </field>
19654 
            <field>
19655 
              <name>FB19</name>
19656 
              <description>Filter bits</description>
19657 
              <bitOffset>19</bitOffset>
19658 
              <bitWidth>1</bitWidth>
19659 
            </field>
19660 
            <field>
19661 
              <name>FB20</name>
19662 
              <description>Filter bits</description>
19663 
              <bitOffset>20</bitOffset>
19664 
              <bitWidth>1</bitWidth>
19665 
            </field>
19666 
            <field>
19667 
              <name>FB21</name>
19668 
              <description>Filter bits</description>
19669 
              <bitOffset>21</bitOffset>
19670 
              <bitWidth>1</bitWidth>
19671 
            </field>
19672 
            <field>
19673 
              <name>FB22</name>
19674 
              <description>Filter bits</description>
19675 
              <bitOffset>22</bitOffset>
19676 
              <bitWidth>1</bitWidth>
19677 
            </field>
19678 
            <field>
19679 
              <name>FB23</name>
19680 
              <description>Filter bits</description>
19681 
              <bitOffset>23</bitOffset>
19682 
              <bitWidth>1</bitWidth>
19683 
            </field>
19684 
            <field>
19685 
              <name>FB24</name>
19686 
              <description>Filter bits</description>
19687 
              <bitOffset>24</bitOffset>
19688 
              <bitWidth>1</bitWidth>
19689 
            </field>
19690 
            <field>
19691 
              <name>FB25</name>
19692 
              <description>Filter bits</description>
19693 
              <bitOffset>25</bitOffset>
19694 
              <bitWidth>1</bitWidth>
19695 
            </field>
19696 
            <field>
19697 
              <name>FB26</name>
19698 
              <description>Filter bits</description>
19699 
              <bitOffset>26</bitOffset>
19700 
              <bitWidth>1</bitWidth>
19701 
            </field>
19702 
            <field>
19703 
              <name>FB27</name>
19704 
              <description>Filter bits</description>
19705 
              <bitOffset>27</bitOffset>
19706 
              <bitWidth>1</bitWidth>
19707 
            </field>
19708 
            <field>
19709 
              <name>FB28</name>
19710 
              <description>Filter bits</description>
19711 
              <bitOffset>28</bitOffset>
19712 
              <bitWidth>1</bitWidth>
19713 
            </field>
19714 
            <field>
19715 
              <name>FB29</name>
19716 
              <description>Filter bits</description>
19717 
              <bitOffset>29</bitOffset>
19718 
              <bitWidth>1</bitWidth>
19719 
            </field>
19720 
            <field>
19721 
              <name>FB30</name>
19722 
              <description>Filter bits</description>
19723 
              <bitOffset>30</bitOffset>
19724 
              <bitWidth>1</bitWidth>
19725 
            </field>
19726 
            <field>
19727 
              <name>FB31</name>
19728 
              <description>Filter bits</description>
19729 
              <bitOffset>31</bitOffset>
19730 
              <bitWidth>1</bitWidth>
19731 
            </field>
19732 
          </fields>
19733 
		</register>
19734 
		<register>
19735 
          <name>F9R1</name>
19736 
          <displayName>F9R1</displayName>
19737 
          <description>Filter bank 9 register 1</description>
19738 
          <addressOffset>0x288</addressOffset>
19739 
          <size>0x20</size>
19740 
          <access>read-write</access>
19741 
          <resetValue>0x00000000</resetValue>
19742 
		  <fields>
19743 
            <field>
19744 
              <name>FB0</name>
19745 
              <description>Filter bits</description>
19746 
              <bitOffset>0</bitOffset>
19747 
              <bitWidth>1</bitWidth>
19748 
            </field>
19749 
            <field>
19750 
              <name>FB1</name>
19751 
              <description>Filter bits</description>
19752 
              <bitOffset>1</bitOffset>
19753 
              <bitWidth>1</bitWidth>
19754 
            </field>
19755 
            <field>
19756 
              <name>FB2</name>
19757 
              <description>Filter bits</description>
19758 
              <bitOffset>2</bitOffset>
19759 
              <bitWidth>1</bitWidth>
19760 
            </field>
19761 
            <field>
19762 
              <name>FB3</name>
19763 
              <description>Filter bits</description>
19764 
              <bitOffset>3</bitOffset>
19765 
              <bitWidth>1</bitWidth>
19766 
            </field>
19767 
            <field>
19768 
              <name>FB4</name>
19769 
              <description>Filter bits</description>
19770 
              <bitOffset>4</bitOffset>
19771 
              <bitWidth>1</bitWidth>
19772 
            </field>
19773 
            <field>
19774 
              <name>FB5</name>
19775 
              <description>Filter bits</description>
19776 
              <bitOffset>5</bitOffset>
19777 
              <bitWidth>1</bitWidth>
19778 
            </field>
19779 
            <field>
19780 
              <name>FB6</name>
19781 
              <description>Filter bits</description>
19782 
              <bitOffset>6</bitOffset>
19783 
              <bitWidth>1</bitWidth>
19784 
            </field>
19785 
            <field>
19786 
              <name>FB7</name>
19787 
              <description>Filter bits</description>
19788 
              <bitOffset>7</bitOffset>
19789 
              <bitWidth>1</bitWidth>
19790 
            </field>
19791 
            <field>
19792 
              <name>FB8</name>
19793 
              <description>Filter bits</description>
19794 
              <bitOffset>8</bitOffset>
19795 
              <bitWidth>1</bitWidth>
19796 
            </field>
19797 
            <field>
19798 
              <name>FB9</name>
19799 
              <description>Filter bits</description>
19800 
              <bitOffset>9</bitOffset>
19801 
              <bitWidth>1</bitWidth>
19802 
            </field>
19803 
            <field>
19804 
              <name>FB10</name>
19805 
              <description>Filter bits</description>
19806 
              <bitOffset>10</bitOffset>
19807 
              <bitWidth>1</bitWidth>
19808 
            </field>
19809 
            <field>
19810 
              <name>FB11</name>
19811 
              <description>Filter bits</description>
19812 
              <bitOffset>11</bitOffset>
19813 
              <bitWidth>1</bitWidth>
19814 
            </field>
19815 
            <field>
19816 
              <name>FB12</name>
19817 
              <description>Filter bits</description>
19818 
              <bitOffset>12</bitOffset>
19819 
              <bitWidth>1</bitWidth>
19820 
            </field>
19821 
            <field>
19822 
              <name>FB13</name>
19823 
              <description>Filter bits</description>
19824 
              <bitOffset>13</bitOffset>
19825 
              <bitWidth>1</bitWidth>
19826 
            </field>
19827 
            <field>
19828 
              <name>FB14</name>
19829 
              <description>Filter bits</description>
19830 
              <bitOffset>14</bitOffset>
19831 
              <bitWidth>1</bitWidth>
19832 
            </field>
19833 
            <field>
19834 
              <name>FB15</name>
19835 
              <description>Filter bits</description>
19836 
              <bitOffset>15</bitOffset>
19837 
              <bitWidth>1</bitWidth>
19838 
            </field>
19839 
            <field>
19840 
              <name>FB16</name>
19841 
              <description>Filter bits</description>
19842 
              <bitOffset>16</bitOffset>
19843 
              <bitWidth>1</bitWidth>
19844 
            </field>
19845 
            <field>
19846 
              <name>FB17</name>
19847 
              <description>Filter bits</description>
19848 
              <bitOffset>17</bitOffset>
19849 
              <bitWidth>1</bitWidth>
19850 
            </field>
19851 
            <field>
19852 
              <name>FB18</name>
19853 
              <description>Filter bits</description>
19854 
              <bitOffset>18</bitOffset>
19855 
              <bitWidth>1</bitWidth>
19856 
            </field>
19857 
            <field>
19858 
              <name>FB19</name>
19859 
              <description>Filter bits</description>
19860 
              <bitOffset>19</bitOffset>
19861 
              <bitWidth>1</bitWidth>
19862 
            </field>
19863 
            <field>
19864 
              <name>FB20</name>
19865 
              <description>Filter bits</description>
19866 
              <bitOffset>20</bitOffset>
19867 
              <bitWidth>1</bitWidth>
19868 
            </field>
19869 
            <field>
19870 
              <name>FB21</name>
19871 
              <description>Filter bits</description>
19872 
              <bitOffset>21</bitOffset>
19873 
              <bitWidth>1</bitWidth>
19874 
            </field>
19875 
            <field>
19876 
              <name>FB22</name>
19877 
              <description>Filter bits</description>
19878 
              <bitOffset>22</bitOffset>
19879 
              <bitWidth>1</bitWidth>
19880 
            </field>
19881 
            <field>
19882 
              <name>FB23</name>
19883 
              <description>Filter bits</description>
19884 
              <bitOffset>23</bitOffset>
19885 
              <bitWidth>1</bitWidth>
19886 
            </field>
19887 
            <field>
19888 
              <name>FB24</name>
19889 
              <description>Filter bits</description>
19890 
              <bitOffset>24</bitOffset>
19891 
              <bitWidth>1</bitWidth>
19892 
            </field>
19893 
            <field>
19894 
              <name>FB25</name>
19895 
              <description>Filter bits</description>
19896 
              <bitOffset>25</bitOffset>
19897 
              <bitWidth>1</bitWidth>
19898 
            </field>
19899 
            <field>
19900 
              <name>FB26</name>
19901 
              <description>Filter bits</description>
19902 
              <bitOffset>26</bitOffset>
19903 
              <bitWidth>1</bitWidth>
19904 
            </field>
19905 
            <field>
19906 
              <name>FB27</name>
19907 
              <description>Filter bits</description>
19908 
              <bitOffset>27</bitOffset>
19909 
              <bitWidth>1</bitWidth>
19910 
            </field>
19911 
            <field>
19912 
              <name>FB28</name>
19913 
              <description>Filter bits</description>
19914 
              <bitOffset>28</bitOffset>
19915 
              <bitWidth>1</bitWidth>
19916 
            </field>
19917 
            <field>
19918 
              <name>FB29</name>
19919 
              <description>Filter bits</description>
19920 
              <bitOffset>29</bitOffset>
19921 
              <bitWidth>1</bitWidth>
19922 
            </field>
19923 
            <field>
19924 
              <name>FB30</name>
19925 
              <description>Filter bits</description>
19926 
              <bitOffset>30</bitOffset>
19927 
              <bitWidth>1</bitWidth>
19928 
            </field>
19929 
            <field>
19930 
              <name>FB31</name>
19931 
              <description>Filter bits</description>
19932 
              <bitOffset>31</bitOffset>
19933 
              <bitWidth>1</bitWidth>
19934 
            </field>
19935 
          </fields>
19936 
		</register>
19937 
		<register>
19938 
          <name>F9R2</name>
19939 
          <displayName>F9R2</displayName>
19940 
          <description>Filter bank 9 register 2</description>
19941 
          <addressOffset>0x28C</addressOffset>
19942 
          <size>0x20</size>
19943 
          <access>read-write</access>
19944 
          <resetValue>0x00000000</resetValue>
19945 
		  <fields>
19946 
            <field>
19947 
              <name>FB0</name>
19948 
              <description>Filter bits</description>
19949 
              <bitOffset>0</bitOffset>
19950 
              <bitWidth>1</bitWidth>
19951 
            </field>
19952 
            <field>
19953 
              <name>FB1</name>
19954 
              <description>Filter bits</description>
19955 
              <bitOffset>1</bitOffset>
19956 
              <bitWidth>1</bitWidth>
19957 
            </field>
19958 
            <field>
19959 
              <name>FB2</name>
19960 
              <description>Filter bits</description>
19961 
              <bitOffset>2</bitOffset>
19962 
              <bitWidth>1</bitWidth>
19963 
            </field>
19964 
            <field>
19965 
              <name>FB3</name>
19966 
              <description>Filter bits</description>
19967 
              <bitOffset>3</bitOffset>
19968 
              <bitWidth>1</bitWidth>
19969 
            </field>
19970 
            <field>
19971 
              <name>FB4</name>
19972 
              <description>Filter bits</description>
19973 
              <bitOffset>4</bitOffset>
19974 
              <bitWidth>1</bitWidth>
19975 
            </field>
19976 
            <field>
19977 
              <name>FB5</name>
19978 
              <description>Filter bits</description>
19979 
              <bitOffset>5</bitOffset>
19980 
              <bitWidth>1</bitWidth>
19981 
            </field>
19982 
            <field>
19983 
              <name>FB6</name>
19984 
              <description>Filter bits</description>
19985 
              <bitOffset>6</bitOffset>
19986 
              <bitWidth>1</bitWidth>
19987 
            </field>
19988 
            <field>
19989 
              <name>FB7</name>
19990 
              <description>Filter bits</description>
19991 
              <bitOffset>7</bitOffset>
19992 
              <bitWidth>1</bitWidth>
19993 
            </field>
19994 
            <field>
19995 
              <name>FB8</name>
19996 
              <description>Filter bits</description>
19997 
              <bitOffset>8</bitOffset>
19998 
              <bitWidth>1</bitWidth>
19999 
            </field>
20000 
            <field>
20001 
              <name>FB9</name>
20002 
              <description>Filter bits</description>
20003 
              <bitOffset>9</bitOffset>
20004 
              <bitWidth>1</bitWidth>
20005 
            </field>
20006 
            <field>
20007 
              <name>FB10</name>
20008 
              <description>Filter bits</description>
20009 
              <bitOffset>10</bitOffset>
20010 
              <bitWidth>1</bitWidth>
20011 
            </field>
20012 
            <field>
20013 
              <name>FB11</name>
20014 
              <description>Filter bits</description>
20015 
              <bitOffset>11</bitOffset>
20016 
              <bitWidth>1</bitWidth>
20017 
            </field>
20018 
            <field>
20019 
              <name>FB12</name>
20020 
              <description>Filter bits</description>
20021 
              <bitOffset>12</bitOffset>
20022 
              <bitWidth>1</bitWidth>
20023 
            </field>
20024 
            <field>
20025 
              <name>FB13</name>
20026 
              <description>Filter bits</description>
20027 
              <bitOffset>13</bitOffset>
20028 
              <bitWidth>1</bitWidth>
20029 
            </field>
20030 
            <field>
20031 
              <name>FB14</name>
20032 
              <description>Filter bits</description>
20033 
              <bitOffset>14</bitOffset>
20034 
              <bitWidth>1</bitWidth>
20035 
            </field>
20036 
            <field>
20037 
              <name>FB15</name>
20038 
              <description>Filter bits</description>
20039 
              <bitOffset>15</bitOffset>
20040 
              <bitWidth>1</bitWidth>
20041 
            </field>
20042 
            <field>
20043 
              <name>FB16</name>
20044 
              <description>Filter bits</description>
20045 
              <bitOffset>16</bitOffset>
20046 
              <bitWidth>1</bitWidth>
20047 
            </field>
20048 
            <field>
20049 
              <name>FB17</name>
20050 
              <description>Filter bits</description>
20051 
              <bitOffset>17</bitOffset>
20052 
              <bitWidth>1</bitWidth>
20053 
            </field>
20054 
            <field>
20055 
              <name>FB18</name>
20056 
              <description>Filter bits</description>
20057 
              <bitOffset>18</bitOffset>
20058 
              <bitWidth>1</bitWidth>
20059 
            </field>
20060 
            <field>
20061 
              <name>FB19</name>
20062 
              <description>Filter bits</description>
20063 
              <bitOffset>19</bitOffset>
20064 
              <bitWidth>1</bitWidth>
20065 
            </field>
20066 
            <field>
20067 
              <name>FB20</name>
20068 
              <description>Filter bits</description>
20069 
              <bitOffset>20</bitOffset>
20070 
              <bitWidth>1</bitWidth>
20071 
            </field>
20072 
            <field>
20073 
              <name>FB21</name>
20074 
              <description>Filter bits</description>
20075 
              <bitOffset>21</bitOffset>
20076 
              <bitWidth>1</bitWidth>
20077 
            </field>
20078 
            <field>
20079 
              <name>FB22</name>
20080 
              <description>Filter bits</description>
20081 
              <bitOffset>22</bitOffset>
20082 
              <bitWidth>1</bitWidth>
20083 
            </field>
20084 
            <field>
20085 
              <name>FB23</name>
20086 
              <description>Filter bits</description>
20087 
              <bitOffset>23</bitOffset>
20088 
              <bitWidth>1</bitWidth>
20089 
            </field>
20090 
            <field>
20091 
              <name>FB24</name>
20092 
              <description>Filter bits</description>
20093 
              <bitOffset>24</bitOffset>
20094 
              <bitWidth>1</bitWidth>
20095 
            </field>
20096 
            <field>
20097 
              <name>FB25</name>
20098 
              <description>Filter bits</description>
20099 
              <bitOffset>25</bitOffset>
20100 
              <bitWidth>1</bitWidth>
20101 
            </field>
20102 
            <field>
20103 
              <name>FB26</name>
20104 
              <description>Filter bits</description>
20105 
              <bitOffset>26</bitOffset>
20106 
              <bitWidth>1</bitWidth>
20107 
            </field>
20108 
            <field>
20109 
              <name>FB27</name>
20110 
              <description>Filter bits</description>
20111 
              <bitOffset>27</bitOffset>
20112 
              <bitWidth>1</bitWidth>
20113 
            </field>
20114 
            <field>
20115 
              <name>FB28</name>
20116 
              <description>Filter bits</description>
20117 
              <bitOffset>28</bitOffset>
20118 
              <bitWidth>1</bitWidth>
20119 
            </field>
20120 
            <field>
20121 
              <name>FB29</name>
20122 
              <description>Filter bits</description>
20123 
              <bitOffset>29</bitOffset>
20124 
              <bitWidth>1</bitWidth>
20125 
            </field>
20126 
            <field>
20127 
              <name>FB30</name>
20128 
              <description>Filter bits</description>
20129 
              <bitOffset>30</bitOffset>
20130 
              <bitWidth>1</bitWidth>
20131 
            </field>
20132 
            <field>
20133 
              <name>FB31</name>
20134 
              <description>Filter bits</description>
20135 
              <bitOffset>31</bitOffset>
20136 
              <bitWidth>1</bitWidth>
20137 
            </field>
20138 
          </fields>
20139 
		</register>
20140 
		<register>
20141 
          <name>F10R1</name>
20142 
          <displayName>F10R1</displayName>
20143 
          <description>Filter bank 10 register 1</description>
20144 
          <addressOffset>0x290</addressOffset>
20145 
          <size>0x20</size>
20146 
          <access>read-write</access>
20147 
          <resetValue>0x00000000</resetValue>
20148 
		  <fields>
20149 
            <field>
20150 
              <name>FB0</name>
20151 
              <description>Filter bits</description>
20152 
              <bitOffset>0</bitOffset>
20153 
              <bitWidth>1</bitWidth>
20154 
            </field>
20155 
            <field>
20156 
              <name>FB1</name>
20157 
              <description>Filter bits</description>
20158 
              <bitOffset>1</bitOffset>
20159 
              <bitWidth>1</bitWidth>
20160 
            </field>
20161 
            <field>
20162 
              <name>FB2</name>
20163 
              <description>Filter bits</description>
20164 
              <bitOffset>2</bitOffset>
20165 
              <bitWidth>1</bitWidth>
20166 
            </field>
20167 
            <field>
20168 
              <name>FB3</name>
20169 
              <description>Filter bits</description>
20170 
              <bitOffset>3</bitOffset>
20171 
              <bitWidth>1</bitWidth>
20172 
            </field>
20173 
            <field>
20174 
              <name>FB4</name>
20175 
              <description>Filter bits</description>
20176 
              <bitOffset>4</bitOffset>
20177 
              <bitWidth>1</bitWidth>
20178 
            </field>
20179 
            <field>
20180 
              <name>FB5</name>
20181 
              <description>Filter bits</description>
20182 
              <bitOffset>5</bitOffset>
20183 
              <bitWidth>1</bitWidth>
20184 
            </field>
20185 
            <field>
20186 
              <name>FB6</name>
20187 
              <description>Filter bits</description>
20188 
              <bitOffset>6</bitOffset>
20189 
              <bitWidth>1</bitWidth>
20190 
            </field>
20191 
            <field>
20192 
              <name>FB7</name>
20193 
              <description>Filter bits</description>
20194 
              <bitOffset>7</bitOffset>
20195 
              <bitWidth>1</bitWidth>
20196 
            </field>
20197 
            <field>
20198 
              <name>FB8</name>
20199 
              <description>Filter bits</description>
20200 
              <bitOffset>8</bitOffset>
20201 
              <bitWidth>1</bitWidth>
20202 
            </field>
20203 
            <field>
20204 
              <name>FB9</name>
20205 
              <description>Filter bits</description>
20206 
              <bitOffset>9</bitOffset>
20207 
              <bitWidth>1</bitWidth>
20208 
            </field>
20209 
            <field>
20210 
              <name>FB10</name>
20211 
              <description>Filter bits</description>
20212 
              <bitOffset>10</bitOffset>
20213 
              <bitWidth>1</bitWidth>
20214 
            </field>
20215 
            <field>
20216 
              <name>FB11</name>
20217 
              <description>Filter bits</description>
20218 
              <bitOffset>11</bitOffset>
20219 
              <bitWidth>1</bitWidth>
20220 
            </field>
20221 
            <field>
20222 
              <name>FB12</name>
20223 
              <description>Filter bits</description>
20224 
              <bitOffset>12</bitOffset>
20225 
              <bitWidth>1</bitWidth>
20226 
            </field>
20227 
            <field>
20228 
              <name>FB13</name>
20229 
              <description>Filter bits</description>
20230 
              <bitOffset>13</bitOffset>
20231 
              <bitWidth>1</bitWidth>
20232 
            </field>
20233 
            <field>
20234 
              <name>FB14</name>
20235 
              <description>Filter bits</description>
20236 
              <bitOffset>14</bitOffset>
20237 
              <bitWidth>1</bitWidth>
20238 
            </field>
20239 
            <field>
20240 
              <name>FB15</name>
20241 
              <description>Filter bits</description>
20242 
              <bitOffset>15</bitOffset>
20243 
              <bitWidth>1</bitWidth>
20244 
            </field>
20245 
            <field>
20246 
              <name>FB16</name>
20247 
              <description>Filter bits</description>
20248 
              <bitOffset>16</bitOffset>
20249 
              <bitWidth>1</bitWidth>
20250 
            </field>
20251 
            <field>
20252 
              <name>FB17</name>
20253 
              <description>Filter bits</description>
20254 
              <bitOffset>17</bitOffset>
20255 
              <bitWidth>1</bitWidth>
20256 
            </field>
20257 
            <field>
20258 
              <name>FB18</name>
20259 
              <description>Filter bits</description>
20260 
              <bitOffset>18</bitOffset>
20261 
              <bitWidth>1</bitWidth>
20262 
            </field>
20263 
            <field>
20264 
              <name>FB19</name>
20265 
              <description>Filter bits</description>
20266 
              <bitOffset>19</bitOffset>
20267 
              <bitWidth>1</bitWidth>
20268 
            </field>
20269 
            <field>
20270 
              <name>FB20</name>
20271 
              <description>Filter bits</description>
20272 
              <bitOffset>20</bitOffset>
20273 
              <bitWidth>1</bitWidth>
20274 
            </field>
20275 
            <field>
20276 
              <name>FB21</name>
20277 
              <description>Filter bits</description>
20278 
              <bitOffset>21</bitOffset>
20279 
              <bitWidth>1</bitWidth>
20280 
            </field>
20281 
            <field>
20282 
              <name>FB22</name>
20283 
              <description>Filter bits</description>
20284 
              <bitOffset>22</bitOffset>
20285 
              <bitWidth>1</bitWidth>
20286 
            </field>
20287 
            <field>
20288 
              <name>FB23</name>
20289 
              <description>Filter bits</description>
20290 
              <bitOffset>23</bitOffset>
20291 
              <bitWidth>1</bitWidth>
20292 
            </field>
20293 
            <field>
20294 
              <name>FB24</name>
20295 
              <description>Filter bits</description>
20296 
              <bitOffset>24</bitOffset>
20297 
              <bitWidth>1</bitWidth>
20298 
            </field>
20299 
            <field>
20300 
              <name>FB25</name>
20301 
              <description>Filter bits</description>
20302 
              <bitOffset>25</bitOffset>
20303 
              <bitWidth>1</bitWidth>
20304 
            </field>
20305 
            <field>
20306 
              <name>FB26</name>
20307 
              <description>Filter bits</description>
20308 
              <bitOffset>26</bitOffset>
20309 
              <bitWidth>1</bitWidth>
20310 
            </field>
20311 
            <field>
20312 
              <name>FB27</name>
20313 
              <description>Filter bits</description>
20314 
              <bitOffset>27</bitOffset>
20315 
              <bitWidth>1</bitWidth>
20316 
            </field>
20317 
            <field>
20318 
              <name>FB28</name>
20319 
              <description>Filter bits</description>
20320 
              <bitOffset>28</bitOffset>
20321 
              <bitWidth>1</bitWidth>
20322 
            </field>
20323 
            <field>
20324 
              <name>FB29</name>
20325 
              <description>Filter bits</description>
20326 
              <bitOffset>29</bitOffset>
20327 
              <bitWidth>1</bitWidth>
20328 
            </field>
20329 
            <field>
20330 
              <name>FB30</name>
20331 
              <description>Filter bits</description>
20332 
              <bitOffset>30</bitOffset>
20333 
              <bitWidth>1</bitWidth>
20334 
            </field>
20335 
            <field>
20336 
              <name>FB31</name>
20337 
              <description>Filter bits</description>
20338 
              <bitOffset>31</bitOffset>
20339 
              <bitWidth>1</bitWidth>
20340 
            </field>
20341 
          </fields>
20342 
		</register>
20343 
		<register>
20344 
          <name>F10R2</name>
20345 
          <displayName>F10R2</displayName>
20346 
          <description>Filter bank 10 register 2</description>
20347 
          <addressOffset>0x294</addressOffset>
20348 
          <size>0x20</size>
20349 
          <access>read-write</access>
20350 
          <resetValue>0x00000000</resetValue>
20351 
		  <fields>
20352 
            <field>
20353 
              <name>FB0</name>
20354 
              <description>Filter bits</description>
20355 
              <bitOffset>0</bitOffset>
20356 
              <bitWidth>1</bitWidth>
20357 
            </field>
20358 
            <field>
20359 
              <name>FB1</name>
20360 
              <description>Filter bits</description>
20361 
              <bitOffset>1</bitOffset>
20362 
              <bitWidth>1</bitWidth>
20363 
            </field>
20364 
            <field>
20365 
              <name>FB2</name>
20366 
              <description>Filter bits</description>
20367 
              <bitOffset>2</bitOffset>
20368 
              <bitWidth>1</bitWidth>
20369 
            </field>
20370 
            <field>
20371 
              <name>FB3</name>
20372 
              <description>Filter bits</description>
20373 
              <bitOffset>3</bitOffset>
20374 
              <bitWidth>1</bitWidth>
20375 
            </field>
20376 
            <field>
20377 
              <name>FB4</name>
20378 
              <description>Filter bits</description>
20379 
              <bitOffset>4</bitOffset>
20380 
              <bitWidth>1</bitWidth>
20381 
            </field>
20382 
            <field>
20383 
              <name>FB5</name>
20384 
              <description>Filter bits</description>
20385 
              <bitOffset>5</bitOffset>
20386 
              <bitWidth>1</bitWidth>
20387 
            </field>
20388 
            <field>
20389 
              <name>FB6</name>
20390 
              <description>Filter bits</description>
20391 
              <bitOffset>6</bitOffset>
20392 
              <bitWidth>1</bitWidth>
20393 
            </field>
20394 
            <field>
20395 
              <name>FB7</name>
20396 
              <description>Filter bits</description>
20397 
              <bitOffset>7</bitOffset>
20398 
              <bitWidth>1</bitWidth>
20399 
            </field>
20400 
            <field>
20401 
              <name>FB8</name>
20402 
              <description>Filter bits</description>
20403 
              <bitOffset>8</bitOffset>
20404 
              <bitWidth>1</bitWidth>
20405 
            </field>
20406 
            <field>
20407 
              <name>FB9</name>
20408 
              <description>Filter bits</description>
20409 
              <bitOffset>9</bitOffset>
20410 
              <bitWidth>1</bitWidth>
20411 
            </field>
20412 
            <field>
20413 
              <name>FB10</name>
20414 
              <description>Filter bits</description>
20415 
              <bitOffset>10</bitOffset>
20416 
              <bitWidth>1</bitWidth>
20417 
            </field>
20418 
            <field>
20419 
              <name>FB11</name>
20420 
              <description>Filter bits</description>
20421 
              <bitOffset>11</bitOffset>
20422 
              <bitWidth>1</bitWidth>
20423 
            </field>
20424 
            <field>
20425 
              <name>FB12</name>
20426 
              <description>Filter bits</description>
20427 
              <bitOffset>12</bitOffset>
20428 
              <bitWidth>1</bitWidth>
20429 
            </field>
20430 
            <field>
20431 
              <name>FB13</name>
20432 
              <description>Filter bits</description>
20433 
              <bitOffset>13</bitOffset>
20434 
              <bitWidth>1</bitWidth>
20435 
            </field>
20436 
            <field>
20437 
              <name>FB14</name>
20438 
              <description>Filter bits</description>
20439 
              <bitOffset>14</bitOffset>
20440 
              <bitWidth>1</bitWidth>
20441 
            </field>
20442 
            <field>
20443 
              <name>FB15</name>
20444 
              <description>Filter bits</description>
20445 
              <bitOffset>15</bitOffset>
20446 
              <bitWidth>1</bitWidth>
20447 
            </field>
20448 
            <field>
20449 
              <name>FB16</name>
20450 
              <description>Filter bits</description>
20451 
              <bitOffset>16</bitOffset>
20452 
              <bitWidth>1</bitWidth>
20453 
            </field>
20454 
            <field>
20455 
              <name>FB17</name>
20456 
              <description>Filter bits</description>
20457 
              <bitOffset>17</bitOffset>
20458 
              <bitWidth>1</bitWidth>
20459 
            </field>
20460 
            <field>
20461 
              <name>FB18</name>
20462 
              <description>Filter bits</description>
20463 
              <bitOffset>18</bitOffset>
20464 
              <bitWidth>1</bitWidth>
20465 
            </field>
20466 
            <field>
20467 
              <name>FB19</name>
20468 
              <description>Filter bits</description>
20469 
              <bitOffset>19</bitOffset>
20470 
              <bitWidth>1</bitWidth>
20471 
            </field>
20472 
            <field>
20473 
              <name>FB20</name>
20474 
              <description>Filter bits</description>
20475 
              <bitOffset>20</bitOffset>
20476 
              <bitWidth>1</bitWidth>
20477 
            </field>
20478 
            <field>
20479 
              <name>FB21</name>
20480 
              <description>Filter bits</description>
20481 
              <bitOffset>21</bitOffset>
20482 
              <bitWidth>1</bitWidth>
20483 
            </field>
20484 
            <field>
20485 
              <name>FB22</name>
20486 
              <description>Filter bits</description>
20487 
              <bitOffset>22</bitOffset>
20488 
              <bitWidth>1</bitWidth>
20489 
            </field>
20490 
            <field>
20491 
              <name>FB23</name>
20492 
              <description>Filter bits</description>
20493 
              <bitOffset>23</bitOffset>
20494 
              <bitWidth>1</bitWidth>
20495 
            </field>
20496 
            <field>
20497 
              <name>FB24</name>
20498 
              <description>Filter bits</description>
20499 
              <bitOffset>24</bitOffset>
20500 
              <bitWidth>1</bitWidth>
20501 
            </field>
20502 
            <field>
20503 
              <name>FB25</name>
20504 
              <description>Filter bits</description>
20505 
              <bitOffset>25</bitOffset>
20506 
              <bitWidth>1</bitWidth>
20507 
            </field>
20508 
            <field>
20509 
              <name>FB26</name>
20510 
              <description>Filter bits</description>
20511 
              <bitOffset>26</bitOffset>
20512 
              <bitWidth>1</bitWidth>
20513 
            </field>
20514 
            <field>
20515 
              <name>FB27</name>
20516 
              <description>Filter bits</description>
20517 
              <bitOffset>27</bitOffset>
20518 
              <bitWidth>1</bitWidth>
20519 
            </field>
20520 
            <field>
20521 
              <name>FB28</name>
20522 
              <description>Filter bits</description>
20523 
              <bitOffset>28</bitOffset>
20524 
              <bitWidth>1</bitWidth>
20525 
            </field>
20526 
            <field>
20527 
              <name>FB29</name>
20528 
              <description>Filter bits</description>
20529 
              <bitOffset>29</bitOffset>
20530 
              <bitWidth>1</bitWidth>
20531 
            </field>
20532 
            <field>
20533 
              <name>FB30</name>
20534 
              <description>Filter bits</description>
20535 
              <bitOffset>30</bitOffset>
20536 
              <bitWidth>1</bitWidth>
20537 
            </field>
20538 
            <field>
20539 
              <name>FB31</name>
20540 
              <description>Filter bits</description>
20541 
              <bitOffset>31</bitOffset>
20542 
              <bitWidth>1</bitWidth>
20543 
            </field>
20544 
          </fields>
20545 
		</register>
20546 
		<register>
20547 
          <name>F11R1</name>
20548 
          <displayName>F11R1</displayName>
20549 
          <description>Filter bank 11 register 1</description>
20550 
          <addressOffset>0x298</addressOffset>
20551 
          <size>0x20</size>
20552 
          <access>read-write</access>
20553 
          <resetValue>0x00000000</resetValue>
20554 
		  <fields>
20555 
            <field>
20556 
              <name>FB0</name>
20557 
              <description>Filter bits</description>
20558 
              <bitOffset>0</bitOffset>
20559 
              <bitWidth>1</bitWidth>
20560 
            </field>
20561 
            <field>
20562 
              <name>FB1</name>
20563 
              <description>Filter bits</description>
20564 
              <bitOffset>1</bitOffset>
20565 
              <bitWidth>1</bitWidth>
20566 
            </field>
20567 
            <field>
20568 
              <name>FB2</name>
20569 
              <description>Filter bits</description>
20570 
              <bitOffset>2</bitOffset>
20571 
              <bitWidth>1</bitWidth>
20572 
            </field>
20573 
            <field>
20574 
              <name>FB3</name>
20575 
              <description>Filter bits</description>
20576 
              <bitOffset>3</bitOffset>
20577 
              <bitWidth>1</bitWidth>
20578 
            </field>
20579 
            <field>
20580 
              <name>FB4</name>
20581 
              <description>Filter bits</description>
20582 
              <bitOffset>4</bitOffset>
20583 
              <bitWidth>1</bitWidth>
20584 
            </field>
20585 
            <field>
20586 
              <name>FB5</name>
20587 
              <description>Filter bits</description>
20588 
              <bitOffset>5</bitOffset>
20589 
              <bitWidth>1</bitWidth>
20590 
            </field>
20591 
            <field>
20592 
              <name>FB6</name>
20593 
              <description>Filter bits</description>
20594 
              <bitOffset>6</bitOffset>
20595 
              <bitWidth>1</bitWidth>
20596 
            </field>
20597 
            <field>
20598 
              <name>FB7</name>
20599 
              <description>Filter bits</description>
20600 
              <bitOffset>7</bitOffset>
20601 
              <bitWidth>1</bitWidth>
20602 
            </field>
20603 
            <field>
20604 
              <name>FB8</name>
20605 
              <description>Filter bits</description>
20606 
              <bitOffset>8</bitOffset>
20607 
              <bitWidth>1</bitWidth>
20608 
            </field>
20609 
            <field>
20610 
              <name>FB9</name>
20611 
              <description>Filter bits</description>
20612 
              <bitOffset>9</bitOffset>
20613 
              <bitWidth>1</bitWidth>
20614 
            </field>
20615 
            <field>
20616 
              <name>FB10</name>
20617 
              <description>Filter bits</description>
20618 
              <bitOffset>10</bitOffset>
20619 
              <bitWidth>1</bitWidth>
20620 
            </field>
20621 
            <field>
20622 
              <name>FB11</name>
20623 
              <description>Filter bits</description>
20624 
              <bitOffset>11</bitOffset>
20625 
              <bitWidth>1</bitWidth>
20626 
            </field>
20627 
            <field>
20628 
              <name>FB12</name>
20629 
              <description>Filter bits</description>
20630 
              <bitOffset>12</bitOffset>
20631 
              <bitWidth>1</bitWidth>
20632 
            </field>
20633 
            <field>
20634 
              <name>FB13</name>
20635 
              <description>Filter bits</description>
20636 
              <bitOffset>13</bitOffset>
20637 
              <bitWidth>1</bitWidth>
20638 
            </field>
20639 
            <field>
20640 
              <name>FB14</name>
20641 
              <description>Filter bits</description>
20642 
              <bitOffset>14</bitOffset>
20643 
              <bitWidth>1</bitWidth>
20644 
            </field>
20645 
            <field>
20646 
              <name>FB15</name>
20647 
              <description>Filter bits</description>
20648 
              <bitOffset>15</bitOffset>
20649 
              <bitWidth>1</bitWidth>
20650 
            </field>
20651 
            <field>
20652 
              <name>FB16</name>
20653 
              <description>Filter bits</description>
20654 
              <bitOffset>16</bitOffset>
20655 
              <bitWidth>1</bitWidth>
20656 
            </field>
20657 
            <field>
20658 
              <name>FB17</name>
20659 
              <description>Filter bits</description>
20660 
              <bitOffset>17</bitOffset>
20661 
              <bitWidth>1</bitWidth>
20662 
            </field>
20663 
            <field>
20664 
              <name>FB18</name>
20665 
              <description>Filter bits</description>
20666 
              <bitOffset>18</bitOffset>
20667 
              <bitWidth>1</bitWidth>
20668 
            </field>
20669 
            <field>
20670 
              <name>FB19</name>
20671 
              <description>Filter bits</description>
20672 
              <bitOffset>19</bitOffset>
20673 
              <bitWidth>1</bitWidth>
20674 
            </field>
20675 
            <field>
20676 
              <name>FB20</name>
20677 
              <description>Filter bits</description>
20678 
              <bitOffset>20</bitOffset>
20679 
              <bitWidth>1</bitWidth>
20680 
            </field>
20681 
            <field>
20682 
              <name>FB21</name>
20683 
              <description>Filter bits</description>
20684 
              <bitOffset>21</bitOffset>
20685 
              <bitWidth>1</bitWidth>
20686 
            </field>
20687 
            <field>
20688 
              <name>FB22</name>
20689 
              <description>Filter bits</description>
20690 
              <bitOffset>22</bitOffset>
20691 
              <bitWidth>1</bitWidth>
20692 
            </field>
20693 
            <field>
20694 
              <name>FB23</name>
20695 
              <description>Filter bits</description>
20696 
              <bitOffset>23</bitOffset>
20697 
              <bitWidth>1</bitWidth>
20698 
            </field>
20699 
            <field>
20700 
              <name>FB24</name>
20701 
              <description>Filter bits</description>
20702 
              <bitOffset>24</bitOffset>
20703 
              <bitWidth>1</bitWidth>
20704 
            </field>
20705 
            <field>
20706 
              <name>FB25</name>
20707 
              <description>Filter bits</description>
20708 
              <bitOffset>25</bitOffset>
20709 
              <bitWidth>1</bitWidth>
20710 
            </field>
20711 
            <field>
20712 
              <name>FB26</name>
20713 
              <description>Filter bits</description>
20714 
              <bitOffset>26</bitOffset>
20715 
              <bitWidth>1</bitWidth>
20716 
            </field>
20717 
            <field>
20718 
              <name>FB27</name>
20719 
              <description>Filter bits</description>
20720 
              <bitOffset>27</bitOffset>
20721 
              <bitWidth>1</bitWidth>
20722 
            </field>
20723 
            <field>
20724 
              <name>FB28</name>
20725 
              <description>Filter bits</description>
20726 
              <bitOffset>28</bitOffset>
20727 
              <bitWidth>1</bitWidth>
20728 
            </field>
20729 
            <field>
20730 
              <name>FB29</name>
20731 
              <description>Filter bits</description>
20732 
              <bitOffset>29</bitOffset>
20733 
              <bitWidth>1</bitWidth>
20734 
            </field>
20735 
            <field>
20736 
              <name>FB30</name>
20737 
              <description>Filter bits</description>
20738 
              <bitOffset>30</bitOffset>
20739 
              <bitWidth>1</bitWidth>
20740 
            </field>
20741 
            <field>
20742 
              <name>FB31</name>
20743 
              <description>Filter bits</description>
20744 
              <bitOffset>31</bitOffset>
20745 
              <bitWidth>1</bitWidth>
20746 
            </field>
20747 
          </fields>
20748 
		</register>
20749 
		<register>
20750 
          <name>F11R2</name>
20751 
          <displayName>F11R2</displayName>
20752 
          <description>Filter bank 11 register 2</description>
20753 
          <addressOffset>0x29C</addressOffset>
20754 
          <size>0x20</size>
20755 
          <access>read-write</access>
20756 
          <resetValue>0x00000000</resetValue>
20757 
		  <fields>
20758 
            <field>
20759 
              <name>FB0</name>
20760 
              <description>Filter bits</description>
20761 
              <bitOffset>0</bitOffset>
20762 
              <bitWidth>1</bitWidth>
20763 
            </field>
20764 
            <field>
20765 
              <name>FB1</name>
20766 
              <description>Filter bits</description>
20767 
              <bitOffset>1</bitOffset>
20768 
              <bitWidth>1</bitWidth>
20769 
            </field>
20770 
            <field>
20771 
              <name>FB2</name>
20772 
              <description>Filter bits</description>
20773 
              <bitOffset>2</bitOffset>
20774 
              <bitWidth>1</bitWidth>
20775 
            </field>
20776 
            <field>
20777 
              <name>FB3</name>
20778 
              <description>Filter bits</description>
20779 
              <bitOffset>3</bitOffset>
20780 
              <bitWidth>1</bitWidth>
20781 
            </field>
20782 
            <field>
20783 
              <name>FB4</name>
20784 
              <description>Filter bits</description>
20785 
              <bitOffset>4</bitOffset>
20786 
              <bitWidth>1</bitWidth>
20787 
            </field>
20788 
            <field>
20789 
              <name>FB5</name>
20790 
              <description>Filter bits</description>
20791 
              <bitOffset>5</bitOffset>
20792 
              <bitWidth>1</bitWidth>
20793 
            </field>
20794 
            <field>
20795 
              <name>FB6</name>
20796 
              <description>Filter bits</description>
20797 
              <bitOffset>6</bitOffset>
20798 
              <bitWidth>1</bitWidth>
20799 
            </field>
20800 
            <field>
20801 
              <name>FB7</name>
20802 
              <description>Filter bits</description>
20803 
              <bitOffset>7</bitOffset>
20804 
              <bitWidth>1</bitWidth>
20805 
            </field>
20806 
            <field>
20807 
              <name>FB8</name>
20808 
              <description>Filter bits</description>
20809 
              <bitOffset>8</bitOffset>
20810 
              <bitWidth>1</bitWidth>
20811 
            </field>
20812 
            <field>
20813 
              <name>FB9</name>
20814 
              <description>Filter bits</description>
20815 
              <bitOffset>9</bitOffset>
20816 
              <bitWidth>1</bitWidth>
20817 
            </field>
20818 
            <field>
20819 
              <name>FB10</name>
20820 
              <description>Filter bits</description>
20821 
              <bitOffset>10</bitOffset>
20822 
              <bitWidth>1</bitWidth>
20823 
            </field>
20824 
            <field>
20825 
              <name>FB11</name>
20826 
              <description>Filter bits</description>
20827 
              <bitOffset>11</bitOffset>
20828 
              <bitWidth>1</bitWidth>
20829 
            </field>
20830 
            <field>
20831 
              <name>FB12</name>
20832 
              <description>Filter bits</description>
20833 
              <bitOffset>12</bitOffset>
20834 
              <bitWidth>1</bitWidth>
20835 
            </field>
20836 
            <field>
20837 
              <name>FB13</name>
20838 
              <description>Filter bits</description>
20839 
              <bitOffset>13</bitOffset>
20840 
              <bitWidth>1</bitWidth>
20841 
            </field>
20842 
            <field>
20843 
              <name>FB14</name>
20844 
              <description>Filter bits</description>
20845 
              <bitOffset>14</bitOffset>
20846 
              <bitWidth>1</bitWidth>
20847 
            </field>
20848 
            <field>
20849 
              <name>FB15</name>
20850 
              <description>Filter bits</description>
20851 
              <bitOffset>15</bitOffset>
20852 
              <bitWidth>1</bitWidth>
20853 
            </field>
20854 
            <field>
20855 
              <name>FB16</name>
20856 
              <description>Filter bits</description>
20857 
              <bitOffset>16</bitOffset>
20858 
              <bitWidth>1</bitWidth>
20859 
            </field>
20860 
            <field>
20861 
              <name>FB17</name>
20862 
              <description>Filter bits</description>
20863 
              <bitOffset>17</bitOffset>
20864 
              <bitWidth>1</bitWidth>
20865 
            </field>
20866 
            <field>
20867 
              <name>FB18</name>
20868 
              <description>Filter bits</description>
20869 
              <bitOffset>18</bitOffset>
20870 
              <bitWidth>1</bitWidth>
20871 
            </field>
20872 
            <field>
20873 
              <name>FB19</name>
20874 
              <description>Filter bits</description>
20875 
              <bitOffset>19</bitOffset>
20876 
              <bitWidth>1</bitWidth>
20877 
            </field>
20878 
            <field>
20879 
              <name>FB20</name>
20880 
              <description>Filter bits</description>
20881 
              <bitOffset>20</bitOffset>
20882 
              <bitWidth>1</bitWidth>
20883 
            </field>
20884 
            <field>
20885 
              <name>FB21</name>
20886 
              <description>Filter bits</description>
20887 
              <bitOffset>21</bitOffset>
20888 
              <bitWidth>1</bitWidth>
20889 
            </field>
20890 
            <field>
20891 
              <name>FB22</name>
20892 
              <description>Filter bits</description>
20893 
              <bitOffset>22</bitOffset>
20894 
              <bitWidth>1</bitWidth>
20895 
            </field>
20896 
            <field>
20897 
              <name>FB23</name>
20898 
              <description>Filter bits</description>
20899 
              <bitOffset>23</bitOffset>
20900 
              <bitWidth>1</bitWidth>
20901 
            </field>
20902 
            <field>
20903 
              <name>FB24</name>
20904 
              <description>Filter bits</description>
20905 
              <bitOffset>24</bitOffset>
20906 
              <bitWidth>1</bitWidth>
20907 
            </field>
20908 
            <field>
20909 
              <name>FB25</name>
20910 
              <description>Filter bits</description>
20911 
              <bitOffset>25</bitOffset>
20912 
              <bitWidth>1</bitWidth>
20913 
            </field>
20914 
            <field>
20915 
              <name>FB26</name>
20916 
              <description>Filter bits</description>
20917 
              <bitOffset>26</bitOffset>
20918 
              <bitWidth>1</bitWidth>
20919 
            </field>
20920 
            <field>
20921 
              <name>FB27</name>
20922 
              <description>Filter bits</description>
20923 
              <bitOffset>27</bitOffset>
20924 
              <bitWidth>1</bitWidth>
20925 
            </field>
20926 
            <field>
20927 
              <name>FB28</name>
20928 
              <description>Filter bits</description>
20929 
              <bitOffset>28</bitOffset>
20930 
              <bitWidth>1</bitWidth>
20931 
            </field>
20932 
            <field>
20933 
              <name>FB29</name>
20934 
              <description>Filter bits</description>
20935 
              <bitOffset>29</bitOffset>
20936 
              <bitWidth>1</bitWidth>
20937 
            </field>
20938 
            <field>
20939 
              <name>FB30</name>
20940 
              <description>Filter bits</description>
20941 
              <bitOffset>30</bitOffset>
20942 
              <bitWidth>1</bitWidth>
20943 
            </field>
20944 
            <field>
20945 
              <name>FB31</name>
20946 
              <description>Filter bits</description>
20947 
              <bitOffset>31</bitOffset>
20948 
              <bitWidth>1</bitWidth>
20949 
            </field>
20950 
          </fields>
20951 
		</register>
20952 
		<register>
20953 
          <name>F12R1</name>
20954 
          <displayName>F12R1</displayName>
20955 
          <description>Filter bank 4 register 1</description>
20956 
          <addressOffset>0x2A0</addressOffset>
20957 
          <size>0x20</size>
20958 
          <access>read-write</access>
20959 
          <resetValue>0x00000000</resetValue>
20960 
		  <fields>
20961 
            <field>
20962 
              <name>FB0</name>
20963 
              <description>Filter bits</description>
20964 
              <bitOffset>0</bitOffset>
20965 
              <bitWidth>1</bitWidth>
20966 
            </field>
20967 
            <field>
20968 
              <name>FB1</name>
20969 
              <description>Filter bits</description>
20970 
              <bitOffset>1</bitOffset>
20971 
              <bitWidth>1</bitWidth>
20972 
            </field>
20973 
            <field>
20974 
              <name>FB2</name>
20975 
              <description>Filter bits</description>
20976 
              <bitOffset>2</bitOffset>
20977 
              <bitWidth>1</bitWidth>
20978 
            </field>
20979 
            <field>
20980 
              <name>FB3</name>
20981 
              <description>Filter bits</description>
20982 
              <bitOffset>3</bitOffset>
20983 
              <bitWidth>1</bitWidth>
20984 
            </field>
20985 
            <field>
20986 
              <name>FB4</name>
20987 
              <description>Filter bits</description>
20988 
              <bitOffset>4</bitOffset>
20989 
              <bitWidth>1</bitWidth>
20990 
            </field>
20991 
            <field>
20992 
              <name>FB5</name>
20993 
              <description>Filter bits</description>
20994 
              <bitOffset>5</bitOffset>
20995 
              <bitWidth>1</bitWidth>
20996 
            </field>
20997 
            <field>
20998 
              <name>FB6</name>
20999 
              <description>Filter bits</description>
21000 
              <bitOffset>6</bitOffset>
21001 
              <bitWidth>1</bitWidth>
21002 
            </field>
21003 
            <field>
21004 
              <name>FB7</name>
21005 
              <description>Filter bits</description>
21006 
              <bitOffset>7</bitOffset>
21007 
              <bitWidth>1</bitWidth>
21008 
            </field>
21009 
            <field>
21010 
              <name>FB8</name>
21011 
              <description>Filter bits</description>
21012 
              <bitOffset>8</bitOffset>
21013 
              <bitWidth>1</bitWidth>
21014 
            </field>
21015 
            <field>
21016 
              <name>FB9</name>
21017 
              <description>Filter bits</description>
21018 
              <bitOffset>9</bitOffset>
21019 
              <bitWidth>1</bitWidth>
21020 
            </field>
21021 
            <field>
21022 
              <name>FB10</name>
21023 
              <description>Filter bits</description>
21024 
              <bitOffset>10</bitOffset>
21025 
              <bitWidth>1</bitWidth>
21026 
            </field>
21027 
            <field>
21028 
              <name>FB11</name>
21029 
              <description>Filter bits</description>
21030 
              <bitOffset>11</bitOffset>
21031 
              <bitWidth>1</bitWidth>
21032 
            </field>
21033 
            <field>
21034 
              <name>FB12</name>
21035 
              <description>Filter bits</description>
21036 
              <bitOffset>12</bitOffset>
21037 
              <bitWidth>1</bitWidth>
21038 
            </field>
21039 
            <field>
21040 
              <name>FB13</name>
21041 
              <description>Filter bits</description>
21042 
              <bitOffset>13</bitOffset>
21043 
              <bitWidth>1</bitWidth>
21044 
            </field>
21045 
            <field>
21046 
              <name>FB14</name>
21047 
              <description>Filter bits</description>
21048 
              <bitOffset>14</bitOffset>
21049 
              <bitWidth>1</bitWidth>
21050 
            </field>
21051 
            <field>
21052 
              <name>FB15</name>
21053 
              <description>Filter bits</description>
21054 
              <bitOffset>15</bitOffset>
21055 
              <bitWidth>1</bitWidth>
21056 
            </field>
21057 
            <field>
21058 
              <name>FB16</name>
21059 
              <description>Filter bits</description>
21060 
              <bitOffset>16</bitOffset>
21061 
              <bitWidth>1</bitWidth>
21062 
            </field>
21063 
            <field>
21064 
              <name>FB17</name>
21065 
              <description>Filter bits</description>
21066 
              <bitOffset>17</bitOffset>
21067 
              <bitWidth>1</bitWidth>
21068 
            </field>
21069 
            <field>
21070 
              <name>FB18</name>
21071 
              <description>Filter bits</description>
21072 
              <bitOffset>18</bitOffset>
21073 
              <bitWidth>1</bitWidth>
21074 
            </field>
21075 
            <field>
21076 
              <name>FB19</name>
21077 
              <description>Filter bits</description>
21078 
              <bitOffset>19</bitOffset>
21079 
              <bitWidth>1</bitWidth>
21080 
            </field>
21081 
            <field>
21082 
              <name>FB20</name>
21083 
              <description>Filter bits</description>
21084 
              <bitOffset>20</bitOffset>
21085 
              <bitWidth>1</bitWidth>
21086 
            </field>
21087 
            <field>
21088 
              <name>FB21</name>
21089 
              <description>Filter bits</description>
21090 
              <bitOffset>21</bitOffset>
21091 
              <bitWidth>1</bitWidth>
21092 
            </field>
21093 
            <field>
21094 
              <name>FB22</name>
21095 
              <description>Filter bits</description>
21096 
              <bitOffset>22</bitOffset>
21097 
              <bitWidth>1</bitWidth>
21098 
            </field>
21099 
            <field>
21100 
              <name>FB23</name>
21101 
              <description>Filter bits</description>
21102 
              <bitOffset>23</bitOffset>
21103 
              <bitWidth>1</bitWidth>
21104 
            </field>
21105 
            <field>
21106 
              <name>FB24</name>
21107 
              <description>Filter bits</description>
21108 
              <bitOffset>24</bitOffset>
21109 
              <bitWidth>1</bitWidth>
21110 
            </field>
21111 
            <field>
21112 
              <name>FB25</name>
21113 
              <description>Filter bits</description>
21114 
              <bitOffset>25</bitOffset>
21115 
              <bitWidth>1</bitWidth>
21116 
            </field>
21117 
            <field>
21118 
              <name>FB26</name>
21119 
              <description>Filter bits</description>
21120 
              <bitOffset>26</bitOffset>
21121 
              <bitWidth>1</bitWidth>
21122 
            </field>
21123 
            <field>
21124 
              <name>FB27</name>
21125 
              <description>Filter bits</description>
21126 
              <bitOffset>27</bitOffset>
21127 
              <bitWidth>1</bitWidth>
21128 
            </field>
21129 
            <field>
21130 
              <name>FB28</name>
21131 
              <description>Filter bits</description>
21132 
              <bitOffset>28</bitOffset>
21133 
              <bitWidth>1</bitWidth>
21134 
            </field>
21135 
            <field>
21136 
              <name>FB29</name>
21137 
              <description>Filter bits</description>
21138 
              <bitOffset>29</bitOffset>
21139 
              <bitWidth>1</bitWidth>
21140 
            </field>
21141 
            <field>
21142 
              <name>FB30</name>
21143 
              <description>Filter bits</description>
21144 
              <bitOffset>30</bitOffset>
21145 
              <bitWidth>1</bitWidth>
21146 
            </field>
21147 
            <field>
21148 
              <name>FB31</name>
21149 
              <description>Filter bits</description>
21150 
              <bitOffset>31</bitOffset>
21151 
              <bitWidth>1</bitWidth>
21152 
            </field>
21153 
          </fields>
21154 
		</register>
21155 
		<register>
21156 
          <name>F12R2</name>
21157 
          <displayName>F12R2</displayName>
21158 
          <description>Filter bank 12 register 2</description>
21159 
          <addressOffset>0x2A4</addressOffset>
21160 
          <size>0x20</size>
21161 
          <access>read-write</access>
21162 
          <resetValue>0x00000000</resetValue>
21163 
		  <fields>
21164 
            <field>
21165 
              <name>FB0</name>
21166 
              <description>Filter bits</description>
21167 
              <bitOffset>0</bitOffset>
21168 
              <bitWidth>1</bitWidth>
21169 
            </field>
21170 
            <field>
21171 
              <name>FB1</name>
21172 
              <description>Filter bits</description>
21173 
              <bitOffset>1</bitOffset>
21174 
              <bitWidth>1</bitWidth>
21175 
            </field>
21176 
            <field>
21177 
              <name>FB2</name>
21178 
              <description>Filter bits</description>
21179 
              <bitOffset>2</bitOffset>
21180 
              <bitWidth>1</bitWidth>
21181 
            </field>
21182 
            <field>
21183 
              <name>FB3</name>
21184 
              <description>Filter bits</description>
21185 
              <bitOffset>3</bitOffset>
21186 
              <bitWidth>1</bitWidth>
21187 
            </field>
21188 
            <field>
21189 
              <name>FB4</name>
21190 
              <description>Filter bits</description>
21191 
              <bitOffset>4</bitOffset>
21192 
              <bitWidth>1</bitWidth>
21193 
            </field>
21194 
            <field>
21195 
              <name>FB5</name>
21196 
              <description>Filter bits</description>
21197 
              <bitOffset>5</bitOffset>
21198 
              <bitWidth>1</bitWidth>
21199 
            </field>
21200 
            <field>
21201 
              <name>FB6</name>
21202 
              <description>Filter bits</description>
21203 
              <bitOffset>6</bitOffset>
21204 
              <bitWidth>1</bitWidth>
21205 
            </field>
21206 
            <field>
21207 
              <name>FB7</name>
21208 
              <description>Filter bits</description>
21209 
              <bitOffset>7</bitOffset>
21210 
              <bitWidth>1</bitWidth>
21211 
            </field>
21212 
            <field>
21213 
              <name>FB8</name>
21214 
              <description>Filter bits</description>
21215 
              <bitOffset>8</bitOffset>
21216 
              <bitWidth>1</bitWidth>
21217 
            </field>
21218 
            <field>
21219 
              <name>FB9</name>
21220 
              <description>Filter bits</description>
21221 
              <bitOffset>9</bitOffset>
21222 
              <bitWidth>1</bitWidth>
21223 
            </field>
21224 
            <field>
21225 
              <name>FB10</name>
21226 
              <description>Filter bits</description>
21227 
              <bitOffset>10</bitOffset>
21228 
              <bitWidth>1</bitWidth>
21229 
            </field>
21230 
            <field>
21231 
              <name>FB11</name>
21232 
              <description>Filter bits</description>
21233 
              <bitOffset>11</bitOffset>
21234 
              <bitWidth>1</bitWidth>
21235 
            </field>
21236 
            <field>
21237 
              <name>FB12</name>
21238 
              <description>Filter bits</description>
21239 
              <bitOffset>12</bitOffset>
21240 
              <bitWidth>1</bitWidth>
21241 
            </field>
21242 
            <field>
21243 
              <name>FB13</name>
21244 
              <description>Filter bits</description>
21245 
              <bitOffset>13</bitOffset>
21246 
              <bitWidth>1</bitWidth>
21247 
            </field>
21248 
            <field>
21249 
              <name>FB14</name>
21250 
              <description>Filter bits</description>
21251 
              <bitOffset>14</bitOffset>
21252 
              <bitWidth>1</bitWidth>
21253 
            </field>
21254 
            <field>
21255 
              <name>FB15</name>
21256 
              <description>Filter bits</description>
21257 
              <bitOffset>15</bitOffset>
21258 
              <bitWidth>1</bitWidth>
21259 
            </field>
21260 
            <field>
21261 
              <name>FB16</name>
21262 
              <description>Filter bits</description>
21263 
              <bitOffset>16</bitOffset>
21264 
              <bitWidth>1</bitWidth>
21265 
            </field>
21266 
            <field>
21267 
              <name>FB17</name>
21268 
              <description>Filter bits</description>
21269 
              <bitOffset>17</bitOffset>
21270 
              <bitWidth>1</bitWidth>
21271 
            </field>
21272 
            <field>
21273 
              <name>FB18</name>
21274 
              <description>Filter bits</description>
21275 
              <bitOffset>18</bitOffset>
21276 
              <bitWidth>1</bitWidth>
21277 
            </field>
21278 
            <field>
21279 
              <name>FB19</name>
21280 
              <description>Filter bits</description>
21281 
              <bitOffset>19</bitOffset>
21282 
              <bitWidth>1</bitWidth>
21283 
            </field>
21284 
            <field>
21285 
              <name>FB20</name>
21286 
              <description>Filter bits</description>
21287 
              <bitOffset>20</bitOffset>
21288 
              <bitWidth>1</bitWidth>
21289 
            </field>
21290 
            <field>
21291 
              <name>FB21</name>
21292 
              <description>Filter bits</description>
21293 
              <bitOffset>21</bitOffset>
21294 
              <bitWidth>1</bitWidth>
21295 
            </field>
21296 
            <field>
21297 
              <name>FB22</name>
21298 
              <description>Filter bits</description>
21299 
              <bitOffset>22</bitOffset>
21300 
              <bitWidth>1</bitWidth>
21301 
            </field>
21302 
            <field>
21303 
              <name>FB23</name>
21304 
              <description>Filter bits</description>
21305 
              <bitOffset>23</bitOffset>
21306 
              <bitWidth>1</bitWidth>
21307 
            </field>
21308 
            <field>
21309 
              <name>FB24</name>
21310 
              <description>Filter bits</description>
21311 
              <bitOffset>24</bitOffset>
21312 
              <bitWidth>1</bitWidth>
21313 
            </field>
21314 
            <field>
21315 
              <name>FB25</name>
21316 
              <description>Filter bits</description>
21317 
              <bitOffset>25</bitOffset>
21318 
              <bitWidth>1</bitWidth>
21319 
            </field>
21320 
            <field>
21321 
              <name>FB26</name>
21322 
              <description>Filter bits</description>
21323 
              <bitOffset>26</bitOffset>
21324 
              <bitWidth>1</bitWidth>
21325 
            </field>
21326 
            <field>
21327 
              <name>FB27</name>
21328 
              <description>Filter bits</description>
21329 
              <bitOffset>27</bitOffset>
21330 
              <bitWidth>1</bitWidth>
21331 
            </field>
21332 
            <field>
21333 
              <name>FB28</name>
21334 
              <description>Filter bits</description>
21335 
              <bitOffset>28</bitOffset>
21336 
              <bitWidth>1</bitWidth>
21337 
            </field>
21338 
            <field>
21339 
              <name>FB29</name>
21340 
              <description>Filter bits</description>
21341 
              <bitOffset>29</bitOffset>
21342 
              <bitWidth>1</bitWidth>
21343 
            </field>
21344 
            <field>
21345 
              <name>FB30</name>
21346 
              <description>Filter bits</description>
21347 
              <bitOffset>30</bitOffset>
21348 
              <bitWidth>1</bitWidth>
21349 
            </field>
21350 
            <field>
21351 
              <name>FB31</name>
21352 
              <description>Filter bits</description>
21353 
              <bitOffset>31</bitOffset>
21354 
              <bitWidth>1</bitWidth>
21355 
            </field>
21356 
          </fields>
21357 
		</register>
21358 
		<register>
21359 
          <name>F13R1</name>
21360 
          <displayName>F13R1</displayName>
21361 
          <description>Filter bank 13 register 1</description>
21362 
          <addressOffset>0x2A8</addressOffset>
21363 
          <size>0x20</size>
21364 
          <access>read-write</access>
21365 
          <resetValue>0x00000000</resetValue>
21366 
		  <fields>
21367 
            <field>
21368 
              <name>FB0</name>
21369 
              <description>Filter bits</description>
21370 
              <bitOffset>0</bitOffset>
21371 
              <bitWidth>1</bitWidth>
21372 
            </field>
21373 
            <field>
21374 
              <name>FB1</name>
21375 
              <description>Filter bits</description>
21376 
              <bitOffset>1</bitOffset>
21377 
              <bitWidth>1</bitWidth>
21378 
            </field>
21379 
            <field>
21380 
              <name>FB2</name>
21381 
              <description>Filter bits</description>
21382 
              <bitOffset>2</bitOffset>
21383 
              <bitWidth>1</bitWidth>
21384 
            </field>
21385 
            <field>
21386 
              <name>FB3</name>
21387 
              <description>Filter bits</description>
21388 
              <bitOffset>3</bitOffset>
21389 
              <bitWidth>1</bitWidth>
21390 
            </field>
21391 
            <field>
21392 
              <name>FB4</name>
21393 
              <description>Filter bits</description>
21394 
              <bitOffset>4</bitOffset>
21395 
              <bitWidth>1</bitWidth>
21396 
            </field>
21397 
            <field>
21398 
              <name>FB5</name>
21399 
              <description>Filter bits</description>
21400 
              <bitOffset>5</bitOffset>
21401 
              <bitWidth>1</bitWidth>
21402 
            </field>
21403 
            <field>
21404 
              <name>FB6</name>
21405 
              <description>Filter bits</description>
21406 
              <bitOffset>6</bitOffset>
21407 
              <bitWidth>1</bitWidth>
21408 
            </field>
21409 
            <field>
21410 
              <name>FB7</name>
21411 
              <description>Filter bits</description>
21412 
              <bitOffset>7</bitOffset>
21413 
              <bitWidth>1</bitWidth>
21414 
            </field>
21415 
            <field>
21416 
              <name>FB8</name>
21417 
              <description>Filter bits</description>
21418 
              <bitOffset>8</bitOffset>
21419 
              <bitWidth>1</bitWidth>
21420 
            </field>
21421 
            <field>
21422 
              <name>FB9</name>
21423 
              <description>Filter bits</description>
21424 
              <bitOffset>9</bitOffset>
21425 
              <bitWidth>1</bitWidth>
21426 
            </field>
21427 
            <field>
21428 
              <name>FB10</name>
21429 
              <description>Filter bits</description>
21430 
              <bitOffset>10</bitOffset>
21431 
              <bitWidth>1</bitWidth>
21432 
            </field>
21433 
            <field>
21434 
              <name>FB11</name>
21435 
              <description>Filter bits</description>
21436 
              <bitOffset>11</bitOffset>
21437 
              <bitWidth>1</bitWidth>
21438 
            </field>
21439 
            <field>
21440 
              <name>FB12</name>
21441 
              <description>Filter bits</description>
21442 
              <bitOffset>12</bitOffset>
21443 
              <bitWidth>1</bitWidth>
21444 
            </field>
21445 
            <field>
21446 
              <name>FB13</name>
21447 
              <description>Filter bits</description>
21448 
              <bitOffset>13</bitOffset>
21449 
              <bitWidth>1</bitWidth>
21450 
            </field>
21451 
            <field>
21452 
              <name>FB14</name>
21453 
              <description>Filter bits</description>
21454 
              <bitOffset>14</bitOffset>
21455 
              <bitWidth>1</bitWidth>
21456 
            </field>
21457 
            <field>
21458 
              <name>FB15</name>
21459 
              <description>Filter bits</description>
21460 
              <bitOffset>15</bitOffset>
21461 
              <bitWidth>1</bitWidth>
21462 
            </field>
21463 
            <field>
21464 
              <name>FB16</name>
21465 
              <description>Filter bits</description>
21466 
              <bitOffset>16</bitOffset>
21467 
              <bitWidth>1</bitWidth>
21468 
            </field>
21469 
            <field>
21470 
              <name>FB17</name>
21471 
              <description>Filter bits</description>
21472 
              <bitOffset>17</bitOffset>
21473 
              <bitWidth>1</bitWidth>
21474 
            </field>
21475 
            <field>
21476 
              <name>FB18</name>
21477 
              <description>Filter bits</description>
21478 
              <bitOffset>18</bitOffset>
21479 
              <bitWidth>1</bitWidth>
21480 
            </field>
21481 
            <field>
21482 
              <name>FB19</name>
21483 
              <description>Filter bits</description>
21484 
              <bitOffset>19</bitOffset>
21485 
              <bitWidth>1</bitWidth>
21486 
            </field>
21487 
            <field>
21488 
              <name>FB20</name>
21489 
              <description>Filter bits</description>
21490 
              <bitOffset>20</bitOffset>
21491 
              <bitWidth>1</bitWidth>
21492 
            </field>
21493 
            <field>
21494 
              <name>FB21</name>
21495 
              <description>Filter bits</description>
21496 
              <bitOffset>21</bitOffset>
21497 
              <bitWidth>1</bitWidth>
21498 
            </field>
21499 
            <field>
21500 
              <name>FB22</name>
21501 
              <description>Filter bits</description>
21502 
              <bitOffset>22</bitOffset>
21503 
              <bitWidth>1</bitWidth>
21504 
            </field>
21505 
            <field>
21506 
              <name>FB23</name>
21507 
              <description>Filter bits</description>
21508 
              <bitOffset>23</bitOffset>
21509 
              <bitWidth>1</bitWidth>
21510 
            </field>
21511 
            <field>
21512 
              <name>FB24</name>
21513 
              <description>Filter bits</description>
21514 
              <bitOffset>24</bitOffset>
21515 
              <bitWidth>1</bitWidth>
21516 
            </field>
21517 
            <field>
21518 
              <name>FB25</name>
21519 
              <description>Filter bits</description>
21520 
              <bitOffset>25</bitOffset>
21521 
              <bitWidth>1</bitWidth>
21522 
            </field>
21523 
            <field>
21524 
              <name>FB26</name>
21525 
              <description>Filter bits</description>
21526 
              <bitOffset>26</bitOffset>
21527 
              <bitWidth>1</bitWidth>
21528 
            </field>
21529 
            <field>
21530 
              <name>FB27</name>
21531 
              <description>Filter bits</description>
21532 
              <bitOffset>27</bitOffset>
21533 
              <bitWidth>1</bitWidth>
21534 
            </field>
21535 
            <field>
21536 
              <name>FB28</name>
21537 
              <description>Filter bits</description>
21538 
              <bitOffset>28</bitOffset>
21539 
              <bitWidth>1</bitWidth>
21540 
            </field>
21541 
            <field>
21542 
              <name>FB29</name>
21543 
              <description>Filter bits</description>
21544 
              <bitOffset>29</bitOffset>
21545 
              <bitWidth>1</bitWidth>
21546 
            </field>
21547 
            <field>
21548 
              <name>FB30</name>
21549 
              <description>Filter bits</description>
21550 
              <bitOffset>30</bitOffset>
21551 
              <bitWidth>1</bitWidth>
21552 
            </field>
21553 
            <field>
21554 
              <name>FB31</name>
21555 
              <description>Filter bits</description>
21556 
              <bitOffset>31</bitOffset>
21557 
              <bitWidth>1</bitWidth>
21558 
            </field>
21559 
          </fields>
21560 
		</register>
21561 
		<register>
21562 
          <name>F13R2</name>
21563 
          <displayName>F13R2</displayName>
21564 
          <description>Filter bank 13 register 2</description>
21565 
          <addressOffset>0x2AC</addressOffset>
21566 
          <size>0x20</size>
21567 
          <access>read-write</access>
21568 
          <resetValue>0x00000000</resetValue>
21569 
		  <fields>
21570 
            <field>
21571 
              <name>FB0</name>
21572 
              <description>Filter bits</description>
21573 
              <bitOffset>0</bitOffset>
21574 
              <bitWidth>1</bitWidth>
21575 
            </field>
21576 
            <field>
21577 
              <name>FB1</name>
21578 
              <description>Filter bits</description>
21579 
              <bitOffset>1</bitOffset>
21580 
              <bitWidth>1</bitWidth>
21581 
            </field>
21582 
            <field>
21583 
              <name>FB2</name>
21584 
              <description>Filter bits</description>
21585 
              <bitOffset>2</bitOffset>
21586 
              <bitWidth>1</bitWidth>
21587 
            </field>
21588 
            <field>
21589 
              <name>FB3</name>
21590 
              <description>Filter bits</description>
21591 
              <bitOffset>3</bitOffset>
21592 
              <bitWidth>1</bitWidth>
21593 
            </field>
21594 
            <field>
21595 
              <name>FB4</name>
21596 
              <description>Filter bits</description>
21597 
              <bitOffset>4</bitOffset>
21598 
              <bitWidth>1</bitWidth>
21599 
            </field>
21600 
            <field>
21601 
              <name>FB5</name>
21602 
              <description>Filter bits</description>
21603 
              <bitOffset>5</bitOffset>
21604 
              <bitWidth>1</bitWidth>
21605 
            </field>
21606 
            <field>
21607 
              <name>FB6</name>
21608 
              <description>Filter bits</description>
21609 
              <bitOffset>6</bitOffset>
21610 
              <bitWidth>1</bitWidth>
21611 
            </field>
21612 
            <field>
21613 
              <name>FB7</name>
21614 
              <description>Filter bits</description>
21615 
              <bitOffset>7</bitOffset>
21616 
              <bitWidth>1</bitWidth>
21617 
            </field>
21618 
            <field>
21619 
              <name>FB8</name>
21620 
              <description>Filter bits</description>
21621 
              <bitOffset>8</bitOffset>
21622 
              <bitWidth>1</bitWidth>
21623 
            </field>
21624 
            <field>
21625 
              <name>FB9</name>
21626 
              <description>Filter bits</description>
21627 
              <bitOffset>9</bitOffset>
21628 
              <bitWidth>1</bitWidth>
21629 
            </field>
21630 
            <field>
21631 
              <name>FB10</name>
21632 
              <description>Filter bits</description>
21633 
              <bitOffset>10</bitOffset>
21634 
              <bitWidth>1</bitWidth>
21635 
            </field>
21636 
            <field>
21637 
              <name>FB11</name>
21638 
              <description>Filter bits</description>
21639 
              <bitOffset>11</bitOffset>
21640 
              <bitWidth>1</bitWidth>
21641 
            </field>
21642 
            <field>
21643 
              <name>FB12</name>
21644 
              <description>Filter bits</description>
21645 
              <bitOffset>12</bitOffset>
21646 
              <bitWidth>1</bitWidth>
21647 
            </field>
21648 
            <field>
21649 
              <name>FB13</name>
21650 
              <description>Filter bits</description>
21651 
              <bitOffset>13</bitOffset>
21652 
              <bitWidth>1</bitWidth>
21653 
            </field>
21654 
            <field>
21655 
              <name>FB14</name>
21656 
              <description>Filter bits</description>
21657 
              <bitOffset>14</bitOffset>
21658 
              <bitWidth>1</bitWidth>
21659 
            </field>
21660 
            <field>
21661 
              <name>FB15</name>
21662 
              <description>Filter bits</description>
21663 
              <bitOffset>15</bitOffset>
21664 
              <bitWidth>1</bitWidth>
21665 
            </field>
21666 
            <field>
21667 
              <name>FB16</name>
21668 
              <description>Filter bits</description>
21669 
              <bitOffset>16</bitOffset>
21670 
              <bitWidth>1</bitWidth>
21671 
            </field>
21672 
            <field>
21673 
              <name>FB17</name>
21674 
              <description>Filter bits</description>
21675 
              <bitOffset>17</bitOffset>
21676 
              <bitWidth>1</bitWidth>
21677 
            </field>
21678 
            <field>
21679 
              <name>FB18</name>
21680 
              <description>Filter bits</description>
21681 
              <bitOffset>18</bitOffset>
21682 
              <bitWidth>1</bitWidth>
21683 
            </field>
21684 
            <field>
21685 
              <name>FB19</name>
21686 
              <description>Filter bits</description>
21687 
              <bitOffset>19</bitOffset>
21688 
              <bitWidth>1</bitWidth>
21689 
            </field>
21690 
            <field>
21691 
              <name>FB20</name>
21692 
              <description>Filter bits</description>
21693 
              <bitOffset>20</bitOffset>
21694 
              <bitWidth>1</bitWidth>
21695 
            </field>
21696 
            <field>
21697 
              <name>FB21</name>
21698 
              <description>Filter bits</description>
21699 
              <bitOffset>21</bitOffset>
21700 
              <bitWidth>1</bitWidth>
21701 
            </field>
21702 
            <field>
21703 
              <name>FB22</name>
21704 
              <description>Filter bits</description>
21705 
              <bitOffset>22</bitOffset>
21706 
              <bitWidth>1</bitWidth>
21707 
            </field>
21708 
            <field>
21709 
              <name>FB23</name>
21710 
              <description>Filter bits</description>
21711 
              <bitOffset>23</bitOffset>
21712 
              <bitWidth>1</bitWidth>
21713 
            </field>
21714 
            <field>
21715 
              <name>FB24</name>
21716 
              <description>Filter bits</description>
21717 
              <bitOffset>24</bitOffset>
21718 
              <bitWidth>1</bitWidth>
21719 
            </field>
21720 
            <field>
21721 
              <name>FB25</name>
21722 
              <description>Filter bits</description>
21723 
              <bitOffset>25</bitOffset>
21724 
              <bitWidth>1</bitWidth>
21725 
            </field>
21726 
            <field>
21727 
              <name>FB26</name>
21728 
              <description>Filter bits</description>
21729 
              <bitOffset>26</bitOffset>
21730 
              <bitWidth>1</bitWidth>
21731 
            </field>
21732 
            <field>
21733 
              <name>FB27</name>
21734 
              <description>Filter bits</description>
21735 
              <bitOffset>27</bitOffset>
21736 
              <bitWidth>1</bitWidth>
21737 
            </field>
21738 
            <field>
21739 
              <name>FB28</name>
21740 
              <description>Filter bits</description>
21741 
              <bitOffset>28</bitOffset>
21742 
              <bitWidth>1</bitWidth>
21743 
            </field>
21744 
            <field>
21745 
              <name>FB29</name>
21746 
              <description>Filter bits</description>
21747 
              <bitOffset>29</bitOffset>
21748 
              <bitWidth>1</bitWidth>
21749 
            </field>
21750 
            <field>
21751 
              <name>FB30</name>
21752 
              <description>Filter bits</description>
21753 
              <bitOffset>30</bitOffset>
21754 
              <bitWidth>1</bitWidth>
21755 
            </field>
21756 
            <field>
21757 
              <name>FB31</name>
21758 
              <description>Filter bits</description>
21759 
              <bitOffset>31</bitOffset>
21760 
              <bitWidth>1</bitWidth>
21761 
            </field>
21762 
          </fields>
21763 
		</register>
21764 
      </registers>
21765 
    </peripheral>
21766 
    <peripheral>
21767 
      <name>DAC</name>
21768 
      <description>Digital to analog converter</description>
21769 
      <groupName>DAC</groupName>
21770 
      <baseAddress>0x40007400</baseAddress>
21771 
      <addressBlock>
21772 
        <offset>0x0</offset>
21773 
        <size>0x400</size>
21774 
        <usage>registers</usage>
21775 
      </addressBlock>
21776 
      <registers>
21777 
        <register>
21778 
          <name>CR</name>
21779 
          <displayName>CR</displayName>
21780 
          <description>Control register (DAC_CR)</description>
21781 
          <addressOffset>0x0</addressOffset>
21782 
          <size>0x20</size>
21783 
          <access>read-write</access>
21784 
          <resetValue>0x00000000</resetValue>
21785 
          <fields>
21786 
            <field>
21787 
              <name>EN1</name>
21788 
              <description>DAC channel1 enable</description>
21789 
              <bitOffset>0</bitOffset>
21790 
              <bitWidth>1</bitWidth>
21791 
            </field>
21792 
            <field>
21793 
              <name>BOFF1</name>
21794 
              <description>DAC channel1 output buffer
21795 
              disable</description>
21796 
              <bitOffset>1</bitOffset>
21797 
              <bitWidth>1</bitWidth>
21798 
            </field>
21799 
            <field>
21800 
              <name>TEN1</name>
21801 
              <description>DAC channel1 trigger
21802 
              enable</description>
21803 
              <bitOffset>2</bitOffset>
21804 
              <bitWidth>1</bitWidth>
21805 
            </field>
21806 
            <field>
21807 
              <name>TSEL1</name>
21808 
              <description>DAC channel1 trigger
21809 
              selection</description>
21810 
              <bitOffset>3</bitOffset>
21811 
              <bitWidth>3</bitWidth>
21812 
            </field>
21813 
            <field>
21814 
              <name>WAVE1</name>
21815 
              <description>DAC channel1 noise/triangle wave
21816 
              generation enable</description>
21817 
              <bitOffset>6</bitOffset>
21818 
              <bitWidth>2</bitWidth>
21819 
            </field>
21820 
            <field>
21821 
              <name>MAMP1</name>
21822 
              <description>DAC channel1 mask/amplitude
21823 
              selector</description>
21824 
              <bitOffset>8</bitOffset>
21825 
              <bitWidth>4</bitWidth>
21826 
            </field>
21827 
            <field>
21828 
              <name>DMAEN1</name>
21829 
              <description>DAC channel1 DMA enable</description>
21830 
              <bitOffset>12</bitOffset>
21831 
              <bitWidth>1</bitWidth>
21832 
            </field>
21833 
            <field>
21834 
              <name>EN2</name>
21835 
              <description>DAC channel2 enable</description>
21836 
              <bitOffset>16</bitOffset>
21837 
              <bitWidth>1</bitWidth>
21838 
            </field>
21839 
            <field>
21840 
              <name>BOFF2</name>
21841 
              <description>DAC channel2 output buffer
21842 
              disable</description>
21843 
              <bitOffset>17</bitOffset>
21844 
              <bitWidth>1</bitWidth>
21845 
            </field>
21846 
            <field>
21847 
              <name>TEN2</name>
21848 
              <description>DAC channel2 trigger
21849 
              enable</description>
21850 
              <bitOffset>18</bitOffset>
21851 
              <bitWidth>1</bitWidth>
21852 
            </field>
21853 
            <field>
21854 
              <name>TSEL2</name>
21855 
              <description>DAC channel2 trigger
21856 
              selection</description>
21857 
              <bitOffset>19</bitOffset>
21858 
              <bitWidth>3</bitWidth>
21859 
            </field>
21860 
            <field>
21861 
              <name>WAVE2</name>
21862 
              <description>DAC channel2 noise/triangle wave
21863 
              generation enable</description>
21864 
              <bitOffset>22</bitOffset>
21865 
              <bitWidth>2</bitWidth>
21866 
            </field>
21867 
            <field>
21868 
              <name>MAMP2</name>
21869 
              <description>DAC channel2 mask/amplitude
21870 
              selector</description>
21871 
              <bitOffset>24</bitOffset>
21872 
              <bitWidth>4</bitWidth>
21873 
            </field>
21874 
            <field>
21875 
              <name>DMAEN2</name>
21876 
              <description>DAC channel2 DMA enable</description>
21877 
              <bitOffset>28</bitOffset>
21878 
              <bitWidth>1</bitWidth>
21879 
            </field>
21880 
          </fields>
21881 
        </register>
21882 
        <register>
21883 
          <name>SWTRIGR</name>
21884 
          <displayName>SWTRIGR</displayName>
21885 
          <description>DAC software trigger register
21886 
          (DAC_SWTRIGR)</description>
21887 
          <addressOffset>0x4</addressOffset>
21888 
          <size>0x20</size>
21889 
          <access>write-only</access>
21890 
          <resetValue>0x00000000</resetValue>
21891 
          <fields>
21892 
            <field>
21893 
              <name>SWTRIG1</name>
21894 
              <description>DAC channel1 software
21895 
              trigger</description>
21896 
              <bitOffset>0</bitOffset>
21897 
              <bitWidth>1</bitWidth>
21898 
            </field>
21899 
            <field>
21900 
              <name>SWTRIG2</name>
21901 
              <description>DAC channel2 software
21902 
              trigger</description>
21903 
              <bitOffset>1</bitOffset>
21904 
              <bitWidth>1</bitWidth>
21905 
            </field>
21906 
          </fields>
21907 
        </register>
21908 
        <register>
21909 
          <name>DHR12R1</name>
21910 
          <displayName>DHR12R1</displayName>
21911 
          <description>DAC channel1 12-bit right-aligned data
21912 
          holding register(DAC_DHR12R1)</description>
21913 
          <addressOffset>0x8</addressOffset>
21914 
          <size>0x20</size>
21915 
          <access>read-write</access>
21916 
          <resetValue>0x00000000</resetValue>
21917 
          <fields>
21918 
            <field>
21919 
              <name>DACC1DHR</name>
21920 
              <description>DAC channel1 12-bit right-aligned
21921 
              data</description>
21922 
              <bitOffset>0</bitOffset>
21923 
              <bitWidth>12</bitWidth>
21924 
            </field>
21925 
          </fields>
21926 
        </register>
21927 
        <register>
21928 
          <name>DHR12L1</name>
21929 
          <displayName>DHR12L1</displayName>
21930 
          <description>DAC channel1 12-bit left aligned data
21931 
          holding register (DAC_DHR12L1)</description>
21932 
          <addressOffset>0xC</addressOffset>
21933 
          <size>0x20</size>
21934 
          <access>read-write</access>
21935 
          <resetValue>0x00000000</resetValue>
21936 
          <fields>
21937 
            <field>
21938 
              <name>DACC1DHR</name>
21939 
              <description>DAC channel1 12-bit left-aligned
21940 
              data</description>
21941 
              <bitOffset>4</bitOffset>
21942 
              <bitWidth>12</bitWidth>
21943 
            </field>
21944 
          </fields>
21945 
        </register>
21946 
        <register>
21947 
          <name>DHR8R1</name>
21948 
          <displayName>DHR8R1</displayName>
21949 
          <description>DAC channel1 8-bit right aligned data
21950 
          holding register (DAC_DHR8R1)</description>
21951 
          <addressOffset>0x10</addressOffset>
21952 
          <size>0x20</size>
21953 
          <access>read-write</access>
21954 
          <resetValue>0x00000000</resetValue>
21955 
          <fields>
21956 
            <field>
21957 
              <name>DACC1DHR</name>
21958 
              <description>DAC channel1 8-bit right-aligned
21959 
              data</description>
21960 
              <bitOffset>0</bitOffset>
21961 
              <bitWidth>8</bitWidth>
21962 
            </field>
21963 
          </fields>
21964 
        </register>
21965 
        <register>
21966 
          <name>DHR12R2</name>
21967 
          <displayName>DHR12R2</displayName>
21968 
          <description>DAC channel2 12-bit right aligned data
21969 
          holding register (DAC_DHR12R2)</description>
21970 
          <addressOffset>0x14</addressOffset>
21971 
          <size>0x20</size>
21972 
          <access>read-write</access>
21973 
          <resetValue>0x00000000</resetValue>
21974 
          <fields>
21975 
            <field>
21976 
              <name>DACC2DHR</name>
21977 
              <description>DAC channel2 12-bit right-aligned
21978 
              data</description>
21979 
              <bitOffset>0</bitOffset>
21980 
              <bitWidth>12</bitWidth>
21981 
            </field>
21982 
          </fields>
21983 
        </register>
21984 
        <register>
21985 
          <name>DHR12L2</name>
21986 
          <displayName>DHR12L2</displayName>
21987 
          <description>DAC channel2 12-bit left aligned data
21988 
          holding register (DAC_DHR12L2)</description>
21989 
          <addressOffset>0x18</addressOffset>
21990 
          <size>0x20</size>
21991 
          <access>read-write</access>
21992 
          <resetValue>0x00000000</resetValue>
21993 
          <fields>
21994 
            <field>
21995 
              <name>DACC2DHR</name>
21996 
              <description>DAC channel2 12-bit left-aligned
21997 
              data</description>
21998 
              <bitOffset>4</bitOffset>
21999 
              <bitWidth>12</bitWidth>
22000 
            </field>
22001 
          </fields>
22002 
        </register>
22003 
        <register>
22004 
          <name>DHR8R2</name>
22005 
          <displayName>DHR8R2</displayName>
22006 
          <description>DAC channel2 8-bit right-aligned data
22007 
          holding register (DAC_DHR8R2)</description>
22008 
          <addressOffset>0x1C</addressOffset>
22009 
          <size>0x20</size>
22010 
          <access>read-write</access>
22011 
          <resetValue>0x00000000</resetValue>
22012 
          <fields>
22013 
            <field>
22014 
              <name>DACC2DHR</name>
22015 
              <description>DAC channel2 8-bit right-aligned
22016 
              data</description>
22017 
              <bitOffset>0</bitOffset>
22018 
              <bitWidth>8</bitWidth>
22019 
            </field>
22020 
          </fields>
22021 
        </register>
22022 
        <register>
22023 
          <name>DHR12RD</name>
22024 
          <displayName>DHR12RD</displayName>
22025 
          <description>Dual DAC 12-bit right-aligned data holding
22026 
          register (DAC_DHR12RD), Bits 31:28 Reserved, Bits 15:12
22027 
          Reserved</description>
22028 
          <addressOffset>0x20</addressOffset>
22029 
          <size>0x20</size>
22030 
          <access>read-write</access>
22031 
          <resetValue>0x00000000</resetValue>
22032 
          <fields>
22033 
            <field>
22034 
              <name>DACC1DHR</name>
22035 
              <description>DAC channel1 12-bit right-aligned
22036 
              data</description>
22037 
              <bitOffset>0</bitOffset>
22038 
              <bitWidth>12</bitWidth>
22039 
            </field>
22040 
            <field>
22041 
              <name>DACC2DHR</name>
22042 
              <description>DAC channel2 12-bit right-aligned
22043 
              data</description>
22044 
              <bitOffset>16</bitOffset>
22045 
              <bitWidth>12</bitWidth>
22046 
            </field>
22047 
          </fields>
22048 
        </register>
22049 
        <register>
22050 
          <name>DHR12LD</name>
22051 
          <displayName>DHR12LD</displayName>
22052 
          <description>DUAL DAC 12-bit left aligned data holding
22053 
          register (DAC_DHR12LD), Bits 19:16 Reserved, Bits 3:0
22054 
          Reserved</description>
22055 
          <addressOffset>0x24</addressOffset>
22056 
          <size>0x20</size>
22057 
          <access>read-write</access>
22058 
          <resetValue>0x00000000</resetValue>
22059 
          <fields>
22060 
            <field>
22061 
              <name>DACC1DHR</name>
22062 
              <description>DAC channel1 12-bit left-aligned
22063 
              data</description>
22064 
              <bitOffset>4</bitOffset>
22065 
              <bitWidth>12</bitWidth>
22066 
            </field>
22067 
            <field>
22068 
              <name>DACC2DHR</name>
22069 
              <description>DAC channel2 12-bit right-aligned
22070 
              data</description>
22071 
              <bitOffset>20</bitOffset>
22072 
              <bitWidth>12</bitWidth>
22073 
            </field>
22074 
          </fields>
22075 
        </register>
22076 
        <register>
22077 
          <name>DHR8RD</name>
22078 
          <displayName>DHR8RD</displayName>
22079 
          <description>DUAL DAC 8-bit right aligned data holding
22080 
          register (DAC_DHR8RD), Bits 31:16 Reserved</description>
22081 
          <addressOffset>0x28</addressOffset>
22082 
          <size>0x20</size>
22083 
          <access>read-write</access>
22084 
          <resetValue>0x00000000</resetValue>
22085 
          <fields>
22086 
            <field>
22087 
              <name>DACC1DHR</name>
22088 
              <description>DAC channel1 8-bit right-aligned
22089 
              data</description>
22090 
              <bitOffset>0</bitOffset>
22091 
              <bitWidth>8</bitWidth>
22092 
            </field>
22093 
            <field>
22094 
              <name>DACC2DHR</name>
22095 
              <description>DAC channel2 8-bit right-aligned
22096 
              data</description>
22097 
              <bitOffset>8</bitOffset>
22098 
              <bitWidth>8</bitWidth>
22099 
            </field>
22100 
          </fields>
22101 
        </register>
22102 
        <register>
22103 
          <name>DOR1</name>
22104 
          <displayName>DOR1</displayName>
22105 
          <description>DAC channel1 data output register
22106 
          (DAC_DOR1)</description>
22107 
          <addressOffset>0x2C</addressOffset>
22108 
          <size>0x20</size>
22109 
          <access>read-only</access>
22110 
          <resetValue>0x00000000</resetValue>
22111 
          <fields>
22112 
            <field>
22113 
              <name>DACC1DOR</name>
22114 
              <description>DAC channel1 data output</description>
22115 
              <bitOffset>0</bitOffset>
22116 
              <bitWidth>12</bitWidth>
22117 
            </field>
22118 
          </fields>
22119 
        </register>
22120 
        <register>
22121 
          <name>DOR2</name>
22122 
          <displayName>DOR2</displayName>
22123 
          <description>DAC channel2 data output register
22124 
          (DAC_DOR2)</description>
22125 
          <addressOffset>0x30</addressOffset>
22126 
          <size>0x20</size>
22127 
          <access>read-only</access>
22128 
          <resetValue>0x00000000</resetValue>
22129 
          <fields>
22130 
            <field>
22131 
              <name>DACC2DOR</name>
22132 
              <description>DAC channel2 data output</description>
22133 
              <bitOffset>0</bitOffset>
22134 
              <bitWidth>12</bitWidth>
22135 
            </field>
22136 
          </fields>
22137 
        </register>
22138 
      </registers>
22139 
    </peripheral>
22140 
    <peripheral>
22141 
      <name>DBG</name>
22142 
      <description>Debug support</description>
22143 
      <groupName>DBG</groupName>
22144 
      <baseAddress>0xE0042000</baseAddress>
22145 
      <addressBlock>
22146 
        <offset>0x0</offset>
22147 
        <size>0x400</size>
22148 
        <usage>registers</usage>
22149 
      </addressBlock>
22150 
      <registers>
22151 
        <register>
22152 
          <name>IDCODE</name>
22153 
          <displayName>IDCODE</displayName>
22154 
          <description>DBGMCU_IDCODE</description>
22155 
          <addressOffset>0x0</addressOffset>
22156 
          <size>0x20</size>
22157 
          <access>read-only</access>
22158 
          <resetValue>0x0</resetValue>
22159 
          <fields>
22160 
            <field>
22161 
              <name>DEV_ID</name>
22162 
              <description>DEV_ID</description>
22163 
              <bitOffset>0</bitOffset>
22164 
              <bitWidth>12</bitWidth>
22165 
            </field>
22166 
            <field>
22167 
              <name>REV_ID</name>
22168 
              <description>REV_ID</description>
22169 
              <bitOffset>16</bitOffset>
22170 
              <bitWidth>16</bitWidth>
22171 
            </field>
22172 
          </fields>
22173 
        </register>
22174 
        <register>
22175 
          <name>CR</name>
22176 
          <displayName>CR</displayName>
22177 
          <description>DBGMCU_CR</description>
22178 
          <addressOffset>0x4</addressOffset>
22179 
          <size>0x20</size>
22180 
          <access>read-write</access>
22181 
          <resetValue>0x0</resetValue>
22182 
          <fields>
22183 
            <field>
22184 
              <name>DBG_SLEEP</name>
22185 
              <description>DBG_SLEEP</description>
22186 
              <bitOffset>0</bitOffset>
22187 
              <bitWidth>1</bitWidth>
22188 
            </field>
22189 
            <field>
22190 
              <name>DBG_STOP</name>
22191 
              <description>DBG_STOP</description>
22192 
              <bitOffset>1</bitOffset>
22193 
              <bitWidth>1</bitWidth>
22194 
            </field>
22195 
            <field>
22196 
              <name>DBG_STANDBY</name>
22197 
              <description>DBG_STANDBY</description>
22198 
              <bitOffset>2</bitOffset>
22199 
              <bitWidth>1</bitWidth>
22200 
            </field>
22201 
            <field>
22202 
              <name>TRACE_IOEN</name>
22203 
              <description>TRACE_IOEN</description>
22204 
              <bitOffset>5</bitOffset>
22205 
              <bitWidth>1</bitWidth>
22206 
            </field>
22207 
            <field>
22208 
              <name>TRACE_MODE</name>
22209 
              <description>TRACE_MODE</description>
22210 
              <bitOffset>6</bitOffset>
22211 
              <bitWidth>2</bitWidth>
22212 
            </field>
22213 
            <field>
22214 
              <name>DBG_IWDG_STOP</name>
22215 
              <description>DBG_IWDG_STOP</description>
22216 
              <bitOffset>8</bitOffset>
22217 
              <bitWidth>1</bitWidth>
22218 
            </field>
22219 
            <field>
22220 
              <name>DBG_WWDG_STOP</name>
22221 
              <description>DBG_WWDG_STOP</description>
22222 
              <bitOffset>9</bitOffset>
22223 
              <bitWidth>1</bitWidth>
22224 
            </field>
22225 
            <field>
22226 
              <name>DBG_TIM1_STOP</name>
22227 
              <description>DBG_TIM1_STOP</description>
22228 
              <bitOffset>10</bitOffset>
22229 
              <bitWidth>1</bitWidth>
22230 
            </field>
22231 
            <field>
22232 
              <name>DBG_TIM2_STOP</name>
22233 
              <description>DBG_TIM2_STOP</description>
22234 
              <bitOffset>11</bitOffset>
22235 
              <bitWidth>1</bitWidth>
22236 
            </field>
22237 
            <field>
22238 
              <name>DBG_TIM3_STOP</name>
22239 
              <description>DBG_TIM3_STOP</description>
22240 
              <bitOffset>12</bitOffset>
22241 
              <bitWidth>1</bitWidth>
22242 
            </field>
22243 
            <field>
22244 
              <name>DBG_TIM4_STOP</name>
22245 
              <description>DBG_TIM4_STOP</description>
22246 
              <bitOffset>13</bitOffset>
22247 
              <bitWidth>1</bitWidth>
22248 
            </field>
22249 
            <field>
22250 
              <name>DBG_CAN1_STOP</name>
22251 
              <description>DBG_CAN1_STOP</description>
22252 
              <bitOffset>14</bitOffset>
22253 
              <bitWidth>1</bitWidth>
22254 
            </field>
22255 
            <field>
22256 
              <name>DBG_I2C1_SMBUS_TIMEOUT</name>
22257 
              <description>DBG_I2C1_SMBUS_TIMEOUT</description>
22258 
              <bitOffset>15</bitOffset>
22259 
              <bitWidth>1</bitWidth>
22260 
            </field>
22261 
            <field>
22262 
              <name>DBG_I2C2_SMBUS_TIMEOUT</name>
22263 
              <description>DBG_I2C2_SMBUS_TIMEOUT</description>
22264 
              <bitOffset>16</bitOffset>
22265 
              <bitWidth>1</bitWidth>
22266 
            </field>
22267 
            <field>
22268 
              <name>DBG_TIM8_STOP</name>
22269 
              <description>DBG_TIM8_STOP</description>
22270 
              <bitOffset>17</bitOffset>
22271 
              <bitWidth>1</bitWidth>
22272 
            </field>
22273 
            <field>
22274 
              <name>DBG_TIM5_STOP</name>
22275 
              <description>DBG_TIM5_STOP</description>
22276 
              <bitOffset>18</bitOffset>
22277 
              <bitWidth>1</bitWidth>
22278 
            </field>
22279 
            <field>
22280 
              <name>DBG_TIM6_STOP</name>
22281 
              <description>DBG_TIM6_STOP</description>
22282 
              <bitOffset>19</bitOffset>
22283 
              <bitWidth>1</bitWidth>
22284 
            </field>
22285 
            <field>
22286 
              <name>DBG_TIM7_STOP</name>
22287 
              <description>DBG_TIM7_STOP</description>
22288 
              <bitOffset>20</bitOffset>
22289 
              <bitWidth>1</bitWidth>
22290 
            </field>
22291 
            <field>
22292 
              <name>DBG_CAN2_STOP</name>
22293 
              <description>DBG_CAN2_STOP</description>
22294 
              <bitOffset>21</bitOffset>
22295 
              <bitWidth>1</bitWidth>
22296 
            </field>
22297 
          </fields>
22298 
        </register>
22299 
      </registers>
22300 
    </peripheral>
22301 
    <peripheral>
22302 
      <name>UART4</name>
22303 
      <description>Universal asynchronous receiver
22304 
      transmitter</description>
22305 
      <groupName>USART</groupName>
22306 
      <baseAddress>0x40004C00</baseAddress>
22307 
      <addressBlock>
22308 
        <offset>0x0</offset>
22309 
        <size>0x400</size>
22310 
        <usage>registers</usage>
22311 
      </addressBlock>
22312 
      <interrupt>
22313 
        <name>UART4</name>
22314 
        <description>UART4 global interrupt</description>
22315 
        <value>52</value>
22316 
      </interrupt>
22317 
      <registers>
22318 
        <register>
22319 
          <name>SR</name>
22320 
          <displayName>SR</displayName>
22321 
          <description>UART4_SR</description>
22322 
          <addressOffset>0x0</addressOffset>
22323 
          <size>0x20</size>
22324 
          <resetValue>0x0</resetValue>
22325 
          <fields>
22326 
            <field>
22327 
              <name>PE</name>
22328 
              <description>Parity error</description>
22329 
              <bitOffset>0</bitOffset>
22330 
              <bitWidth>1</bitWidth>
22331 
              <access>read-only</access>
22332 
            </field>
22333 
            <field>
22334 
              <name>FE</name>
22335 
              <description>Framing error</description>
22336 
              <bitOffset>1</bitOffset>
22337 
              <bitWidth>1</bitWidth>
22338 
              <access>read-only</access>
22339 
            </field>
22340 
            <field>
22341 
              <name>NE</name>
22342 
              <description>Noise error flag</description>
22343 
              <bitOffset>2</bitOffset>
22344 
              <bitWidth>1</bitWidth>
22345 
              <access>read-only</access>
22346 
            </field>
22347 
            <field>
22348 
              <name>ORE</name>
22349 
              <description>Overrun error</description>
22350 
              <bitOffset>3</bitOffset>
22351 
              <bitWidth>1</bitWidth>
22352 
              <access>read-only</access>
22353 
            </field>
22354 
            <field>
22355 
              <name>IDLE</name>
22356 
              <description>IDLE line detected</description>
22357 
              <bitOffset>4</bitOffset>
22358 
              <bitWidth>1</bitWidth>
22359 
              <access>read-only</access>
22360 
            </field>
22361 
            <field>
22362 
              <name>RXNE</name>
22363 
              <description>Read data register not
22364 
              empty</description>
22365 
              <bitOffset>5</bitOffset>
22366 
              <bitWidth>1</bitWidth>
22367 
              <access>read-write</access>
22368 
            </field>
22369 
            <field>
22370 
              <name>TC</name>
22371 
              <description>Transmission complete</description>
22372 
              <bitOffset>6</bitOffset>
22373 
              <bitWidth>1</bitWidth>
22374 
              <access>read-write</access>
22375 
            </field>
22376 
            <field>
22377 
              <name>TXE</name>
22378 
              <description>Transmit data register
22379 
              empty</description>
22380 
              <bitOffset>7</bitOffset>
22381 
              <bitWidth>1</bitWidth>
22382 
              <access>read-only</access>
22383 
            </field>
22384 
            <field>
22385 
              <name>LBD</name>
22386 
              <description>LIN break detection flag</description>
22387 
              <bitOffset>8</bitOffset>
22388 
              <bitWidth>1</bitWidth>
22389 
              <access>read-write</access>
22390 
            </field>
22391 
          </fields>
22392 
        </register>
22393 
        <register>
22394 
          <name>DR</name>
22395 
          <displayName>DR</displayName>
22396 
          <description>UART4_DR</description>
22397 
          <addressOffset>0x4</addressOffset>
22398 
          <size>0x20</size>
22399 
          <access>read-write</access>
22400 
          <resetValue>0x0</resetValue>
22401 
          <fields>
22402 
            <field>
22403 
              <name>DR</name>
22404 
              <description>DR</description>
22405 
              <bitOffset>0</bitOffset>
22406 
              <bitWidth>9</bitWidth>
22407 
            </field>
22408 
          </fields>
22409 
        </register>
22410 
        <register>
22411 
          <name>BRR</name>
22412 
          <displayName>BRR</displayName>
22413 
          <description>UART4_BRR</description>
22414 
          <addressOffset>0x8</addressOffset>
22415 
          <size>0x20</size>
22416 
          <access>read-write</access>
22417 
          <resetValue>0x0</resetValue>
22418 
          <fields>
22419 
            <field>
22420 
              <name>DIV_Fraction</name>
22421 
              <description>DIV_Fraction</description>
22422 
              <bitOffset>0</bitOffset>
22423 
              <bitWidth>4</bitWidth>
22424 
            </field>
22425 
            <field>
22426 
              <name>DIV_Mantissa</name>
22427 
              <description>DIV_Mantissa</description>
22428 
              <bitOffset>4</bitOffset>
22429 
              <bitWidth>12</bitWidth>
22430 
            </field>
22431 
          </fields>
22432 
        </register>
22433 
        <register>
22434 
          <name>CR1</name>
22435 
          <displayName>CR1</displayName>
22436 
          <description>UART4_CR1</description>
22437 
          <addressOffset>0xC</addressOffset>
22438 
          <size>0x20</size>
22439 
          <access>read-write</access>
22440 
          <resetValue>0x0</resetValue>
22441 
          <fields>
22442 
            <field>
22443 
              <name>SBK</name>
22444 
              <description>Send break</description>
22445 
              <bitOffset>0</bitOffset>
22446 
              <bitWidth>1</bitWidth>
22447 
            </field>
22448 
            <field>
22449 
              <name>RWU</name>
22450 
              <description>Receiver wakeup</description>
22451 
              <bitOffset>1</bitOffset>
22452 
              <bitWidth>1</bitWidth>
22453 
            </field>
22454 
            <field>
22455 
              <name>RE</name>
22456 
              <description>Receiver enable</description>
22457 
              <bitOffset>2</bitOffset>
22458 
              <bitWidth>1</bitWidth>
22459 
            </field>
22460 
            <field>
22461 
              <name>TE</name>
22462 
              <description>Transmitter enable</description>
22463 
              <bitOffset>3</bitOffset>
22464 
              <bitWidth>1</bitWidth>
22465 
            </field>
22466 
            <field>
22467 
              <name>IDLEIE</name>
22468 
              <description>IDLE interrupt enable</description>
22469 
              <bitOffset>4</bitOffset>
22470 
              <bitWidth>1</bitWidth>
22471 
            </field>
22472 
            <field>
22473 
              <name>RXNEIE</name>
22474 
              <description>RXNE interrupt enable</description>
22475 
              <bitOffset>5</bitOffset>
22476 
              <bitWidth>1</bitWidth>
22477 
            </field>
22478 
            <field>
22479 
              <name>TCIE</name>
22480 
              <description>Transmission complete interrupt
22481 
              enable</description>
22482 
              <bitOffset>6</bitOffset>
22483 
              <bitWidth>1</bitWidth>
22484 
            </field>
22485 
            <field>
22486 
              <name>TXEIE</name>
22487 
              <description>TXE interrupt enable</description>
22488 
              <bitOffset>7</bitOffset>
22489 
              <bitWidth>1</bitWidth>
22490 
            </field>
22491 
            <field>
22492 
              <name>PEIE</name>
22493 
              <description>PE interrupt enable</description>
22494 
              <bitOffset>8</bitOffset>
22495 
              <bitWidth>1</bitWidth>
22496 
            </field>
22497 
            <field>
22498 
              <name>PS</name>
22499 
              <description>Parity selection</description>
22500 
              <bitOffset>9</bitOffset>
22501 
              <bitWidth>1</bitWidth>
22502 
            </field>
22503 
            <field>
22504 
              <name>PCE</name>
22505 
              <description>Parity control enable</description>
22506 
              <bitOffset>10</bitOffset>
22507 
              <bitWidth>1</bitWidth>
22508 
            </field>
22509 
            <field>
22510 
              <name>WAKE</name>
22511 
              <description>Wakeup method</description>
22512 
              <bitOffset>11</bitOffset>
22513 
              <bitWidth>1</bitWidth>
22514 
            </field>
22515 
            <field>
22516 
              <name>M</name>
22517 
              <description>Word length</description>
22518 
              <bitOffset>12</bitOffset>
22519 
              <bitWidth>1</bitWidth>
22520 
            </field>
22521 
            <field>
22522 
              <name>UE</name>
22523 
              <description>USART enable</description>
22524 
              <bitOffset>13</bitOffset>
22525 
              <bitWidth>1</bitWidth>
22526 
            </field>
22527 
          </fields>
22528 
        </register>
22529 
        <register>
22530 
          <name>CR2</name>
22531 
          <displayName>CR2</displayName>
22532 
          <description>UART4_CR2</description>
22533 
          <addressOffset>0x10</addressOffset>
22534 
          <size>0x20</size>
22535 
          <access>read-write</access>
22536 
          <resetValue>0x0</resetValue>
22537 
          <fields>
22538 
            <field>
22539 
              <name>ADD</name>
22540 
              <description>Address of the USART node</description>
22541 
              <bitOffset>0</bitOffset>
22542 
              <bitWidth>4</bitWidth>
22543 
            </field>
22544 
            <field>
22545 
              <name>LBDL</name>
22546 
              <description>lin break detection length</description>
22547 
              <bitOffset>5</bitOffset>
22548 
              <bitWidth>1</bitWidth>
22549 
            </field>
22550 
            <field>
22551 
              <name>LBDIE</name>
22552 
              <description>LIN break detection interrupt
22553 
              enable</description>
22554 
              <bitOffset>6</bitOffset>
22555 
              <bitWidth>1</bitWidth>
22556 
            </field>
22557 
            <field>
22558 
              <name>STOP</name>
22559 
              <description>STOP bits</description>
22560 
              <bitOffset>12</bitOffset>
22561 
              <bitWidth>2</bitWidth>
22562 
            </field>
22563 
            <field>
22564 
              <name>LINEN</name>
22565 
              <description>LIN mode enable</description>
22566 
              <bitOffset>14</bitOffset>
22567 
              <bitWidth>1</bitWidth>
22568 
            </field>
22569 
          </fields>
22570 
        </register>
22571 
        <register>
22572 
          <name>CR3</name>
22573 
          <displayName>CR3</displayName>
22574 
          <description>UART4_CR3</description>
22575 
          <addressOffset>0x14</addressOffset>
22576 
          <size>0x20</size>
22577 
          <access>read-write</access>
22578 
          <resetValue>0x0</resetValue>
22579 
          <fields>
22580 
            <field>
22581 
              <name>EIE</name>
22582 
              <description>Error interrupt enable</description>
22583 
              <bitOffset>0</bitOffset>
22584 
              <bitWidth>1</bitWidth>
22585 
            </field>
22586 
            <field>
22587 
              <name>IREN</name>
22588 
              <description>IrDA mode enable</description>
22589 
              <bitOffset>1</bitOffset>
22590 
              <bitWidth>1</bitWidth>
22591 
            </field>
22592 
            <field>
22593 
              <name>IRLP</name>
22594 
              <description>IrDA low-power</description>
22595 
              <bitOffset>2</bitOffset>
22596 
              <bitWidth>1</bitWidth>
22597 
            </field>
22598 
            <field>
22599 
              <name>HDSEL</name>
22600 
              <description>Half-duplex selection</description>
22601 
              <bitOffset>3</bitOffset>
22602 
              <bitWidth>1</bitWidth>
22603 
            </field>
22604 
            <field>
22605 
              <name>DMAR</name>
22606 
              <description>DMA enable receiver</description>
22607 
              <bitOffset>6</bitOffset>
22608 
              <bitWidth>1</bitWidth>
22609 
            </field>
22610 
            <field>
22611 
              <name>DMAT</name>
22612 
              <description>DMA enable transmitter</description>
22613 
              <bitOffset>7</bitOffset>
22614 
              <bitWidth>1</bitWidth>
22615 
            </field>
22616 
          </fields>
22617 
        </register>
22618 
      </registers>
22619 
    </peripheral>
22620 
    <peripheral>
22621 
      <name>UART5</name>
22622 
      <description>Universal asynchronous receiver
22623 
      transmitter</description>
22624 
      <groupName>USART</groupName>
22625 
      <baseAddress>0x40005000</baseAddress>
22626 
      <addressBlock>
22627 
        <offset>0x0</offset>
22628 
        <size>0x400</size>
22629 
        <usage>registers</usage>
22630 
      </addressBlock>
22631 
      <interrupt>
22632 
        <name>UART5</name>
22633 
        <description>UART5 global interrupt</description>
22634 
        <value>53</value>
22635 
      </interrupt>
22636 
      <registers>
22637 
        <register>
22638 
          <name>SR</name>
22639 
          <displayName>SR</displayName>
22640 
          <description>UART4_SR</description>
22641 
          <addressOffset>0x0</addressOffset>
22642 
          <size>0x20</size>
22643 
          <resetValue>0x0</resetValue>
22644 
          <fields>
22645 
            <field>
22646 
              <name>PE</name>
22647 
              <description>PE</description>
22648 
              <bitOffset>0</bitOffset>
22649 
              <bitWidth>1</bitWidth>
22650 
              <access>read-only</access>
22651 
            </field>
22652 
            <field>
22653 
              <name>FE</name>
22654 
              <description>FE</description>
22655 
              <bitOffset>1</bitOffset>
22656 
              <bitWidth>1</bitWidth>
22657 
              <access>read-only</access>
22658 
            </field>
22659 
            <field>
22660 
              <name>NE</name>
22661 
              <description>NE</description>
22662 
              <bitOffset>2</bitOffset>
22663 
              <bitWidth>1</bitWidth>
22664 
              <access>read-only</access>
22665 
            </field>
22666 
            <field>
22667 
              <name>ORE</name>
22668 
              <description>ORE</description>
22669 
              <bitOffset>3</bitOffset>
22670 
              <bitWidth>1</bitWidth>
22671 
              <access>read-only</access>
22672 
            </field>
22673 
            <field>
22674 
              <name>IDLE</name>
22675 
              <description>IDLE</description>
22676 
              <bitOffset>4</bitOffset>
22677 
              <bitWidth>1</bitWidth>
22678 
              <access>read-only</access>
22679 
            </field>
22680 
            <field>
22681 
              <name>RXNE</name>
22682 
              <description>RXNE</description>
22683 
              <bitOffset>5</bitOffset>
22684 
              <bitWidth>1</bitWidth>
22685 
              <access>read-write</access>
22686 
            </field>
22687 
            <field>
22688 
              <name>TC</name>
22689 
              <description>TC</description>
22690 
              <bitOffset>6</bitOffset>
22691 
              <bitWidth>1</bitWidth>
22692 
              <access>read-write</access>
22693 
            </field>
22694 
            <field>
22695 
              <name>TXE</name>
22696 
              <description>TXE</description>
22697 
              <bitOffset>7</bitOffset>
22698 
              <bitWidth>1</bitWidth>
22699 
              <access>read-only</access>
22700 
            </field>
22701 
            <field>
22702 
              <name>LBD</name>
22703 
              <description>LBD</description>
22704 
              <bitOffset>8</bitOffset>
22705 
              <bitWidth>1</bitWidth>
22706 
              <access>read-write</access>
22707 
            </field>
22708 
          </fields>
22709 
        </register>
22710 
        <register>
22711 
          <name>DR</name>
22712 
          <displayName>DR</displayName>
22713 
          <description>UART4_DR</description>
22714 
          <addressOffset>0x4</addressOffset>
22715 
          <size>0x20</size>
22716 
          <access>read-write</access>
22717 
          <resetValue>0x0</resetValue>
22718 
          <fields>
22719 
            <field>
22720 
              <name>DR</name>
22721 
              <description>DR</description>
22722 
              <bitOffset>0</bitOffset>
22723 
              <bitWidth>9</bitWidth>
22724 
            </field>
22725 
          </fields>
22726 
        </register>
22727 
        <register>
22728 
          <name>BRR</name>
22729 
          <displayName>BRR</displayName>
22730 
          <description>UART4_BRR</description>
22731 
          <addressOffset>0x8</addressOffset>
22732 
          <size>0x20</size>
22733 
          <access>read-write</access>
22734 
          <resetValue>0x0</resetValue>
22735 
          <fields>
22736 
            <field>
22737 
              <name>DIV_Fraction</name>
22738 
              <description>DIV_Fraction</description>
22739 
              <bitOffset>0</bitOffset>
22740 
              <bitWidth>4</bitWidth>
22741 
            </field>
22742 
            <field>
22743 
              <name>DIV_Mantissa</name>
22744 
              <description>DIV_Mantissa</description>
22745 
              <bitOffset>4</bitOffset>
22746 
              <bitWidth>12</bitWidth>
22747 
            </field>
22748 
          </fields>
22749 
        </register>
22750 
        <register>
22751 
          <name>CR1</name>
22752 
          <displayName>CR1</displayName>
22753 
          <description>UART4_CR1</description>
22754 
          <addressOffset>0xC</addressOffset>
22755 
          <size>0x20</size>
22756 
          <access>read-write</access>
22757 
          <resetValue>0x0</resetValue>
22758 
          <fields>
22759 
            <field>
22760 
              <name>SBK</name>
22761 
              <description>SBK</description>
22762 
              <bitOffset>0</bitOffset>
22763 
              <bitWidth>1</bitWidth>
22764 
            </field>
22765 
            <field>
22766 
              <name>RWU</name>
22767 
              <description>RWU</description>
22768 
              <bitOffset>1</bitOffset>
22769 
              <bitWidth>1</bitWidth>
22770 
            </field>
22771 
            <field>
22772 
              <name>RE</name>
22773 
              <description>RE</description>
22774 
              <bitOffset>2</bitOffset>
22775 
              <bitWidth>1</bitWidth>
22776 
            </field>
22777 
            <field>
22778 
              <name>TE</name>
22779 
              <description>TE</description>
22780 
              <bitOffset>3</bitOffset>
22781 
              <bitWidth>1</bitWidth>
22782 
            </field>
22783 
            <field>
22784 
              <name>IDLEIE</name>
22785 
              <description>IDLEIE</description>
22786 
              <bitOffset>4</bitOffset>
22787 
              <bitWidth>1</bitWidth>
22788 
            </field>
22789 
            <field>
22790 
              <name>RXNEIE</name>
22791 
              <description>RXNEIE</description>
22792 
              <bitOffset>5</bitOffset>
22793 
              <bitWidth>1</bitWidth>
22794 
            </field>
22795 
            <field>
22796 
              <name>TCIE</name>
22797 
              <description>TCIE</description>
22798 
              <bitOffset>6</bitOffset>
22799 
              <bitWidth>1</bitWidth>
22800 
            </field>
22801 
            <field>
22802 
              <name>TXEIE</name>
22803 
              <description>TXEIE</description>
22804 
              <bitOffset>7</bitOffset>
22805 
              <bitWidth>1</bitWidth>
22806 
            </field>
22807 
            <field>
22808 
              <name>PEIE</name>
22809 
              <description>PEIE</description>
22810 
              <bitOffset>8</bitOffset>
22811 
              <bitWidth>1</bitWidth>
22812 
            </field>
22813 
            <field>
22814 
              <name>PS</name>
22815 
              <description>PS</description>
22816 
              <bitOffset>9</bitOffset>
22817 
              <bitWidth>1</bitWidth>
22818 
            </field>
22819 
            <field>
22820 
              <name>PCE</name>
22821 
              <description>PCE</description>
22822 
              <bitOffset>10</bitOffset>
22823 
              <bitWidth>1</bitWidth>
22824 
            </field>
22825 
            <field>
22826 
              <name>WAKE</name>
22827 
              <description>WAKE</description>
22828 
              <bitOffset>11</bitOffset>
22829 
              <bitWidth>1</bitWidth>
22830 
            </field>
22831 
            <field>
22832 
              <name>M</name>
22833 
              <description>M</description>
22834 
              <bitOffset>12</bitOffset>
22835 
              <bitWidth>1</bitWidth>
22836 
            </field>
22837 
            <field>
22838 
              <name>UE</name>
22839 
              <description>UE</description>
22840 
              <bitOffset>13</bitOffset>
22841 
              <bitWidth>1</bitWidth>
22842 
            </field>
22843 
          </fields>
22844 
        </register>
22845 
        <register>
22846 
          <name>CR2</name>
22847 
          <displayName>CR2</displayName>
22848 
          <description>UART4_CR2</description>
22849 
          <addressOffset>0x10</addressOffset>
22850 
          <size>0x20</size>
22851 
          <access>read-write</access>
22852 
          <resetValue>0x0</resetValue>
22853 
          <fields>
22854 
            <field>
22855 
              <name>ADD</name>
22856 
              <description>ADD</description>
22857 
              <bitOffset>0</bitOffset>
22858 
              <bitWidth>4</bitWidth>
22859 
            </field>
22860 
            <field>
22861 
              <name>LBDL</name>
22862 
              <description>LBDL</description>
22863 
              <bitOffset>5</bitOffset>
22864 
              <bitWidth>1</bitWidth>
22865 
            </field>
22866 
            <field>
22867 
              <name>LBDIE</name>
22868 
              <description>LBDIE</description>
22869 
              <bitOffset>6</bitOffset>
22870 
              <bitWidth>1</bitWidth>
22871 
            </field>
22872 
            <field>
22873 
              <name>STOP</name>
22874 
              <description>STOP</description>
22875 
              <bitOffset>12</bitOffset>
22876 
              <bitWidth>2</bitWidth>
22877 
            </field>
22878 
            <field>
22879 
              <name>LINEN</name>
22880 
              <description>LINEN</description>
22881 
              <bitOffset>14</bitOffset>
22882 
              <bitWidth>1</bitWidth>
22883 
            </field>
22884 
          </fields>
22885 
        </register>
22886 
        <register>
22887 
          <name>CR3</name>
22888 
          <displayName>CR3</displayName>
22889 
          <description>UART4_CR3</description>
22890 
          <addressOffset>0x14</addressOffset>
22891 
          <size>0x20</size>
22892 
          <access>read-write</access>
22893 
          <resetValue>0x0</resetValue>
22894 
          <fields>
22895 
            <field>
22896 
              <name>EIE</name>
22897 
              <description>Error interrupt enable</description>
22898 
              <bitOffset>0</bitOffset>
22899 
              <bitWidth>1</bitWidth>
22900 
            </field>
22901 
            <field>
22902 
              <name>IREN</name>
22903 
              <description>IrDA mode enable</description>
22904 
              <bitOffset>1</bitOffset>
22905 
              <bitWidth>1</bitWidth>
22906 
            </field>
22907 
            <field>
22908 
              <name>IRLP</name>
22909 
              <description>IrDA low-power</description>
22910 
              <bitOffset>2</bitOffset>
22911 
              <bitWidth>1</bitWidth>
22912 
            </field>
22913 
            <field>
22914 
              <name>HDSEL</name>
22915 
              <description>Half-duplex selection</description>
22916 
              <bitOffset>3</bitOffset>
22917 
              <bitWidth>1</bitWidth>
22918 
            </field>
22919 
            <field>
22920 
              <name>DMAT</name>
22921 
              <description>DMA enable transmitter</description>
22922 
              <bitOffset>7</bitOffset>
22923 
              <bitWidth>1</bitWidth>
22924 
            </field>
22925 
          </fields>
22926 
        </register>
22927 
      </registers>
22928 
    </peripheral>
22929 
    <peripheral>
22930 
      <name>CRC</name>
22931 
      <description>CRC calculation unit</description>
22932 
      <groupName>CRC</groupName>
22933 
      <baseAddress>0x40023000</baseAddress>
22934 
      <addressBlock>
22935 
        <offset>0x0</offset>
22936 
        <size>0x400</size>
22937 
        <usage>registers</usage>
22938 
      </addressBlock>
22939 
      <registers>
22940 
        <register>
22941 
          <name>DR</name>
22942 
          <displayName>DR</displayName>
22943 
          <description>Data register</description>
22944 
          <addressOffset>0x0</addressOffset>
22945 
          <size>0x20</size>
22946 
          <access>read-write</access>
22947 
          <resetValue>0xFFFFFFFF</resetValue>
22948 
          <fields>
22949 
            <field>
22950 
              <name>DR</name>
22951 
              <description>Data Register</description>
22952 
              <bitOffset>0</bitOffset>
22953 
              <bitWidth>32</bitWidth>
22954 
            </field>
22955 
          </fields>
22956 
        </register>
22957 
        <register>
22958 
          <name>IDR</name>
22959 
          <displayName>IDR</displayName>
22960 
          <description>Independent Data register</description>
22961 
          <addressOffset>0x4</addressOffset>
22962 
          <size>0x20</size>
22963 
          <access>read-write</access>
22964 
          <resetValue>0x00000000</resetValue>
22965 
          <fields>
22966 
            <field>
22967 
              <name>IDR</name>
22968 
              <description>Independent Data register</description>
22969 
              <bitOffset>0</bitOffset>
22970 
              <bitWidth>8</bitWidth>
22971 
            </field>
22972 
          </fields>
22973 
        </register>
22974 
        <register>
22975 
          <name>CR</name>
22976 
          <displayName>CR</displayName>
22977 
          <description>Control register</description>
22978 
          <addressOffset>0x8</addressOffset>
22979 
          <size>0x20</size>
22980 
          <access>write-only</access>
22981 
          <resetValue>0x00000000</resetValue>
22982 
          <fields>
22983 
            <field>
22984 
              <name>RESET</name>
22985 
              <description>Reset bit</description>
22986 
              <bitOffset>0</bitOffset>
22987 
              <bitWidth>1</bitWidth>
22988 
            </field>
22989 
          </fields>
22990 
        </register>
22991 
      </registers>
22992 
    </peripheral>
22993 
    <peripheral>
22994 
      <name>FLASH</name>
22995 
      <description>FLASH</description>
22996 
      <groupName>FLASH</groupName>
22997 
      <baseAddress>0x40022000</baseAddress>
22998 
      <addressBlock>
22999 
        <offset>0x0</offset>
23000 
        <size>0x400</size>
23001 
        <usage>registers</usage>
23002 
      </addressBlock>
23003 
      <interrupt>
23004 
        <name>FLASH</name>
23005 
        <description>Flash global interrupt</description>
23006 
        <value>4</value>
23007 
      </interrupt>
23008 
      <registers>
23009 
        <register>
23010 
          <name>ACR</name>
23011 
          <displayName>ACR</displayName>
23012 
          <description>Flash access control register</description>
23013 
          <addressOffset>0x0</addressOffset>
23014 
          <size>0x20</size>
23015 
          <resetValue>0x00000030</resetValue>
23016 
          <fields>
23017 
            <field>
23018 
              <name>LATENCY</name>
23019 
              <description>Latency</description>
23020 
              <bitOffset>0</bitOffset>
23021 
              <bitWidth>3</bitWidth>
23022 
              <access>read-write</access>
23023 
            </field>
23024 
            <field>
23025 
              <name>HLFCYA</name>
23026 
              <description>Flash half cycle access
23027 
              enable</description>
23028 
              <bitOffset>3</bitOffset>
23029 
              <bitWidth>1</bitWidth>
23030 
              <access>read-write</access>
23031 
            </field>
23032 
            <field>
23033 
              <name>PRFTBE</name>
23034 
              <description>Prefetch buffer enable</description>
23035 
              <bitOffset>4</bitOffset>
23036 
              <bitWidth>1</bitWidth>
23037 
              <access>read-write</access>
23038 
            </field>
23039 
            <field>
23040 
              <name>PRFTBS</name>
23041 
              <description>Prefetch buffer status</description>
23042 
              <bitOffset>5</bitOffset>
23043 
              <bitWidth>1</bitWidth>
23044 
              <access>read-only</access>
23045 
            </field>
23046 
          </fields>
23047 
        </register>
23048 
        <register>
23049 
          <name>KEYR</name>
23050 
          <displayName>KEYR</displayName>
23051 
          <description>Flash key register</description>
23052 
          <addressOffset>0x4</addressOffset>
23053 
          <size>0x20</size>
23054 
          <access>write-only</access>
23055 
          <resetValue>0x00000000</resetValue>
23056 
          <fields>
23057 
            <field>
23058 
              <name>KEY</name>
23059 
              <description>FPEC key</description>
23060 
              <bitOffset>0</bitOffset>
23061 
              <bitWidth>32</bitWidth>
23062 
            </field>
23063 
          </fields>
23064 
        </register>
23065 
        <register>
23066 
          <name>OPTKEYR</name>
23067 
          <displayName>OPTKEYR</displayName>
23068 
          <description>Flash option key register</description>
23069 
          <addressOffset>0x8</addressOffset>
23070 
          <size>0x20</size>
23071 
          <access>write-only</access>
23072 
          <resetValue>0x00000000</resetValue>
23073 
          <fields>
23074 
            <field>
23075 
              <name>OPTKEY</name>
23076 
              <description>Option byte key</description>
23077 
              <bitOffset>0</bitOffset>
23078 
              <bitWidth>32</bitWidth>
23079 
            </field>
23080 
          </fields>
23081 
        </register>
23082 
        <register>
23083 
          <name>SR</name>
23084 
          <displayName>SR</displayName>
23085 
          <description>Status register</description>
23086 
          <addressOffset>0xC</addressOffset>
23087 
          <size>0x20</size>
23088 
          <resetValue>0x00000000</resetValue>
23089 
          <fields>
23090 
            <field>
23091 
              <name>EOP</name>
23092 
              <description>End of operation</description>
23093 
              <bitOffset>5</bitOffset>
23094 
              <bitWidth>1</bitWidth>
23095 
              <access>read-write</access>
23096 
            </field>
23097 
            <field>
23098 
              <name>WRPRTERR</name>
23099 
              <description>Write protection error</description>
23100 
              <bitOffset>4</bitOffset>
23101 
              <bitWidth>1</bitWidth>
23102 
              <access>read-write</access>
23103 
            </field>
23104 
            <field>
23105 
              <name>PGERR</name>
23106 
              <description>Programming error</description>
23107 
              <bitOffset>2</bitOffset>
23108 
              <bitWidth>1</bitWidth>
23109 
              <access>read-write</access>
23110 
            </field>
23111 
            <field>
23112 
              <name>BSY</name>
23113 
              <description>Busy</description>
23114 
              <bitOffset>0</bitOffset>
23115 
              <bitWidth>1</bitWidth>
23116 
              <access>read-only</access>
23117 
            </field>
23118 
          </fields>
23119 
        </register>
23120 
        <register>
23121 
          <name>CR</name>
23122 
          <displayName>CR</displayName>
23123 
          <description>Control register</description>
23124 
          <addressOffset>0x10</addressOffset>
23125 
          <size>0x20</size>
23126 
          <access>read-write</access>
23127 
          <resetValue>0x00000080</resetValue>
23128 
          <fields>
23129 
            <field>
23130 
              <name>PG</name>
23131 
              <description>Programming</description>
23132 
              <bitOffset>0</bitOffset>
23133 
              <bitWidth>1</bitWidth>
23134 
            </field>
23135 
            <field>
23136 
              <name>PER</name>
23137 
              <description>Page Erase</description>
23138 
              <bitOffset>1</bitOffset>
23139 
              <bitWidth>1</bitWidth>
23140 
            </field>
23141 
            <field>
23142 
              <name>MER</name>
23143 
              <description>Mass Erase</description>
23144 
              <bitOffset>2</bitOffset>
23145 
              <bitWidth>1</bitWidth>
23146 
            </field>
23147 
            <field>
23148 
              <name>OPTPG</name>
23149 
              <description>Option byte programming</description>
23150 
              <bitOffset>4</bitOffset>
23151 
              <bitWidth>1</bitWidth>
23152 
            </field>
23153 
            <field>
23154 
              <name>OPTER</name>
23155 
              <description>Option byte erase</description>
23156 
              <bitOffset>5</bitOffset>
23157 
              <bitWidth>1</bitWidth>
23158 
            </field>
23159 
            <field>
23160 
              <name>STRT</name>
23161 
              <description>Start</description>
23162 
              <bitOffset>6</bitOffset>
23163 
              <bitWidth>1</bitWidth>
23164 
            </field>
23165 
            <field>
23166 
              <name>LOCK</name>
23167 
              <description>Lock</description>
23168 
              <bitOffset>7</bitOffset>
23169 
              <bitWidth>1</bitWidth>
23170 
            </field>
23171 
            <field>
23172 
              <name>OPTWRE</name>
23173 
              <description>Option bytes write enable</description>
23174 
              <bitOffset>9</bitOffset>
23175 
              <bitWidth>1</bitWidth>
23176 
            </field>
23177 
            <field>
23178 
              <name>ERRIE</name>
23179 
              <description>Error interrupt enable</description>
23180 
              <bitOffset>10</bitOffset>
23181 
              <bitWidth>1</bitWidth>
23182 
            </field>
23183 
            <field>
23184 
              <name>EOPIE</name>
23185 
              <description>End of operation interrupt
23186 
              enable</description>
23187 
              <bitOffset>12</bitOffset>
23188 
              <bitWidth>1</bitWidth>
23189 
            </field>
23190 
          </fields>
23191 
        </register>
23192 
        <register>
23193 
          <name>AR</name>
23194 
          <displayName>AR</displayName>
23195 
          <description>Flash address register</description>
23196 
          <addressOffset>0x14</addressOffset>
23197 
          <size>0x20</size>
23198 
          <access>write-only</access>
23199 
          <resetValue>0x00000000</resetValue>
23200 
          <fields>
23201 
            <field>
23202 
              <name>FAR</name>
23203 
              <description>Flash Address</description>
23204 
              <bitOffset>0</bitOffset>
23205 
              <bitWidth>32</bitWidth>
23206 
            </field>
23207 
          </fields>
23208 
        </register>
23209 
        <register>
23210 
          <name>OBR</name>
23211 
          <displayName>OBR</displayName>
23212 
          <description>Option byte register</description>
23213 
          <addressOffset>0x1C</addressOffset>
23214 
          <size>0x20</size>
23215 
          <access>read-only</access>
23216 
          <resetValue>0x03FFFFFC</resetValue>
23217 
          <fields>
23218 
            <field>
23219 
              <name>OPTERR</name>
23220 
              <description>Option byte error</description>
23221 
              <bitOffset>0</bitOffset>
23222 
              <bitWidth>1</bitWidth>
23223 
            </field>
23224 
            <field>
23225 
              <name>RDPRT</name>
23226 
              <description>Read protection</description>
23227 
              <bitOffset>1</bitOffset>
23228 
              <bitWidth>1</bitWidth>
23229 
            </field>
23230 
            <field>
23231 
              <name>WDG_SW</name>
23232 
              <description>WDG_SW</description>
23233 
              <bitOffset>2</bitOffset>
23234 
              <bitWidth>1</bitWidth>
23235 
            </field>
23236 
            <field>
23237 
              <name>nRST_STOP</name>
23238 
              <description>nRST_STOP</description>
23239 
              <bitOffset>3</bitOffset>
23240 
              <bitWidth>1</bitWidth>
23241 
            </field>
23242 
            <field>
23243 
              <name>nRST_STDBY</name>
23244 
              <description>nRST_STDBY</description>
23245 
              <bitOffset>4</bitOffset>
23246 
              <bitWidth>1</bitWidth>
23247 
            </field>
23248 
            <field>
23249 
              <name>Data0</name>
23250 
              <description>Data0</description>
23251 
              <bitOffset>10</bitOffset>
23252 
              <bitWidth>8</bitWidth>
23253 
            </field>
23254 
            <field>
23255 
              <name>Data1</name>
23256 
              <description>Data1</description>
23257 
              <bitOffset>18</bitOffset>
23258 
              <bitWidth>8</bitWidth>
23259 
            </field>
23260 
          </fields>
23261 
        </register>
23262 
        <register>
23263 
          <name>WRPR</name>
23264 
          <displayName>WRPR</displayName>
23265 
          <description>Write protection register</description>
23266 
          <addressOffset>0x20</addressOffset>
23267 
          <size>0x20</size>
23268 
          <access>read-only</access>
23269 
          <resetValue>0xFFFFFFFF</resetValue>
23270 
          <fields>
23271 
            <field>
23272 
              <name>WRP</name>
23273 
              <description>Write protect</description>
23274 
              <bitOffset>0</bitOffset>
23275 
              <bitWidth>32</bitWidth>
23276 
            </field>
23277 
          </fields>
23278 
        </register>
23279 
      </registers>
23280 
    </peripheral>
23281 
    <peripheral>
23282 
      <name>NVIC</name>
23283 
      <description>Nested Vectored Interrupt
23284 
      Controller</description>
23285 
      <groupName>NVIC</groupName>
23286 
      <baseAddress>0xE000E000</baseAddress>
23287 
      <addressBlock>
23288 
        <offset>0x0</offset>
23289 
        <size>0x1001</size>
23290 
        <usage>registers</usage>
23291 
      </addressBlock>
23292 
      <registers>
23293 
        <register>
23294 
          <name>ICTR</name>
23295 
          <displayName>ICTR</displayName>
23296 
          <description>Interrupt Controller Type
23297 
          Register</description>
23298 
          <addressOffset>0x4</addressOffset>
23299 
          <size>0x20</size>
23300 
          <access>read-only</access>
23301 
          <resetValue>0x00000000</resetValue>
23302 
          <fields>
23303 
            <field>
23304 
              <name>INTLINESNUM</name>
23305 
              <description>Total number of interrupt lines in
23306 
              groups</description>
23307 
              <bitOffset>0</bitOffset>
23308 
              <bitWidth>4</bitWidth>
23309 
            </field>
23310 
          </fields>
23311 
        </register>
23312 
        <register>
23313 
          <name>STIR</name>
23314 
          <displayName>STIR</displayName>
23315 
          <description>Software Triggered Interrupt
23316 
          Register</description>
23317 
          <addressOffset>0xF00</addressOffset>
23318 
          <size>0x20</size>
23319 
          <access>write-only</access>
23320 
          <resetValue>0x00000000</resetValue>
23321 
          <fields>
23322 
            <field>
23323 
              <name>INTID</name>
23324 
              <description>interrupt to be triggered</description>
23325 
              <bitOffset>0</bitOffset>
23326 
              <bitWidth>9</bitWidth>
23327 
            </field>
23328 
          </fields>
23329 
        </register>
23330 
        <register>
23331 
          <name>ISER0</name>
23332 
          <displayName>ISER0</displayName>
23333 
          <description>Interrupt Set-Enable Register</description>
23334 
          <addressOffset>0x100</addressOffset>
23335 
          <size>0x20</size>
23336 
          <access>read-write</access>
23337 
          <resetValue>0x00000000</resetValue>
23338 
          <fields>
23339 
            <field>
23340 
              <name>SETENA</name>
23341 
              <description>SETENA</description>
23342 
              <bitOffset>0</bitOffset>
23343 
              <bitWidth>32</bitWidth>
23344 
            </field>
23345 
          </fields>
23346 
        </register>
23347 
        <register>
23348 
          <name>ISER1</name>
23349 
          <displayName>ISER1</displayName>
23350 
          <description>Interrupt Set-Enable Register</description>
23351 
          <addressOffset>0x104</addressOffset>
23352 
          <size>0x20</size>
23353 
          <access>read-write</access>
23354 
          <resetValue>0x00000000</resetValue>
23355 
          <fields>
23356 
            <field>
23357 
              <name>SETENA</name>
23358 
              <description>SETENA</description>
23359 
              <bitOffset>0</bitOffset>
23360 
              <bitWidth>32</bitWidth>
23361 
            </field>
23362 
          </fields>
23363 
        </register>
23364 
        <register>
23365 
          <name>ICER0</name>
23366 
          <displayName>ICER0</displayName>
23367 
          <description>Interrupt Clear-Enable
23368 
          Register</description>
23369 
          <addressOffset>0x180</addressOffset>
23370 
          <size>0x20</size>
23371 
          <access>read-write</access>
23372 
          <resetValue>0x00000000</resetValue>
23373 
          <fields>
23374 
            <field>
23375 
              <name>CLRENA</name>
23376 
              <description>CLRENA</description>
23377 
              <bitOffset>0</bitOffset>
23378 
              <bitWidth>32</bitWidth>
23379 
            </field>
23380 
          </fields>
23381 
        </register>
23382 
        <register>
23383 
          <name>ICER1</name>
23384 
          <displayName>ICER1</displayName>
23385 
          <description>Interrupt Clear-Enable
23386 
          Register</description>
23387 
          <addressOffset>0x184</addressOffset>
23388 
          <size>0x20</size>
23389 
          <access>read-write</access>
23390 
          <resetValue>0x00000000</resetValue>
23391 
          <fields>
23392 
            <field>
23393 
              <name>CLRENA</name>
23394 
              <description>CLRENA</description>
23395 
              <bitOffset>0</bitOffset>
23396 
              <bitWidth>32</bitWidth>
23397 
            </field>
23398 
          </fields>
23399 
        </register>
23400 
        <register>
23401 
          <name>ISPR0</name>
23402 
          <displayName>ISPR0</displayName>
23403 
          <description>Interrupt Set-Pending Register</description>
23404 
          <addressOffset>0x200</addressOffset>
23405 
          <size>0x20</size>
23406 
          <access>read-write</access>
23407 
          <resetValue>0x00000000</resetValue>
23408 
          <fields>
23409 
            <field>
23410 
              <name>SETPEND</name>
23411 
              <description>SETPEND</description>
23412 
              <bitOffset>0</bitOffset>
23413 
              <bitWidth>32</bitWidth>
23414 
            </field>
23415 
          </fields>
23416 
        </register>
23417 
        <register>
23418 
          <name>ISPR1</name>
23419 
          <displayName>ISPR1</displayName>
23420 
          <description>Interrupt Set-Pending Register</description>
23421 
          <addressOffset>0x204</addressOffset>
23422 
          <size>0x20</size>
23423 
          <access>read-write</access>
23424 
          <resetValue>0x00000000</resetValue>
23425 
          <fields>
23426 
            <field>
23427 
              <name>SETPEND</name>
23428 
              <description>SETPEND</description>
23429 
              <bitOffset>0</bitOffset>
23430 
              <bitWidth>32</bitWidth>
23431 
            </field>
23432 
          </fields>
23433 
        </register>
23434 
        <register>
23435 
          <name>ICPR0</name>
23436 
          <displayName>ICPR0</displayName>
23437 
          <description>Interrupt Clear-Pending
23438 
          Register</description>
23439 
          <addressOffset>0x280</addressOffset>
23440 
          <size>0x20</size>
23441 
          <access>read-write</access>
23442 
          <resetValue>0x00000000</resetValue>
23443 
          <fields>
23444 
            <field>
23445 
              <name>CLRPEND</name>
23446 
              <description>CLRPEND</description>
23447 
              <bitOffset>0</bitOffset>
23448 
              <bitWidth>32</bitWidth>
23449 
            </field>
23450 
          </fields>
23451 
        </register>
23452 
        <register>
23453 
          <name>ICPR1</name>
23454 
          <displayName>ICPR1</displayName>
23455 
          <description>Interrupt Clear-Pending
23456 
          Register</description>
23457 
          <addressOffset>0x284</addressOffset>
23458 
          <size>0x20</size>
23459 
          <access>read-write</access>
23460 
          <resetValue>0x00000000</resetValue>
23461 
          <fields>
23462 
            <field>
23463 
              <name>CLRPEND</name>
23464 
              <description>CLRPEND</description>
23465 
              <bitOffset>0</bitOffset>
23466 
              <bitWidth>32</bitWidth>
23467 
            </field>
23468 
          </fields>
23469 
        </register>
23470 
        <register>
23471 
          <name>IABR0</name>
23472 
          <displayName>IABR0</displayName>
23473 
          <description>Interrupt Active Bit Register</description>
23474 
          <addressOffset>0x300</addressOffset>
23475 
          <size>0x20</size>
23476 
          <access>read-only</access>
23477 
          <resetValue>0x00000000</resetValue>
23478 
          <fields>
23479 
            <field>
23480 
              <name>ACTIVE</name>
23481 
              <description>ACTIVE</description>
23482 
              <bitOffset>0</bitOffset>
23483 
              <bitWidth>32</bitWidth>
23484 
            </field>
23485 
          </fields>
23486 
        </register>
23487 
        <register>
23488 
          <name>IABR1</name>
23489 
          <displayName>IABR1</displayName>
23490 
          <description>Interrupt Active Bit Register</description>
23491 
          <addressOffset>0x304</addressOffset>
23492 
          <size>0x20</size>
23493 
          <access>read-only</access>
23494 
          <resetValue>0x00000000</resetValue>
23495 
          <fields>
23496 
            <field>
23497 
              <name>ACTIVE</name>
23498 
              <description>ACTIVE</description>
23499 
              <bitOffset>0</bitOffset>
23500 
              <bitWidth>32</bitWidth>
23501 
            </field>
23502 
          </fields>
23503 
        </register>
23504 
        <register>
23505 
          <name>IPR0</name>
23506 
          <displayName>IPR0</displayName>
23507 
          <description>Interrupt Priority Register</description>
23508 
          <addressOffset>0x400</addressOffset>
23509 
          <size>0x20</size>
23510 
          <access>read-write</access>
23511 
          <resetValue>0x00000000</resetValue>
23512 
          <fields>
23513 
            <field>
23514 
              <name>IPR_N0</name>
23515 
              <description>IPR_N0</description>
23516 
              <bitOffset>0</bitOffset>
23517 
              <bitWidth>8</bitWidth>
23518 
            </field>
23519 
            <field>
23520 
              <name>IPR_N1</name>
23521 
              <description>IPR_N1</description>
23522 
              <bitOffset>8</bitOffset>
23523 
              <bitWidth>8</bitWidth>
23524 
            </field>
23525 
            <field>
23526 
              <name>IPR_N2</name>
23527 
              <description>IPR_N2</description>
23528 
              <bitOffset>16</bitOffset>
23529 
              <bitWidth>8</bitWidth>
23530 
            </field>
23531 
            <field>
23532 
              <name>IPR_N3</name>
23533 
              <description>IPR_N3</description>
23534 
              <bitOffset>24</bitOffset>
23535 
              <bitWidth>8</bitWidth>
23536 
            </field>
23537 
          </fields>
23538 
        </register>
23539 
        <register>
23540 
          <name>IPR1</name>
23541 
          <displayName>IPR1</displayName>
23542 
          <description>Interrupt Priority Register</description>
23543 
          <addressOffset>0x404</addressOffset>
23544 
          <size>0x20</size>
23545 
          <access>read-write</access>
23546 
          <resetValue>0x00000000</resetValue>
23547 
          <fields>
23548 
            <field>
23549 
              <name>IPR_N0</name>
23550 
              <description>IPR_N0</description>
23551 
              <bitOffset>0</bitOffset>
23552 
              <bitWidth>8</bitWidth>
23553 
            </field>
23554 
            <field>
23555 
              <name>IPR_N1</name>
23556 
              <description>IPR_N1</description>
23557 
              <bitOffset>8</bitOffset>
23558 
              <bitWidth>8</bitWidth>
23559 
            </field>
23560 
            <field>
23561 
              <name>IPR_N2</name>
23562 
              <description>IPR_N2</description>
23563 
              <bitOffset>16</bitOffset>
23564 
              <bitWidth>8</bitWidth>
23565 
            </field>
23566 
            <field>
23567 
              <name>IPR_N3</name>
23568 
              <description>IPR_N3</description>
23569 
              <bitOffset>24</bitOffset>
23570 
              <bitWidth>8</bitWidth>
23571 
            </field>
23572 
          </fields>
23573 
        </register>
23574 
        <register>
23575 
          <name>IPR2</name>
23576 
          <displayName>IPR2</displayName>
23577 
          <description>Interrupt Priority Register</description>
23578 
          <addressOffset>0x408</addressOffset>
23579 
          <size>0x20</size>
23580 
          <access>read-write</access>
23581 
          <resetValue>0x00000000</resetValue>
23582 
          <fields>
23583 
            <field>
23584 
              <name>IPR_N0</name>
23585 
              <description>IPR_N0</description>
23586 
              <bitOffset>0</bitOffset>
23587 
              <bitWidth>8</bitWidth>
23588 
            </field>
23589 
            <field>
23590 
              <name>IPR_N1</name>
23591 
              <description>IPR_N1</description>
23592 
              <bitOffset>8</bitOffset>
23593 
              <bitWidth>8</bitWidth>
23594 
            </field>
23595 
            <field>
23596 
              <name>IPR_N2</name>
23597 
              <description>IPR_N2</description>
23598 
              <bitOffset>16</bitOffset>
23599 
              <bitWidth>8</bitWidth>
23600 
            </field>
23601 
            <field>
23602 
              <name>IPR_N3</name>
23603 
              <description>IPR_N3</description>
23604 
              <bitOffset>24</bitOffset>
23605 
              <bitWidth>8</bitWidth>
23606 
            </field>
23607 
          </fields>
23608 
        </register>
23609 
        <register>
23610 
          <name>IPR3</name>
23611 
          <displayName>IPR3</displayName>
23612 
          <description>Interrupt Priority Register</description>
23613 
          <addressOffset>0x40C</addressOffset>
23614 
          <size>0x20</size>
23615 
          <access>read-write</access>
23616 
          <resetValue>0x00000000</resetValue>
23617 
          <fields>
23618 
            <field>
23619 
              <name>IPR_N0</name>
23620 
              <description>IPR_N0</description>
23621 
              <bitOffset>0</bitOffset>
23622 
              <bitWidth>8</bitWidth>
23623 
            </field>
23624 
            <field>
23625 
              <name>IPR_N1</name>
23626 
              <description>IPR_N1</description>
23627 
              <bitOffset>8</bitOffset>
23628 
              <bitWidth>8</bitWidth>
23629 
            </field>
23630 
            <field>
23631 
              <name>IPR_N2</name>
23632 
              <description>IPR_N2</description>
23633 
              <bitOffset>16</bitOffset>
23634 
              <bitWidth>8</bitWidth>
23635 
            </field>
23636 
            <field>
23637 
              <name>IPR_N3</name>
23638 
              <description>IPR_N3</description>
23639 
              <bitOffset>24</bitOffset>
23640 
              <bitWidth>8</bitWidth>
23641 
            </field>
23642 
          </fields>
23643 
        </register>
23644 
        <register>
23645 
          <name>IPR4</name>
23646 
          <displayName>IPR4</displayName>
23647 
          <description>Interrupt Priority Register</description>
23648 
          <addressOffset>0x410</addressOffset>
23649 
          <size>0x20</size>
23650 
          <access>read-write</access>
23651 
          <resetValue>0x00000000</resetValue>
23652 
          <fields>
23653 
            <field>
23654 
              <name>IPR_N0</name>
23655 
              <description>IPR_N0</description>
23656 
              <bitOffset>0</bitOffset>
23657 
              <bitWidth>8</bitWidth>
23658 
            </field>
23659 
            <field>
23660 
              <name>IPR_N1</name>
23661 
              <description>IPR_N1</description>
23662 
              <bitOffset>8</bitOffset>
23663 
              <bitWidth>8</bitWidth>
23664 
            </field>
23665 
            <field>
23666 
              <name>IPR_N2</name>
23667 
              <description>IPR_N2</description>
23668 
              <bitOffset>16</bitOffset>
23669 
              <bitWidth>8</bitWidth>
23670 
            </field>
23671 
            <field>
23672 
              <name>IPR_N3</name>
23673 
              <description>IPR_N3</description>
23674 
              <bitOffset>24</bitOffset>
23675 
              <bitWidth>8</bitWidth>
23676 
            </field>
23677 
          </fields>
23678 
        </register>
23679 
        <register>
23680 
          <name>IPR5</name>
23681 
          <displayName>IPR5</displayName>
23682 
          <description>Interrupt Priority Register</description>
23683 
          <addressOffset>0x414</addressOffset>
23684 
          <size>0x20</size>
23685 
          <access>read-write</access>
23686 
          <resetValue>0x00000000</resetValue>
23687 
          <fields>
23688 
            <field>
23689 
              <name>IPR_N0</name>
23690 
              <description>IPR_N0</description>
23691 
              <bitOffset>0</bitOffset>
23692 
              <bitWidth>8</bitWidth>
23693 
            </field>
23694 
            <field>
23695 
              <name>IPR_N1</name>
23696 
              <description>IPR_N1</description>
23697 
              <bitOffset>8</bitOffset>
23698 
              <bitWidth>8</bitWidth>
23699 
            </field>
23700 
            <field>
23701 
              <name>IPR_N2</name>
23702 
              <description>IPR_N2</description>
23703 
              <bitOffset>16</bitOffset>
23704 
              <bitWidth>8</bitWidth>
23705 
            </field>
23706 
            <field>
23707 
              <name>IPR_N3</name>
23708 
              <description>IPR_N3</description>
23709 
              <bitOffset>24</bitOffset>
23710 
              <bitWidth>8</bitWidth>
23711 
            </field>
23712 
          </fields>
23713 
        </register>
23714 
        <register>
23715 
          <name>IPR6</name>
23716 
          <displayName>IPR6</displayName>
23717 
          <description>Interrupt Priority Register</description>
23718 
          <addressOffset>0x418</addressOffset>
23719 
          <size>0x20</size>
23720 
          <access>read-write</access>
23721 
          <resetValue>0x00000000</resetValue>
23722 
          <fields>
23723 
            <field>
23724 
              <name>IPR_N0</name>
23725 
              <description>IPR_N0</description>
23726 
              <bitOffset>0</bitOffset>
23727 
              <bitWidth>8</bitWidth>
23728 
            </field>
23729 
            <field>
23730 
              <name>IPR_N1</name>
23731 
              <description>IPR_N1</description>
23732 
              <bitOffset>8</bitOffset>
23733 
              <bitWidth>8</bitWidth>
23734 
            </field>
23735 
            <field>
23736 
              <name>IPR_N2</name>
23737 
              <description>IPR_N2</description>
23738 
              <bitOffset>16</bitOffset>
23739 
              <bitWidth>8</bitWidth>
23740 
            </field>
23741 
            <field>
23742 
              <name>IPR_N3</name>
23743 
              <description>IPR_N3</description>
23744 
              <bitOffset>24</bitOffset>
23745 
              <bitWidth>8</bitWidth>
23746 
            </field>
23747 
          </fields>
23748 
        </register>
23749 
        <register>
23750 
          <name>IPR7</name>
23751 
          <displayName>IPR7</displayName>
23752 
          <description>Interrupt Priority Register</description>
23753 
          <addressOffset>0x41C</addressOffset>
23754 
          <size>0x20</size>
23755 
          <access>read-write</access>
23756 
          <resetValue>0x00000000</resetValue>
23757 
          <fields>
23758 
            <field>
23759 
              <name>IPR_N0</name>
23760 
              <description>IPR_N0</description>
23761 
              <bitOffset>0</bitOffset>
23762 
              <bitWidth>8</bitWidth>
23763 
            </field>
23764 
            <field>
23765 
              <name>IPR_N1</name>
23766 
              <description>IPR_N1</description>
23767 
              <bitOffset>8</bitOffset>
23768 
              <bitWidth>8</bitWidth>
23769 
            </field>
23770 
            <field>
23771 
              <name>IPR_N2</name>
23772 
              <description>IPR_N2</description>
23773 
              <bitOffset>16</bitOffset>
23774 
              <bitWidth>8</bitWidth>
23775 
            </field>
23776 
            <field>
23777 
              <name>IPR_N3</name>
23778 
              <description>IPR_N3</description>
23779 
              <bitOffset>24</bitOffset>
23780 
              <bitWidth>8</bitWidth>
23781 
            </field>
23782 
          </fields>
23783 
        </register>
23784 
        <register>
23785 
          <name>IPR8</name>
23786 
          <displayName>IPR8</displayName>
23787 
          <description>Interrupt Priority Register</description>
23788 
          <addressOffset>0x420</addressOffset>
23789 
          <size>0x20</size>
23790 
          <access>read-write</access>
23791 
          <resetValue>0x00000000</resetValue>
23792 
          <fields>
23793 
            <field>
23794 
              <name>IPR_N0</name>
23795 
              <description>IPR_N0</description>
23796 
              <bitOffset>0</bitOffset>
23797 
              <bitWidth>8</bitWidth>
23798 
            </field>
23799 
            <field>
23800 
              <name>IPR_N1</name>
23801 
              <description>IPR_N1</description>
23802 
              <bitOffset>8</bitOffset>
23803 
              <bitWidth>8</bitWidth>
23804 
            </field>
23805 
            <field>
23806 
              <name>IPR_N2</name>
23807 
              <description>IPR_N2</description>
23808 
              <bitOffset>16</bitOffset>
23809 
              <bitWidth>8</bitWidth>
23810 
            </field>
23811 
            <field>
23812 
              <name>IPR_N3</name>
23813 
              <description>IPR_N3</description>
23814 
              <bitOffset>24</bitOffset>
23815 
              <bitWidth>8</bitWidth>
23816 
            </field>
23817 
          </fields>
23818 
        </register>
23819 
        <register>
23820 
          <name>IPR9</name>
23821 
          <displayName>IPR9</displayName>
23822 
          <description>Interrupt Priority Register</description>
23823 
          <addressOffset>0x424</addressOffset>
23824 
          <size>0x20</size>
23825 
          <access>read-write</access>
23826 
          <resetValue>0x00000000</resetValue>
23827 
          <fields>
23828 
            <field>
23829 
              <name>IPR_N0</name>
23830 
              <description>IPR_N0</description>
23831 
              <bitOffset>0</bitOffset>
23832 
              <bitWidth>8</bitWidth>
23833 
            </field>
23834 
            <field>
23835 
              <name>IPR_N1</name>
23836 
              <description>IPR_N1</description>
23837 
              <bitOffset>8</bitOffset>
23838 
              <bitWidth>8</bitWidth>
23839 
            </field>
23840 
            <field>
23841 
              <name>IPR_N2</name>
23842 
              <description>IPR_N2</description>
23843 
              <bitOffset>16</bitOffset>
23844 
              <bitWidth>8</bitWidth>
23845 
            </field>
23846 
            <field>
23847 
              <name>IPR_N3</name>
23848 
              <description>IPR_N3</description>
23849 
              <bitOffset>24</bitOffset>
23850 
              <bitWidth>8</bitWidth>
23851 
            </field>
23852 
          </fields>
23853 
        </register>
23854 
        <register>
23855 
          <name>IPR10</name>
23856 
          <displayName>IPR10</displayName>
23857 
          <description>Interrupt Priority Register</description>
23858 
          <addressOffset>0x428</addressOffset>
23859 
          <size>0x20</size>
23860 
          <access>read-write</access>
23861 
          <resetValue>0x00000000</resetValue>
23862 
          <fields>
23863 
            <field>
23864 
              <name>IPR_N0</name>
23865 
              <description>IPR_N0</description>
23866 
              <bitOffset>0</bitOffset>
23867 
              <bitWidth>8</bitWidth>
23868 
            </field>
23869 
            <field>
23870 
              <name>IPR_N1</name>
23871 
              <description>IPR_N1</description>
23872 
              <bitOffset>8</bitOffset>
23873 
              <bitWidth>8</bitWidth>
23874 
            </field>
23875 
            <field>
23876 
              <name>IPR_N2</name>
23877 
              <description>IPR_N2</description>
23878 
              <bitOffset>16</bitOffset>
23879 
              <bitWidth>8</bitWidth>
23880 
            </field>
23881 
            <field>
23882 
              <name>IPR_N3</name>
23883 
              <description>IPR_N3</description>
23884 
              <bitOffset>24</bitOffset>
23885 
              <bitWidth>8</bitWidth>
23886 
            </field>
23887 
          </fields>
23888 
        </register>
23889 
        <register>
23890 
          <name>IPR11</name>
23891 
          <displayName>IPR11</displayName>
23892 
          <description>Interrupt Priority Register</description>
23893 
          <addressOffset>0x42C</addressOffset>
23894 
          <size>0x20</size>
23895 
          <access>read-write</access>
23896 
          <resetValue>0x00000000</resetValue>
23897 
          <fields>
23898 
            <field>
23899 
              <name>IPR_N0</name>
23900 
              <description>IPR_N0</description>
23901 
              <bitOffset>0</bitOffset>
23902 
              <bitWidth>8</bitWidth>
23903 
            </field>
23904 
            <field>
23905 
              <name>IPR_N1</name>
23906 
              <description>IPR_N1</description>
23907 
              <bitOffset>8</bitOffset>
23908 
              <bitWidth>8</bitWidth>
23909 
            </field>
23910 
            <field>
23911 
              <name>IPR_N2</name>
23912 
              <description>IPR_N2</description>
23913 
              <bitOffset>16</bitOffset>
23914 
              <bitWidth>8</bitWidth>
23915 
            </field>
23916 
            <field>
23917 
              <name>IPR_N3</name>
23918 
              <description>IPR_N3</description>
23919 
              <bitOffset>24</bitOffset>
23920 
              <bitWidth>8</bitWidth>
23921 
            </field>
23922 
          </fields>
23923 
        </register>
23924 
        <register>
23925 
          <name>IPR12</name>
23926 
          <displayName>IPR12</displayName>
23927 
          <description>Interrupt Priority Register</description>
23928 
          <addressOffset>0x430</addressOffset>
23929 
          <size>0x20</size>
23930 
          <access>read-write</access>
23931 
          <resetValue>0x00000000</resetValue>
23932 
          <fields>
23933 
            <field>
23934 
              <name>IPR_N0</name>
23935 
              <description>IPR_N0</description>
23936 
              <bitOffset>0</bitOffset>
23937 
              <bitWidth>8</bitWidth>
23938 
            </field>
23939 
            <field>
23940 
              <name>IPR_N1</name>
23941 
              <description>IPR_N1</description>
23942 
              <bitOffset>8</bitOffset>
23943 
              <bitWidth>8</bitWidth>
23944 
            </field>
23945 
            <field>
23946 
              <name>IPR_N2</name>
23947 
              <description>IPR_N2</description>
23948 
              <bitOffset>16</bitOffset>
23949 
              <bitWidth>8</bitWidth>
23950 
            </field>
23951 
            <field>
23952 
              <name>IPR_N3</name>
23953 
              <description>IPR_N3</description>
23954 
              <bitOffset>24</bitOffset>
23955 
              <bitWidth>8</bitWidth>
23956 
            </field>
23957 
          </fields>
23958 
        </register>
23959 
        <register>
23960 
          <name>IPR13</name>
23961 
          <displayName>IPR13</displayName>
23962 
          <description>Interrupt Priority Register</description>
23963 
          <addressOffset>0x434</addressOffset>
23964 
          <size>0x20</size>
23965 
          <access>read-write</access>
23966 
          <resetValue>0x00000000</resetValue>
23967 
          <fields>
23968 
            <field>
23969 
              <name>IPR_N0</name>
23970 
              <description>IPR_N0</description>
23971 
              <bitOffset>0</bitOffset>
23972 
              <bitWidth>8</bitWidth>
23973 
            </field>
23974 
            <field>
23975 
              <name>IPR_N1</name>
23976 
              <description>IPR_N1</description>
23977 
              <bitOffset>8</bitOffset>
23978 
              <bitWidth>8</bitWidth>
23979 
            </field>
23980 
            <field>
23981 
              <name>IPR_N2</name>
23982 
              <description>IPR_N2</description>
23983 
              <bitOffset>16</bitOffset>
23984 
              <bitWidth>8</bitWidth>
23985 
            </field>
23986 
            <field>
23987 
              <name>IPR_N3</name>
23988 
              <description>IPR_N3</description>
23989 
              <bitOffset>24</bitOffset>
23990 
              <bitWidth>8</bitWidth>
23991 
            </field>
23992 
          </fields>
23993 
        </register>
23994 
        <register>
23995 
          <name>IPR14</name>
23996 
          <displayName>IPR14</displayName>
23997 
          <description>Interrupt Priority Register</description>
23998 
          <addressOffset>0x438</addressOffset>
23999 
          <size>0x20</size>
24000 
          <access>read-write</access>
24001 
          <resetValue>0x00000000</resetValue>
24002 
          <fields>
24003 
            <field>
24004 
              <name>IPR_N0</name>
24005 
              <description>IPR_N0</description>
24006 
              <bitOffset>0</bitOffset>
24007 
              <bitWidth>8</bitWidth>
24008 
            </field>
24009 
            <field>
24010 
              <name>IPR_N1</name>
24011 
              <description>IPR_N1</description>
24012 
              <bitOffset>8</bitOffset>
24013 
              <bitWidth>8</bitWidth>
24014 
            </field>
24015 
            <field>
24016 
              <name>IPR_N2</name>
24017 
              <description>IPR_N2</description>
24018 
              <bitOffset>16</bitOffset>
24019 
              <bitWidth>8</bitWidth>
24020 
            </field>
24021 
            <field>
24022 
              <name>IPR_N3</name>
24023 
              <description>IPR_N3</description>
24024 
              <bitOffset>24</bitOffset>
24025 
              <bitWidth>8</bitWidth>
24026 
            </field>
24027 
          </fields>
24028 
        </register>
24029 
      </registers>
24030 
    </peripheral>
24031 
    <peripheral>
24032 
      <name>USB</name>
24033 
      <description>Universal serial bus full-speed device
24034 
      interface</description>
24035 
      <groupName>USB</groupName>
24036 
      <baseAddress>0x40005C00</baseAddress>
24037 
      <addressBlock>
24038 
        <offset>0x0</offset>
24039 
        <size>0x400</size>
24040 
        <usage>registers</usage>
24041 
      </addressBlock>
24042 
      <interrupt>
24043 
        <name>USB_FS_WKUP</name>
24044 
        <description>USB Device FS Wakeup through EXTI line
24045 
        interrupt</description>
24046 
        <value>42</value>
24047 
      </interrupt>
24048 
      <registers>
24049 
        <register>
24050 
          <name>EP0R</name>
24051 
          <displayName>EP0R</displayName>
24052 
          <description>endpoint 0 register</description>
24053 
          <addressOffset>0x0</addressOffset>
24054 
          <size>0x20</size>
24055 
          <access>read-write</access>
24056 
          <resetValue>0x00000000</resetValue>
24057 
          <fields>
24058 
            <field>
24059 
              <name>EA</name>
24060 
              <description>Endpoint address</description>
24061 
              <bitOffset>0</bitOffset>
24062 
              <bitWidth>4</bitWidth>
24063 
            </field>
24064 
            <field>
24065 
              <name>STAT_TX</name>
24066 
              <description>Status bits, for transmission
24067 
              transfers</description>
24068 
              <bitOffset>4</bitOffset>
24069 
              <bitWidth>2</bitWidth>
24070 
            </field>
24071 
            <field>
24072 
              <name>DTOG_TX</name>
24073 
              <description>Data Toggle, for transmission
24074 
              transfers</description>
24075 
              <bitOffset>6</bitOffset>
24076 
              <bitWidth>1</bitWidth>
24077 
            </field>
24078 
            <field>
24079 
              <name>CTR_TX</name>
24080 
              <description>Correct Transfer for
24081 
              transmission</description>
24082 
              <bitOffset>7</bitOffset>
24083 
              <bitWidth>1</bitWidth>
24084 
            </field>
24085 
            <field>
24086 
              <name>EP_KIND</name>
24087 
              <description>Endpoint kind</description>
24088 
              <bitOffset>8</bitOffset>
24089 
              <bitWidth>1</bitWidth>
24090 
            </field>
24091 
            <field>
24092 
              <name>EP_TYPE</name>
24093 
              <description>Endpoint type</description>
24094 
              <bitOffset>9</bitOffset>
24095 
              <bitWidth>2</bitWidth>
24096 
            </field>
24097 
            <field>
24098 
              <name>SETUP</name>
24099 
              <description>Setup transaction
24100 
              completed</description>
24101 
              <bitOffset>11</bitOffset>
24102 
              <bitWidth>1</bitWidth>
24103 
            </field>
24104 
            <field>
24105 
              <name>STAT_RX</name>
24106 
              <description>Status bits, for reception
24107 
              transfers</description>
24108 
              <bitOffset>12</bitOffset>
24109 
              <bitWidth>2</bitWidth>
24110 
            </field>
24111 
            <field>
24112 
              <name>DTOG_RX</name>
24113 
              <description>Data Toggle, for reception
24114 
              transfers</description>
24115 
              <bitOffset>14</bitOffset>
24116 
              <bitWidth>1</bitWidth>
24117 
            </field>
24118 
            <field>
24119 
              <name>CTR_RX</name>
24120 
              <description>Correct transfer for
24121 
              reception</description>
24122 
              <bitOffset>15</bitOffset>
24123 
              <bitWidth>1</bitWidth>
24124 
            </field>
24125 
          </fields>
24126 
        </register>
24127 
        <register>
24128 
          <name>EP1R</name>
24129 
          <displayName>EP1R</displayName>
24130 
          <description>endpoint 1 register</description>
24131 
          <addressOffset>0x4</addressOffset>
24132 
          <size>0x20</size>
24133 
          <access>read-write</access>
24134 
          <resetValue>0x00000000</resetValue>
24135 
          <fields>
24136 
            <field>
24137 
              <name>EA</name>
24138 
              <description>Endpoint address</description>
24139 
              <bitOffset>0</bitOffset>
24140 
              <bitWidth>4</bitWidth>
24141 
            </field>
24142 
            <field>
24143 
              <name>STAT_TX</name>
24144 
              <description>Status bits, for transmission
24145 
              transfers</description>
24146 
              <bitOffset>4</bitOffset>
24147 
              <bitWidth>2</bitWidth>
24148 
            </field>
24149 
            <field>
24150 
              <name>DTOG_TX</name>
24151 
              <description>Data Toggle, for transmission
24152 
              transfers</description>
24153 
              <bitOffset>6</bitOffset>
24154 
              <bitWidth>1</bitWidth>
24155 
            </field>
24156 
            <field>
24157 
              <name>CTR_TX</name>
24158 
              <description>Correct Transfer for
24159 
              transmission</description>
24160 
              <bitOffset>7</bitOffset>
24161 
              <bitWidth>1</bitWidth>
24162 
            </field>
24163 
            <field>
24164 
              <name>EP_KIND</name>
24165 
              <description>Endpoint kind</description>
24166 
              <bitOffset>8</bitOffset>
24167 
              <bitWidth>1</bitWidth>
24168 
            </field>
24169 
            <field>
24170 
              <name>EP_TYPE</name>
24171 
              <description>Endpoint type</description>
24172 
              <bitOffset>9</bitOffset>
24173 
              <bitWidth>2</bitWidth>
24174 
            </field>
24175 
            <field>
24176 
              <name>SETUP</name>
24177 
              <description>Setup transaction
24178 
              completed</description>
24179 
              <bitOffset>11</bitOffset>
24180 
              <bitWidth>1</bitWidth>
24181 
            </field>
24182 
            <field>
24183 
              <name>STAT_RX</name>
24184 
              <description>Status bits, for reception
24185 
              transfers</description>
24186 
              <bitOffset>12</bitOffset>
24187 
              <bitWidth>2</bitWidth>
24188 
            </field>
24189 
            <field>
24190 
              <name>DTOG_RX</name>
24191 
              <description>Data Toggle, for reception
24192 
              transfers</description>
24193 
              <bitOffset>14</bitOffset>
24194 
              <bitWidth>1</bitWidth>
24195 
            </field>
24196 
            <field>
24197 
              <name>CTR_RX</name>
24198 
              <description>Correct transfer for
24199 
              reception</description>
24200 
              <bitOffset>15</bitOffset>
24201 
              <bitWidth>1</bitWidth>
24202 
            </field>
24203 
          </fields>
24204 
        </register>
24205 
        <register>
24206 
          <name>EP2R</name>
24207 
          <displayName>EP2R</displayName>
24208 
          <description>endpoint 2 register</description>
24209 
          <addressOffset>0x8</addressOffset>
24210 
          <size>0x20</size>
24211 
          <access>read-write</access>
24212 
          <resetValue>0x00000000</resetValue>
24213 
          <fields>
24214 
            <field>
24215 
              <name>EA</name>
24216 
              <description>Endpoint address</description>
24217 
              <bitOffset>0</bitOffset>
24218 
              <bitWidth>4</bitWidth>
24219 
            </field>
24220 
            <field>
24221 
              <name>STAT_TX</name>
24222 
              <description>Status bits, for transmission
24223 
              transfers</description>
24224 
              <bitOffset>4</bitOffset>
24225 
              <bitWidth>2</bitWidth>
24226 
            </field>
24227 
            <field>
24228 
              <name>DTOG_TX</name>
24229 
              <description>Data Toggle, for transmission
24230 
              transfers</description>
24231 
              <bitOffset>6</bitOffset>
24232 
              <bitWidth>1</bitWidth>
24233 
            </field>
24234 
            <field>
24235 
              <name>CTR_TX</name>
24236 
              <description>Correct Transfer for
24237 
              transmission</description>
24238 
              <bitOffset>7</bitOffset>
24239 
              <bitWidth>1</bitWidth>
24240 
            </field>
24241 
            <field>
24242 
              <name>EP_KIND</name>
24243 
              <description>Endpoint kind</description>
24244 
              <bitOffset>8</bitOffset>
24245 
              <bitWidth>1</bitWidth>
24246 
            </field>
24247 
            <field>
24248 
              <name>EP_TYPE</name>
24249 
              <description>Endpoint type</description>
24250 
              <bitOffset>9</bitOffset>
24251 
              <bitWidth>2</bitWidth>
24252 
            </field>
24253 
            <field>
24254 
              <name>SETUP</name>
24255 
              <description>Setup transaction
24256 
              completed</description>
24257 
              <bitOffset>11</bitOffset>
24258 
              <bitWidth>1</bitWidth>
24259 
            </field>
24260 
            <field>
24261 
              <name>STAT_RX</name>
24262 
              <description>Status bits, for reception
24263 
              transfers</description>
24264 
              <bitOffset>12</bitOffset>
24265 
              <bitWidth>2</bitWidth>
24266 
            </field>
24267 
            <field>
24268 
              <name>DTOG_RX</name>
24269 
              <description>Data Toggle, for reception
24270 
              transfers</description>
24271 
              <bitOffset>14</bitOffset>
24272 
              <bitWidth>1</bitWidth>
24273 
            </field>
24274 
            <field>
24275 
              <name>CTR_RX</name>
24276 
              <description>Correct transfer for
24277 
              reception</description>
24278 
              <bitOffset>15</bitOffset>
24279 
              <bitWidth>1</bitWidth>
24280 
            </field>
24281 
          </fields>
24282 
        </register>
24283 
        <register>
24284 
          <name>EP3R</name>
24285 
          <displayName>EP3R</displayName>
24286 
          <description>endpoint 3 register</description>
24287 
          <addressOffset>0xC</addressOffset>
24288 
          <size>0x20</size>
24289 
          <access>read-write</access>
24290 
          <resetValue>0x00000000</resetValue>
24291 
          <fields>
24292 
            <field>
24293 
              <name>EA</name>
24294 
              <description>Endpoint address</description>
24295 
              <bitOffset>0</bitOffset>
24296 
              <bitWidth>4</bitWidth>
24297 
            </field>
24298 
            <field>
24299 
              <name>STAT_TX</name>
24300 
              <description>Status bits, for transmission
24301 
              transfers</description>
24302 
              <bitOffset>4</bitOffset>
24303 
              <bitWidth>2</bitWidth>
24304 
            </field>
24305 
            <field>
24306 
              <name>DTOG_TX</name>
24307 
              <description>Data Toggle, for transmission
24308 
              transfers</description>
24309 
              <bitOffset>6</bitOffset>
24310 
              <bitWidth>1</bitWidth>
24311 
            </field>
24312 
            <field>
24313 
              <name>CTR_TX</name>
24314 
              <description>Correct Transfer for
24315 
              transmission</description>
24316 
              <bitOffset>7</bitOffset>
24317 
              <bitWidth>1</bitWidth>
24318 
            </field>
24319 
            <field>
24320 
              <name>EP_KIND</name>
24321 
              <description>Endpoint kind</description>
24322 
              <bitOffset>8</bitOffset>
24323 
              <bitWidth>1</bitWidth>
24324 
            </field>
24325 
            <field>
24326 
              <name>EP_TYPE</name>
24327 
              <description>Endpoint type</description>
24328 
              <bitOffset>9</bitOffset>
24329 
              <bitWidth>2</bitWidth>
24330 
            </field>
24331 
            <field>
24332 
              <name>SETUP</name>
24333 
              <description>Setup transaction
24334 
              completed</description>
24335 
              <bitOffset>11</bitOffset>
24336 
              <bitWidth>1</bitWidth>
24337 
            </field>
24338 
            <field>
24339 
              <name>STAT_RX</name>
24340 
              <description>Status bits, for reception
24341 
              transfers</description>
24342 
              <bitOffset>12</bitOffset>
24343 
              <bitWidth>2</bitWidth>
24344 
            </field>
24345 
            <field>
24346 
              <name>DTOG_RX</name>
24347 
              <description>Data Toggle, for reception
24348 
              transfers</description>
24349 
              <bitOffset>14</bitOffset>
24350 
              <bitWidth>1</bitWidth>
24351 
            </field>
24352 
            <field>
24353 
              <name>CTR_RX</name>
24354 
              <description>Correct transfer for
24355 
              reception</description>
24356 
              <bitOffset>15</bitOffset>
24357 
              <bitWidth>1</bitWidth>
24358 
            </field>
24359 
          </fields>
24360 
        </register>
24361 
        <register>
24362 
          <name>EP4R</name>
24363 
          <displayName>EP4R</displayName>
24364 
          <description>endpoint 4 register</description>
24365 
          <addressOffset>0x10</addressOffset>
24366 
          <size>0x20</size>
24367 
          <access>read-write</access>
24368 
          <resetValue>0x00000000</resetValue>
24369 
          <fields>
24370 
            <field>
24371 
              <name>EA</name>
24372 
              <description>Endpoint address</description>
24373 
              <bitOffset>0</bitOffset>
24374 
              <bitWidth>4</bitWidth>
24375 
            </field>
24376 
            <field>
24377 
              <name>STAT_TX</name>
24378 
              <description>Status bits, for transmission
24379 
              transfers</description>
24380 
              <bitOffset>4</bitOffset>
24381 
              <bitWidth>2</bitWidth>
24382 
            </field>
24383 
            <field>
24384 
              <name>DTOG_TX</name>
24385 
              <description>Data Toggle, for transmission
24386 
              transfers</description>
24387 
              <bitOffset>6</bitOffset>
24388 
              <bitWidth>1</bitWidth>
24389 
            </field>
24390 
            <field>
24391 
              <name>CTR_TX</name>
24392 
              <description>Correct Transfer for
24393 
              transmission</description>
24394 
              <bitOffset>7</bitOffset>
24395 
              <bitWidth>1</bitWidth>
24396 
            </field>
24397 
            <field>
24398 
              <name>EP_KIND</name>
24399 
              <description>Endpoint kind</description>
24400 
              <bitOffset>8</bitOffset>
24401 
              <bitWidth>1</bitWidth>
24402 
            </field>
24403 
            <field>
24404 
              <name>EP_TYPE</name>
24405 
              <description>Endpoint type</description>
24406 
              <bitOffset>9</bitOffset>
24407 
              <bitWidth>2</bitWidth>
24408 
            </field>
24409 
            <field>
24410 
              <name>SETUP</name>
24411 
              <description>Setup transaction
24412 
              completed</description>
24413 
              <bitOffset>11</bitOffset>
24414 
              <bitWidth>1</bitWidth>
24415 
            </field>
24416 
            <field>
24417 
              <name>STAT_RX</name>
24418 
              <description>Status bits, for reception
24419 
              transfers</description>
24420 
              <bitOffset>12</bitOffset>
24421 
              <bitWidth>2</bitWidth>
24422 
            </field>
24423 
            <field>
24424 
              <name>DTOG_RX</name>
24425 
              <description>Data Toggle, for reception
24426 
              transfers</description>
24427 
              <bitOffset>14</bitOffset>
24428 
              <bitWidth>1</bitWidth>
24429 
            </field>
24430 
            <field>
24431 
              <name>CTR_RX</name>
24432 
              <description>Correct transfer for
24433 
              reception</description>
24434 
              <bitOffset>15</bitOffset>
24435 
              <bitWidth>1</bitWidth>
24436 
            </field>
24437 
          </fields>
24438 
        </register>
24439 
        <register>
24440 
          <name>EP5R</name>
24441 
          <displayName>EP5R</displayName>
24442 
          <description>endpoint 5 register</description>
24443 
          <addressOffset>0x14</addressOffset>
24444 
          <size>0x20</size>
24445 
          <access>read-write</access>
24446 
          <resetValue>0x00000000</resetValue>
24447 
          <fields>
24448 
            <field>
24449 
              <name>EA</name>
24450 
              <description>Endpoint address</description>
24451 
              <bitOffset>0</bitOffset>
24452 
              <bitWidth>4</bitWidth>
24453 
            </field>
24454 
            <field>
24455 
              <name>STAT_TX</name>
24456 
              <description>Status bits, for transmission
24457 
              transfers</description>
24458 
              <bitOffset>4</bitOffset>
24459 
              <bitWidth>2</bitWidth>
24460 
            </field>
24461 
            <field>
24462 
              <name>DTOG_TX</name>
24463 
              <description>Data Toggle, for transmission
24464 
              transfers</description>
24465 
              <bitOffset>6</bitOffset>
24466 
              <bitWidth>1</bitWidth>
24467 
            </field>
24468 
            <field>
24469 
              <name>CTR_TX</name>
24470 
              <description>Correct Transfer for
24471 
              transmission</description>
24472 
              <bitOffset>7</bitOffset>
24473 
              <bitWidth>1</bitWidth>
24474 
            </field>
24475 
            <field>
24476 
              <name>EP_KIND</name>
24477 
              <description>Endpoint kind</description>
24478 
              <bitOffset>8</bitOffset>
24479 
              <bitWidth>1</bitWidth>
24480 
            </field>
24481 
            <field>
24482 
              <name>EP_TYPE</name>
24483 
              <description>Endpoint type</description>
24484 
              <bitOffset>9</bitOffset>
24485 
              <bitWidth>2</bitWidth>
24486 
            </field>
24487 
            <field>
24488 
              <name>SETUP</name>
24489 
              <description>Setup transaction
24490 
              completed</description>
24491 
              <bitOffset>11</bitOffset>
24492 
              <bitWidth>1</bitWidth>
24493 
            </field>
24494 
            <field>
24495 
              <name>STAT_RX</name>
24496 
              <description>Status bits, for reception
24497 
              transfers</description>
24498 
              <bitOffset>12</bitOffset>
24499 
              <bitWidth>2</bitWidth>
24500 
            </field>
24501 
            <field>
24502 
              <name>DTOG_RX</name>
24503 
              <description>Data Toggle, for reception
24504 
              transfers</description>
24505 
              <bitOffset>14</bitOffset>
24506 
              <bitWidth>1</bitWidth>
24507 
            </field>
24508 
            <field>
24509 
              <name>CTR_RX</name>
24510 
              <description>Correct transfer for
24511 
              reception</description>
24512 
              <bitOffset>15</bitOffset>
24513 
              <bitWidth>1</bitWidth>
24514 
            </field>
24515 
          </fields>
24516 
        </register>
24517 
        <register>
24518 
          <name>EP6R</name>
24519 
          <displayName>EP6R</displayName>
24520 
          <description>endpoint 6 register</description>
24521 
          <addressOffset>0x18</addressOffset>
24522 
          <size>0x20</size>
24523 
          <access>read-write</access>
24524 
          <resetValue>0x00000000</resetValue>
24525 
          <fields>
24526 
            <field>
24527 
              <name>EA</name>
24528 
              <description>Endpoint address</description>
24529 
              <bitOffset>0</bitOffset>
24530 
              <bitWidth>4</bitWidth>
24531 
            </field>
24532 
            <field>
24533 
              <name>STAT_TX</name>
24534 
              <description>Status bits, for transmission
24535 
              transfers</description>
24536 
              <bitOffset>4</bitOffset>
24537 
              <bitWidth>2</bitWidth>
24538 
            </field>
24539 
            <field>
24540 
              <name>DTOG_TX</name>
24541 
              <description>Data Toggle, for transmission
24542 
              transfers</description>
24543 
              <bitOffset>6</bitOffset>
24544 
              <bitWidth>1</bitWidth>
24545 
            </field>
24546 
            <field>
24547 
              <name>CTR_TX</name>
24548 
              <description>Correct Transfer for
24549 
              transmission</description>
24550 
              <bitOffset>7</bitOffset>
24551 
              <bitWidth>1</bitWidth>
24552 
            </field>
24553 
            <field>
24554 
              <name>EP_KIND</name>
24555 
              <description>Endpoint kind</description>
24556 
              <bitOffset>8</bitOffset>
24557 
              <bitWidth>1</bitWidth>
24558 
            </field>
24559 
            <field>
24560 
              <name>EP_TYPE</name>
24561 
              <description>Endpoint type</description>
24562 
              <bitOffset>9</bitOffset>
24563 
              <bitWidth>2</bitWidth>
24564 
            </field>
24565 
            <field>
24566 
              <name>SETUP</name>
24567 
              <description>Setup transaction
24568 
              completed</description>
24569 
              <bitOffset>11</bitOffset>
24570 
              <bitWidth>1</bitWidth>
24571 
            </field>
24572 
            <field>
24573 
              <name>STAT_RX</name>
24574 
              <description>Status bits, for reception
24575 
              transfers</description>
24576 
              <bitOffset>12</bitOffset>
24577 
              <bitWidth>2</bitWidth>
24578 
            </field>
24579 
            <field>
24580 
              <name>DTOG_RX</name>
24581 
              <description>Data Toggle, for reception
24582 
              transfers</description>
24583 
              <bitOffset>14</bitOffset>
24584 
              <bitWidth>1</bitWidth>
24585 
            </field>
24586 
            <field>
24587 
              <name>CTR_RX</name>
24588 
              <description>Correct transfer for
24589 
              reception</description>
24590 
              <bitOffset>15</bitOffset>
24591 
              <bitWidth>1</bitWidth>
24592 
            </field>
24593 
          </fields>
24594 
        </register>
24595 
        <register>
24596 
          <name>EP7R</name>
24597 
          <displayName>EP7R</displayName>
24598 
          <description>endpoint 7 register</description>
24599 
          <addressOffset>0x1C</addressOffset>
24600 
          <size>0x20</size>
24601 
          <access>read-write</access>
24602 
          <resetValue>0x00000000</resetValue>
24603 
          <fields>
24604 
            <field>
24605 
              <name>EA</name>
24606 
              <description>Endpoint address</description>
24607 
              <bitOffset>0</bitOffset>
24608 
              <bitWidth>4</bitWidth>
24609 
            </field>
24610 
            <field>
24611 
              <name>STAT_TX</name>
24612 
              <description>Status bits, for transmission
24613 
              transfers</description>
24614 
              <bitOffset>4</bitOffset>
24615 
              <bitWidth>2</bitWidth>
24616 
            </field>
24617 
            <field>
24618 
              <name>DTOG_TX</name>
24619 
              <description>Data Toggle, for transmission
24620 
              transfers</description>
24621 
              <bitOffset>6</bitOffset>
24622 
              <bitWidth>1</bitWidth>
24623 
            </field>
24624 
            <field>
24625 
              <name>CTR_TX</name>
24626 
              <description>Correct Transfer for
24627 
              transmission</description>
24628 
              <bitOffset>7</bitOffset>
24629 
              <bitWidth>1</bitWidth>
24630 
            </field>
24631 
            <field>
24632 
              <name>EP_KIND</name>
24633 
              <description>Endpoint kind</description>
24634 
              <bitOffset>8</bitOffset>
24635 
              <bitWidth>1</bitWidth>
24636 
            </field>
24637 
            <field>
24638 
              <name>EP_TYPE</name>
24639 
              <description>Endpoint type</description>
24640 
              <bitOffset>9</bitOffset>
24641 
              <bitWidth>2</bitWidth>
24642 
            </field>
24643 
            <field>
24644 
              <name>SETUP</name>
24645 
              <description>Setup transaction
24646 
              completed</description>
24647 
              <bitOffset>11</bitOffset>
24648 
              <bitWidth>1</bitWidth>
24649 
            </field>
24650 
            <field>
24651 
              <name>STAT_RX</name>
24652 
              <description>Status bits, for reception
24653 
              transfers</description>
24654 
              <bitOffset>12</bitOffset>
24655 
              <bitWidth>2</bitWidth>
24656 
            </field>
24657 
            <field>
24658 
              <name>DTOG_RX</name>
24659 
              <description>Data Toggle, for reception
24660 
              transfers</description>
24661 
              <bitOffset>14</bitOffset>
24662 
              <bitWidth>1</bitWidth>
24663 
            </field>
24664 
            <field>
24665 
              <name>CTR_RX</name>
24666 
              <description>Correct transfer for
24667 
              reception</description>
24668 
              <bitOffset>15</bitOffset>
24669 
              <bitWidth>1</bitWidth>
24670 
            </field>
24671 
          </fields>
24672 
        </register>
24673 
        <register>
24674 
          <name>CNTR</name>
24675 
          <displayName>USB_CNTR</displayName>
24676 
          <description>control register</description>
24677 
          <addressOffset>0x40</addressOffset>
24678 
          <size>0x20</size>
24679 
          <access>read-write</access>
24680 
          <resetValue>0x00000003</resetValue>
24681 
          <fields>
24682 
            <field>
24683 
              <name>FRES</name>
24684 
              <description>Force USB Reset</description>
24685 
              <bitOffset>0</bitOffset>
24686 
              <bitWidth>1</bitWidth>
24687 
            </field>
24688 
            <field>
24689 
              <name>PDWN</name>
24690 
              <description>Power down</description>
24691 
              <bitOffset>1</bitOffset>
24692 
              <bitWidth>1</bitWidth>
24693 
            </field>
24694 
            <field>
24695 
              <name>LPMODE</name>
24696 
              <description>Low-power mode</description>
24697 
              <bitOffset>2</bitOffset>
24698 
              <bitWidth>1</bitWidth>
24699 
            </field>
24700 
            <field>
24701 
              <name>FSUSP</name>
24702 
              <description>Force suspend</description>
24703 
              <bitOffset>3</bitOffset>
24704 
              <bitWidth>1</bitWidth>
24705 
            </field>
24706 
            <field>
24707 
              <name>RESUME</name>
24708 
              <description>Resume request</description>
24709 
              <bitOffset>4</bitOffset>
24710 
              <bitWidth>1</bitWidth>
24711 
            </field>
24712 
            <field>
24713 
              <name>ESOFM</name>
24714 
              <description>Expected start of frame interrupt
24715 
              mask</description>
24716 
              <bitOffset>8</bitOffset>
24717 
              <bitWidth>1</bitWidth>
24718 
            </field>
24719 
            <field>
24720 
              <name>SOFM</name>
24721 
              <description>Start of frame interrupt
24722 
              mask</description>
24723 
              <bitOffset>9</bitOffset>
24724 
              <bitWidth>1</bitWidth>
24725 
            </field>
24726 
            <field>
24727 
              <name>RESETM</name>
24728 
              <description>USB reset interrupt mask</description>
24729 
              <bitOffset>10</bitOffset>
24730 
              <bitWidth>1</bitWidth>
24731 
            </field>
24732 
            <field>
24733 
              <name>SUSPM</name>
24734 
              <description>Suspend mode interrupt
24735 
              mask</description>
24736 
              <bitOffset>11</bitOffset>
24737 
              <bitWidth>1</bitWidth>
24738 
            </field>
24739 
            <field>
24740 
              <name>WKUPM</name>
24741 
              <description>Wakeup interrupt mask</description>
24742 
              <bitOffset>12</bitOffset>
24743 
              <bitWidth>1</bitWidth>
24744 
            </field>
24745 
            <field>
24746 
              <name>ERRM</name>
24747 
              <description>Error interrupt mask</description>
24748 
              <bitOffset>13</bitOffset>
24749 
              <bitWidth>1</bitWidth>
24750 
            </field>
24751 
            <field>
24752 
              <name>PMAOVRM</name>
24753 
              <description>Packet memory area over / underrun
24754 
              interrupt mask</description>
24755 
              <bitOffset>14</bitOffset>
24756 
              <bitWidth>1</bitWidth>
24757 
            </field>
24758 
            <field>
24759 
              <name>CTRM</name>
24760 
              <description>Correct transfer interrupt
24761 
              mask</description>
24762 
              <bitOffset>15</bitOffset>
24763 
              <bitWidth>1</bitWidth>
24764 
            </field>
24765 
          </fields>
24766 
        </register>
24767 
        <register>
24768 
          <name>ISTR</name>
24769 
          <displayName>ISTR</displayName>
24770 
          <description>interrupt status register</description>
24771 
          <addressOffset>0x44</addressOffset>
24772 
          <size>0x20</size>
24773 
          <access>read-write</access>
24774 
          <resetValue>0x00000000</resetValue>
24775 
          <fields>
24776 
            <field>
24777 
              <name>EP_ID</name>
24778 
              <description>Endpoint Identifier</description>
24779 
              <bitOffset>0</bitOffset>
24780 
              <bitWidth>4</bitWidth>
24781 
            </field>
24782 
            <field>
24783 
              <name>DIR</name>
24784 
              <description>Direction of transaction</description>
24785 
              <bitOffset>4</bitOffset>
24786 
              <bitWidth>1</bitWidth>
24787 
            </field>
24788 
            <field>
24789 
              <name>ESOF</name>
24790 
              <description>Expected start frame</description>
24791 
              <bitOffset>8</bitOffset>
24792 
              <bitWidth>1</bitWidth>
24793 
            </field>
24794 
            <field>
24795 
              <name>SOF</name>
24796 
              <description>start of frame</description>
24797 
              <bitOffset>9</bitOffset>
24798 
              <bitWidth>1</bitWidth>
24799 
            </field>
24800 
            <field>
24801 
              <name>RESET</name>
24802 
              <description>reset request</description>
24803 
              <bitOffset>10</bitOffset>
24804 
              <bitWidth>1</bitWidth>
24805 
            </field>
24806 
            <field>
24807 
              <name>SUSP</name>
24808 
              <description>Suspend mode request</description>
24809 
              <bitOffset>11</bitOffset>
24810 
              <bitWidth>1</bitWidth>
24811 
            </field>
24812 
            <field>
24813 
              <name>WKUP</name>
24814 
              <description>Wakeup</description>
24815 
              <bitOffset>12</bitOffset>
24816 
              <bitWidth>1</bitWidth>
24817 
            </field>
24818 
            <field>
24819 
              <name>ERR</name>
24820 
              <description>Error</description>
24821 
              <bitOffset>13</bitOffset>
24822 
              <bitWidth>1</bitWidth>
24823 
            </field>
24824 
            <field>
24825 
              <name>PMAOVR</name>
24826 
              <description>Packet memory area over /
24827 
              underrun</description>
24828 
              <bitOffset>14</bitOffset>
24829 
              <bitWidth>1</bitWidth>
24830 
            </field>
24831 
            <field>
24832 
              <name>CTR</name>
24833 
              <description>Correct transfer</description>
24834 
              <bitOffset>15</bitOffset>
24835 
              <bitWidth>1</bitWidth>
24836 
            </field>
24837 
          </fields>
24838 
        </register>
24839 
        <register>
24840 
          <name>FNR</name>
24841 
          <displayName>FNR</displayName>
24842 
          <description>frame number register</description>
24843 
          <addressOffset>0x48</addressOffset>
24844 
          <size>0x20</size>
24845 
          <access>read-only</access>
24846 
          <resetValue>0x0000</resetValue>
24847 
          <fields>
24848 
            <field>
24849 
              <name>FN</name>
24850 
              <description>Frame number</description>
24851 
              <bitOffset>0</bitOffset>
24852 
              <bitWidth>11</bitWidth>
24853 
            </field>
24854 
            <field>
24855 
              <name>LSOF</name>
24856 
              <description>Lost SOF</description>
24857 
              <bitOffset>11</bitOffset>
24858 
              <bitWidth>2</bitWidth>
24859 
            </field>
24860 
            <field>
24861 
              <name>LCK</name>
24862 
              <description>Locked</description>
24863 
              <bitOffset>13</bitOffset>
24864 
              <bitWidth>1</bitWidth>
24865 
            </field>
24866 
            <field>
24867 
              <name>RXDM</name>
24868 
              <description>Receive data - line status</description>
24869 
              <bitOffset>14</bitOffset>
24870 
              <bitWidth>1</bitWidth>
24871 
            </field>
24872 
            <field>
24873 
              <name>RXDP</name>
24874 
              <description>Receive data + line status</description>
24875 
              <bitOffset>15</bitOffset>
24876 
              <bitWidth>1</bitWidth>
24877 
            </field>
24878 
          </fields>
24879 
        </register>
24880 
        <register>
24881 
          <name>DADDR</name>
24882 
          <displayName>DADDR</displayName>
24883 
          <description>device address</description>
24884 
          <addressOffset>0x4C</addressOffset>
24885 
          <size>0x20</size>
24886 
          <access>read-write</access>
24887 
          <resetValue>0x0000</resetValue>
24888 
          <fields>
24889 
            <field>
24890 
              <name>ADD</name>
24891 
              <description>Device address</description>
24892 
              <bitOffset>0</bitOffset>
24893 
              <bitWidth>7</bitWidth>
24894 
            </field>
24895 
            <field>
24896 
              <name>EF</name>
24897 
              <description>Enable function</description>
24898 
              <bitOffset>7</bitOffset>
24899 
              <bitWidth>1</bitWidth>
24900 
            </field>
24901 
          </fields>
24902 
        </register>
24903 
        <register>
24904 
          <name>BTABLE</name>
24905 
          <displayName>BTABLE</displayName>
24906 
          <description>Buffer table address</description>
24907 
          <addressOffset>0x50</addressOffset>
24908 
          <size>0x20</size>
24909 
          <access>read-write</access>
24910 
          <resetValue>0x0000</resetValue>
24911 
          <fields>
24912 
            <field>
24913 
              <name>BTABLE</name>
24914 
              <description>Buffer table</description>
24915 
              <bitOffset>3</bitOffset>
24916 
              <bitWidth>13</bitWidth>
24917 
            </field>
24918 
          </fields>
24919 
        </register>
24920 
      </registers>
24921 
    </peripheral>
24922 
  </peripherals>
24923 
</device>