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Rev	Author	Line No.	Line
2	mjames	1	/**
		2	******************************************************************************
		3	* @file startup_stm32f030x6.s
		4	* @author MCD Application Team
		5	* @brief STM32F030x4/STM32F030x6 devices vector table for GCC toolchain.
		6	* This module performs:
		7	* - Set the initial SP
		8	* - Set the initial PC == Reset_Handler,
		9	* - Set the vector table entries with the exceptions ISR address
		10	* - Branches to main in the C library (which eventually
		11	* calls main()).
		12	* After Reset the Cortex-M0 processor is in Thread mode,
		13	* priority is Privileged, and the Stack is set to Main.
		14	******************************************************************************
		15	* @attention
		16	*
		17	* <h2><center>© Copyright (c) 2016 STMicroelectronics.
		18	* All rights reserved.</center></h2>
		19	*
		20	* This software component is licensed by ST under BSD 3-Clause license,
		21	* the "License"; You may not use this file except in compliance with the
		22	* License. You may obtain a copy of the License at:
		23	* opensource.org/licenses/BSD-3-Clause
		24	*
		25	******************************************************************************
		26	*/
		27
		28	.syntax unified
		29	.cpu cortex-m0
		30	.fpu softvfp
		31	.thumb
		32
		33	.global g_pfnVectors
		34	.global Default_Handler
		35
		36	/* start address for the initialization values of the .data section.
		37	defined in linker script */
		38	.word _sidata
		39	/* start address for the .data section. defined in linker script */
		40	.word _sdata
		41	/* end address for the .data section. defined in linker script */
		42	.word _edata
		43	/* start address for the .bss section. defined in linker script */
		44	.word _sbss
		45	/* end address for the .bss section. defined in linker script */
		46	.word _ebss
		47
		48	.section .text.Reset_Handler
		49	.weak Reset_Handler
		50	.type Reset_Handler, %function
		51	Reset_Handler:
		52	ldr r0, =_estack
		53	mov sp, r0 /* set stack pointer */
		54
		55	/* Copy the data segment initializers from flash to SRAM */
		56	ldr r0, =_sdata
		57	ldr r1, =_edata
		58	ldr r2, =_sidata
		59	movs r3, #0
		60	b LoopCopyDataInit
		61
		62	CopyDataInit:
		63	ldr r4, [r2, r3]
		64	str r4, [r0, r3]
		65	adds r3, r3, #4
		66
		67	LoopCopyDataInit:
		68	adds r4, r0, r3
		69	cmp r4, r1
		70	bcc CopyDataInit
		71
		72	/* Zero fill the bss segment. */
		73	ldr r2, =_sbss
		74	ldr r4, =_ebss
		75	movs r3, #0
		76	b LoopFillZerobss
		77
		78	FillZerobss:
		79	str r3, [r2]
		80	adds r2, r2, #4
		81
		82	LoopFillZerobss:
		83	cmp r2, r4
		84	bcc FillZerobss
		85
		86	/* Call the clock system intitialization function.*/
		87	bl SystemInit
		88	/* Call static constructors */
		89	bl __libc_init_array
		90	/* Call the application's entry point.*/
		91	bl main
		92
		93	LoopForever:
		94	b LoopForever
		95
		96
		97	.size Reset_Handler, .-Reset_Handler
		98
		99	/**
		100	* @brief This is the code that gets called when the processor receives an
		101	* unexpected interrupt. This simply enters an infinite loop, preserving
		102	* the system state for examination by a debugger.
		103	*
		104	* @param None
		105	* @retval : None
		106	*/
		107	.section .text.Default_Handler,"ax",%progbits
		108	Default_Handler:
		109	Infinite_Loop:
		110	b Infinite_Loop
		111	.size Default_Handler, .-Default_Handler
		112	/******************************************************************************
		113	*
		114	* The minimal vector table for a Cortex M0. Note that the proper constructs
		115	* must be placed on this to ensure that it ends up at physical address
		116	* 0x0000.0000.
		117	*
		118	******************************************************************************/
		119	.section .isr_vector,"a",%progbits
		120	.type g_pfnVectors, %object
		121	.size g_pfnVectors, .-g_pfnVectors
		122
		123
		124	g_pfnVectors:
		125	.word _estack
		126	.word Reset_Handler
		127	.word NMI_Handler
		128	.word HardFault_Handler
		129	.word 0
		130	.word 0
		131	.word 0
		132	.word 0
		133	.word 0
		134	.word 0
		135	.word 0
		136	.word SVC_Handler
		137	.word 0
		138	.word 0
		139	.word PendSV_Handler
		140	.word SysTick_Handler
		141	.word WWDG_IRQHandler /* Window WatchDog */
		142	.word 0 /* Reserved */
		143	.word RTC_IRQHandler /* RTC through the EXTI line */
		144	.word FLASH_IRQHandler /* FLASH */
		145	.word RCC_IRQHandler /* RCC */
		146	.word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */
		147	.word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */
		148	.word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */
		149	.word 0 /* Reserved */
		150	.word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */
		151	.word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */
		152	.word DMA1_Channel4_5_IRQHandler /* DMA1 Channel 4 and Channel 5 */
		153	.word ADC1_IRQHandler /* ADC1 */
		154	.word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */
		155	.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
		156	.word 0 /* Reserved */
		157	.word TIM3_IRQHandler /* TIM3 */
		158	.word 0 /* Reserved */
		159	.word 0 /* Reserved */
		160	.word TIM14_IRQHandler /* TIM14 */
		161	.word 0 /* Reserved */
		162	.word TIM16_IRQHandler /* TIM16 */
		163	.word TIM17_IRQHandler /* TIM17 */
		164	.word I2C1_IRQHandler /* I2C1 */
		165	.word 0 /* Reserved */
		166	.word SPI1_IRQHandler /* SPI1 */
		167	.word 0 /* Reserved */
		168	.word USART1_IRQHandler /* USART1 */
		169	.word 0 /* Reserved */
		170	.word 0 /* Reserved */
		171	.word 0 /* Reserved */
		172	.word 0 /* Reserved */
		173
		174	/*******************************************************************************
		175	*
		176	* Provide weak aliases for each Exception handler to the Default_Handler.
		177	* As they are weak aliases, any function with the same name will override
		178	* this definition.
		179	*
		180	*******************************************************************************/
		181
		182	.weak NMI_Handler
		183	.thumb_set NMI_Handler,Default_Handler
		184
		185	.weak HardFault_Handler
		186	.thumb_set HardFault_Handler,Default_Handler
		187
		188	.weak SVC_Handler
		189	.thumb_set SVC_Handler,Default_Handler
		190
		191	.weak PendSV_Handler
		192	.thumb_set PendSV_Handler,Default_Handler
		193
		194	.weak SysTick_Handler
		195	.thumb_set SysTick_Handler,Default_Handler
		196
		197	.weak WWDG_IRQHandler
		198	.thumb_set WWDG_IRQHandler,Default_Handler
		199
		200	.weak RTC_IRQHandler
		201	.thumb_set RTC_IRQHandler,Default_Handler
		202
		203	.weak FLASH_IRQHandler
		204	.thumb_set FLASH_IRQHandler,Default_Handler
		205
		206	.weak RCC_IRQHandler
		207	.thumb_set RCC_IRQHandler,Default_Handler
		208
		209	.weak EXTI0_1_IRQHandler
		210	.thumb_set EXTI0_1_IRQHandler,Default_Handler
		211
		212	.weak EXTI2_3_IRQHandler
		213	.thumb_set EXTI2_3_IRQHandler,Default_Handler
		214
		215	.weak EXTI4_15_IRQHandler
		216	.thumb_set EXTI4_15_IRQHandler,Default_Handler
		217
		218	.weak DMA1_Channel1_IRQHandler
		219	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
		220
		221	.weak DMA1_Channel2_3_IRQHandler
		222	.thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
		223
		224	.weak DMA1_Channel4_5_IRQHandler
		225	.thumb_set DMA1_Channel4_5_IRQHandler,Default_Handler
		226
		227	.weak ADC1_IRQHandler
		228	.thumb_set ADC1_IRQHandler,Default_Handler
		229
		230	.weak TIM1_BRK_UP_TRG_COM_IRQHandler
		231	.thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
		232
		233	.weak TIM1_CC_IRQHandler
		234	.thumb_set TIM1_CC_IRQHandler,Default_Handler
		235
		236	.weak TIM3_IRQHandler
		237	.thumb_set TIM3_IRQHandler,Default_Handler
		238
		239	.weak TIM14_IRQHandler
		240	.thumb_set TIM14_IRQHandler,Default_Handler
		241
		242	.weak TIM16_IRQHandler
		243	.thumb_set TIM16_IRQHandler,Default_Handler
		244
		245	.weak TIM17_IRQHandler
		246	.thumb_set TIM17_IRQHandler,Default_Handler
		247
		248	.weak I2C1_IRQHandler
		249	.thumb_set I2C1_IRQHandler,Default_Handler
		250
		251	.weak SPI1_IRQHandler
		252	.thumb_set SPI1_IRQHandler,Default_Handler
		253
		254	.weak USART1_IRQHandler
		255	.thumb_set USART1_IRQHandler,Default_Handler
		256
		257	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
		258

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