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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 2 | mjames | 1 | State 16 contains 1 shift/reduce conflict. |
| 2 | |||
| 3 | |||
| 4 | Grammar |
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| 5 | |||
| 6 | Number, Line, Rule |
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| 7 | 1 34 protelfile -> objects |
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| 8 | 2 37 objects -> objects object |
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| 9 | 3 38 objects -> object |
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| 10 | 4 42 object -> component_obj |
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| 11 | 5 43 object -> net_obj |
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| 12 | 6 47 component_obj -> LBRK NL comp_ident NL comp_value NL comp_type NL skip_line skip_line skip_line RBRK NL |
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| 13 | 7 50 comp_ident -> ASTRING |
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| 14 | 8 52 comp_type -> ASTRING |
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| 15 | 9 55 comp_value -> ASTRING |
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| 16 | 10 59 net_obj -> LB2 NL net_ident NL pin_list RB2 NL |
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| 17 | 11 62 pin_list -> pin_list socket_pin |
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| 18 | 12 63 pin_list -> socket_pin |
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| 19 | 13 64 pin_list -> /* empty */ |
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| 20 | 14 67 net_ident -> ASTRING |
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| 21 | 15 68 net_ident -> ASTRING MINUS ASTRING |
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| 22 | 16 72 skip_line -> NL |
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| 23 | 17 73 skip_line -> SPC NL |
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| 24 | 18 77 socket_pin -> socket_ident MINUS ASTRING NL |
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| 25 | 19 83 socket_ident -> ASTRING |
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| 26 | |||
| 27 | |||
| 28 | Terminals, with rules where they appear |
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| 29 | |||
| 30 | $ (-1) |
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| 31 | error (256) |
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| 32 | SPC (257) 17 |
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| 33 | NL (258) 6 10 16 17 18 |
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| 34 | LBRK (259) 6 |
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| 35 | RBRK (260) 6 |
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| 36 | LB2 (261) 10 |
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| 37 | RB2 (262) 10 |
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| 38 | MINUS (263) 15 18 |
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| 39 | ASTRING (264) 7 8 9 14 15 18 19 |
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| 40 | |||
| 41 | |||
| 42 | Nonterminals, with rules where they appear |
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| 43 | |||
| 44 | protelfile (11) |
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| 45 | on left: 1 |
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| 46 | objects (12) |
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| 47 | on left: 2 3, on right: 1 2 |
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| 48 | object (13) |
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| 49 | on left: 4 5, on right: 2 3 |
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| 50 | component_obj (14) |
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| 51 | on left: 6, on right: 4 |
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| 52 | comp_ident (15) |
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| 53 | on left: 7, on right: 6 |
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| 54 | comp_type (16) |
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| 55 | on left: 8, on right: 6 |
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| 56 | comp_value (17) |
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| 57 | on left: 9, on right: 6 |
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| 58 | net_obj (18) |
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| 59 | on left: 10, on right: 5 |
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| 60 | pin_list (19) |
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| 61 | on left: 11 12 13, on right: 10 11 |
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| 62 | net_ident (20) |
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| 63 | on left: 14 15, on right: 10 |
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| 64 | skip_line (21) |
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| 65 | on left: 16 17, on right: 6 |
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| 66 | socket_pin (22) |
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| 67 | on left: 18, on right: 11 12 |
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| 68 | socket_ident (23) |
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| 69 | on left: 19, on right: 18 |
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| 70 | |||
| 71 | |||
| 72 | state 0 |
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| 73 | |||
| 74 | LBRK shift, and go to state 1 |
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| 75 | LB2 shift, and go to state 2 |
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| 76 | |||
| 77 | protelfile go to state 42 |
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| 78 | objects go to state 3 |
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| 79 | object go to state 4 |
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| 80 | component_obj go to state 5 |
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| 81 | net_obj go to state 6 |
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| 82 | |||
| 83 | |||
| 84 | |||
| 85 | state 1 |
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| 86 | |||
| 87 | component_obj -> LBRK . NL comp_ident NL comp_value NL comp_type NL skip_line skip_line skip_line RBRK NL (rule 6) |
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| 88 | |||
| 89 | NL shift, and go to state 7 |
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| 90 | |||
| 91 | |||
| 92 | |||
| 93 | state 2 |
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| 94 | |||
| 95 | net_obj -> LB2 . NL net_ident NL pin_list RB2 NL (rule 10) |
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| 96 | |||
| 97 | NL shift, and go to state 8 |
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| 98 | |||
| 99 | |||
| 100 | |||
| 101 | state 3 |
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| 102 | |||
| 103 | protelfile -> objects . (rule 1) |
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| 104 | objects -> objects . object (rule 2) |
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| 105 | |||
| 106 | LBRK shift, and go to state 1 |
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| 107 | LB2 shift, and go to state 2 |
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| 108 | |||
| 109 | $default reduce using rule 1 (protelfile) |
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| 110 | |||
| 111 | object go to state 9 |
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| 112 | component_obj go to state 5 |
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| 113 | net_obj go to state 6 |
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| 114 | |||
| 115 | |||
| 116 | |||
| 117 | state 4 |
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| 118 | |||
| 119 | objects -> object . (rule 3) |
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| 120 | |||
| 121 | $default reduce using rule 3 (objects) |
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| 122 | |||
| 123 | |||
| 124 | |||
| 125 | state 5 |
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| 126 | |||
| 127 | object -> component_obj . (rule 4) |
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| 128 | |||
| 129 | $default reduce using rule 4 (object) |
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| 130 | |||
| 131 | |||
| 132 | |||
| 133 | state 6 |
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| 134 | |||
| 135 | object -> net_obj . (rule 5) |
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| 136 | |||
| 137 | $default reduce using rule 5 (object) |
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| 138 | |||
| 139 | |||
| 140 | |||
| 141 | state 7 |
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| 142 | |||
| 143 | component_obj -> LBRK NL . comp_ident NL comp_value NL comp_type NL skip_line skip_line skip_line RBRK NL (rule 6) |
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| 144 | |||
| 145 | ASTRING shift, and go to state 10 |
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| 146 | |||
| 147 | comp_ident go to state 11 |
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| 148 | |||
| 149 | |||
| 150 | |||
| 151 | state 8 |
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| 152 | |||
| 153 | net_obj -> LB2 NL . net_ident NL pin_list RB2 NL (rule 10) |
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| 154 | |||
| 155 | ASTRING shift, and go to state 12 |
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| 156 | |||
| 157 | net_ident go to state 13 |
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| 158 | |||
| 159 | |||
| 160 | |||
| 161 | state 9 |
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| 162 | |||
| 163 | objects -> objects object . (rule 2) |
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| 164 | |||
| 165 | $default reduce using rule 2 (objects) |
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| 166 | |||
| 167 | |||
| 168 | |||
| 169 | state 10 |
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| 170 | |||
| 171 | comp_ident -> ASTRING . (rule 7) |
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| 172 | |||
| 173 | $default reduce using rule 7 (comp_ident) |
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| 174 | |||
| 175 | |||
| 176 | |||
| 177 | state 11 |
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| 178 | |||
| 179 | component_obj -> LBRK NL comp_ident . NL comp_value NL comp_type NL skip_line skip_line skip_line RBRK NL (rule 6) |
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| 180 | |||
| 181 | NL shift, and go to state 14 |
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| 182 | |||
| 183 | |||
| 184 | |||
| 185 | state 12 |
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| 186 | |||
| 187 | net_ident -> ASTRING . (rule 14) |
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| 188 | net_ident -> ASTRING . MINUS ASTRING (rule 15) |
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| 189 | |||
| 190 | MINUS shift, and go to state 15 |
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| 191 | |||
| 192 | $default reduce using rule 14 (net_ident) |
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| 193 | |||
| 194 | |||
| 195 | |||
| 196 | state 13 |
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| 197 | |||
| 198 | net_obj -> LB2 NL net_ident . NL pin_list RB2 NL (rule 10) |
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| 199 | |||
| 200 | NL shift, and go to state 16 |
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| 201 | |||
| 202 | |||
| 203 | |||
| 204 | state 14 |
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| 205 | |||
| 206 | component_obj -> LBRK NL comp_ident NL . comp_value NL comp_type NL skip_line skip_line skip_line RBRK NL (rule 6) |
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| 207 | |||
| 208 | ASTRING shift, and go to state 17 |
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| 209 | |||
| 210 | comp_value go to state 18 |
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| 211 | |||
| 212 | |||
| 213 | |||
| 214 | state 15 |
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| 215 | |||
| 216 | net_ident -> ASTRING MINUS . ASTRING (rule 15) |
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| 217 | |||
| 218 | ASTRING shift, and go to state 19 |
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| 219 | |||
| 220 | |||
| 221 | |||
| 222 | state 16 |
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| 223 | |||
| 224 | net_obj -> LB2 NL net_ident NL . pin_list RB2 NL (rule 10) |
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| 225 | |||
| 226 | ASTRING shift, and go to state 20 |
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| 227 | |||
| 228 | ASTRING [reduce using rule 13 (pin_list)] |
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| 229 | $default reduce using rule 13 (pin_list) |
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| 230 | |||
| 231 | pin_list go to state 21 |
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| 232 | socket_pin go to state 22 |
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| 233 | socket_ident go to state 23 |
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| 234 | |||
| 235 | |||
| 236 | |||
| 237 | state 17 |
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| 238 | |||
| 239 | comp_value -> ASTRING . (rule 9) |
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| 240 | |||
| 241 | $default reduce using rule 9 (comp_value) |
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| 242 | |||
| 243 | |||
| 244 | |||
| 245 | state 18 |
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| 246 | |||
| 247 | component_obj -> LBRK NL comp_ident NL comp_value . NL comp_type NL skip_line skip_line skip_line RBRK NL (rule 6) |
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| 248 | |||
| 249 | NL shift, and go to state 24 |
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| 250 | |||
| 251 | |||
| 252 | |||
| 253 | state 19 |
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| 254 | |||
| 255 | net_ident -> ASTRING MINUS ASTRING . (rule 15) |
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| 256 | |||
| 257 | $default reduce using rule 15 (net_ident) |
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| 258 | |||
| 259 | |||
| 260 | |||
| 261 | state 20 |
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| 262 | |||
| 263 | socket_ident -> ASTRING . (rule 19) |
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| 264 | |||
| 265 | $default reduce using rule 19 (socket_ident) |
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| 266 | |||
| 267 | |||
| 268 | |||
| 269 | state 21 |
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| 270 | |||
| 271 | net_obj -> LB2 NL net_ident NL pin_list . RB2 NL (rule 10) |
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| 272 | pin_list -> pin_list . socket_pin (rule 11) |
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| 273 | |||
| 274 | RB2 shift, and go to state 25 |
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| 275 | ASTRING shift, and go to state 20 |
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| 276 | |||
| 277 | socket_pin go to state 26 |
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| 278 | socket_ident go to state 23 |
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| 279 | |||
| 280 | |||
| 281 | |||
| 282 | state 22 |
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| 283 | |||
| 284 | pin_list -> socket_pin . (rule 12) |
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| 285 | |||
| 286 | $default reduce using rule 12 (pin_list) |
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| 287 | |||
| 288 | |||
| 289 | |||
| 290 | state 23 |
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| 291 | |||
| 292 | socket_pin -> socket_ident . MINUS ASTRING NL (rule 18) |
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| 293 | |||
| 294 | MINUS shift, and go to state 27 |
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| 295 | |||
| 296 | |||
| 297 | |||
| 298 | state 24 |
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| 299 | |||
| 300 | component_obj -> LBRK NL comp_ident NL comp_value NL . comp_type NL skip_line skip_line skip_line RBRK NL (rule 6) |
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| 301 | |||
| 302 | ASTRING shift, and go to state 28 |
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| 303 | |||
| 304 | comp_type go to state 29 |
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| 305 | |||
| 306 | |||
| 307 | |||
| 308 | state 25 |
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| 309 | |||
| 310 | net_obj -> LB2 NL net_ident NL pin_list RB2 . NL (rule 10) |
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| 311 | |||
| 312 | NL shift, and go to state 30 |
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| 313 | |||
| 314 | |||
| 315 | |||
| 316 | state 26 |
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| 317 | |||
| 318 | pin_list -> pin_list socket_pin . (rule 11) |
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| 319 | |||
| 320 | $default reduce using rule 11 (pin_list) |
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| 321 | |||
| 322 | |||
| 323 | |||
| 324 | state 27 |
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| 325 | |||
| 326 | socket_pin -> socket_ident MINUS . ASTRING NL (rule 18) |
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| 327 | |||
| 328 | ASTRING shift, and go to state 31 |
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| 329 | |||
| 330 | |||
| 331 | |||
| 332 | state 28 |
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| 333 | |||
| 334 | comp_type -> ASTRING . (rule 8) |
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| 335 | |||
| 336 | $default reduce using rule 8 (comp_type) |
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| 337 | |||
| 338 | |||
| 339 | |||
| 340 | state 29 |
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| 341 | |||
| 342 | component_obj -> LBRK NL comp_ident NL comp_value NL comp_type . NL skip_line skip_line skip_line RBRK NL (rule 6) |
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| 343 | |||
| 344 | NL shift, and go to state 32 |
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| 345 | |||
| 346 | |||
| 347 | |||
| 348 | state 30 |
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| 349 | |||
| 350 | net_obj -> LB2 NL net_ident NL pin_list RB2 NL . (rule 10) |
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| 351 | |||
| 352 | $default reduce using rule 10 (net_obj) |
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| 353 | |||
| 354 | |||
| 355 | |||
| 356 | state 31 |
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| 357 | |||
| 358 | socket_pin -> socket_ident MINUS ASTRING . NL (rule 18) |
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| 359 | |||
| 360 | NL shift, and go to state 33 |
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| 361 | |||
| 362 | |||
| 363 | |||
| 364 | state 32 |
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| 365 | |||
| 366 | component_obj -> LBRK NL comp_ident NL comp_value NL comp_type NL . skip_line skip_line skip_line RBRK NL (rule 6) |
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| 367 | |||
| 368 | SPC shift, and go to state 34 |
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| 369 | NL shift, and go to state 35 |
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| 370 | |||
| 371 | skip_line go to state 36 |
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| 372 | |||
| 373 | |||
| 374 | |||
| 375 | state 33 |
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| 376 | |||
| 377 | socket_pin -> socket_ident MINUS ASTRING NL . (rule 18) |
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| 378 | |||
| 379 | $default reduce using rule 18 (socket_pin) |
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| 380 | |||
| 381 | |||
| 382 | |||
| 383 | state 34 |
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| 384 | |||
| 385 | skip_line -> SPC . NL (rule 17) |
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| 386 | |||
| 387 | NL shift, and go to state 37 |
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| 388 | |||
| 389 | |||
| 390 | |||
| 391 | state 35 |
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| 392 | |||
| 393 | skip_line -> NL . (rule 16) |
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| 394 | |||
| 395 | $default reduce using rule 16 (skip_line) |
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| 396 | |||
| 397 | |||
| 398 | |||
| 399 | state 36 |
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| 400 | |||
| 401 | component_obj -> LBRK NL comp_ident NL comp_value NL comp_type NL skip_line . skip_line skip_line RBRK NL (rule 6) |
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| 402 | |||
| 403 | SPC shift, and go to state 34 |
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| 404 | NL shift, and go to state 35 |
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| 405 | |||
| 406 | skip_line go to state 38 |
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| 407 | |||
| 408 | |||
| 409 | |||
| 410 | state 37 |
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| 411 | |||
| 412 | skip_line -> SPC NL . (rule 17) |
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| 413 | |||
| 414 | $default reduce using rule 17 (skip_line) |
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| 415 | |||
| 416 | |||
| 417 | |||
| 418 | state 38 |
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| 419 | |||
| 420 | component_obj -> LBRK NL comp_ident NL comp_value NL comp_type NL skip_line skip_line . skip_line RBRK NL (rule 6) |
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| 421 | |||
| 422 | SPC shift, and go to state 34 |
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| 423 | NL shift, and go to state 35 |
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| 424 | |||
| 425 | skip_line go to state 39 |
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| 426 | |||
| 427 | |||
| 428 | |||
| 429 | state 39 |
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| 430 | |||
| 431 | component_obj -> LBRK NL comp_ident NL comp_value NL comp_type NL skip_line skip_line skip_line . RBRK NL (rule 6) |
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| 432 | |||
| 433 | RBRK shift, and go to state 40 |
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| 434 | |||
| 435 | |||
| 436 | |||
| 437 | state 40 |
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| 438 | |||
| 439 | component_obj -> LBRK NL comp_ident NL comp_value NL comp_type NL skip_line skip_line skip_line RBRK . NL (rule 6) |
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| 440 | |||
| 441 | NL shift, and go to state 41 |
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| 442 | |||
| 443 | |||
| 444 | |||
| 445 | state 41 |
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| 446 | |||
| 447 | component_obj -> LBRK NL comp_ident NL comp_value NL comp_type NL skip_line skip_line skip_line RBRK NL . (rule 6) |
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| 448 | |||
| 449 | $default reduce using rule 6 (component_obj) |
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| 450 | |||
| 451 | |||
| 452 | |||
| 453 | state 42 |
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| 454 | |||
| 455 | $ go to state 43 |
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| 456 | |||
| 457 | |||
| 458 | |||
| 459 | state 43 |
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| 460 | |||
| 461 | $ go to state 44 |
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| 462 | |||
| 463 | |||
| 464 | |||
| 465 | state 44 |
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| 466 | |||
| 467 | $default accept |
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| 468 | |||
| 469 |