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| Rev | Author | Line No. | Line |
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| 2 | mjames | 1 | /* |
| 2 | ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, |
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| 3 | 2011,2012 Giovanni Di Sirio. |
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| 4 | |||
| 5 | This file is part of ChibiOS/RT. |
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| 6 | |||
| 7 | ChibiOS/RT is free software; you can redistribute it and/or modify |
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| 8 | it under the terms of the GNU General Public License as published by |
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| 9 | the Free Software Foundation; either version 3 of the License, or |
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| 10 | (at your option) any later version. |
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| 11 | |||
| 12 | ChibiOS/RT is distributed in the hope that it will be useful, |
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| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 15 | GNU General Public License for more details. |
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| 16 | |||
| 17 | You should have received a copy of the GNU General Public License |
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| 18 | along with this program. If not, see <http://www.gnu.org/licenses/>. |
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| 19 | |||
| 20 | --- |
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| 21 | |||
| 22 | A special exception to the GPL can be applied should you wish to distribute |
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| 23 | a combined work that includes ChibiOS/RT, without being obliged to provide |
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| 24 | the source code for any proprietary components. See the file exception.txt |
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| 25 | for full details of how and when the exception can be applied. |
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| 26 | */ |
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| 27 | |||
| 28 | /* |
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| 29 | * STM32F1xx drivers configuration. |
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| 30 | * The following settings override the default settings present in |
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| 31 | * the various device driver implementation headers. |
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| 32 | * Note that the settings for each driver only have effect if the whole |
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| 33 | * driver is enabled in halconf.h. |
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| 34 | * |
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| 35 | * IRQ priorities: |
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| 36 | * 15...0 Lowest...Highest. |
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| 37 | * |
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| 38 | * DMA priorities: |
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| 39 | * 0...3 Lowest...Highest. |
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| 40 | */ |
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| 7 | mjames | 41 | #define STM32F103_MCUCONF |
| 2 | mjames | 42 | |
| 43 | /* |
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| 44 | * HAL driver system settings. |
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| 45 | */ |
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| 46 | #define STM32_NO_INIT FALSE |
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| 47 | #define STM32_HSI_ENABLED TRUE |
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| 48 | #define STM32_LSI_ENABLED FALSE |
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| 49 | #define STM32_HSE_ENABLED TRUE |
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| 50 | #define STM32_LSE_ENABLED FALSE |
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| 51 | #define STM32_SW STM32_SW_PLL |
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| 52 | #define STM32_PLLSRC STM32_PLLSRC_HSE |
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| 53 | #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 |
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| 54 | #define STM32_PLLMUL_VALUE 9 |
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| 55 | #define STM32_HPRE STM32_HPRE_DIV1 |
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| 56 | #define STM32_PPRE1 STM32_PPRE1_DIV2 |
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| 57 | #define STM32_PPRE2 STM32_PPRE2_DIV2 |
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| 58 | #define STM32_ADCPRE STM32_ADCPRE_DIV4 |
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| 59 | #define STM32_USB_CLOCK_REQUIRED TRUE |
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| 60 | #define STM32_USBPRE STM32_USBPRE_DIV1P5 |
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| 61 | #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK |
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| 62 | #define STM32_RTCSEL STM32_RTCSEL_HSEDIV |
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| 63 | #define STM32_PVD_ENABLE FALSE |
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| 64 | #define STM32_PLS STM32_PLS_LEV0 |
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| 65 | |||
| 66 | /* |
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| 67 | * ADC driver system settings. |
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| 68 | */ |
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| 69 | #define STM32_ADC_USE_ADC1 TRUE |
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| 70 | #define STM32_ADC_ADC1_DMA_PRIORITY 2 |
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| 71 | #define STM32_ADC_ADC1_IRQ_PRIORITY 5 |
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| 72 | |||
| 73 | /* |
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| 74 | * CAN driver system settings. |
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| 75 | */ |
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| 76 | #define STM32_CAN_USE_CAN1 TRUE |
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| 77 | #define STM32_CAN_CAN1_IRQ_PRIORITY 11 |
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| 78 | |||
| 79 | /* |
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| 7 | mjames | 80 | * IRQ system settings. |
| 2 | mjames | 81 | */ |
| 7 | mjames | 82 | #define STM32_IRQ_EXTI0_PRIORITY 6 |
| 83 | #define STM32_IRQ_EXTI1_PRIORITY 6 |
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| 84 | #define STM32_IRQ_EXTI2_PRIORITY 6 |
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| 85 | #define STM32_IRQ_EXTI3_PRIORITY 6 |
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| 86 | #define STM32_IRQ_EXTI4_PRIORITY 6 |
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| 87 | #define STM32_IRQ_EXTI5_9_PRIORITY 6 |
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| 88 | #define STM32_IRQ_EXTI10_15_PRIORITY 6 |
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| 89 | #define STM32_IRQ_EXTI16_PRIORITY 6 |
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| 90 | #define STM32_IRQ_EXTI17_PRIORITY 6 |
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| 91 | #define STM32_IRQ_EXTI18_PRIORITY 6 |
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| 92 | #define STM32_IRQ_EXTI19_PRIORITY 6 |
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| 2 | mjames | 93 | |
| 94 | /* |
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| 95 | * GPT driver system settings. |
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| 96 | */ |
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| 97 | #define STM32_GPT_USE_TIM1 FALSE |
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| 8 | mjames | 98 | #define STM32_GPT_USE_TIM2 TRUE |
| 2 | mjames | 99 | #define STM32_GPT_USE_TIM3 FALSE |
| 100 | #define STM32_GPT_USE_TIM4 FALSE |
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| 101 | #define STM32_GPT_USE_TIM5 FALSE |
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| 102 | #define STM32_GPT_USE_TIM8 FALSE |
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| 103 | #define STM32_GPT_TIM1_IRQ_PRIORITY 7 |
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| 104 | #define STM32_GPT_TIM2_IRQ_PRIORITY 7 |
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| 105 | #define STM32_GPT_TIM3_IRQ_PRIORITY 7 |
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| 106 | #define STM32_GPT_TIM4_IRQ_PRIORITY 7 |
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| 107 | #define STM32_GPT_TIM5_IRQ_PRIORITY 7 |
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| 108 | #define STM32_GPT_TIM8_IRQ_PRIORITY 7 |
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| 109 | |||
| 110 | /* |
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| 111 | * I2C driver system settings. |
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| 112 | */ |
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| 113 | #define STM32_I2C_USE_I2C1 FALSE |
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| 9 | mjames | 114 | #define STM32_I2C_USE_I2C2 TRUE |
| 2 | mjames | 115 | #define STM32_I2C_USE_I2C3 FALSE |
| 116 | #define STM32_I2C_I2C1_IRQ_PRIORITY 10 |
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| 117 | #define STM32_I2C_I2C2_IRQ_PRIORITY 10 |
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| 118 | #define STM32_I2C_I2C3_IRQ_PRIORITY 10 |
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| 119 | #define STM32_I2C_I2C1_DMA_PRIORITY 1 |
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| 120 | #define STM32_I2C_I2C2_DMA_PRIORITY 1 |
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| 121 | #define STM32_I2C_I2C3_DMA_PRIORITY 1 |
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| 122 | #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() |
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| 123 | #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() |
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| 124 | #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() |
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| 125 | |||
| 126 | /* |
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| 127 | * ICU driver system settings. |
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| 128 | */ |
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| 129 | #define STM32_ICU_USE_TIM1 FALSE |
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| 130 | #define STM32_ICU_USE_TIM2 FALSE |
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| 131 | #define STM32_ICU_USE_TIM3 FALSE |
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| 132 | #define STM32_ICU_USE_TIM4 FALSE |
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| 133 | #define STM32_ICU_USE_TIM5 FALSE |
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| 134 | #define STM32_ICU_USE_TIM8 FALSE |
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| 135 | #define STM32_ICU_TIM1_IRQ_PRIORITY 7 |
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| 136 | #define STM32_ICU_TIM2_IRQ_PRIORITY 7 |
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| 137 | #define STM32_ICU_TIM3_IRQ_PRIORITY 7 |
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| 138 | #define STM32_ICU_TIM4_IRQ_PRIORITY 7 |
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| 139 | #define STM32_ICU_TIM5_IRQ_PRIORITY 7 |
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| 140 | #define STM32_ICU_TIM8_IRQ_PRIORITY 7 |
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| 141 | |||
| 142 | /* |
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| 143 | * PWM driver system settings. |
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| 144 | */ |
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| 145 | #define STM32_PWM_USE_ADVANCED FALSE |
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| 146 | #define STM32_PWM_USE_TIM1 FALSE |
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| 147 | #define STM32_PWM_USE_TIM2 FALSE |
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| 148 | #define STM32_PWM_USE_TIM3 FALSE |
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| 149 | #define STM32_PWM_USE_TIM4 FALSE |
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| 150 | #define STM32_PWM_USE_TIM5 FALSE |
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| 151 | #define STM32_PWM_USE_TIM8 FALSE |
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| 152 | #define STM32_PWM_TIM1_IRQ_PRIORITY 7 |
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| 153 | #define STM32_PWM_TIM2_IRQ_PRIORITY 7 |
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| 154 | #define STM32_PWM_TIM3_IRQ_PRIORITY 7 |
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| 155 | #define STM32_PWM_TIM4_IRQ_PRIORITY 7 |
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| 156 | #define STM32_PWM_TIM5_IRQ_PRIORITY 7 |
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| 157 | #define STM32_PWM_TIM8_IRQ_PRIORITY 7 |
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| 158 | |||
| 159 | /* |
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| 160 | * RTC driver system settings. |
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| 161 | */ |
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| 162 | #define STM32_RTC_IRQ_PRIORITY 15 |
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| 163 | |||
| 164 | /* |
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| 165 | * SERIAL driver system settings. |
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| 166 | */ |
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| 167 | #define STM32_SERIAL_USE_USART1 FALSE |
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| 168 | #define STM32_SERIAL_USE_USART2 TRUE |
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| 169 | #define STM32_SERIAL_USE_USART3 FALSE |
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| 170 | #define STM32_SERIAL_USE_UART4 FALSE |
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| 171 | #define STM32_SERIAL_USE_UART5 FALSE |
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| 172 | #define STM32_SERIAL_USE_USART6 FALSE |
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| 173 | #define STM32_SERIAL_USART1_PRIORITY 12 |
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| 174 | #define STM32_SERIAL_USART2_PRIORITY 12 |
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| 175 | #define STM32_SERIAL_USART3_PRIORITY 12 |
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| 176 | #define STM32_SERIAL_UART4_PRIORITY 12 |
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| 177 | #define STM32_SERIAL_UART5_PRIORITY 12 |
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| 178 | #define STM32_SERIAL_USART6_PRIORITY 12 |
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| 179 | |||
| 180 | /* |
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| 181 | * SPI driver system settings. |
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| 182 | */ |
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| 3 | mjames | 183 | #define STM32_SPI_USE_SPI1 TRUE |
| 184 | #define STM32_SPI_USE_SPI2 FALSE |
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| 2 | mjames | 185 | #define STM32_SPI_USE_SPI3 FALSE |
| 186 | #define STM32_SPI_SPI1_DMA_PRIORITY 1 |
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| 187 | #define STM32_SPI_SPI2_DMA_PRIORITY 1 |
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| 188 | #define STM32_SPI_SPI3_DMA_PRIORITY 1 |
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| 189 | #define STM32_SPI_SPI1_IRQ_PRIORITY 10 |
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| 190 | #define STM32_SPI_SPI2_IRQ_PRIORITY 10 |
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| 191 | #define STM32_SPI_SPI3_IRQ_PRIORITY 10 |
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| 7 | mjames | 192 | #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") |
| 193 | /* |
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| 194 | * ST driver system settings. |
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| 195 | */ |
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| 196 | //#define STM32_ST_IRQ_PRIORITY 8 |
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| 8 | mjames | 197 | #define STM32_ST_USE_TIMER 4 |
| 2 | mjames | 198 | |
| 199 | /* |
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| 200 | * UART driver system settings. |
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| 201 | */ |
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| 202 | #define STM32_UART_USE_USART1 FALSE |
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| 203 | #define STM32_UART_USE_USART2 FALSE |
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| 204 | #define STM32_UART_USE_USART3 FALSE |
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| 205 | #define STM32_UART_USART1_IRQ_PRIORITY 12 |
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| 206 | #define STM32_UART_USART2_IRQ_PRIORITY 12 |
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| 207 | #define STM32_UART_USART3_IRQ_PRIORITY 12 |
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| 208 | #define STM32_UART_USART1_DMA_PRIORITY 0 |
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| 209 | #define STM32_UART_USART2_DMA_PRIORITY 0 |
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| 210 | #define STM32_UART_USART3_DMA_PRIORITY 0 |
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| 7 | mjames | 211 | #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") |
| 2 | mjames | 212 | |
| 213 | /* |
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| 214 | * USB driver system settings. |
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| 215 | */ |
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| 216 | #define STM32_USB_USE_USB1 TRUE |
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| 217 | #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE |
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| 218 | #define STM32_USB_USB1_HP_IRQ_PRIORITY 6 |
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| 219 | #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 |
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| 7 | mjames | 220 | |
| 221 | /* |
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| 222 | * WDG driver system settings. |
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| 223 | */ |
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| 224 | #define STM32_WDG_USE_IWDG FALSE |
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| 225 | |||
| 226 |