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| 7 | mjames | 1 | /* |
| 2 | ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, |
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| 3 | 2011,2012 Giovanni Di Sirio. |
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| 4 | |||
| 5 | This file is part of ChibiOS/RT. |
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| 6 | |||
| 7 | ChibiOS/RT is free software; you can redistribute it and/or modify |
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| 8 | it under the terms of the GNU General Public License as published by |
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| 9 | the Free Software Foundation; either version 3 of the License, or |
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| 10 | (at your option) any later version. |
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| 11 | |||
| 12 | ChibiOS/RT is distributed in the hope that it will be useful, |
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| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 15 | GNU General Public License for more details. |
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| 16 | |||
| 17 | You should have received a copy of the GNU General Public License |
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| 18 | along with this program. If not, see <http://www.gnu.org/licenses/>. |
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| 19 | |||
| 20 | --- |
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| 21 | |||
| 22 | A special exception to the GPL can be applied should you wish to distribute |
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| 23 | a combined work that includes ChibiOS/RT, without being obliged to provide |
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| 24 | the source code for any proprietary components. See the file exception.txt |
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| 25 | for full details of how and when the exception can be applied. |
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| 26 | */ |
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| 27 | |||
| 28 | #ifndef _BOARD_H_ |
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| 29 | #define _BOARD_H_ |
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| 30 | |||
| 31 | /* |
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| 32 | * Setup for the bluePill STM32F103 proto board. |
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| 33 | */ |
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| 34 | |||
| 35 | /* |
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| 36 | * Board identifier. |
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| 37 | */ |
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| 38 | #define BOARD_ST_BLUE_PILL_F103 |
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| 39 | #define BOARD_NAME "Blue Pill STM32F103" |
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| 40 | |||
| 41 | /* |
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| 42 | * Board frequencies. |
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| 43 | */ |
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| 44 | #define STM32_LSECLK 32768 |
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| 45 | #define STM32_HSECLK 8000000 |
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| 46 | |||
| 47 | /* |
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| 48 | * MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h. |
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| 49 | */ |
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| 50 | #define STM32F103xB |
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| 51 | |||
| 52 | /* |
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| 53 | * IO pins assignments. |
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| 54 | */ |
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| 55 | |||
| 56 | #define GPIOC_LED 13 |
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| 57 | |||
| 58 | #define GPIOA_STROBE 0 |
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| 59 | #define GPIOA_COIL 6 |
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| 60 | |||
| 61 | |||
| 62 | /* |
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| 63 | * I/O ports initial setup, this configuration is established soon after reset |
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| 64 | * in the initialization code. |
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| 65 | * |
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| 66 | * The digits have the following meaning: |
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| 67 | * 0 - Analog input. |
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| 68 | * 1 - Push Pull output 10MHz. |
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| 69 | * 2 - Push Pull output 2MHz. |
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| 70 | * 3 - Push Pull output 50MHz. |
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| 71 | * 4 - Digital input. |
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| 72 | * 5 - Open Drain output 10MHz. |
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| 73 | * 6 - Open Drain output 2MHz. |
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| 74 | * 7 - Open Drain output 50MHz. |
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| 75 | * 8 - Digital input with PullUp or PullDown resistor depending on ODR. |
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| 76 | * 9 - Alternate Push Pull output 10MHz. |
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| 77 | * A - Alternate Push Pull output 2MHz. |
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| 78 | * B - Alternate Push Pull output 50MHz. |
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| 79 | * C - Reserved. |
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| 80 | * D - Alternate Open Drain output 10MHz. |
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| 81 | * E - Alternate Open Drain output 2MHz. |
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| 82 | * F - Alternate Open Drain output 50MHz. |
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| 83 | * Please refer to the STM32 Reference Manual for details. |
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| 84 | */ |
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| 85 | |||
| 86 | /* |
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| 87 | * Port A setup. |
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| 88 | * Everything input with pull-up except: |
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| 89 | * PA0 - Alternate open drain output Timer 2 Channel 1 (STROBE). |
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| 90 | * PA1 - Digital Input Timer 2 Channel 2 |
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| 91 | * PA2 - ADC channel 2 |
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| 92 | * PA3 - ADC channel 3 |
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| 93 | * PA8 - Timer 1 output 1 |
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| 94 | * |
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| 95 | */ |
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| 96 | #define VAL_GPIOACRL 0x8488008B /* PA7...PA0 */ |
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| 97 | #define VAL_GPIOACRH 0x8888888B /* PA15...PA8 */ |
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| 98 | #define VAL_GPIOAODR 0xFFFFFFFF |
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| 99 | |||
| 100 | /* |
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| 101 | * Port B setup. |
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| 102 | * Everything input with pull-up except: |
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| 103 | * PB5 - SPI1 MOSI 2MHz |
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| 104 | * PB3- SPI1 SCK1 2MHz |
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| 105 | * PB6 Display CS |
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| 106 | * PB7 Display CD |
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| 107 | * PB8 Display Reset |
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| 108 | */ |
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| 109 | #define VAL_GPIOBCRL 0x11989888 /* PB7...PB0 */ |
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| 110 | #define VAL_GPIOBCRH 0x88888881 /* PB15...PB8 */ |
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| 111 | #define VAL_GPIOBODR 0xFFFFFFFF |
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| 112 | |||
| 113 | /* |
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| 114 | * Port C setup. |
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| 115 | * Everything input with pull-up except: |
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| 116 | |||
| 117 | * PC13 - Push Pull output (LED). |
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| 118 | */ |
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| 119 | #define VAL_GPIOCCRL 0x88888888 /* PC7...PC0 */ |
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| 120 | #define VAL_GPIOCCRH 0x88388888 /* PC15...PC8 */ |
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| 121 | #define VAL_GPIOCODR 0xFFFFFFFF |
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| 122 | |||
| 123 | /* |
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| 124 | * Port D setup. |
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| 125 | * Everything input with pull-up except: |
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| 126 | * PD0 - Normal input (XTAL). |
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| 127 | * PD1 - Normal input (XTAL). |
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| 128 | */ |
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| 129 | #define VAL_GPIODCRL 0x88888844 /* PD7...PD0 */ |
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| 130 | #define VAL_GPIODCRH 0x88888888 /* PD15...PD8 */ |
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| 131 | #define VAL_GPIODODR 0xFFFFFFFF |
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| 132 | |||
| 133 | /* |
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| 134 | * Port E setup. |
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| 135 | * Everything input with pull-up except: |
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| 136 | */ |
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| 137 | #define VAL_GPIOECRL 0x88888888 /* PE7...PE0 */ |
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| 138 | #define VAL_GPIOECRH 0x88888888 /* PE15...PE8 */ |
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| 139 | #define VAL_GPIOEODR 0xFFFFFFFF |
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| 140 | |||
| 141 | |||
| 142 | /* |
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| 143 | * USB bus activation macro, required by the USB driver. |
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| 144 | */ |
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| 145 | #define usb_lld_connect_bus(usbp) {} |
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| 146 | |||
| 147 | /* |
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| 148 | * USB bus de-activation macro, required by the USB driver. |
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| 149 | */ |
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| 150 | #define usb_lld_disconnect_bus(usbp) {} |
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| 151 | |||
| 152 | |||
| 153 | #if !defined(_FROM_ASM_) |
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| 154 | #ifdef __cplusplus |
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| 155 | extern "C" { |
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| 156 | #endif |
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| 157 | void boardInit(void); |
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| 158 | #ifdef __cplusplus |
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| 159 | } |
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| 160 | #endif |
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| 161 | #endif /* _FROM_ASM_ */ |
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| 162 | |||
| 163 | #endif /* _BOARD_H_ */ |