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| Rev | Author | Line No. | Line |
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| 2 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
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| 3 | * @file stm32l1xx_it.c |
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| 4 | * @brief Interrupt Service Routines. |
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| 5 | ****************************************************************************** |
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| 6 | * |
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| 18 | mjames | 7 | * COPYRIGHT(c) 2017 STMicroelectronics |
| 2 | mjames | 8 | * |
| 9 | * Redistribution and use in source and binary forms, with or without modification, |
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| 10 | * are permitted provided that the following conditions are met: |
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| 11 | * 1. Redistributions of source code must retain the above copyright notice, |
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| 12 | * this list of conditions and the following disclaimer. |
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| 13 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
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| 14 | * this list of conditions and the following disclaimer in the documentation |
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| 15 | * and/or other materials provided with the distribution. |
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| 16 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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| 17 | * may be used to endorse or promote products derived from this software |
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| 18 | * without specific prior written permission. |
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| 19 | * |
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| 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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| 21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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| 22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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| 23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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| 24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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| 25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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| 26 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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| 27 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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| 28 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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| 29 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 30 | * |
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| 31 | ****************************************************************************** |
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| 32 | */ |
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| 33 | /* Includes ------------------------------------------------------------------*/ |
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| 34 | #include "stm32l1xx_hal.h" |
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| 35 | #include "stm32l1xx.h" |
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| 36 | #include "stm32l1xx_it.h" |
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| 37 | |||
| 38 | /* USER CODE BEGIN 0 */ |
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| 39 | |||
| 40 | /* USER CODE END 0 */ |
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| 41 | |||
| 42 | /* External variables --------------------------------------------------------*/ |
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| 6 | mjames | 43 | extern DMA_HandleTypeDef hdma_adc; |
| 2 | mjames | 44 | |
| 45 | /******************************************************************************/ |
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| 46 | /* Cortex-M3 Processor Interruption and Exception Handlers */ |
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| 47 | /******************************************************************************/ |
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| 48 | |||
| 49 | /** |
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| 50 | * @brief This function handles Non maskable interrupt. |
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| 51 | */ |
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| 52 | void NMI_Handler(void) |
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| 53 | { |
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| 54 | /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ |
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| 55 | |||
| 56 | /* USER CODE END NonMaskableInt_IRQn 0 */ |
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| 57 | /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ |
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| 58 | |||
| 59 | /* USER CODE END NonMaskableInt_IRQn 1 */ |
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| 60 | } |
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| 61 | |||
| 62 | /** |
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| 63 | * @brief This function handles Hard fault interrupt. |
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| 64 | */ |
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| 65 | void HardFault_Handler(void) |
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| 66 | { |
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| 67 | /* USER CODE BEGIN HardFault_IRQn 0 */ |
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| 68 | |||
| 69 | /* USER CODE END HardFault_IRQn 0 */ |
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| 70 | while (1) |
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| 71 | { |
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| 72 | } |
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| 73 | /* USER CODE BEGIN HardFault_IRQn 1 */ |
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| 74 | |||
| 75 | /* USER CODE END HardFault_IRQn 1 */ |
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| 76 | } |
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| 77 | |||
| 78 | /** |
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| 79 | * @brief This function handles Memory management fault. |
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| 80 | */ |
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| 81 | void MemManage_Handler(void) |
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| 82 | { |
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| 83 | /* USER CODE BEGIN MemoryManagement_IRQn 0 */ |
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| 84 | |||
| 85 | /* USER CODE END MemoryManagement_IRQn 0 */ |
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| 86 | while (1) |
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| 87 | { |
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| 88 | } |
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| 89 | /* USER CODE BEGIN MemoryManagement_IRQn 1 */ |
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| 90 | |||
| 91 | /* USER CODE END MemoryManagement_IRQn 1 */ |
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| 92 | } |
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| 93 | |||
| 94 | /** |
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| 95 | * @brief This function handles Pre-fetch fault, memory access fault. |
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| 96 | */ |
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| 97 | void BusFault_Handler(void) |
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| 98 | { |
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| 99 | /* USER CODE BEGIN BusFault_IRQn 0 */ |
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| 100 | |||
| 101 | /* USER CODE END BusFault_IRQn 0 */ |
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| 102 | while (1) |
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| 103 | { |
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| 104 | } |
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| 105 | /* USER CODE BEGIN BusFault_IRQn 1 */ |
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| 106 | |||
| 107 | /* USER CODE END BusFault_IRQn 1 */ |
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| 108 | } |
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| 109 | |||
| 110 | /** |
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| 111 | * @brief This function handles Undefined instruction or illegal state. |
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| 112 | */ |
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| 113 | void UsageFault_Handler(void) |
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| 114 | { |
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| 115 | /* USER CODE BEGIN UsageFault_IRQn 0 */ |
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| 116 | |||
| 117 | /* USER CODE END UsageFault_IRQn 0 */ |
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| 118 | while (1) |
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| 119 | { |
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| 120 | } |
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| 121 | /* USER CODE BEGIN UsageFault_IRQn 1 */ |
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| 122 | |||
| 123 | /* USER CODE END UsageFault_IRQn 1 */ |
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| 124 | } |
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| 125 | |||
| 126 | /** |
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| 127 | * @brief This function handles System service call via SWI instruction. |
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| 128 | */ |
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| 129 | void SVC_Handler(void) |
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| 130 | { |
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| 131 | /* USER CODE BEGIN SVC_IRQn 0 */ |
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| 132 | |||
| 133 | /* USER CODE END SVC_IRQn 0 */ |
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| 134 | /* USER CODE BEGIN SVC_IRQn 1 */ |
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| 135 | |||
| 136 | /* USER CODE END SVC_IRQn 1 */ |
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| 137 | } |
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| 138 | |||
| 139 | /** |
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| 140 | * @brief This function handles Debug monitor. |
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| 141 | */ |
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| 142 | void DebugMon_Handler(void) |
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| 143 | { |
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| 144 | /* USER CODE BEGIN DebugMonitor_IRQn 0 */ |
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| 145 | |||
| 146 | /* USER CODE END DebugMonitor_IRQn 0 */ |
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| 147 | /* USER CODE BEGIN DebugMonitor_IRQn 1 */ |
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| 148 | |||
| 149 | /* USER CODE END DebugMonitor_IRQn 1 */ |
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| 150 | } |
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| 151 | |||
| 152 | /** |
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| 153 | * @brief This function handles Pendable request for system service. |
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| 154 | */ |
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| 155 | void PendSV_Handler(void) |
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| 156 | { |
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| 157 | /* USER CODE BEGIN PendSV_IRQn 0 */ |
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| 158 | |||
| 159 | /* USER CODE END PendSV_IRQn 0 */ |
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| 160 | /* USER CODE BEGIN PendSV_IRQn 1 */ |
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| 161 | |||
| 162 | /* USER CODE END PendSV_IRQn 1 */ |
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| 163 | } |
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| 164 | |||
| 165 | /** |
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| 166 | * @brief This function handles System tick timer. |
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| 167 | */ |
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| 168 | void SysTick_Handler(void) |
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| 169 | { |
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| 170 | /* USER CODE BEGIN SysTick_IRQn 0 */ |
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| 171 | |||
| 172 | /* USER CODE END SysTick_IRQn 0 */ |
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| 173 | HAL_IncTick(); |
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| 174 | HAL_SYSTICK_IRQHandler(); |
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| 175 | /* USER CODE BEGIN SysTick_IRQn 1 */ |
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| 176 | |||
| 177 | /* USER CODE END SysTick_IRQn 1 */ |
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| 178 | } |
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| 179 | |||
| 180 | /******************************************************************************/ |
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| 181 | /* STM32L1xx Peripheral Interrupt Handlers */ |
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| 182 | /* Add here the Interrupt Handlers for the used peripherals. */ |
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| 183 | /* For the available peripheral interrupt handler names, */ |
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| 184 | /* please refer to the startup file (startup_stm32l1xx.s). */ |
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| 185 | /******************************************************************************/ |
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| 186 | |||
| 6 | mjames | 187 | /** |
| 188 | * @brief This function handles DMA1 channel1 global interrupt. |
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| 189 | */ |
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| 190 | void DMA1_Channel1_IRQHandler(void) |
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| 191 | { |
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| 192 | /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */ |
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| 193 | |||
| 194 | /* USER CODE END DMA1_Channel1_IRQn 0 */ |
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| 195 | HAL_DMA_IRQHandler(&hdma_adc); |
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| 196 | /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */ |
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| 197 | |||
| 198 | /* USER CODE END DMA1_Channel1_IRQn 1 */ |
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| 199 | } |
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| 200 | |||
| 2 | mjames | 201 | /* USER CODE BEGIN 1 */ |
| 202 | |||
| 203 | /* USER CODE END 1 */ |
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| 204 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |