WebSVN – EngineBay2 – Blame – /trunk/Src/misc.c

Rev	Author	Line No.	Line
3	mjames	1	/*
		2	* misc.c
		3	*
		4	* Created on: 21 Sep 2016
		5	* Author: Mike
		6	*/
8	mjames	7	#include "stm32l1xx_hal.h"
9	mjames	8	#include "misc.h"
		9	#include "main.h"
3	mjames	10
9	mjames	11
28	mjames	12	extern TIM_HandleTypeDef htim2;
		13	extern TIM_HandleTypeDef htim3;
		14	extern TIM_HandleTypeDef htim6;
9	mjames	15
		16
28	mjames	17	unsigned volatile long RPM_Time[RPM_SAMPLES]; // sampled on both edges
		18	unsigned volatile char RPM_Level[RPM_SAMPLES]; // active level when sampled
		19	unsigned volatile long RPM_Count; // incremented every reading
3	mjames	20
6	mjames	21
8	mjames	22	void TIM2_IRQHandler(void)
		23	{
9	mjames	24	if(__HAL_TIM_GET_FLAG(&htim2, TIM_FLAG_CC1))
		25	{
		26	__HAL_TIM_CLEAR_FLAG(&htim2, TIM_FLAG_CC1) ;
28	mjames	27	RPM_Time[RPM_Count] = __HAL_TIM_GET_COMPARE(&htim2,TIM_CHANNEL_1);
		28	RPM_Level[RPM_Count] =
		29	HAL_GPIO_ReadPin(CB_Pulse_GPIO_Port, CB_Pulse_Pin);
		30	RPM_Count = (RPM_Count+1) % RPM_SAMPLES ;
		31
		32	__HAL_TIM_SET_COUNTER(&htim3,0); // trigger timer 3 by setting the count to zero
		33
9	mjames	34	}
8	mjames	35	}
		36
		37
		38	char blink = 0;
		39	// 100mS periodic sampler handler
		40	void TIM6_IRQHandler(void)
		41	{
9	mjames	42	if(__HAL_TIM_GET_FLAG(&htim6, TIM_FLAG_UPDATE))
		43	{
		44	__HAL_TIM_CLEAR_FLAG(&htim6, TIM_FLAG_UPDATE) ;
8	mjames	45
9	mjames	46	blink = !blink;
		47	HAL_GPIO_WritePin(LED_Blink_GPIO_Port, LED_Blink_Pin, blink ? GPIO_PIN_SET : GPIO_PIN_RESET);
8	mjames	48
9	mjames	49	TimerFlag = 1;
		50	if (NoSerialInCTR < 5) {
		51	NoSerialInCTR++;
		52	if (NoSerialInCTR == 5) {
		53	NoSerialIn = 1;
8	mjames	54	}
9	mjames	55	}
		56	}
8	mjames	57
		58	}
		59
28	mjames	60	void resetSerialTimeout(void)
		61	{
		62	__disable_irq();
		63	NoSerialInCTR= 0 ;
		64	NoSerialIn = 0;
		65	__enable_irq();
		66	}
8	mjames	67
6	mjames	68	#if OLD_ENGINEBAY
		69	//-----------------------------------------------------------
		70	// This is the 10Hz timer
		71
		72	void interrupt TimerISR1(void) {
		73	TimerFlag = 1;
		74	if (NoSerialInCTR < 5) {
		75	NoSerialInCTR++;
		76	if (NoSerialInCTR == 5) {
		77	NoSerialIn = 1;
		78	}
		79	}
		80	}
		81	//-----------------------------------------------------------
		82
		83
		84	volatile unsigned long RPM_Time[RPM_LIMIT];
		85	volatile unsigned long RPM_Count; // incremented every reading
		86
		87	void TimerISR0(void) {
		88	// check the listing
		89	asm volatile ("STMDB SP!, {r0-r4} ");
		90	// sort out the captures
		91	int stat = REG(TIMER0_IR);
		92	if (stat & (1 << 4)) //CR0
		93	{
		94	RPM_Time[RPM_Count++] = REG(TIMER0_CR0);
		95	if (RPM_Count == RPM_LIMIT) {
		96	RPM_Count = 0;
		97	}
		98	}
		99	if (stat & (1 << 5)) //CR1
		100	{
		101	// TDC_Time = REG(TIMER0_CR1);
		102	// TDC_Count++;
		103	}
		104
		105	REG(TIMER0_IR) = stat; // clear the interrupts just handled.
		106	REG(VICVectAddr) = 0; // reset the VIC
		107	asm volatile ("LDMIA SP!, {r0-r4} ");
		108	asm volatile ("SUBS PC,lr,#4");
		109	}
		110
		111	//-----------------------------------------------------------
		112	// UART management
		113	// serial counter
		114	#define THRE (1<<6)
		115	#define RDR (1<<0)
		116	#define BUFFSIZ 256
		117
		118	volatile char txbuff[BUFFSIZ];
		119	volatile int txptr = 0;
		120	volatile int txcnt = 0;
		121
		122	volatile char rxbuff[BUFFSIZ];
		123	volatile int rxptr = 0;
		124	volatile int rxcnt = 0;
		125
		126	void Uart0ISR(void) __attribute__((naked));
		127	void Uart0ISR(void) __attribute__((noinline));
		128	void Uart0ISR(void) {
		129	asm volatile ("STMDB SP!, {r0-r3} ");
		130	int stat;
		131	while (!((stat = REG(UART0_IIR)) & 1)) { // LSbit is inactive
		132	switch (stat & 0x0E) {
		133	case 4:
		134	case 12: {
		135	char c = REG(UART0_RBR);
		136
		137	NoSerialIn = NoSerialInCTR = 0;
		138
		139	if (rxcnt < (BUFFSIZ - 1)) {
		140	rxbuff[(rxptr + rxcnt) % BUFFSIZ] = c;
		141	rxcnt++;
		142	}
		143	}
		144	break;
		145	case 2: {
		146	if (txcnt > 0) {
		147	REG(UART0_THR) = txbuff[txptr];
		148	txcnt--;
		149	txptr++;
		150	txptr %= BUFFSIZ;
		151	} else {
		152	REG(UART0_IER) &= ~(1 << 1); // disable TX
		153	}
		154	}
		155	break;
		156	}
		157	}
		158	REG(VICVectAddr) = 0; // reset the VIC
		159	asm volatile ("LDMIA SP!, {r0-r3} ");
		160	asm volatile ("SUBS PC,lr,#4");
		161	}
		162
		163	int my_putchar(int c) {
		164	int rc = 0;
		165	{
		166	STI;
		167	if (!(REG(UART0_IER) & (1 << 1))) {
		168	REG(UART0_IER) \|= (1 << 1);
		169	REG(UART0_THR) = c;
		170	rc=1;
		171	} else {
		172
		173	if (txcnt < (BUFFSIZ - 1)) {
		174	txbuff[(txptr + txcnt) % BUFFSIZ] = c;
		175	txcnt++;
		176	rc = 1;
		177	}
		178	}
		179	CLI;
		180	}
		181	return rc;
		182	}
		183
		184	int my_getchar(void) {
		185
		186	int c = -1;
		187	STI;
		188	if (rxcnt) {
		189	c = rxbuff[rxptr];
		190	rxcnt--;
		191	rxptr++;
		192	rxptr %= BUFFSIZ;
		193	}
		194	CLI;
		195	return c;
		196	}
		197
		198
		199
		200	#endif

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(root)/trunk/Src/misc.c – Rev 28