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2 mjames 1
/**
2
  ******************************************************************************
3
  * @file    stm32l1xx_hal_adc_ex.c
4
  * @author  MCD Application Team
5
  * @brief   This file provides firmware functions to manage the following
6
  *          functionalities of the Analog to Digital Convertor (ADC)
7
  *          peripheral:
8
  *           + Operation functions
9
  *             ++ Start, stop, get result of conversions of injected
10
  *                group, using 2 possible modes: polling, interruption.
11
  *           + Control functions
12
  *             ++ Channels configuration on injected group
13
  *          Other functions (generic functions) are available in file
14
  *          "stm32l1xx_hal_adc.c".
15
  *
16
  @verbatim
17
  [..]
18
  (@) Sections "ADC peripheral features" and "How to use this driver" are
19
      available in file of generic functions "stm32l1xx_hal_adc.c".
20
  [..]
21
  @endverbatim
22
  ******************************************************************************
23
  * @attention
24
  *
28 mjames 25
  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
26
  * All rights reserved.</center></h2>
2 mjames 27
  *
28 mjames 28
  * This software component is licensed by ST under BSD 3-Clause license,
29
  * the "License"; You may not use this file except in compliance with the
30
  * License. You may obtain a copy of the License at:
31
  *                        opensource.org/licenses/BSD-3-Clause
2 mjames 32
  *
33
  ******************************************************************************
34
  */
35
 
36
/* Includes ------------------------------------------------------------------*/
37
#include "stm32l1xx_hal.h"
38
 
39
/** @addtogroup STM32L1xx_HAL_Driver
40
  * @{
41
  */
42
 
43
/** @defgroup ADCEx ADCEx
44
  * @brief ADC Extension HAL module driver
45
  * @{
46
  */
47
 
48
#ifdef HAL_ADC_MODULE_ENABLED
49
 
50
/* Private typedef -----------------------------------------------------------*/
51
/* Private define ------------------------------------------------------------*/
52
/** @defgroup ADCEx_Private_Constants ADCEx Private Constants
53
  * @{
54
  */
55
 
56
  /* ADC conversion cycles (unit: ADC clock cycles)                           */
57
  /* (selected sampling time + conversion time of 12 ADC clock cycles, with   */
58
  /* resolution 12 bits)                                                      */
28 mjames 59
  #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_4CYCLE5   ( 16U)
60
  #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_9CYCLES   ( 21U)
61
  #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_16CYCLES  ( 28U)
62
  #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_24CYCLES  ( 36U)
63
  #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_48CYCLES  ( 60U)
64
  #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_96CYCLES  (108U)
65
  #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_192CYCLES (204U)
66
  #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_384CYCLES (396U)
2 mjames 67
 
68
  /* Delay for temperature sensor stabilization time.                         */
69
  /* Maximum delay is 10us (refer to device datasheet, parameter tSTART).     */
70
  /* Unit: us                                                                 */
28 mjames 71
  #define ADC_TEMPSENSOR_DELAY_US         (10U)
2 mjames 72
 
73
/**
74
  * @}
75
  */
76
 
77
/* Private macro -------------------------------------------------------------*/
78
/* Private variables ---------------------------------------------------------*/
79
/* Private function prototypes -----------------------------------------------*/
80
/* Private functions ---------------------------------------------------------*/
81
 
82
/** @defgroup ADCEx_Exported_Functions ADCEx Exported Functions
83
  * @{
84
  */
85
 
86
/** @defgroup ADCEx_Exported_Functions_Group1 ADC Extended IO operation functions
87
 *  @brief    ADC Extended Input and Output operation functions
88
 *
89
@verbatim
90
 ===============================================================================
91
                      ##### IO operation functions #####
92
 ===============================================================================
93
    [..]  This section provides functions allowing to:
94
      (+) Start conversion of injected group.
95
      (+) Stop conversion of injected group.
96
      (+) Poll for conversion complete on injected group.
97
      (+) Get result of injected channel conversion.
98
      (+) Start conversion of injected group and enable interruptions.
99
      (+) Stop conversion of injected group and disable interruptions.
100
 
101
@endverbatim
102
  * @{
103
  */
104
 
105
/**
106
  * @brief  Enables ADC, starts conversion of injected group.
107
  *         Interruptions enabled in this function: None.
28 mjames 108
  * @param  hadc ADC handle
2 mjames 109
  * @retval HAL status
110
  */
111
HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc)
112
{
113
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
114
 
115
  /* Check the parameters */
116
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
117
 
118
  /* Process locked */
119
  __HAL_LOCK(hadc);
120
 
121
  /* Enable the ADC peripheral */
122
  tmp_hal_status = ADC_Enable(hadc);
123
 
124
  /* Start conversion if ADC is effectively enabled */
125
  if (tmp_hal_status == HAL_OK)
126
  {
127
    /* Set ADC state                                                          */
128
    /* - Clear state bitfield related to injected group conversion results    */
129
    /* - Set state bitfield related to injected operation                     */
130
    ADC_STATE_CLR_SET(hadc->State,
131
                      HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
132
                      HAL_ADC_STATE_INJ_BUSY);
133
 
134
    /* Check if a regular conversion is ongoing */
135
    /* Note: On this device, there is no ADC error code fields related to     */
136
    /*       conversions on group injected only. In case of conversion on     */
137
    /*       going on group regular, no error code is reset.                  */
138
    if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
139
    {
140
      /* Reset ADC all error code fields */
141
      ADC_CLEAR_ERRORCODE(hadc);
142
    }
143
 
144
    /* Process unlocked */
145
    /* Unlock before starting ADC conversions: in case of potential           */
146
    /* interruption, to let the process to ADC IRQ Handler.                   */
147
    __HAL_UNLOCK(hadc);
148
 
149
    /* Clear injected group conversion flag */
150
    /* (To ensure of no unknown state from potential previous ADC operations) */
151
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
152
 
153
    /* Enable conversion of injected group.                                   */
154
    /* If software start has been selected, conversion starts immediately.    */
155
    /* If external trigger has been selected, conversion will start at next   */
156
    /* trigger event.                                                         */
157
    /* If automatic injected conversion is enabled, conversion will start     */
158
    /* after next regular group conversion.                                   */
159
    if (ADC_IS_SOFTWARE_START_INJECTED(hadc)              &&
160
        HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO)  )
161
    {
162
      /* Enable ADC software conversion for injected channels */
163
      SET_BIT(hadc->Instance->CR2, ADC_CR2_JSWSTART);
164
    }
165
  }
166
 
167
  /* Return function status */
168
  return tmp_hal_status;
169
}
170
 
171
/**
172
  * @brief  Stop conversion of injected channels. Disable ADC peripheral if
173
  *         no regular conversion is on going.
174
  * @note   If ADC must be disabled and if conversion is on going on
175
  *         regular group, function HAL_ADC_Stop must be used to stop both
176
  *         injected and regular groups, and disable the ADC.
177
  * @note   If injected group mode auto-injection is enabled,
178
  *         function HAL_ADC_Stop must be used.
179
  * @note   In case of auto-injection mode, HAL_ADC_Stop must be used.
28 mjames 180
  * @param  hadc ADC handle
2 mjames 181
  * @retval None
182
  */
183
HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc)
184
{
185
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
186
 
187
  /* Check the parameters */
188
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
189
 
190
  /* Process locked */
191
  __HAL_LOCK(hadc);
192
 
193
  /* Stop potential conversion and disable ADC peripheral                     */
194
  /* Conditioned to:                                                          */
195
  /* - No conversion on the other group (regular group) is intended to        */
196
  /*   continue (injected and regular groups stop conversion and ADC disable  */
197
  /*   are common)                                                            */
198
  /* - In case of auto-injection mode, HAL_ADC_Stop must be used.             */
199
  if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET)  &&
200
     HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO)   )
201
  {
202
    /* Stop potential conversion on going, on regular and injected groups */
203
    /* Disable ADC peripheral */
204
    tmp_hal_status = ADC_ConversionStop_Disable(hadc);
205
 
206
    /* Check if ADC is effectively disabled */
207
    if (tmp_hal_status == HAL_OK)
208
    {
209
      /* Set ADC state */
210
      ADC_STATE_CLR_SET(hadc->State,
211
                        HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
212
                        HAL_ADC_STATE_READY);
213
    }
214
  }
215
  else
216
  {
217
    /* Update ADC state machine to error */
218
    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
219
 
220
    tmp_hal_status = HAL_ERROR;
221
  }
222
 
223
  /* Process unlocked */
224
  __HAL_UNLOCK(hadc);
225
 
226
  /* Return function status */
227
  return tmp_hal_status;
228
}
229
 
230
/**
231
  * @brief  Wait for injected group conversion to be completed.
28 mjames 232
  * @param  hadc ADC handle
233
  * @param  Timeout Timeout value in millisecond.
2 mjames 234
  * @retval HAL status
235
  */
236
HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
237
{
238
  uint32_t tickstart;
239
 
240
  /* Variables for polling in case of scan mode enabled and polling for each  */
241
  /* conversion.                                                              */
242
  /* Note: Variable "conversion_timeout_cpu_cycles" set to offset 28 CPU      */
243
  /* cycles to compensate number of CPU cycles for processing of variable     */
244
  /* "conversion_timeout_cpu_cycles_max"                                      */
245
  uint32_t conversion_timeout_cpu_cycles = 28;
246
  uint32_t conversion_timeout_cpu_cycles_max = 0;
247
 
248
  /* Check the parameters */
249
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
250
 
251
  /* Get timeout */
252
  tickstart = HAL_GetTick();  
253
 
254
  /* Polling for end of conversion: differentiation if single/sequence        */
255
  /* conversion.                                                              */
256
  /* For injected group, flag JEOC is set only at the end of the sequence,    */
257
  /* not for each conversion within the sequence.                             */
258
  /* If setting "EOCSelection" is set to poll for each single conversion,     */
259
  /* management of polling depends on setting of injected group sequencer:    */
260
  /*  - If single conversion for injected group (scan mode disabled or        */
261
  /*    InjectedNbrOfConversion ==1), flag JEOC is used to determine the      */
262
  /*    conversion completion.                                                */
263
  /*  - If sequence conversion for injected group (scan mode enabled and      */
264
  /*    InjectedNbrOfConversion >=2), flag JEOC is set only at the end of the */
265
  /*    sequence.                                                             */
266
  /*    To poll for each conversion, the maximum conversion time is computed  */
267
  /*    from ADC conversion time (selected sampling time + conversion time of */
268
  /*    12 ADC clock cycles) and APB2/ADC clock prescalers (depending on      */
269
  /*    settings, conversion time range can vary from 8 to several thousands  */
270
  /*    of CPU cycles).                                                       */
271
 
272
  /* Note: On STM32L1, setting "EOCSelection" is related to regular group     */
273
  /*       only, by hardware. For compatibility with other STM32 devices,     */
274
  /*       this setting is related also to injected group by software.        */
275
  if (((hadc->Instance->JSQR & ADC_JSQR_JL) == RESET)  ||
276
      (hadc->Init.EOCSelection != ADC_EOC_SINGLE_CONV)   )
277
  {
278
    /* Wait until End of Conversion flag is raised */
279
    while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_JEOC))
280
    {
281
      /* Check if timeout is disabled (set to infinite wait) */
282
      if(Timeout != HAL_MAX_DELAY)
283
      {
284
        if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
285
        {
286
          /* Update ADC state machine to timeout */
287
          SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
288
 
289
          /* Process unlocked */
290
          __HAL_UNLOCK(hadc);
291
 
292
          return HAL_TIMEOUT;
293
        }
294
      }
295
    }
296
  }
297
  else
298
  {
299
    /* Computation of CPU cycles corresponding to ADC conversion cycles.      */
300
    /* Retrieve ADC clock prescaler and ADC maximum conversion cycles on all  */
301
    /* channels.                                                              */
302
    conversion_timeout_cpu_cycles_max = ADC_GET_CLOCK_PRESCALER_DECIMAL(hadc);
303
    conversion_timeout_cpu_cycles_max *= ADC_CONVCYCLES_MAX_RANGE(hadc);
304
 
305
    /* Poll with maximum conversion time */
306
    while(conversion_timeout_cpu_cycles < conversion_timeout_cpu_cycles_max)
307
    {
308
      /* Check if timeout is disabled (set to infinite wait) */
309
      if(Timeout != HAL_MAX_DELAY)
310
      {
311
        if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
312
        {
313
          /* Update ADC state machine to timeout */
314
          SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
315
 
316
          /* Process unlocked */
317
          __HAL_UNLOCK(hadc);
318
 
319
          return HAL_TIMEOUT;
320
        }
321
      }
322
      conversion_timeout_cpu_cycles ++;
323
    }
324
  }
325
 
326
  /* Clear end of conversion flag of injected group if low power feature      */
327
  /* "Auto Wait" is disabled, to not interfere with this feature until data   */
328
  /* register is read using function HAL_ADCEx_InjectedGetValue().            */
329
  if (hadc->Init.LowPowerAutoWait == DISABLE)
330
  {
331
    /* Clear injected group conversion flag */
332
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JSTRT | ADC_FLAG_JEOC);
333
  }
334
 
335
  /* Update ADC state machine */
336
  SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
337
 
338
  /* Determine whether any further conversion upcoming on group injected      */
339
  /* by external trigger, continuous mode or scan sequence on going.          */
340
  /* Note: On STM32L1, there is no independent flag of end of sequence.       */
341
  /*       The test of scan sequence on going is done either with scan        */
342
  /*       sequence disabled or with end of conversion flag set to            */
343
  /*       of end of sequence.                                                */
344
  if(ADC_IS_SOFTWARE_START_INJECTED(hadc)                    &&
345
     (HAL_IS_BIT_CLR(hadc->Instance->JSQR, ADC_JSQR_JL)  ||
346
      HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS)    ) &&
347
     (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) &&
348
      (ADC_IS_SOFTWARE_START_REGULAR(hadc)       &&
349
      (hadc->Init.ContinuousConvMode == DISABLE)   )       )   )
350
  {
351
    /* Set ADC state */
352
    CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
353
 
354
    if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
355
    {
356
      SET_BIT(hadc->State, HAL_ADC_STATE_READY);
357
    }
358
  }
359
 
360
  /* Return ADC state */
361
  return HAL_OK;
362
}
363
 
364
/**
365
  * @brief  Enables ADC, starts conversion of injected group with interruption.
366
  *          - JEOC (end of conversion of injected group)
367
  *         Each of these interruptions has its dedicated callback function.
28 mjames 368
  * @param  hadc ADC handle
2 mjames 369
  * @retval HAL status.
370
  */
371
HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc)
372
{
373
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
374
 
375
  /* Check the parameters */
376
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
377
 
378
  /* Process locked */
379
  __HAL_LOCK(hadc);
380
 
381
  /* Enable the ADC peripheral */
382
  tmp_hal_status = ADC_Enable(hadc);
383
 
384
  /* Start conversion if ADC is effectively enabled */
385
  if (tmp_hal_status == HAL_OK)
386
  {
387
    /* Set ADC state                                                          */
388
    /* - Clear state bitfield related to injected group conversion results    */
389
    /* - Set state bitfield related to injected operation                     */
390
    ADC_STATE_CLR_SET(hadc->State,
391
                      HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
392
                      HAL_ADC_STATE_INJ_BUSY);
393
 
394
    /* Check if a regular conversion is ongoing */
395
    /* Note: On this device, there is no ADC error code fields related to     */
396
    /*       conversions on group injected only. In case of conversion on     */
397
    /*       going on group regular, no error code is reset.                  */
398
    if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
399
    {
400
      /* Reset ADC all error code fields */
401
      ADC_CLEAR_ERRORCODE(hadc);
402
    }
403
 
404
    /* Process unlocked */
405
    /* Unlock before starting ADC conversions: in case of potential           */
406
    /* interruption, to let the process to ADC IRQ Handler.                   */
407
    __HAL_UNLOCK(hadc);
408
 
409
    /* Clear injected group conversion flag */
410
    /* (To ensure of no unknown state from potential previous ADC operations) */
411
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
412
 
413
    /* Enable end of conversion interrupt for injected channels */
414
    __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC);
415
 
416
    /* Enable conversion of injected group.                                   */
417
    /* If software start has been selected, conversion starts immediately.    */
418
    /* If external trigger has been selected, conversion will start at next   */
419
    /* trigger event.                                                         */
420
    /* If automatic injected conversion is enabled, conversion will start     */
421
    /* after next regular group conversion.                                   */
422
    if (ADC_IS_SOFTWARE_START_INJECTED(hadc)              &&
423
        HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO)  )
424
    {
425
      /* Enable ADC software conversion for injected channels */
426
      SET_BIT(hadc->Instance->CR2, ADC_CR2_JSWSTART);
427
    }
428
  }
429
 
430
  /* Return function status */
431
  return tmp_hal_status;
432
}
433
 
434
/**
435
  * @brief  Stop conversion of injected channels, disable interruption of
436
  *         end-of-conversion. Disable ADC peripheral if no regular conversion
437
  *         is on going.
438
  * @note   If ADC must be disabled and if conversion is on going on
439
  *         regular group, function HAL_ADC_Stop must be used to stop both
440
  *         injected and regular groups, and disable the ADC.
441
  * @note   If injected group mode auto-injection is enabled,
442
  *         function HAL_ADC_Stop must be used.
28 mjames 443
  * @param  hadc ADC handle
2 mjames 444
  * @retval None
445
  */
446
HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
447
{
448
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
449
 
450
  /* Check the parameters */
451
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
452
 
453
  /* Process locked */
454
  __HAL_LOCK(hadc);
455
 
456
  /* Stop potential conversion and disable ADC peripheral                     */
457
  /* Conditioned to:                                                          */
458
  /* - No conversion on the other group (regular group) is intended to        */
459
  /*   continue (injected and regular groups stop conversion and ADC disable  */
460
  /*   are common)                                                            */
461
  /* - In case of auto-injection mode, HAL_ADC_Stop must be used.             */
462
  if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET)  &&
463
     HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO)   )
464
  {
465
    /* Stop potential conversion on going, on regular and injected groups */
466
    /* Disable ADC peripheral */
467
    tmp_hal_status = ADC_ConversionStop_Disable(hadc);
468
 
469
    /* Check if ADC is effectively disabled */
470
    if (tmp_hal_status == HAL_OK)
471
    {
472
      /* Disable ADC end of conversion interrupt for injected channels */
473
      __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
474
 
475
      /* Set ADC state */
476
      ADC_STATE_CLR_SET(hadc->State,
477
                        HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
478
                        HAL_ADC_STATE_READY);
479
    }
480
  }
481
  else
482
  {
483
    /* Update ADC state machine to error */
484
    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
485
 
486
    tmp_hal_status = HAL_ERROR;
487
  }
488
 
489
  /* Process unlocked */
490
  __HAL_UNLOCK(hadc);
491
 
492
  /* Return function status */
493
  return tmp_hal_status;
494
}
495
 
496
/**
497
  * @brief  Get ADC injected group conversion result.
498
  * @note   Reading register JDRx automatically clears ADC flag JEOC
499
  *         (ADC group injected end of unitary conversion).
500
  * @note   This function does not clear ADC flag JEOS
501
  *         (ADC group injected end of sequence conversion)
502
  *         Occurrence of flag JEOS rising:
503
  *          - If sequencer is composed of 1 rank, flag JEOS is equivalent
504
  *            to flag JEOC.
505
  *          - If sequencer is composed of several ranks, during the scan
506
  *            sequence flag JEOC only is raised, at the end of the scan sequence
507
  *            both flags JEOC and EOS are raised.
508
  *         Flag JEOS must not be cleared by this function because
509
  *         it would not be compliant with low power features
510
  *         (feature low power auto-wait, not available on all STM32 families).
511
  *         To clear this flag, either use function:
512
  *         in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
513
  *         model polling: @ref HAL_ADCEx_InjectedPollForConversion()
514
  *         or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_JEOS).
28 mjames 515
  * @param  hadc ADC handle
516
  * @param  InjectedRank the converted ADC injected rank.
2 mjames 517
  *          This parameter can be one of the following values:
518
  *            @arg ADC_INJECTED_RANK_1: Injected Channel1 selected
519
  *            @arg ADC_INJECTED_RANK_2: Injected Channel2 selected
520
  *            @arg ADC_INJECTED_RANK_3: Injected Channel3 selected
521
  *            @arg ADC_INJECTED_RANK_4: Injected Channel4 selected
522
  * @retval ADC group injected conversion data
523
  */
524
uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank)
525
{
526
  uint32_t tmp_jdr = 0;
527
 
528
  /* Check the parameters */
529
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
530
  assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
531
 
532
  /* Get ADC converted value */
533
  switch(InjectedRank)
534
  {  
535
    case ADC_INJECTED_RANK_4:
536
      tmp_jdr = hadc->Instance->JDR4;
537
      break;
538
    case ADC_INJECTED_RANK_3:
539
      tmp_jdr = hadc->Instance->JDR3;
540
      break;
541
    case ADC_INJECTED_RANK_2:
542
      tmp_jdr = hadc->Instance->JDR2;
543
      break;
544
    case ADC_INJECTED_RANK_1:
545
    default:
546
      tmp_jdr = hadc->Instance->JDR1;
547
      break;
548
  }
549
 
550
  /* Return ADC converted value */
551
  return tmp_jdr;
552
}
553
 
554
/**
555
  * @brief  Injected conversion complete callback in non blocking mode
28 mjames 556
  * @param  hadc ADC handle
2 mjames 557
  * @retval None
558
  */
559
__weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
560
{
561
  /* Prevent unused argument(s) compilation warning */
562
  UNUSED(hadc);
563
 
564
  /* NOTE : This function Should not be modified, when the callback is needed,
565
            the HAL_ADCEx_InjectedConvCpltCallback could be implemented in the user file
566
  */
567
}
568
 
569
/**
570
  * @}
571
  */
572
 
573
/** @defgroup ADCEx_Exported_Functions_Group2 ADC Extended Peripheral Control functions
574
  * @brief    ADC Extended Peripheral Control functions
575
  *
576
@verbatim  
577
 ===============================================================================
578
             ##### Peripheral Control functions #####
579
 ===============================================================================  
580
    [..]  This section provides functions allowing to:
581
      (+) Configure channels on injected group
582
 
583
@endverbatim
584
  * @{
585
  */
586
 
587
/**
588
  * @brief  Configures the ADC injected group and the selected channel to be
589
  *         linked to the injected group.
590
  * @note   Possibility to update parameters on the fly:
591
  *         This function initializes injected group, following calls to this
592
  *         function can be used to reconfigure some parameters of structure
593
  *         "ADC_InjectionConfTypeDef" on the fly, without reseting the ADC.
594
  *         The setting of these parameters is conditioned to ADC state:
595
  *         this function must be called when ADC is not under conversion.
28 mjames 596
  * @param  hadc ADC handle
597
  * @param  sConfigInjected Structure of ADC injected group and ADC channel for
2 mjames 598
  *         injected group.
599
  * @retval None
600
  */
601
HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected)
602
{  
603
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
604
  __IO uint32_t wait_loop_index = 0;
605
 
606
  /* Check the parameters */
607
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
608
  assert_param(IS_ADC_CHANNEL(sConfigInjected->InjectedChannel));
609
  assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
610
  assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
611
  assert_param(IS_ADC_EXTTRIGINJEC(sConfigInjected->ExternalTrigInjecConv));
612
  assert_param(IS_ADC_RANGE(ADC_RESOLUTION_12B, sConfigInjected->InjectedOffset));
613
 
614
  if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
615
  {
616
    assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
617
    assert_param(IS_ADC_INJECTED_NB_CONV(sConfigInjected->InjectedNbrOfConversion));
618
    assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
619
  }
620
 
621
  if(sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
622
  {
623
    assert_param(IS_ADC_EXTTRIGINJEC_EDGE(sConfigInjected->ExternalTrigInjecConvEdge));
624
  }
625
 
626
  /* Process locked */
627
  __HAL_LOCK(hadc);
628
 
629
  /* Configuration of injected group sequencer:                               */
630
  /* - if scan mode is disabled, injected channels sequence length is set to  */
631
  /*   0x00: 1 channel converted (channel on regular rank 1)                  */
632
  /*   Parameter "InjectedNbrOfConversion" is discarded.                      */
633
  /*   Note: Scan mode is present by hardware on this device and, if          */
634
  /*   disabled, discards automatically nb of conversions. Anyway, nb of      */
635
  /*   conversions is forced to 0x00 for alignment over all STM32 devices.    */
636
  /* - if scan mode is enabled, injected channels sequence length is set to   */
637
  /*   parameter ""InjectedNbrOfConversion".                                  */
638
  if (hadc->Init.ScanConvMode == ADC_SCAN_DISABLE)
639
  {
640
    if (sConfigInjected->InjectedRank == ADC_INJECTED_RANK_1)
641
    {
642
      /* Clear the old SQx bits for all injected ranks */
643
        MODIFY_REG(hadc->Instance->JSQR                              ,
644
                   ADC_JSQR_JL   |
645
                   ADC_JSQR_JSQ4 |
646
                   ADC_JSQR_JSQ3 |
647
                   ADC_JSQR_JSQ2 |
648
                   ADC_JSQR_JSQ1                                     ,
649
                   ADC_JSQR_RK_JL(sConfigInjected->InjectedChannel,
650
                                    ADC_INJECTED_RANK_1,
651
                                    0x01)                             );
652
    }
653
    /* If another injected rank than rank1 was intended to be set, and could  */
654
    /* not due to ScanConvMode disabled, error is reported.                   */
655
    else
656
    {
657
      /* Update ADC state machine to error */
658
      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
659
 
660
      tmp_hal_status = HAL_ERROR;
661
    }
662
  }
663
  else
664
  {  
665
    /* Since injected channels rank conv. order depends on total number of   */
666
    /* injected conversions, selected rank must be below or equal to total   */
667
    /* number of injected conversions to be updated.                         */
668
    if (sConfigInjected->InjectedRank <= sConfigInjected->InjectedNbrOfConversion)
669
    {
670
      /* Clear the old SQx bits for the selected rank */
671
      /* Set the SQx bits for the selected rank */
672
      MODIFY_REG(hadc->Instance->JSQR                                                     ,
673
 
674
                 ADC_JSQR_JL                                               |
675
                 ADC_JSQR_RK_JL(ADC_JSQR_JSQ1,                        
676
                                  sConfigInjected->InjectedRank,        
677
                                  sConfigInjected->InjectedNbrOfConversion)               ,
678
 
679
                 ADC_JSQR_JL_SHIFT(sConfigInjected->InjectedNbrOfConversion)             |
680
                 ADC_JSQR_RK_JL(sConfigInjected->InjectedChannel,      
681
                                                sConfigInjected->InjectedRank,        
682
                                                sConfigInjected->InjectedNbrOfConversion)  );
683
    }
684
    else
685
    {
686
      /* Clear the old SQx bits for the selected rank */
687
      MODIFY_REG(hadc->Instance->JSQR                                       ,
688
 
689
                 ADC_JSQR_JL                                               |
690
                 ADC_JSQR_RK_JL(ADC_JSQR_JSQ1,                        
691
                                  sConfigInjected->InjectedRank,        
692
                                  sConfigInjected->InjectedNbrOfConversion) ,
693
 
694
                 0x00000000                                                  );
695
    }
696
  }
697
 
698
  /* Enable external trigger if trigger selection is different of software    */
699
  /* start.                                                                   */
700
  /* Note: This configuration keeps the hardware feature of parameter         */
701
  /*       ExternalTrigConvEdge "trigger edge none" equivalent to             */
702
  /*       software start.                                                    */
703
 
704
  if (sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
705
  {    
706
    MODIFY_REG(hadc->Instance->CR2                        ,
707
               ADC_CR2_JEXTEN  |
708
               ADC_CR2_JEXTSEL                            ,
709
               sConfigInjected->ExternalTrigInjecConv    |
710
               sConfigInjected->ExternalTrigInjecConvEdge  );
711
  }
712
  else
713
  {
714
    MODIFY_REG(hadc->Instance->CR2,
715
               ADC_CR2_JEXTEN  |
716
               ADC_CR2_JEXTSEL    ,
717
               0x00000000          );
718
  }
719
 
720
  /* Configuration of injected group                                          */
721
  /* Parameters update conditioned to ADC state:                              */
722
  /* Parameters that can be updated only when ADC is disabled:                */
723
  /*  - Automatic injected conversion                                         */
724
  /*  - Injected discontinuous mode                                           */
725
  if ((ADC_IS_ENABLE(hadc) == RESET))
726
  {
727
    hadc->Instance->CR1 &= ~(ADC_CR1_JAUTO   |
728
                             ADC_CR1_JDISCEN  );
729
 
730
    /* Automatic injected conversion can be enabled if injected group         */
731
    /* external triggers are disabled.                                        */
732
    if (sConfigInjected->AutoInjectedConv == ENABLE)
733
    {
734
      if (sConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START)
735
      {
736
        SET_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO);
737
      }
738
      else
739
      {
740
        /* Update ADC state machine to error */
741
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
742
 
743
        tmp_hal_status = HAL_ERROR;
744
      }
745
    }
746
 
747
    /* Injected discontinuous can be enabled only if auto-injected mode is    */
748
    /* disabled.                                                              */  
749
    if (sConfigInjected->InjectedDiscontinuousConvMode == ENABLE)
750
    {
751
      if (sConfigInjected->AutoInjectedConv == DISABLE)
752
      {
753
        SET_BIT(hadc->Instance->CR1, ADC_CR1_JDISCEN);
754
      }
755
      else
756
      {
757
        /* Update ADC state machine to error */
758
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
759
 
760
        tmp_hal_status = HAL_ERROR;
761
      }
762
    }
763
  }
764
 
765
  /* Channel sampling time configuration */
766
  /* For InjectedChannels 0 to 9 */
767
  if (sConfigInjected->InjectedChannel < ADC_CHANNEL_10)
768
  {
769
    MODIFY_REG(hadc->Instance->SMPR3,
770
               ADC_SMPR3(ADC_SMPR3_SMP0, sConfigInjected->InjectedChannel),
771
               ADC_SMPR3(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
772
  }
773
  /* For InjectedChannels 10 to 19 */
774
  else if (sConfigInjected->InjectedChannel < ADC_CHANNEL_20)
775
  {
776
    MODIFY_REG(hadc->Instance->SMPR2,
777
               ADC_SMPR2(ADC_SMPR2_SMP10, sConfigInjected->InjectedChannel),
778
               ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
779
  }
780
  /* For InjectedChannels 20 to 26 for devices Cat.1, Cat.2, Cat.3 */
781
  /* For InjectedChannels 20 to 29 for devices Cat4, Cat.5 */
782
  else if (sConfigInjected->InjectedChannel <= ADC_SMPR1_CHANNEL_MAX)
783
  {  
784
    MODIFY_REG(hadc->Instance->SMPR1,
785
               ADC_SMPR1(ADC_SMPR1_SMP20, sConfigInjected->InjectedChannel),
786
               ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
787
  }
788
  /* For InjectedChannels 30 to 31 for devices Cat4, Cat.5 */
789
  else
790
  {
791
    ADC_SMPR0_CHANNEL_SET(hadc, sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
792
  }
793
 
794
 
795
  /* Configure the offset: offset enable/disable, InjectedChannel, offset value */
796
  switch(sConfigInjected->InjectedRank)
797
  {
798
    case 1:
799
      /* Set injected channel 1 offset */
800
      MODIFY_REG(hadc->Instance->JOFR1,
801
                 ADC_JOFR1_JOFFSET1,
802
                 sConfigInjected->InjectedOffset);
803
      break;
804
    case 2:
805
      /* Set injected channel 2 offset */
806
      MODIFY_REG(hadc->Instance->JOFR2,
807
                 ADC_JOFR2_JOFFSET2,
808
                 sConfigInjected->InjectedOffset);
809
      break;
810
    case 3:
811
      /* Set injected channel 3 offset */
812
      MODIFY_REG(hadc->Instance->JOFR3,
813
                 ADC_JOFR3_JOFFSET3,
814
                 sConfigInjected->InjectedOffset);
815
      break;
816
    case 4:
817
    default:
818
      MODIFY_REG(hadc->Instance->JOFR4,
819
                 ADC_JOFR4_JOFFSET4,
820
                 sConfigInjected->InjectedOffset);
821
      break;
822
  }
823
 
824
  /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor  */
825
  /* and VREFINT measurement path.                                            */
826
  if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) ||
827
      (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT)      )
828
  {
829
    SET_BIT(ADC->CCR, ADC_CCR_TSVREFE);
830
 
831
    if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR))
832
    {
833
      /* Delay for temperature sensor stabilization time */
834
      /* Compute number of CPU cycles to wait for */
835
      wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000));
836
      while(wait_loop_index != 0)
837
      {
838
        wait_loop_index--;
839
      }
840
    }
841
  }
842
 
843
  /* Process unlocked */
844
  __HAL_UNLOCK(hadc);
845
 
846
  /* Return function status */
847
  return tmp_hal_status;
848
}
849
 
850
/**
851
  * @}
852
  */  
853
 
854
/**
855
  * @}
856
  */
857
 
858
#endif /* HAL_ADC_MODULE_ENABLED */
859
/**
860
  * @}
861
  */
862
 
863
/**
864
  * @}
865
  */
866
 
867
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/