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| Rev | Author | Line No. | Line |
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| 2 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
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| 3 | * @file stm32l1xx_hal_uart.h |
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| 4 | * @author MCD Application Team |
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| 28 | mjames | 5 | * @brief Header file of UART HAL module. |
| 2 | mjames | 6 | ****************************************************************************** |
| 7 | * @attention |
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| 8 | * |
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| 28 | mjames | 9 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
| 10 | * All rights reserved.</center></h2> |
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| 2 | mjames | 11 | * |
| 28 | mjames | 12 | * This software component is licensed by ST under BSD 3-Clause license, |
| 13 | * the "License"; You may not use this file except in compliance with the |
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| 14 | * License. You may obtain a copy of the License at: |
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| 15 | * opensource.org/licenses/BSD-3-Clause |
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| 2 | mjames | 16 | * |
| 17 | ****************************************************************************** |
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| 28 | mjames | 18 | */ |
| 2 | mjames | 19 | |
| 20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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| 21 | #ifndef __STM32L1xx_HAL_UART_H |
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| 22 | #define __STM32L1xx_HAL_UART_H |
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| 23 | |||
| 24 | #ifdef __cplusplus |
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| 28 | mjames | 25 | extern "C" { |
| 2 | mjames | 26 | #endif |
| 27 | |||
| 28 | /* Includes ------------------------------------------------------------------*/ |
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| 29 | #include "stm32l1xx_hal_def.h" |
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| 30 | |||
| 31 | /** @addtogroup STM32L1xx_HAL_Driver |
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| 32 | * @{ |
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| 33 | */ |
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| 34 | |||
| 35 | /** @addtogroup UART |
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| 36 | * @{ |
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| 28 | mjames | 37 | */ |
| 2 | mjames | 38 | |
| 28 | mjames | 39 | /* Exported types ------------------------------------------------------------*/ |
| 2 | mjames | 40 | /** @defgroup UART_Exported_Types UART Exported Types |
| 41 | * @{ |
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| 28 | mjames | 42 | */ |
| 2 | mjames | 43 | |
| 28 | mjames | 44 | /** |
| 2 | mjames | 45 | * @brief UART Init Structure definition |
| 28 | mjames | 46 | */ |
| 2 | mjames | 47 | typedef struct |
| 48 | { |
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| 49 | uint32_t BaudRate; /*!< This member configures the UART communication baud rate. |
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| 50 | The baud rate is computed using the following formula: |
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| 51 | - IntegerDivider = ((PCLKx) / (8 * (OVR8+1) * (huart->Init.BaudRate))) |
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| 28 | mjames | 52 | - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8 * (OVR8+1)) + 0.5 |
| 2 | mjames | 53 | Where OVR8 is the "oversampling by 8 mode" configuration bit in the CR1 register. */ |
| 54 | |||
| 55 | uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. |
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| 56 | This parameter can be a value of @ref UART_Word_Length */ |
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| 57 | |||
| 58 | uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. |
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| 59 | This parameter can be a value of @ref UART_Stop_Bits */ |
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| 60 | |||
| 61 | uint32_t Parity; /*!< Specifies the parity mode. |
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| 62 | This parameter can be a value of @ref UART_Parity |
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| 63 | @note When parity is enabled, the computed parity is inserted |
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| 64 | at the MSB position of the transmitted data (9th bit when |
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| 65 | the word length is set to 9 data bits; 8th bit when the |
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| 66 | word length is set to 8 data bits). */ |
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| 28 | mjames | 67 | |
| 68 | uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. |
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| 2 | mjames | 69 | This parameter can be a value of @ref UART_Mode */ |
| 70 | |||
| 28 | mjames | 71 | uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled or disabled. |
| 2 | mjames | 72 | This parameter can be a value of @ref UART_Hardware_Flow_Control */ |
| 73 | |||
| 28 | mjames | 74 | uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8). |
| 75 | This parameter can be a value of @ref UART_Over_Sampling */ |
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| 76 | } UART_InitTypeDef; |
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| 77 | |||
| 78 | /** |
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| 79 | * @brief HAL UART State structures definition |
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| 80 | * @note HAL UART State value is a combination of 2 different substates: gState and RxState. |
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| 81 | * - gState contains UART state information related to global Handle management |
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| 82 | * and also information related to Tx operations. |
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| 83 | * gState value coding follow below described bitmap : |
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| 84 | * b7-b6 Error information |
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| 85 | * 00 : No Error |
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| 86 | * 01 : (Not Used) |
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| 87 | * 10 : Timeout |
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| 88 | * 11 : Error |
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| 89 | * b5 Peripheral initialization status |
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| 90 | * 0 : Reset (Peripheral not initialized) |
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| 91 | * 1 : Init done (Peripheral not initialized. HAL UART Init function already called) |
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| 92 | * b4-b3 (not used) |
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| 93 | * xx : Should be set to 00 |
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| 94 | * b2 Intrinsic process state |
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| 95 | * 0 : Ready |
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| 96 | * 1 : Busy (Peripheral busy with some configuration or internal operations) |
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| 97 | * b1 (not used) |
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| 98 | * x : Should be set to 0 |
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| 99 | * b0 Tx state |
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| 100 | * 0 : Ready (no Tx operation ongoing) |
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| 101 | * 1 : Busy (Tx operation ongoing) |
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| 102 | * - RxState contains information related to Rx operations. |
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| 103 | * RxState value coding follow below described bitmap : |
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| 104 | * b7-b6 (not used) |
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| 105 | * xx : Should be set to 00 |
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| 106 | * b5 Peripheral initialization status |
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| 107 | * 0 : Reset (Peripheral not initialized) |
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| 108 | * 1 : Init done (Peripheral not initialized) |
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| 109 | * b4-b2 (not used) |
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| 110 | * xxx : Should be set to 000 |
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| 111 | * b1 Rx state |
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| 112 | * 0 : Ready (no Rx operation ongoing) |
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| 113 | * 1 : Busy (Rx operation ongoing) |
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| 114 | * b0 (not used) |
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| 115 | * x : Should be set to 0. |
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| 116 | */ |
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| 2 | mjames | 117 | typedef enum |
| 118 | { |
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| 28 | mjames | 119 | HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized |
| 120 | Value is allowed for gState and RxState */ |
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| 121 | HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use |
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| 122 | Value is allowed for gState and RxState */ |
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| 123 | HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing |
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| 124 | Value is allowed for gState only */ |
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| 125 | HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing |
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| 126 | Value is allowed for gState only */ |
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| 127 | HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing |
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| 128 | Value is allowed for RxState only */ |
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| 129 | HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing |
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| 130 | Not to be used for neither gState nor RxState. |
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| 131 | Value is result of combination (Or) between gState and RxState values */ |
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| 132 | HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state |
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| 133 | Value is allowed for gState only */ |
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| 134 | HAL_UART_STATE_ERROR = 0xE0U /*!< Error |
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| 135 | Value is allowed for gState only */ |
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| 136 | } HAL_UART_StateTypeDef; |
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| 2 | mjames | 137 | |
| 28 | mjames | 138 | /** |
| 139 | * @brief UART handle Structure definition |
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| 140 | */ |
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| 141 | typedef struct __UART_HandleTypeDef |
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| 2 | mjames | 142 | { |
| 143 | USART_TypeDef *Instance; /*!< UART registers base address */ |
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| 144 | |||
| 145 | UART_InitTypeDef Init; /*!< UART communication parameters */ |
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| 146 | |||
| 147 | uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ |
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| 148 | |||
| 149 | uint16_t TxXferSize; /*!< UART Tx Transfer size */ |
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| 150 | |||
| 28 | mjames | 151 | __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ |
| 2 | mjames | 152 | |
| 153 | uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ |
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| 154 | |||
| 155 | uint16_t RxXferSize; /*!< UART Rx Transfer size */ |
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| 156 | |||
| 28 | mjames | 157 | __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ |
| 2 | mjames | 158 | |
| 159 | DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ |
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| 160 | |||
| 161 | DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ |
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| 162 | |||
| 163 | HAL_LockTypeDef Lock; /*!< Locking object */ |
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| 164 | |||
| 28 | mjames | 165 | __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management |
| 166 | and also related to Tx operations. |
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| 167 | This parameter can be a value of @ref HAL_UART_StateTypeDef */ |
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| 168 | |||
| 169 | __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. |
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| 170 | This parameter can be a value of @ref HAL_UART_StateTypeDef */ |
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| 171 | |||
| 2 | mjames | 172 | __IO uint32_t ErrorCode; /*!< UART Error code */ |
| 173 | |||
| 28 | mjames | 174 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
| 175 | void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ |
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| 176 | void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ |
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| 177 | void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ |
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| 178 | void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ |
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| 179 | void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ |
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| 180 | void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ |
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| 181 | void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ |
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| 182 | void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ |
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| 183 | void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ |
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| 2 | mjames | 184 | |
| 28 | mjames | 185 | void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ |
| 186 | void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ |
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| 187 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
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| 188 | |||
| 189 | } UART_HandleTypeDef; |
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| 190 | |||
| 191 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
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| 2 | mjames | 192 | /** |
| 28 | mjames | 193 | * @brief HAL UART Callback ID enumeration definition |
| 194 | */ |
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| 195 | typedef enum |
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| 196 | { |
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| 197 | HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ |
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| 198 | HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ |
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| 199 | HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ |
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| 200 | HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ |
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| 201 | HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ |
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| 202 | HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ |
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| 203 | HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ |
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| 204 | HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ |
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| 205 | HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ |
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| 206 | |||
| 207 | HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ |
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| 208 | HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ |
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| 209 | |||
| 210 | } HAL_UART_CallbackIDTypeDef; |
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| 211 | |||
| 212 | /** |
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| 213 | * @brief HAL UART Callback pointer definition |
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| 214 | */ |
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| 215 | typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ |
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| 216 | |||
| 217 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
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| 218 | |||
| 219 | /** |
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| 2 | mjames | 220 | * @} |
| 221 | */ |
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| 222 | |||
| 223 | /* Exported constants --------------------------------------------------------*/ |
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| 28 | mjames | 224 | /** @defgroup UART_Exported_Constants UART Exported Constants |
| 2 | mjames | 225 | * @{ |
| 226 | */ |
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| 227 | |||
| 28 | mjames | 228 | /** @defgroup UART_Error_Code UART Error Code |
| 2 | mjames | 229 | * @{ |
| 230 | */ |
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| 28 | mjames | 231 | #define HAL_UART_ERROR_NONE 0x00000000U /*!< No error */ |
| 232 | #define HAL_UART_ERROR_PE 0x00000001U /*!< Parity error */ |
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| 233 | #define HAL_UART_ERROR_NE 0x00000002U /*!< Noise error */ |
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| 234 | #define HAL_UART_ERROR_FE 0x00000004U /*!< Frame error */ |
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| 235 | #define HAL_UART_ERROR_ORE 0x00000008U /*!< Overrun error */ |
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| 236 | #define HAL_UART_ERROR_DMA 0x00000010U /*!< DMA transfer error */ |
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| 237 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
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| 238 | #define HAL_UART_ERROR_INVALID_CALLBACK 0x00000020U /*!< Invalid Callback error */ |
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| 239 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
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| 2 | mjames | 240 | /** |
| 241 | * @} |
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| 242 | */ |
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| 243 | |||
| 28 | mjames | 244 | /** @defgroup UART_Word_Length UART Word Length |
| 2 | mjames | 245 | * @{ |
| 246 | */ |
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| 28 | mjames | 247 | #define UART_WORDLENGTH_8B 0x00000000U |
| 2 | mjames | 248 | #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M) |
| 249 | /** |
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| 250 | * @} |
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| 251 | */ |
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| 252 | |||
| 28 | mjames | 253 | /** @defgroup UART_Stop_Bits UART Number of Stop Bits |
| 2 | mjames | 254 | * @{ |
| 255 | */ |
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| 28 | mjames | 256 | #define UART_STOPBITS_1 0x00000000U |
| 2 | mjames | 257 | #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) |
| 258 | /** |
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| 259 | * @} |
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| 28 | mjames | 260 | */ |
| 2 | mjames | 261 | |
| 28 | mjames | 262 | /** @defgroup UART_Parity UART Parity |
| 2 | mjames | 263 | * @{ |
| 28 | mjames | 264 | */ |
| 265 | #define UART_PARITY_NONE 0x00000000U |
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| 2 | mjames | 266 | #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) |
| 28 | mjames | 267 | #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) |
| 2 | mjames | 268 | /** |
| 269 | * @} |
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| 28 | mjames | 270 | */ |
| 2 | mjames | 271 | |
| 272 | /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control |
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| 273 | * @{ |
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| 28 | mjames | 274 | */ |
| 275 | #define UART_HWCONTROL_NONE 0x00000000U |
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| 2 | mjames | 276 | #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE) |
| 277 | #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE) |
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| 278 | #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE)) |
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| 279 | /** |
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| 280 | * @} |
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| 281 | */ |
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| 282 | |||
| 283 | /** @defgroup UART_Mode UART Transfer Mode |
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| 284 | * @{ |
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| 28 | mjames | 285 | */ |
| 2 | mjames | 286 | #define UART_MODE_RX ((uint32_t)USART_CR1_RE) |
| 287 | #define UART_MODE_TX ((uint32_t)USART_CR1_TE) |
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| 28 | mjames | 288 | #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE | USART_CR1_RE)) |
| 2 | mjames | 289 | /** |
| 290 | * @} |
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| 291 | */ |
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| 28 | mjames | 292 | |
| 293 | /** @defgroup UART_State UART State |
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| 2 | mjames | 294 | * @{ |
| 28 | mjames | 295 | */ |
| 296 | #define UART_STATE_DISABLE 0x00000000U |
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| 2 | mjames | 297 | #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE) |
| 298 | /** |
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| 299 | * @} |
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| 300 | */ |
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| 301 | |||
| 302 | /** @defgroup UART_Over_Sampling UART Over Sampling |
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| 303 | * @{ |
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| 304 | */ |
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| 28 | mjames | 305 | #define UART_OVERSAMPLING_16 0x00000000U |
| 2 | mjames | 306 | #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8) |
| 307 | /** |
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| 308 | * @} |
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| 309 | */ |
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| 310 | |||
| 311 | /** @defgroup UART_LIN_Break_Detection_Length UART LIN Break Detection Length |
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| 312 | * @{ |
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| 28 | mjames | 313 | */ |
| 314 | #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U |
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| 2 | mjames | 315 | #define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL) |
| 316 | /** |
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| 317 | * @} |
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| 318 | */ |
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| 319 | |||
| 28 | mjames | 320 | /** @defgroup UART_WakeUp_functions UART Wakeup Functions |
| 2 | mjames | 321 | * @{ |
| 322 | */ |
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| 28 | mjames | 323 | #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U |
| 2 | mjames | 324 | #define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE) |
| 325 | /** |
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| 326 | * @} |
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| 327 | */ |
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| 328 | |||
| 329 | /** @defgroup UART_Flags UART FLags |
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| 330 | * Elements values convention: 0xXXXX |
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| 331 | * - 0xXXXX : Flag mask in the SR register |
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| 332 | * @{ |
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| 333 | */ |
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| 334 | #define UART_FLAG_CTS ((uint32_t)USART_SR_CTS) |
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| 335 | #define UART_FLAG_LBD ((uint32_t)USART_SR_LBD) |
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| 336 | #define UART_FLAG_TXE ((uint32_t)USART_SR_TXE) |
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| 337 | #define UART_FLAG_TC ((uint32_t)USART_SR_TC) |
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| 338 | #define UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE) |
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| 339 | #define UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE) |
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| 340 | #define UART_FLAG_ORE ((uint32_t)USART_SR_ORE) |
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| 341 | #define UART_FLAG_NE ((uint32_t)USART_SR_NE) |
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| 342 | #define UART_FLAG_FE ((uint32_t)USART_SR_FE) |
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| 343 | #define UART_FLAG_PE ((uint32_t)USART_SR_PE) |
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| 344 | /** |
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| 345 | * @} |
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| 346 | */ |
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| 347 | |||
| 348 | /** @defgroup UART_Interrupt_definition UART Interrupt Definitions |
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| 349 | * Elements values convention: 0xY000XXXX |
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| 350 | * - XXXX : Interrupt mask (16 bits) in the Y register |
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| 351 | * - Y : Interrupt source register (2bits) |
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| 28 | mjames | 352 | * - 0001: CR1 register |
| 353 | * - 0010: CR2 register |
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| 354 | * - 0011: CR3 register |
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| 2 | mjames | 355 | * @{ |
| 28 | mjames | 356 | */ |
| 2 | mjames | 357 | |
| 28 | mjames | 358 | #define UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_PEIE)) |
| 359 | #define UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TXEIE)) |
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| 360 | #define UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TCIE)) |
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| 361 | #define UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE)) |
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| 362 | #define UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE)) |
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| 2 | mjames | 363 | |
| 28 | mjames | 364 | #define UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28U | USART_CR2_LBDIE)) |
| 2 | mjames | 365 | |
| 28 | mjames | 366 | #define UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_CTSIE)) |
| 367 | #define UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_EIE)) |
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| 2 | mjames | 368 | /** |
| 369 | * @} |
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| 370 | */ |
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| 371 | |||
| 372 | /** |
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| 373 | * @} |
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| 374 | */ |
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| 375 | |||
| 376 | /* Exported macro ------------------------------------------------------------*/ |
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| 377 | /** @defgroup UART_Exported_Macros UART Exported Macros |
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| 378 | * @{ |
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| 379 | */ |
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| 380 | |||
| 28 | mjames | 381 | /** @brief Reset UART handle gstate & RxState |
| 382 | * @param __HANDLE__ specifies the UART Handle. |
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| 383 | * UART Handle selects the USARTx or UARTy peripheral |
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| 2 | mjames | 384 | * (USART,UART availability and x,y values depending on device). |
| 385 | * @retval None |
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| 386 | */ |
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| 28 | mjames | 387 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
| 388 | #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
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| 389 | (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ |
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| 390 | (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ |
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| 391 | (__HANDLE__)->MspInitCallback = NULL; \ |
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| 392 | (__HANDLE__)->MspDeInitCallback = NULL; \ |
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| 393 | } while(0U) |
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| 394 | #else |
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| 395 | #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
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| 396 | (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ |
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| 397 | (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ |
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| 398 | } while(0U) |
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| 399 | #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ |
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| 2 | mjames | 400 | |
| 28 | mjames | 401 | /** @brief Flushes the UART DR register |
| 402 | * @param __HANDLE__ specifies the UART Handle. |
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| 403 | * UART Handle selects the USARTx or UARTy peripheral |
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| 2 | mjames | 404 | * (USART,UART availability and x,y values depending on device). |
| 405 | */ |
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| 406 | #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR) |
||
| 407 | |||
| 28 | mjames | 408 | /** @brief Checks whether the specified UART flag is set or not. |
| 409 | * @param __HANDLE__ specifies the UART Handle. |
||
| 410 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 2 | mjames | 411 | * (USART,UART availability and x,y values depending on device). |
| 28 | mjames | 412 | * @param __FLAG__ specifies the flag to check. |
| 2 | mjames | 413 | * This parameter can be one of the following values: |
| 414 | * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5) |
||
| 415 | * @arg UART_FLAG_LBD: LIN Break detection flag |
||
| 416 | * @arg UART_FLAG_TXE: Transmit data register empty flag |
||
| 417 | * @arg UART_FLAG_TC: Transmission Complete flag |
||
| 418 | * @arg UART_FLAG_RXNE: Receive data register not empty flag |
||
| 419 | * @arg UART_FLAG_IDLE: Idle Line detection flag |
||
| 28 | mjames | 420 | * @arg UART_FLAG_ORE: Overrun Error flag |
| 2 | mjames | 421 | * @arg UART_FLAG_NE: Noise Error flag |
| 422 | * @arg UART_FLAG_FE: Framing Error flag |
||
| 423 | * @arg UART_FLAG_PE: Parity Error flag |
||
| 424 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
||
| 425 | */ |
||
| 28 | mjames | 426 | #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
| 2 | mjames | 427 | |
| 28 | mjames | 428 | /** @brief Clears the specified UART pending flag. |
| 429 | * @param __HANDLE__ specifies the UART Handle. |
||
| 430 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 2 | mjames | 431 | * (USART,UART availability and x,y values depending on device). |
| 28 | mjames | 432 | * @param __FLAG__ specifies the flag to check. |
| 2 | mjames | 433 | * This parameter can be any combination of the following values: |
| 434 | * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5). |
||
| 435 | * @arg UART_FLAG_LBD: LIN Break detection flag. |
||
| 436 | * @arg UART_FLAG_TC: Transmission Complete flag. |
||
| 437 | * @arg UART_FLAG_RXNE: Receive data register not empty flag. |
||
| 28 | mjames | 438 | * |
| 439 | * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (Overrun |
||
| 440 | * error) and IDLE (Idle line detected) flags are cleared by software |
||
| 2 | mjames | 441 | * sequence: a read operation to USART_SR register followed by a read |
| 442 | * operation to USART_DR register. |
||
| 443 | * @note RXNE flag can be also cleared by a read to the USART_DR register. |
||
| 28 | mjames | 444 | * @note TC flag can be also cleared by software sequence: a read operation to |
| 2 | mjames | 445 | * USART_SR register followed by a write operation to USART_DR register. |
| 446 | * @note TXE flag is cleared only by a write to the USART_DR register. |
||
| 28 | mjames | 447 | * |
| 2 | mjames | 448 | * @retval None |
| 449 | */ |
||
| 450 | #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__)) |
||
| 451 | |||
| 28 | mjames | 452 | /** @brief Clears the UART PE pending flag. |
| 453 | * @param __HANDLE__ specifies the UART Handle. |
||
| 454 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 2 | mjames | 455 | * (USART,UART availability and x,y values depending on device). |
| 456 | * @retval None |
||
| 457 | */ |
||
| 28 | mjames | 458 | #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) \ |
| 459 | do{ \ |
||
| 460 | __IO uint32_t tmpreg = 0x00U; \ |
||
| 461 | tmpreg = (__HANDLE__)->Instance->SR; \ |
||
| 462 | tmpreg = (__HANDLE__)->Instance->DR; \ |
||
| 463 | UNUSED(tmpreg); \ |
||
| 464 | } while(0U) |
||
| 2 | mjames | 465 | |
| 28 | mjames | 466 | /** @brief Clears the UART FE pending flag. |
| 467 | * @param __HANDLE__ specifies the UART Handle. |
||
| 468 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 2 | mjames | 469 | * (USART,UART availability and x,y values depending on device). |
| 470 | * @retval None |
||
| 471 | */ |
||
| 472 | #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
||
| 473 | |||
| 28 | mjames | 474 | /** @brief Clears the UART NE pending flag. |
| 475 | * @param __HANDLE__ specifies the UART Handle. |
||
| 476 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 2 | mjames | 477 | * (USART,UART availability and x,y values depending on device). |
| 478 | * @retval None |
||
| 479 | */ |
||
| 480 | #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
||
| 481 | |||
| 28 | mjames | 482 | /** @brief Clears the UART ORE pending flag. |
| 483 | * @param __HANDLE__ specifies the UART Handle. |
||
| 484 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 2 | mjames | 485 | * (USART,UART availability and x,y values depending on device). |
| 486 | * @retval None |
||
| 487 | */ |
||
| 488 | #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
||
| 489 | |||
| 28 | mjames | 490 | /** @brief Clears the UART IDLE pending flag. |
| 491 | * @param __HANDLE__ specifies the UART Handle. |
||
| 492 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 2 | mjames | 493 | * (USART,UART availability and x,y values depending on device). |
| 494 | * @retval None |
||
| 495 | */ |
||
| 496 | #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
||
| 28 | mjames | 497 | |
| 2 | mjames | 498 | /** @brief Enable the specified UART interrupt. |
| 28 | mjames | 499 | * @param __HANDLE__ specifies the UART Handle. |
| 500 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 2 | mjames | 501 | * (USART,UART availability and x,y values depending on device). |
| 28 | mjames | 502 | * @param __INTERRUPT__ specifies the UART interrupt source to enable. |
| 2 | mjames | 503 | * This parameter can be one of the following values: |
| 504 | * @arg UART_IT_CTS: CTS change interrupt |
||
| 505 | * @arg UART_IT_LBD: LIN Break detection interrupt |
||
| 506 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
||
| 507 | * @arg UART_IT_TC: Transmission complete interrupt |
||
| 508 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
||
| 509 | * @arg UART_IT_IDLE: Idle line detection interrupt |
||
| 510 | * @arg UART_IT_PE: Parity Error interrupt |
||
| 511 | * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
||
| 512 | * @retval None |
||
| 513 | */ |
||
| 28 | mjames | 514 | #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \ |
| 515 | (((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \ |
||
| 2 | mjames | 516 | ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK))) |
| 517 | |||
| 518 | /** @brief Disable the specified UART interrupt. |
||
| 28 | mjames | 519 | * @param __HANDLE__ specifies the UART Handle. |
| 520 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 2 | mjames | 521 | * (USART,UART availability and x,y values depending on device). |
| 28 | mjames | 522 | * @param __INTERRUPT__ specifies the UART interrupt source to disable. |
| 2 | mjames | 523 | * This parameter can be one of the following values: |
| 524 | * @arg UART_IT_CTS: CTS change interrupt |
||
| 525 | * @arg UART_IT_LBD: LIN Break detection interrupt |
||
| 526 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
||
| 527 | * @arg UART_IT_TC: Transmission complete interrupt |
||
| 528 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
||
| 529 | * @arg UART_IT_IDLE: Idle line detection interrupt |
||
| 530 | * @arg UART_IT_PE: Parity Error interrupt |
||
| 531 | * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
||
| 532 | * @retval None |
||
| 533 | */ |
||
| 28 | mjames | 534 | #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ |
| 535 | (((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ |
||
| 2 | mjames | 536 | ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK))) |
| 28 | mjames | 537 | |
| 538 | /** @brief Checks whether the specified UART interrupt source is enabled or not. |
||
| 539 | * @param __HANDLE__ specifies the UART Handle. |
||
| 540 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 2 | mjames | 541 | * (USART,UART availability and x,y values depending on device). |
| 28 | mjames | 542 | * @param __IT__ specifies the UART interrupt source to check. |
| 2 | mjames | 543 | * This parameter can be one of the following values: |
| 544 | * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5) |
||
| 545 | * @arg UART_IT_LBD: LIN Break detection interrupt |
||
| 546 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
||
| 547 | * @arg UART_IT_TC: Transmission complete interrupt |
||
| 548 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
||
| 549 | * @arg UART_IT_IDLE: Idle line detection interrupt |
||
| 550 | * @arg UART_IT_ERR: Error interrupt |
||
| 551 | * @retval The new state of __IT__ (TRUE or FALSE). |
||
| 552 | */ |
||
| 28 | mjames | 553 | #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == UART_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == UART_CR2_REG_INDEX)? \ |
| 2 | mjames | 554 | (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK)) |
| 555 | |||
| 28 | mjames | 556 | /** @brief Enable CTS flow control |
| 557 | * @note This macro allows to enable CTS hardware flow control for a given UART instance, |
||
| 2 | mjames | 558 | * without need to call HAL_UART_Init() function. |
| 559 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
| 560 | * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need |
||
| 561 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
| 562 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
| 563 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
||
| 28 | mjames | 564 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
| 565 | * @param __HANDLE__ specifies the UART Handle. |
||
| 566 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
||
| 2 | mjames | 567 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
| 568 | * @retval None |
||
| 569 | */ |
||
| 570 | #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ |
||
| 571 | do{ \ |
||
| 572 | SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ |
||
| 573 | (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ |
||
| 28 | mjames | 574 | } while(0U) |
| 2 | mjames | 575 | |
| 28 | mjames | 576 | /** @brief Disable CTS flow control |
| 577 | * @note This macro allows to disable CTS hardware flow control for a given UART instance, |
||
| 2 | mjames | 578 | * without need to call HAL_UART_Init() function. |
| 579 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
| 580 | * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need |
||
| 581 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
| 582 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
| 583 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
||
| 28 | mjames | 584 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
| 585 | * @param __HANDLE__ specifies the UART Handle. |
||
| 586 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
||
| 2 | mjames | 587 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
| 588 | * @retval None |
||
| 589 | */ |
||
| 590 | #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ |
||
| 591 | do{ \ |
||
| 592 | CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ |
||
| 593 | (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ |
||
| 28 | mjames | 594 | } while(0U) |
| 2 | mjames | 595 | |
| 28 | mjames | 596 | /** @brief Enable RTS flow control |
| 597 | * This macro allows to enable RTS hardware flow control for a given UART instance, |
||
| 2 | mjames | 598 | * without need to call HAL_UART_Init() function. |
| 599 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
| 600 | * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need |
||
| 601 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
| 602 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
| 603 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
||
| 28 | mjames | 604 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
| 605 | * @param __HANDLE__ specifies the UART Handle. |
||
| 606 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
||
| 2 | mjames | 607 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
| 608 | * @retval None |
||
| 609 | */ |
||
| 610 | #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ |
||
| 611 | do{ \ |
||
| 612 | SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ |
||
| 613 | (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ |
||
| 28 | mjames | 614 | } while(0U) |
| 2 | mjames | 615 | |
| 28 | mjames | 616 | /** @brief Disable RTS flow control |
| 617 | * This macro allows to disable RTS hardware flow control for a given UART instance, |
||
| 2 | mjames | 618 | * without need to call HAL_UART_Init() function. |
| 619 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
| 620 | * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need |
||
| 621 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
| 622 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
| 623 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
||
| 28 | mjames | 624 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
| 625 | * @param __HANDLE__ specifies the UART Handle. |
||
| 626 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
||
| 2 | mjames | 627 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
| 628 | * @retval None |
||
| 629 | */ |
||
| 630 | #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ |
||
| 631 | do{ \ |
||
| 632 | CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ |
||
| 633 | (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ |
||
| 28 | mjames | 634 | } while(0U) |
| 2 | mjames | 635 | |
| 28 | mjames | 636 | /** @brief Macro to enable the UART's one bit sample method |
| 637 | * @param __HANDLE__ specifies the UART Handle. |
||
| 638 | * @retval None |
||
| 639 | */ |
||
| 640 | #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) |
||
| 2 | mjames | 641 | |
| 28 | mjames | 642 | /** @brief Macro to disable the UART's one bit sample method |
| 643 | * @param __HANDLE__ specifies the UART Handle. |
||
| 644 | * @retval None |
||
| 645 | */ |
||
| 646 | #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT)) |
||
| 647 | |||
| 2 | mjames | 648 | /** @brief Enable UART |
| 28 | mjames | 649 | * @param __HANDLE__ specifies the UART Handle. |
| 2 | mjames | 650 | * @retval None |
| 28 | mjames | 651 | */ |
| 2 | mjames | 652 | #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) |
| 653 | |||
| 654 | /** @brief Disable UART |
||
| 28 | mjames | 655 | * @param __HANDLE__ specifies the UART Handle. |
| 2 | mjames | 656 | * @retval None |
| 657 | */ |
||
| 658 | #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) |
||
| 659 | /** |
||
| 660 | * @} |
||
| 661 | */ |
||
| 662 | |||
| 28 | mjames | 663 | /* Exported functions --------------------------------------------------------*/ |
| 664 | /** @addtogroup UART_Exported_Functions |
||
| 2 | mjames | 665 | * @{ |
| 666 | */ |
||
| 667 | |||
| 28 | mjames | 668 | /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions |
| 2 | mjames | 669 | * @{ |
| 670 | */ |
||
| 671 | |||
| 28 | mjames | 672 | /* Initialization/de-initialization functions **********************************/ |
| 2 | mjames | 673 | HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); |
| 674 | HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); |
||
| 675 | HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); |
||
| 676 | HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); |
||
| 28 | mjames | 677 | HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); |
| 2 | mjames | 678 | void HAL_UART_MspInit(UART_HandleTypeDef *huart); |
| 679 | void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); |
||
| 680 | |||
| 28 | mjames | 681 | /* Callbacks Register/UnRegister functions ***********************************/ |
| 682 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
||
| 683 | HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, pUART_CallbackTypeDef pCallback); |
||
| 684 | HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); |
||
| 685 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
||
| 686 | |||
| 2 | mjames | 687 | /** |
| 688 | * @} |
||
| 689 | */ |
||
| 690 | |||
| 28 | mjames | 691 | /** @addtogroup UART_Exported_Functions_Group2 IO operation functions |
| 2 | mjames | 692 | * @{ |
| 693 | */ |
||
| 694 | |||
| 28 | mjames | 695 | /* IO operation functions *******************************************************/ |
| 2 | mjames | 696 | HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| 697 | HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
||
| 698 | HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
| 699 | HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
| 700 | HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
| 701 | HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
| 702 | HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); |
||
| 703 | HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); |
||
| 704 | HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); |
||
| 28 | mjames | 705 | /* Transfer Abort functions */ |
| 706 | HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); |
||
| 707 | HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); |
||
| 708 | HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); |
||
| 709 | HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); |
||
| 710 | HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); |
||
| 711 | HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); |
||
| 712 | |||
| 2 | mjames | 713 | void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); |
| 714 | void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); |
||
| 715 | void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); |
||
| 716 | void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); |
||
| 717 | void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); |
||
| 718 | void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); |
||
| 28 | mjames | 719 | void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); |
| 720 | void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); |
||
| 721 | void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); |
||
| 2 | mjames | 722 | |
| 723 | /** |
||
| 724 | * @} |
||
| 725 | */ |
||
| 726 | |||
| 28 | mjames | 727 | /** @addtogroup UART_Exported_Functions_Group3 |
| 2 | mjames | 728 | * @{ |
| 729 | */ |
||
| 730 | /* Peripheral Control functions ************************************************/ |
||
| 731 | HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); |
||
| 732 | HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); |
||
| 733 | HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart); |
||
| 734 | HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); |
||
| 735 | HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); |
||
| 736 | /** |
||
| 737 | * @} |
||
| 738 | */ |
||
| 739 | |||
| 28 | mjames | 740 | /** @addtogroup UART_Exported_Functions_Group4 |
| 2 | mjames | 741 | * @{ |
| 742 | */ |
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| 28 | mjames | 743 | /* Peripheral State functions **************************************************/ |
| 2 | mjames | 744 | HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart); |
| 745 | uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart); |
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| 28 | mjames | 746 | /** |
| 747 | * @} |
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| 748 | */ |
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| 2 | mjames | 749 | |
| 750 | /** |
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| 751 | * @} |
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| 752 | */ |
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| 28 | mjames | 753 | /* Private types -------------------------------------------------------------*/ |
| 754 | /* Private variables ---------------------------------------------------------*/ |
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| 755 | /* Private constants ---------------------------------------------------------*/ |
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| 756 | /** @defgroup UART_Private_Constants UART Private Constants |
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| 757 | * @{ |
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| 758 | */ |
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| 759 | /** @brief UART interruptions flag mask |
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| 760 | * |
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| 761 | */ |
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| 762 | #define UART_IT_MASK 0x0000FFFFU |
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| 2 | mjames | 763 | |
| 28 | mjames | 764 | #define UART_CR1_REG_INDEX 1U |
| 765 | #define UART_CR2_REG_INDEX 2U |
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| 766 | #define UART_CR3_REG_INDEX 3U |
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| 2 | mjames | 767 | /** |
| 768 | * @} |
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| 769 | */ |
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| 770 | |||
| 28 | mjames | 771 | /* Private macros ------------------------------------------------------------*/ |
| 772 | /** @defgroup UART_Private_Macros UART Private Macros |
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| 773 | * @{ |
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| 774 | */ |
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| 775 | #define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \ |
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| 776 | ((LENGTH) == UART_WORDLENGTH_9B)) |
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| 777 | #define IS_UART_LIN_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B)) |
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| 778 | #define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \ |
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| 779 | ((STOPBITS) == UART_STOPBITS_2)) |
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| 780 | #define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \ |
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| 781 | ((PARITY) == UART_PARITY_EVEN) || \ |
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| 782 | ((PARITY) == UART_PARITY_ODD)) |
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| 783 | #define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\ |
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| 784 | (((CONTROL) == UART_HWCONTROL_NONE) || \ |
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| 785 | ((CONTROL) == UART_HWCONTROL_RTS) || \ |
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| 786 | ((CONTROL) == UART_HWCONTROL_CTS) || \ |
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| 787 | ((CONTROL) == UART_HWCONTROL_RTS_CTS)) |
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| 788 | #define IS_UART_MODE(MODE) ((((MODE) & 0x0000FFF3U) == 0x00U) && ((MODE) != 0x00U)) |
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| 789 | #define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \ |
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| 790 | ((STATE) == UART_STATE_ENABLE)) |
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| 791 | #define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \ |
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| 792 | ((SAMPLING) == UART_OVERSAMPLING_8)) |
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| 793 | #define IS_UART_LIN_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16)) |
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| 794 | #define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \ |
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| 795 | ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B)) |
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| 796 | #define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \ |
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| 797 | ((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK)) |
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| 798 | #define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) <= 4000000U) |
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| 799 | #define IS_UART_ADDRESS(ADDRESS) ((ADDRESS) <= 0x0FU) |
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| 800 | |||
| 801 | #define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(4U*(_BAUD_))) |
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| 802 | #define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100U) |
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| 803 | #define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100U)) * 16U) + 50U) / 100U) |
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| 804 | /* UART BRR = mantissa + overflow + fraction |
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| 805 | = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */ |
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| 806 | #define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4U) + \ |
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| 807 | (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0U)) + \ |
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| 808 | (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0FU)) |
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| 809 | |||
| 810 | #define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(2U*(_BAUD_))) |
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| 811 | #define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100U) |
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| 812 | #define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100U)) * 8U) + 50U) / 100U) |
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| 813 | /* UART BRR = mantissa + overflow + fraction |
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| 814 | = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07U) */ |
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| 815 | #define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4U) + \ |
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| 816 | ((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8U) << 1U)) + \ |
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| 817 | (UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x07U)) |
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| 818 | |||
| 2 | mjames | 819 | /** |
| 820 | * @} |
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| 28 | mjames | 821 | */ |
| 2 | mjames | 822 | |
| 28 | mjames | 823 | /* Private functions ---------------------------------------------------------*/ |
| 824 | /** @defgroup UART_Private_Functions UART Private Functions |
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| 825 | * @{ |
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| 826 | */ |
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| 827 | |||
| 2 | mjames | 828 | /** |
| 829 | * @} |
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| 830 | */ |
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| 831 | |||
| 28 | mjames | 832 | /** |
| 833 | * @} |
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| 834 | */ |
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| 835 | |||
| 836 | /** |
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| 837 | * @} |
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| 838 | */ |
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| 839 | |||
| 2 | mjames | 840 | #ifdef __cplusplus |
| 841 | } |
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| 842 | #endif |
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| 843 | |||
| 844 | #endif /* __STM32L1xx_HAL_UART_H */ |
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| 845 | |||
| 846 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |