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/**
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  ******************************************************************************
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  * @file    stm32l1xx_hal_tim_ex.h
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  * @author  MCD Application Team
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  * @brief   Header file of TIM HAL Extended module.
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  ******************************************************************************
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  * @attention
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  *
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  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
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  * All rights reserved.</center></h2>
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  *
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  * This software component is licensed by ST under BSD 3-Clause license,
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  * the "License"; You may not use this file except in compliance with the
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  * License. You may obtain a copy of the License at:
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  *                        opensource.org/licenses/BSD-3-Clause
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  *
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  ******************************************************************************
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  */
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef STM32L1xx_HAL_TIM_EX_H
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#define STM32L1xx_HAL_TIM_EX_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32l1xx_hal_def.h"
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/** @addtogroup STM32L1xx_HAL_Driver
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  * @{
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  */
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/** @addtogroup TIMEx
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  * @{
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  */
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup TIMEx_Exported_Types TIM Extended Exported Types
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  * @{
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  */
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/**
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  * @}
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  */
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/* End of exported types -----------------------------------------------------*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants
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  * @{
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  */
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/** @defgroup TIMEx_Remap TIM Extended Remapping
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  * @{
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  */
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/* @note STM32L1XX devices are organized in 6 categories: Cat.1, Cat.2, Cat.3, Cat.4, Cat.5, Cat.6.
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         Remap capabilities depend on the device category. As the DMA2 controller is available only in
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         Cat.3, Cat.4,Cat.5 and Cat.6 devices it is used to discriminate Cat.1 and Cat.2 devices v.s.
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         Cat.3, Cat.4, Cat.5 and Cat.6 devices. */
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#if defined(DMA2)
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#define TIM_TIM2_ITR1_TIM10_OC        (0x00000000)       /*!< TIM2 ITR1 input is connected to TIM10 OC */
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#define TIM_TIM2_ITR1_TIM5_TGO        TIM2_OR_ITR1_RMP   /*!< TIM2 ITR1 input is connected to TIM5 TGO */
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#endif /* DMA2 */
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#if defined(DMA2)
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#define TIM_TIM3_ITR2_TIM11_OC        (0x00000000)       /*!< TIM3 ITR2 input is connected to TIM11 OC */
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#define TIM_TIM3_ITR2_TIM5_TGO        TIM2_OR_ITR1_RMP   /*!< TIM3 ITR2 input is connected to TIM5 TGO */
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#endif /* DMA2 */
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#if defined(DMA2)
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#define TIM_TIM9_ITR1_TIM3_TGO        (0x00000000)       /*!< TIM9 ITR1 input is connected to TIM3 TGO */
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#define TIM_TIM9_ITR1_TS              TIM9_OR_ITR1_RMP   /*!< TIM9 ITR1 input is connected to touch sensing I/O */
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#endif /* DMA2 */
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#define TIM_TIM9_GPIO                 (0x00000000)       /*!< TIM9 Channel1 is connected to GPIO */
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#define TIM_TIM9_LSE                  TIM_OR_TI1RMP_0    /*!< TIM9 Channel1 is connected to LSE internal clock */
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#define TIM_TIM9_GPIO1                TIM_OR_TI1RMP_1    /*!< TIM9 Channel1 is connected to GPIO */
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#define TIM_TIM9_GPIO2                TIM_OR_TI1RMP      /*!< TIM9 Channel1 is connected to GPIO */
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#if defined(DMA2)
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#define TIM_TIM10_TI1RMP              (0x00000000)       /*!< TIM10 Channel 1 depends on TI1_RMP */
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#define TIM_TIM10_RI                  TIM_OR_TI1_RMP_RI  /*!< TIM10 Channel 1 is connected to RI */
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#define TIM_TIM10_ETR_LSE             (0x00000000)       /*!< TIM10 ETR input is connected to LSE clock */
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#define TIM_TIM10_ETR_TIM9_TGO        TIM_OR_ETR_RMP     /*!< TIM10 ETR input is connected to TIM9 TGO */
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#endif /* DMA2 */
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#define TIM_TIM10_GPIO                (0x00000000)       /*!< TIM10 Channel1 is connected to GPIO */
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#define TIM_TIM10_LSI                 TIM_OR_TI1RMP_0    /*!< TIM10 Channel1 is connected to LSI internal clock */
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#define TIM_TIM10_LSE                 TIM_OR_TI1RMP_1    /*!< TIM10 Channel1 is connected to LSE internal clock */
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#define TIM_TIM10_RTC                 TIM_OR_TI1RMP      /*!< TIM10 Channel1 is connected to RTC wakeup interrupt */
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#if defined(DMA2)
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#define TIM_TIM11_TI1RMP              (0x00000000)       /*!< TIM11 Channel 1 depends on TI1_RMP */
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#define TIM_TIM11_RI                  TIM_OR_TI1_RMP_RI  /*!< TIM11 Channel 1 is connected to RI */
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#define TIM_TIM11_ETR_LSE             (0x00000000)       /*!< TIM11 ETR input is connected to LSE clock */
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#define TIM_TIM11_ETR_TIM9_TGO        TIM_OR_ETR_RMP     /*!< TIM11 ETR input is connected to TIM9 TGO */
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#endif /* DMA2 */
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#define TIM_TIM11_GPIO                (0x00000000)       /*!< TIM11 Channel1 is connected to GPIO */
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#define TIM_TIM11_MSI                 TIM_OR_TI1RMP_0    /*!< TIM11 Channel1 is connected to MSI internal clock */
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#define TIM_TIM11_HSE_RTC             TIM_OR_TI1RMP_1    /*!< TIM11 Channel1 is connected to HSE_RTC clock */
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#define TIM_TIM11_GPIO1               TIM_OR_TI1RMP      /*!< TIM11 Channel1 is connected to GPIO */
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/**
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  * @}
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  */
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/**
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  * @}
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  */
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/* End of exported constants -------------------------------------------------*/
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/* Exported macro ------------------------------------------------------------*/
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/** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros
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  * @{
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  */
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/**
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  * @}
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  */
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/* End of exported macro -----------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/** @defgroup TIMEx_Private_Macros TIM Extended Private Macros
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  * @{
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  */
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#if defined(DMA2)
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#define IS_TIM_REMAP(INSTANCE, TIM_REMAP)               \
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  ( (((INSTANCE) == TIM2)  && (((TIM_REMAP) == TIM_TIM2_ITR1_TIM10_OC) || ((TIM_REMAP) == TIM_TIM2_ITR1_TIM5_TGO)))  || \
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    (((INSTANCE) == TIM3)  && (((TIM_REMAP) == TIM_TIM3_ITR2_TIM11_OC) || ((TIM_REMAP) == TIM_TIM3_ITR2_TIM5_TGO)))  || \
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    (((INSTANCE) == TIM9)  && ((TIM_REMAP) <= (TIM_TIM9_ITR1_TS | TIM_TIM9_GPIO2)))                                  || \
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    (((INSTANCE) == TIM10) && ((TIM_REMAP) <= (TIM_TIM10_RI | TIM_TIM10_ETR_TIM9_TGO | TIM_TIM10_RTC)))              || \
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    (((INSTANCE) == TIM11) && ((TIM_REMAP) <= (TIM_TIM11_RI | TIM_TIM11_ETR_TIM9_TGO | TIM_TIM11_GPIO1)))               \
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  )
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#else
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#define IS_TIM_REMAP(INSTANCE, TIM_REMAP)               \
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  ( (((INSTANCE) == TIM9)  && (((TIM_REMAP) == TIM_TIM9_GPIO) || ((TIM_REMAP) == TIM_TIM9_LSE) || ((TIM_REMAP) == TIM_TIM9_GPIO1) || ((TIM_REMAP) == TIM_TIM9_GPIO2)))       || \
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    (((INSTANCE) == TIM10) && (((TIM_REMAP) == TIM_TIM10_GPIO) || ((TIM_REMAP) == TIM_TIM10_LSI) || ((TIM_REMAP) == TIM_TIM10_LSE) || ((TIM_REMAP) == TIM_TIM10_RTC)))       || \
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    (((INSTANCE) == TIM11) && (((TIM_REMAP) == TIM_TIM11_GPIO) || ((TIM_REMAP) == TIM_TIM11_MSI) || ((TIM_REMAP) == TIM_TIM11_HSE_RTC) || ((TIM_REMAP) == TIM_TIM11_GPIO1)))    \
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  )
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#endif /* DMA2 */
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/**
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  * @}
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  */
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/* End of private macro ------------------------------------------------------*/
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/* Exported functions --------------------------------------------------------*/
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/** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions
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  * @{
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  */
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/** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
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  *  @brief    Peripheral Control functions
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  * @{
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  */
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/* Extended Control functions  ************************************************/
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HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
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                                                        TIM_MasterConfigTypeDef *sMasterConfig);
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HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
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/**
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  * @}
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  */
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/**
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  * @}
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  */
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/* End of exported functions -------------------------------------------------*/
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/**
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  * @}
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  */
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/**
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  * @}
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  */
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#ifdef __cplusplus
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}
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#endif
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#endif /* STM32L1xx_HAL_TIM_EX_H */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/