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2 | mjames | 1 | /** |
2 | ****************************************************************************** |
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28 | mjames | 3 | * @file stm32l1xx_hal_flash_ex.h |
2 | mjames | 4 | * @author MCD Application Team |
28 | mjames | 5 | * @brief Header file of Flash HAL Extended module. |
2 | mjames | 6 | ****************************************************************************** |
7 | * @attention |
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8 | * |
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28 | mjames | 9 | * <h2><center>© Copyright (c) 2017 STMicroelectronics. |
10 | * All rights reserved.</center></h2> |
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2 | mjames | 11 | * |
28 | mjames | 12 | * This software component is licensed by ST under BSD 3-Clause license, |
13 | * the "License"; You may not use this file except in compliance with the |
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14 | * License. You may obtain a copy of the License at: |
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15 | * opensource.org/licenses/BSD-3-Clause |
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2 | mjames | 16 | * |
17 | ****************************************************************************** |
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18 | */ |
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19 | |||
20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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21 | #ifndef __STM32L1xx_HAL_FLASH_EX_H |
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22 | #define __STM32L1xx_HAL_FLASH_EX_H |
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23 | |||
24 | #ifdef __cplusplus |
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25 | extern "C" { |
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26 | #endif |
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27 | |||
28 | /* Includes ------------------------------------------------------------------*/ |
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29 | #include "stm32l1xx_hal_def.h" |
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30 | |||
31 | /** @addtogroup STM32L1xx_HAL_Driver |
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32 | * @{ |
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33 | */ |
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34 | |||
35 | /** @addtogroup FLASHEx |
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36 | * @{ |
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37 | */ |
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38 | |||
39 | /** @addtogroup FLASHEx_Private_Constants |
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40 | * @{ |
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41 | */ |
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42 | #if defined(FLASH_SR_RDERR) && defined(FLASH_SR_OPTVERRUSR) |
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43 | |||
44 | #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \ |
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45 | FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | \ |
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46 | FLASH_FLAG_OPTVERRUSR | FLASH_FLAG_RDERR) |
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47 | |||
48 | #elif defined(FLASH_SR_RDERR) |
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49 | |||
50 | #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \ |
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51 | FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | \ |
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52 | FLASH_FLAG_RDERR) |
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53 | |||
54 | #elif defined(FLASH_SR_OPTVERRUSR) |
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55 | |||
56 | #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \ |
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57 | FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | \ |
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58 | FLASH_FLAG_OPTVERRUSR) |
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59 | |||
60 | #else |
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61 | |||
62 | #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \ |
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63 | FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR) |
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64 | |||
65 | #endif /* FLASH_SR_RDERR & FLASH_SR_OPTVERRUSR */ |
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66 | |||
67 | #if defined(STM32L100xB) || defined(STM32L151xB) || defined(STM32L152xB) || defined(STM32L100xBA) \ |
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68 | || defined(STM32L151xBA) || defined(STM32L152xBA) |
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69 | |||
70 | /******* Devices with FLASH 128K *******/ |
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28 | mjames | 71 | #define FLASH_NBPAGES_MAX 512U /* 512 pages from page 0 to page 511U */ |
2 | mjames | 72 | |
73 | #elif defined(STM32L100xC) || defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) \ |
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74 | || defined(STM32L151xCA) || defined(STM32L152xCA) || defined(STM32L162xCA) |
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75 | |||
76 | /******* Devices with FLASH 256K *******/ |
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28 | mjames | 77 | #define FLASH_NBPAGES_MAX 1025U /* 1025 pages from page 0 to page 1024U */ |
2 | mjames | 78 | |
79 | #elif defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xD) || defined(STM32L152xDX) \ |
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80 | || defined(STM32L162xD) || defined(STM32L162xDX) |
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81 | |||
82 | /******* Devices with FLASH 384K *******/ |
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28 | mjames | 83 | #define FLASH_NBPAGES_MAX 1536U /* 1536 pages from page 0 to page 1535U */ |
2 | mjames | 84 | |
85 | #elif defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE) |
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86 | |||
87 | /******* Devices with FLASH 512K *******/ |
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28 | mjames | 88 | #define FLASH_NBPAGES_MAX 2048U /* 2048 pages from page 0 to page 2047U */ |
2 | mjames | 89 | |
90 | #endif /* STM32L100xB || STM32L151xB || STM32L152xB || STM32L100xBA || STM32L151xBA || STM32L152xBA */ |
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91 | |||
28 | mjames | 92 | #define WRP_MASK_LOW (0x0000FFFFU) |
93 | #define WRP_MASK_HIGH (0xFFFF0000U) |
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2 | mjames | 94 | |
95 | /** |
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96 | * @} |
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97 | */ |
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98 | |||
99 | /** @addtogroup FLASHEx_Private_Macros |
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100 | * @{ |
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101 | */ |
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102 | |||
103 | #define IS_FLASH_TYPEERASE(__VALUE__) (((__VALUE__) == FLASH_TYPEERASE_PAGES)) |
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104 | |||
105 | #define IS_OPTIONBYTE(__VALUE__) (((__VALUE__) <= (OPTIONBYTE_WRP|OPTIONBYTE_RDP|OPTIONBYTE_USER|OPTIONBYTE_BOR))) |
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106 | |||
107 | #define IS_WRPSTATE(__VALUE__) (((__VALUE__) == OB_WRPSTATE_DISABLE) || \ |
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108 | ((__VALUE__) == OB_WRPSTATE_ENABLE)) |
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109 | |||
110 | #define IS_OB_WRP(__PAGE__) (((__PAGE__) != 0x0000000U)) |
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111 | |||
112 | #define IS_OB_RDP(__LEVEL__) (((__LEVEL__) == OB_RDP_LEVEL_0) ||\ |
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113 | ((__LEVEL__) == OB_RDP_LEVEL_1) ||\ |
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114 | ((__LEVEL__) == OB_RDP_LEVEL_2)) |
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115 | |||
116 | #define IS_OB_BOR_LEVEL(__LEVEL__) (((__LEVEL__) == OB_BOR_OFF) || \ |
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117 | ((__LEVEL__) == OB_BOR_LEVEL1) || \ |
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118 | ((__LEVEL__) == OB_BOR_LEVEL2) || \ |
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119 | ((__LEVEL__) == OB_BOR_LEVEL3) || \ |
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120 | ((__LEVEL__) == OB_BOR_LEVEL4) || \ |
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121 | ((__LEVEL__) == OB_BOR_LEVEL5)) |
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122 | |||
123 | #define IS_OB_IWDG_SOURCE(__SOURCE__) (((__SOURCE__) == OB_IWDG_SW) || ((__SOURCE__) == OB_IWDG_HW)) |
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124 | |||
125 | #define IS_OB_STOP_SOURCE(__SOURCE__) (((__SOURCE__) == OB_STOP_NORST) || ((__SOURCE__) == OB_STOP_RST)) |
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126 | |||
127 | #define IS_OB_STDBY_SOURCE(__SOURCE__) (((__SOURCE__) == OB_STDBY_NORST) || ((__SOURCE__) == OB_STDBY_RST)) |
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128 | |||
129 | #if defined(FLASH_OBR_SPRMOD) && defined(FLASH_OBR_nRST_BFB2) |
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130 | |||
131 | #define IS_OBEX(__VALUE__) (((__VALUE__) == OPTIONBYTE_PCROP) || ((__VALUE__) == OPTIONBYTE_BOOTCONFIG)) |
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132 | |||
133 | #elif defined(FLASH_OBR_SPRMOD) && !defined(FLASH_OBR_nRST_BFB2) |
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134 | |||
135 | #define IS_OBEX(__VALUE__) ((__VALUE__) == OPTIONBYTE_PCROP) |
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136 | |||
137 | #elif !defined(FLASH_OBR_SPRMOD) && defined(FLASH_OBR_nRST_BFB2) |
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138 | |||
139 | #define IS_OBEX(__VALUE__) ((__VALUE__) == OPTIONBYTE_BOOTCONFIG) |
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140 | |||
141 | #endif /* FLASH_OBR_SPRMOD && FLASH_OBR_nRST_BFB2 */ |
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142 | |||
143 | #if defined(FLASH_OBR_SPRMOD) |
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144 | |||
145 | #define IS_PCROPSTATE(__VALUE__) (((__VALUE__) == OB_PCROP_STATE_DISABLE) || \ |
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146 | ((__VALUE__) == OB_PCROP_STATE_ENABLE)) |
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147 | |||
148 | #define IS_OB_PCROP(__PAGE__) (((__PAGE__) != 0x0000000U)) |
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149 | #endif /* FLASH_OBR_SPRMOD */ |
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150 | |||
151 | #if defined(FLASH_OBR_nRST_BFB2) |
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152 | |||
153 | #define IS_OB_BOOT_BANK(__BANK__) (((__BANK__) == OB_BOOT_BANK2) || ((__BANK__) == OB_BOOT_BANK1)) |
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154 | |||
155 | #endif /* FLASH_OBR_nRST_BFB2 */ |
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156 | |||
157 | #define IS_TYPEERASEDATA(__VALUE__) (((__VALUE__) == FLASH_TYPEERASEDATA_BYTE) || \ |
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158 | ((__VALUE__) == FLASH_TYPEERASEDATA_HALFWORD) || \ |
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159 | ((__VALUE__) == FLASH_TYPEERASEDATA_WORD)) |
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160 | #define IS_TYPEPROGRAMDATA(__VALUE__) (((__VALUE__) == FLASH_TYPEPROGRAMDATA_BYTE) || \ |
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161 | ((__VALUE__) == FLASH_TYPEPROGRAMDATA_HALFWORD) || \ |
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162 | ((__VALUE__) == FLASH_TYPEPROGRAMDATA_WORD) || \ |
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163 | ((__VALUE__) == FLASH_TYPEPROGRAMDATA_FASTBYTE) || \ |
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164 | ((__VALUE__) == FLASH_TYPEPROGRAMDATA_FASTHALFWORD) || \ |
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165 | ((__VALUE__) == FLASH_TYPEPROGRAMDATA_FASTWORD)) |
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166 | |||
28 | mjames | 167 | |
2 | mjames | 168 | /** @defgroup FLASHEx_Address FLASHEx Address |
169 | * @{ |
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170 | */ |
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171 | |||
172 | #define IS_FLASH_DATA_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_EEPROM_BASE) && ((__ADDRESS__) <= FLASH_EEPROM_END)) |
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173 | |||
174 | #if defined(STM32L100xB) || defined(STM32L151xB) || defined(STM32L152xB) || defined(STM32L100xBA) \ |
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175 | || defined(STM32L151xBA) || defined(STM32L152xBA) || defined(STM32L100xC) || defined(STM32L151xC) \ |
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176 | || defined(STM32L152xC) || defined(STM32L162xC) || defined(STM32L151xCA) || defined(STM32L152xCA) \ |
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177 | || defined(STM32L162xCA) |
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178 | |||
179 | #define IS_FLASH_PROGRAM_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BASE) && ((__ADDRESS__) <= FLASH_END)) |
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180 | |||
181 | #else /*STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */ |
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182 | |||
183 | #define IS_FLASH_PROGRAM_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BASE) && ((__ADDRESS__) <= FLASH_BANK2_END)) |
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184 | #define IS_FLASH_PROGRAM_BANK1_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BASE) && ((__ADDRESS__) <= FLASH_BANK1_END)) |
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185 | #define IS_FLASH_PROGRAM_BANK2_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BANK2_BASE) && ((__ADDRESS__) <= FLASH_BANK2_END)) |
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186 | |||
187 | #endif /* STM32L100xB || STM32L151xB || STM32L152xB || (...) || STM32L151xCA || STM32L152xCA || STM32L162xCA */ |
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188 | |||
28 | mjames | 189 | #define IS_NBPAGES(__PAGES__) (((__PAGES__) >= 1U) && ((__PAGES__) <= FLASH_NBPAGES_MAX)) |
2 | mjames | 190 | |
191 | /** |
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192 | * @} |
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193 | */ |
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194 | |||
195 | /** |
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196 | * @} |
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197 | */ |
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198 | /* Exported types ------------------------------------------------------------*/ |
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199 | |||
200 | /** @defgroup FLASHEx_Exported_Types FLASHEx Exported Types |
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201 | * @{ |
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202 | */ |
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203 | |||
204 | /** |
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205 | * @brief FLASH Erase structure definition |
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206 | */ |
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207 | typedef struct |
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208 | { |
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209 | uint32_t TypeErase; /*!< TypeErase: Page Erase only. |
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210 | This parameter can be a value of @ref FLASHEx_Type_Erase */ |
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211 | |||
212 | uint32_t PageAddress; /*!< PageAddress: Initial FLASH address to be erased |
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213 | This parameter must be a value belonging to FLASH Programm address (depending on the devices) */ |
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214 | |||
215 | uint32_t NbPages; /*!< NbPages: Number of pages to be erased. |
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216 | This parameter must be a value between 1 and (max number of pages - value of Initial page)*/ |
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217 | |||
218 | } FLASH_EraseInitTypeDef; |
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219 | |||
220 | /** |
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221 | * @brief FLASH Option Bytes PROGRAM structure definition |
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222 | */ |
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223 | typedef struct |
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224 | { |
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225 | uint32_t OptionType; /*!< OptionType: Option byte to be configured. |
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226 | This parameter can be a value of @ref FLASHEx_Option_Type */ |
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227 | |||
228 | uint32_t WRPState; /*!< WRPState: Write protection activation or deactivation. |
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229 | This parameter can be a value of @ref FLASHEx_WRP_State */ |
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230 | |||
231 | uint32_t WRPSector0To31; /*!< WRPSector0To31: specifies the sector(s) which are write protected between Sector 0 to 31 |
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232 | This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection1 */ |
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233 | |||
234 | #if defined(STM32L100xC) || defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) \ |
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235 | || defined(STM32L151xCA) || defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xCA) \ |
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236 | || defined(STM32L152xD) || defined(STM32L152xDX) || defined(STM32L162xCA) || defined(STM32L162xD) \ |
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237 | || defined(STM32L162xDX) || defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE) |
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238 | uint32_t WRPSector32To63; /*!< WRPSector32To63: specifies the sector(s) which are write protected between Sector 32 to 63 |
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239 | This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection2 */ |
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240 | #endif /* STM32L100xC || STM32L151xC || STM32L152xC || (...) || STM32L151xE || STM32L152xE || STM32L162xE */ |
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241 | |||
242 | #if defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xD) || defined(STM32L152xDX) \ |
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243 | || defined(STM32L162xD) || defined(STM32L162xDX) || defined(STM32L151xE) || defined(STM32L152xE) \ |
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244 | || defined(STM32L162xE) |
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245 | uint32_t WRPSector64To95; /*!< WRPSector64to95: specifies the sector(s) which are write protected between Sector 64 to 95 |
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246 | This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection3 */ |
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247 | #endif /* STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */ |
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248 | |||
249 | #if defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE) || defined(STM32L151xDX) \ |
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250 | || defined(STM32L152xDX) || defined(STM32L162xDX) |
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251 | uint32_t WRPSector96To127; /*!< WRPSector96To127: specifies the sector(s) which are write protected between Sector 96 to 127 or |
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252 | Sectors 96 to 111 for STM32L1xxxDX devices. |
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253 | This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection4 */ |
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254 | #endif /* STM32L151xE || STM32L152xE || STM32L162xE || STM32L151xDX || ... */ |
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255 | |||
256 | uint8_t RDPLevel; /*!< RDPLevel: Set the read protection level. |
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257 | This parameter can be a value of @ref FLASHEx_Option_Bytes_Read_Protection */ |
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258 | |||
259 | uint8_t BORLevel; /*!< BORLevel: Set the BOR Level. |
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260 | This parameter can be a value of @ref FLASHEx_Option_Bytes_BOR_Level */ |
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261 | |||
262 | uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. |
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263 | This parameter can be a combination of @ref FLASHEx_Option_Bytes_IWatchdog, |
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264 | @ref FLASHEx_Option_Bytes_nRST_STOP and @ref FLASHEx_Option_Bytes_nRST_STDBY*/ |
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265 | } FLASH_OBProgramInitTypeDef; |
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266 | |||
267 | #if defined(FLASH_OBR_SPRMOD) || defined(FLASH_OBR_nRST_BFB2) |
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268 | /** |
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269 | * @brief FLASH Advanced Option Bytes Program structure definition |
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270 | */ |
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271 | typedef struct |
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272 | { |
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273 | uint32_t OptionType; /*!< OptionType: Option byte to be configured for extension . |
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274 | This parameter can be a value of @ref FLASHEx_OptionAdv_Type */ |
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275 | |||
276 | #if defined(FLASH_OBR_SPRMOD) |
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277 | uint32_t PCROPState; /*!< PCROPState: PCROP activation or deactivation. |
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278 | This parameter can be a value of @ref FLASHEx_PCROP_State */ |
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279 | |||
280 | uint32_t PCROPSector0To31; /*!< PCROPSector0To31: specifies the sector(s) set for PCROP |
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281 | This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection1 */ |
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282 | |||
283 | #if defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) |
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284 | uint32_t PCROPSector32To63; /*!< PCROPSector32To63: specifies the sector(s) set for PCROP |
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285 | This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection2 */ |
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286 | #endif /* STM32L151xC || STM32L152xC || STM32L162xC */ |
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287 | #endif /* FLASH_OBR_SPRMOD */ |
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288 | |||
289 | #if defined(FLASH_OBR_nRST_BFB2) |
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290 | uint16_t BootConfig; /*!< BootConfig: specifies Option bytes for boot config |
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291 | This parameter can be a value of @ref FLASHEx_Option_Bytes_BOOT */ |
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292 | #endif /* FLASH_OBR_nRST_BFB2*/ |
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293 | } FLASH_AdvOBProgramInitTypeDef; |
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294 | |||
295 | /** |
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296 | * @} |
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297 | */ |
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298 | #endif /* FLASH_OBR_SPRMOD || FLASH_OBR_nRST_BFB2 */ |
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299 | |||
300 | /* Exported constants --------------------------------------------------------*/ |
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301 | |||
302 | |||
303 | /** @defgroup FLASHEx_Exported_Constants FLASHEx Exported Constants |
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304 | * @{ |
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305 | */ |
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306 | |||
307 | /** @defgroup FLASHEx_Type_Erase FLASHEx_Type_Erase |
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308 | * @{ |
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309 | */ |
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28 | mjames | 310 | #define FLASH_TYPEERASE_PAGES (0x00U) /*!<Page erase only*/ |
311 | |||
2 | mjames | 312 | /** |
313 | * @} |
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314 | */ |
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315 | |||
316 | /** @defgroup FLASHEx_Option_Type FLASHEx Option Type |
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317 | * @{ |
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318 | */ |
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28 | mjames | 319 | #define OPTIONBYTE_WRP (0x01U) /*!<WRP option byte configuration*/ |
320 | #define OPTIONBYTE_RDP (0x02U) /*!<RDP option byte configuration*/ |
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321 | #define OPTIONBYTE_USER (0x04U) /*!<USER option byte configuration*/ |
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322 | #define OPTIONBYTE_BOR (0x08U) /*!<BOR option byte configuration*/ |
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2 | mjames | 323 | |
324 | /** |
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325 | * @} |
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326 | */ |
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327 | |||
328 | /** @defgroup FLASHEx_WRP_State FLASHEx WRP State |
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329 | * @{ |
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330 | */ |
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28 | mjames | 331 | #define OB_WRPSTATE_DISABLE (0x00U) /*!<Disable the write protection of the desired sectors*/ |
332 | #define OB_WRPSTATE_ENABLE (0x01U) /*!<Enable the write protection of the desired sectors*/ |
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2 | mjames | 333 | |
334 | /** |
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335 | * @} |
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336 | */ |
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337 | |||
338 | /** @defgroup FLASHEx_Option_Bytes_Write_Protection1 FLASHEx Option Bytes Write Protection1 |
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339 | * @{ |
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340 | */ |
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341 | |||
342 | /* Common pages for Cat1, Cat2, Cat3, Cat4 & Cat5 devices */ |
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28 | mjames | 343 | #define OB_WRP1_PAGES0TO15 (0x00000001U) /* Write protection of Sector0 */ |
344 | #define OB_WRP1_PAGES16TO31 (0x00000002U) /* Write protection of Sector1 */ |
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345 | #define OB_WRP1_PAGES32TO47 (0x00000004U) /* Write protection of Sector2 */ |
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346 | #define OB_WRP1_PAGES48TO63 (0x00000008U) /* Write protection of Sector3 */ |
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347 | #define OB_WRP1_PAGES64TO79 (0x00000010U) /* Write protection of Sector4 */ |
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348 | #define OB_WRP1_PAGES80TO95 (0x00000020U) /* Write protection of Sector5 */ |
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349 | #define OB_WRP1_PAGES96TO111 (0x00000040U) /* Write protection of Sector6 */ |
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350 | #define OB_WRP1_PAGES112TO127 (0x00000080U) /* Write protection of Sector7 */ |
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351 | #define OB_WRP1_PAGES128TO143 (0x00000100U) /* Write protection of Sector8 */ |
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352 | #define OB_WRP1_PAGES144TO159 (0x00000200U) /* Write protection of Sector9 */ |
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353 | #define OB_WRP1_PAGES160TO175 (0x00000400U) /* Write protection of Sector10 */ |
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354 | #define OB_WRP1_PAGES176TO191 (0x00000800U) /* Write protection of Sector11 */ |
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355 | #define OB_WRP1_PAGES192TO207 (0x00001000U) /* Write protection of Sector12 */ |
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356 | #define OB_WRP1_PAGES208TO223 (0x00002000U) /* Write protection of Sector13 */ |
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357 | #define OB_WRP1_PAGES224TO239 (0x00004000U) /* Write protection of Sector14 */ |
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358 | #define OB_WRP1_PAGES240TO255 (0x00008000U) /* Write protection of Sector15 */ |
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359 | #define OB_WRP1_PAGES256TO271 (0x00010000U) /* Write protection of Sector16 */ |
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360 | #define OB_WRP1_PAGES272TO287 (0x00020000U) /* Write protection of Sector17 */ |
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361 | #define OB_WRP1_PAGES288TO303 (0x00040000U) /* Write protection of Sector18 */ |
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362 | #define OB_WRP1_PAGES304TO319 (0x00080000U) /* Write protection of Sector19 */ |
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363 | #define OB_WRP1_PAGES320TO335 (0x00100000U) /* Write protection of Sector20 */ |
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364 | #define OB_WRP1_PAGES336TO351 (0x00200000U) /* Write protection of Sector21 */ |
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365 | #define OB_WRP1_PAGES352TO367 (0x00400000U) /* Write protection of Sector22 */ |
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366 | #define OB_WRP1_PAGES368TO383 (0x00800000U) /* Write protection of Sector23 */ |
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367 | #define OB_WRP1_PAGES384TO399 (0x01000000U) /* Write protection of Sector24 */ |
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368 | #define OB_WRP1_PAGES400TO415 (0x02000000U) /* Write protection of Sector25 */ |
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369 | #define OB_WRP1_PAGES416TO431 (0x04000000U) /* Write protection of Sector26 */ |
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370 | #define OB_WRP1_PAGES432TO447 (0x08000000U) /* Write protection of Sector27 */ |
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371 | #define OB_WRP1_PAGES448TO463 (0x10000000U) /* Write protection of Sector28 */ |
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372 | #define OB_WRP1_PAGES464TO479 (0x20000000U) /* Write protection of Sector29 */ |
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373 | #define OB_WRP1_PAGES480TO495 (0x40000000U) /* Write protection of Sector30 */ |
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374 | #define OB_WRP1_PAGES496TO511 (0x80000000U) /* Write protection of Sector31 */ |
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2 | mjames | 375 | |
376 | #define OB_WRP1_ALLPAGES ((uint32_t)FLASH_WRPR1_WRP) /*!< Write protection of all Sectors */ |
||
377 | |||
378 | /** |
||
379 | * @} |
||
380 | */ |
||
381 | |||
382 | #if defined(STM32L100xC) || defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) \ |
||
383 | || defined(STM32L151xCA) || defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xCA) \ |
||
384 | || defined(STM32L152xD) || defined(STM32L152xDX) || defined(STM32L162xCA) || defined(STM32L162xD) \ |
||
385 | || defined(STM32L162xDX) || defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE) |
||
386 | |||
387 | /** @defgroup FLASHEx_Option_Bytes_Write_Protection2 FLASHEx Option Bytes Write Protection2 |
||
388 | * @{ |
||
389 | */ |
||
390 | |||
391 | /* Pages for Cat3, Cat4 & Cat5 devices*/ |
||
28 | mjames | 392 | #define OB_WRP2_PAGES512TO527 (0x00000001U) /* Write protection of Sector32 */ |
393 | #define OB_WRP2_PAGES528TO543 (0x00000002U) /* Write protection of Sector33 */ |
||
394 | #define OB_WRP2_PAGES544TO559 (0x00000004U) /* Write protection of Sector34 */ |
||
395 | #define OB_WRP2_PAGES560TO575 (0x00000008U) /* Write protection of Sector35 */ |
||
396 | #define OB_WRP2_PAGES576TO591 (0x00000010U) /* Write protection of Sector36 */ |
||
397 | #define OB_WRP2_PAGES592TO607 (0x00000020U) /* Write protection of Sector37 */ |
||
398 | #define OB_WRP2_PAGES608TO623 (0x00000040U) /* Write protection of Sector38 */ |
||
399 | #define OB_WRP2_PAGES624TO639 (0x00000080U) /* Write protection of Sector39 */ |
||
400 | #define OB_WRP2_PAGES640TO655 (0x00000100U) /* Write protection of Sector40 */ |
||
401 | #define OB_WRP2_PAGES656TO671 (0x00000200U) /* Write protection of Sector41 */ |
||
402 | #define OB_WRP2_PAGES672TO687 (0x00000400U) /* Write protection of Sector42 */ |
||
403 | #define OB_WRP2_PAGES688TO703 (0x00000800U) /* Write protection of Sector43 */ |
||
404 | #define OB_WRP2_PAGES704TO719 (0x00001000U) /* Write protection of Sector44 */ |
||
405 | #define OB_WRP2_PAGES720TO735 (0x00002000U) /* Write protection of Sector45 */ |
||
406 | #define OB_WRP2_PAGES736TO751 (0x00004000U) /* Write protection of Sector46 */ |
||
407 | #define OB_WRP2_PAGES752TO767 (0x00008000U) /* Write protection of Sector47 */ |
||
2 | mjames | 408 | |
409 | #if defined(STM32L100xC) || defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) \ |
||
410 | || defined(STM32L151xCA) || defined(STM32L151xD) || defined(STM32L152xCA) || defined(STM32L152xD) \ |
||
411 | || defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L151xE) || defined(STM32L152xE) \ |
||
412 | || defined(STM32L162xE) |
||
413 | |||
28 | mjames | 414 | #define OB_WRP2_PAGES768TO783 (0x00010000U) /* Write protection of Sector48 */ |
415 | #define OB_WRP2_PAGES784TO799 (0x00020000U) /* Write protection of Sector49 */ |
||
416 | #define OB_WRP2_PAGES800TO815 (0x00040000U) /* Write protection of Sector50 */ |
||
417 | #define OB_WRP2_PAGES816TO831 (0x00080000U) /* Write protection of Sector51 */ |
||
418 | #define OB_WRP2_PAGES832TO847 (0x00100000U) /* Write protection of Sector52 */ |
||
419 | #define OB_WRP2_PAGES848TO863 (0x00200000U) /* Write protection of Sector53 */ |
||
420 | #define OB_WRP2_PAGES864TO879 (0x00400000U) /* Write protection of Sector54 */ |
||
421 | #define OB_WRP2_PAGES880TO895 (0x00800000U) /* Write protection of Sector55 */ |
||
422 | #define OB_WRP2_PAGES896TO911 (0x01000000U) /* Write protection of Sector56 */ |
||
423 | #define OB_WRP2_PAGES912TO927 (0x02000000U) /* Write protection of Sector57 */ |
||
424 | #define OB_WRP2_PAGES928TO943 (0x04000000U) /* Write protection of Sector58 */ |
||
425 | #define OB_WRP2_PAGES944TO959 (0x08000000U) /* Write protection of Sector59 */ |
||
426 | #define OB_WRP2_PAGES960TO975 (0x10000000U) /* Write protection of Sector60 */ |
||
427 | #define OB_WRP2_PAGES976TO991 (0x20000000U) /* Write protection of Sector61 */ |
||
428 | #define OB_WRP2_PAGES992TO1007 (0x40000000U) /* Write protection of Sector62 */ |
||
429 | #define OB_WRP2_PAGES1008TO1023 (0x80000000U) /* Write protection of Sector63 */ |
||
2 | mjames | 430 | |
431 | #endif /* STM32L100xC || STM32L151xC || STM32L152xC || (...) || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */ |
||
432 | |||
433 | #define OB_WRP2_ALLPAGES ((uint32_t)FLASH_WRPR2_WRP) /*!< Write protection of all Sectors */ |
||
434 | |||
435 | /** |
||
436 | * @} |
||
437 | */ |
||
438 | |||
439 | #endif /* STM32L100xC || STM32L151xC || STM32L152xC || (...) || STM32L162xD || STM32L151xDX || STM32L152xE || STM32L162xE */ |
||
440 | |||
441 | #if defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xD) || defined(STM32L152xDX) \ |
||
442 | || defined(STM32L162xD) || defined(STM32L162xDX) || defined(STM32L151xE) || defined(STM32L152xE) \ |
||
443 | || defined(STM32L162xE) |
||
444 | |||
445 | /** @defgroup FLASHEx_Option_Bytes_Write_Protection3 FLASHEx Option Bytes Write Protection3 |
||
446 | * @{ |
||
447 | */ |
||
448 | |||
449 | /* Pages for devices with FLASH >= 256KB*/ |
||
28 | mjames | 450 | #define OB_WRP3_PAGES1024TO1039 (0x00000001U) /* Write protection of Sector64 */ |
451 | #define OB_WRP3_PAGES1040TO1055 (0x00000002U) /* Write protection of Sector65 */ |
||
452 | #define OB_WRP3_PAGES1056TO1071 (0x00000004U) /* Write protection of Sector66 */ |
||
453 | #define OB_WRP3_PAGES1072TO1087 (0x00000008U) /* Write protection of Sector67 */ |
||
454 | #define OB_WRP3_PAGES1088TO1103 (0x00000010U) /* Write protection of Sector68 */ |
||
455 | #define OB_WRP3_PAGES1104TO1119 (0x00000020U) /* Write protection of Sector69 */ |
||
456 | #define OB_WRP3_PAGES1120TO1135 (0x00000040U) /* Write protection of Sector70 */ |
||
457 | #define OB_WRP3_PAGES1136TO1151 (0x00000080U) /* Write protection of Sector71 */ |
||
458 | #define OB_WRP3_PAGES1152TO1167 (0x00000100U) /* Write protection of Sector72 */ |
||
459 | #define OB_WRP3_PAGES1168TO1183 (0x00000200U) /* Write protection of Sector73 */ |
||
460 | #define OB_WRP3_PAGES1184TO1199 (0x00000400U) /* Write protection of Sector74 */ |
||
461 | #define OB_WRP3_PAGES1200TO1215 (0x00000800U) /* Write protection of Sector75 */ |
||
462 | #define OB_WRP3_PAGES1216TO1231 (0x00001000U) /* Write protection of Sector76 */ |
||
463 | #define OB_WRP3_PAGES1232TO1247 (0x00002000U) /* Write protection of Sector77 */ |
||
464 | #define OB_WRP3_PAGES1248TO1263 (0x00004000U) /* Write protection of Sector78 */ |
||
465 | #define OB_WRP3_PAGES1264TO1279 (0x00008000U) /* Write protection of Sector79 */ |
||
466 | #define OB_WRP3_PAGES1280TO1295 (0x00010000U) /* Write protection of Sector80 */ |
||
467 | #define OB_WRP3_PAGES1296TO1311 (0x00020000U) /* Write protection of Sector81 */ |
||
468 | #define OB_WRP3_PAGES1312TO1327 (0x00040000U) /* Write protection of Sector82 */ |
||
469 | #define OB_WRP3_PAGES1328TO1343 (0x00080000U) /* Write protection of Sector83 */ |
||
470 | #define OB_WRP3_PAGES1344TO1359 (0x00100000U) /* Write protection of Sector84 */ |
||
471 | #define OB_WRP3_PAGES1360TO1375 (0x00200000U) /* Write protection of Sector85 */ |
||
472 | #define OB_WRP3_PAGES1376TO1391 (0x00400000U) /* Write protection of Sector86 */ |
||
473 | #define OB_WRP3_PAGES1392TO1407 (0x00800000U) /* Write protection of Sector87 */ |
||
474 | #define OB_WRP3_PAGES1408TO1423 (0x01000000U) /* Write protection of Sector88 */ |
||
475 | #define OB_WRP3_PAGES1424TO1439 (0x02000000U) /* Write protection of Sector89 */ |
||
476 | #define OB_WRP3_PAGES1440TO1455 (0x04000000U) /* Write protection of Sector90 */ |
||
477 | #define OB_WRP3_PAGES1456TO1471 (0x08000000U) /* Write protection of Sector91 */ |
||
478 | #define OB_WRP3_PAGES1472TO1487 (0x10000000U) /* Write protection of Sector92 */ |
||
479 | #define OB_WRP3_PAGES1488TO1503 (0x20000000U) /* Write protection of Sector93 */ |
||
480 | #define OB_WRP3_PAGES1504TO1519 (0x40000000U) /* Write protection of Sector94 */ |
||
481 | #define OB_WRP3_PAGES1520TO1535 (0x80000000U) /* Write protection of Sector95 */ |
||
2 | mjames | 482 | |
483 | #define OB_WRP3_ALLPAGES ((uint32_t)FLASH_WRPR3_WRP) /*!< Write protection of all Sectors */ |
||
484 | |||
485 | /** |
||
486 | * @} |
||
487 | */ |
||
488 | |||
489 | #endif /* STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE*/ |
||
490 | |||
491 | #if defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE) || defined(STM32L151xDX) \ |
||
492 | || defined(STM32L152xDX) || defined(STM32L162xDX) |
||
493 | |||
494 | /** @defgroup FLASHEx_Option_Bytes_Write_Protection4 FLASHEx Option Bytes Write Protection4 |
||
495 | * @{ |
||
496 | */ |
||
497 | |||
498 | /* Pages for Cat5 devices*/ |
||
28 | mjames | 499 | #define OB_WRP4_PAGES1536TO1551 (0x00000001U)/* Write protection of Sector96*/ |
500 | #define OB_WRP4_PAGES1552TO1567 (0x00000002U)/* Write protection of Sector97*/ |
||
501 | #define OB_WRP4_PAGES1568TO1583 (0x00000004U)/* Write protection of Sector98*/ |
||
502 | #define OB_WRP4_PAGES1584TO1599 (0x00000008U)/* Write protection of Sector99*/ |
||
503 | #define OB_WRP4_PAGES1600TO1615 (0x00000010U) /* Write protection of Sector100*/ |
||
504 | #define OB_WRP4_PAGES1616TO1631 (0x00000020U) /* Write protection of Sector101*/ |
||
505 | #define OB_WRP4_PAGES1632TO1647 (0x00000040U) /* Write protection of Sector102*/ |
||
506 | #define OB_WRP4_PAGES1648TO1663 (0x00000080U) /* Write protection of Sector103*/ |
||
507 | #define OB_WRP4_PAGES1664TO1679 (0x00000100U) /* Write protection of Sector104*/ |
||
508 | #define OB_WRP4_PAGES1680TO1695 (0x00000200U) /* Write protection of Sector105*/ |
||
509 | #define OB_WRP4_PAGES1696TO1711 (0x00000400U) /* Write protection of Sector106*/ |
||
510 | #define OB_WRP4_PAGES1712TO1727 (0x00000800U) /* Write protection of Sector107*/ |
||
511 | #define OB_WRP4_PAGES1728TO1743 (0x00001000U) /* Write protection of Sector108*/ |
||
512 | #define OB_WRP4_PAGES1744TO1759 (0x00002000U) /* Write protection of Sector109*/ |
||
513 | #define OB_WRP4_PAGES1760TO1775 (0x00004000U) /* Write protection of Sector110*/ |
||
514 | #define OB_WRP4_PAGES1776TO1791 (0x00008000U) /* Write protection of Sector111*/ |
||
2 | mjames | 515 | |
516 | #if defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE) |
||
517 | |||
28 | mjames | 518 | #define OB_WRP4_PAGES1792TO1807 (0x00010000U) /* Write protection of Sector112*/ |
519 | #define OB_WRP4_PAGES1808TO1823 (0x00020000U) /* Write protection of Sector113*/ |
||
520 | #define OB_WRP4_PAGES1824TO1839 (0x00040000U) /* Write protection of Sector114*/ |
||
521 | #define OB_WRP4_PAGES1840TO1855 (0x00080000U) /* Write protection of Sector115*/ |
||
522 | #define OB_WRP4_PAGES1856TO1871 (0x00100000U) /* Write protection of Sector116*/ |
||
523 | #define OB_WRP4_PAGES1872TO1887 (0x00200000U) /* Write protection of Sector117*/ |
||
524 | #define OB_WRP4_PAGES1888TO1903 (0x00400000U) /* Write protection of Sector118*/ |
||
525 | #define OB_WRP4_PAGES1904TO1919 (0x00800000U) /* Write protection of Sector119*/ |
||
526 | #define OB_WRP4_PAGES1920TO1935 (0x01000000U) /* Write protection of Sector120*/ |
||
527 | #define OB_WRP4_PAGES1936TO1951 (0x02000000U) /* Write protection of Sector121*/ |
||
528 | #define OB_WRP4_PAGES1952TO1967 (0x04000000U) /* Write protection of Sector122*/ |
||
529 | #define OB_WRP4_PAGES1968TO1983 (0x08000000U) /* Write protection of Sector123*/ |
||
530 | #define OB_WRP4_PAGES1984TO1999 (0x10000000U) /* Write protection of Sector124*/ |
||
531 | #define OB_WRP4_PAGES2000TO2015 (0x20000000U) /* Write protection of Sector125*/ |
||
532 | #define OB_WRP4_PAGES2016TO2031 (0x40000000U) /* Write protection of Sector126*/ |
||
533 | #define OB_WRP4_PAGES2032TO2047 (0x80000000U) /* Write protection of Sector127*/ |
||
2 | mjames | 534 | |
535 | #endif /* STM32L151xE || STM32L152xE || STM32L162xE */ |
||
536 | |||
537 | #define OB_WRP4_ALLPAGES ((uint32_t)FLASH_WRPR4_WRP) /*!< Write protection of all Sectors */ |
||
538 | |||
539 | /** |
||
540 | * @} |
||
541 | */ |
||
542 | |||
543 | #endif /* STM32L151xE || STM32L152xE || STM32L162xE || STM32L151xDX || ... */ |
||
544 | |||
545 | /** @defgroup FLASHEx_Option_Bytes_Read_Protection FLASHEx Option Bytes Read Protection |
||
546 | * @{ |
||
547 | */ |
||
548 | #define OB_RDP_LEVEL_0 ((uint8_t)0xAAU) |
||
549 | #define OB_RDP_LEVEL_1 ((uint8_t)0xBBU) |
||
550 | #define OB_RDP_LEVEL_2 ((uint8_t)0xCCU) /* Warning: When enabling read protection level 2 |
||
551 | it is no more possible to go back to level 1 or 0 */ |
||
552 | |||
553 | /** |
||
554 | * @} |
||
555 | */ |
||
556 | |||
557 | /** @defgroup FLASHEx_Option_Bytes_BOR_Level FLASHEx Option Bytes BOR Level |
||
558 | * @{ |
||
559 | */ |
||
560 | |||
561 | #define OB_BOR_OFF ((uint8_t)0x00U) /*!< BOR is disabled at power down, the reset is asserted when the VDD |
||
562 | power supply reaches the PDR(Power Down Reset) threshold (1.5V) */ |
||
563 | #define OB_BOR_LEVEL1 ((uint8_t)0x08U) /*!< BOR Reset threshold levels for 1.7V - 1.8V VDD power supply */ |
||
564 | #define OB_BOR_LEVEL2 ((uint8_t)0x09U) /*!< BOR Reset threshold levels for 1.9V - 2.0V VDD power supply */ |
||
565 | #define OB_BOR_LEVEL3 ((uint8_t)0x0AU) /*!< BOR Reset threshold levels for 2.3V - 2.4V VDD power supply */ |
||
566 | #define OB_BOR_LEVEL4 ((uint8_t)0x0BU) /*!< BOR Reset threshold levels for 2.55V - 2.65V VDD power supply */ |
||
567 | #define OB_BOR_LEVEL5 ((uint8_t)0x0CU) /*!< BOR Reset threshold levels for 2.8V - 2.9V VDD power supply */ |
||
568 | |||
569 | /** |
||
570 | * @} |
||
571 | */ |
||
572 | |||
573 | /** @defgroup FLASHEx_Option_Bytes_IWatchdog FLASHEx Option Bytes IWatchdog |
||
574 | * @{ |
||
575 | */ |
||
576 | |||
577 | #define OB_IWDG_SW ((uint8_t)0x10U) /*!< Software WDG selected */ |
||
578 | #define OB_IWDG_HW ((uint8_t)0x00U) /*!< Hardware WDG selected */ |
||
579 | |||
580 | /** |
||
581 | * @} |
||
582 | */ |
||
583 | |||
584 | /** @defgroup FLASHEx_Option_Bytes_nRST_STOP FLASHEx Option Bytes nRST_STOP |
||
585 | * @{ |
||
586 | */ |
||
587 | |||
588 | #define OB_STOP_NORST ((uint8_t)0x20U) /*!< No reset generated when entering in STOP */ |
||
589 | #define OB_STOP_RST ((uint8_t)0x00U) /*!< Reset generated when entering in STOP */ |
||
590 | /** |
||
591 | * @} |
||
592 | */ |
||
593 | |||
594 | /** @defgroup FLASHEx_Option_Bytes_nRST_STDBY FLASHEx Option Bytes nRST_STDBY |
||
595 | * @{ |
||
596 | */ |
||
597 | |||
598 | #define OB_STDBY_NORST ((uint8_t)0x40U) /*!< No reset generated when entering in STANDBY */ |
||
599 | #define OB_STDBY_RST ((uint8_t)0x00U) /*!< Reset generated when entering in STANDBY */ |
||
600 | |||
601 | /** |
||
602 | * @} |
||
603 | */ |
||
604 | |||
605 | #if defined(FLASH_OBR_SPRMOD) |
||
606 | |||
607 | /** @defgroup FLASHEx_OptionAdv_Type FLASHEx Option Advanced Type |
||
608 | * @{ |
||
609 | */ |
||
610 | |||
28 | mjames | 611 | #define OPTIONBYTE_PCROP (0x01U) /*!<PCROP option byte configuration*/ |
2 | mjames | 612 | |
613 | /** |
||
614 | * @} |
||
615 | */ |
||
616 | |||
617 | #endif /* FLASH_OBR_SPRMOD */ |
||
618 | |||
619 | #if defined(FLASH_OBR_nRST_BFB2) |
||
620 | |||
621 | /** @defgroup FLASHEx_OptionAdv_Type FLASHEx Option Advanced Type |
||
622 | * @{ |
||
623 | */ |
||
624 | |||
28 | mjames | 625 | #define OPTIONBYTE_BOOTCONFIG (0x02U) /*!<BOOTConfig option byte configuration*/ |
2 | mjames | 626 | |
627 | /** |
||
628 | * @} |
||
629 | */ |
||
630 | |||
631 | #endif /* FLASH_OBR_nRST_BFB2 */ |
||
632 | |||
633 | #if defined(FLASH_OBR_SPRMOD) |
||
634 | |||
635 | /** @defgroup FLASHEx_PCROP_State FLASHEx PCROP State |
||
636 | * @{ |
||
637 | */ |
||
28 | mjames | 638 | #define OB_PCROP_STATE_DISABLE (0x00U) /*!<Disable PCROP for selected sectors */ |
639 | #define OB_PCROP_STATE_ENABLE (0x01U) /*!<Enable PCROP for selected sectors */ |
||
2 | mjames | 640 | |
641 | /** |
||
642 | * @} |
||
643 | */ |
||
644 | |||
645 | /** @defgroup FLASHEx_Selection_Protection_Mode FLASHEx Selection Protection Mode |
||
646 | * @{ |
||
647 | */ |
||
648 | #define OB_PCROP_DESELECTED ((uint16_t)0x0000U) /*!< Disabled PCROP, nWPRi bits used for Write Protection on sector i */ |
||
649 | #define OB_PCROP_SELECTED ((uint16_t)FLASH_OBR_SPRMOD) /*!< Enable PCROP, nWPRi bits used for PCRoP Protection on sector i */ |
||
650 | |||
651 | /** |
||
652 | * @} |
||
653 | */ |
||
654 | #endif /* FLASH_OBR_SPRMOD */ |
||
655 | |||
656 | #if defined(STM32L151xBA) || defined(STM32L152xBA) || defined(STM32L151xC) || defined(STM32L152xC) \ |
||
657 | || defined(STM32L162xC) |
||
658 | /** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection1 FLASHEx Option Bytes PC ReadWrite Protection 1 |
||
659 | * @{ |
||
660 | */ |
||
661 | |||
662 | /* Common pages for Cat1, Cat2, Cat3, Cat4 & Cat5 devices */ |
||
28 | mjames | 663 | #define OB_PCROP1_PAGES0TO15 (0x00000001U) /* PC Read/Write protection of Sector0 */ |
664 | #define OB_PCROP1_PAGES16TO31 (0x00000002U) /* PC Read/Write protection of Sector1 */ |
||
665 | #define OB_PCROP1_PAGES32TO47 (0x00000004U) /* PC Read/Write protection of Sector2 */ |
||
666 | #define OB_PCROP1_PAGES48TO63 (0x00000008U) /* PC Read/Write protection of Sector3 */ |
||
667 | #define OB_PCROP1_PAGES64TO79 (0x00000010U) /* PC Read/Write protection of Sector4 */ |
||
668 | #define OB_PCROP1_PAGES80TO95 (0x00000020U) /* PC Read/Write protection of Sector5 */ |
||
669 | #define OB_PCROP1_PAGES96TO111 (0x00000040U) /* PC Read/Write protection of Sector6 */ |
||
670 | #define OB_PCROP1_PAGES112TO127 (0x00000080U) /* PC Read/Write protection of Sector7 */ |
||
671 | #define OB_PCROP1_PAGES128TO143 (0x00000100U) /* PC Read/Write protection of Sector8 */ |
||
672 | #define OB_PCROP1_PAGES144TO159 (0x00000200U) /* PC Read/Write protection of Sector9 */ |
||
673 | #define OB_PCROP1_PAGES160TO175 (0x00000400U) /* PC Read/Write protection of Sector10 */ |
||
674 | #define OB_PCROP1_PAGES176TO191 (0x00000800U) /* PC Read/Write protection of Sector11 */ |
||
675 | #define OB_PCROP1_PAGES192TO207 (0x00001000U) /* PC Read/Write protection of Sector12 */ |
||
676 | #define OB_PCROP1_PAGES208TO223 (0x00002000U) /* PC Read/Write protection of Sector13 */ |
||
677 | #define OB_PCROP1_PAGES224TO239 (0x00004000U) /* PC Read/Write protection of Sector14 */ |
||
678 | #define OB_PCROP1_PAGES240TO255 (0x00008000U) /* PC Read/Write protection of Sector15 */ |
||
679 | #define OB_PCROP1_PAGES256TO271 (0x00010000U) /* PC Read/Write protection of Sector16 */ |
||
680 | #define OB_PCROP1_PAGES272TO287 (0x00020000U) /* PC Read/Write protection of Sector17 */ |
||
681 | #define OB_PCROP1_PAGES288TO303 (0x00040000U) /* PC Read/Write protection of Sector18 */ |
||
682 | #define OB_PCROP1_PAGES304TO319 (0x00080000U) /* PC Read/Write protection of Sector19 */ |
||
683 | #define OB_PCROP1_PAGES320TO335 (0x00100000U) /* PC Read/Write protection of Sector20 */ |
||
684 | #define OB_PCROP1_PAGES336TO351 (0x00200000U) /* PC Read/Write protection of Sector21 */ |
||
685 | #define OB_PCROP1_PAGES352TO367 (0x00400000U) /* PC Read/Write protection of Sector22 */ |
||
686 | #define OB_PCROP1_PAGES368TO383 (0x00800000U) /* PC Read/Write protection of Sector23 */ |
||
687 | #define OB_PCROP1_PAGES384TO399 (0x01000000U) /* PC Read/Write protection of Sector24 */ |
||
688 | #define OB_PCROP1_PAGES400TO415 (0x02000000U) /* PC Read/Write protection of Sector25 */ |
||
689 | #define OB_PCROP1_PAGES416TO431 (0x04000000U) /* PC Read/Write protection of Sector26 */ |
||
690 | #define OB_PCROP1_PAGES432TO447 (0x08000000U) /* PC Read/Write protection of Sector27 */ |
||
691 | #define OB_PCROP1_PAGES448TO463 (0x10000000U) /* PC Read/Write protection of Sector28 */ |
||
692 | #define OB_PCROP1_PAGES464TO479 (0x20000000U) /* PC Read/Write protection of Sector29 */ |
||
693 | #define OB_PCROP1_PAGES480TO495 (0x40000000U) /* PC Read/Write protection of Sector30 */ |
||
694 | #define OB_PCROP1_PAGES496TO511 (0x80000000U) /* PC Read/Write protection of Sector31 */ |
||
2 | mjames | 695 | |
28 | mjames | 696 | #define OB_PCROP1_ALLPAGES (0xFFFFFFFFU) /*!< PC Read/Write protection of all Sectors */ |
2 | mjames | 697 | |
698 | /** |
||
699 | * @} |
||
700 | */ |
||
701 | #endif /* STM32L151xBA || STM32L152xBA || STM32L151xC || STM32L152xC || STM32L162xC */ |
||
702 | |||
703 | #if defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) |
||
704 | |||
705 | /** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection2 FLASHEx Option Bytes PC ReadWrite Protection 2 |
||
706 | * @{ |
||
707 | */ |
||
708 | |||
709 | /* Pages for Cat3, Cat4 & Cat5 devices*/ |
||
28 | mjames | 710 | #define OB_PCROP2_PAGES512TO527 (0x00000001U) /* PC Read/Write protection of Sector32 */ |
711 | #define OB_PCROP2_PAGES528TO543 (0x00000002U) /* PC Read/Write protection of Sector33 */ |
||
712 | #define OB_PCROP2_PAGES544TO559 (0x00000004U) /* PC Read/Write protection of Sector34 */ |
||
713 | #define OB_PCROP2_PAGES560TO575 (0x00000008U) /* PC Read/Write protection of Sector35 */ |
||
714 | #define OB_PCROP2_PAGES576TO591 (0x00000010U) /* PC Read/Write protection of Sector36 */ |
||
715 | #define OB_PCROP2_PAGES592TO607 (0x00000020U) /* PC Read/Write protection of Sector37 */ |
||
716 | #define OB_PCROP2_PAGES608TO623 (0x00000040U) /* PC Read/Write protection of Sector38 */ |
||
717 | #define OB_PCROP2_PAGES624TO639 (0x00000080U) /* PC Read/Write protection of Sector39 */ |
||
718 | #define OB_PCROP2_PAGES640TO655 (0x00000100U) /* PC Read/Write protection of Sector40 */ |
||
719 | #define OB_PCROP2_PAGES656TO671 (0x00000200U) /* PC Read/Write protection of Sector41 */ |
||
720 | #define OB_PCROP2_PAGES672TO687 (0x00000400U) /* PC Read/Write protection of Sector42 */ |
||
721 | #define OB_PCROP2_PAGES688TO703 (0x00000800U) /* PC Read/Write protection of Sector43 */ |
||
722 | #define OB_PCROP2_PAGES704TO719 (0x00001000U) /* PC Read/Write protection of Sector44 */ |
||
723 | #define OB_PCROP2_PAGES720TO735 (0x00002000U) /* PC Read/Write protection of Sector45 */ |
||
724 | #define OB_PCROP2_PAGES736TO751 (0x00004000U) /* PC Read/Write protection of Sector46 */ |
||
725 | #define OB_PCROP2_PAGES752TO767 (0x00008000U) /* PC Read/Write protection of Sector47 */ |
||
726 | #define OB_PCROP2_PAGES768TO783 (0x00010000U) /* PC Read/Write protection of Sector48 */ |
||
727 | #define OB_PCROP2_PAGES784TO799 (0x00020000U) /* PC Read/Write protection of Sector49 */ |
||
728 | #define OB_PCROP2_PAGES800TO815 (0x00040000U) /* PC Read/Write protection of Sector50 */ |
||
729 | #define OB_PCROP2_PAGES816TO831 (0x00080000U) /* PC Read/Write protection of Sector51 */ |
||
730 | #define OB_PCROP2_PAGES832TO847 (0x00100000U) /* PC Read/Write protection of Sector52 */ |
||
731 | #define OB_PCROP2_PAGES848TO863 (0x00200000U) /* PC Read/Write protection of Sector53 */ |
||
732 | #define OB_PCROP2_PAGES864TO879 (0x00400000U) /* PC Read/Write protection of Sector54 */ |
||
733 | #define OB_PCROP2_PAGES880TO895 (0x00800000U) /* PC Read/Write protection of Sector55 */ |
||
734 | #define OB_PCROP2_PAGES896TO911 (0x01000000U) /* PC Read/Write protection of Sector56 */ |
||
735 | #define OB_PCROP2_PAGES912TO927 (0x02000000U) /* PC Read/Write protection of Sector57 */ |
||
736 | #define OB_PCROP2_PAGES928TO943 (0x04000000U) /* PC Read/Write protection of Sector58 */ |
||
737 | #define OB_PCROP2_PAGES944TO959 (0x08000000U) /* PC Read/Write protection of Sector59 */ |
||
738 | #define OB_PCROP2_PAGES960TO975 (0x10000000U) /* PC Read/Write protection of Sector60 */ |
||
739 | #define OB_PCROP2_PAGES976TO991 (0x20000000U) /* PC Read/Write protection of Sector61 */ |
||
740 | #define OB_PCROP2_PAGES992TO1007 (0x40000000U) /* PC Read/Write protection of Sector62 */ |
||
741 | #define OB_PCROP2_PAGES1008TO1023 (0x80000000U) /* PC Read/Write protection of Sector63 */ |
||
2 | mjames | 742 | |
28 | mjames | 743 | #define OB_PCROP2_ALLPAGES (0xFFFFFFFFU) /*!< PC Read/Write protection of all Sectors */ |
2 | mjames | 744 | |
745 | /** |
||
746 | * @} |
||
747 | */ |
||
748 | #endif /* STM32L151xC || STM32L152xC || STM32L162xC */ |
||
749 | |||
750 | /** @defgroup FLASHEx_Type_Erase_Data FLASHEx Type Erase Data |
||
751 | * @{ |
||
752 | */ |
||
28 | mjames | 753 | #define FLASH_TYPEERASEDATA_BYTE (0x00U) /*!<Erase byte (8-bit) at a specified address.*/ |
754 | #define FLASH_TYPEERASEDATA_HALFWORD (0x01U) /*!<Erase a half-word (16-bit) at a specified address.*/ |
||
755 | #define FLASH_TYPEERASEDATA_WORD (0x02U) /*!<Erase a word (32-bit) at a specified address.*/ |
||
2 | mjames | 756 | |
757 | /** |
||
758 | * @} |
||
759 | */ |
||
760 | |||
761 | /** @defgroup FLASHEx_Type_Program_Data FLASHEx Type Program Data |
||
762 | * @{ |
||
763 | */ |
||
28 | mjames | 764 | #define FLASH_TYPEPROGRAMDATA_BYTE (0x00U) /*!<Program byte (8-bit) at a specified address.*/ |
765 | #define FLASH_TYPEPROGRAMDATA_HALFWORD (0x01U) /*!<Program a half-word (16-bit) at a specified address.*/ |
||
766 | #define FLASH_TYPEPROGRAMDATA_WORD (0x02U) /*!<Program a word (32-bit) at a specified address.*/ |
||
767 | #define FLASH_TYPEPROGRAMDATA_FASTBYTE (0x04U) /*!<Fast Program byte (8-bit) at a specified address.*/ |
||
768 | #define FLASH_TYPEPROGRAMDATA_FASTHALFWORD (0x08U) /*!<Fast Program a half-word (16-bit) at a specified address.*/ |
||
769 | #define FLASH_TYPEPROGRAMDATA_FASTWORD (0x10U) /*!<Fast Program a word (32-bit) at a specified address.*/ |
||
2 | mjames | 770 | |
771 | /** |
||
772 | * @} |
||
773 | */ |
||
774 | |||
775 | #if defined(FLASH_OBR_nRST_BFB2) |
||
776 | |||
777 | /** @defgroup FLASHEx_Option_Bytes_BOOT FLASHEx Option Bytes BOOT |
||
778 | * @{ |
||
779 | */ |
||
780 | |||
781 | #define OB_BOOT_BANK2 ((uint8_t)0x00U) /*!< At startup, if boot pins are set in boot from user Flash position |
||
782 | and this parameter is selected the device will boot from Bank 2 |
||
783 | or Bank 1, depending on the activation of the bank */ |
||
28 | mjames | 784 | #define OB_BOOT_BANK1 ((uint8_t)(FLASH_OBR_nRST_BFB2 >> 16U)) /*!< At startup, if boot pins are set in boot from user Flash position |
2 | mjames | 785 | and this parameter is selected the device will boot from Bank1(Default) */ |
786 | |||
787 | /** |
||
788 | * @} |
||
789 | */ |
||
790 | #endif /* FLASH_OBR_nRST_BFB2 */ |
||
791 | |||
792 | /** |
||
793 | * @} |
||
794 | */ |
||
795 | |||
796 | /* Exported macro ------------------------------------------------------------*/ |
||
797 | |||
798 | /** @defgroup FLASHEx_Exported_Macros FLASHEx Exported Macros |
||
799 | * @{ |
||
800 | */ |
||
801 | |||
802 | /** |
||
803 | * @brief Set the FLASH Latency. |
||
804 | * @param __LATENCY__ FLASH Latency |
||
805 | * This parameter can be one of the following values: |
||
806 | * @arg @ref FLASH_LATENCY_0 FLASH Zero Latency cycle |
||
807 | * @arg @ref FLASH_LATENCY_1 FLASH One Latency cycle |
||
808 | * @retval none |
||
809 | */ |
||
810 | #define __HAL_FLASH_SET_LATENCY(__LATENCY__) do { \ |
||
811 | if ((__LATENCY__) == FLASH_LATENCY_1) {__HAL_FLASH_ACC64_ENABLE();} \ |
||
812 | MODIFY_REG((FLASH->ACR), FLASH_ACR_LATENCY, (__LATENCY__)); \ |
||
28 | mjames | 813 | } while(0U) |
2 | mjames | 814 | |
815 | /** |
||
816 | * @brief Get the FLASH Latency. |
||
817 | * @retval FLASH Latency |
||
818 | * This parameter can be one of the following values: |
||
819 | * @arg @ref FLASH_LATENCY_0 FLASH Zero Latency cycle |
||
820 | * @arg @ref FLASH_LATENCY_1 FLASH One Latency cycle |
||
821 | */ |
||
822 | #define __HAL_FLASH_GET_LATENCY() (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)) |
||
823 | |||
824 | /** |
||
825 | * @brief Enable the FLASH 64-bit access. |
||
826 | * @note Read access 64 bit is used. |
||
827 | * @note This bit cannot be written at the same time as the LATENCY and |
||
828 | * PRFTEN bits. |
||
829 | * @retval none |
||
830 | */ |
||
831 | #define __HAL_FLASH_ACC64_ENABLE() (SET_BIT((FLASH->ACR), FLASH_ACR_ACC64)) |
||
832 | |||
833 | /** |
||
834 | * @brief Disable the FLASH 64-bit access. |
||
835 | * @note Read access 32 bit is used |
||
836 | * @note To reset this bit, the LATENCY should be zero wait state and the |
||
837 | * prefetch off. |
||
838 | * @retval none |
||
839 | */ |
||
840 | #define __HAL_FLASH_ACC64_DISABLE() (CLEAR_BIT((FLASH->ACR), FLASH_ACR_ACC64)) |
||
841 | |||
842 | /** |
||
843 | * @brief Enable the FLASH prefetch buffer. |
||
844 | * @retval none |
||
845 | */ |
||
846 | #define __HAL_FLASH_PREFETCH_BUFFER_ENABLE() do { __HAL_FLASH_ACC64_ENABLE(); \ |
||
847 | SET_BIT((FLASH->ACR), FLASH_ACR_PRFTEN); \ |
||
28 | mjames | 848 | } while(0U) |
2 | mjames | 849 | |
850 | /** |
||
851 | * @brief Disable the FLASH prefetch buffer. |
||
852 | * @retval none |
||
853 | */ |
||
854 | #define __HAL_FLASH_PREFETCH_BUFFER_DISABLE() CLEAR_BIT((FLASH->ACR), FLASH_ACR_PRFTEN) |
||
855 | |||
856 | /** |
||
857 | * @brief Enable the FLASH power down during Sleep mode |
||
858 | * @retval none |
||
859 | */ |
||
860 | #define __HAL_FLASH_SLEEP_POWERDOWN_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD) |
||
861 | |||
862 | /** |
||
863 | * @brief Disable the FLASH power down during Sleep mode |
||
864 | * @retval none |
||
865 | */ |
||
866 | #define __HAL_FLASH_SLEEP_POWERDOWN_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD) |
||
867 | |||
868 | /** |
||
869 | * @brief Enable the Flash Run power down mode. |
||
870 | * @note Writing this bit to 0 this bit, automatically the keys are |
||
871 | * loss and a new unlock sequence is necessary to re-write it to 1. |
||
872 | */ |
||
873 | #define __HAL_FLASH_POWER_DOWN_ENABLE() do { FLASH->PDKEYR = FLASH_PDKEY1; \ |
||
874 | FLASH->PDKEYR = FLASH_PDKEY2; \ |
||
875 | SET_BIT((FLASH->ACR), FLASH_ACR_RUN_PD); \ |
||
28 | mjames | 876 | } while (0U) |
2 | mjames | 877 | |
878 | /** |
||
879 | * @brief Disable the Flash Run power down mode. |
||
880 | * @note Writing this bit to 0 this bit, automatically the keys are |
||
881 | * loss and a new unlock sequence is necessary to re-write it to 1. |
||
882 | */ |
||
883 | #define __HAL_FLASH_POWER_DOWN_DISABLE() do { FLASH->PDKEYR = FLASH_PDKEY1; \ |
||
884 | FLASH->PDKEYR = FLASH_PDKEY2; \ |
||
885 | CLEAR_BIT((FLASH->ACR), FLASH_ACR_RUN_PD); \ |
||
28 | mjames | 886 | } while (0U) |
2 | mjames | 887 | |
888 | /** |
||
889 | * @} |
||
890 | */ |
||
891 | |||
892 | /* Exported functions --------------------------------------------------------*/ |
||
893 | |||
894 | /** @addtogroup FLASHEx_Exported_Functions |
||
895 | * @{ |
||
896 | */ |
||
897 | |||
898 | /** @addtogroup FLASHEx_Exported_Functions_Group1 |
||
899 | * @{ |
||
900 | */ |
||
901 | |||
902 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError); |
||
903 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); |
||
904 | |||
905 | /** |
||
906 | * @} |
||
907 | */ |
||
908 | |||
909 | /** @addtogroup FLASHEx_Exported_Functions_Group2 |
||
910 | * @{ |
||
911 | */ |
||
912 | |||
913 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); |
||
914 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); |
||
915 | |||
916 | #if defined(FLASH_OBR_SPRMOD) || defined(FLASH_OBR_nRST_BFB2) |
||
917 | |||
918 | HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit); |
||
919 | void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit); |
||
920 | |||
921 | #endif /* FLASH_OBR_SPRMOD || FLASH_OBR_nRST_BFB2 */ |
||
922 | |||
923 | #if defined(FLASH_OBR_SPRMOD) |
||
924 | |||
925 | HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void); |
||
926 | HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void); |
||
927 | |||
928 | #endif /* FLASH_OBR_SPRMOD */ |
||
929 | |||
930 | /** |
||
931 | * @} |
||
932 | */ |
||
933 | |||
934 | /** @addtogroup FLASHEx_Exported_Functions_Group3 |
||
935 | * @{ |
||
936 | */ |
||
937 | |||
938 | HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Unlock(void); |
||
939 | HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Lock(void); |
||
940 | |||
941 | HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Erase(uint32_t TypeErase, uint32_t Address); |
||
942 | HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Program(uint32_t TypeProgram, uint32_t Address, uint32_t Data); |
||
943 | void HAL_FLASHEx_DATAEEPROM_EnableFixedTimeProgram(void); |
||
944 | void HAL_FLASHEx_DATAEEPROM_DisableFixedTimeProgram(void); |
||
945 | |||
946 | /** |
||
947 | * @} |
||
948 | */ |
||
949 | |||
950 | /** |
||
951 | * @} |
||
952 | */ |
||
953 | |||
954 | /** |
||
955 | * @} |
||
956 | */ |
||
957 | |||
958 | /** |
||
959 | * @} |
||
960 | */ |
||
961 | |||
962 | #ifdef __cplusplus |
||
963 | } |
||
964 | #endif |
||
965 | |||
966 | #endif /* __STM32L1xx_HAL_FLASH_EX_H */ |
||
967 | |||
968 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |