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| Rev | Author | Line No. | Line |
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| 2 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
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| 3 | * @file stm32f1xx_ll_usart.c |
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| 4 | * @author MCD Application Team |
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| 5 | * @brief USART LL module driver. |
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| 6 | ****************************************************************************** |
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| 7 | * @attention |
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| 8 | * |
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| 9 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
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| 10 | * All rights reserved.</center></h2> |
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| 11 | * |
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| 12 | * This software component is licensed by ST under BSD 3-Clause license, |
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| 13 | * the "License"; You may not use this file except in compliance with the |
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| 14 | * License. You may obtain a copy of the License at: |
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| 15 | * opensource.org/licenses/BSD-3-Clause |
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| 16 | * |
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| 17 | ****************************************************************************** |
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| 18 | */ |
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| 19 | |||
| 20 | #if defined(USE_FULL_LL_DRIVER) |
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| 21 | |||
| 22 | /* Includes ------------------------------------------------------------------*/ |
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| 23 | #include "stm32f1xx_ll_usart.h" |
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| 24 | #include "stm32f1xx_ll_rcc.h" |
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| 25 | #include "stm32f1xx_ll_bus.h" |
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| 26 | #ifdef USE_FULL_ASSERT |
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| 27 | #include "stm32_assert.h" |
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| 28 | #else |
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| 29 | #define assert_param(expr) ((void)0U) |
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| 30 | #endif |
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| 31 | |||
| 32 | /** @addtogroup STM32F1xx_LL_Driver |
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| 33 | * @{ |
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| 34 | */ |
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| 35 | |||
| 36 | #if defined (USART1) || defined (USART2) || defined (USART3) || defined (UART4) || defined (UART5) |
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| 37 | |||
| 38 | /** @addtogroup USART_LL |
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| 39 | * @{ |
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| 40 | */ |
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| 41 | |||
| 42 | /* Private types -------------------------------------------------------------*/ |
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| 43 | /* Private variables ---------------------------------------------------------*/ |
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| 44 | /* Private constants ---------------------------------------------------------*/ |
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| 45 | /** @addtogroup USART_LL_Private_Constants |
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| 46 | * @{ |
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| 47 | */ |
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| 48 | |||
| 49 | /** |
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| 50 | * @} |
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| 51 | */ |
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| 52 | |||
| 53 | |||
| 54 | /* Private macros ------------------------------------------------------------*/ |
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| 55 | /** @addtogroup USART_LL_Private_Macros |
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| 56 | * @{ |
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| 57 | */ |
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| 58 | |||
| 59 | /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available |
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| 60 | * divided by the smallest oversampling used on the USART (i.e. 8) */ |
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| 61 | #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 4500000U) |
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| 62 | |||
| 63 | /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */ |
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| 64 | #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U) |
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| 65 | |||
| 66 | #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \ |
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| 67 | || ((__VALUE__) == LL_USART_DIRECTION_RX) \ |
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| 68 | || ((__VALUE__) == LL_USART_DIRECTION_TX) \ |
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| 69 | || ((__VALUE__) == LL_USART_DIRECTION_TX_RX)) |
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| 70 | |||
| 71 | #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \ |
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| 72 | || ((__VALUE__) == LL_USART_PARITY_EVEN) \ |
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| 73 | || ((__VALUE__) == LL_USART_PARITY_ODD)) |
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| 74 | |||
| 75 | #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_8B) \ |
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| 76 | || ((__VALUE__) == LL_USART_DATAWIDTH_9B)) |
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| 77 | |||
| 78 | #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \ |
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| 79 | || ((__VALUE__) == LL_USART_OVERSAMPLING_8)) |
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| 80 | |||
| 81 | #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \ |
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| 82 | || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT)) |
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| 83 | |||
| 84 | #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \ |
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| 85 | || ((__VALUE__) == LL_USART_PHASE_2EDGE)) |
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| 86 | |||
| 87 | #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \ |
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| 88 | || ((__VALUE__) == LL_USART_POLARITY_HIGH)) |
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| 89 | |||
| 90 | #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \ |
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| 91 | || ((__VALUE__) == LL_USART_CLOCK_ENABLE)) |
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| 92 | |||
| 93 | #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \ |
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| 94 | || ((__VALUE__) == LL_USART_STOPBITS_1) \ |
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| 95 | || ((__VALUE__) == LL_USART_STOPBITS_1_5) \ |
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| 96 | || ((__VALUE__) == LL_USART_STOPBITS_2)) |
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| 97 | |||
| 98 | #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \ |
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| 99 | || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \ |
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| 100 | || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \ |
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| 101 | || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS)) |
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| 102 | |||
| 103 | /** |
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| 104 | * @} |
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| 105 | */ |
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| 106 | |||
| 107 | /* Private function prototypes -----------------------------------------------*/ |
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| 108 | |||
| 109 | /* Exported functions --------------------------------------------------------*/ |
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| 110 | /** @addtogroup USART_LL_Exported_Functions |
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| 111 | * @{ |
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| 112 | */ |
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| 113 | |||
| 114 | /** @addtogroup USART_LL_EF_Init |
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| 115 | * @{ |
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| 116 | */ |
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| 117 | |||
| 118 | /** |
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| 119 | * @brief De-initialize USART registers (Registers restored to their default values). |
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| 120 | * @param USARTx USART Instance |
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| 121 | * @retval An ErrorStatus enumeration value: |
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| 122 | * - SUCCESS: USART registers are de-initialized |
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| 123 | * - ERROR: USART registers are not de-initialized |
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| 124 | */ |
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| 125 | ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx) |
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| 126 | { |
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| 127 | ErrorStatus status = SUCCESS; |
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| 128 | |||
| 129 | /* Check the parameters */ |
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| 130 | assert_param(IS_UART_INSTANCE(USARTx)); |
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| 131 | |||
| 132 | if (USARTx == USART1) |
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| 133 | { |
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| 134 | /* Force reset of USART clock */ |
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| 135 | LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1); |
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| 136 | |||
| 137 | /* Release reset of USART clock */ |
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| 138 | LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1); |
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| 139 | } |
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| 140 | else if (USARTx == USART2) |
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| 141 | { |
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| 142 | /* Force reset of USART clock */ |
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| 143 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2); |
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| 144 | |||
| 145 | /* Release reset of USART clock */ |
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| 146 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2); |
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| 147 | } |
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| 148 | #if defined(USART3) |
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| 149 | else if (USARTx == USART3) |
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| 150 | { |
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| 151 | /* Force reset of USART clock */ |
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| 152 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3); |
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| 153 | |||
| 154 | /* Release reset of USART clock */ |
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| 155 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3); |
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| 156 | } |
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| 157 | #endif /* USART3 */ |
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| 158 | #if defined(UART4) |
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| 159 | else if (USARTx == UART4) |
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| 160 | { |
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| 161 | /* Force reset of UART clock */ |
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| 162 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4); |
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| 163 | |||
| 164 | /* Release reset of UART clock */ |
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| 165 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4); |
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| 166 | } |
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| 167 | #endif /* UART4 */ |
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| 168 | #if defined(UART5) |
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| 169 | else if (USARTx == UART5) |
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| 170 | { |
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| 171 | /* Force reset of UART clock */ |
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| 172 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5); |
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| 173 | |||
| 174 | /* Release reset of UART clock */ |
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| 175 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5); |
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| 176 | } |
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| 177 | #endif /* UART5 */ |
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| 178 | else |
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| 179 | { |
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| 180 | status = ERROR; |
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| 181 | } |
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| 182 | |||
| 183 | return (status); |
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| 184 | } |
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| 185 | |||
| 186 | /** |
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| 187 | * @brief Initialize USART registers according to the specified |
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| 188 | * parameters in USART_InitStruct. |
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| 189 | * @note As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0), |
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| 190 | * USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned. |
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| 191 | * @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0). |
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| 192 | * @param USARTx USART Instance |
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| 193 | * @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure |
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| 194 | * that contains the configuration information for the specified USART peripheral. |
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| 195 | * @retval An ErrorStatus enumeration value: |
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| 196 | * - SUCCESS: USART registers are initialized according to USART_InitStruct content |
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| 197 | * - ERROR: Problem occurred during USART Registers initialization |
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| 198 | */ |
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| 199 | ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct) |
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| 200 | { |
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| 201 | ErrorStatus status = ERROR; |
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| 202 | uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO; |
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| 203 | LL_RCC_ClocksTypeDef rcc_clocks; |
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| 204 | |||
| 205 | /* Check the parameters */ |
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| 206 | assert_param(IS_UART_INSTANCE(USARTx)); |
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| 207 | assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate)); |
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| 208 | assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth)); |
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| 209 | assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits)); |
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| 210 | assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity)); |
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| 211 | assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection)); |
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| 212 | assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl)); |
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| 213 | #if defined(USART_CR1_OVER8) |
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| 214 | assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling)); |
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| 215 | #endif /* USART_OverSampling_Feature */ |
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| 216 | |||
| 217 | /* USART needs to be in disabled state, in order to be able to configure some bits in |
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| 218 | CRx registers */ |
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| 219 | if (LL_USART_IsEnabled(USARTx) == 0U) |
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| 220 | { |
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| 221 | /*---------------------------- USART CR1 Configuration ----------------------- |
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| 222 | * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters: |
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| 223 | * - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value |
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| 224 | * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value |
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| 225 | * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value |
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| 226 | * - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value. |
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| 227 | */ |
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| 228 | #if defined(USART_CR1_OVER8) |
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| 229 | MODIFY_REG(USARTx->CR1, |
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| 230 | (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | |
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| 231 | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), |
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| 232 | (USART_InitStruct->DataWidth | USART_InitStruct->Parity | |
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| 233 | USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling)); |
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| 234 | #else |
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| 235 | MODIFY_REG(USARTx->CR1, |
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| 236 | (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | |
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| 237 | USART_CR1_TE | USART_CR1_RE), |
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| 238 | (USART_InitStruct->DataWidth | USART_InitStruct->Parity | |
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| 239 | USART_InitStruct->TransferDirection)); |
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| 240 | #endif /* USART_OverSampling_Feature */ |
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| 241 | |||
| 242 | /*---------------------------- USART CR2 Configuration ----------------------- |
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| 243 | * Configure USARTx CR2 (Stop bits) with parameters: |
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| 244 | * - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value. |
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| 245 | * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit(). |
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| 246 | */ |
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| 247 | LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits); |
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| 248 | |||
| 249 | /*---------------------------- USART CR3 Configuration ----------------------- |
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| 250 | * Configure USARTx CR3 (Hardware Flow Control) with parameters: |
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| 251 | * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to USART_InitStruct->HardwareFlowControl value. |
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| 252 | */ |
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| 253 | LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl); |
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| 254 | |||
| 255 | /*---------------------------- USART BRR Configuration ----------------------- |
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| 256 | * Retrieve Clock frequency used for USART Peripheral |
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| 257 | */ |
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| 258 | LL_RCC_GetSystemClocksFreq(&rcc_clocks); |
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| 259 | if (USARTx == USART1) |
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| 260 | { |
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| 261 | periphclk = rcc_clocks.PCLK2_Frequency; |
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| 262 | } |
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| 263 | else if (USARTx == USART2) |
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| 264 | { |
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| 265 | periphclk = rcc_clocks.PCLK1_Frequency; |
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| 266 | } |
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| 267 | #if defined(USART3) |
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| 268 | else if (USARTx == USART3) |
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| 269 | { |
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| 270 | periphclk = rcc_clocks.PCLK1_Frequency; |
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| 271 | } |
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| 272 | #endif /* USART3 */ |
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| 273 | #if defined(UART4) |
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| 274 | else if (USARTx == UART4) |
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| 275 | { |
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| 276 | periphclk = rcc_clocks.PCLK1_Frequency; |
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| 277 | } |
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| 278 | #endif /* UART4 */ |
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| 279 | #if defined(UART5) |
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| 280 | else if (USARTx == UART5) |
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| 281 | { |
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| 282 | periphclk = rcc_clocks.PCLK1_Frequency; |
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| 283 | } |
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| 284 | #endif /* UART5 */ |
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| 285 | else |
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| 286 | { |
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| 287 | /* Nothing to do, as error code is already assigned to ERROR value */ |
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| 288 | } |
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| 289 | |||
| 290 | /* Configure the USART Baud Rate : |
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| 291 | - valid baud rate value (different from 0) is required |
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| 292 | - Peripheral clock as returned by RCC service, should be valid (different from 0). |
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| 293 | */ |
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| 294 | if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO) |
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| 295 | && (USART_InitStruct->BaudRate != 0U)) |
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| 296 | { |
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| 297 | status = SUCCESS; |
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| 298 | #if defined(USART_CR1_OVER8) |
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| 299 | LL_USART_SetBaudRate(USARTx, |
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| 300 | periphclk, |
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| 301 | USART_InitStruct->OverSampling, |
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| 302 | USART_InitStruct->BaudRate); |
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| 303 | #else |
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| 304 | LL_USART_SetBaudRate(USARTx, |
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| 305 | periphclk, |
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| 306 | USART_InitStruct->BaudRate); |
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| 307 | #endif /* USART_OverSampling_Feature */ |
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| 308 | |||
| 309 | /* Check BRR is greater than or equal to 16d */ |
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| 310 | assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR)); |
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| 311 | } |
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| 312 | } |
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| 313 | /* Endif (=> USART not in Disabled state => return ERROR) */ |
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| 314 | |||
| 315 | return (status); |
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| 316 | } |
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| 317 | |||
| 318 | /** |
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| 319 | * @brief Set each @ref LL_USART_InitTypeDef field to default value. |
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| 320 | * @param USART_InitStruct Pointer to a @ref LL_USART_InitTypeDef structure |
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| 321 | * whose fields will be set to default values. |
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| 322 | * @retval None |
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| 323 | */ |
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| 324 | |||
| 325 | void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct) |
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| 326 | { |
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| 327 | /* Set USART_InitStruct fields to default values */ |
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| 328 | USART_InitStruct->BaudRate = 9600U; |
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| 329 | USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B; |
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| 330 | USART_InitStruct->StopBits = LL_USART_STOPBITS_1; |
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| 331 | USART_InitStruct->Parity = LL_USART_PARITY_NONE ; |
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| 332 | USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX; |
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| 333 | USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE; |
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| 334 | #if defined(USART_CR1_OVER8) |
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| 335 | USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16; |
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| 336 | #endif /* USART_OverSampling_Feature */ |
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| 337 | } |
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| 338 | |||
| 339 | /** |
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| 340 | * @brief Initialize USART Clock related settings according to the |
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| 341 | * specified parameters in the USART_ClockInitStruct. |
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| 342 | * @note As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0), |
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| 343 | * USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned. |
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| 344 | * @param USARTx USART Instance |
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| 345 | * @param USART_ClockInitStruct Pointer to a @ref LL_USART_ClockInitTypeDef structure |
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| 346 | * that contains the Clock configuration information for the specified USART peripheral. |
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| 347 | * @retval An ErrorStatus enumeration value: |
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| 348 | * - SUCCESS: USART registers related to Clock settings are initialized according to USART_ClockInitStruct content |
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| 349 | * - ERROR: Problem occurred during USART Registers initialization |
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| 350 | */ |
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| 351 | ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct) |
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| 352 | { |
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| 353 | ErrorStatus status = SUCCESS; |
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| 354 | |||
| 355 | /* Check USART Instance and Clock signal output parameters */ |
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| 356 | assert_param(IS_UART_INSTANCE(USARTx)); |
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| 357 | assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput)); |
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| 358 | |||
| 359 | /* USART needs to be in disabled state, in order to be able to configure some bits in |
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| 360 | CRx registers */ |
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| 361 | if (LL_USART_IsEnabled(USARTx) == 0U) |
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| 362 | { |
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| 363 | /*---------------------------- USART CR2 Configuration -----------------------*/ |
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| 364 | /* If Clock signal has to be output */ |
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| 365 | if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE) |
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| 366 | { |
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| 367 | /* Deactivate Clock signal delivery : |
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| 368 | * - Disable Clock Output: USART_CR2_CLKEN cleared |
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| 369 | */ |
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| 370 | LL_USART_DisableSCLKOutput(USARTx); |
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| 371 | } |
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| 372 | else |
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| 373 | { |
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| 374 | /* Ensure USART instance is USART capable */ |
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| 375 | assert_param(IS_USART_INSTANCE(USARTx)); |
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| 376 | |||
| 377 | /* Check clock related parameters */ |
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| 378 | assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity)); |
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| 379 | assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase)); |
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| 380 | assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse)); |
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| 381 | |||
| 382 | /*---------------------------- USART CR2 Configuration ----------------------- |
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| 383 | * Configure USARTx CR2 (Clock signal related bits) with parameters: |
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| 384 | * - Enable Clock Output: USART_CR2_CLKEN set |
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| 385 | * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value |
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| 386 | * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value |
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| 387 | * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value. |
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| 388 | */ |
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| 389 | MODIFY_REG(USARTx->CR2, |
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| 390 | USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, |
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| 391 | USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity | |
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| 392 | USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse); |
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| 393 | } |
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| 394 | } |
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| 395 | /* Else (USART not in Disabled state => return ERROR */ |
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| 396 | else |
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| 397 | { |
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| 398 | status = ERROR; |
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| 399 | } |
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| 400 | |||
| 401 | return (status); |
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| 402 | } |
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| 403 | |||
| 404 | /** |
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| 405 | * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value. |
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| 406 | * @param USART_ClockInitStruct Pointer to a @ref LL_USART_ClockInitTypeDef structure |
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| 407 | * whose fields will be set to default values. |
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| 408 | * @retval None |
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| 409 | */ |
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| 410 | void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct) |
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| 411 | { |
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| 412 | /* Set LL_USART_ClockInitStruct fields with default values */ |
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| 413 | USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE; |
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| 414 | USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */ |
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| 415 | USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */ |
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| 416 | USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */ |
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| 417 | } |
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| 418 | |||
| 419 | /** |
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| 420 | * @} |
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| 421 | */ |
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| 422 | |||
| 423 | /** |
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| 424 | * @} |
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| 425 | */ |
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| 426 | |||
| 427 | /** |
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| 428 | * @} |
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| 429 | */ |
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| 430 | |||
| 431 | #endif /* USART1 || USART2 || USART3 || UART4 || UART5 */ |
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| 432 | |||
| 433 | /** |
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| 434 | * @} |
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| 435 | */ |
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| 436 | |||
| 437 | #endif /* USE_FULL_LL_DRIVER */ |
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| 438 | |||
| 439 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
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| 440 |