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Rev	Author	Line No.	Line
2	mjames	1	/**
		2	******************************************************************************
		3	* @file stm32f1xx_hal_tim_ex.c
		4	* @author MCD Application Team
		5	* @brief TIM HAL module driver.
		6	* This file provides firmware functions to manage the following
		7	* functionalities of the Timer Extended peripheral:
		8	* + Time Hall Sensor Interface Initialization
		9	* + Time Hall Sensor Interface Start
		10	* + Time Complementary signal break and dead time configuration
		11	* + Time Master and Slave synchronization configuration
		12	* + Timer remapping capabilities configuration
		13	@verbatim
		14	==============================================================================
		15	##### TIMER Extended features #####
		16	==============================================================================
		17	[..]
		18	The Timer Extended features include:
		19	(#) Complementary outputs with programmable dead-time for :
		20	(++) Output Compare
		21	(++) PWM generation (Edge and Center-aligned Mode)
		22	(++) One-pulse mode output
		23	(#) Synchronization circuit to control the timer with external signals and to
		24	interconnect several timers together.
		25	(#) Break input to put the timer output signals in reset state or in a known state.
		26	(#) Supports incremental (quadrature) encoder and hall-sensor circuitry for
		27	positioning purposes
		28
		29	##### How to use this driver #####
		30	==============================================================================
		31	[..]
		32	(#) Initialize the TIM low level resources by implementing the following functions
		33	depending on the selected feature:
		34	(++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit()
		35
		36	(#) Initialize the TIM low level resources :
		37	(##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE();
		38	(##) TIM pins configuration
		39	(+++) Enable the clock for the TIM GPIOs using the following function:
		40	__HAL_RCC_GPIOx_CLK_ENABLE();
		41	(+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
		42
		43	(#) The external Clock can be configured, if needed (the default clock is the
		44	internal clock from the APBx), using the following function:
		45	HAL_TIM_ConfigClockSource, the clock configuration should be done before
		46	any start function.
		47
		48	(#) Configure the TIM in the desired functioning mode using one of the
		49	initialization function of this driver:
		50	(++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutEvent(): to use the
		51	Timer Hall Sensor Interface and the commutation event with the corresponding
		52	Interrupt and DMA request if needed (Note that One Timer is used to interface
		53	with the Hall sensor Interface and another Timer should be used to use
		54	the commutation event).
		55
		56	(#) Activate the TIM peripheral using one of the start functions:
		57	(++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(),
		58	HAL_TIMEx_OCN_Start_IT()
		59	(++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(),
		60	HAL_TIMEx_PWMN_Start_IT()
		61	(++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT()
		62	(++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(),
		63	HAL_TIMEx_HallSensor_Start_IT().
		64
		65	@endverbatim
		66	******************************************************************************
		67	* @attention
		68	*
		69	* <h2><center>© Copyright (c) 2016 STMicroelectronics.
		70	* All rights reserved.</center></h2>
		71	*
		72	* This software component is licensed by ST under BSD 3-Clause license,
		73	* the "License"; You may not use this file except in compliance with the
		74	* License. You may obtain a copy of the License at:
		75	* opensource.org/licenses/BSD-3-Clause
		76	*
		77	******************************************************************************
		78	*/
		79
		80	/* Includes ------------------------------------------------------------------*/
		81	#include "stm32f1xx_hal.h"
		82
		83	/** @addtogroup STM32F1xx_HAL_Driver
		84	* @{
		85	*/
		86
		87	/** @defgroup TIMEx TIMEx
		88	* @brief TIM Extended HAL module driver
		89	* @{
		90	*/
		91
		92	#ifdef HAL_TIM_MODULE_ENABLED
		93
		94	/* Private typedef -----------------------------------------------------------*/
		95	/* Private define ------------------------------------------------------------*/
		96	/* Private macros ------------------------------------------------------------*/
		97	/* Private variables ---------------------------------------------------------*/
		98	/* Private function prototypes -----------------------------------------------*/
		99	static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma);
		100	static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma);
		101	static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState);
		102
		103	/* Exported functions --------------------------------------------------------*/
		104	/** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions
		105	* @{
		106	*/
		107
		108	/** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
		109	* @brief Timer Hall Sensor functions
		110	*
		111	@verbatim
		112	==============================================================================
		113	##### Timer Hall Sensor functions #####
		114	==============================================================================
		115	[..]
		116	This section provides functions allowing to:
		117	(+) Initialize and configure TIM HAL Sensor.
		118	(+) De-initialize TIM HAL Sensor.
		119	(+) Start the Hall Sensor Interface.
		120	(+) Stop the Hall Sensor Interface.
		121	(+) Start the Hall Sensor Interface and enable interrupts.
		122	(+) Stop the Hall Sensor Interface and disable interrupts.
		123	(+) Start the Hall Sensor Interface and enable DMA transfers.
		124	(+) Stop the Hall Sensor Interface and disable DMA transfers.
		125
		126	@endverbatim
		127	* @{
		128	*/
		129	/**
		130	* @brief Initializes the TIM Hall Sensor Interface and initialize the associated handle.
		131	* @note When the timer instance is initialized in Hall Sensor Interface mode,
		132	* timer channels 1 and channel 2 are reserved and cannot be used for
		133	* other purpose.
		134	* @param htim TIM Hall Sensor Interface handle
		135	* @param sConfig TIM Hall Sensor configuration structure
		136	* @retval HAL status
		137	*/
		138	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef htim, TIM_HallSensor_InitTypeDef sConfig)
		139	{
		140	TIM_OC_InitTypeDef OC_Config;
		141
		142	/* Check the TIM handle allocation */
		143	if (htim == NULL)
		144	{
		145	return HAL_ERROR;
		146	}
		147
		148	/* Check the parameters */
		149	assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
		150	assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
		151	assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
		152	assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
		153	assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
		154	assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
		155	assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
		156
		157	if (htim->State == HAL_TIM_STATE_RESET)
		158	{
		159	/* Allocate lock resource and initialize it */
		160	htim->Lock = HAL_UNLOCKED;
		161
		162	#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
		163	/* Reset interrupt callbacks to legacy week callbacks */
		164	TIM_ResetCallback(htim);
		165
		166	if (htim->HallSensor_MspInitCallback == NULL)
		167	{
		168	htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit;
		169	}
		170	/* Init the low level hardware : GPIO, CLOCK, NVIC */
		171	htim->HallSensor_MspInitCallback(htim);
		172	#else
		173	/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
		174	HAL_TIMEx_HallSensor_MspInit(htim);
		175	#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
		176	}
		177
		178	/* Set the TIM state */
		179	htim->State = HAL_TIM_STATE_BUSY;
		180
		181	/* Configure the Time base in the Encoder Mode */
		182	TIM_Base_SetConfig(htim->Instance, &htim->Init);
		183
		184	/* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */
		185	TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter);
		186
		187	/* Reset the IC1PSC Bits */
		188	htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
		189	/* Set the IC1PSC value */
		190	htim->Instance->CCMR1 \|= sConfig->IC1Prescaler;
		191
		192	/* Enable the Hall sensor interface (XOR function of the three inputs) */
		193	htim->Instance->CR2 \|= TIM_CR2_TI1S;
		194
		195	/* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */
		196	htim->Instance->SMCR &= ~TIM_SMCR_TS;
		197	htim->Instance->SMCR \|= TIM_TS_TI1F_ED;
		198
		199	/* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
		200	htim->Instance->SMCR &= ~TIM_SMCR_SMS;
		201	htim->Instance->SMCR \|= TIM_SLAVEMODE_RESET;
		202
		203	/* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/
		204	OC_Config.OCFastMode = TIM_OCFAST_DISABLE;
		205	OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET;
		206	OC_Config.OCMode = TIM_OCMODE_PWM2;
		207	OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
		208	OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH;
		209	OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH;
		210	OC_Config.Pulse = sConfig->Commutation_Delay;
		211
		212	TIM_OC2_SetConfig(htim->Instance, &OC_Config);
		213
		214	/* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2
		215	register to 101 */
		216	htim->Instance->CR2 &= ~TIM_CR2_MMS;
		217	htim->Instance->CR2 \|= TIM_TRGO_OC2REF;
		218
		219	/* Initialize the DMA burst operation state */
		220	htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
		221
		222	/* Initialize the TIM channels state */
		223	TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
		224	TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
		225	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
		226	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
		227
		228	/* Initialize the TIM state*/
		229	htim->State = HAL_TIM_STATE_READY;
		230
		231	return HAL_OK;
		232	}
		233
		234	/**
		235	* @brief DeInitializes the TIM Hall Sensor interface
		236	* @param htim TIM Hall Sensor Interface handle
		237	* @retval HAL status
		238	*/
		239	HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
		240	{
		241	/* Check the parameters */
		242	assert_param(IS_TIM_INSTANCE(htim->Instance));
		243
		244	htim->State = HAL_TIM_STATE_BUSY;
		245
		246	/* Disable the TIM Peripheral Clock */
		247	__HAL_TIM_DISABLE(htim);
		248
		249	#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
		250	if (htim->HallSensor_MspDeInitCallback == NULL)
		251	{
		252	htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit;
		253	}
		254	/* DeInit the low level hardware */
		255	htim->HallSensor_MspDeInitCallback(htim);
		256	#else
		257	/* DeInit the low level hardware: GPIO, CLOCK, NVIC */
		258	HAL_TIMEx_HallSensor_MspDeInit(htim);
		259	#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
		260
		261	/* Change the DMA burst operation state */
		262	htim->DMABurstState = HAL_DMA_BURST_STATE_RESET;
		263
		264	/* Change the TIM channels state */
		265	TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
		266	TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
		267	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
		268	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
		269
		270	/* Change TIM state */
		271	htim->State = HAL_TIM_STATE_RESET;
		272
		273	/* Release Lock */
		274	__HAL_UNLOCK(htim);
		275
		276	return HAL_OK;
		277	}
		278
		279	/**
		280	* @brief Initializes the TIM Hall Sensor MSP.
		281	* @param htim TIM Hall Sensor Interface handle
		282	* @retval None
		283	*/
		284	__weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
		285	{
		286	/* Prevent unused argument(s) compilation warning */
		287	UNUSED(htim);
		288
		289	/* NOTE : This function should not be modified, when the callback is needed,
		290	the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file
		291	*/
		292	}
		293
		294	/**
		295	* @brief DeInitializes TIM Hall Sensor MSP.
		296	* @param htim TIM Hall Sensor Interface handle
		297	* @retval None
		298	*/
		299	__weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
		300	{
		301	/* Prevent unused argument(s) compilation warning */
		302	UNUSED(htim);
		303
		304	/* NOTE : This function should not be modified, when the callback is needed,
		305	the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file
		306	*/
		307	}
		308
		309	/**
		310	* @brief Starts the TIM Hall Sensor Interface.
		311	* @param htim TIM Hall Sensor Interface handle
		312	* @retval HAL status
		313	*/
		314	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
		315	{
		316	uint32_t tmpsmcr;
		317	HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
		318	HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
		319	HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
		320	HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
		321
		322	/* Check the parameters */
		323	assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
		324
		325	/* Check the TIM channels state */
		326	if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
		327	\|\| (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
		328	\|\| (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
		329	\|\| (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
		330	{
		331	return HAL_ERROR;
		332	}
		333
		334	/* Set the TIM channels state */
		335	TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
		336	TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
		337	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
		338	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
		339
		340	/* Enable the Input Capture channel 1
		341	(in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
		342	TIM_CHANNEL_2 and TIM_CHANNEL_3) */
		343	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
		344
		345	/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
		346	if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
		347	{
		348	tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
		349	if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
		350	{
		351	__HAL_TIM_ENABLE(htim);
		352	}
		353	}
		354	else
		355	{
		356	__HAL_TIM_ENABLE(htim);
		357	}
		358
		359	/* Return function status */
		360	return HAL_OK;
		361	}
		362
		363	/**
		364	* @brief Stops the TIM Hall sensor Interface.
		365	* @param htim TIM Hall Sensor Interface handle
		366	* @retval HAL status
		367	*/
		368	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
		369	{
		370	/* Check the parameters */
		371	assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
		372
		373	/* Disable the Input Capture channels 1, 2 and 3
		374	(in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
		375	TIM_CHANNEL_2 and TIM_CHANNEL_3) */
		376	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
		377
		378	/* Disable the Peripheral */
		379	__HAL_TIM_DISABLE(htim);
		380
		381	/* Set the TIM channels state */
		382	TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
		383	TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
		384	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
		385	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
		386
		387	/* Return function status */
		388	return HAL_OK;
		389	}
		390
		391	/**
		392	* @brief Starts the TIM Hall Sensor Interface in interrupt mode.
		393	* @param htim TIM Hall Sensor Interface handle
		394	* @retval HAL status
		395	*/
		396	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
		397	{
		398	uint32_t tmpsmcr;
		399	HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
		400	HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
		401	HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
		402	HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
		403
		404	/* Check the parameters */
		405	assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
		406
		407	/* Check the TIM channels state */
		408	if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
		409	\|\| (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
		410	\|\| (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
		411	\|\| (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
		412	{
		413	return HAL_ERROR;
		414	}
		415
		416	/* Set the TIM channels state */
		417	TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
		418	TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
		419	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
		420	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
		421
		422	/* Enable the capture compare Interrupts 1 event */
		423	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
		424
		425	/* Enable the Input Capture channel 1
		426	(in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
		427	TIM_CHANNEL_2 and TIM_CHANNEL_3) */
		428	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
		429
		430	/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
		431	if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
		432	{
		433	tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
		434	if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
		435	{
		436	__HAL_TIM_ENABLE(htim);
		437	}
		438	}
		439	else
		440	{
		441	__HAL_TIM_ENABLE(htim);
		442	}
		443
		444	/* Return function status */
		445	return HAL_OK;
		446	}
		447
		448	/**
		449	* @brief Stops the TIM Hall Sensor Interface in interrupt mode.
		450	* @param htim TIM Hall Sensor Interface handle
		451	* @retval HAL status
		452	*/
		453	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
		454	{
		455	/* Check the parameters */
		456	assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
		457
		458	/* Disable the Input Capture channel 1
		459	(in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
		460	TIM_CHANNEL_2 and TIM_CHANNEL_3) */
		461	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
		462
		463	/* Disable the capture compare Interrupts event */
		464	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
		465
		466	/* Disable the Peripheral */
		467	__HAL_TIM_DISABLE(htim);
		468
		469	/* Set the TIM channels state */
		470	TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
		471	TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
		472	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
		473	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
		474
		475	/* Return function status */
		476	return HAL_OK;
		477	}
		478
		479	/**
		480	* @brief Starts the TIM Hall Sensor Interface in DMA mode.
		481	* @param htim TIM Hall Sensor Interface handle
		482	* @param pData The destination Buffer address.
		483	* @param Length The length of data to be transferred from TIM peripheral to memory.
		484	* @retval HAL status
		485	*/
		486	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef htim, uint32_t pData, uint16_t Length)
		487	{
		488	uint32_t tmpsmcr;
		489	HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
		490	HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
		491
		492	/* Check the parameters */
		493	assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
		494
		495	/* Set the TIM channel state */
		496	if ((channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)
		497	\|\| (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY))
		498	{
		499	return HAL_BUSY;
		500	}
		501	else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY)
		502	&& (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY))
		503	{
		504	if ((pData == NULL) && (Length > 0U))
		505	{
		506	return HAL_ERROR;
		507	}
		508	else
		509	{
		510	TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
		511	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
		512	}
		513	}
		514	else
		515	{
		516	return HAL_ERROR;
		517	}
		518
		519	/* Enable the Input Capture channel 1
		520	(in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
		521	TIM_CHANNEL_2 and TIM_CHANNEL_3) */
		522	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
		523
		524	/* Set the DMA Input Capture 1 Callbacks */
		525	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
		526	htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
		527	/* Set the DMA error callback */
		528	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
		529
		530	/* Enable the DMA channel for Capture 1*/
		531	if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length) != HAL_OK)
		532	{
		533	/* Return error status */
		534	return HAL_ERROR;
		535	}
		536	/* Enable the capture compare 1 Interrupt */
		537	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
		538
		539	/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
		540	if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
		541	{
		542	tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
		543	if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
		544	{
		545	__HAL_TIM_ENABLE(htim);
		546	}
		547	}
		548	else
		549	{
		550	__HAL_TIM_ENABLE(htim);
		551	}
		552
		553	/* Return function status */
		554	return HAL_OK;
		555	}
		556
		557	/**
		558	* @brief Stops the TIM Hall Sensor Interface in DMA mode.
		559	* @param htim TIM Hall Sensor Interface handle
		560	* @retval HAL status
		561	*/
		562	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
		563	{
		564	/* Check the parameters */
		565	assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
		566
		567	/* Disable the Input Capture channel 1
		568	(in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
		569	TIM_CHANNEL_2 and TIM_CHANNEL_3) */
		570	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
		571
		572
		573	/* Disable the capture compare Interrupts 1 event */
		574	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
		575
		576	(void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
		577
		578	/* Disable the Peripheral */
		579	__HAL_TIM_DISABLE(htim);
		580
		581	/* Set the TIM channel state */
		582	TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
		583	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
		584
		585	/* Return function status */
		586	return HAL_OK;
		587	}
		588
		589	/**
		590	* @}
		591	*/
		592
		593	/** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
		594	* @brief Timer Complementary Output Compare functions
		595	*
		596	@verbatim
		597	==============================================================================
		598	##### Timer Complementary Output Compare functions #####
		599	==============================================================================
		600	[..]
		601	This section provides functions allowing to:
		602	(+) Start the Complementary Output Compare/PWM.
		603	(+) Stop the Complementary Output Compare/PWM.
		604	(+) Start the Complementary Output Compare/PWM and enable interrupts.
		605	(+) Stop the Complementary Output Compare/PWM and disable interrupts.
		606	(+) Start the Complementary Output Compare/PWM and enable DMA transfers.
		607	(+) Stop the Complementary Output Compare/PWM and disable DMA transfers.
		608
		609	@endverbatim
		610	* @{
		611	*/
		612
		613	/**
		614	* @brief Starts the TIM Output Compare signal generation on the complementary
		615	* output.
		616	* @param htim TIM Output Compare handle
		617	* @param Channel TIM Channel to be enabled
		618	* This parameter can be one of the following values:
		619	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
		620	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
		621	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
		622	* @retval HAL status
		623	*/
		624	HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
		625	{
		626	uint32_t tmpsmcr;
		627
		628	/* Check the parameters */
		629	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
		630
		631	/* Check the TIM complementary channel state */
		632	if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
		633	{
		634	return HAL_ERROR;
		635	}
		636
		637	/* Set the TIM complementary channel state */
		638	TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
		639
		640	/* Enable the Capture compare channel N */
		641	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
		642
		643	/* Enable the Main Output */
		644	__HAL_TIM_MOE_ENABLE(htim);
		645
		646	/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
		647	if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
		648	{
		649	tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
		650	if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
		651	{
		652	__HAL_TIM_ENABLE(htim);
		653	}
		654	}
		655	else
		656	{
		657	__HAL_TIM_ENABLE(htim);
		658	}
		659
		660	/* Return function status */
		661	return HAL_OK;
		662	}
		663
		664	/**
		665	* @brief Stops the TIM Output Compare signal generation on the complementary
		666	* output.
		667	* @param htim TIM handle
		668	* @param Channel TIM Channel to be disabled
		669	* This parameter can be one of the following values:
		670	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
		671	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
		672	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
		673	* @retval HAL status
		674	*/
		675	HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
		676	{
		677	/* Check the parameters */
		678	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
		679
		680	/* Disable the Capture compare channel N */
		681	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
		682
		683	/* Disable the Main Output */
		684	__HAL_TIM_MOE_DISABLE(htim);
		685
		686	/* Disable the Peripheral */
		687	__HAL_TIM_DISABLE(htim);
		688
		689	/* Set the TIM complementary channel state */
		690	TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
		691
		692	/* Return function status */
		693	return HAL_OK;
		694	}
		695
		696	/**
		697	* @brief Starts the TIM Output Compare signal generation in interrupt mode
		698	* on the complementary output.
		699	* @param htim TIM OC handle
		700	* @param Channel TIM Channel to be enabled
		701	* This parameter can be one of the following values:
		702	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
		703	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
		704	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
		705	* @retval HAL status
		706	*/
		707	HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
		708	{
		709	uint32_t tmpsmcr;
		710
		711	/* Check the parameters */
		712	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
		713
		714	/* Check the TIM complementary channel state */
		715	if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
		716	{
		717	return HAL_ERROR;
		718	}
		719
		720	/* Set the TIM complementary channel state */
		721	TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
		722
		723	switch (Channel)
		724	{
		725	case TIM_CHANNEL_1:
		726	{
		727	/* Enable the TIM Output Compare interrupt */
		728	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
		729	break;
		730	}
		731
		732	case TIM_CHANNEL_2:
		733	{
		734	/* Enable the TIM Output Compare interrupt */
		735	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
		736	break;
		737	}
		738
		739	case TIM_CHANNEL_3:
		740	{
		741	/* Enable the TIM Output Compare interrupt */
		742	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
		743	break;
		744	}
		745
		746
		747	default:
		748	break;
		749	}
		750
		751	/* Enable the TIM Break interrupt */
		752	__HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
		753
		754	/* Enable the Capture compare channel N */
		755	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
		756
		757	/* Enable the Main Output */
		758	__HAL_TIM_MOE_ENABLE(htim);
		759
		760	/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
		761	if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
		762	{
		763	tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
		764	if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
		765	{
		766	__HAL_TIM_ENABLE(htim);
		767	}
		768	}
		769	else
		770	{
		771	__HAL_TIM_ENABLE(htim);
		772	}
		773
		774	/* Return function status */
		775	return HAL_OK;
		776	}
		777
		778	/**
		779	* @brief Stops the TIM Output Compare signal generation in interrupt mode
		780	* on the complementary output.
		781	* @param htim TIM Output Compare handle
		782	* @param Channel TIM Channel to be disabled
		783	* This parameter can be one of the following values:
		784	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
		785	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
		786	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
		787	* @retval HAL status
		788	*/
		789	HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
		790	{
		791	uint32_t tmpccer;
		792	/* Check the parameters */
		793	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
		794
		795	switch (Channel)
		796	{
		797	case TIM_CHANNEL_1:
		798	{
		799	/* Disable the TIM Output Compare interrupt */
		800	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
		801	break;
		802	}
		803
		804	case TIM_CHANNEL_2:
		805	{
		806	/* Disable the TIM Output Compare interrupt */
		807	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
		808	break;
		809	}
		810
		811	case TIM_CHANNEL_3:
		812	{
		813	/* Disable the TIM Output Compare interrupt */
		814	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
		815	break;
		816	}
		817
		818	default:
		819	break;
		820	}
		821
		822	/* Disable the Capture compare channel N */
		823	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
		824
		825	/* Disable the TIM Break interrupt (only if no more channel is active) */
		826	tmpccer = htim->Instance->CCER;
		827	if ((tmpccer & (TIM_CCER_CC1NE \| TIM_CCER_CC2NE \| TIM_CCER_CC3NE)) == (uint32_t)RESET)
		828	{
		829	__HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
		830	}
		831
		832	/* Disable the Main Output */
		833	__HAL_TIM_MOE_DISABLE(htim);
		834
		835	/* Disable the Peripheral */
		836	__HAL_TIM_DISABLE(htim);
		837
		838	/* Set the TIM complementary channel state */
		839	TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
		840
		841	/* Return function status */
		842	return HAL_OK;
		843	}
		844
		845	/**
		846	* @brief Starts the TIM Output Compare signal generation in DMA mode
		847	* on the complementary output.
		848	* @param htim TIM Output Compare handle
		849	* @param Channel TIM Channel to be enabled
		850	* This parameter can be one of the following values:
		851	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
		852	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
		853	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
		854	* @param pData The source Buffer address.
		855	* @param Length The length of data to be transferred from memory to TIM peripheral
		856	* @retval HAL status
		857	*/
		858	HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length)
		859	{
		860	uint32_t tmpsmcr;
		861
		862	/* Check the parameters */
		863	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
		864
		865	/* Set the TIM complementary channel state */
		866	if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
		867	{
		868	return HAL_BUSY;
		869	}
		870	else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
		871	{
		872	if ((pData == NULL) && (Length > 0U))
		873	{
		874	return HAL_ERROR;
		875	}
		876	else
		877	{
		878	TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
		879	}
		880	}
		881	else
		882	{
		883	return HAL_ERROR;
		884	}
		885
		886	switch (Channel)
		887	{
		888	case TIM_CHANNEL_1:
		889	{
		890	/* Set the DMA compare callbacks */
		891	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt;
		892	htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
		893
		894	/* Set the DMA error callback */
		895	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ;
		896
		897	/* Enable the DMA channel */
		898	if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,
		899	Length) != HAL_OK)
		900	{
		901	/* Return error status */
		902	return HAL_ERROR;
		903	}
		904	/* Enable the TIM Output Compare DMA request */
		905	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
		906	break;
		907	}
		908
		909	case TIM_CHANNEL_2:
		910	{
		911	/* Set the DMA compare callbacks */
		912	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt;
		913	htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
		914
		915	/* Set the DMA error callback */
		916	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ;
		917
		918	/* Enable the DMA channel */
		919	if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,
		920	Length) != HAL_OK)
		921	{
		922	/* Return error status */
		923	return HAL_ERROR;
		924	}
		925	/* Enable the TIM Output Compare DMA request */
		926	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
		927	break;
		928	}
		929
		930	case TIM_CHANNEL_3:
		931	{
		932	/* Set the DMA compare callbacks */
		933	htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt;
		934	htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
		935
		936	/* Set the DMA error callback */
		937	htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ;
		938
		939	/* Enable the DMA channel */
		940	if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,
		941	Length) != HAL_OK)
		942	{
		943	/* Return error status */
		944	return HAL_ERROR;
		945	}
		946	/* Enable the TIM Output Compare DMA request */
		947	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
		948	break;
		949	}
		950
		951	default:
		952	break;
		953	}
		954
		955	/* Enable the Capture compare channel N */
		956	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
		957
		958	/* Enable the Main Output */
		959	__HAL_TIM_MOE_ENABLE(htim);
		960
		961	/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
		962	if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
		963	{
		964	tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
		965	if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
		966	{
		967	__HAL_TIM_ENABLE(htim);
		968	}
		969	}
		970	else
		971	{
		972	__HAL_TIM_ENABLE(htim);
		973	}
		974
		975	/* Return function status */
		976	return HAL_OK;
		977	}
		978
		979	/**
		980	* @brief Stops the TIM Output Compare signal generation in DMA mode
		981	* on the complementary output.
		982	* @param htim TIM Output Compare handle
		983	* @param Channel TIM Channel to be disabled
		984	* This parameter can be one of the following values:
		985	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
		986	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
		987	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
		988	* @retval HAL status
		989	*/
		990	HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
		991	{
		992	/* Check the parameters */
		993	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
		994
		995	switch (Channel)
		996	{
		997	case TIM_CHANNEL_1:
		998	{
		999	/* Disable the TIM Output Compare DMA request */
		1000	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
		1001	(void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
		1002	break;
		1003	}
		1004
		1005	case TIM_CHANNEL_2:
		1006	{
		1007	/* Disable the TIM Output Compare DMA request */
		1008	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
		1009	(void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
		1010	break;
		1011	}
		1012
		1013	case TIM_CHANNEL_3:
		1014	{
		1015	/* Disable the TIM Output Compare DMA request */
		1016	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
		1017	(void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
		1018	break;
		1019	}
		1020
		1021	default:
		1022	break;
		1023	}
		1024
		1025	/* Disable the Capture compare channel N */
		1026	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
		1027
		1028	/* Disable the Main Output */
		1029	__HAL_TIM_MOE_DISABLE(htim);
		1030
		1031	/* Disable the Peripheral */
		1032	__HAL_TIM_DISABLE(htim);
		1033
		1034	/* Set the TIM complementary channel state */
		1035	TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
		1036
		1037	/* Return function status */
		1038	return HAL_OK;
		1039	}
		1040
		1041	/**
		1042	* @}
		1043	*/
		1044
		1045	/** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
		1046	* @brief Timer Complementary PWM functions
		1047	*
		1048	@verbatim
		1049	==============================================================================
		1050	##### Timer Complementary PWM functions #####
		1051	==============================================================================
		1052	[..]
		1053	This section provides functions allowing to:
		1054	(+) Start the Complementary PWM.
		1055	(+) Stop the Complementary PWM.
		1056	(+) Start the Complementary PWM and enable interrupts.
		1057	(+) Stop the Complementary PWM and disable interrupts.
		1058	(+) Start the Complementary PWM and enable DMA transfers.
		1059	(+) Stop the Complementary PWM and disable DMA transfers.
		1060	(+) Start the Complementary Input Capture measurement.
		1061	(+) Stop the Complementary Input Capture.
		1062	(+) Start the Complementary Input Capture and enable interrupts.
		1063	(+) Stop the Complementary Input Capture and disable interrupts.
		1064	(+) Start the Complementary Input Capture and enable DMA transfers.
		1065	(+) Stop the Complementary Input Capture and disable DMA transfers.
		1066	(+) Start the Complementary One Pulse generation.
		1067	(+) Stop the Complementary One Pulse.
		1068	(+) Start the Complementary One Pulse and enable interrupts.
		1069	(+) Stop the Complementary One Pulse and disable interrupts.
		1070
		1071	@endverbatim
		1072	* @{
		1073	*/
		1074
		1075	/**
		1076	* @brief Starts the PWM signal generation on the complementary output.
		1077	* @param htim TIM handle
		1078	* @param Channel TIM Channel to be enabled
		1079	* This parameter can be one of the following values:
		1080	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
		1081	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
		1082	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
		1083	* @retval HAL status
		1084	*/
		1085	HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
		1086	{
		1087	uint32_t tmpsmcr;
		1088
		1089	/* Check the parameters */
		1090	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
		1091
		1092	/* Check the TIM complementary channel state */
		1093	if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
		1094	{
		1095	return HAL_ERROR;
		1096	}
		1097
		1098	/* Set the TIM complementary channel state */
		1099	TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
		1100
		1101	/* Enable the complementary PWM output */
		1102	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
		1103
		1104	/* Enable the Main Output */
		1105	__HAL_TIM_MOE_ENABLE(htim);
		1106
		1107	/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
		1108	if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
		1109	{
		1110	tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
		1111	if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
		1112	{
		1113	__HAL_TIM_ENABLE(htim);
		1114	}
		1115	}
		1116	else
		1117	{
		1118	__HAL_TIM_ENABLE(htim);
		1119	}
		1120
		1121	/* Return function status */
		1122	return HAL_OK;
		1123	}
		1124
		1125	/**
		1126	* @brief Stops the PWM signal generation on the complementary output.
		1127	* @param htim TIM handle
		1128	* @param Channel TIM Channel to be disabled
		1129	* This parameter can be one of the following values:
		1130	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
		1131	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
		1132	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
		1133	* @retval HAL status
		1134	*/
		1135	HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
		1136	{
		1137	/* Check the parameters */
		1138	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
		1139
		1140	/* Disable the complementary PWM output */
		1141	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
		1142
		1143	/* Disable the Main Output */
		1144	__HAL_TIM_MOE_DISABLE(htim);
		1145
		1146	/* Disable the Peripheral */
		1147	__HAL_TIM_DISABLE(htim);
		1148
		1149	/* Set the TIM complementary channel state */
		1150	TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
		1151
		1152	/* Return function status */
		1153	return HAL_OK;
		1154	}
		1155
		1156	/**
		1157	* @brief Starts the PWM signal generation in interrupt mode on the
		1158	* complementary output.
		1159	* @param htim TIM handle
		1160	* @param Channel TIM Channel to be disabled
		1161	* This parameter can be one of the following values:
		1162	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
		1163	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
		1164	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
		1165	* @retval HAL status
		1166	*/
		1167	HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
		1168	{
		1169	uint32_t tmpsmcr;
		1170
		1171	/* Check the parameters */
		1172	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
		1173
		1174	/* Check the TIM complementary channel state */
		1175	if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
		1176	{
		1177	return HAL_ERROR;
		1178	}
		1179
		1180	/* Set the TIM complementary channel state */
		1181	TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
		1182
		1183	switch (Channel)
		1184	{
		1185	case TIM_CHANNEL_1:
		1186	{
		1187	/* Enable the TIM Capture/Compare 1 interrupt */
		1188	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
		1189	break;
		1190	}
		1191
		1192	case TIM_CHANNEL_2:
		1193	{
		1194	/* Enable the TIM Capture/Compare 2 interrupt */
		1195	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
		1196	break;
		1197	}
		1198
		1199	case TIM_CHANNEL_3:
		1200	{
		1201	/* Enable the TIM Capture/Compare 3 interrupt */
		1202	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
		1203	break;
		1204	}
		1205
		1206	default:
		1207	break;
		1208	}
		1209
		1210	/* Enable the TIM Break interrupt */
		1211	__HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
		1212
		1213	/* Enable the complementary PWM output */
		1214	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
		1215
		1216	/* Enable the Main Output */
		1217	__HAL_TIM_MOE_ENABLE(htim);
		1218
		1219	/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
		1220	if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
		1221	{
		1222	tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
		1223	if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
		1224	{
		1225	__HAL_TIM_ENABLE(htim);
		1226	}
		1227	}
		1228	else
		1229	{
		1230	__HAL_TIM_ENABLE(htim);
		1231	}
		1232
		1233	/* Return function status */
		1234	return HAL_OK;
		1235	}
		1236
		1237	/**
		1238	* @brief Stops the PWM signal generation in interrupt mode on the
		1239	* complementary output.
		1240	* @param htim TIM handle
		1241	* @param Channel TIM Channel to be disabled
		1242	* This parameter can be one of the following values:
		1243	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
		1244	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
		1245	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
		1246	* @retval HAL status
		1247	*/
		1248	HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
		1249	{
		1250	uint32_t tmpccer;
		1251
		1252	/* Check the parameters */
		1253	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
		1254
		1255	switch (Channel)
		1256	{
		1257	case TIM_CHANNEL_1:
		1258	{
		1259	/* Disable the TIM Capture/Compare 1 interrupt */
		1260	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
		1261	break;
		1262	}
		1263
		1264	case TIM_CHANNEL_2:
		1265	{
		1266	/* Disable the TIM Capture/Compare 2 interrupt */
		1267	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
		1268	break;
		1269	}
		1270
		1271	case TIM_CHANNEL_3:
		1272	{
		1273	/* Disable the TIM Capture/Compare 3 interrupt */
		1274	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
		1275	break;
		1276	}
		1277
		1278	default:
		1279	break;
		1280	}
		1281
		1282	/* Disable the complementary PWM output */
		1283	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
		1284
		1285	/* Disable the TIM Break interrupt (only if no more channel is active) */
		1286	tmpccer = htim->Instance->CCER;
		1287	if ((tmpccer & (TIM_CCER_CC1NE \| TIM_CCER_CC2NE \| TIM_CCER_CC3NE)) == (uint32_t)RESET)
		1288	{
		1289	__HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
		1290	}
		1291
		1292	/* Disable the Main Output */
		1293	__HAL_TIM_MOE_DISABLE(htim);
		1294
		1295	/* Disable the Peripheral */
		1296	__HAL_TIM_DISABLE(htim);
		1297
		1298	/* Set the TIM complementary channel state */
		1299	TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
		1300
		1301	/* Return function status */
		1302	return HAL_OK;
		1303	}
		1304
		1305	/**
		1306	* @brief Starts the TIM PWM signal generation in DMA mode on the
		1307	* complementary output
		1308	* @param htim TIM handle
		1309	* @param Channel TIM Channel to be enabled
		1310	* This parameter can be one of the following values:
		1311	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
		1312	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
		1313	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
		1314	* @param pData The source Buffer address.
		1315	* @param Length The length of data to be transferred from memory to TIM peripheral
		1316	* @retval HAL status
		1317	*/
		1318	HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length)
		1319	{
		1320	uint32_t tmpsmcr;
		1321
		1322	/* Check the parameters */
		1323	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
		1324
		1325	/* Set the TIM complementary channel state */
		1326	if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
		1327	{
		1328	return HAL_BUSY;
		1329	}
		1330	else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
		1331	{
		1332	if ((pData == NULL) && (Length > 0U))
		1333	{
		1334	return HAL_ERROR;
		1335	}
		1336	else
		1337	{
		1338	TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
		1339	}
		1340	}
		1341	else
		1342	{
		1343	return HAL_ERROR;
		1344	}
		1345
		1346	switch (Channel)
		1347	{
		1348	case TIM_CHANNEL_1:
		1349	{
		1350	/* Set the DMA compare callbacks */
		1351	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt;
		1352	htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
		1353
		1354	/* Set the DMA error callback */
		1355	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ;
		1356
		1357	/* Enable the DMA channel */
		1358	if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,
		1359	Length) != HAL_OK)
		1360	{
		1361	/* Return error status */
		1362	return HAL_ERROR;
		1363	}
		1364	/* Enable the TIM Capture/Compare 1 DMA request */
		1365	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
		1366	break;
		1367	}
		1368
		1369	case TIM_CHANNEL_2:
		1370	{
		1371	/* Set the DMA compare callbacks */
		1372	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt;
		1373	htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
		1374
		1375	/* Set the DMA error callback */
		1376	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ;
		1377
		1378	/* Enable the DMA channel */
		1379	if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,
		1380	Length) != HAL_OK)
		1381	{
		1382	/* Return error status */
		1383	return HAL_ERROR;
		1384	}
		1385	/* Enable the TIM Capture/Compare 2 DMA request */
		1386	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
		1387	break;
		1388	}
		1389
		1390	case TIM_CHANNEL_3:
		1391	{
		1392	/* Set the DMA compare callbacks */
		1393	htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt;
		1394	htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
		1395
		1396	/* Set the DMA error callback */
		1397	htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ;
		1398
		1399	/* Enable the DMA channel */
		1400	if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,
		1401	Length) != HAL_OK)
		1402	{
		1403	/* Return error status */
		1404	return HAL_ERROR;
		1405	}
		1406	/* Enable the TIM Capture/Compare 3 DMA request */
		1407	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
		1408	break;
		1409	}
		1410
		1411	default:
		1412	break;
		1413	}
		1414
		1415	/* Enable the complementary PWM output */
		1416	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
		1417
		1418	/* Enable the Main Output */
		1419	__HAL_TIM_MOE_ENABLE(htim);
		1420
		1421	/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
		1422	if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
		1423	{
		1424	tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
		1425	if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
		1426	{
		1427	__HAL_TIM_ENABLE(htim);
		1428	}
		1429	}
		1430	else
		1431	{
		1432	__HAL_TIM_ENABLE(htim);
		1433	}
		1434
		1435	/* Return function status */
		1436	return HAL_OK;
		1437	}
		1438
		1439	/**
		1440	* @brief Stops the TIM PWM signal generation in DMA mode on the complementary
		1441	* output
		1442	* @param htim TIM handle
		1443	* @param Channel TIM Channel to be disabled
		1444	* This parameter can be one of the following values:
		1445	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
		1446	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
		1447	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
		1448	* @retval HAL status
		1449	*/
		1450	HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
		1451	{
		1452	/* Check the parameters */
		1453	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
		1454
		1455	switch (Channel)
		1456	{
		1457	case TIM_CHANNEL_1:
		1458	{
		1459	/* Disable the TIM Capture/Compare 1 DMA request */
		1460	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
		1461	(void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
		1462	break;
		1463	}
		1464
		1465	case TIM_CHANNEL_2:
		1466	{
		1467	/* Disable the TIM Capture/Compare 2 DMA request */
		1468	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
		1469	(void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
		1470	break;
		1471	}
		1472
		1473	case TIM_CHANNEL_3:
		1474	{
		1475	/* Disable the TIM Capture/Compare 3 DMA request */
		1476	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
		1477	(void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
		1478	break;
		1479	}
		1480
		1481	default:
		1482	break;
		1483	}
		1484
		1485	/* Disable the complementary PWM output */
		1486	TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
		1487
		1488	/* Disable the Main Output */
		1489	__HAL_TIM_MOE_DISABLE(htim);
		1490
		1491	/* Disable the Peripheral */
		1492	__HAL_TIM_DISABLE(htim);
		1493
		1494	/* Set the TIM complementary channel state */
		1495	TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
		1496
		1497	/* Return function status */
		1498	return HAL_OK;
		1499	}
		1500
		1501	/**
		1502	* @}
		1503	*/
		1504
		1505	/** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
		1506	* @brief Timer Complementary One Pulse functions
		1507	*
		1508	@verbatim
		1509	==============================================================================
		1510	##### Timer Complementary One Pulse functions #####
		1511	==============================================================================
		1512	[..]
		1513	This section provides functions allowing to:
		1514	(+) Start the Complementary One Pulse generation.
		1515	(+) Stop the Complementary One Pulse.
		1516	(+) Start the Complementary One Pulse and enable interrupts.
		1517	(+) Stop the Complementary One Pulse and disable interrupts.
		1518
		1519	@endverbatim
		1520	* @{
		1521	*/
		1522
		1523	/**
		1524	* @brief Starts the TIM One Pulse signal generation on the complementary
		1525	* output.
		1526	* @note OutputChannel must match the pulse output channel chosen when calling
		1527	* @ref HAL_TIM_OnePulse_ConfigChannel().
		1528	* @param htim TIM One Pulse handle
		1529	* @param OutputChannel pulse output channel to enable
		1530	* This parameter can be one of the following values:
		1531	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
		1532	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
		1533	* @retval HAL status
		1534	*/
		1535	HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
		1536	{
		1537	uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
		1538	HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
		1539	HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
		1540	HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
		1541	HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
		1542
		1543	/* Check the parameters */
		1544	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
		1545
		1546	/* Check the TIM channels state */
		1547	if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
		1548	\|\| (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
		1549	\|\| (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
		1550	\|\| (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
		1551	{
		1552	return HAL_ERROR;
		1553	}
		1554
		1555	/* Set the TIM channels state */
		1556	TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
		1557	TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
		1558	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
		1559	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
		1560
		1561	/* Enable the complementary One Pulse output channel and the Input Capture channel */
		1562	TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
		1563	TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE);
		1564
		1565	/* Enable the Main Output */
		1566	__HAL_TIM_MOE_ENABLE(htim);
		1567
		1568	/* Return function status */
		1569	return HAL_OK;
		1570	}
		1571
		1572	/**
		1573	* @brief Stops the TIM One Pulse signal generation on the complementary
		1574	* output.
		1575	* @note OutputChannel must match the pulse output channel chosen when calling
		1576	* @ref HAL_TIM_OnePulse_ConfigChannel().
		1577	* @param htim TIM One Pulse handle
		1578	* @param OutputChannel pulse output channel to disable
		1579	* This parameter can be one of the following values:
		1580	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
		1581	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
		1582	* @retval HAL status
		1583	*/
		1584	HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
		1585	{
		1586	uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
		1587
		1588	/* Check the parameters */
		1589	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
		1590
		1591	/* Disable the complementary One Pulse output channel and the Input Capture channel */
		1592	TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
		1593	TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE);
		1594
		1595	/* Disable the Main Output */
		1596	__HAL_TIM_MOE_DISABLE(htim);
		1597
		1598	/* Disable the Peripheral */
		1599	__HAL_TIM_DISABLE(htim);
		1600
		1601	/* Set the TIM channels state */
		1602	TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
		1603	TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
		1604	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
		1605	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
		1606
		1607	/* Return function status */
		1608	return HAL_OK;
		1609	}
		1610
		1611	/**
		1612	* @brief Starts the TIM One Pulse signal generation in interrupt mode on the
		1613	* complementary channel.
		1614	* @note OutputChannel must match the pulse output channel chosen when calling
		1615	* @ref HAL_TIM_OnePulse_ConfigChannel().
		1616	* @param htim TIM One Pulse handle
		1617	* @param OutputChannel pulse output channel to enable
		1618	* This parameter can be one of the following values:
		1619	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
		1620	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
		1621	* @retval HAL status
		1622	*/
		1623	HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
		1624	{
		1625	uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
		1626	HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
		1627	HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
		1628	HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
		1629	HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
		1630
		1631	/* Check the parameters */
		1632	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
		1633
		1634	/* Check the TIM channels state */
		1635	if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
		1636	\|\| (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
		1637	\|\| (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
		1638	\|\| (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
		1639	{
		1640	return HAL_ERROR;
		1641	}
		1642
		1643	/* Set the TIM channels state */
		1644	TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
		1645	TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
		1646	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
		1647	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
		1648
		1649	/* Enable the TIM Capture/Compare 1 interrupt */
		1650	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
		1651
		1652	/* Enable the TIM Capture/Compare 2 interrupt */
		1653	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
		1654
		1655	/* Enable the complementary One Pulse output channel and the Input Capture channel */
		1656	TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
		1657	TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE);
		1658
		1659	/* Enable the Main Output */
		1660	__HAL_TIM_MOE_ENABLE(htim);
		1661
		1662	/* Return function status */
		1663	return HAL_OK;
		1664	}
		1665
		1666	/**
		1667	* @brief Stops the TIM One Pulse signal generation in interrupt mode on the
		1668	* complementary channel.
		1669	* @note OutputChannel must match the pulse output channel chosen when calling
		1670	* @ref HAL_TIM_OnePulse_ConfigChannel().
		1671	* @param htim TIM One Pulse handle
		1672	* @param OutputChannel pulse output channel to disable
		1673	* This parameter can be one of the following values:
		1674	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
		1675	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
		1676	* @retval HAL status
		1677	*/
		1678	HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
		1679	{
		1680	uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
		1681
		1682	/* Check the parameters */
		1683	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
		1684
		1685	/* Disable the TIM Capture/Compare 1 interrupt */
		1686	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
		1687
		1688	/* Disable the TIM Capture/Compare 2 interrupt */
		1689	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
		1690
		1691	/* Disable the complementary One Pulse output channel and the Input Capture channel */
		1692	TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
		1693	TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE);
		1694
		1695	/* Disable the Main Output */
		1696	__HAL_TIM_MOE_DISABLE(htim);
		1697
		1698	/* Disable the Peripheral */
		1699	__HAL_TIM_DISABLE(htim);
		1700
		1701	/* Set the TIM channels state */
		1702	TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
		1703	TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
		1704	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
		1705	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
		1706
		1707	/* Return function status */
		1708	return HAL_OK;
		1709	}
		1710
		1711	/**
		1712	* @}
		1713	*/
		1714
		1715	/** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
		1716	* @brief Peripheral Control functions
		1717	*
		1718	@verbatim
		1719	==============================================================================
		1720	##### Peripheral Control functions #####
		1721	==============================================================================
		1722	[..]
		1723	This section provides functions allowing to:
		1724	(+) Configure the commutation event in case of use of the Hall sensor interface.
		1725	(+) Configure Output channels for OC and PWM mode.
		1726
		1727	(+) Configure Complementary channels, break features and dead time.
		1728	(+) Configure Master synchronization.
		1729	(+) Configure timer remapping capabilities.
		1730
		1731	@endverbatim
		1732	* @{
		1733	*/
		1734
		1735	/**
		1736	* @brief Configure the TIM commutation event sequence.
		1737	* @note This function is mandatory to use the commutation event in order to
		1738	* update the configuration at each commutation detection on the TRGI input of the Timer,
		1739	* the typical use of this feature is with the use of another Timer(interface Timer)
		1740	* configured in Hall sensor interface, this interface Timer will generate the
		1741	* commutation at its TRGO output (connected to Timer used in this function) each time
		1742	* the TI1 of the Interface Timer detect a commutation at its input TI1.
		1743	* @param htim TIM handle
		1744	* @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
		1745	* This parameter can be one of the following values:
		1746	* @arg TIM_TS_ITR0: Internal trigger 0 selected
		1747	* @arg TIM_TS_ITR1: Internal trigger 1 selected
		1748	* @arg TIM_TS_ITR2: Internal trigger 2 selected
		1749	* @arg TIM_TS_ITR3: Internal trigger 3 selected
		1750	* @arg TIM_TS_NONE: No trigger is needed
		1751	* @param CommutationSource the Commutation Event source
		1752	* This parameter can be one of the following values:
		1753	* @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
		1754	* @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
		1755	* @retval HAL status
		1756	*/
		1757	HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
		1758	uint32_t CommutationSource)
		1759	{
		1760	/* Check the parameters */
		1761	assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
		1762	assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
		1763
		1764	__HAL_LOCK(htim);
		1765
		1766	if ((InputTrigger == TIM_TS_ITR0) \|\| (InputTrigger == TIM_TS_ITR1) \|\|
		1767	(InputTrigger == TIM_TS_ITR2) \|\| (InputTrigger == TIM_TS_ITR3))
		1768	{
		1769	/* Select the Input trigger */
		1770	htim->Instance->SMCR &= ~TIM_SMCR_TS;
		1771	htim->Instance->SMCR \|= InputTrigger;
		1772	}
		1773
		1774	/* Select the Capture Compare preload feature */
		1775	htim->Instance->CR2 \|= TIM_CR2_CCPC;
		1776	/* Select the Commutation event source */
		1777	htim->Instance->CR2 &= ~TIM_CR2_CCUS;
		1778	htim->Instance->CR2 \|= CommutationSource;
		1779
		1780	/* Disable Commutation Interrupt */
		1781	__HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
		1782
		1783	/* Disable Commutation DMA request */
		1784	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
		1785
		1786	__HAL_UNLOCK(htim);
		1787
		1788	return HAL_OK;
		1789	}
		1790
		1791	/**
		1792	* @brief Configure the TIM commutation event sequence with interrupt.
		1793	* @note This function is mandatory to use the commutation event in order to
		1794	* update the configuration at each commutation detection on the TRGI input of the Timer,
		1795	* the typical use of this feature is with the use of another Timer(interface Timer)
		1796	* configured in Hall sensor interface, this interface Timer will generate the
		1797	* commutation at its TRGO output (connected to Timer used in this function) each time
		1798	* the TI1 of the Interface Timer detect a commutation at its input TI1.
		1799	* @param htim TIM handle
		1800	* @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
		1801	* This parameter can be one of the following values:
		1802	* @arg TIM_TS_ITR0: Internal trigger 0 selected
		1803	* @arg TIM_TS_ITR1: Internal trigger 1 selected
		1804	* @arg TIM_TS_ITR2: Internal trigger 2 selected
		1805	* @arg TIM_TS_ITR3: Internal trigger 3 selected
		1806	* @arg TIM_TS_NONE: No trigger is needed
		1807	* @param CommutationSource the Commutation Event source
		1808	* This parameter can be one of the following values:
		1809	* @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
		1810	* @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
		1811	* @retval HAL status
		1812	*/
		1813	HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
		1814	uint32_t CommutationSource)
		1815	{
		1816	/* Check the parameters */
		1817	assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
		1818	assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
		1819
		1820	__HAL_LOCK(htim);
		1821
		1822	if ((InputTrigger == TIM_TS_ITR0) \|\| (InputTrigger == TIM_TS_ITR1) \|\|
		1823	(InputTrigger == TIM_TS_ITR2) \|\| (InputTrigger == TIM_TS_ITR3))
		1824	{
		1825	/* Select the Input trigger */
		1826	htim->Instance->SMCR &= ~TIM_SMCR_TS;
		1827	htim->Instance->SMCR \|= InputTrigger;
		1828	}
		1829
		1830	/* Select the Capture Compare preload feature */
		1831	htim->Instance->CR2 \|= TIM_CR2_CCPC;
		1832	/* Select the Commutation event source */
		1833	htim->Instance->CR2 &= ~TIM_CR2_CCUS;
		1834	htim->Instance->CR2 \|= CommutationSource;
		1835
		1836	/* Disable Commutation DMA request */
		1837	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
		1838
		1839	/* Enable the Commutation Interrupt */
		1840	__HAL_TIM_ENABLE_IT(htim, TIM_IT_COM);
		1841
		1842	__HAL_UNLOCK(htim);
		1843
		1844	return HAL_OK;
		1845	}
		1846
		1847	/**
		1848	* @brief Configure the TIM commutation event sequence with DMA.
		1849	* @note This function is mandatory to use the commutation event in order to
		1850	* update the configuration at each commutation detection on the TRGI input of the Timer,
		1851	* the typical use of this feature is with the use of another Timer(interface Timer)
		1852	* configured in Hall sensor interface, this interface Timer will generate the
		1853	* commutation at its TRGO output (connected to Timer used in this function) each time
		1854	* the TI1 of the Interface Timer detect a commutation at its input TI1.
		1855	* @note The user should configure the DMA in his own software, in This function only the COMDE bit is set
		1856	* @param htim TIM handle
		1857	* @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
		1858	* This parameter can be one of the following values:
		1859	* @arg TIM_TS_ITR0: Internal trigger 0 selected
		1860	* @arg TIM_TS_ITR1: Internal trigger 1 selected
		1861	* @arg TIM_TS_ITR2: Internal trigger 2 selected
		1862	* @arg TIM_TS_ITR3: Internal trigger 3 selected
		1863	* @arg TIM_TS_NONE: No trigger is needed
		1864	* @param CommutationSource the Commutation Event source
		1865	* This parameter can be one of the following values:
		1866	* @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
		1867	* @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
		1868	* @retval HAL status
		1869	*/
		1870	HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
		1871	uint32_t CommutationSource)
		1872	{
		1873	/* Check the parameters */
		1874	assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
		1875	assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
		1876
		1877	__HAL_LOCK(htim);
		1878
		1879	if ((InputTrigger == TIM_TS_ITR0) \|\| (InputTrigger == TIM_TS_ITR1) \|\|
		1880	(InputTrigger == TIM_TS_ITR2) \|\| (InputTrigger == TIM_TS_ITR3))
		1881	{
		1882	/* Select the Input trigger */
		1883	htim->Instance->SMCR &= ~TIM_SMCR_TS;
		1884	htim->Instance->SMCR \|= InputTrigger;
		1885	}
		1886
		1887	/* Select the Capture Compare preload feature */
		1888	htim->Instance->CR2 \|= TIM_CR2_CCPC;
		1889	/* Select the Commutation event source */
		1890	htim->Instance->CR2 &= ~TIM_CR2_CCUS;
		1891	htim->Instance->CR2 \|= CommutationSource;
		1892
		1893	/* Enable the Commutation DMA Request */
		1894	/* Set the DMA Commutation Callback */
		1895	htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
		1896	htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt;
		1897	/* Set the DMA error callback */
		1898	htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError;
		1899
		1900	/* Disable Commutation Interrupt */
		1901	__HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
		1902
		1903	/* Enable the Commutation DMA Request */
		1904	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM);
		1905
		1906	__HAL_UNLOCK(htim);
		1907
		1908	return HAL_OK;
		1909	}
		1910
		1911	/**
		1912	* @brief Configures the TIM in master mode.
		1913	* @param htim TIM handle.
		1914	* @param sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that
		1915	* contains the selected trigger output (TRGO) and the Master/Slave
		1916	* mode.
		1917	* @retval HAL status
		1918	*/
		1919	HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
		1920	TIM_MasterConfigTypeDef *sMasterConfig)
		1921	{
		1922	uint32_t tmpcr2;
		1923	uint32_t tmpsmcr;
		1924
		1925	/* Check the parameters */
		1926	assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
		1927	assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
		1928	assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
		1929
		1930	/* Check input state */
		1931	__HAL_LOCK(htim);
		1932
		1933	/* Change the handler state */
		1934	htim->State = HAL_TIM_STATE_BUSY;
		1935
		1936	/* Get the TIMx CR2 register value */
		1937	tmpcr2 = htim->Instance->CR2;
		1938
		1939	/* Get the TIMx SMCR register value */
		1940	tmpsmcr = htim->Instance->SMCR;
		1941
		1942	/* Reset the MMS Bits */
		1943	tmpcr2 &= ~TIM_CR2_MMS;
		1944	/* Select the TRGO source */
		1945	tmpcr2 \|= sMasterConfig->MasterOutputTrigger;
		1946
		1947	/* Update TIMx CR2 */
		1948	htim->Instance->CR2 = tmpcr2;
		1949
		1950	if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
		1951	{
		1952	/* Reset the MSM Bit */
		1953	tmpsmcr &= ~TIM_SMCR_MSM;
		1954	/* Set master mode */
		1955	tmpsmcr \|= sMasterConfig->MasterSlaveMode;
		1956
		1957	/* Update TIMx SMCR */
		1958	htim->Instance->SMCR = tmpsmcr;
		1959	}
		1960
		1961	/* Change the htim state */
		1962	htim->State = HAL_TIM_STATE_READY;
		1963
		1964	__HAL_UNLOCK(htim);
		1965
		1966	return HAL_OK;
		1967	}
		1968
		1969	/**
		1970	* @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State
		1971	* and the AOE(automatic output enable).
		1972	* @param htim TIM handle
		1973	* @param sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that
		1974	* contains the BDTR Register configuration information for the TIM peripheral.
		1975	* @note Interrupts can be generated when an active level is detected on the
		1976	* break input, the break 2 input or the system break input. Break
		1977	* interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro.
		1978	* @retval HAL status
		1979	*/
		1980	HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
		1981	TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
		1982	{
		1983	/* Keep this variable initialized to 0 as it is used to configure BDTR register */
		1984	uint32_t tmpbdtr = 0U;
		1985
		1986	/* Check the parameters */
		1987	assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
		1988	assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
		1989	assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
		1990	assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
		1991	assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
		1992	assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
		1993	assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
		1994	assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
		1995
		1996	/* Check input state */
		1997	__HAL_LOCK(htim);
		1998
		1999	/* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
		2000	the OSSI State, the dead time value and the Automatic Output Enable Bit */
		2001
		2002	/* Set the BDTR bits */
		2003	MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime);
		2004	MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel);
		2005	MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
		2006	MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode);
		2007	MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState);
		2008	MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
		2009	MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
		2010
		2011
		2012	/* Set TIMx_BDTR */
		2013	htim->Instance->BDTR = tmpbdtr;
		2014
		2015	__HAL_UNLOCK(htim);
		2016
		2017	return HAL_OK;
		2018	}
		2019
		2020	/**
		2021	* @brief Configures the TIMx Remapping input capabilities.
		2022	* @param htim TIM handle.
		2023	* @param Remap specifies the TIM remapping source.
		2024	*
		2025	* @retval HAL status
		2026	*/
		2027	HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
		2028	{
		2029	/* Prevent unused argument(s) compilation warning */
		2030	UNUSED(htim);
		2031	UNUSED(Remap);
		2032
		2033	return HAL_OK;
		2034	}
		2035
		2036	/**
		2037	* @}
		2038	*/
		2039
		2040	/** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
		2041	* @brief Extended Callbacks functions
		2042	*
		2043	@verbatim
		2044	==============================================================================
		2045	##### Extended Callbacks functions #####
		2046	==============================================================================
		2047	[..]
		2048	This section provides Extended TIM callback functions:
		2049	(+) Timer Commutation callback
		2050	(+) Timer Break callback
		2051
		2052	@endverbatim
		2053	* @{
		2054	*/
		2055
		2056	/**
		2057	* @brief Hall commutation changed callback in non-blocking mode
		2058	* @param htim TIM handle
		2059	* @retval None
		2060	*/
		2061	__weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
		2062	{
		2063	/* Prevent unused argument(s) compilation warning */
		2064	UNUSED(htim);
		2065
		2066	/* NOTE : This function should not be modified, when the callback is needed,
		2067	the HAL_TIMEx_CommutCallback could be implemented in the user file
		2068	*/
		2069	}
		2070	/**
		2071	* @brief Hall commutation changed half complete callback in non-blocking mode
		2072	* @param htim TIM handle
		2073	* @retval None
		2074	*/
		2075	__weak void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim)
		2076	{
		2077	/* Prevent unused argument(s) compilation warning */
		2078	UNUSED(htim);
		2079
		2080	/* NOTE : This function should not be modified, when the callback is needed,
		2081	the HAL_TIMEx_CommutHalfCpltCallback could be implemented in the user file
		2082	*/
		2083	}
		2084
		2085	/**
		2086	* @brief Hall Break detection callback in non-blocking mode
		2087	* @param htim TIM handle
		2088	* @retval None
		2089	*/
		2090	__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
		2091	{
		2092	/* Prevent unused argument(s) compilation warning */
		2093	UNUSED(htim);
		2094
		2095	/* NOTE : This function should not be modified, when the callback is needed,
		2096	the HAL_TIMEx_BreakCallback could be implemented in the user file
		2097	*/
		2098	}
		2099	/**
		2100	* @}
		2101	*/
		2102
		2103	/** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
		2104	* @brief Extended Peripheral State functions
		2105	*
		2106	@verbatim
		2107	==============================================================================
		2108	##### Extended Peripheral State functions #####
		2109	==============================================================================
		2110	[..]
		2111	This subsection permits to get in run-time the status of the peripheral
		2112	and the data flow.
		2113
		2114	@endverbatim
		2115	* @{
		2116	*/
		2117
		2118	/**
		2119	* @brief Return the TIM Hall Sensor interface handle state.
		2120	* @param htim TIM Hall Sensor handle
		2121	* @retval HAL state
		2122	*/
		2123	HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
		2124	{
		2125	return htim->State;
		2126	}
		2127
		2128	/**
		2129	* @brief Return actual state of the TIM complementary channel.
		2130	* @param htim TIM handle
		2131	* @param ChannelN TIM Complementary channel
		2132	* This parameter can be one of the following values:
		2133	* @arg TIM_CHANNEL_1: TIM Channel 1
		2134	* @arg TIM_CHANNEL_2: TIM Channel 2
		2135	* @arg TIM_CHANNEL_3: TIM Channel 3
		2136	* @retval TIM Complementary channel state
		2137	*/
		2138	HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(TIM_HandleTypeDef *htim, uint32_t ChannelN)
		2139	{
		2140	HAL_TIM_ChannelStateTypeDef channel_state;
		2141
		2142	/* Check the parameters */
		2143	assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, ChannelN));
		2144
		2145	channel_state = TIM_CHANNEL_N_STATE_GET(htim, ChannelN);
		2146
		2147	return channel_state;
		2148	}
		2149	/**
		2150	* @}
		2151	*/
		2152
		2153	/**
		2154	* @}
		2155	*/
		2156
		2157	/* Private functions ---------------------------------------------------------*/
		2158	/** @defgroup TIMEx_Private_Functions TIMEx Private Functions
		2159	* @{
		2160	*/
		2161
		2162	/**
		2163	* @brief TIM DMA Commutation callback.
		2164	* @param hdma pointer to DMA handle.
		2165	* @retval None
		2166	*/
		2167	void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
		2168	{
		2169	TIM_HandleTypeDef htim = (TIM_HandleTypeDef )((DMA_HandleTypeDef *)hdma)->Parent;
		2170
		2171	/* Change the htim state */
		2172	htim->State = HAL_TIM_STATE_READY;
		2173
		2174	#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
		2175	htim->CommutationCallback(htim);
		2176	#else
		2177	HAL_TIMEx_CommutCallback(htim);
		2178	#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
		2179	}
		2180
		2181	/**
		2182	* @brief TIM DMA Commutation half complete callback.
		2183	* @param hdma pointer to DMA handle.
		2184	* @retval None
		2185	*/
		2186	void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma)
		2187	{
		2188	TIM_HandleTypeDef htim = (TIM_HandleTypeDef )((DMA_HandleTypeDef *)hdma)->Parent;
		2189
		2190	/* Change the htim state */
		2191	htim->State = HAL_TIM_STATE_READY;
		2192
		2193	#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
		2194	htim->CommutationHalfCpltCallback(htim);
		2195	#else
		2196	HAL_TIMEx_CommutHalfCpltCallback(htim);
		2197	#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
		2198	}
		2199
		2200
		2201	/**
		2202	* @brief TIM DMA Delay Pulse complete callback (complementary channel).
		2203	* @param hdma pointer to DMA handle.
		2204	* @retval None
		2205	*/
		2206	static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma)
		2207	{
		2208	TIM_HandleTypeDef htim = (TIM_HandleTypeDef )((DMA_HandleTypeDef *)hdma)->Parent;
		2209
		2210	if (hdma == htim->hdma[TIM_DMA_ID_CC1])
		2211	{
		2212	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
		2213
		2214	if (hdma->Init.Mode == DMA_NORMAL)
		2215	{
		2216	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
		2217	}
		2218	}
		2219	else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
		2220	{
		2221	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
		2222
		2223	if (hdma->Init.Mode == DMA_NORMAL)
		2224	{
		2225	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
		2226	}
		2227	}
		2228	else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
		2229	{
		2230	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
		2231
		2232	if (hdma->Init.Mode == DMA_NORMAL)
		2233	{
		2234	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
		2235	}
		2236	}
		2237	else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
		2238	{
		2239	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
		2240
		2241	if (hdma->Init.Mode == DMA_NORMAL)
		2242	{
		2243	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY);
		2244	}
		2245	}
		2246	else
		2247	{
		2248	/* nothing to do */
		2249	}
		2250
		2251	#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
		2252	htim->PWM_PulseFinishedCallback(htim);
		2253	#else
		2254	HAL_TIM_PWM_PulseFinishedCallback(htim);
		2255	#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
		2256
		2257	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
		2258	}
		2259
		2260	/**
		2261	* @brief TIM DMA error callback (complementary channel)
		2262	* @param hdma pointer to DMA handle.
		2263	* @retval None
		2264	*/
		2265	static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma)
		2266	{
		2267	TIM_HandleTypeDef htim = (TIM_HandleTypeDef )((DMA_HandleTypeDef *)hdma)->Parent;
		2268
		2269	if (hdma == htim->hdma[TIM_DMA_ID_CC1])
		2270	{
		2271	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
		2272	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
		2273	}
		2274	else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
		2275	{
		2276	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
		2277	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
		2278	}
		2279	else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
		2280	{
		2281	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
		2282	TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
		2283	}
		2284	else
		2285	{
		2286	/* nothing to do */
		2287	}
		2288
		2289	#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
		2290	htim->ErrorCallback(htim);
		2291	#else
		2292	HAL_TIM_ErrorCallback(htim);
		2293	#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
		2294
		2295	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
		2296	}
		2297
		2298	/**
		2299	* @brief Enables or disables the TIM Capture Compare Channel xN.
		2300	* @param TIMx to select the TIM peripheral
		2301	* @param Channel specifies the TIM Channel
		2302	* This parameter can be one of the following values:
		2303	* @arg TIM_CHANNEL_1: TIM Channel 1
		2304	* @arg TIM_CHANNEL_2: TIM Channel 2
		2305	* @arg TIM_CHANNEL_3: TIM Channel 3
		2306	* @param ChannelNState specifies the TIM Channel CCxNE bit new state.
		2307	* This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
		2308	* @retval None
		2309	*/
		2310	static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState)
		2311	{
		2312	uint32_t tmp;
		2313
		2314	tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
		2315
		2316	/* Reset the CCxNE Bit */
		2317	TIMx->CCER &= ~tmp;
		2318
		2319	/* Set or reset the CCxNE Bit */
		2320	TIMx->CCER \|= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
		2321	}
		2322	/**
		2323	* @}
		2324	*/
		2325
		2326	#endif /* HAL_TIM_MODULE_ENABLED */
		2327	/**
		2328	* @}
		2329	*/
		2330
		2331	/**
		2332	* @}
		2333	*/
		2334
		2335	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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(root)/trunk/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c – Rev 2