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2 | mjames | 1 | /** |
2 | ****************************************************************************** |
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3 | * @file stm32f1xx_hal_tim_ex.c |
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4 | * @author MCD Application Team |
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5 | * @version V1.0.1 |
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6 | * @date 31-July-2015 |
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7 | * @brief TIM HAL module driver. |
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8 | * This file provides firmware functions to manage the following |
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9 | * functionalities of the Timer Extended peripheral: |
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10 | * + Time Hall Sensor Interface Initialization |
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11 | * + Time Hall Sensor Interface Start |
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12 | * + Time Complementary signal bread and dead time configuration |
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13 | * + Time Master and Slave synchronization configuration |
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14 | * + Timer remapping capabilities configuration |
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15 | @verbatim |
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16 | ============================================================================== |
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17 | ##### TIMER Extended features ##### |
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18 | ============================================================================== |
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19 | [..] |
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20 | The Timer Extended features include: |
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21 | (#) Complementary outputs with programmable dead-time for : |
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22 | (++) Output Compare |
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23 | (++) PWM generation (Edge and Center-aligned Mode) |
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24 | (++) One-pulse mode output |
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25 | (#) Synchronization circuit to control the timer with external signals and to |
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26 | interconnect several timers together. |
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27 | (#) Break input to put the timer output signals in reset state or in a known state. |
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28 | (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for |
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29 | positioning purposes |
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30 | |||
31 | ##### How to use this driver ##### |
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32 | ============================================================================== |
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33 | [..] |
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34 | (#) Initialize the TIM low level resources by implementing the following functions |
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35 | depending from feature used : |
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36 | (++) Complementary Output Compare : HAL_TIM_OC_MspInit() |
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37 | (++) Complementary PWM generation : HAL_TIM_PWM_MspInit() |
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38 | (++) Complementary One-pulse mode output : HAL_TIM_OnePulse_MspInit() |
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39 | (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit() |
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40 | |||
41 | (#) Initialize the TIM low level resources : |
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42 | (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE(); |
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43 | (##) TIM pins configuration |
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44 | (+++) Enable the clock for the TIM GPIOs using the following function: |
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45 | __HAL_RCC_GPIOx_CLK_ENABLE(); |
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46 | (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init(); |
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47 | |||
48 | (#) The external Clock can be configured, if needed (the default clock is the |
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49 | internal clock from the APBx), using the following function: |
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50 | HAL_TIM_ConfigClockSource, the clock configuration should be done before |
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51 | any start function. |
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52 | |||
53 | (#) Configure the TIM in the desired functioning mode using one of the |
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54 | initialization function of this driver: |
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55 | (++) HAL_TIMEx_HallSensor_Init and HAL_TIMEx_ConfigCommutationEvent: to use the |
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56 | Timer Hall Sensor Interface and the commutation event with the corresponding |
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57 | Interrupt and DMA request if needed (Note that One Timer is used to interface |
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58 | with the Hall sensor Interface and another Timer should be used to use |
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59 | the commutation event). |
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60 | |||
61 | (#) Activate the TIM peripheral using one of the start functions: |
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62 | (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OCN_Start_IT() |
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63 | (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT() |
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64 | (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT() |
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65 | (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT(). |
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66 | |||
67 | |||
68 | @endverbatim |
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69 | ****************************************************************************** |
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70 | * @attention |
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71 | * |
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72 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
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73 | * |
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74 | * Redistribution and use in source and binary forms, with or without modification, |
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75 | * are permitted provided that the following conditions are met: |
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76 | * 1. Redistributions of source code must retain the above copyright notice, |
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77 | * this list of conditions and the following disclaimer. |
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78 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
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79 | * this list of conditions and the following disclaimer in the documentation |
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80 | * and/or other materials provided with the distribution. |
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81 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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82 | * may be used to endorse or promote products derived from this software |
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83 | * without specific prior written permission. |
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84 | * |
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85 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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86 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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87 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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88 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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89 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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90 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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91 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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92 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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93 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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94 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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95 | * |
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96 | ****************************************************************************** |
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97 | */ |
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98 | |||
99 | /* Includes ------------------------------------------------------------------*/ |
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100 | #include "stm32f1xx_hal.h" |
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101 | |||
102 | /** @addtogroup STM32F1xx_HAL_Driver |
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103 | * @{ |
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104 | */ |
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105 | |||
106 | /** @defgroup TIMEx TIMEx |
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107 | * @brief TIM Extended HAL module driver |
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108 | * @{ |
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109 | */ |
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110 | |||
111 | #ifdef HAL_TIM_MODULE_ENABLED |
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112 | |||
113 | /* Private typedef -----------------------------------------------------------*/ |
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114 | /* Private define ------------------------------------------------------------*/ |
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115 | /* Private macro -------------------------------------------------------------*/ |
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116 | /* Private variables ---------------------------------------------------------*/ |
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117 | /* Private function prototypes -----------------------------------------------*/ |
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118 | |||
119 | #if defined (STM32F100xB) || defined (STM32F100xE) || \ |
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120 | defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F103xE) || defined (STM32F103xG) || \ |
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121 | defined (STM32F105xC) || defined (STM32F107xC) |
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122 | /** @defgroup TIMEx_Private_Functions TIMEx Private Functions |
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123 | * @{ |
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124 | */ |
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125 | static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState); |
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126 | /** |
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127 | * @} |
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128 | */ |
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129 | #endif /* defined(STM32F100xB) || defined(STM32F100xE) || */ |
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130 | /* defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || */ |
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131 | /* defined(STM32F105xC) || defined(STM32F107xC) */ |
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132 | |||
133 | /* Exported functions ---------------------------------------------------------*/ |
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134 | |||
135 | /** @defgroup TIMEx_Exported_Functions TIMEx Exported Functions |
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136 | * @{ |
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137 | */ |
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138 | |||
139 | |||
140 | /** @defgroup TIMEx_Exported_Functions_Group1 Timer Hall Sensor functions |
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141 | * @brief Timer Hall Sensor functions |
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142 | * |
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143 | @verbatim |
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144 | ============================================================================== |
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145 | ##### Timer Hall Sensor functions ##### |
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146 | ============================================================================== |
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147 | [..] |
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148 | This section provides functions allowing to: |
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149 | (+) Initialize and configure TIM HAL Sensor. |
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150 | (+) De-initialize TIM HAL Sensor. |
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151 | (+) Start the Hall Sensor Interface. |
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152 | (+) Stop the Hall Sensor Interface. |
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153 | (+) Start the Hall Sensor Interface and enable interrupts. |
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154 | (+) Stop the Hall Sensor Interface and disable interrupts. |
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155 | (+) Start the Hall Sensor Interface and enable DMA transfers. |
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156 | (+) Stop the Hall Sensor Interface and disable DMA transfers. |
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157 | |||
158 | @endverbatim |
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159 | * @{ |
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160 | */ |
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161 | /** |
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162 | * @brief Initializes the TIM Hall Sensor Interface and create the associated handle. |
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163 | * @param htim : TIM Encoder Interface handle |
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164 | * @param sConfig : TIM Hall Sensor configuration structure |
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165 | * @retval HAL status |
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166 | */ |
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167 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig) |
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168 | { |
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169 | TIM_OC_InitTypeDef OC_Config; |
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170 | |||
171 | /* Check the TIM handle allocation */ |
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172 | if(htim == NULL) |
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173 | { |
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174 | return HAL_ERROR; |
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175 | } |
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176 | |||
177 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
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178 | assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); |
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179 | assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); |
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180 | assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity)); |
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181 | assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); |
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182 | assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); |
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183 | |||
184 | if(htim->State == HAL_TIM_STATE_RESET) |
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185 | { |
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186 | /* Allocate lock resource and initialize it */ |
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187 | htim->Lock = HAL_UNLOCKED; |
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188 | |||
189 | /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ |
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190 | HAL_TIMEx_HallSensor_MspInit(htim); |
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191 | } |
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192 | |||
193 | /* Set the TIM state */ |
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194 | htim->State= HAL_TIM_STATE_BUSY; |
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195 | |||
196 | /* Configure the Time base in the Encoder Mode */ |
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197 | TIM_Base_SetConfig(htim->Instance, &htim->Init); |
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198 | |||
199 | /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */ |
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200 | TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter); |
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201 | |||
202 | /* Reset the IC1PSC Bits */ |
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203 | htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; |
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204 | /* Set the IC1PSC value */ |
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205 | htim->Instance->CCMR1 |= sConfig->IC1Prescaler; |
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206 | |||
207 | /* Enable the Hall sensor interface (XOR function of the three inputs) */ |
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208 | htim->Instance->CR2 |= TIM_CR2_TI1S; |
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209 | |||
210 | /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */ |
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211 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
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212 | htim->Instance->SMCR |= TIM_TS_TI1F_ED; |
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213 | |||
214 | /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */ |
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215 | htim->Instance->SMCR &= ~TIM_SMCR_SMS; |
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216 | htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; |
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217 | |||
218 | /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/ |
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219 | OC_Config.OCFastMode = TIM_OCFAST_DISABLE; |
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220 | OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET; |
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221 | OC_Config.OCMode = TIM_OCMODE_PWM2; |
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222 | OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET; |
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223 | OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH; |
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224 | OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH; |
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225 | OC_Config.Pulse = sConfig->Commutation_Delay; |
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226 | |||
227 | TIM_OC2_SetConfig(htim->Instance, &OC_Config); |
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228 | |||
229 | /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2 |
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230 | register to 101 */ |
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231 | htim->Instance->CR2 &= ~TIM_CR2_MMS; |
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232 | htim->Instance->CR2 |= TIM_TRGO_OC2REF; |
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233 | |||
234 | /* Initialize the TIM state*/ |
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235 | htim->State= HAL_TIM_STATE_READY; |
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236 | |||
237 | return HAL_OK; |
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238 | } |
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239 | |||
240 | /** |
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241 | * @brief DeInitializes the TIM Hall Sensor interface |
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242 | * @param htim : TIM Hall Sensor handle |
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243 | * @retval HAL status |
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244 | */ |
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245 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim) |
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246 | { |
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247 | /* Check the parameters */ |
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248 | assert_param(IS_TIM_INSTANCE(htim->Instance)); |
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249 | |||
250 | htim->State = HAL_TIM_STATE_BUSY; |
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251 | |||
252 | /* Disable the TIM Peripheral Clock */ |
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253 | __HAL_TIM_DISABLE(htim); |
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254 | |||
255 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ |
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256 | HAL_TIMEx_HallSensor_MspDeInit(htim); |
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257 | |||
258 | /* Change TIM state */ |
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259 | htim->State = HAL_TIM_STATE_RESET; |
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260 | |||
261 | /* Release Lock */ |
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262 | __HAL_UNLOCK(htim); |
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263 | |||
264 | return HAL_OK; |
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265 | } |
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266 | |||
267 | /** |
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268 | * @brief Initializes the TIM Hall Sensor MSP. |
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269 | * @param htim : TIM handle |
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270 | * @retval None |
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271 | */ |
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272 | __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim) |
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273 | { |
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274 | /* NOTE : This function Should not be modified, when the callback is needed, |
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275 | the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file |
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276 | */ |
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277 | } |
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278 | |||
279 | /** |
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280 | * @brief DeInitializes TIM Hall Sensor MSP. |
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281 | * @param htim : TIM handle |
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282 | * @retval None |
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283 | */ |
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284 | __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim) |
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285 | { |
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286 | /* NOTE : This function Should not be modified, when the callback is needed, |
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287 | the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file |
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288 | */ |
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289 | } |
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290 | |||
291 | /** |
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292 | * @brief Starts the TIM Hall Sensor Interface. |
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293 | * @param htim : TIM Hall Sensor handle |
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294 | * @retval HAL status |
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295 | */ |
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296 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim) |
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297 | { |
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298 | /* Check the parameters */ |
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299 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
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300 | |||
301 | /* Enable the Input Capture channel 1 |
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302 | (in the Hall Sensor Interface the 3 possible channels that are used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
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303 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); |
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304 | |||
305 | /* Enable the Peripheral */ |
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306 | __HAL_TIM_ENABLE(htim); |
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307 | |||
308 | /* Return function status */ |
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309 | return HAL_OK; |
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310 | } |
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311 | |||
312 | /** |
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313 | * @brief Stops the TIM Hall sensor Interface. |
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314 | * @param htim : TIM Hall Sensor handle |
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315 | * @retval HAL status |
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316 | */ |
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317 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim) |
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318 | { |
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319 | /* Check the parameters */ |
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320 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
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321 | |||
322 | /* Disable the Input Capture channel 1 |
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323 | (in the Hall Sensor Interface the 3 possible channels that are used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
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324 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); |
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325 | |||
326 | /* Disable the Peripheral */ |
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327 | __HAL_TIM_DISABLE(htim); |
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328 | |||
329 | /* Return function status */ |
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330 | return HAL_OK; |
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331 | } |
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332 | |||
333 | /** |
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334 | * @brief Starts the TIM Hall Sensor Interface in interrupt mode. |
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335 | * @param htim : TIM Hall Sensor handle |
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336 | * @retval HAL status |
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337 | */ |
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338 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim) |
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339 | { |
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340 | /* Check the parameters */ |
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341 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
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342 | |||
343 | /* Enable the capture compare Interrupts 1 event */ |
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344 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
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345 | |||
346 | /* Enable the Input Capture channel 1 |
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347 | (in the Hall Sensor Interface the 3 possible channels that are used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
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348 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); |
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349 | |||
350 | /* Enable the Peripheral */ |
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351 | __HAL_TIM_ENABLE(htim); |
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352 | |||
353 | /* Return function status */ |
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354 | return HAL_OK; |
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355 | } |
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356 | |||
357 | /** |
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358 | * @brief Stops the TIM Hall Sensor Interface in interrupt mode. |
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359 | * @param htim : TIM handle |
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360 | * @retval HAL status |
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361 | */ |
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362 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim) |
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363 | { |
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364 | /* Check the parameters */ |
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365 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
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366 | |||
367 | /* Disable the Input Capture channel 1 |
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368 | (in the Hall Sensor Interface the 3 possible channels that are used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
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369 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); |
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370 | |||
371 | /* Disable the capture compare Interrupts event */ |
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372 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
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373 | |||
374 | /* Disable the Peripheral */ |
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375 | __HAL_TIM_DISABLE(htim); |
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376 | |||
377 | /* Return function status */ |
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378 | return HAL_OK; |
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379 | } |
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380 | |||
381 | /** |
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382 | * @brief Starts the TIM Hall Sensor Interface in DMA mode. |
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383 | * @param htim : TIM Hall Sensor handle |
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384 | * @param pData : The destination Buffer address. |
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385 | * @param Length : The length of data to be transferred from TIM peripheral to memory. |
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386 | * @retval HAL status |
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387 | */ |
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388 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length) |
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389 | { |
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390 | /* Check the parameters */ |
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391 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
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392 | |||
393 | if((htim->State == HAL_TIM_STATE_BUSY)) |
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394 | { |
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395 | return HAL_BUSY; |
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396 | } |
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397 | else if((htim->State == HAL_TIM_STATE_READY)) |
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398 | { |
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399 | if(((uint32_t)pData == 0 ) && (Length > 0)) |
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400 | { |
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401 | return HAL_ERROR; |
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402 | } |
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403 | else |
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404 | { |
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405 | htim->State = HAL_TIM_STATE_BUSY; |
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406 | } |
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407 | } |
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408 | /* Enable the Input Capture channel 1 |
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409 | (in the Hall Sensor Interface the 3 possible channels that are used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
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410 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); |
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411 | |||
412 | /* Set the DMA Input Capture 1 Callback */ |
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413 | htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; |
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414 | /* Set the DMA error callback */ |
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415 | htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; |
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416 | |||
417 | /* Enable the DMA channel for Capture 1*/ |
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418 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length); |
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419 | |||
420 | /* Enable the capture compare 1 Interrupt */ |
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421 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); |
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422 | |||
423 | /* Enable the Peripheral */ |
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424 | __HAL_TIM_ENABLE(htim); |
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425 | |||
426 | /* Return function status */ |
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427 | return HAL_OK; |
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428 | } |
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429 | |||
430 | /** |
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431 | * @brief Stops the TIM Hall Sensor Interface in DMA mode. |
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432 | * @param htim : TIM handle |
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433 | * @retval HAL status |
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434 | */ |
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435 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim) |
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436 | { |
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437 | /* Check the parameters */ |
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438 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
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439 | |||
440 | /* Disable the Input Capture channel 1 |
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441 | (in the Hall Sensor Interface the 3 possible channels that are used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
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442 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); |
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443 | |||
444 | |||
445 | /* Disable the capture compare Interrupts 1 event */ |
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446 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); |
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447 | |||
448 | /* Disable the Peripheral */ |
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449 | __HAL_TIM_DISABLE(htim); |
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450 | |||
451 | /* Return function status */ |
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452 | return HAL_OK; |
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453 | } |
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454 | |||
455 | /** |
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456 | * @} |
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457 | */ |
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458 | |||
459 | #if defined (STM32F100xB) || defined (STM32F100xE) || \ |
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460 | defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F103xE) || defined (STM32F103xG) || \ |
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461 | defined (STM32F105xC) || defined (STM32F107xC) |
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462 | |||
463 | /** @defgroup TIMEx_Exported_Functions_Group2 Timer Complementary Output Compare functions |
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464 | * @brief Timer Complementary Output Compare functions |
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465 | * |
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466 | @verbatim |
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467 | ============================================================================== |
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468 | ##### Timer Complementary Output Compare functions ##### |
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469 | ============================================================================== |
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470 | [..] |
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471 | This section provides functions allowing to: |
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472 | (+) Start the Complementary Output Compare/PWM. |
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473 | (+) Stop the Complementary Output Compare/PWM. |
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474 | (+) Start the Complementary Output Compare/PWM and enable interrupts. |
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475 | (+) Stop the Complementary Output Compare/PWM and disable interrupts. |
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476 | (+) Start the Complementary Output Compare/PWM and enable DMA transfers. |
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477 | (+) Stop the Complementary Output Compare/PWM and disable DMA transfers. |
||
478 | |||
479 | @endverbatim |
||
480 | * @{ |
||
481 | */ |
||
482 | |||
483 | /** |
||
484 | * @brief Starts the TIM Output Compare signal generation on the complementary |
||
485 | * output. |
||
486 | * @param htim : TIM Output Compare handle |
||
487 | * @param Channel : TIM Channel to be enabled |
||
488 | * This parameter can be one of the following values: |
||
489 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
490 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
491 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
492 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
||
493 | * @retval HAL status |
||
494 | */ |
||
495 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
496 | { |
||
497 | /* Check the parameters */ |
||
498 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
499 | |||
500 | /* Enable the Capture compare channel N */ |
||
501 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
||
502 | |||
503 | /* Enable the Main Ouput */ |
||
504 | __HAL_TIM_MOE_ENABLE(htim); |
||
505 | |||
506 | /* Enable the Peripheral */ |
||
507 | __HAL_TIM_ENABLE(htim); |
||
508 | |||
509 | /* Return function status */ |
||
510 | return HAL_OK; |
||
511 | } |
||
512 | |||
513 | /** |
||
514 | * @brief Stops the TIM Output Compare signal generation on the complementary |
||
515 | * output. |
||
516 | * @param htim : TIM handle |
||
517 | * @param Channel : TIM Channel to be disabled |
||
518 | * This parameter can be one of the following values: |
||
519 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
520 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
521 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
522 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
||
523 | * @retval HAL status |
||
524 | */ |
||
525 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
526 | { |
||
527 | /* Check the parameters */ |
||
528 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
529 | |||
530 | /* Disable the Capture compare channel N */ |
||
531 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
||
532 | |||
533 | /* Disable the Main Ouput */ |
||
534 | __HAL_TIM_MOE_DISABLE(htim); |
||
535 | |||
536 | /* Disable the Peripheral */ |
||
537 | __HAL_TIM_DISABLE(htim); |
||
538 | |||
539 | /* Return function status */ |
||
540 | return HAL_OK; |
||
541 | } |
||
542 | |||
543 | /** |
||
544 | * @brief Starts the TIM Output Compare signal generation in interrupt mode |
||
545 | * on the complementary output. |
||
546 | * @param htim : TIM OC handle |
||
547 | * @param Channel : TIM Channel to be enabled |
||
548 | * This parameter can be one of the following values: |
||
549 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
550 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
551 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
552 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
||
553 | * @retval HAL status |
||
554 | */ |
||
555 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
556 | { |
||
557 | /* Check the parameters */ |
||
558 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
559 | |||
560 | switch (Channel) |
||
561 | { |
||
562 | case TIM_CHANNEL_1: |
||
563 | { |
||
564 | /* Enable the TIM Output Compare interrupt */ |
||
565 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
||
566 | } |
||
567 | break; |
||
568 | |||
569 | case TIM_CHANNEL_2: |
||
570 | { |
||
571 | /* Enable the TIM Output Compare interrupt */ |
||
572 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); |
||
573 | } |
||
574 | break; |
||
575 | |||
576 | case TIM_CHANNEL_3: |
||
577 | { |
||
578 | /* Enable the TIM Output Compare interrupt */ |
||
579 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); |
||
580 | } |
||
581 | break; |
||
582 | |||
583 | case TIM_CHANNEL_4: |
||
584 | { |
||
585 | /* Enable the TIM Output Compare interrupt */ |
||
586 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); |
||
587 | } |
||
588 | break; |
||
589 | |||
590 | default: |
||
591 | break; |
||
592 | } |
||
593 | |||
594 | /* Enable the TIM Break interrupt */ |
||
595 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); |
||
596 | |||
597 | /* Enable the Capture compare channel N */ |
||
598 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
||
599 | |||
600 | /* Enable the Main Ouput */ |
||
601 | __HAL_TIM_MOE_ENABLE(htim); |
||
602 | |||
603 | /* Enable the Peripheral */ |
||
604 | __HAL_TIM_ENABLE(htim); |
||
605 | |||
606 | /* Return function status */ |
||
607 | return HAL_OK; |
||
608 | } |
||
609 | |||
610 | /** |
||
611 | * @brief Stops the TIM Output Compare signal generation in interrupt mode |
||
612 | * on the complementary output. |
||
613 | * @param htim : TIM Output Compare handle |
||
614 | * @param Channel : TIM Channel to be disabled |
||
615 | * This parameter can be one of the following values: |
||
616 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
617 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
618 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
619 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
||
620 | * @retval HAL status |
||
621 | */ |
||
622 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
623 | { |
||
624 | uint32_t tmpccer = 0; |
||
625 | |||
626 | /* Check the parameters */ |
||
627 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
628 | |||
629 | switch (Channel) |
||
630 | { |
||
631 | case TIM_CHANNEL_1: |
||
632 | { |
||
633 | /* Disable the TIM Output Compare interrupt */ |
||
634 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
||
635 | } |
||
636 | break; |
||
637 | |||
638 | case TIM_CHANNEL_2: |
||
639 | { |
||
640 | /* Disable the TIM Output Compare interrupt */ |
||
641 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); |
||
642 | } |
||
643 | break; |
||
644 | |||
645 | case TIM_CHANNEL_3: |
||
646 | { |
||
647 | /* Disable the TIM Output Compare interrupt */ |
||
648 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); |
||
649 | } |
||
650 | break; |
||
651 | |||
652 | case TIM_CHANNEL_4: |
||
653 | { |
||
654 | /* Disable the TIM Output Compare interrupt */ |
||
655 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); |
||
656 | } |
||
657 | break; |
||
658 | |||
659 | default: |
||
660 | break; |
||
661 | } |
||
662 | |||
663 | /* Disable the Capture compare channel N */ |
||
664 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
||
665 | |||
666 | /* Disable the TIM Break interrupt (only if no more channel is active) */ |
||
667 | tmpccer = htim->Instance->CCER; |
||
668 | if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET) |
||
669 | { |
||
670 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); |
||
671 | } |
||
672 | |||
673 | /* Disable the Main Ouput */ |
||
674 | __HAL_TIM_MOE_DISABLE(htim); |
||
675 | |||
676 | /* Disable the Peripheral */ |
||
677 | __HAL_TIM_DISABLE(htim); |
||
678 | |||
679 | /* Return function status */ |
||
680 | return HAL_OK; |
||
681 | } |
||
682 | |||
683 | /** |
||
684 | * @brief Starts the TIM Output Compare signal generation in DMA mode |
||
685 | * on the complementary output. |
||
686 | * @param htim : TIM Output Compare handle |
||
687 | * @param Channel : TIM Channel to be enabled |
||
688 | * This parameter can be one of the following values: |
||
689 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
690 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
691 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
692 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
||
693 | * @param pData : The source Buffer address. |
||
694 | * @param Length : The length of data to be transferred from memory to TIM peripheral |
||
695 | * @retval HAL status |
||
696 | */ |
||
697 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) |
||
698 | { |
||
699 | /* Check the parameters */ |
||
700 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
701 | |||
702 | if((htim->State == HAL_TIM_STATE_BUSY)) |
||
703 | { |
||
704 | return HAL_BUSY; |
||
705 | } |
||
706 | else if((htim->State == HAL_TIM_STATE_READY)) |
||
707 | { |
||
708 | if(((uint32_t)pData == 0 ) && (Length > 0)) |
||
709 | { |
||
710 | return HAL_ERROR; |
||
711 | } |
||
712 | else |
||
713 | { |
||
714 | htim->State = HAL_TIM_STATE_BUSY; |
||
715 | } |
||
716 | } |
||
717 | switch (Channel) |
||
718 | { |
||
719 | case TIM_CHANNEL_1: |
||
720 | { |
||
721 | /* Set the DMA Period elapsed callback */ |
||
722 | htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; |
||
723 | |||
724 | /* Set the DMA error callback */ |
||
725 | htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; |
||
726 | |||
727 | /* Enable the DMA channel */ |
||
728 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); |
||
729 | |||
730 | /* Enable the TIM Output Compare DMA request */ |
||
731 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); |
||
732 | } |
||
733 | break; |
||
734 | |||
735 | case TIM_CHANNEL_2: |
||
736 | { |
||
737 | /* Set the DMA Period elapsed callback */ |
||
738 | htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; |
||
739 | |||
740 | /* Set the DMA error callback */ |
||
741 | htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; |
||
742 | |||
743 | /* Enable the DMA channel */ |
||
744 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); |
||
745 | |||
746 | /* Enable the TIM Output Compare DMA request */ |
||
747 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); |
||
748 | } |
||
749 | break; |
||
750 | |||
751 | case TIM_CHANNEL_3: |
||
752 | { |
||
753 | /* Set the DMA Period elapsed callback */ |
||
754 | htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; |
||
755 | |||
756 | /* Set the DMA error callback */ |
||
757 | htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; |
||
758 | |||
759 | /* Enable the DMA channel */ |
||
760 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); |
||
761 | |||
762 | /* Enable the TIM Output Compare DMA request */ |
||
763 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); |
||
764 | } |
||
765 | break; |
||
766 | |||
767 | case TIM_CHANNEL_4: |
||
768 | { |
||
769 | /* Set the DMA Period elapsed callback */ |
||
770 | htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; |
||
771 | |||
772 | /* Set the DMA error callback */ |
||
773 | htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; |
||
774 | |||
775 | /* Enable the DMA channel */ |
||
776 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); |
||
777 | |||
778 | /* Enable the TIM Output Compare DMA request */ |
||
779 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); |
||
780 | } |
||
781 | break; |
||
782 | |||
783 | default: |
||
784 | break; |
||
785 | } |
||
786 | |||
787 | /* Enable the Capture compare channel N */ |
||
788 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
||
789 | |||
790 | /* Enable the Main Ouput */ |
||
791 | __HAL_TIM_MOE_ENABLE(htim); |
||
792 | |||
793 | /* Enable the Peripheral */ |
||
794 | __HAL_TIM_ENABLE(htim); |
||
795 | |||
796 | /* Return function status */ |
||
797 | return HAL_OK; |
||
798 | } |
||
799 | |||
800 | /** |
||
801 | * @brief Stops the TIM Output Compare signal generation in DMA mode |
||
802 | * on the complementary output. |
||
803 | * @param htim : TIM Output Compare handle |
||
804 | * @param Channel : TIM Channel to be disabled |
||
805 | * This parameter can be one of the following values: |
||
806 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
807 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
808 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
809 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
||
810 | * @retval HAL status |
||
811 | */ |
||
812 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
813 | { |
||
814 | /* Check the parameters */ |
||
815 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
816 | |||
817 | switch (Channel) |
||
818 | { |
||
819 | case TIM_CHANNEL_1: |
||
820 | { |
||
821 | /* Disable the TIM Output Compare DMA request */ |
||
822 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); |
||
823 | } |
||
824 | break; |
||
825 | |||
826 | case TIM_CHANNEL_2: |
||
827 | { |
||
828 | /* Disable the TIM Output Compare DMA request */ |
||
829 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); |
||
830 | } |
||
831 | break; |
||
832 | |||
833 | case TIM_CHANNEL_3: |
||
834 | { |
||
835 | /* Disable the TIM Output Compare DMA request */ |
||
836 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); |
||
837 | } |
||
838 | break; |
||
839 | |||
840 | case TIM_CHANNEL_4: |
||
841 | { |
||
842 | /* Disable the TIM Output Compare interrupt */ |
||
843 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); |
||
844 | } |
||
845 | break; |
||
846 | |||
847 | default: |
||
848 | break; |
||
849 | } |
||
850 | |||
851 | /* Disable the Capture compare channel N */ |
||
852 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
||
853 | |||
854 | /* Disable the Main Ouput */ |
||
855 | __HAL_TIM_MOE_DISABLE(htim); |
||
856 | |||
857 | /* Disable the Peripheral */ |
||
858 | __HAL_TIM_DISABLE(htim); |
||
859 | |||
860 | /* Change the htim state */ |
||
861 | htim->State = HAL_TIM_STATE_READY; |
||
862 | |||
863 | /* Return function status */ |
||
864 | return HAL_OK; |
||
865 | } |
||
866 | |||
867 | /** |
||
868 | * @} |
||
869 | */ |
||
870 | |||
871 | /** @defgroup TIMEx_Exported_Functions_Group3 Timer Complementary PWM functions |
||
872 | * @brief Timer Complementary PWM functions |
||
873 | * |
||
874 | @verbatim |
||
875 | ============================================================================== |
||
876 | ##### Timer Complementary PWM functions ##### |
||
877 | ============================================================================== |
||
878 | [..] |
||
879 | This section provides functions allowing to: |
||
880 | (+) Start the Complementary PWM. |
||
881 | (+) Stop the Complementary PWM. |
||
882 | (+) Start the Complementary PWM and enable interrupts. |
||
883 | (+) Stop the Complementary PWM and disable interrupts. |
||
884 | (+) Start the Complementary PWM and enable DMA transfers. |
||
885 | (+) Stop the Complementary PWM and disable DMA transfers. |
||
886 | (+) Start the Complementary Input Capture measurement. |
||
887 | (+) Stop the Complementary Input Capture. |
||
888 | (+) Start the Complementary Input Capture and enable interrupts. |
||
889 | (+) Stop the Complementary Input Capture and disable interrupts. |
||
890 | (+) Start the Complementary Input Capture and enable DMA transfers. |
||
891 | (+) Stop the Complementary Input Capture and disable DMA transfers. |
||
892 | (+) Start the Complementary One Pulse generation. |
||
893 | (+) Stop the Complementary One Pulse. |
||
894 | (+) Start the Complementary One Pulse and enable interrupts. |
||
895 | (+) Stop the Complementary One Pulse and disable interrupts. |
||
896 | |||
897 | @endverbatim |
||
898 | * @{ |
||
899 | */ |
||
900 | |||
901 | /** |
||
902 | * @brief Starts the PWM signal generation on the complementary output. |
||
903 | * @param htim : TIM handle |
||
904 | * @param Channel : TIM Channel to be enabled |
||
905 | * This parameter can be one of the following values: |
||
906 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
907 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
908 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
909 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
||
910 | * @retval HAL status |
||
911 | */ |
||
912 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
913 | { |
||
914 | /* Check the parameters */ |
||
915 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
916 | |||
917 | /* Enable the complementary PWM output */ |
||
918 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
||
919 | |||
920 | /* Enable the Main Ouput */ |
||
921 | __HAL_TIM_MOE_ENABLE(htim); |
||
922 | |||
923 | /* Enable the Peripheral */ |
||
924 | __HAL_TIM_ENABLE(htim); |
||
925 | |||
926 | /* Return function status */ |
||
927 | return HAL_OK; |
||
928 | } |
||
929 | |||
930 | /** |
||
931 | * @brief Stops the PWM signal generation on the complementary output. |
||
932 | * @param htim : TIM handle |
||
933 | * @param Channel : TIM Channel to be disabled |
||
934 | * This parameter can be one of the following values: |
||
935 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
936 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
937 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
938 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
||
939 | * @retval HAL status |
||
940 | */ |
||
941 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
942 | { |
||
943 | /* Check the parameters */ |
||
944 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
945 | |||
946 | /* Disable the complementary PWM output */ |
||
947 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
||
948 | |||
949 | /* Disable the Main Ouput */ |
||
950 | __HAL_TIM_MOE_DISABLE(htim); |
||
951 | |||
952 | /* Disable the Peripheral */ |
||
953 | __HAL_TIM_DISABLE(htim); |
||
954 | |||
955 | /* Return function status */ |
||
956 | return HAL_OK; |
||
957 | } |
||
958 | |||
959 | /** |
||
960 | * @brief Starts the PWM signal generation in interrupt mode on the |
||
961 | * complementary output. |
||
962 | * @param htim : TIM handle |
||
963 | * @param Channel : TIM Channel to be disabled |
||
964 | * This parameter can be one of the following values: |
||
965 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
966 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
967 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
968 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
||
969 | * @retval HAL status |
||
970 | */ |
||
971 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
972 | { |
||
973 | /* Check the parameters */ |
||
974 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
975 | |||
976 | switch (Channel) |
||
977 | { |
||
978 | case TIM_CHANNEL_1: |
||
979 | { |
||
980 | /* Enable the TIM Capture/Compare 1 interrupt */ |
||
981 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
||
982 | } |
||
983 | break; |
||
984 | |||
985 | case TIM_CHANNEL_2: |
||
986 | { |
||
987 | /* Enable the TIM Capture/Compare 2 interrupt */ |
||
988 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); |
||
989 | } |
||
990 | break; |
||
991 | |||
992 | case TIM_CHANNEL_3: |
||
993 | { |
||
994 | /* Enable the TIM Capture/Compare 3 interrupt */ |
||
995 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); |
||
996 | } |
||
997 | break; |
||
998 | |||
999 | case TIM_CHANNEL_4: |
||
1000 | { |
||
1001 | /* Enable the TIM Capture/Compare 4 interrupt */ |
||
1002 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); |
||
1003 | } |
||
1004 | break; |
||
1005 | |||
1006 | default: |
||
1007 | break; |
||
1008 | } |
||
1009 | |||
1010 | /* Enable the TIM Break interrupt */ |
||
1011 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); |
||
1012 | |||
1013 | /* Enable the complementary PWM output */ |
||
1014 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
||
1015 | |||
1016 | /* Enable the Main Ouput */ |
||
1017 | __HAL_TIM_MOE_ENABLE(htim); |
||
1018 | |||
1019 | /* Enable the Peripheral */ |
||
1020 | __HAL_TIM_ENABLE(htim); |
||
1021 | |||
1022 | /* Return function status */ |
||
1023 | return HAL_OK; |
||
1024 | } |
||
1025 | |||
1026 | /** |
||
1027 | * @brief Stops the PWM signal generation in interrupt mode on the |
||
1028 | * complementary output. |
||
1029 | * @param htim : TIM handle |
||
1030 | * @param Channel : TIM Channel to be disabled |
||
1031 | * This parameter can be one of the following values: |
||
1032 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
1033 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
1034 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
1035 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
||
1036 | * @retval HAL status |
||
1037 | */ |
||
1038 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel) |
||
1039 | { |
||
1040 | uint32_t tmpccer = 0; |
||
1041 | |||
1042 | /* Check the parameters */ |
||
1043 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
1044 | |||
1045 | switch (Channel) |
||
1046 | { |
||
1047 | case TIM_CHANNEL_1: |
||
1048 | { |
||
1049 | /* Disable the TIM Capture/Compare 1 interrupt */ |
||
1050 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
||
1051 | } |
||
1052 | break; |
||
1053 | |||
1054 | case TIM_CHANNEL_2: |
||
1055 | { |
||
1056 | /* Disable the TIM Capture/Compare 2 interrupt */ |
||
1057 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); |
||
1058 | } |
||
1059 | break; |
||
1060 | |||
1061 | case TIM_CHANNEL_3: |
||
1062 | { |
||
1063 | /* Disable the TIM Capture/Compare 3 interrupt */ |
||
1064 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); |
||
1065 | } |
||
1066 | break; |
||
1067 | |||
1068 | case TIM_CHANNEL_4: |
||
1069 | { |
||
1070 | /* Disable the TIM Capture/Compare 3 interrupt */ |
||
1071 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); |
||
1072 | } |
||
1073 | break; |
||
1074 | |||
1075 | default: |
||
1076 | break; |
||
1077 | } |
||
1078 | |||
1079 | /* Disable the complementary PWM output */ |
||
1080 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
||
1081 | |||
1082 | /* Disable the TIM Break interrupt (only if no more channel is active) */ |
||
1083 | tmpccer = htim->Instance->CCER; |
||
1084 | if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET) |
||
1085 | { |
||
1086 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); |
||
1087 | } |
||
1088 | |||
1089 | /* Disable the Main Ouput */ |
||
1090 | __HAL_TIM_MOE_DISABLE(htim); |
||
1091 | |||
1092 | /* Disable the Peripheral */ |
||
1093 | __HAL_TIM_DISABLE(htim); |
||
1094 | |||
1095 | /* Return function status */ |
||
1096 | return HAL_OK; |
||
1097 | } |
||
1098 | |||
1099 | /** |
||
1100 | * @brief Starts the TIM PWM signal generation in DMA mode on the |
||
1101 | * complementary output |
||
1102 | * @param htim : TIM handle |
||
1103 | * @param Channel : TIM Channel to be enabled |
||
1104 | * This parameter can be one of the following values: |
||
1105 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
1106 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
1107 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
1108 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
||
1109 | * @param pData : The source Buffer address. |
||
1110 | * @param Length : The length of data to be transferred from memory to TIM peripheral |
||
1111 | * @retval HAL status |
||
1112 | */ |
||
1113 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) |
||
1114 | { |
||
1115 | /* Check the parameters */ |
||
1116 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
1117 | |||
1118 | if((htim->State == HAL_TIM_STATE_BUSY)) |
||
1119 | { |
||
1120 | return HAL_BUSY; |
||
1121 | } |
||
1122 | else if((htim->State == HAL_TIM_STATE_READY)) |
||
1123 | { |
||
1124 | if(((uint32_t)pData == 0 ) && (Length > 0)) |
||
1125 | { |
||
1126 | return HAL_ERROR; |
||
1127 | } |
||
1128 | else |
||
1129 | { |
||
1130 | htim->State = HAL_TIM_STATE_BUSY; |
||
1131 | } |
||
1132 | } |
||
1133 | switch (Channel) |
||
1134 | { |
||
1135 | case TIM_CHANNEL_1: |
||
1136 | { |
||
1137 | /* Set the DMA Period elapsed callback */ |
||
1138 | htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; |
||
1139 | |||
1140 | /* Set the DMA error callback */ |
||
1141 | htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; |
||
1142 | |||
1143 | /* Enable the DMA channel */ |
||
1144 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); |
||
1145 | |||
1146 | /* Enable the TIM Capture/Compare 1 DMA request */ |
||
1147 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); |
||
1148 | } |
||
1149 | break; |
||
1150 | |||
1151 | case TIM_CHANNEL_2: |
||
1152 | { |
||
1153 | /* Set the DMA Period elapsed callback */ |
||
1154 | htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; |
||
1155 | |||
1156 | /* Set the DMA error callback */ |
||
1157 | htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; |
||
1158 | |||
1159 | /* Enable the DMA channel */ |
||
1160 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); |
||
1161 | |||
1162 | /* Enable the TIM Capture/Compare 2 DMA request */ |
||
1163 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); |
||
1164 | } |
||
1165 | break; |
||
1166 | |||
1167 | case TIM_CHANNEL_3: |
||
1168 | { |
||
1169 | /* Set the DMA Period elapsed callback */ |
||
1170 | htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; |
||
1171 | |||
1172 | /* Set the DMA error callback */ |
||
1173 | htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; |
||
1174 | |||
1175 | /* Enable the DMA channel */ |
||
1176 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); |
||
1177 | |||
1178 | /* Enable the TIM Capture/Compare 3 DMA request */ |
||
1179 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); |
||
1180 | } |
||
1181 | break; |
||
1182 | |||
1183 | case TIM_CHANNEL_4: |
||
1184 | { |
||
1185 | /* Set the DMA Period elapsed callback */ |
||
1186 | htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; |
||
1187 | |||
1188 | /* Set the DMA error callback */ |
||
1189 | htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; |
||
1190 | |||
1191 | /* Enable the DMA channel */ |
||
1192 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); |
||
1193 | |||
1194 | /* Enable the TIM Capture/Compare 4 DMA request */ |
||
1195 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); |
||
1196 | } |
||
1197 | break; |
||
1198 | |||
1199 | default: |
||
1200 | break; |
||
1201 | } |
||
1202 | |||
1203 | /* Enable the complementary PWM output */ |
||
1204 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
||
1205 | |||
1206 | /* Enable the Main Ouput */ |
||
1207 | __HAL_TIM_MOE_ENABLE(htim); |
||
1208 | |||
1209 | /* Enable the Peripheral */ |
||
1210 | __HAL_TIM_ENABLE(htim); |
||
1211 | |||
1212 | /* Return function status */ |
||
1213 | return HAL_OK; |
||
1214 | } |
||
1215 | |||
1216 | /** |
||
1217 | * @brief Stops the TIM PWM signal generation in DMA mode on the complementary |
||
1218 | * output |
||
1219 | * @param htim : TIM handle |
||
1220 | * @param Channel : TIM Channel to be disabled |
||
1221 | * This parameter can be one of the following values: |
||
1222 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
1223 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
1224 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
1225 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
||
1226 | * @retval HAL status |
||
1227 | */ |
||
1228 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
1229 | { |
||
1230 | /* Check the parameters */ |
||
1231 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
1232 | |||
1233 | switch (Channel) |
||
1234 | { |
||
1235 | case TIM_CHANNEL_1: |
||
1236 | { |
||
1237 | /* Disable the TIM Capture/Compare 1 DMA request */ |
||
1238 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); |
||
1239 | } |
||
1240 | break; |
||
1241 | |||
1242 | case TIM_CHANNEL_2: |
||
1243 | { |
||
1244 | /* Disable the TIM Capture/Compare 2 DMA request */ |
||
1245 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); |
||
1246 | } |
||
1247 | break; |
||
1248 | |||
1249 | case TIM_CHANNEL_3: |
||
1250 | { |
||
1251 | /* Disable the TIM Capture/Compare 3 DMA request */ |
||
1252 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); |
||
1253 | } |
||
1254 | break; |
||
1255 | |||
1256 | case TIM_CHANNEL_4: |
||
1257 | { |
||
1258 | /* Disable the TIM Capture/Compare 4 DMA request */ |
||
1259 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); |
||
1260 | } |
||
1261 | break; |
||
1262 | |||
1263 | default: |
||
1264 | break; |
||
1265 | } |
||
1266 | |||
1267 | /* Disable the complementary PWM output */ |
||
1268 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
||
1269 | |||
1270 | /* Disable the Main Ouput */ |
||
1271 | __HAL_TIM_MOE_DISABLE(htim); |
||
1272 | |||
1273 | /* Disable the Peripheral */ |
||
1274 | __HAL_TIM_DISABLE(htim); |
||
1275 | |||
1276 | /* Change the htim state */ |
||
1277 | htim->State = HAL_TIM_STATE_READY; |
||
1278 | |||
1279 | /* Return function status */ |
||
1280 | return HAL_OK; |
||
1281 | } |
||
1282 | |||
1283 | /** |
||
1284 | * @} |
||
1285 | */ |
||
1286 | |||
1287 | /** @defgroup TIMEx_Exported_Functions_Group4 Timer Complementary One Pulse functions |
||
1288 | * @brief Timer Complementary One Pulse functions |
||
1289 | * |
||
1290 | @verbatim |
||
1291 | ============================================================================== |
||
1292 | ##### Timer Complementary One Pulse functions ##### |
||
1293 | ============================================================================== |
||
1294 | [..] |
||
1295 | This section provides functions allowing to: |
||
1296 | (+) Start the Complementary One Pulse generation. |
||
1297 | (+) Stop the Complementary One Pulse. |
||
1298 | (+) Start the Complementary One Pulse and enable interrupts. |
||
1299 | (+) Stop the Complementary One Pulse and disable interrupts. |
||
1300 | |||
1301 | @endverbatim |
||
1302 | * @{ |
||
1303 | */ |
||
1304 | |||
1305 | /** |
||
1306 | * @brief Starts the TIM One Pulse signal generation on the complemetary |
||
1307 | * output. |
||
1308 | * @param htim : TIM One Pulse handle |
||
1309 | * @param OutputChannel : TIM Channel to be enabled |
||
1310 | * This parameter can be one of the following values: |
||
1311 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
1312 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
1313 | * @retval HAL status |
||
1314 | */ |
||
1315 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
||
1316 | { |
||
1317 | /* Check the parameters */ |
||
1318 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
||
1319 | |||
1320 | /* Enable the complementary One Pulse output */ |
||
1321 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); |
||
1322 | |||
1323 | /* Enable the Main Ouput */ |
||
1324 | __HAL_TIM_MOE_ENABLE(htim); |
||
1325 | |||
1326 | /* Return function status */ |
||
1327 | return HAL_OK; |
||
1328 | } |
||
1329 | |||
1330 | /** |
||
1331 | * @brief Stops the TIM One Pulse signal generation on the complementary |
||
1332 | * output. |
||
1333 | * @param htim : TIM One Pulse handle |
||
1334 | * @param OutputChannel : TIM Channel to be disabled |
||
1335 | * This parameter can be one of the following values: |
||
1336 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
1337 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
1338 | * @retval HAL status |
||
1339 | */ |
||
1340 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
||
1341 | { |
||
1342 | |||
1343 | /* Check the parameters */ |
||
1344 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
||
1345 | |||
1346 | /* Disable the complementary One Pulse output */ |
||
1347 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); |
||
1348 | |||
1349 | /* Disable the Main Ouput */ |
||
1350 | __HAL_TIM_MOE_DISABLE(htim); |
||
1351 | |||
1352 | /* Disable the Peripheral */ |
||
1353 | __HAL_TIM_DISABLE(htim); |
||
1354 | |||
1355 | /* Return function status */ |
||
1356 | return HAL_OK; |
||
1357 | } |
||
1358 | |||
1359 | /** |
||
1360 | * @brief Starts the TIM One Pulse signal generation in interrupt mode on the |
||
1361 | * complementary channel. |
||
1362 | * @param htim : TIM One Pulse handle |
||
1363 | * @param OutputChannel : TIM Channel to be enabled |
||
1364 | * This parameter can be one of the following values: |
||
1365 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
1366 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
1367 | * @retval HAL status |
||
1368 | */ |
||
1369 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
||
1370 | { |
||
1371 | /* Check the parameters */ |
||
1372 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
||
1373 | |||
1374 | /* Enable the TIM Capture/Compare 1 interrupt */ |
||
1375 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
||
1376 | |||
1377 | /* Enable the TIM Capture/Compare 2 interrupt */ |
||
1378 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); |
||
1379 | |||
1380 | /* Enable the complementary One Pulse output */ |
||
1381 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); |
||
1382 | |||
1383 | /* Enable the Main Ouput */ |
||
1384 | __HAL_TIM_MOE_ENABLE(htim); |
||
1385 | |||
1386 | /* Return function status */ |
||
1387 | return HAL_OK; |
||
1388 | } |
||
1389 | |||
1390 | /** |
||
1391 | * @brief Stops the TIM One Pulse signal generation in interrupt mode on the |
||
1392 | * complementary channel. |
||
1393 | * @param htim : TIM One Pulse handle |
||
1394 | * @param OutputChannel : TIM Channel to be disabled |
||
1395 | * This parameter can be one of the following values: |
||
1396 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
1397 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
1398 | * @retval HAL status |
||
1399 | */ |
||
1400 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
||
1401 | { |
||
1402 | /* Check the parameters */ |
||
1403 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
||
1404 | |||
1405 | /* Disable the TIM Capture/Compare 1 interrupt */ |
||
1406 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
||
1407 | |||
1408 | /* Disable the TIM Capture/Compare 2 interrupt */ |
||
1409 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); |
||
1410 | |||
1411 | /* Disable the complementary One Pulse output */ |
||
1412 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); |
||
1413 | |||
1414 | /* Disable the Main Ouput */ |
||
1415 | __HAL_TIM_MOE_DISABLE(htim); |
||
1416 | |||
1417 | /* Disable the Peripheral */ |
||
1418 | __HAL_TIM_DISABLE(htim); |
||
1419 | |||
1420 | /* Return function status */ |
||
1421 | return HAL_OK; |
||
1422 | } |
||
1423 | |||
1424 | /** |
||
1425 | * @} |
||
1426 | */ |
||
1427 | |||
1428 | #endif /* defined(STM32F100xB) || defined(STM32F100xE) || */ |
||
1429 | /* defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || */ |
||
1430 | /* defined(STM32F105xC) || defined(STM32F107xC) */ |
||
1431 | |||
1432 | /** @defgroup TIMEx_Exported_Functions_Group5 Peripheral Control functions |
||
1433 | * @brief Peripheral Control functions |
||
1434 | * |
||
1435 | @verbatim |
||
1436 | ============================================================================== |
||
1437 | ##### Peripheral Control functions ##### |
||
1438 | ============================================================================== |
||
1439 | [..] |
||
1440 | This section provides functions allowing to: |
||
1441 | (+) Configure the commutation event in case of use of the Hall sensor interface. |
||
1442 | (+) Configure Complementary channels, break features and dead time. |
||
1443 | (+) Configure Master synchronization. |
||
1444 | |||
1445 | @endverbatim |
||
1446 | * @{ |
||
1447 | */ |
||
1448 | |||
1449 | #if defined (STM32F100xB) || defined (STM32F100xE) || \ |
||
1450 | defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F103xE) || defined (STM32F103xG) || \ |
||
1451 | defined (STM32F105xC) || defined (STM32F107xC) |
||
1452 | |||
1453 | /** |
||
1454 | * @brief Configure the TIM commutation event sequence. |
||
1455 | * @note: this function is mandatory to use the commutation event in order to |
||
1456 | * update the configuration at each commutation detection on the TRGI input of the Timer, |
||
1457 | * the typical use of this feature is with the use of another Timer(interface Timer) |
||
1458 | * configured in Hall sensor interface, this interface Timer will generate the |
||
1459 | * commutation at its TRGO output (connected to Timer used in this function) each time |
||
1460 | * the TI1 of the Interface Timer detect a commutation at its input TI1. |
||
1461 | * @param htim : TIM handle |
||
1462 | * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor |
||
1463 | * This parameter can be one of the following values: |
||
1464 | * @arg TIM_TS_ITR0: Internal trigger 0 selected |
||
1465 | * @arg TIM_TS_ITR1: Internal trigger 1 selected |
||
1466 | * @arg TIM_TS_ITR2: Internal trigger 2 selected |
||
1467 | * @arg TIM_TS_ITR3: Internal trigger 3 selected |
||
1468 | * @arg TIM_TS_NONE: No trigger is needed |
||
1469 | * @param CommutationSource : the Commutation Event source |
||
1470 | * This parameter can be one of the following values: |
||
1471 | * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer |
||
1472 | * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit |
||
1473 | * @retval HAL status |
||
1474 | */ |
||
1475 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) |
||
1476 | { |
||
1477 | /* Check the parameters */ |
||
1478 | assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); |
||
1479 | assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); |
||
1480 | |||
1481 | __HAL_LOCK(htim); |
||
1482 | |||
1483 | if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || |
||
1484 | (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) |
||
1485 | { |
||
1486 | /* Select the Input trigger */ |
||
1487 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
||
1488 | htim->Instance->SMCR |= InputTrigger; |
||
1489 | } |
||
1490 | |||
1491 | /* Select the Capture Compare preload feature */ |
||
1492 | htim->Instance->CR2 |= TIM_CR2_CCPC; |
||
1493 | /* Select the Commutation event source */ |
||
1494 | htim->Instance->CR2 &= ~TIM_CR2_CCUS; |
||
1495 | htim->Instance->CR2 |= CommutationSource; |
||
1496 | |||
1497 | __HAL_UNLOCK(htim); |
||
1498 | |||
1499 | return HAL_OK; |
||
1500 | } |
||
1501 | |||
1502 | /** |
||
1503 | * @brief Configure the TIM commutation event sequence with interrupt. |
||
1504 | * @note: this function is mandatory to use the commutation event in order to |
||
1505 | * update the configuration at each commutation detection on the TRGI input of the Timer, |
||
1506 | * the typical use of this feature is with the use of another Timer(interface Timer) |
||
1507 | * configured in Hall sensor interface, this interface Timer will generate the |
||
1508 | * commutation at its TRGO output (connected to Timer used in this function) each time |
||
1509 | * the TI1 of the Interface Timer detect a commutation at its input TI1. |
||
1510 | * @param htim : TIM handle |
||
1511 | * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor |
||
1512 | * This parameter can be one of the following values: |
||
1513 | * @arg TIM_TS_ITR0: Internal trigger 0 selected |
||
1514 | * @arg TIM_TS_ITR1: Internal trigger 1 selected |
||
1515 | * @arg TIM_TS_ITR2: Internal trigger 2 selected |
||
1516 | * @arg TIM_TS_ITR3: Internal trigger 3 selected |
||
1517 | * @arg TIM_TS_NONE: No trigger is needed |
||
1518 | * @param CommutationSource : the Commutation Event source |
||
1519 | * This parameter can be one of the following values: |
||
1520 | * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer |
||
1521 | * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit |
||
1522 | * @retval HAL status |
||
1523 | */ |
||
1524 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) |
||
1525 | { |
||
1526 | /* Check the parameters */ |
||
1527 | assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); |
||
1528 | assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); |
||
1529 | |||
1530 | __HAL_LOCK(htim); |
||
1531 | |||
1532 | if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || |
||
1533 | (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) |
||
1534 | { |
||
1535 | /* Select the Input trigger */ |
||
1536 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
||
1537 | htim->Instance->SMCR |= InputTrigger; |
||
1538 | } |
||
1539 | |||
1540 | /* Select the Capture Compare preload feature */ |
||
1541 | htim->Instance->CR2 |= TIM_CR2_CCPC; |
||
1542 | /* Select the Commutation event source */ |
||
1543 | htim->Instance->CR2 &= ~TIM_CR2_CCUS; |
||
1544 | htim->Instance->CR2 |= CommutationSource; |
||
1545 | |||
1546 | /* Enable the Commutation Interrupt Request */ |
||
1547 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM); |
||
1548 | |||
1549 | __HAL_UNLOCK(htim); |
||
1550 | |||
1551 | return HAL_OK; |
||
1552 | } |
||
1553 | |||
1554 | /** |
||
1555 | * @brief Configure the TIM commutation event sequence with DMA. |
||
1556 | * @note: this function is mandatory to use the commutation event in order to |
||
1557 | * update the configuration at each commutation detection on the TRGI input of the Timer, |
||
1558 | * the typical use of this feature is with the use of another Timer(interface Timer) |
||
1559 | * configured in Hall sensor interface, this interface Timer will generate the |
||
1560 | * commutation at its TRGO output (connected to Timer used in this function) each time |
||
1561 | * the TI1 of the Interface Timer detect a commutation at its input TI1. |
||
1562 | * @note: The user should configure the DMA in his own software, in This function only the COMDE bit is set |
||
1563 | * @param htim : TIM handle |
||
1564 | * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor |
||
1565 | * This parameter can be one of the following values: |
||
1566 | * @arg TIM_TS_ITR0: Internal trigger 0 selected |
||
1567 | * @arg TIM_TS_ITR1: Internal trigger 1 selected |
||
1568 | * @arg TIM_TS_ITR2: Internal trigger 2 selected |
||
1569 | * @arg TIM_TS_ITR3: Internal trigger 3 selected |
||
1570 | * @arg TIM_TS_NONE: No trigger is needed |
||
1571 | * @param CommutationSource : the Commutation Event source |
||
1572 | * This parameter can be one of the following values: |
||
1573 | * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer |
||
1574 | * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit |
||
1575 | * @retval HAL status |
||
1576 | */ |
||
1577 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) |
||
1578 | { |
||
1579 | /* Check the parameters */ |
||
1580 | assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); |
||
1581 | assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); |
||
1582 | |||
1583 | __HAL_LOCK(htim); |
||
1584 | |||
1585 | if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || |
||
1586 | (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) |
||
1587 | { |
||
1588 | /* Select the Input trigger */ |
||
1589 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
||
1590 | htim->Instance->SMCR |= InputTrigger; |
||
1591 | } |
||
1592 | |||
1593 | /* Select the Capture Compare preload feature */ |
||
1594 | htim->Instance->CR2 |= TIM_CR2_CCPC; |
||
1595 | /* Select the Commutation event source */ |
||
1596 | htim->Instance->CR2 &= ~TIM_CR2_CCUS; |
||
1597 | htim->Instance->CR2 |= CommutationSource; |
||
1598 | |||
1599 | /* Enable the Commutation DMA Request */ |
||
1600 | /* Set the DMA Commutation Callback */ |
||
1601 | htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt; |
||
1602 | /* Set the DMA error callback */ |
||
1603 | htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError; |
||
1604 | |||
1605 | /* Enable the Commutation DMA Request */ |
||
1606 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM); |
||
1607 | |||
1608 | __HAL_UNLOCK(htim); |
||
1609 | |||
1610 | return HAL_OK; |
||
1611 | } |
||
1612 | |||
1613 | /** |
||
1614 | * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State |
||
1615 | * and the AOE(automatic output enable). |
||
1616 | * @param htim : TIM handle |
||
1617 | * @param sBreakDeadTimeConfig : pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that |
||
1618 | * contains the BDTR Register configuration information for the TIM peripheral. |
||
1619 | * @retval HAL status |
||
1620 | */ |
||
1621 | HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, |
||
1622 | TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig) |
||
1623 | { |
||
1624 | /* Check the parameters */ |
||
1625 | assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance)); |
||
1626 | assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode)); |
||
1627 | assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode)); |
||
1628 | assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel)); |
||
1629 | assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime)); |
||
1630 | assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); |
||
1631 | assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity)); |
||
1632 | assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput)); |
||
1633 | |||
1634 | /* Process Locked */ |
||
1635 | __HAL_LOCK(htim); |
||
1636 | |||
1637 | htim->State = HAL_TIM_STATE_BUSY; |
||
1638 | |||
1639 | /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State, |
||
1640 | the OSSI State, the dead time value and the Automatic Output Enable Bit */ |
||
1641 | htim->Instance->BDTR = (uint32_t)sBreakDeadTimeConfig->OffStateRunMode | |
||
1642 | sBreakDeadTimeConfig->OffStateIDLEMode | |
||
1643 | sBreakDeadTimeConfig->LockLevel | |
||
1644 | sBreakDeadTimeConfig->DeadTime | |
||
1645 | sBreakDeadTimeConfig->BreakState | |
||
1646 | sBreakDeadTimeConfig->BreakPolarity | |
||
1647 | sBreakDeadTimeConfig->AutomaticOutput; |
||
1648 | |||
1649 | |||
1650 | htim->State = HAL_TIM_STATE_READY; |
||
1651 | |||
1652 | __HAL_UNLOCK(htim); |
||
1653 | |||
1654 | return HAL_OK; |
||
1655 | } |
||
1656 | |||
1657 | #endif /* defined(STM32F100xB) || defined(STM32F100xE) || */ |
||
1658 | /* defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || */ |
||
1659 | /* defined(STM32F105xC) || defined(STM32F107xC) */ |
||
1660 | |||
1661 | /** |
||
1662 | * @brief Configures the TIM in master mode. |
||
1663 | * @param htim : TIM handle. |
||
1664 | * @param sMasterConfig : pointer to a TIM_MasterConfigTypeDef structure that |
||
1665 | * contains the selected trigger output (TRGO) and the Master/Slave |
||
1666 | * mode. |
||
1667 | * @retval HAL status |
||
1668 | */ |
||
1669 | HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig) |
||
1670 | { |
||
1671 | /* Check the parameters */ |
||
1672 | assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); |
||
1673 | assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); |
||
1674 | assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); |
||
1675 | |||
1676 | __HAL_LOCK(htim); |
||
1677 | |||
1678 | htim->State = HAL_TIM_STATE_BUSY; |
||
1679 | |||
1680 | /* Reset the MMS Bits */ |
||
1681 | htim->Instance->CR2 &= ~TIM_CR2_MMS; |
||
1682 | /* Select the TRGO source */ |
||
1683 | htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; |
||
1684 | |||
1685 | /* Reset the MSM Bit */ |
||
1686 | htim->Instance->SMCR &= ~TIM_SMCR_MSM; |
||
1687 | /* Set or Reset the MSM Bit */ |
||
1688 | htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; |
||
1689 | |||
1690 | htim->State = HAL_TIM_STATE_READY; |
||
1691 | |||
1692 | __HAL_UNLOCK(htim); |
||
1693 | |||
1694 | return HAL_OK; |
||
1695 | } |
||
1696 | |||
1697 | /** |
||
1698 | * @} |
||
1699 | */ |
||
1700 | |||
1701 | /** @defgroup TIMEx_Exported_Functions_Group6 Extension Callbacks functions |
||
1702 | * @brief Extension Callbacks functions |
||
1703 | * |
||
1704 | @verbatim |
||
1705 | ============================================================================== |
||
1706 | ##### Extension Callbacks functions ##### |
||
1707 | ============================================================================== |
||
1708 | [..] |
||
1709 | This section provides Extension TIM callback functions: |
||
1710 | (+) Timer Commutation callback |
||
1711 | (+) Timer Break callback |
||
1712 | |||
1713 | @endverbatim |
||
1714 | * @{ |
||
1715 | */ |
||
1716 | |||
1717 | /** |
||
1718 | * @brief Hall commutation changed callback in non blocking mode |
||
1719 | * @param htim : TIM handle |
||
1720 | * @retval None |
||
1721 | */ |
||
1722 | __weak void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim) |
||
1723 | { |
||
1724 | /* NOTE : This function Should not be modified, when the callback is needed, |
||
1725 | the HAL_TIMEx_CommutationCallback could be implemented in the user file |
||
1726 | */ |
||
1727 | } |
||
1728 | |||
1729 | /** |
||
1730 | * @brief Hall Break detection callback in non blocking mode |
||
1731 | * @param htim : TIM handle |
||
1732 | * @retval None |
||
1733 | */ |
||
1734 | __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) |
||
1735 | { |
||
1736 | /* NOTE : This function Should not be modified, when the callback is needed, |
||
1737 | the HAL_TIMEx_BreakCallback could be implemented in the user file |
||
1738 | */ |
||
1739 | } |
||
1740 | |||
1741 | /** |
||
1742 | * @brief TIM DMA Commutation callback. |
||
1743 | * @param hdma : pointer to DMA handle. |
||
1744 | * @retval None |
||
1745 | */ |
||
1746 | void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma) |
||
1747 | { |
||
1748 | TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
||
1749 | |||
1750 | htim->State= HAL_TIM_STATE_READY; |
||
1751 | |||
1752 | HAL_TIMEx_CommutationCallback(htim); |
||
1753 | } |
||
1754 | |||
1755 | /** |
||
1756 | * @} |
||
1757 | */ |
||
1758 | |||
1759 | #if defined (STM32F100xB) || defined (STM32F100xE) || \ |
||
1760 | defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F103xE) || defined (STM32F103xG) || \ |
||
1761 | defined (STM32F105xC) || defined (STM32F107xC) |
||
1762 | |||
1763 | /** @defgroup TIMEx_Exported_Functions_Group7 Extension Peripheral State functions |
||
1764 | * @brief Extension Peripheral State functions |
||
1765 | * |
||
1766 | @verbatim |
||
1767 | ============================================================================== |
||
1768 | ##### Extension Peripheral State functions ##### |
||
1769 | ============================================================================== |
||
1770 | [..] |
||
1771 | This subsection permit to get in run-time the status of the peripheral |
||
1772 | and the data flow. |
||
1773 | |||
1774 | @endverbatim |
||
1775 | * @{ |
||
1776 | */ |
||
1777 | |||
1778 | /** |
||
1779 | * @brief Return the TIM Hall Sensor interface state |
||
1780 | * @param htim : TIM Hall Sensor handle |
||
1781 | * @retval HAL state |
||
1782 | */ |
||
1783 | HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim) |
||
1784 | { |
||
1785 | return htim->State; |
||
1786 | } |
||
1787 | |||
1788 | /** |
||
1789 | * @} |
||
1790 | */ |
||
1791 | #endif /* defined(STM32F100xB) || defined(STM32F100xE) || */ |
||
1792 | /* defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || */ |
||
1793 | /* defined(STM32F105xC) || defined(STM32F107xC) */ |
||
1794 | |||
1795 | /** |
||
1796 | * @} |
||
1797 | */ |
||
1798 | |||
1799 | #if defined (STM32F100xB) || defined (STM32F100xE) || \ |
||
1800 | defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F103xE) || defined (STM32F103xG) || \ |
||
1801 | defined (STM32F105xC) || defined (STM32F107xC) |
||
1802 | |||
1803 | /** @addtogroup TIMEx_Private_Functions |
||
1804 | * @{ |
||
1805 | */ |
||
1806 | |||
1807 | /** |
||
1808 | * @brief Enables or disables the TIM Capture Compare Channel xN. |
||
1809 | * @param TIMx to select the TIM peripheral |
||
1810 | * @param Channel : specifies the TIM Channel |
||
1811 | * This parameter can be one of the following values: |
||
1812 | * @arg TIM_Channel_1: TIM Channel 1 |
||
1813 | * @arg TIM_Channel_2: TIM Channel 2 |
||
1814 | * @arg TIM_Channel_3: TIM Channel 3 |
||
1815 | * @param ChannelNState : specifies the TIM Channel CCxNE bit new state. |
||
1816 | * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable. |
||
1817 | * @retval None |
||
1818 | */ |
||
1819 | static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState) |
||
1820 | { |
||
1821 | uint32_t tmp = 0; |
||
1822 | |||
1823 | tmp = TIM_CCER_CC1NE << Channel; |
||
1824 | |||
1825 | /* Reset the CCxNE Bit */ |
||
1826 | TIMx->CCER &= ~tmp; |
||
1827 | |||
1828 | /* Set or reset the CCxNE Bit */ |
||
1829 | TIMx->CCER |= (uint32_t)(ChannelNState << Channel); |
||
1830 | } |
||
1831 | |||
1832 | /** |
||
1833 | * @} |
||
1834 | */ |
||
1835 | |||
1836 | #endif /* defined(STM32F100xB) || defined(STM32F100xE) || */ |
||
1837 | /* defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || */ |
||
1838 | /* defined(STM32F105xC) || defined(STM32F107xC) */ |
||
1839 | |||
1840 | #endif /* HAL_TIM_MODULE_ENABLED */ |
||
1841 | /** |
||
1842 | * @} |
||
1843 | */ |
||
1844 | |||
1845 | /** |
||
1846 | * @} |
||
1847 | */ |
||
1848 | |||
1849 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |