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/**
2
  ******************************************************************************
3
  * @file    stm32f1xx_hal_i2s.c
4
  * @author  MCD Application Team
5
  * @version V1.0.1
6
  * @date    31-July-2015
7
  * @brief   I2S HAL module driver.
8
  *          This file provides firmware functions to manage the following
9
  *          functionalities of the Integrated Interchip Sound (I2S) peripheral:
10
  *           + Initialization and de-initialization functions
11
  *           + IO operation functions
12
  *           + Peripheral State and Errors functions
13
  @verbatim
14
 ===============================================================================
15
                  ##### How to use this driver #####
16
 ===============================================================================
17
 [..]
18
    The I2S HAL driver can be used as follow:
19
 
20
    (#) Declare a I2S_HandleTypeDef handle structure.
21
    (#) Initialize the I2S low level resources by implement the HAL_I2S_MspInit() API:
22
        (##) Enable the SPIx interface clock.                      
23
        (##) I2S pins configuration:
24
            (+++) Enable the clock for the I2S GPIOs.
25
            (+++) Configure these I2S pins as alternate function.
26
        (##) NVIC configuration if you need to use interrupt process (HAL_I2S_Transmit_IT()
27
             and HAL_I2S_Receive_IT() APIs).
28
            (+++) Configure the I2Sx interrupt priority.
29
            (+++) Enable the NVIC I2S IRQ handle.
30
        (##) DMA Configuration if you need to use DMA process (HAL_I2S_Transmit_DMA()
31
             and HAL_I2S_Receive_DMA() APIs:
32
            (+++) Declare a DMA handle structure for the Tx/Rx Channel.
33
            (+++) Enable the DMAx interface clock.
34
            (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.                
35
            (+++) Configure the DMA Tx/Rx Channel.
36
            (+++) Associate the initilalized DMA handle to the I2S DMA Tx/Rx handle.
37
            (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the
38
                  DMA Tx/Rx Channel.
39
 
40
   (#) Program the Mode, Standard, Data Format, MCLK Output, Audio frequency and Polarity
41
       using HAL_I2S_Init() function.
42
 
43
   -@- The specific I2S interrupts (Transmission complete interrupt,
44
       RXNE interrupt and Error Interrupts) will be managed using the macros
45
       __HAL_I2S_ENABLE_IT() and __HAL_I2S_DISABLE_IT() inside the transmit and receive process.
46
   -@- The I2SxCLK source is the system clock (provided by the HSI, the HSE or the PLL, and sourcing the AHB clock).
47
       For connectivity line devices, the I2SxCLK source can be either SYSCLK or the PLL3 VCO (2 x PLL3CLK) clock
48
       in order to achieve the maximum accuracy.
49
   -@- Make sure that either:
50
       (+@) External clock source is configured after setting correctly
51
            the define constant HSE_VALUE in the stm32f1xx_hal_conf.h file.
52
 
53
    (#) Three mode of operations are available within this driver :    
54
 
55
   *** Polling mode IO operation ***
56
   =================================
57
   [..]    
58
     (+) Send an amount of data in blocking mode using HAL_I2S_Transmit()
59
     (+) Receive an amount of data in blocking mode using HAL_I2S_Receive()
60
 
61
   *** Interrupt mode IO operation ***
62
   ===================================
63
   [..]    
64
     (+) Send an amount of data in non blocking mode using HAL_I2S_Transmit_IT()
65
     (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
66
         add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
67
     (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
68
         add his own code by customization of function pointer HAL_I2S_TxCpltCallback
69
     (+) Receive an amount of data in non blocking mode using HAL_I2S_Receive_IT()
70
     (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
71
         add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
72
     (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
73
         add his own code by customization of function pointer HAL_I2S_RxCpltCallback
74
     (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
75
         add his own code by customization of function pointer HAL_I2S_ErrorCallback
76
 
77
   *** DMA mode IO operation ***
78
   ==============================
79
   [..]
80
     (+) Send an amount of data in non blocking mode (DMA) using HAL_I2S_Transmit_DMA()
81
     (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
82
         add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
83
     (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
84
         add his own code by customization of function pointer HAL_I2S_TxCpltCallback
85
     (+) Receive an amount of data in non blocking mode (DMA) using HAL_I2S_Receive_DMA()
86
     (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
87
         add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
88
     (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
89
         add his own code by customization of function pointer HAL_I2S_RxCpltCallback
90
     (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
91
         add his own code by customization of function pointer HAL_I2S_ErrorCallback
92
     (+) Pause the DMA Transfer using HAL_I2S_DMAPause()
93
     (+) Resume the DMA Transfer using HAL_I2S_DMAResume()
94
     (+) Stop the DMA Transfer using HAL_I2S_DMAStop()
95
 
96
   *** I2S HAL driver macros list ***
97
   =============================================
98
   [..]
99
     Below the list of most used macros in USART HAL driver.
100
 
101
      (+) __HAL_I2S_ENABLE: Enable the specified SPI peripheral (in I2S mode)
102
      (+) __HAL_I2S_DISABLE: Disable the specified SPI peripheral (in I2S mode)
103
      (+) __HAL_I2S_ENABLE_IT : Enable the specified I2S interrupts
104
      (+) __HAL_I2S_DISABLE_IT : Disable the specified I2S interrupts
105
      (+) __HAL_I2S_GET_FLAG: Check whether the specified I2S flag is set or not
106
 
107
    [..]
108
      (@) You can refer to the I2S HAL driver header file for more useful macros
109
 
110
 
111
     *** I2C Workarounds linked to Silicon Limitation ***
112
     ====================================================
113
     [..]
114
       (@) Only the 16-bit mode with no data extension can be used when the I2S
115
           is in Master and used the PCM long synchronization mode.
116
 
117
 
118
  @endverbatim
119
  ******************************************************************************
120
  * @attention
121
  *
122
  * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
123
  *
124
  * Redistribution and use in source and binary forms, with or without modification,
125
  * are permitted provided that the following conditions are met:
126
  *   1. Redistributions of source code must retain the above copyright notice,
127
  *      this list of conditions and the following disclaimer.
128
  *   2. Redistributions in binary form must reproduce the above copyright notice,
129
  *      this list of conditions and the following disclaimer in the documentation
130
  *      and/or other materials provided with the distribution.
131
  *   3. Neither the name of STMicroelectronics nor the names of its contributors
132
  *      may be used to endorse or promote products derived from this software
133
  *      without specific prior written permission.
134
  *
135
  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
136
  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
137
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
138
  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
139
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
140
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
141
  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
142
  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
143
  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
144
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
145
  *
146
  ******************************************************************************
147
  */
148
 
149
/* Includes ------------------------------------------------------------------*/
150
#include "stm32f1xx_hal.h"
151
 
152
/** @addtogroup STM32F1xx_HAL_Driver
153
  * @{
154
  */
155
 
156
#ifdef HAL_I2S_MODULE_ENABLED
157
#if defined(STM32F103xE) || defined(STM32F103xG) || defined(STM32F105xC) || defined(STM32F107xC)
158
 
159
/** @defgroup I2S I2S
160
  * @brief I2S HAL module driver
161
  * @{
162
  */
163
 
164
/* Private typedef -----------------------------------------------------------*/
165
/* Private define ------------------------------------------------------------*/
166
/* Private macro -------------------------------------------------------------*/
167
/* Private variables ---------------------------------------------------------*/
168
/* Private function prototypes -----------------------------------------------*/
169
/** @addtogroup I2S_Private_Functions I2S Private Functions
170
  * @{
171
  */
172
static void               I2S_DMATxCplt(DMA_HandleTypeDef *hdma);
173
static void               I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
174
static void               I2S_DMARxCplt(DMA_HandleTypeDef *hdma);
175
static void               I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
176
static void               I2S_DMAError(DMA_HandleTypeDef *hdma);
177
static void               I2S_Transmit_IT(I2S_HandleTypeDef *hi2s);
178
static void               I2S_Receive_IT(I2S_HandleTypeDef *hi2s);
179
static HAL_StatusTypeDef  I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout);
180
/**
181
  * @}
182
  */
183
 
184
/* Exported functions ---------------------------------------------------------*/
185
/** @defgroup I2S_Exported_Functions I2S Exported Functions
186
  * @{
187
  */
188
 
189
/** @defgroup  I2S_Exported_Functions_Group1 Initialization and de-initialization functions
190
  *  @brief    Initialization and Configuration functions
191
  *
192
@verbatim    
193
 ===============================================================================
194
              ##### Initialization and de-initialization functions #####
195
 ===============================================================================
196
    [..]  This subsection provides a set of functions allowing to initialize and
197
          de-initialiaze the I2Sx peripheral in simplex mode:
198
 
199
      (+) User must Implement HAL_I2S_MspInit() function in which he configures
200
          all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
201
 
202
      (+) Call the function HAL_I2S_Init() to configure the selected device with
203
          the selected configuration:
204
        (++) Mode
205
        (++) Standard
206
        (++) Data Format
207
        (++) MCLK Output
208
        (++) Audio frequency
209
        (++) Polarity
210
 
211
     (+) Call the function HAL_I2S_DeInit() to restore the default configuration
212
         of the selected I2Sx periperal.
213
  @endverbatim
214
  * @{
215
  */
216
 
217
/**
218
  * @brief Initializes the I2S according to the specified parameters
219
  *         in the I2S_InitTypeDef and create the associated handle.
220
  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
221
  *         the configuration information for I2S module
222
  * @retval HAL status
223
  */
224
HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
225
{
226
  uint32_t i2sdiv = 2, i2sodd = 0, packetlength = 1;
227
  uint32_t tmp = 0, i2sclk = 0;
228
 
229
  /* Check the I2S handle allocation */
230
  if(hi2s == NULL)
231
  {
232
    return HAL_ERROR;
233
  }
234
 
235
  /* Check the I2S parameters */
236
  assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance));
237
  assert_param(IS_I2S_MODE(hi2s->Init.Mode));
238
  assert_param(IS_I2S_STANDARD(hi2s->Init.Standard));
239
  assert_param(IS_I2S_DATA_FORMAT(hi2s->Init.DataFormat));
240
  assert_param(IS_I2S_MCLK_OUTPUT(hi2s->Init.MCLKOutput));
241
  assert_param(IS_I2S_AUDIO_FREQ(hi2s->Init.AudioFreq));
242
  assert_param(IS_I2S_CPOL(hi2s->Init.CPOL));  
243
 
244
  if(hi2s->State == HAL_I2S_STATE_RESET)
245
  {
246
    /* Allocate lock resource and initialize it */
247
    hi2s->Lock = HAL_UNLOCKED;
248
 
249
    /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
250
    HAL_I2S_MspInit(hi2s);
251
  }
252
 
253
  hi2s->State = HAL_I2S_STATE_BUSY;
254
 
255
  /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/
256
  if(hi2s->Init.AudioFreq == I2S_AUDIOFREQ_DEFAULT)
257
  {
258
    i2sodd = (uint32_t)0;
259
    i2sdiv = (uint32_t)2;  
260
  }
261
  /* If the requested audio frequency is not the default, compute the prescaler */
262
  else
263
  {
264
    /* Check the frame length (For the Prescaler computing) *******************/
265
    if(hi2s->Init.DataFormat == I2S_DATAFORMAT_16B)
266
    {
267
      /* Packet length is 16 bits */
268
      packetlength = 1;
269
    }
270
    else
271
    {
272
      /* Packet length is 32 bits */
273
      packetlength = 2;
274
    }
275
 
276
    if(hi2s->Instance == SPI2)
277
    {
278
      /* Get the source clock value: based on SPI2 Instance */
279
      i2sclk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_I2S2);
280
    }
281
    else if(hi2s->Instance == SPI3)
282
    {
283
      /* Get the source clock value: based on SPI3 Instance */
284
      i2sclk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_I2S3);
285
    }
286
    else
287
    {
288
      /* Get the source clock value: based on System Clock value */
289
      i2sclk = HAL_RCC_GetSysClockFreq();  
290
    }
291
    if(i2sclk == 0)
292
    {
293
      return HAL_ERROR;
294
    }
295
 
296
    /* Compute the Real divider depending on the MCLK output state, with a floating point */
297
    if(hi2s->Init.MCLKOutput == I2S_MCLKOUTPUT_ENABLE)
298
    {
299
      /* MCLK output is enabled */
300
      tmp = (uint32_t)(((((i2sclk / 256) * 10) / hi2s->Init.AudioFreq)) + 5);
301
    }
302
    else
303
    {
304
      /* MCLK output is disabled */
305
      tmp = (uint32_t)(((((i2sclk / (32 * packetlength)) *10 ) / hi2s->Init.AudioFreq)) + 5);
306
    }
307
 
308
    /* Remove the flatting point */
309
    tmp = tmp / 10;  
310
 
311
    /* Check the parity of the divider */
312
    i2sodd = (uint32_t)(tmp & (uint32_t)1);
313
 
314
    /* Compute the i2sdiv prescaler */
315
    i2sdiv = (uint32_t)((tmp - i2sodd) / 2);
316
 
317
    /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
318
    i2sodd = (uint32_t) (i2sodd << 8);
319
  }
320
 
321
  /* Test if the divider is 1 or 0 or greater than 0xFF */
322
  if((i2sdiv < 2) || (i2sdiv > 0xFF))
323
  {
324
    /* Set the default values */
325
    i2sdiv = 2;
326
    i2sodd = 0;
327
  }
328
 
329
  /*----------------------- SPIx I2SCFGR & I2SPR Configuration ----------------*/
330
  /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
331
  /* And configure the I2S with the I2S_InitStruct values                      */
332
  MODIFY_REG( hi2s->Instance->I2SCFGR, (SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN |\
333
                                        SPI_I2SCFGR_CKPOL | SPI_I2SCFGR_I2SSTD |\
334
                                        SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG |\
335
                                        SPI_I2SCFGR_I2SE  | SPI_I2SCFGR_I2SMOD),\
336
                                       (SPI_I2SCFGR_I2SMOD | hi2s->Init.Mode |\
337
                                        hi2s->Init.Standard | hi2s->Init.DataFormat |\
338
                                        hi2s->Init.CPOL));
339
 
340
  /* Write to SPIx I2SPR register the computed value */
341
  hi2s->Instance->I2SPR = (uint32_t)((uint32_t)i2sdiv | (uint32_t)(i2sodd | (uint32_t)hi2s->Init.MCLKOutput));
342
 
343
  hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
344
  hi2s->State= HAL_I2S_STATE_READY;
345
 
346
  return HAL_OK;
347
}
348
 
349
/**
350
  * @brief DeInitializes the I2S peripheral
351
  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
352
  *         the configuration information for I2S module
353
  * @retval HAL status
354
  */
355
HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s)
356
{
357
  /* Check the I2S handle allocation */
358
  if(hi2s == NULL)
359
  {
360
    return HAL_ERROR;
361
  }
362
 
363
  hi2s->State = HAL_I2S_STATE_BUSY;
364
 
365
  /* Disable the I2S Peripheral Clock */
366
  __HAL_I2S_DISABLE(hi2s);
367
 
368
  /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
369
  HAL_I2S_MspDeInit(hi2s);
370
 
371
  hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
372
  hi2s->State = HAL_I2S_STATE_RESET;
373
 
374
  /* Release Lock */
375
  __HAL_UNLOCK(hi2s);
376
 
377
  return HAL_OK;
378
}
379
 
380
/**
381
  * @brief I2S MSP Init
382
  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
383
  *         the configuration information for I2S module
384
  * @retval None
385
  */
386
 __weak void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s)
387
{
388
  /* NOTE : This function Should not be modified, when the callback is needed,
389
            the HAL_I2S_MspInit could be implemented in the user file
390
   */
391
}
392
 
393
/**
394
  * @brief I2S MSP DeInit
395
  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
396
  *         the configuration information for I2S module
397
  * @retval None
398
  */
399
 __weak void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s)
400
{
401
  /* NOTE : This function Should not be modified, when the callback is needed,
402
            the HAL_I2S_MspDeInit could be implemented in the user file
403
   */
404
}
405
 
406
/**
407
  * @}
408
  */
409
 
410
/** @defgroup I2S_Exported_Functions_Group2 IO operation functions
411
  *  @brief Data transfers functions
412
  *
413
@verbatim  
414
 ===============================================================================
415
                      ##### IO operation functions #####
416
 ===============================================================================
417
    [..]
418
    This subsection provides a set of functions allowing to manage the I2S data
419
    transfers.
420
 
421
    (#) There are two modes of transfer:
422
       (++) Blocking mode : The communication is performed in the polling mode.
423
            The status of all data processing is returned by the same function
424
            after finishing transfer.  
425
       (++) No-Blocking mode : The communication is performed using Interrupts
426
            or DMA. These functions return the status of the transfer startup.
427
            The end of the data processing will be indicated through the
428
            dedicated I2S IRQ when using Interrupt mode or the DMA IRQ when
429
            using DMA mode.
430
 
431
    (#) Blocking mode functions are :
432
        (++) HAL_I2S_Transmit()
433
        (++) HAL_I2S_Receive()
434
 
435
    (#) No-Blocking mode functions with Interrupt are :
436
        (++) HAL_I2S_Transmit_IT()
437
        (++) HAL_I2S_Receive_IT()
438
 
439
    (#) No-Blocking mode functions with DMA are :
440
        (++) HAL_I2S_Transmit_DMA()
441
        (++) HAL_I2S_Receive_DMA()
442
 
443
    (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
444
        (++) HAL_I2S_TxCpltCallback()
445
        (++) HAL_I2S_RxCpltCallback()
446
        (++) HAL_I2S_ErrorCallback()
447
 
448
@endverbatim
449
  * @{
450
  */
451
 
452
/**
453
  * @brief Transmit an amount of data in blocking mode
454
  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
455
  *         the configuration information for I2S module
456
  * @param pData: a 16-bit pointer to data buffer.
457
  * @param Size: number of data sample to be sent:
458
  * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
459
  *       configuration phase, the Size parameter means the number of 16-bit data length
460
  *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
461
  *       the Size parameter means the number of 16-bit data length.
462
  * @param  Timeout: Timeout duration
463
  * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
464
  *       between Master and Slave(example: audio streaming).
465
  * @retval HAL status
466
  */
467
HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
468
{
469
  if((pData == NULL ) || (Size == 0))
470
  {
471
    return  HAL_ERROR;                                    
472
  }
473
 
474
  /* Process Locked */
475
  __HAL_LOCK(hi2s);
476
 
477
  if(hi2s->State == HAL_I2S_STATE_READY)
478
  {
479
    if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
480
      ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
481
    {
482
      hi2s->TxXferSize = (Size << 1);
483
      hi2s->TxXferCount = (Size << 1);
484
    }
485
    else
486
    {
487
      hi2s->TxXferSize = Size;
488
      hi2s->TxXferCount = Size;
489
    }
490
 
491
    /* Set state and reset error code */
492
    hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
493
    hi2s->State = HAL_I2S_STATE_BUSY_TX;
494
    hi2s->pTxBuffPtr = pData;
495
 
496
    /* Check if the I2S is already enabled */
497
    if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
498
    {
499
      /* Enable I2S peripheral */
500
      __HAL_I2S_ENABLE(hi2s);
501
    }
502
 
503
    while(hi2s->TxXferCount > 0)
504
    {
505
      /* Wait until TXE flag is set */
506
      if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, RESET, Timeout) != HAL_OK)
507
      {
508
        return HAL_TIMEOUT;
509
      }
510
      hi2s->Instance->DR = (*hi2s->pTxBuffPtr++);
511
      hi2s->TxXferCount--;  
512
 
513
      /* Check if an underrun occurs */
514
      if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_UDR) == SET)
515
      {
516
        /* Set the I2S State ready */
517
        hi2s->State = HAL_I2S_STATE_READY;
518
 
519
        /* Process Unlocked */
520
        __HAL_UNLOCK(hi2s);
521
 
522
        /* Set the error code and execute error callback*/
523
        hi2s->ErrorCode |= HAL_I2S_ERROR_UDR;
524
        return HAL_ERROR;
525
      }
526
    }
527
 
528
    /* Wait until TXE flag is set, to confirm the end of the transcation */
529
    if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, RESET, Timeout) != HAL_OK)
530
    {
531
      return HAL_TIMEOUT;
532
    }
533
    /* Check if Slave mode is selected */
534
    if(((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_TX) || ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_RX))
535
    {
536
      /* Wait until Busy flag is reset */
537
      if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_BSY, SET, Timeout) != HAL_OK)
538
      {
539
        return HAL_TIMEOUT;
540
      }
541
    }
542
    hi2s->State = HAL_I2S_STATE_READY;
543
 
544
    /* Process Unlocked */
545
    __HAL_UNLOCK(hi2s);
546
 
547
    return HAL_OK;
548
  }
549
  else
550
  {
551
    /* Process Unlocked */
552
    __HAL_UNLOCK(hi2s);
553
    return HAL_BUSY;
554
  }
555
}
556
 
557
/**
558
  * @brief Receive an amount of data in blocking mode
559
  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
560
  *         the configuration information for I2S module
561
  * @param pData: a 16-bit pointer to data buffer.
562
  * @param Size: number of data sample to be sent:
563
  * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
564
  *       configuration phase, the Size parameter means the number of 16-bit data length
565
  *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
566
  *       the Size parameter means the number of 16-bit data length.
567
  * @param Timeout: Timeout duration
568
  * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
569
  *       between Master and Slave(example: audio streaming).
570
  * @note In I2S Master Receiver mode, just after enabling the peripheral the clock will be generate
571
  *       in continouse way and as the I2S is not disabled at the end of the I2S transaction.
572
  * @retval HAL status
573
  */
574
HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
575
{
576
  if((pData == NULL ) || (Size == 0))
577
  {
578
    return  HAL_ERROR;
579
  }
580
 
581
  /* Process Locked */
582
  __HAL_LOCK(hi2s);
583
 
584
  if(hi2s->State == HAL_I2S_STATE_READY)
585
  {
586
    if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
587
      ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
588
    {
589
      hi2s->RxXferSize = (Size << 1);
590
      hi2s->RxXferCount = (Size << 1);
591
    }
592
    else
593
    {
594
      hi2s->RxXferSize = Size;
595
      hi2s->RxXferCount = Size;
596
    }
597
 
598
    /* Set state and reset error code */
599
    hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
600
    hi2s->State = HAL_I2S_STATE_BUSY_RX;
601
    hi2s->pRxBuffPtr = pData;
602
 
603
    /* Check if the I2S is already enabled */
604
    if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
605
    {
606
      /* Enable I2S peripheral */
607
      __HAL_I2S_ENABLE(hi2s);
608
    }
609
 
610
    /* Receive data */
611
    while(hi2s->RxXferCount > 0)
612
    {
613
      /* Wait until RXNE flag is reset */
614
      if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXNE, RESET, Timeout) != HAL_OK)
615
      {
616
        return HAL_TIMEOUT;
617
      }
618
 
619
      (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR;
620
      hi2s->RxXferCount--;
621
 
622
      /* Check if an overrun occurs */
623
      if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_OVR) == SET)
624
      {
625
        /* Set the I2S State ready */
626
        hi2s->State = HAL_I2S_STATE_READY;
627
 
628
        /* Process Unlocked */
629
        __HAL_UNLOCK(hi2s);
630
 
631
        /* Set the error code and execute error callback*/
632
        hi2s->ErrorCode |= HAL_I2S_ERROR_OVR;
633
        return HAL_ERROR;
634
      }
635
    }
636
 
637
    hi2s->State = HAL_I2S_STATE_READY;
638
 
639
    /* Process Unlocked */
640
    __HAL_UNLOCK(hi2s);
641
 
642
    return HAL_OK;
643
  }
644
  else
645
  {
646
    /* Process Unlocked */
647
    __HAL_UNLOCK(hi2s);
648
    return HAL_BUSY;
649
  }
650
}
651
 
652
/**
653
  * @brief Transmit an amount of data in non-blocking mode with Interrupt
654
  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
655
  *         the configuration information for I2S module
656
  * @param pData: a 16-bit pointer to data buffer.
657
  * @param Size: number of data sample to be sent:
658
  * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
659
  *       configuration phase, the Size parameter means the number of 16-bit data length
660
  *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
661
  *       the Size parameter means the number of 16-bit data length.
662
  * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
663
  *       between Master and Slave(example: audio streaming).
664
  * @retval HAL status
665
  */
666
HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
667
{
668
  if((pData == NULL) || (Size == 0))
669
  {
670
    return  HAL_ERROR;
671
  }
672
 
673
  /* Process Locked */
674
  __HAL_LOCK(hi2s);
675
 
676
  if(hi2s->State == HAL_I2S_STATE_READY)
677
  {
678
    hi2s->pTxBuffPtr = pData;
679
    hi2s->State = HAL_I2S_STATE_BUSY_TX;
680
    hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
681
 
682
    if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
683
      ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
684
    {
685
      hi2s->TxXferSize = (Size << 1);
686
      hi2s->TxXferCount = (Size << 1);
687
    }
688
    else
689
    {
690
      hi2s->TxXferSize = Size;
691
      hi2s->TxXferCount = Size;
692
    }
693
 
694
    /* Enable TXE and ERR interrupt */
695
    __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
696
 
697
    /* Check if the I2S is already enabled */
698
    if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
699
    {
700
      /* Enable I2S peripheral */
701
      __HAL_I2S_ENABLE(hi2s);
702
    }
703
 
704
    /* Process Unlocked */
705
    __HAL_UNLOCK(hi2s);
706
 
707
    return HAL_OK;
708
  }
709
  else
710
  {
711
    /* Process Unlocked */
712
    __HAL_UNLOCK(hi2s);
713
    return HAL_BUSY;
714
  }
715
}
716
 
717
/**
718
  * @brief Receive an amount of data in non-blocking mode with Interrupt
719
  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
720
  *         the configuration information for I2S module
721
  * @param pData: a 16-bit pointer to the Receive data buffer.
722
  * @param Size: number of data sample to be sent:
723
  * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
724
  *       configuration phase, the Size parameter means the number of 16-bit data length
725
  *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
726
  *       the Size parameter means the number of 16-bit data length.
727
  * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
728
  *       between Master and Slave(example: audio streaming).
729
  * @note It is recommended to use DMA for the I2S receiver to avoid de-synchronisation
730
  * between Master and Slave otherwise the I2S interrupt should be optimized.
731
  * @retval HAL status
732
  */
733
HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
734
{
735
    if((pData == NULL) || (Size == 0))
736
    {
737
      return  HAL_ERROR;
738
    }
739
 
740
  /* Process Locked */
741
  __HAL_LOCK(hi2s);
742
 
743
  if(hi2s->State == HAL_I2S_STATE_READY)
744
  {
745
    hi2s->pRxBuffPtr = pData;
746
    hi2s->State = HAL_I2S_STATE_BUSY_RX;
747
    hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
748
 
749
    if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
750
      ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
751
    {
752
      hi2s->RxXferSize = (Size << 1);
753
      hi2s->RxXferCount = (Size << 1);
754
    }  
755
    else
756
    {
757
      hi2s->RxXferSize = Size;
758
      hi2s->RxXferCount = Size;
759
    }
760
 
761
    /* Enable RXNE and ERR interrupt */
762
    __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
763
 
764
    /* Check if the I2S is already enabled */
765
    if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
766
    {
767
      /* Enable I2S peripheral */
768
      __HAL_I2S_ENABLE(hi2s);
769
    }
770
 
771
    /* Process Unlocked */
772
    __HAL_UNLOCK(hi2s);
773
 
774
    return HAL_OK;
775
  }
776
  else
777
  {
778
    /* Process Unlocked */
779
    __HAL_UNLOCK(hi2s);
780
    return HAL_BUSY;
781
  }
782
}
783
 
784
/**
785
  * @brief Transmit an amount of data in non-blocking mode with DMA
786
  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
787
  *         the configuration information for I2S module
788
  * @param pData: a 16-bit pointer to the Transmit data buffer.
789
  * @param Size: number of data sample to be sent:
790
  * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
791
  *       configuration phase, the Size parameter means the number of 16-bit data length
792
  *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
793
  *       the Size parameter means the number of 16-bit data length.
794
  * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
795
  *       between Master and Slave(example: audio streaming).
796
  * @retval HAL status
797
  */
798
HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
799
{
800
  if((pData == NULL) || (Size == 0))
801
  {
802
    return  HAL_ERROR;
803
  }
804
 
805
  /* Process Locked */
806
  __HAL_LOCK(hi2s);
807
 
808
  if(hi2s->State == HAL_I2S_STATE_READY)
809
  {  
810
    hi2s->pTxBuffPtr = pData;
811
    hi2s->State = HAL_I2S_STATE_BUSY_TX;
812
    hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
813
 
814
    if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
815
      ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
816
    {
817
      hi2s->TxXferSize = (Size << 1);
818
      hi2s->TxXferCount = (Size << 1);
819
    }
820
    else
821
    {
822
      hi2s->TxXferSize = Size;
823
      hi2s->TxXferCount = Size;
824
    }
825
 
826
    /* Set the I2S Tx DMA Half transfert complete callback */
827
    hi2s->hdmatx->XferHalfCpltCallback = I2S_DMATxHalfCplt;
828
 
829
    /* Set the I2S Tx DMA transfert complete callback */
830
    hi2s->hdmatx->XferCpltCallback = I2S_DMATxCplt;
831
 
832
    /* Set the DMA error callback */
833
    hi2s->hdmatx->XferErrorCallback = I2S_DMAError;
834
 
835
    /* Enable the Tx DMA Channel */
836
    HAL_DMA_Start_IT(hi2s->hdmatx, (uint32_t)hi2s->pTxBuffPtr, (uint32_t)&hi2s->Instance->DR, hi2s->TxXferSize);
837
 
838
    /* Check if the I2S is already enabled */
839
    if(HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
840
    {
841
      /* Enable I2S peripheral */
842
      __HAL_I2S_ENABLE(hi2s);
843
    }
844
 
845
    /* Check if the I2S Tx request is already enabled */
846
    if(HAL_IS_BIT_CLR(hi2s->Instance->CR2, SPI_CR2_TXDMAEN))
847
    {
848
      /* Enable Tx DMA Request */  
849
      SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
850
    }
851
 
852
    /* Process Unlocked */
853
    __HAL_UNLOCK(hi2s);
854
 
855
    return HAL_OK;
856
  }
857
  else
858
  {
859
    /* Process Unlocked */
860
    __HAL_UNLOCK(hi2s);
861
    return HAL_BUSY;
862
  }
863
}
864
 
865
/**
866
  * @brief Receive an amount of data in non-blocking mode with DMA
867
  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
868
  *         the configuration information for I2S module
869
  * @param pData: a 16-bit pointer to the Receive data buffer.
870
  * @param Size: number of data sample to be sent:
871
  * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
872
  *       configuration phase, the Size parameter means the number of 16-bit data length
873
  *       in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
874
  *       the Size parameter means the number of 16-bit data length.
875
  * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
876
  *       between Master and Slave(example: audio streaming).
877
  * @retval HAL status
878
  */
879
HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
880
{
881
  if((pData == NULL) || (Size == 0))
882
  {
883
    return  HAL_ERROR;
884
  }
885
 
886
  /* Process Locked */
887
  __HAL_LOCK(hi2s);
888
 
889
  if(hi2s->State == HAL_I2S_STATE_READY)
890
  {
891
    hi2s->pRxBuffPtr = pData;
892
    hi2s->State = HAL_I2S_STATE_BUSY_RX;
893
    hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
894
 
895
    if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
896
      ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
897
    {
898
      hi2s->RxXferSize = (Size << 1);
899
      hi2s->RxXferCount = (Size << 1);
900
    }
901
    else
902
    {
903
      hi2s->RxXferSize = Size;
904
      hi2s->RxXferCount = Size;
905
    }
906
 
907
 
908
    /* Set the I2S Rx DMA Half transfert complete callback */
909
    hi2s->hdmarx->XferHalfCpltCallback = I2S_DMARxHalfCplt;
910
 
911
    /* Set the I2S Rx DMA transfert complete callback */
912
    hi2s->hdmarx->XferCpltCallback = I2S_DMARxCplt;
913
 
914
    /* Set the DMA error callback */
915
    hi2s->hdmarx->XferErrorCallback = I2S_DMAError;
916
 
917
    /* Check if Master Receiver mode is selected */
918
    if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
919
    {
920
      /* Clear the Overrun Flag by a read operation to the SPI_DR register followed by a read
921
      access to the SPI_SR register. */
922
      __HAL_I2S_CLEAR_OVRFLAG(hi2s);
923
    }
924
 
925
    /* Enable the Rx DMA Channel */
926
    HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->DR, (uint32_t)hi2s->pRxBuffPtr, hi2s->RxXferSize);
927
 
928
    /* Check if the I2S is already enabled */
929
    if(HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
930
    {
931
      /* Enable I2S peripheral */
932
      __HAL_I2S_ENABLE(hi2s);
933
    }
934
 
935
     /* Check if the I2S Rx request is already enabled */
936
    if(HAL_IS_BIT_CLR(hi2s->Instance->CR2, SPI_CR2_RXDMAEN))
937
    {
938
      /* Enable Rx DMA Request */  
939
      SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
940
    }
941
 
942
    /* Process Unlocked */
943
    __HAL_UNLOCK(hi2s);
944
 
945
    return HAL_OK;
946
  }
947
  else
948
  {
949
    /* Process Unlocked */
950
    __HAL_UNLOCK(hi2s);
951
    return HAL_BUSY;
952
  }
953
}
954
 
955
/**
956
  * @brief Pauses the audio stream playing from the Media.
957
  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
958
  *         the configuration information for I2S module
959
  * @retval HAL status
960
  */
961
HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s)
962
{
963
  /* Process Locked */
964
  __HAL_LOCK(hi2s);
965
 
966
  if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
967
  {
968
    /* Disable the I2S DMA Tx request */
969
    CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
970
  }
971
  else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
972
  {
973
    /* Disable the I2S DMA Rx request */
974
    CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
975
  }
976
 
977
  /* Process Unlocked */
978
  __HAL_UNLOCK(hi2s);
979
 
980
  return HAL_OK;
981
}
982
 
983
/**
984
  * @brief Resumes the audio stream playing from the Media.
985
  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
986
  *         the configuration information for I2S module
987
  * @retval HAL status
988
  */
989
HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s)
990
{
991
  /* Process Locked */
992
  __HAL_LOCK(hi2s);
993
 
994
  if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
995
  {
996
    /* Enable the I2S DMA Tx request */
997
    SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
998
  }
999
  else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
1000
  {
1001
    /* Enable the I2S DMA Rx request */
1002
    SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
1003
  }
1004
 
1005
  /* If the I2S peripheral is still not enabled, enable it */
1006
  if(HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
1007
  {
1008
    /* Enable I2S peripheral */    
1009
    __HAL_I2S_ENABLE(hi2s);
1010
  }
1011
 
1012
  /* Process Unlocked */
1013
  __HAL_UNLOCK(hi2s);
1014
 
1015
  return HAL_OK;
1016
}
1017
 
1018
/**
1019
  * @brief Resumes the audio stream playing from the Media.
1020
  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
1021
  *         the configuration information for I2S module
1022
  * @retval HAL status
1023
  */
1024
HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s)
1025
{
1026
  /* Process Locked */
1027
  __HAL_LOCK(hi2s);
1028
 
1029
  /* Disable the I2S Tx/Rx DMA requests */
1030
  CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
1031
  CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
1032
 
1033
  /* Abort the I2S DMA Channel tx */
1034
  if(hi2s->hdmatx != NULL)
1035
  {
1036
    /* Disable the I2S DMA channel */
1037
    __HAL_DMA_DISABLE(hi2s->hdmatx);
1038
    HAL_DMA_Abort(hi2s->hdmatx);
1039
  }
1040
  /* Abort the I2S DMA Channel rx */
1041
  if(hi2s->hdmarx != NULL)
1042
  {
1043
    /* Disable the I2S DMA channel */
1044
    __HAL_DMA_DISABLE(hi2s->hdmarx);
1045
    HAL_DMA_Abort(hi2s->hdmarx);
1046
  }
1047
 
1048
  /* Disable I2S peripheral */
1049
  __HAL_I2S_DISABLE(hi2s);
1050
 
1051
  hi2s->State = HAL_I2S_STATE_READY;
1052
 
1053
  /* Process Unlocked */
1054
  __HAL_UNLOCK(hi2s);
1055
 
1056
  return HAL_OK;
1057
}
1058
 
1059
/**
1060
  * @brief  This function handles I2S interrupt request.
1061
  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
1062
  *         the configuration information for I2S module
1063
  * @retval None
1064
  */
1065
void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s)
1066
{  
1067
  uint32_t i2ssr = hi2s->Instance->SR;
1068
 
1069
  /* I2S in mode Receiver ------------------------------------------------*/
1070
  if(((i2ssr & I2S_FLAG_OVR) != I2S_FLAG_OVR) &&
1071
     ((i2ssr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE) != RESET))
1072
  {
1073
    I2S_Receive_IT(hi2s);
1074
    return;
1075
  }
1076
 
1077
  /* I2S in mode Tramitter -----------------------------------------------*/
1078
  if(((i2ssr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE) != RESET))
1079
  {    
1080
    I2S_Transmit_IT(hi2s);
1081
    return;
1082
  }
1083
 
1084
  /* I2S interrupt error -------------------------------------------------*/
1085
  if(__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)
1086
  {
1087
    /* I2S Overrun error interrupt occured ---------------------------------*/
1088
    if((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR)
1089
    {
1090
      /* Disable RXNE and ERR interrupt */
1091
      __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
1092
 
1093
      /* Set the error code and execute error callback*/
1094
      SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_OVR);
1095
    }
1096
 
1097
    /* I2S Underrun error interrupt occured --------------------------------*/
1098
    if((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR)
1099
    {
1100
      /* Disable TXE and ERR interrupt */
1101
      __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
1102
 
1103
      /* Set the error code and execute error callback*/
1104
      SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_UDR);
1105
    }
1106
 
1107
    /* Set the I2S State ready */
1108
    hi2s->State = HAL_I2S_STATE_READY;
1109
    /* Call the Error Callback */
1110
    HAL_I2S_ErrorCallback(hi2s);
1111
  }
1112
}
1113
 
1114
/**
1115
  * @brief Tx Transfer Half completed callbacks
1116
  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
1117
  *         the configuration information for I2S module
1118
  * @retval None
1119
  */
1120
 __weak void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
1121
{
1122
  /* NOTE : This function Should not be modified, when the callback is needed,
1123
            the HAL_I2S_TxHalfCpltCallback could be implemented in the user file
1124
   */
1125
}
1126
 
1127
/**
1128
  * @brief Tx Transfer completed callbacks
1129
  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
1130
  *         the configuration information for I2S module
1131
  * @retval None
1132
  */
1133
 __weak void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s)
1134
{
1135
  /* NOTE : This function Should not be modified, when the callback is needed,
1136
            the HAL_I2S_TxCpltCallback could be implemented in the user file
1137
   */
1138
}
1139
 
1140
/**
1141
  * @brief Rx Transfer half completed callbacks
1142
  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
1143
  *         the configuration information for I2S module
1144
  * @retval None
1145
  */
1146
__weak void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
1147
{
1148
  /* NOTE : This function Should not be modified, when the callback is needed,
1149
            the HAL_I2S_RxHalfCpltCallback could be implemented in the user file
1150
   */
1151
}
1152
 
1153
/**
1154
  * @brief Rx Transfer completed callbacks
1155
  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
1156
  *         the configuration information for I2S module
1157
  * @retval None
1158
  */
1159
__weak void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s)
1160
{
1161
  /* NOTE : This function Should not be modified, when the callback is needed,
1162
            the HAL_I2S_RxCpltCallback could be implemented in the user file
1163
   */
1164
}
1165
 
1166
/**
1167
  * @brief I2S error callbacks
1168
  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
1169
  *         the configuration information for I2S module
1170
  * @retval None
1171
  */
1172
 __weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s)
1173
{
1174
  /* NOTE : This function Should not be modified, when the callback is needed,
1175
            the HAL_I2S_ErrorCallback could be implemented in the user file
1176
   */
1177
}
1178
 
1179
/**
1180
  * @}
1181
  */
1182
 
1183
/** @defgroup I2S_Exported_Functions_Group3 Peripheral State and Errors functions
1184
  *  @brief   Peripheral State functions
1185
  *
1186
@verbatim  
1187
 ===============================================================================
1188
                      ##### Peripheral State and Errors functions #####
1189
 ===============================================================================  
1190
    [..]
1191
    This subsection permits to get in run-time the status of the peripheral
1192
    and the data flow.
1193
 
1194
@endverbatim
1195
  * @{
1196
  */
1197
 
1198
/**
1199
  * @brief  Return the I2S state
1200
  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
1201
  *         the configuration information for I2S module
1202
  * @retval HAL state
1203
  */
1204
HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s)
1205
{
1206
  return hi2s->State;
1207
}
1208
 
1209
/**
1210
  * @brief  Return the I2S error code
1211
  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
1212
  *         the configuration information for I2S module
1213
  * @retval I2S Error Code
1214
  */
1215
uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s)
1216
{
1217
  return hi2s->ErrorCode;
1218
}
1219
/**
1220
  * @}
1221
  */
1222
 
1223
/**
1224
  * @}
1225
  */
1226
 
1227
/* Private functions ---------------------------------------------------------*/
1228
/** @addtogroup I2S_Private_Functions I2S Private Functions
1229
  * @{
1230
  */
1231
/**
1232
  * @brief DMA I2S transmit process complete callback
1233
  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
1234
  *                the configuration information for the specified DMA module.
1235
  * @retval None
1236
  */
1237
static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma)
1238
{
1239
  I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1240
 
1241
  if(HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC))
1242
  {
1243
    /* Disable Tx DMA Request */
1244
    CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
1245
 
1246
    hi2s->TxXferCount = 0;
1247
    hi2s->State = HAL_I2S_STATE_READY;
1248
  }
1249
  HAL_I2S_TxCpltCallback(hi2s);
1250
}
1251
 
1252
/**
1253
  * @brief DMA I2S transmit process half complete callback
1254
  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
1255
  *                the configuration information for the specified DMA module.
1256
  * @retval None
1257
  */
1258
static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
1259
{
1260
  I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1261
 
1262
  HAL_I2S_TxHalfCpltCallback(hi2s);
1263
}
1264
 
1265
/**
1266
  * @brief DMA I2S receive process complete callback
1267
  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
1268
  *                the configuration information for the specified DMA module.
1269
  * @retval None
1270
  */
1271
static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma)
1272
{
1273
  I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1274
 
1275
  if(HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC))
1276
  {
1277
    /* Disable Rx DMA Request */
1278
    CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
1279
    hi2s->RxXferCount = 0;
1280
    hi2s->State = HAL_I2S_STATE_READY;
1281
  }
1282
  HAL_I2S_RxCpltCallback(hi2s);
1283
}
1284
 
1285
/**
1286
  * @brief DMA I2S receive process half complete callback
1287
  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
1288
  *                the configuration information for the specified DMA module.
1289
  * @retval None
1290
  */
1291
static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
1292
{
1293
  I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1294
 
1295
  HAL_I2S_RxHalfCpltCallback(hi2s);
1296
}
1297
 
1298
/**
1299
  * @brief DMA I2S communication error callback
1300
  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
1301
  *                the configuration information for the specified DMA module.
1302
  * @retval None
1303
  */
1304
static void I2S_DMAError(DMA_HandleTypeDef *hdma)
1305
{
1306
  I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1307
 
1308
  /* Disable Rx and Tx DMA Request */
1309
  CLEAR_BIT(hi2s->Instance->CR2, (SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN));
1310
  hi2s->TxXferCount = 0;
1311
  hi2s->RxXferCount = 0;
1312
 
1313
  hi2s->State= HAL_I2S_STATE_READY;
1314
 
1315
  /* Set the error code and execute error callback*/
1316
  SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_DMA);
1317
  HAL_I2S_ErrorCallback(hi2s);
1318
}
1319
 
1320
/**
1321
  * @brief Transmit an amount of data in non-blocking mode with Interrupt
1322
  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
1323
  *         the configuration information for I2S module
1324
  * @retval None
1325
  */
1326
static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s)
1327
{
1328
  /* Transmit data */
1329
  hi2s->Instance->DR = (*hi2s->pTxBuffPtr++);
1330
  hi2s->TxXferCount--;
1331
 
1332
  if(hi2s->TxXferCount == 0)
1333
  {
1334
    /* Disable TXE and ERR interrupt */
1335
    __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
1336
 
1337
    hi2s->State = HAL_I2S_STATE_READY;
1338
    HAL_I2S_TxCpltCallback(hi2s);
1339
  }
1340
}
1341
 
1342
/**
1343
  * @brief Receive an amount of data in non-blocking mode with Interrupt
1344
  * @param hi2s: I2S handle
1345
  * @retval None
1346
  */
1347
static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s)
1348
{
1349
  /* Receive data */    
1350
  (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR;
1351
  hi2s->RxXferCount--;
1352
 
1353
  if(hi2s->RxXferCount == 0)
1354
  {
1355
    /* Disable RXNE and ERR interrupt */
1356
    __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
1357
 
1358
    hi2s->State = HAL_I2S_STATE_READY;    
1359
    HAL_I2S_RxCpltCallback(hi2s);
1360
  }
1361
}
1362
 
1363
 
1364
/**
1365
  * @brief This function handles I2S Communication Timeout.
1366
  * @param  hi2s: pointer to a I2S_HandleTypeDef structure that contains
1367
  *         the configuration information for I2S module
1368
  * @param Flag: Flag checked
1369
  * @param Status: Value of the flag expected
1370
  * @param Timeout: Duration of the timeout
1371
  * @retval HAL status
1372
  */
1373
static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout)
1374
{
1375
  uint32_t tickstart = 0;
1376
 
1377
  /* Get tick */
1378
  tickstart = HAL_GetTick();
1379
 
1380
  /* Wait until flag is set */
1381
  if(Status == RESET)
1382
  {
1383
    while(__HAL_I2S_GET_FLAG(hi2s, Flag) == RESET)
1384
    {
1385
      if(Timeout != HAL_MAX_DELAY)
1386
      {
1387
        if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
1388
        {
1389
          /* Set the I2S State ready */
1390
          hi2s->State= HAL_I2S_STATE_READY;
1391
 
1392
          /* Process Unlocked */
1393
          __HAL_UNLOCK(hi2s);
1394
 
1395
          return HAL_TIMEOUT;
1396
        }
1397
      }
1398
    }
1399
  }
1400
  else
1401
  {
1402
    while(__HAL_I2S_GET_FLAG(hi2s, Flag) != RESET)
1403
    {
1404
      if(Timeout != HAL_MAX_DELAY)
1405
      {
1406
        if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
1407
        {
1408
          /* Set the I2S State ready */
1409
          hi2s->State= HAL_I2S_STATE_READY;
1410
 
1411
          /* Process Unlocked */
1412
          __HAL_UNLOCK(hi2s);
1413
 
1414
          return HAL_TIMEOUT;
1415
        }
1416
      }
1417
    }
1418
  }
1419
  return HAL_OK;
1420
}
1421
 
1422
/**
1423
  * @}
1424
  */
1425
 
1426
/**
1427
  * @}
1428
  */
1429
 
1430
#endif /* STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
1431
#endif /* HAL_I2S_MODULE_ENABLED */
1432
 
1433
 
1434
/**
1435
  * @}
1436
  */
1437
 
1438
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/