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/**
2
  ******************************************************************************
3
  * @file    stm32f1xx_hal_i2c.c
4
  * @author  MCD Application Team
5
  * @version V1.0.1
6
  * @date    31-July-2015
7
  * @brief   I2C HAL module driver.
8
  *          This file provides firmware functions to manage the following
9
  *          functionalities of the Inter Integrated Circuit (I2C) peripheral:
10
  *           + Initialization and de-initialization functions
11
  *           + IO operation functions
12
  *           + Peripheral Control functions
13
  *           + Peripheral State functions
14
  *        
15
  @verbatim
16
  ==============================================================================
17
                        ##### How to use this driver #####
18
  ==============================================================================
19
  [..]
20
    The I2C HAL driver can be used as follows:
21
 
22
    (#) Declare a I2C_HandleTypeDef handle structure, for example:
23
        I2C_HandleTypeDef  hi2c;
24
 
25
    (#)Initialize the I2C low level resources by implement the HAL_I2C_MspInit() API:
26
        (##) Enable the I2Cx interface clock
27
        (##) I2C pins configuration
28
            (+++) Enable the clock for the I2C GPIOs
29
            (+++) Configure I2C pins as alternate function open-drain
30
        (##) NVIC configuration if you need to use interrupt process
31
            (+++) Configure the I2Cx interrupt priority
32
            (+++) Enable the NVIC I2C IRQ Channel
33
        (##) DMA Configuration if you need to use DMA process
34
            (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel
35
            (+++) Enable the DMAx interface clock using
36
            (+++) Configure the DMA handle parameters
37
            (+++) Configure the DMA Tx or Rx channel
38
            (+++) Associate the initilalized DMA handle to the hi2c DMA Tx or Rx handle
39
            (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
40
                  the DMA Tx or Rx channel
41
 
42
    (#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1,
43
        Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure.
44
 
45
    (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
46
        (GPIO, CLOCK, NVIC...etc) by calling the customed HAL_I2C_MspInit(&hi2c) API.
47
 
48
    (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
49
 
50
    (#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
51
 
52
    *** Polling mode IO operation ***
53
    =================================
54
    [..]
55
      (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
56
      (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
57
      (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
58
      (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
59
 
60
    *** Polling mode IO MEM operation ***
61
    =====================================
62
    [..]
63
      (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
64
      (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
65
 
66
 
67
    *** Interrupt mode IO operation ***
68
    ===================================
69
    [..]
70
      (+) The I2C interrupts should have the highest priority in the application in order
71
          to make them uninterruptible.
72
      (+) Transmit in master mode an amount of data in non blocking mode using HAL_I2C_Master_Transmit_IT()
73
      (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
74
           add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
75
      (+) Receive in master mode an amount of data in non blocking mode using HAL_I2C_Master_Receive_IT()
76
      (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
77
           add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
78
      (+) Transmit in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Transmit_IT()
79
      (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
80
           add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
81
      (+) Receive in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Receive_IT()
82
      (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
83
           add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
84
      (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
85
           add his own code by customization of function pointer HAL_I2C_ErrorCallback
86
 
87
    *** Interrupt mode IO MEM operation ***
88
    =======================================
89
    [..]
90
      (+) The I2C interrupts should have the highest priority in the application in order
91
          to make them uninterruptible.
92
      (+) Write an amount of data in no-blocking mode with Interrupt to a specific memory address using
93
          HAL_I2C_Mem_Write_IT()
94
      (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
95
           add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
96
      (+) Read an amount of data in no-blocking mode with Interrupt from a specific memory address using
97
          HAL_I2C_Mem_Read_IT()
98
      (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
99
           add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
100
      (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
101
           add his own code by customization of function pointer HAL_I2C_ErrorCallback
102
 
103
    *** DMA mode IO operation ***
104
    ==============================
105
    [..]
106
      (+) Transmit in master mode an amount of data in non blocking mode (DMA) using
107
          HAL_I2C_Master_Transmit_DMA()
108
      (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
109
           add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
110
      (+) Receive in master mode an amount of data in non blocking mode (DMA) using
111
          HAL_I2C_Master_Receive_DMA()
112
      (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
113
           add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
114
      (+) Transmit in slave mode an amount of data in non blocking mode (DMA) using
115
          HAL_I2C_Slave_Transmit_DMA()
116
      (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
117
           add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
118
      (+) Receive in slave mode an amount of data in non blocking mode (DMA) using
119
          HAL_I2C_Slave_Receive_DMA()
120
      (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
121
           add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
122
      (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
123
           add his own code by customization of function pointer HAL_I2C_ErrorCallback
124
 
125
    *** DMA mode IO MEM operation ***
126
    =================================
127
    [..]
128
      (+) Write an amount of data in no-blocking mode with DMA to a specific memory address using
129
          HAL_I2C_Mem_Write_DMA()
130
      (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
131
           add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
132
      (+) Read an amount of data in no-blocking mode with DMA from a specific memory address using
133
          HAL_I2C_Mem_Read_DMA()
134
      (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
135
           add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
136
      (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
137
           add his own code by customization of function pointer HAL_I2C_ErrorCallback
138
 
139
 
140
     *** I2C HAL driver macros list ***
141
     ==================================
142
     [..]
143
       Below the list of most used macros in I2C HAL driver.
144
 
145
      (+) __HAL_I2C_ENABLE: Enable the I2C peripheral
146
      (+) __HAL_I2C_DISABLE: Disable the I2C peripheral
147
      (+) __HAL_I2C_GET_FLAG : Checks whether the specified I2C flag is set or not
148
      (+) __HAL_I2C_CLEAR_FLAG : Clear the specified I2C pending flag
149
      (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
150
      (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
151
       (@) You can refer to the I2C HAL driver header file for more useful macros
152
 
153
 
154
     *** I2C Workarounds linked to Silicon Limitation ***
155
     ====================================================
156
     [..]
157
       Below the list of all silicon limitations implemented for HAL on STM32F1xx product.
158
       (@) See ErrataSheet to know full silicon limitation list of your product.
159
 
160
       (#) Workarounds Implemented inside I2C HAL Driver
161
          (##) Wrong data read into data register (Polling and Interrupt mode)
162
          (##) Start cannot be generated after a misplaced Stop
163
          (##) Some software events must be managed before the current byte is being transferred:
164
               Workaround: Use DMA in general, except when the Master is receiving a single byte.
165
               For Interupt mode, I2C should have the highest priority in the application.
166
          (##) Mismatch on the "Setup time for a repeated Start condition" timing parameter:
167
               Workaround: Reduce the frequency down to 88 kHz or use the I2C Fast-mode if
168
               supported by the slave.
169
          (##) Data valid time (tVD;DAT) violated without the OVR flag being set:
170
               Workaround: If the slave device allows it, use the clock stretching mechanism
171
               by programming NoStretchMode = I2C_NOSTRETCH_DISABLE in HAL_I2C_Init.
172
 
173
  @endverbatim
174
  ******************************************************************************
175
  * @attention
176
  *
177
  * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
178
  *
179
  * Redistribution and use in source and binary forms, with or without modification,
180
  * are permitted provided that the following conditions are met:
181
  *   1. Redistributions of source code must retain the above copyright notice,
182
  *      this list of conditions and the following disclaimer.
183
  *   2. Redistributions in binary form must reproduce the above copyright notice,
184
  *      this list of conditions and the following disclaimer in the documentation
185
  *      and/or other materials provided with the distribution.
186
  *   3. Neither the name of STMicroelectronics nor the names of its contributors
187
  *      may be used to endorse or promote products derived from this software
188
  *      without specific prior written permission.
189
  *
190
  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
191
  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
192
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
193
  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
194
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
195
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
196
  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
197
  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
198
  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
199
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
200
  *
201
  ******************************************************************************
202
  */
203
 
204
/* Includes ------------------------------------------------------------------*/
205
#include "stm32f1xx_hal.h"
206
 
207
/** @addtogroup STM32F1xx_HAL_Driver
208
  * @{
209
  */
210
 
211
/** @defgroup I2C I2C
212
  * @brief I2C HAL module driver
213
  * @{
214
  */
215
 
216
#ifdef HAL_I2C_MODULE_ENABLED
217
 
218
/* Private typedef -----------------------------------------------------------*/
219
/* Private constants ---------------------------------------------------------*/
220
/** @addtogroup I2C_Private_Constants I2C Private Constants
221
  * @{
222
  */
223
#define I2C_TIMEOUT_FLAG          ((uint32_t)35)     /* 35 ms */
224
#define I2C_TIMEOUT_ADDR_SLAVE    ((uint32_t)10000)  /* 10 s  */
225
#define I2C_TIMEOUT_BUSY_FLAG     ((uint32_t)10000)  /* 10 s  */
226
/**
227
  * @}
228
  */
229
 
230
/* Private macro -------------------------------------------------------------*/
231
/* Private variables ---------------------------------------------------------*/
232
/* Private function prototypes -----------------------------------------------*/
233
/** @addtogroup I2C_Private_Functions I2C Private Functions
234
  * @{
235
  */
236
static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma);
237
static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma);
238
static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma);
239
static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma);
240
static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma);
241
static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma);
242
static void I2C_DMAError(DMA_HandleTypeDef *hdma);
243
 
244
static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout);
245
static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout);
246
static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout);
247
static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout);
248
static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
249
static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout);
250
 
251
static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c);
252
static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c);
253
static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c);
254
static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c);
255
 
256
static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c);
257
static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c);
258
static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c);
259
static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c);
260
static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c);
261
static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c);
262
static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c);
263
 
264
static uint32_t I2C_Configure_Speed(I2C_HandleTypeDef *hi2c, uint32_t I2CClkSrcFreq);
265
/**
266
  * @}
267
  */
268
 
269
/* Exported functions ---------------------------------------------------------*/
270
 
271
/** @defgroup I2C_Exported_Functions I2C Exported Functions
272
  * @{
273
  */
274
 
275
/** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
276
 *  @brief    Initialization and Configuration functions
277
 *
278
@verbatim
279
 ===============================================================================
280
              ##### Initialization and de-initialization functions #####
281
 ===============================================================================
282
    [..]  This subsection provides a set of functions allowing to initialize and
283
          de-initialiaze the I2Cx peripheral:
284
 
285
      (+) User must Implement HAL_I2C_MspInit() function in which he configures
286
          all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC).
287
 
288
      (+) Call the function HAL_I2C_Init() to configure the selected device with
289
          the selected configuration:
290
        (++) Communication Speed
291
        (++) Duty cycle
292
        (++) Addressing mode
293
        (++) Own Address 1
294
        (++) Dual Addressing mode
295
        (++) Own Address 2
296
        (++) General call mode
297
        (++) Nostretch mode
298
 
299
      (+) Call the function HAL_I2C_DeInit() to restore the default configuration
300
          of the selected I2Cx periperal.
301
 
302
@endverbatim
303
  * @{
304
  */
305
 
306
/**
307
  * @brief  Initializes the I2C according to the specified parameters
308
  *         in the I2C_InitTypeDef and create the associated handle.
309
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
310
  *                the configuration information for the specified I2C.
311
  * @retval HAL status
312
  */
313
HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
314
{
315
  uint32_t freqrange = 0;
316
  uint32_t pclk1 = 0;
317
 
318
  /* Check the I2C handle allocation */
319
  if(hi2c == NULL)
320
  {
321
    return HAL_ERROR;
322
  }
323
 
324
  /* Check the parameters */
325
  assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
326
  assert_param(IS_I2C_CLOCK_SPEED(hi2c->Init.ClockSpeed));
327
  assert_param(IS_I2C_DUTY_CYCLE(hi2c->Init.DutyCycle));
328
  assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
329
  assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
330
  assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
331
  assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
332
  assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
333
  assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
334
 
335
  if(hi2c->State == HAL_I2C_STATE_RESET)
336
  {
337
    /* Allocate lock resource and initialize it */
338
    hi2c->Lock = HAL_UNLOCKED;
339
 
340
    /* Init the low level hardware : GPIO, CLOCK, NVIC */
341
    HAL_I2C_MspInit(hi2c);
342
  }
343
 
344
  hi2c->State = HAL_I2C_STATE_BUSY;
345
 
346
  /* Disable the selected I2C peripheral */
347
  __HAL_I2C_DISABLE(hi2c);
348
 
349
  /* Get PCLK1 frequency */
350
  pclk1 = HAL_RCC_GetPCLK1Freq();
351
 
352
  /* Calculate frequency range */
353
  freqrange = I2C_FREQ_RANGE(pclk1);
354
 
355
  /*---------------------------- I2Cx CR2 Configuration ----------------------*/
356
  /* Configure I2Cx: Frequency range */
357
  hi2c->Instance->CR2 = freqrange;
358
 
359
  /*---------------------------- I2Cx TRISE Configuration --------------------*/
360
  /* Configure I2Cx: Rise Time */
361
  hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
362
 
363
  /*---------------------------- I2Cx CCR Configuration ----------------------*/
364
  /* Configure I2Cx: Speed */
365
  hi2c->Instance->CCR = I2C_Configure_Speed(hi2c, pclk1);
366
 
367
  /*---------------------------- I2Cx CR1 Configuration ----------------------*/
368
  /* Configure I2Cx: Generalcall and NoStretch mode */
369
  hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
370
 
371
  /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
372
  /* Configure I2Cx: Own Address1 and addressing mode */
373
  hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1);
374
 
375
  /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
376
  /* Configure I2Cx: Dual mode and Own Address2 */
377
  hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2);
378
 
379
  /* Enable the selected I2C peripheral */
380
  __HAL_I2C_ENABLE(hi2c);
381
 
382
  hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
383
  hi2c->State = HAL_I2C_STATE_READY;
384
 
385
  return HAL_OK;
386
}
387
 
388
/**
389
  * @brief  DeInitializes the I2C peripheral.
390
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
391
  *                the configuration information for the specified I2C.
392
  * @retval HAL status
393
  */
394
HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
395
{
396
  /* Check the I2C handle allocation */
397
  if(hi2c == NULL)
398
  {
399
    return HAL_ERROR;
400
  }
401
 
402
  /* Check the parameters */
403
  assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
404
 
405
  hi2c->State = HAL_I2C_STATE_BUSY;
406
 
407
  /* Disable the I2C Peripheral Clock */
408
  __HAL_I2C_DISABLE(hi2c);
409
 
410
  /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
411
  HAL_I2C_MspDeInit(hi2c);
412
 
413
  hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
414
 
415
  hi2c->State = HAL_I2C_STATE_RESET;
416
 
417
  /* Release Lock */
418
  __HAL_UNLOCK(hi2c);
419
 
420
  return HAL_OK;
421
}
422
 
423
/**
424
  * @brief I2C MSP Init.
425
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
426
  *                the configuration information for the specified I2C.
427
  * @retval None
428
  */
429
 __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
430
{
431
  /* NOTE : This function Should not be modified, when the callback is needed,
432
            the HAL_I2C_MspInit could be implemented in the user file
433
   */
434
}
435
 
436
/**
437
  * @brief I2C MSP DeInit
438
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
439
  *                the configuration information for the specified I2C.
440
  * @retval None
441
  */
442
 __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
443
{
444
  /* NOTE : This function Should not be modified, when the callback is needed,
445
            the HAL_I2C_MspDeInit could be implemented in the user file
446
   */
447
}
448
 
449
/**
450
  * @}
451
  */
452
 
453
/** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions
454
 *  @brief   Data transfers functions
455
 *
456
@verbatim
457
 ===============================================================================
458
                      ##### IO operation functions #####
459
 ===============================================================================
460
    [..]
461
    This subsection provides a set of functions allowing to manage the I2C data
462
    transfers.
463
 
464
    (#) There are two modes of transfer:
465
       (++) Blocking mode : The communication is performed in the polling mode.
466
            The status of all data processing is returned by the same function
467
            after finishing transfer.
468
       (++) No-Blocking mode : The communication is performed using Interrupts
469
            or DMA. These functions return the status of the transfer startup.
470
            The end of the data processing will be indicated through the
471
            dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
472
            using DMA mode.
473
 
474
    (#) Blocking mode functions are :
475
        (++) HAL_I2C_Master_Transmit()
476
        (++) HAL_I2C_Master_Receive()
477
        (++) HAL_I2C_Slave_Transmit()
478
        (++) HAL_I2C_Slave_Receive()
479
        (++) HAL_I2C_Mem_Write()
480
        (++) HAL_I2C_Mem_Read()
481
        (++) HAL_I2C_IsDeviceReady()
482
 
483
    (#) No-Blocking mode functions with Interrupt are :
484
        (++) HAL_I2C_Master_Transmit_IT()
485
        (++) HAL_I2C_Master_Receive_IT()
486
        (++) HAL_I2C_Slave_Transmit_IT()
487
        (++) HAL_I2C_Slave_Receive_IT()
488
        (++) HAL_I2C_Mem_Write_IT()
489
        (++) HAL_I2C_Mem_Read_IT()
490
 
491
    (#) No-Blocking mode functions with DMA are :
492
        (++) HAL_I2C_Master_Transmit_DMA()
493
        (++) HAL_I2C_Master_Receive_DMA()
494
        (++) HAL_I2C_Slave_Transmit_DMA()
495
        (++) HAL_I2C_Slave_Receive_DMA()
496
        (++) HAL_I2C_Mem_Write_DMA()
497
        (++) HAL_I2C_Mem_Read_DMA()
498
 
499
    (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
500
        (++) HAL_I2C_MemTxCpltCallback()
501
        (++) HAL_I2C_MemRxCpltCallback()
502
        (++) HAL_I2C_MasterTxCpltCallback()
503
        (++) HAL_I2C_MasterRxCpltCallback()
504
        (++) HAL_I2C_SlaveTxCpltCallback()
505
        (++) HAL_I2C_SlaveRxCpltCallback()
506
        (++) HAL_I2C_ErrorCallback()
507
 
508
@endverbatim
509
  * @{
510
  */
511
 
512
/**
513
  * @brief  Transmits in master mode an amount of data in blocking mode.
514
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
515
  *                the configuration information for the specified I2C.
516
  * @param  DevAddress: Target device address
517
  * @param  pData: Pointer to data buffer
518
  * @param  Size: Amount of data to be sent
519
  * @param  Timeout: Timeout duration
520
  * @retval HAL status
521
  */
522
HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
523
{
524
  if(hi2c->State == HAL_I2C_STATE_READY)
525
  {
526
    if((pData == NULL) || (Size == 0))
527
    {
528
      return  HAL_ERROR;
529
    }
530
 
531
    /* Wait until BUSY flag is reset */
532
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
533
    {
534
      return HAL_BUSY;
535
    }
536
 
537
    /* Process Locked */
538
    __HAL_LOCK(hi2c);
539
 
540
    /* Disable Pos */
541
    CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
542
 
543
    hi2c->State = HAL_I2C_STATE_BUSY_TX;
544
    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
545
 
546
    /* Send Slave Address */
547
    if(I2C_MasterRequestWrite(hi2c, DevAddress, Timeout) != HAL_OK)
548
    {
549
      if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
550
      {
551
        /* Process Unlocked */
552
        __HAL_UNLOCK(hi2c);
553
        return HAL_ERROR;
554
      }
555
      else
556
      {
557
        /* Process Unlocked */
558
        __HAL_UNLOCK(hi2c);
559
        return HAL_TIMEOUT;
560
      }
561
    }
562
 
563
    /* Clear ADDR flag */
564
    __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
565
 
566
    while(Size > 0)
567
    {
568
      /* Wait until TXE flag is set */
569
      if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
570
      {
571
        return HAL_TIMEOUT;
572
      }
573
 
574
      /* Write data to DR */
575
      hi2c->Instance->DR = (*pData++);
576
      Size--;
577
 
578
      if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
579
      {
580
        /* Write data to DR */
581
        hi2c->Instance->DR = (*pData++);
582
        Size--;
583
      }
584
    }
585
 
586
    /* Wait until TXE flag is set */
587
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
588
    {
589
      return HAL_TIMEOUT;
590
    }
591
 
592
    /* Generate Stop */
593
    SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
594
 
595
    hi2c->State = HAL_I2C_STATE_READY;
596
 
597
    /* Process Unlocked */
598
    __HAL_UNLOCK(hi2c);
599
 
600
    return HAL_OK;
601
  }
602
  else
603
  {
604
    return HAL_BUSY;
605
  }
606
}
607
 
608
/**
609
  * @brief  Receives in master mode an amount of data in blocking mode.
610
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
611
  *                the configuration information for the specified I2C.
612
  * @param  DevAddress: Target device address
613
  * @param  pData: Pointer to data buffer
614
  * @param  Size: Amount of data to be sent
615
  * @param  Timeout: Timeout duration
616
  * @retval HAL status
617
  */
618
HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
619
{
620
  if(hi2c->State == HAL_I2C_STATE_READY)
621
  {
622
    if((pData == NULL) || (Size == 0))
623
    {
624
      return  HAL_ERROR;
625
    }
626
 
627
    /* Wait until BUSY flag is reset */
628
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
629
    {
630
      return HAL_BUSY;
631
    }
632
 
633
    /* Process Locked */
634
    __HAL_LOCK(hi2c);
635
 
636
    /* Disable Pos */
637
    CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
638
 
639
    hi2c->State = HAL_I2C_STATE_BUSY_RX;
640
    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
641
 
642
    /* Send Slave Address */
643
    if(I2C_MasterRequestRead(hi2c, DevAddress, Timeout) != HAL_OK)
644
    {
645
      if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
646
      {
647
        /* Process Unlocked */
648
        __HAL_UNLOCK(hi2c);
649
        return HAL_ERROR;
650
      }
651
      else
652
      {
653
        /* Process Unlocked */
654
        __HAL_UNLOCK(hi2c);
655
        return HAL_TIMEOUT;
656
      }
657
    }
658
 
659
    if(Size == 1)
660
    {
661
      /* Disable Acknowledge */
662
      CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
663
 
664
      /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
665
         software sequence must complete before the current byte end of transfer */
666
      __disable_irq();
667
 
668
      /* Clear ADDR flag */
669
      __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
670
 
671
      /* Generate Stop */
672
      SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
673
 
674
      /* Re-enable IRQs */
675
      __enable_irq();
676
    }
677
    else if(Size == 2)
678
    {
679
      /* Enable Pos */
680
      SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
681
 
682
      /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
683
         software sequence must complete before the current byte end of transfer */
684
      __disable_irq();
685
 
686
      /* Clear ADDR flag */
687
      __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
688
 
689
      /* Disable Acknowledge */
690
      CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
691
 
692
       /* Re-enable IRQs */
693
       __enable_irq();
694
    }
695
    else
696
    {
697
      /* Enable Acknowledge */
698
      SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
699
 
700
      /* Clear ADDR flag */
701
      __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
702
    }
703
 
704
    while(Size > 0)
705
    {
706
      if(Size <= 3)
707
      {
708
        /* One byte */
709
        if(Size == 1)
710
        {
711
          /* Wait until RXNE flag is set */
712
          if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
713
          {
714
            return HAL_TIMEOUT;
715
          }
716
 
717
          /* Read data from DR */
718
          (*pData++) = hi2c->Instance->DR;
719
          Size--;
720
        }
721
        /* Two bytes */
722
        else if(Size == 2)
723
        {
724
          /* Wait until BTF flag is set */
725
          if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
726
          {
727
            return HAL_TIMEOUT;
728
          }
729
 
730
          /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
731
             software sequence must complete before the current byte end of transfer */
732
           __disable_irq();
733
 
734
          /* Generate Stop */
735
          SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
736
 
737
          /* Read data from DR */
738
          (*pData++) = hi2c->Instance->DR;
739
          Size--;
740
 
741
          /* Re-enable IRQs */
742
          __enable_irq();
743
 
744
          /* Read data from DR */
745
          (*pData++) = hi2c->Instance->DR;
746
          Size--;
747
        }
748
        /* 3 Last bytes */
749
        else
750
        {
751
          /* Wait until BTF flag is set */
752
          if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
753
          {
754
            return HAL_TIMEOUT;
755
          }
756
 
757
          /* Disable Acknowledge */
758
          CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
759
 
760
          /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
761
             software sequence must complete before the current byte end of transfer */
762
          __disable_irq();
763
 
764
          /* Read data from DR */
765
          (*pData++) = hi2c->Instance->DR;
766
          Size--;
767
 
768
          /* Wait until BTF flag is set */
769
          if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
770
          {
771
            return HAL_TIMEOUT;
772
          }
773
 
774
          /* Generate Stop */
775
          SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
776
 
777
          /* Read data from DR */
778
          (*pData++) = hi2c->Instance->DR;
779
          Size--;
780
 
781
          /* Re-enable IRQs */
782
          __enable_irq();
783
 
784
          /* Wait until RXNE flag is set */
785
          if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
786
          {
787
            return HAL_TIMEOUT;
788
          }
789
 
790
          /* Read data from DR */
791
          (*pData++) = hi2c->Instance->DR;
792
          Size--;
793
        }
794
      }
795
      else
796
      {
797
        /* Wait until RXNE flag is set */
798
        if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
799
        {
800
          return HAL_TIMEOUT;
801
        }
802
 
803
        /* Read data from DR */
804
        (*pData++) = hi2c->Instance->DR;
805
        Size--;
806
 
807
        if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
808
        {
809
          /* Read data from DR */
810
          (*pData++) = hi2c->Instance->DR;
811
          Size--;
812
        }
813
      }
814
    }
815
 
816
    hi2c->State = HAL_I2C_STATE_READY;
817
 
818
    /* Process Unlocked */
819
    __HAL_UNLOCK(hi2c);
820
 
821
    return HAL_OK;
822
  }
823
  else
824
  {
825
    return HAL_BUSY;
826
  }
827
}
828
 
829
/**
830
  * @brief  Transmits in slave mode an amount of data in blocking mode.
831
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
832
  *                the configuration information for the specified I2C.
833
  * @param  pData: Pointer to data buffer
834
  * @param  Size: Amount of data to be sent
835
  * @param  Timeout: Timeout duration
836
  * @retval HAL status
837
  */
838
HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
839
{
840
  if(hi2c->State == HAL_I2C_STATE_READY)
841
  {
842
    if((pData == NULL) || (Size == 0))
843
    {
844
      return  HAL_ERROR;
845
    }
846
 
847
    /* Wait until BUSY flag is reset */
848
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
849
    {
850
      return HAL_BUSY;
851
    }
852
 
853
    /* Process Locked */
854
    __HAL_LOCK(hi2c);
855
 
856
    /* Disable Pos */
857
    CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
858
 
859
    hi2c->State = HAL_I2C_STATE_BUSY_TX;
860
    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
861
 
862
    /* Enable Address Acknowledge */
863
    SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
864
 
865
    /* Wait until ADDR flag is set */
866
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
867
    {
868
      return HAL_TIMEOUT;
869
    }
870
 
871
    /* Clear ADDR flag */
872
    __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
873
 
874
    /* If 10bit addressing mode is selected */
875
    if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
876
    {
877
      /* Wait until ADDR flag is set */
878
      if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
879
      {
880
        return HAL_TIMEOUT;
881
      }
882
 
883
      /* Clear ADDR flag */
884
      __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
885
    }
886
 
887
    while(Size > 0)
888
    {
889
      /* Wait until TXE flag is set */
890
      if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
891
      {
892
        return HAL_TIMEOUT;
893
      }
894
 
895
      /* Write data to DR */
896
      hi2c->Instance->DR = (*pData++);
897
      Size--;
898
 
899
      if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
900
      {
901
        /* Write data to DR */
902
        hi2c->Instance->DR = (*pData++);
903
        Size--;
904
      }
905
    }
906
 
907
    /* Wait until AF flag is set */
908
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout) != HAL_OK)
909
    {
910
      return HAL_TIMEOUT;
911
    }
912
 
913
    /* Clear AF flag */
914
    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
915
 
916
    /* Disable Address Acknowledge */
917
    CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
918
 
919
    hi2c->State = HAL_I2C_STATE_READY;
920
 
921
    /* Process Unlocked */
922
    __HAL_UNLOCK(hi2c);
923
 
924
    return HAL_OK;
925
  }
926
  else
927
  {
928
    return HAL_BUSY;
929
  }
930
}
931
 
932
/**
933
  * @brief  Receive in slave mode an amount of data in blocking mode
934
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
935
  *                the configuration information for the specified I2C.
936
  * @param  pData: Pointer to data buffer
937
  * @param  Size: Amount of data to be sent
938
  * @param  Timeout: Timeout duration
939
  * @retval HAL status
940
  */
941
HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
942
{
943
  if(hi2c->State == HAL_I2C_STATE_READY)
944
  {
945
    if((pData == NULL) || (Size == 0))
946
    {
947
      return  HAL_ERROR;
948
    }
949
 
950
    /* Wait until BUSY flag is reset */
951
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
952
    {
953
      return HAL_BUSY;
954
    }
955
 
956
    /* Process Locked */
957
    __HAL_LOCK(hi2c);
958
 
959
    /* Disable Pos */
960
    CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
961
 
962
    hi2c->State = HAL_I2C_STATE_BUSY_RX;
963
    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
964
 
965
    /* Enable Address Acknowledge */
966
    SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
967
 
968
    /* Wait until ADDR flag is set */
969
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
970
    {
971
      return HAL_TIMEOUT;
972
    }
973
 
974
    /* Clear ADDR flag */
975
    __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
976
 
977
    while(Size > 0)
978
    {
979
      /* Wait until RXNE flag is set */
980
      if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
981
      {
982
        return HAL_TIMEOUT;
983
      }
984
 
985
      /* Read data from DR */
986
      (*pData++) = hi2c->Instance->DR;
987
      Size--;
988
 
989
      if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
990
      {
991
        /* Read data from DR */
992
        (*pData++) = hi2c->Instance->DR;
993
        Size--;
994
      }
995
    }
996
 
997
    /* Wait until STOP flag is set */
998
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout) != HAL_OK)
999
    {
1000
      return HAL_TIMEOUT;
1001
    }
1002
 
1003
    /* Clear STOP flag */
1004
    __HAL_I2C_CLEAR_STOPFLAG(hi2c);
1005
 
1006
    /* Disable Address Acknowledge */
1007
    CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1008
 
1009
    hi2c->State = HAL_I2C_STATE_READY;
1010
 
1011
    /* Process Unlocked */
1012
    __HAL_UNLOCK(hi2c);
1013
 
1014
    return HAL_OK;
1015
  }
1016
  else
1017
  {
1018
    return HAL_BUSY;
1019
  }
1020
}
1021
 
1022
 
1023
/**
1024
  * @brief  Transmit in master mode an amount of data in no-blocking mode with Interrupt
1025
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
1026
  *                the configuration information for the specified I2C.
1027
  * @param  DevAddress: Target device address
1028
  * @param  pData: Pointer to data buffer
1029
  * @param  Size: Amount of data to be sent
1030
  * @retval HAL status
1031
  */
1032
HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
1033
{
1034
  if(hi2c->State == HAL_I2C_STATE_READY)
1035
  {
1036
    if((pData == NULL) || (Size == 0))
1037
    {
1038
      return  HAL_ERROR;
1039
    }
1040
 
1041
    /* Wait until BUSY flag is reset */
1042
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
1043
    {
1044
      return HAL_BUSY;
1045
    }
1046
 
1047
    /* Process Locked */
1048
    __HAL_LOCK(hi2c);
1049
 
1050
    /* Disable Pos */
1051
    CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
1052
 
1053
    hi2c->State = HAL_I2C_STATE_BUSY_TX;
1054
    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1055
 
1056
    hi2c->pBuffPtr = pData;
1057
    hi2c->XferSize = Size;
1058
    hi2c->XferCount = Size;
1059
 
1060
    /* Send Slave Address */
1061
    if(I2C_MasterRequestWrite(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
1062
    {
1063
      if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1064
      {
1065
        /* Process Unlocked */
1066
        __HAL_UNLOCK(hi2c);
1067
        return HAL_ERROR;
1068
      }
1069
      else
1070
      {
1071
        /* Process Unlocked */
1072
        __HAL_UNLOCK(hi2c);
1073
        return HAL_TIMEOUT;
1074
      }
1075
    }
1076
 
1077
    /* Clear ADDR flag */
1078
    __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1079
 
1080
    /* Process Unlocked */
1081
    __HAL_UNLOCK(hi2c);
1082
 
1083
    /* Note : The I2C interrupts must be enabled after unlocking current process
1084
              to avoid the risk of I2C interrupt handle execution before current
1085
              process unlock */
1086
 
1087
    /* Enable EVT, BUF and ERR interrupt */
1088
    __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1089
 
1090
    return HAL_OK;
1091
  }
1092
  else
1093
  {
1094
    return HAL_BUSY;
1095
  }
1096
}
1097
 
1098
/**
1099
  * @brief  Receive in master mode an amount of data in no-blocking mode with Interrupt
1100
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
1101
  *                the configuration information for the specified I2C.
1102
  * @param  DevAddress: Target device address
1103
  * @param  pData: Pointer to data buffer
1104
  * @param  Size: Amount of data to be sent
1105
  * @retval HAL status
1106
  */
1107
HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
1108
{
1109
  if(hi2c->State == HAL_I2C_STATE_READY)
1110
  {
1111
    if((pData == NULL) || (Size == 0))
1112
    {
1113
      return  HAL_ERROR;
1114
    }
1115
 
1116
    /* Wait until BUSY flag is reset */
1117
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
1118
    {
1119
      return HAL_BUSY;
1120
    }
1121
 
1122
    /* Process Locked */
1123
    __HAL_LOCK(hi2c);
1124
 
1125
    /* Disable Pos */
1126
    CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
1127
 
1128
    hi2c->State = HAL_I2C_STATE_BUSY_RX;
1129
    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1130
 
1131
    hi2c->pBuffPtr = pData;
1132
    hi2c->XferSize = Size;
1133
    hi2c->XferCount = Size;
1134
 
1135
    /* Send Slave Address */
1136
    if(I2C_MasterRequestRead(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
1137
    {
1138
      if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1139
      {
1140
        /* Process Unlocked */
1141
        __HAL_UNLOCK(hi2c);
1142
        return HAL_ERROR;
1143
      }
1144
      else
1145
      {
1146
        /* Process Unlocked */
1147
        __HAL_UNLOCK(hi2c);
1148
        return HAL_TIMEOUT;
1149
      }
1150
    }
1151
 
1152
    if(hi2c->XferCount == 1)
1153
    {
1154
      /* Disable Acknowledge */
1155
      CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1156
 
1157
      /* Clear ADDR flag */
1158
      __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1159
 
1160
      /* Generate Stop */
1161
      SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
1162
    }
1163
    else if(hi2c->XferCount == 2)
1164
    {
1165
      /* Disable Acknowledge */
1166
      CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1167
 
1168
      /* Enable Pos */
1169
      SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
1170
 
1171
      /* Clear ADDR flag */
1172
      __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1173
    }
1174
    else
1175
    {
1176
      /* Enable Acknowledge */
1177
      SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1178
 
1179
      /* Clear ADDR flag */
1180
      __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1181
    }
1182
 
1183
    /* Process Unlocked */
1184
    __HAL_UNLOCK(hi2c);
1185
 
1186
    /* Note : The I2C interrupts must be enabled after unlocking current process
1187
              to avoid the risk of I2C interrupt handle execution before current
1188
              process unlock */
1189
 
1190
    /* Enable EVT, BUF and ERR interrupt */
1191
    __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1192
 
1193
    return HAL_OK;
1194
  }
1195
  else
1196
  {
1197
    return HAL_BUSY;
1198
  }
1199
}
1200
 
1201
/**
1202
  * @brief  Transmit in slave mode an amount of data in no-blocking mode with Interrupt
1203
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
1204
  *                the configuration information for the specified I2C.
1205
  * @param  pData: Pointer to data buffer
1206
  * @param  Size: Amount of data to be sent
1207
  * @retval HAL status
1208
  */
1209
HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
1210
{
1211
  if(hi2c->State == HAL_I2C_STATE_READY)
1212
  {
1213
    if((pData == NULL) || (Size == 0))
1214
    {
1215
      return  HAL_ERROR;
1216
    }
1217
 
1218
    /* Wait until BUSY flag is reset */
1219
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
1220
    {
1221
      return HAL_BUSY;
1222
    }
1223
 
1224
    /* Process Locked */
1225
    __HAL_LOCK(hi2c);
1226
 
1227
    /* Disable Pos */
1228
    CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
1229
 
1230
    hi2c->State = HAL_I2C_STATE_BUSY_TX;
1231
    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1232
 
1233
    hi2c->pBuffPtr = pData;
1234
    hi2c->XferSize = Size;
1235
    hi2c->XferCount = Size;
1236
 
1237
    /* Enable Address Acknowledge */
1238
    SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1239
 
1240
    /* Process Unlocked */
1241
    __HAL_UNLOCK(hi2c);
1242
 
1243
    /* Note : The I2C interrupts must be enabled after unlocking current process
1244
              to avoid the risk of I2C interrupt handle execution before current
1245
              process unlock */
1246
 
1247
    /* Enable EVT, BUF and ERR interrupt */
1248
    __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1249
 
1250
    return HAL_OK;
1251
  }
1252
  else
1253
  {
1254
    return HAL_BUSY;
1255
  }
1256
}
1257
 
1258
/**
1259
  * @brief  Receive in slave mode an amount of data in no-blocking mode with Interrupt
1260
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
1261
  *                the configuration information for the specified I2C.
1262
  * @param  pData: Pointer to data buffer
1263
  * @param  Size: Amount of data to be sent
1264
  * @retval HAL status
1265
  */
1266
HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
1267
{
1268
  if(hi2c->State == HAL_I2C_STATE_READY)
1269
  {
1270
    if((pData == NULL) || (Size == 0))
1271
    {
1272
      return  HAL_ERROR;
1273
    }
1274
 
1275
    /* Wait until BUSY flag is reset */
1276
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
1277
    {
1278
      return HAL_BUSY;
1279
    }
1280
 
1281
    /* Process Locked */
1282
    __HAL_LOCK(hi2c);
1283
 
1284
    /* Disable Pos */
1285
    CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
1286
 
1287
    hi2c->State = HAL_I2C_STATE_BUSY_RX;
1288
    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1289
 
1290
    hi2c->pBuffPtr = pData;
1291
    hi2c->XferSize = Size;
1292
    hi2c->XferCount = Size;
1293
 
1294
    /* Enable Address Acknowledge */
1295
    SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1296
 
1297
    /* Process Unlocked */
1298
    __HAL_UNLOCK(hi2c);
1299
 
1300
    /* Note : The I2C interrupts must be enabled after unlocking current process
1301
              to avoid the risk of I2C interrupt handle execution before current
1302
              process unlock */
1303
 
1304
    /* Enable EVT, BUF and ERR interrupt */
1305
    __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1306
 
1307
    return HAL_OK;
1308
  }
1309
  else
1310
  {
1311
    return HAL_BUSY;
1312
  }
1313
}
1314
 
1315
 
1316
/**
1317
  * @brief  Transmit in master mode an amount of data in no-blocking mode with DMA
1318
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
1319
  *                the configuration information for the specified I2C.
1320
  * @param  DevAddress: Target device address
1321
  * @param  pData: Pointer to data buffer
1322
  * @param  Size: Amount of data to be sent
1323
  * @retval HAL status
1324
  */
1325
HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
1326
{
1327
  if(hi2c->State == HAL_I2C_STATE_READY)
1328
  {
1329
    if((pData == NULL) || (Size == 0))
1330
    {
1331
      return  HAL_ERROR;
1332
    }
1333
 
1334
    /* Wait until BUSY flag is reset */
1335
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
1336
    {
1337
      return HAL_BUSY;
1338
    }
1339
 
1340
    /* Process Locked */
1341
    __HAL_LOCK(hi2c);
1342
 
1343
    /* Disable Pos */
1344
    CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
1345
 
1346
    hi2c->State = HAL_I2C_STATE_BUSY_TX;
1347
    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1348
 
1349
    hi2c->pBuffPtr = pData;
1350
    hi2c->XferSize = Size;
1351
    hi2c->XferCount = Size;
1352
 
1353
    /* Set the I2C DMA transfert complete callback */
1354
    hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt;
1355
 
1356
    /* Set the DMA error callback */
1357
    hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
1358
 
1359
    /* Enable the DMA channel */
1360
    HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
1361
 
1362
    /* Send Slave Address */
1363
    if(I2C_MasterRequestWrite(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
1364
    {
1365
      if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1366
      {
1367
        /* Process Unlocked */
1368
        __HAL_UNLOCK(hi2c);
1369
        return HAL_ERROR;
1370
      }
1371
      else
1372
      {
1373
        /* Process Unlocked */
1374
        __HAL_UNLOCK(hi2c);
1375
        return HAL_TIMEOUT;
1376
      }
1377
    }
1378
 
1379
    /* Enable DMA Request */
1380
    SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
1381
 
1382
    /* Clear ADDR flag */
1383
    __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1384
 
1385
    /* Process Unlocked */
1386
    __HAL_UNLOCK(hi2c);
1387
 
1388
    return HAL_OK;
1389
  }
1390
  else
1391
  {
1392
    return HAL_BUSY;
1393
  }
1394
}
1395
 
1396
/**
1397
  * @brief  Receive in master mode an amount of data in no-blocking mode with DMA
1398
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
1399
  *                the configuration information for the specified I2C.
1400
  * @param  DevAddress: Target device address
1401
  * @param  pData: Pointer to data buffer
1402
  * @param  Size: Amount of data to be sent
1403
  * @retval HAL status
1404
  */
1405
HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
1406
{
1407
  if(hi2c->State == HAL_I2C_STATE_READY)
1408
  {
1409
    if((pData == NULL) || (Size == 0))
1410
    {
1411
      return  HAL_ERROR;
1412
    }
1413
 
1414
    /* Wait until BUSY flag is reset */
1415
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
1416
    {
1417
      return HAL_BUSY;
1418
    }
1419
 
1420
    /* Process Locked */
1421
    __HAL_LOCK(hi2c);
1422
 
1423
    /* Disable Pos */
1424
    CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
1425
 
1426
    hi2c->State = HAL_I2C_STATE_BUSY_RX;
1427
    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1428
 
1429
    hi2c->pBuffPtr = pData;
1430
    hi2c->XferSize = Size;
1431
    hi2c->XferCount = Size;
1432
 
1433
    /* Set the I2C DMA transfert complete callback */
1434
    hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt;
1435
 
1436
    /* Set the DMA error callback */
1437
    hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
1438
 
1439
    /* Enable the DMA channel */
1440
    HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
1441
 
1442
    /* Send Slave Address */
1443
    if(I2C_MasterRequestRead(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
1444
    {
1445
      if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1446
      {
1447
        /* Process Unlocked */
1448
        __HAL_UNLOCK(hi2c);
1449
        return HAL_ERROR;
1450
      }
1451
      else
1452
      {
1453
        /* Process Unlocked */
1454
        __HAL_UNLOCK(hi2c);
1455
        return HAL_TIMEOUT;
1456
      }
1457
    }
1458
 
1459
    if(Size == 1)
1460
    {
1461
      /* Disable Acknowledge */
1462
      CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1463
    }
1464
    else
1465
    {
1466
      /* Enable Last DMA bit */
1467
      SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
1468
    }
1469
 
1470
    /* Enable DMA Request */
1471
    SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
1472
 
1473
    /* Clear ADDR flag */
1474
    __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1475
 
1476
    /* Process Unlocked */
1477
    __HAL_UNLOCK(hi2c);
1478
 
1479
    return HAL_OK;
1480
  }
1481
  else
1482
  {
1483
    return HAL_BUSY;
1484
  }
1485
}
1486
 
1487
/**
1488
  * @brief  Transmit in slave mode an amount of data in no-blocking mode with DMA
1489
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
1490
  *                the configuration information for the specified I2C.
1491
  * @param  pData: Pointer to data buffer
1492
  * @param  Size: Amount of data to be sent
1493
  * @retval HAL status
1494
  */
1495
HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
1496
{
1497
  if(hi2c->State == HAL_I2C_STATE_READY)
1498
  {
1499
    if((pData == NULL) || (Size == 0))
1500
    {
1501
      return  HAL_ERROR;
1502
    }
1503
 
1504
    /* Wait until BUSY flag is reset */
1505
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
1506
    {
1507
      return HAL_BUSY;
1508
    }
1509
 
1510
    /* Process Locked */
1511
    __HAL_LOCK(hi2c);
1512
 
1513
    /* Disable Pos */
1514
    CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
1515
 
1516
    hi2c->State = HAL_I2C_STATE_BUSY_TX;
1517
    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1518
 
1519
    hi2c->pBuffPtr = pData;
1520
    hi2c->XferSize = Size;
1521
    hi2c->XferCount = Size;
1522
 
1523
    /* Set the I2C DMA transfert complete callback */
1524
    hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt;
1525
 
1526
    /* Set the DMA error callback */
1527
    hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
1528
 
1529
    /* Enable the DMA channel */
1530
    HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
1531
 
1532
    /* Enable DMA Request */
1533
    SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
1534
 
1535
    /* Enable Address Acknowledge */
1536
    SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1537
 
1538
    /* Wait until ADDR flag is set */
1539
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK)
1540
    {
1541
      return HAL_TIMEOUT;
1542
    }
1543
 
1544
    /* If 7bit addressing mode is selected */
1545
    if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
1546
    {
1547
      /* Clear ADDR flag */
1548
      __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1549
    }
1550
    else
1551
    {
1552
      /* Clear ADDR flag */
1553
      __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1554
 
1555
      /* Wait until ADDR flag is set */
1556
      if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK)
1557
      {
1558
        return HAL_TIMEOUT;
1559
      }
1560
 
1561
      /* Clear ADDR flag */
1562
      __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1563
    }
1564
 
1565
    /* Process Unlocked */
1566
    __HAL_UNLOCK(hi2c);
1567
 
1568
    return HAL_OK;
1569
  }
1570
  else
1571
  {
1572
    return HAL_BUSY;
1573
  }
1574
}
1575
 
1576
/**
1577
  * @brief  Receive in slave mode an amount of data in no-blocking mode with DMA
1578
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
1579
  *                the configuration information for the specified I2C.
1580
  * @param  pData: Pointer to data buffer
1581
  * @param  Size: Amount of data to be sent
1582
  * @retval HAL status
1583
  */
1584
HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
1585
{
1586
  if(hi2c->State == HAL_I2C_STATE_READY)
1587
  {
1588
    if((pData == NULL) || (Size == 0))
1589
    {
1590
      return  HAL_ERROR;
1591
    }
1592
 
1593
    /* Wait until BUSY flag is reset */
1594
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
1595
    {
1596
      return HAL_BUSY;
1597
    }
1598
 
1599
    /* Process Locked */
1600
    __HAL_LOCK(hi2c);
1601
 
1602
    /* Disable Pos */
1603
    CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
1604
 
1605
    hi2c->State = HAL_I2C_STATE_BUSY_RX;
1606
    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1607
 
1608
    hi2c->pBuffPtr = pData;
1609
    hi2c->XferSize = Size;
1610
    hi2c->XferCount = Size;
1611
 
1612
    /* Set the I2C DMA transfert complete callback */
1613
    hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt;
1614
 
1615
    /* Set the DMA error callback */
1616
    hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
1617
 
1618
    /* Enable the DMA channel */
1619
    HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
1620
 
1621
    /* Enable DMA Request */
1622
    SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
1623
 
1624
    /* Enable Address Acknowledge */
1625
    SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1626
 
1627
    /* Wait until ADDR flag is set */
1628
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK)
1629
    {
1630
      return HAL_TIMEOUT;
1631
    }
1632
 
1633
    /* Clear ADDR flag */
1634
    __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1635
 
1636
    /* Process Unlocked */
1637
    __HAL_UNLOCK(hi2c);
1638
 
1639
    return HAL_OK;
1640
  }
1641
  else
1642
  {
1643
    return HAL_BUSY;
1644
  }
1645
}
1646
 
1647
 
1648
/**
1649
  * @brief  Write an amount of data in blocking mode to a specific memory address
1650
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
1651
  *                the configuration information for the specified I2C.
1652
  * @param  DevAddress: Target device address
1653
  * @param  MemAddress: Internal memory address
1654
  * @param  MemAddSize: Size of internal memory address
1655
  * @param  pData: Pointer to data buffer
1656
  * @param  Size: Amount of data to be sent
1657
  * @param  Timeout: Timeout duration
1658
  * @retval HAL status
1659
  */
1660
HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
1661
{
1662
  /* Check the parameters */
1663
  assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
1664
 
1665
  if(hi2c->State == HAL_I2C_STATE_READY)
1666
  {
1667
    if((pData == NULL) || (Size == 0))
1668
    {
1669
      return  HAL_ERROR;
1670
    }
1671
 
1672
    /* Wait until BUSY flag is reset */
1673
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
1674
    {
1675
      return HAL_BUSY;
1676
    }
1677
 
1678
    /* Process Locked */
1679
    __HAL_LOCK(hi2c);
1680
 
1681
    /* Disable Pos */
1682
    CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
1683
 
1684
    hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
1685
    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1686
 
1687
    /* Send Slave Address and Memory Address */
1688
    if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK)
1689
    {
1690
      if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1691
      {
1692
        /* Process Unlocked */
1693
        __HAL_UNLOCK(hi2c);
1694
        return HAL_ERROR;
1695
      }
1696
      else
1697
      {
1698
        /* Process Unlocked */
1699
        __HAL_UNLOCK(hi2c);
1700
        return HAL_TIMEOUT;
1701
      }
1702
    }
1703
 
1704
    while(Size > 0)
1705
    {
1706
      /* Wait until TXE flag is set */
1707
      if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
1708
      {
1709
        return HAL_TIMEOUT;
1710
      }
1711
 
1712
      /* Write data to DR */
1713
      hi2c->Instance->DR = (*pData++);
1714
      Size--;
1715
 
1716
      if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
1717
      {
1718
        /* Write data to DR */
1719
        hi2c->Instance->DR = (*pData++);
1720
        Size--;
1721
      }
1722
    }
1723
 
1724
    /* Wait until TXE flag is set */
1725
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
1726
    {
1727
      return HAL_TIMEOUT;
1728
    }
1729
 
1730
    /* Generate Stop */
1731
    SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
1732
 
1733
    hi2c->State = HAL_I2C_STATE_READY;
1734
 
1735
    /* Process Unlocked */
1736
    __HAL_UNLOCK(hi2c);
1737
 
1738
    return HAL_OK;
1739
  }
1740
  else
1741
  {
1742
    return HAL_BUSY;
1743
  }
1744
}
1745
 
1746
/**
1747
  * @brief  Read an amount of data in blocking mode from a specific memory address
1748
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
1749
  *                the configuration information for the specified I2C.
1750
  * @param  DevAddress: Target device address
1751
  * @param  MemAddress: Internal memory address
1752
  * @param  MemAddSize: Size of internal memory address
1753
  * @param  pData: Pointer to data buffer
1754
  * @param  Size: Amount of data to be sent
1755
  * @param  Timeout: Timeout duration
1756
  * @retval HAL status
1757
  */
1758
HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
1759
{
1760
  /* Check the parameters */
1761
  assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
1762
 
1763
  if(hi2c->State == HAL_I2C_STATE_READY)
1764
  {
1765
    if((pData == NULL) || (Size == 0))
1766
    {
1767
      return  HAL_ERROR;
1768
    }
1769
 
1770
    /* Wait until BUSY flag is reset */
1771
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
1772
    {
1773
      return HAL_BUSY;
1774
    }
1775
 
1776
    /* Process Locked */
1777
    __HAL_LOCK(hi2c);
1778
 
1779
    /* Disable Pos */
1780
    CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
1781
 
1782
    hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
1783
    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1784
 
1785
    /* Send Slave Address and Memory Address */
1786
    if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK)
1787
    {
1788
      if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1789
      {
1790
        /* Process Unlocked */
1791
        __HAL_UNLOCK(hi2c);
1792
        return HAL_ERROR;
1793
      }
1794
      else
1795
      {
1796
        /* Process Unlocked */
1797
        __HAL_UNLOCK(hi2c);
1798
        return HAL_TIMEOUT;
1799
      }
1800
    }
1801
 
1802
    if(Size == 1)
1803
    {
1804
      /* Disable Acknowledge */
1805
      CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1806
 
1807
      /* Clear ADDR flag */
1808
      __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1809
 
1810
      /* Generate Stop */
1811
      SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
1812
    }
1813
    else if(Size == 2)
1814
    {
1815
      /* Disable Acknowledge */
1816
      CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1817
 
1818
      /* Enable Pos */
1819
      SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
1820
 
1821
      /* Clear ADDR flag */
1822
      __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1823
    }
1824
    else
1825
    {
1826
      /* Clear ADDR flag */
1827
      __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1828
    }
1829
 
1830
    while(Size > 0)
1831
    {
1832
      if(Size <= 3)
1833
      {
1834
        /* One byte */
1835
        if(Size== 1)
1836
        {
1837
          /* Wait until RXNE flag is set */
1838
          if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
1839
          {
1840
            return HAL_TIMEOUT;
1841
          }
1842
 
1843
          /* Read data from DR */
1844
          (*pData++) = hi2c->Instance->DR;
1845
          Size--;
1846
        }
1847
        /* Two bytes */
1848
        else if(Size == 2)
1849
        {
1850
          /* Wait until BTF flag is set */
1851
          if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
1852
          {
1853
            return HAL_TIMEOUT;
1854
          }
1855
 
1856
          /* Generate Stop */
1857
          SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
1858
 
1859
          /* Read data from DR */
1860
          (*pData++) = hi2c->Instance->DR;
1861
          Size--;
1862
 
1863
          /* Read data from DR */
1864
          (*pData++) = hi2c->Instance->DR;
1865
          Size--;
1866
        }
1867
        /* 3 Last bytes */
1868
        else
1869
        {
1870
          /* Wait until BTF flag is set */
1871
          if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
1872
          {
1873
            return HAL_TIMEOUT;
1874
          }
1875
 
1876
          /* Disable Acknowledge */
1877
          CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
1878
 
1879
          /* Read data from DR */
1880
          (*pData++) = hi2c->Instance->DR;
1881
          Size--;
1882
 
1883
          /* Wait until BTF flag is set */
1884
          if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
1885
          {
1886
            return HAL_TIMEOUT;
1887
          }
1888
 
1889
          /* Generate Stop */
1890
          SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
1891
 
1892
          /* Read data from DR */
1893
          (*pData++) = hi2c->Instance->DR;
1894
          Size--;
1895
 
1896
          /* Read data from DR */
1897
          (*pData++) = hi2c->Instance->DR;
1898
          Size--;
1899
        }
1900
      }
1901
      else
1902
      {
1903
        /* Wait until RXNE flag is set */
1904
        if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
1905
        {
1906
          return HAL_TIMEOUT;
1907
        }
1908
 
1909
        /* Read data from DR */
1910
        (*pData++) = hi2c->Instance->DR;
1911
        Size--;
1912
 
1913
        if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
1914
        {
1915
          /* Read data from DR */
1916
          (*pData++) = hi2c->Instance->DR;
1917
          Size--;
1918
        }
1919
      }
1920
    }
1921
 
1922
    hi2c->State = HAL_I2C_STATE_READY;
1923
 
1924
    /* Process Unlocked */
1925
    __HAL_UNLOCK(hi2c);
1926
 
1927
    return HAL_OK;
1928
  }
1929
  else
1930
  {
1931
    return HAL_BUSY;
1932
  }
1933
}
1934
 
1935
 
1936
/**
1937
  * @brief  Write an amount of data in no-blocking mode with Interrupt to a specific memory address
1938
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
1939
  *                the configuration information for the specified I2C.
1940
  * @param  DevAddress: Target device address
1941
  * @param  MemAddress: Internal memory address
1942
  * @param  MemAddSize: Size of internal memory address
1943
  * @param  pData: Pointer to data buffer
1944
  * @param  Size: Amount of data to be sent
1945
  * @retval HAL status
1946
  */
1947
HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
1948
{
1949
  /* Check the parameters */
1950
  assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
1951
 
1952
  if(hi2c->State == HAL_I2C_STATE_READY)
1953
  {
1954
    if((pData == NULL) || (Size == 0))
1955
    {
1956
      return  HAL_ERROR;
1957
    }
1958
 
1959
    /* Wait until BUSY flag is reset */
1960
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
1961
    {
1962
      return HAL_BUSY;
1963
    }
1964
 
1965
    /* Process Locked */
1966
    __HAL_LOCK(hi2c);
1967
 
1968
    /* Disable Pos */
1969
    CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
1970
 
1971
    hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
1972
    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1973
 
1974
    hi2c->pBuffPtr = pData;
1975
    hi2c->XferSize = Size;
1976
    hi2c->XferCount = Size;
1977
 
1978
    /* Send Slave Address and Memory Address */
1979
    if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
1980
    {
1981
      if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1982
      {
1983
        /* Process Unlocked */
1984
        __HAL_UNLOCK(hi2c);
1985
        return HAL_ERROR;
1986
      }
1987
      else
1988
      {
1989
        /* Process Unlocked */
1990
        __HAL_UNLOCK(hi2c);
1991
        return HAL_TIMEOUT;
1992
      }
1993
    }
1994
 
1995
    /* Process Unlocked */
1996
    __HAL_UNLOCK(hi2c);
1997
 
1998
    /* Note : The I2C interrupts must be enabled after unlocking current process
1999
              to avoid the risk of I2C interrupt handle execution before current
2000
              process unlock */
2001
 
2002
    /* Enable EVT, BUF and ERR interrupt */
2003
    __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2004
 
2005
    return HAL_OK;
2006
  }
2007
  else
2008
  {
2009
    return HAL_BUSY;
2010
  }
2011
}
2012
 
2013
/**
2014
  * @brief  Read an amount of data in no-blocking mode with Interrupt from a specific memory address
2015
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2016
  *                the configuration information for the specified I2C.
2017
  * @param  DevAddress: Target device address
2018
  * @param  MemAddress: Internal memory address
2019
  * @param  MemAddSize: Size of internal memory address
2020
  * @param  pData: Pointer to data buffer
2021
  * @param  Size: Amount of data to be sent
2022
  * @retval HAL status
2023
  */
2024
HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
2025
{
2026
  /* Check the parameters */
2027
  assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
2028
 
2029
  if(hi2c->State == HAL_I2C_STATE_READY)
2030
  {
2031
    if((pData == NULL) || (Size == 0))
2032
    {
2033
      return  HAL_ERROR;
2034
    }
2035
 
2036
    /* Wait until BUSY flag is reset */
2037
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
2038
    {
2039
      return HAL_BUSY;
2040
    }
2041
 
2042
    /* Process Locked */
2043
    __HAL_LOCK(hi2c);
2044
 
2045
    /* Disable Pos */
2046
    CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
2047
 
2048
    hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
2049
    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
2050
 
2051
    hi2c->pBuffPtr = pData;
2052
    hi2c->XferSize = Size;
2053
    hi2c->XferCount = Size;
2054
 
2055
    /* Send Slave Address and Memory Address */
2056
    if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
2057
    {
2058
      if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
2059
      {
2060
        /* Process Unlocked */
2061
        __HAL_UNLOCK(hi2c);
2062
        return HAL_ERROR;
2063
      }
2064
      else
2065
      {
2066
        /* Process Unlocked */
2067
        __HAL_UNLOCK(hi2c);
2068
        return HAL_TIMEOUT;
2069
      }
2070
    }
2071
 
2072
    if(hi2c->XferCount == 1)
2073
    {
2074
      /* Disable Acknowledge */
2075
      CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
2076
 
2077
      /* Clear ADDR flag */
2078
      __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
2079
 
2080
      /* Generate Stop */
2081
      SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
2082
    }
2083
    else if(hi2c->XferCount == 2)
2084
    {
2085
      /* Disable Acknowledge */
2086
      CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
2087
 
2088
      /* Enable Pos */
2089
      SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
2090
 
2091
      /* Clear ADDR flag */
2092
      __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
2093
    }
2094
    else
2095
    {
2096
      /* Enable Acknowledge */
2097
      SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
2098
 
2099
      /* Clear ADDR flag */
2100
      __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
2101
    }
2102
 
2103
    /* Process Unlocked */
2104
    __HAL_UNLOCK(hi2c);
2105
 
2106
    /* Note : The I2C interrupts must be enabled after unlocking current process
2107
              to avoid the risk of I2C interrupt handle execution before current
2108
              process unlock */
2109
 
2110
    /* Enable EVT, BUF and ERR interrupt */
2111
    __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2112
 
2113
    return HAL_OK;
2114
  }
2115
  else
2116
  {
2117
    return HAL_BUSY;
2118
  }
2119
}
2120
 
2121
 
2122
/**
2123
  * @brief  Write an amount of data in no-blocking mode with DMA to a specific memory address
2124
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2125
  *                the configuration information for the specified I2C.
2126
  * @param  DevAddress: Target device address
2127
  * @param  MemAddress: Internal memory address
2128
  * @param  MemAddSize: Size of internal memory address
2129
  * @param  pData: Pointer to data buffer
2130
  * @param  Size: Amount of data to be sent
2131
  * @retval HAL status
2132
  */
2133
HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
2134
{
2135
  /* Check the parameters */
2136
  assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
2137
 
2138
  if(hi2c->State == HAL_I2C_STATE_READY)
2139
  {
2140
    if((pData == NULL) || (Size == 0))
2141
    {
2142
      return  HAL_ERROR;
2143
    }
2144
 
2145
    /* Wait until BUSY flag is reset */
2146
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
2147
    {
2148
      return HAL_BUSY;
2149
    }
2150
 
2151
    /* Process Locked */
2152
    __HAL_LOCK(hi2c);
2153
 
2154
    /* Disable Pos */
2155
    CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
2156
 
2157
    hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
2158
    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
2159
 
2160
    hi2c->pBuffPtr = pData;
2161
    hi2c->XferSize = Size;
2162
    hi2c->XferCount = Size;
2163
 
2164
    /* Set the I2C DMA transfert complete callback */
2165
    hi2c->hdmatx->XferCpltCallback = I2C_DMAMemTransmitCplt;
2166
 
2167
    /* Set the DMA error callback */
2168
    hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
2169
 
2170
    /* Enable the DMA channel */
2171
    HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
2172
 
2173
    /* Send Slave Address and Memory Address */
2174
    if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
2175
    {
2176
      if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
2177
      {
2178
        /* Process Unlocked */
2179
        __HAL_UNLOCK(hi2c);
2180
        return HAL_ERROR;
2181
      }
2182
      else
2183
      {
2184
        /* Process Unlocked */
2185
        __HAL_UNLOCK(hi2c);
2186
        return HAL_TIMEOUT;
2187
      }
2188
    }
2189
 
2190
    /* Enable DMA Request */
2191
    SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
2192
 
2193
    /* Process Unlocked */
2194
    __HAL_UNLOCK(hi2c);
2195
 
2196
    return HAL_OK;
2197
  }
2198
  else
2199
  {
2200
    return HAL_BUSY;
2201
  }
2202
}
2203
 
2204
/**
2205
  * @brief  Reads an amount of data in no-blocking mode with DMA from a specific memory address.
2206
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2207
  *                the configuration information for the specified I2C.
2208
  * @param  DevAddress: Target device address
2209
  * @param  MemAddress: Internal memory address
2210
  * @param  MemAddSize: Size of internal memory address
2211
  * @param  pData: Pointer to data buffer
2212
  * @param  Size: Amount of data to be read
2213
  * @retval HAL status
2214
  */
2215
HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
2216
{
2217
  /* Check the parameters */
2218
  assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
2219
 
2220
  if(hi2c->State == HAL_I2C_STATE_READY)
2221
  {
2222
    if((pData == NULL) || (Size == 0))
2223
    {
2224
      return  HAL_ERROR;
2225
    }
2226
 
2227
    /* Wait until BUSY flag is reset */
2228
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
2229
    {
2230
      return HAL_BUSY;
2231
    }
2232
 
2233
    /* Process Locked */
2234
    __HAL_LOCK(hi2c);
2235
 
2236
    /* Disable Pos */
2237
    CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
2238
 
2239
    hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
2240
    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
2241
 
2242
    hi2c->pBuffPtr = pData;
2243
    hi2c->XferSize = Size;
2244
    hi2c->XferCount = Size;
2245
 
2246
    /* Set the I2C DMA transfert complete callback */
2247
    hi2c->hdmarx->XferCpltCallback = I2C_DMAMemReceiveCplt;
2248
 
2249
    /* Set the DMA error callback */
2250
    hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
2251
 
2252
    /* Enable the DMA channel */
2253
    HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
2254
 
2255
    /* Send Slave Address and Memory Address */
2256
    if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
2257
    {
2258
      if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
2259
      {
2260
        /* Process Unlocked */
2261
        __HAL_UNLOCK(hi2c);
2262
        return HAL_ERROR;
2263
      }
2264
      else
2265
      {
2266
        /* Process Unlocked */
2267
        __HAL_UNLOCK(hi2c);
2268
        return HAL_TIMEOUT;
2269
      }
2270
    }
2271
 
2272
    if(Size == 1)
2273
    {
2274
      /* Disable Acknowledge */
2275
      CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
2276
    }
2277
    else
2278
    {
2279
      /* Enable Last DMA bit */
2280
      SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
2281
    }
2282
 
2283
    /* Enable DMA Request */
2284
    SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
2285
 
2286
    /* Clear ADDR flag */
2287
    __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
2288
 
2289
    /* Process Unlocked */
2290
    __HAL_UNLOCK(hi2c);
2291
 
2292
    return HAL_OK;
2293
  }
2294
  else
2295
  {
2296
    return HAL_BUSY;
2297
  }
2298
}
2299
 
2300
 
2301
/**
2302
  * @brief  Checks if target device is ready for communication.
2303
  * @note   This function is used with Memory devices
2304
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2305
  *                the configuration information for the specified I2C.
2306
  * @param  DevAddress: Target device address
2307
  * @param  Trials: Number of trials
2308
  * @param  Timeout: Timeout duration
2309
  * @retval HAL status
2310
  */
2311
HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
2312
{
2313
  uint32_t tickstart = 0, tmp1 = 0, tmp2 = 0, tmp3 = 0, I2C_Trials = 1;
2314
 
2315
  if(hi2c->State == HAL_I2C_STATE_READY)
2316
  {
2317
    /* Wait until BUSY flag is reset */
2318
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
2319
    {
2320
      return HAL_BUSY;
2321
    }
2322
 
2323
    /* Process Locked */
2324
    __HAL_LOCK(hi2c);
2325
 
2326
    /* Disable Pos */
2327
    CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
2328
 
2329
    hi2c->State = HAL_I2C_STATE_BUSY;
2330
    hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
2331
 
2332
    do
2333
    {
2334
      /* Generate Start */
2335
      SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
2336
 
2337
      /* Wait until SB flag is set */
2338
      if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
2339
      {
2340
        return HAL_TIMEOUT;
2341
      }
2342
 
2343
      /* Send slave address */
2344
      hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
2345
 
2346
      /* Wait until ADDR or AF flag are set */
2347
      /* Get tick */
2348
      tickstart = HAL_GetTick();
2349
 
2350
      tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
2351
      tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
2352
      tmp3 = hi2c->State;
2353
      while((tmp1 == RESET) && (tmp2 == RESET) && (tmp3 != HAL_I2C_STATE_TIMEOUT))
2354
      {
2355
        if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
2356
        {
2357
          hi2c->State = HAL_I2C_STATE_TIMEOUT;
2358
        }
2359
        tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
2360
        tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
2361
        tmp3 = hi2c->State;
2362
      }
2363
 
2364
      hi2c->State = HAL_I2C_STATE_READY;
2365
 
2366
      /* Check if the ADDR flag has been set */
2367
      if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
2368
      {
2369
        /* Generate Stop */
2370
        SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
2371
 
2372
        /* Clear ADDR Flag */
2373
        __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
2374
 
2375
        /* Wait until BUSY flag is reset */
2376
        if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
2377
        {
2378
          return HAL_TIMEOUT;
2379
        }
2380
 
2381
        hi2c->State = HAL_I2C_STATE_READY;
2382
 
2383
        /* Process Unlocked */
2384
        __HAL_UNLOCK(hi2c);
2385
 
2386
        return HAL_OK;
2387
      }
2388
      else
2389
      {
2390
        /* Generate Stop */
2391
        SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
2392
 
2393
        /* Clear AF Flag */
2394
        __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
2395
 
2396
        /* Wait until BUSY flag is reset */
2397
        if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
2398
        {
2399
          return HAL_TIMEOUT;
2400
        }
2401
      }
2402
    }while(I2C_Trials++ < Trials);
2403
 
2404
    hi2c->State = HAL_I2C_STATE_READY;
2405
 
2406
    /* Process Unlocked */
2407
    __HAL_UNLOCK(hi2c);
2408
 
2409
    return HAL_ERROR;
2410
  }
2411
  else
2412
  {
2413
    return HAL_BUSY;
2414
  }
2415
}
2416
/**
2417
  * @}
2418
  */
2419
 
2420
/** @defgroup I2C_Exported_Functions_Group4 IRQ Handler and Callbacks
2421
 * @{
2422
 */  
2423
 
2424
/**
2425
  * @brief  This function handles I2C event interrupt request.
2426
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2427
  *                the configuration information for the specified I2C.
2428
  * @retval None
2429
  */
2430
void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
2431
{
2432
  uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0, tmp4 = 0;
2433
  /* Master mode selected */
2434
  if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_MSL) == SET)
2435
  {
2436
    /* I2C in mode Transmitter -----------------------------------------------*/
2437
    if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == SET)
2438
    {
2439
      tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE);
2440
      tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF);
2441
      tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF);
2442
      tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT);
2443
      /* TXE set and BTF reset -----------------------------------------------*/
2444
      if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET))
2445
      {
2446
        I2C_MasterTransmit_TXE(hi2c);
2447
      }
2448
      /* BTF set -------------------------------------------------------------*/
2449
      else if((tmp3 == SET) && (tmp4 == SET))
2450
      {
2451
        I2C_MasterTransmit_BTF(hi2c);
2452
      }
2453
    }
2454
    /* I2C in mode Receiver --------------------------------------------------*/
2455
    else
2456
    {
2457
      tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE);
2458
      tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF);
2459
      tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF);
2460
      tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT);
2461
      /* RXNE set and BTF reset -----------------------------------------------*/
2462
      if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET))
2463
      {
2464
        I2C_MasterReceive_RXNE(hi2c);
2465
      }
2466
      /* BTF set -------------------------------------------------------------*/
2467
      else if((tmp3 == SET) && (tmp4 == SET))
2468
      {
2469
        I2C_MasterReceive_BTF(hi2c);
2470
      }
2471
    }
2472
  }
2473
  /* Slave mode selected */
2474
  else
2475
  {
2476
    tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
2477
    tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_EVT));
2478
    tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF);
2479
    tmp4 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA);
2480
    /* ADDR set --------------------------------------------------------------*/
2481
    if((tmp1 == SET) && (tmp2 == SET))
2482
    {
2483
      I2C_Slave_ADDR(hi2c);
2484
    }
2485
    /* STOPF set --------------------------------------------------------------*/
2486
    else if((tmp3 == SET) && (tmp2 == SET))
2487
    {
2488
      I2C_Slave_STOPF(hi2c);
2489
    }
2490
    /* I2C in mode Transmitter -----------------------------------------------*/
2491
    else if(tmp4 == SET)
2492
    {
2493
      tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE);
2494
      tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF);
2495
      tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF);
2496
      tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT);
2497
      /* TXE set and BTF reset -----------------------------------------------*/
2498
      if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET))
2499
      {
2500
        I2C_SlaveTransmit_TXE(hi2c);
2501
      }
2502
      /* BTF set -------------------------------------------------------------*/
2503
      else if((tmp3 == SET) && (tmp4 == SET))
2504
      {
2505
        I2C_SlaveTransmit_BTF(hi2c);
2506
      }
2507
    }
2508
    /* I2C in mode Receiver --------------------------------------------------*/
2509
    else
2510
    {
2511
      tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE);
2512
      tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF);
2513
      tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF);
2514
      tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT);
2515
      /* RXNE set and BTF reset ----------------------------------------------*/
2516
      if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET))
2517
      {
2518
        I2C_SlaveReceive_RXNE(hi2c);
2519
      }
2520
      /* BTF set -------------------------------------------------------------*/
2521
      else if((tmp3 == SET) && (tmp4 == SET))
2522
      {
2523
        I2C_SlaveReceive_BTF(hi2c);
2524
      }
2525
    }
2526
  }
2527
}
2528
 
2529
/**
2530
  * @brief  This function handles I2C error interrupt request.
2531
  * @param  hi2c: pointer to a I2C_HandleTypeDef structure that contains
2532
  *         the configuration information for I2C module
2533
  * @retval HAL status
2534
  */
2535
void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
2536
{
2537
  uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0;
2538
 
2539
  tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BERR);
2540
  tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR);
2541
  /* I2C Bus error interrupt occurred ----------------------------------------*/
2542
  if((tmp1 == SET) && (tmp2 == SET))
2543
  {
2544
    hi2c->ErrorCode |= HAL_I2C_ERROR_BERR;
2545
 
2546
    /* Clear BERR flag */
2547
    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
2548
 
2549
    /* Workaround: Start cannot be generated after a misplaced Stop */
2550
    SET_BIT(hi2c->Instance->CR1, I2C_CR1_SWRST);
2551
  }
2552
 
2553
  tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ARLO);
2554
  tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR);
2555
  /* I2C Arbitration Loss error interrupt occurred ---------------------------*/
2556
  if((tmp1 == SET) && (tmp2 == SET))
2557
  {
2558
    hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO;
2559
 
2560
    /* Clear ARLO flag */
2561
    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
2562
  }
2563
 
2564
  tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
2565
  tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR);
2566
  /* I2C Acknowledge failure error interrupt occurred ------------------------*/
2567
  if((tmp1 == SET) && (tmp2 == SET))
2568
  {
2569
    tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_MSL);
2570
    tmp2 = hi2c->XferCount;
2571
    tmp3 = hi2c->State;
2572
    if((tmp1 == RESET) && (tmp2 == 0) && (tmp3 == HAL_I2C_STATE_BUSY_TX))
2573
    {
2574
      I2C_Slave_AF(hi2c);
2575
    }
2576
    else
2577
    {
2578
      hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
2579
      /* Clear AF flag */
2580
      __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
2581
    }
2582
  }
2583
 
2584
  tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_OVR);
2585
  tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR);
2586
  /* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/
2587
  if((tmp1 == SET) && (tmp2 == SET))
2588
  {
2589
    hi2c->ErrorCode |= HAL_I2C_ERROR_OVR;
2590
    /* Clear OVR flag */
2591
    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
2592
  }
2593
 
2594
  if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
2595
  {
2596
    hi2c->State = HAL_I2C_STATE_READY;
2597
 
2598
    /* Disable Pos bit in I2C CR1 when error occured in Master/Mem Receive IT Process */
2599
    CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
2600
 
2601
    HAL_I2C_ErrorCallback(hi2c);
2602
  }
2603
}
2604
 
2605
/**
2606
  * @brief  Master Tx Transfer completed callbacks.
2607
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2608
  *                the configuration information for the specified I2C.
2609
  * @retval None
2610
  */
2611
 __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
2612
{
2613
  /* NOTE : This function Should not be modified, when the callback is needed,
2614
            the HAL_I2C_TxCpltCallback could be implemented in the user file
2615
   */
2616
}
2617
 
2618
/**
2619
  * @brief  Master Rx Transfer completed callbacks.
2620
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2621
  *                the configuration information for the specified I2C.
2622
  * @retval None
2623
  */
2624
__weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
2625
{
2626
  /* NOTE : This function Should not be modified, when the callback is needed,
2627
            the HAL_I2C_TxCpltCallback could be implemented in the user file
2628
   */
2629
}
2630
 
2631
/** @brief  Slave Tx Transfer completed callbacks.
2632
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2633
  *                the configuration information for the specified I2C.
2634
  * @retval None
2635
  */
2636
 __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
2637
{
2638
  /* NOTE : This function Should not be modified, when the callback is needed,
2639
            the HAL_I2C_TxCpltCallback could be implemented in the user file
2640
   */
2641
}
2642
 
2643
/**
2644
  * @brief  Slave Rx Transfer completed callbacks.
2645
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2646
  *                the configuration information for the specified I2C.
2647
  * @retval None
2648
  */
2649
__weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
2650
{
2651
  /* NOTE : This function Should not be modified, when the callback is needed,
2652
            the HAL_I2C_TxCpltCallback could be implemented in the user file
2653
   */
2654
}
2655
 
2656
/**
2657
  * @brief  Memory Tx Transfer completed callbacks.
2658
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2659
  *                the configuration information for the specified I2C.
2660
  * @retval None
2661
  */
2662
 __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
2663
{
2664
  /* NOTE : This function Should not be modified, when the callback is needed,
2665
            the HAL_I2C_TxCpltCallback could be implemented in the user file
2666
   */
2667
}
2668
 
2669
/**
2670
  * @brief  Memory Rx Transfer completed callbacks.
2671
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2672
  *                the configuration information for the specified I2C.
2673
  * @retval None
2674
  */
2675
__weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
2676
{
2677
  /* NOTE : This function Should not be modified, when the callback is needed,
2678
            the HAL_I2C_TxCpltCallback could be implemented in the user file
2679
   */
2680
}
2681
 
2682
/**
2683
  * @brief  I2C error callbacks.
2684
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2685
  *                the configuration information for the specified I2C.
2686
  * @retval None
2687
  */
2688
 __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
2689
{
2690
  /* NOTE : This function Should not be modified, when the callback is needed,
2691
            the HAL_I2C_ErrorCallback could be implemented in the user file
2692
   */
2693
}
2694
 
2695
/**
2696
  * @}
2697
  */
2698
 
2699
 
2700
/** @defgroup I2C_Exported_Functions_Group3 Peripheral State and Errors functions
2701
 *  @brief   Peripheral State and Errors functions
2702
 *
2703
@verbatim
2704
 ===============================================================================
2705
            ##### Peripheral State and Errors functions #####
2706
 ===============================================================================
2707
    [..]
2708
    This subsection permits to get in run-time the status of the peripheral
2709
    and the data flow.
2710
 
2711
@endverbatim
2712
  * @{
2713
  */
2714
 
2715
/**
2716
  * @brief  Returns the I2C state.
2717
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2718
  *                the configuration information for the specified I2C.
2719
  * @retval HAL state
2720
  */
2721
HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
2722
{
2723
  return hi2c->State;
2724
}
2725
 
2726
/**
2727
  * @brief  Return the I2C error code
2728
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2729
  *                the configuration information for the specified I2C.
2730
* @retval I2C Error Code
2731
*/
2732
uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
2733
{
2734
  return hi2c->ErrorCode;
2735
}
2736
 
2737
/**
2738
  * @}
2739
  */
2740
 
2741
/**
2742
  * @}
2743
  */
2744
 
2745
/** @addtogroup I2C_Private_Functions
2746
  * @{
2747
  */
2748
 
2749
/**
2750
  * @brief  Handle TXE flag for Master Transmit Mode
2751
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2752
  *                the configuration information for the specified I2C.
2753
  * @retval HAL status
2754
  */
2755
static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c)
2756
{
2757
  /* Write data to DR */
2758
  hi2c->Instance->DR = (*hi2c->pBuffPtr++);
2759
  hi2c->XferCount--;
2760
 
2761
  if(hi2c->XferCount == 0)
2762
  {
2763
    /* Disable BUF interrupt */
2764
    __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
2765
  }
2766
 
2767
  return HAL_OK;
2768
}
2769
 
2770
/**
2771
  * @brief  Handle BTF flag for Master Transmit Mode
2772
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2773
  *                the configuration information for the specified I2C.
2774
  * @retval HAL status
2775
  */
2776
static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
2777
{
2778
  if(hi2c->XferCount != 0)
2779
  {
2780
    /* Write data to DR */
2781
    hi2c->Instance->DR = (*hi2c->pBuffPtr++);
2782
    hi2c->XferCount--;
2783
  }
2784
  else
2785
  {
2786
    /* Disable EVT, BUF and ERR interrupt */
2787
    __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2788
 
2789
    /* Generate Stop */
2790
    SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
2791
 
2792
    if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX)
2793
    {
2794
      hi2c->State = HAL_I2C_STATE_READY;
2795
 
2796
      HAL_I2C_MemTxCpltCallback(hi2c);
2797
    }
2798
    else
2799
    {
2800
      hi2c->State = HAL_I2C_STATE_READY;
2801
 
2802
      HAL_I2C_MasterTxCpltCallback(hi2c);
2803
    }
2804
  }
2805
  return HAL_OK;
2806
}
2807
 
2808
/**
2809
  * @brief  Handle RXNE flag for Master Receive Mode
2810
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2811
  *                the configuration information for the specified I2C.
2812
  * @retval HAL status
2813
  */
2814
static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
2815
{
2816
  uint32_t tmp = 0;
2817
 
2818
  tmp = hi2c->XferCount;
2819
  if(tmp > 3)
2820
  {
2821
    /* Read data from DR */
2822
    (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2823
    hi2c->XferCount--;
2824
  }
2825
  else if((tmp == 2) || (tmp == 3))
2826
  {
2827
    /* Disable BUF interrupt */
2828
    __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
2829
  }
2830
  else
2831
  {
2832
    /* Disable EVT, BUF and ERR interrupt */
2833
    __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2834
 
2835
    /* Read data from DR */
2836
    (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2837
    hi2c->XferCount--;
2838
 
2839
    if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX)
2840
    {
2841
      hi2c->State = HAL_I2C_STATE_READY;
2842
 
2843
      HAL_I2C_MemRxCpltCallback(hi2c);
2844
    }
2845
    else
2846
    {
2847
      hi2c->State = HAL_I2C_STATE_READY;
2848
 
2849
      HAL_I2C_MasterRxCpltCallback(hi2c);
2850
    }
2851
  }
2852
  return HAL_OK;
2853
}
2854
 
2855
/**
2856
  * @brief  Handle BTF flag for Master Receive Mode
2857
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2858
  *                the configuration information for the specified I2C.
2859
  * @retval HAL status
2860
  */
2861
static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
2862
{
2863
  if(hi2c->XferCount == 3)
2864
  {
2865
    /* Disable Acknowledge */
2866
    CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
2867
 
2868
    /* Read data from DR */
2869
    (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2870
    hi2c->XferCount--;
2871
  }
2872
  else if(hi2c->XferCount == 2)
2873
  {
2874
    /* Generate Stop */
2875
    SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
2876
 
2877
    /* Disable EVT and ERR interrupt */
2878
    /* Workaround - Wong data read into data register */
2879
    __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
2880
 
2881
    /* Read data from DR */
2882
    (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2883
    hi2c->XferCount--;
2884
 
2885
    /* Read data from DR */
2886
    (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2887
    hi2c->XferCount--;
2888
 
2889
    if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX)
2890
    {
2891
      hi2c->State = HAL_I2C_STATE_READY;
2892
 
2893
      HAL_I2C_MemRxCpltCallback(hi2c);
2894
    }
2895
    else
2896
    {
2897
      hi2c->State = HAL_I2C_STATE_READY;
2898
 
2899
      HAL_I2C_MasterRxCpltCallback(hi2c);
2900
    }
2901
  }
2902
  else
2903
  {
2904
    /* Read data from DR */
2905
    (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2906
    hi2c->XferCount--;
2907
  }
2908
  return HAL_OK;
2909
}
2910
 
2911
/**
2912
  * @brief  Handle TXE flag for Slave Transmit Mode
2913
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2914
  *                the configuration information for the specified I2C.
2915
  * @retval HAL status
2916
  */
2917
static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c)
2918
{
2919
  if(hi2c->XferCount != 0)
2920
  {
2921
    /* Write data to DR */
2922
    hi2c->Instance->DR = (*hi2c->pBuffPtr++);
2923
    hi2c->XferCount--;
2924
  }
2925
  return HAL_OK;
2926
}
2927
 
2928
/**
2929
  * @brief  Handle BTF flag for Slave Transmit Mode
2930
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2931
  *                the configuration information for the specified I2C.
2932
  * @retval HAL status
2933
  */
2934
static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c)
2935
{
2936
  if(hi2c->XferCount != 0)
2937
  {
2938
    /* Write data to DR */
2939
    hi2c->Instance->DR = (*hi2c->pBuffPtr++);
2940
    hi2c->XferCount--;
2941
  }
2942
  return HAL_OK;
2943
}
2944
 
2945
/**
2946
  * @brief  Handle RXNE flag for Slave Receive Mode
2947
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2948
  *                the configuration information for the specified I2C.
2949
  * @retval HAL status
2950
  */
2951
static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c)
2952
{
2953
  if(hi2c->XferCount != 0)
2954
  {
2955
    /* Read data from DR */
2956
    (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2957
    hi2c->XferCount--;
2958
  }
2959
  return HAL_OK;
2960
}
2961
 
2962
/**
2963
  * @brief  Handle BTF flag for Slave Receive Mode
2964
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2965
  *                the configuration information for the specified I2C.
2966
  * @retval HAL status
2967
  */
2968
static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c)
2969
{
2970
  if(hi2c->XferCount != 0)
2971
  {
2972
    /* Read data from DR */
2973
    (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2974
    hi2c->XferCount--;
2975
  }
2976
  return HAL_OK;
2977
}
2978
 
2979
/**
2980
  * @brief  Handle ADD flag for Slave
2981
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2982
  *                the configuration information for the specified I2C.
2983
  * @retval HAL status
2984
  */
2985
static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c)
2986
{
2987
  /* Clear ADDR flag */
2988
  __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
2989
 
2990
  return HAL_OK;
2991
}
2992
 
2993
/**
2994
  * @brief  Handle STOPF flag for Slave Mode
2995
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
2996
  *                the configuration information for the specified I2C.
2997
  * @retval HAL status
2998
  */
2999
static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c)
3000
{
3001
  /* Disable EVT, BUF and ERR interrupt */
3002
  __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
3003
 
3004
  /* Clear STOPF flag */
3005
  __HAL_I2C_CLEAR_STOPFLAG(hi2c);
3006
 
3007
  /* Disable Acknowledge */
3008
  CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
3009
 
3010
  hi2c->State = HAL_I2C_STATE_READY;
3011
 
3012
  HAL_I2C_SlaveRxCpltCallback(hi2c);
3013
 
3014
  return HAL_OK;
3015
}
3016
 
3017
/**
3018
  * @brief  Handle Acknowledge Failed for Slave Mode
3019
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
3020
  *                the configuration information for the specified I2C.
3021
  * @retval HAL status
3022
  */
3023
static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c)
3024
{
3025
  /* Disable EVT, BUF and ERR interrupt */
3026
  __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
3027
 
3028
  /* Clear AF flag */
3029
  __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
3030
 
3031
  /* Disable Acknowledge */
3032
  CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
3033
 
3034
  hi2c->State = HAL_I2C_STATE_READY;
3035
 
3036
  HAL_I2C_SlaveTxCpltCallback(hi2c);
3037
 
3038
  return HAL_OK;
3039
}
3040
 
3041
/**
3042
  * @brief  Master sends target device address followed by internal memory address for write request.
3043
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
3044
  *                the configuration information for the specified I2C.
3045
  * @param  DevAddress: Target device address
3046
  * @param  Timeout: Timeout duration
3047
  * @retval HAL status
3048
  */
3049
static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout)
3050
{
3051
  /* Generate Start */
3052
  SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
3053
 
3054
  /* Wait until SB flag is set */
3055
  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
3056
  {
3057
    return HAL_TIMEOUT;
3058
  }
3059
 
3060
  if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
3061
  {
3062
    /* Send slave address */
3063
    hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
3064
  }
3065
  else
3066
  {
3067
    /* Send header of slave address */
3068
    hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
3069
 
3070
    /* Wait until ADD10 flag is set */
3071
    if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout) != HAL_OK)
3072
    {
3073
      if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3074
      {
3075
        return HAL_ERROR;
3076
      }
3077
      else
3078
      {
3079
        return HAL_TIMEOUT;
3080
      }
3081
    }
3082
 
3083
    /* Send slave address */
3084
    hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
3085
  }
3086
 
3087
  /* Wait until ADDR flag is set */
3088
  if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
3089
  {
3090
    if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3091
    {
3092
      return HAL_ERROR;
3093
    }
3094
    else
3095
    {
3096
      return HAL_TIMEOUT;
3097
    }
3098
  }
3099
 
3100
  return HAL_OK;
3101
}
3102
 
3103
/**
3104
  * @brief  Master sends target device address followed by internal memory address for read request.
3105
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
3106
  *                the configuration information for the specified I2C.
3107
  * @param  DevAddress: Target device address
3108
  * @param  Timeout: Timeout duration
3109
  * @retval HAL status
3110
  */
3111
static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout)
3112
{
3113
  /* Enable Acknowledge */
3114
  SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
3115
 
3116
  /* Generate Start */
3117
  SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
3118
 
3119
  /* Wait until SB flag is set */
3120
  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
3121
  {
3122
    return HAL_TIMEOUT;
3123
  }
3124
 
3125
  if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
3126
  {
3127
    /* Send slave address */
3128
    hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
3129
  }
3130
  else
3131
  {
3132
    /* Send header of slave address */
3133
    hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
3134
 
3135
    /* Wait until ADD10 flag is set */
3136
    if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout) != HAL_OK)
3137
    {
3138
      if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3139
      {
3140
        return HAL_ERROR;
3141
      }
3142
      else
3143
      {
3144
        return HAL_TIMEOUT;
3145
      }
3146
    }
3147
 
3148
    /* Send slave address */
3149
    hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
3150
 
3151
    /* Wait until ADDR flag is set */
3152
    if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
3153
    {
3154
      if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3155
      {
3156
        return HAL_ERROR;
3157
      }
3158
      else
3159
      {
3160
        return HAL_TIMEOUT;
3161
      }
3162
    }
3163
 
3164
    /* Clear ADDR flag */
3165
    __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
3166
 
3167
    /* Generate Restart */
3168
    SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
3169
 
3170
    /* Wait until SB flag is set */
3171
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
3172
    {
3173
      return HAL_TIMEOUT;
3174
    }
3175
 
3176
    /* Send header of slave address */
3177
    hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress);
3178
  }
3179
 
3180
  /* Wait until ADDR flag is set */
3181
  if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
3182
  {
3183
    if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3184
    {
3185
      return HAL_ERROR;
3186
    }
3187
    else
3188
    {
3189
      return HAL_TIMEOUT;
3190
    }
3191
  }
3192
 
3193
  return HAL_OK;
3194
}
3195
 
3196
/**
3197
  * @brief  Master sends target device address followed by internal memory address for write request.
3198
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
3199
  *                the configuration information for the specified I2C.
3200
  * @param  DevAddress: Target device address
3201
  * @param  MemAddress: Internal memory address
3202
  * @param  MemAddSize: Size of internal memory address
3203
  * @param  Timeout: Timeout duration
3204
  * @retval HAL status
3205
  */
3206
static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout)
3207
{
3208
  /* Generate Start */
3209
  SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
3210
 
3211
  /* Wait until SB flag is set */
3212
  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
3213
  {
3214
    return HAL_TIMEOUT;
3215
  }
3216
 
3217
  /* Send slave address */
3218
  hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
3219
 
3220
  /* Wait until ADDR flag is set */
3221
  if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
3222
  {
3223
    if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3224
    {
3225
      return HAL_ERROR;
3226
    }
3227
    else
3228
    {
3229
      return HAL_TIMEOUT;
3230
    }
3231
  }
3232
 
3233
  /* Clear ADDR flag */
3234
  __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
3235
 
3236
  /* Wait until TXE flag is set */
3237
  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
3238
  {
3239
    return HAL_TIMEOUT;
3240
  }
3241
 
3242
  /* If Memory address size is 8Bit */
3243
  if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
3244
  {
3245
    /* Send Memory Address */
3246
    hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
3247
  }
3248
  /* If Memory address size is 16Bit */
3249
  else
3250
  {
3251
    /* Send MSB of Memory Address */
3252
    hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
3253
 
3254
    /* Wait until TXE flag is set */
3255
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
3256
    {
3257
      return HAL_TIMEOUT;
3258
    }
3259
 
3260
    /* Send LSB of Memory Address */
3261
    hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
3262
  }
3263
 
3264
  return HAL_OK;
3265
}
3266
 
3267
/**
3268
  * @brief  Master sends target device address followed by internal memory address for read request.
3269
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
3270
  *                the configuration information for the specified I2C.
3271
  * @param  DevAddress: Target device address
3272
  * @param  MemAddress: Internal memory address
3273
  * @param  MemAddSize: Size of internal memory address
3274
  * @param  Timeout: Timeout duration
3275
  * @retval HAL status
3276
  */
3277
static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout)
3278
{
3279
  /* Enable Acknowledge */
3280
  SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
3281
 
3282
  /* Generate Start */
3283
  SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
3284
 
3285
  /* Wait until SB flag is set */
3286
  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
3287
  {
3288
    return HAL_TIMEOUT;
3289
  }
3290
 
3291
  /* Send slave address */
3292
  hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
3293
 
3294
  /* Wait until ADDR flag is set */
3295
  if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
3296
  {
3297
    if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3298
    {
3299
      return HAL_ERROR;
3300
    }
3301
    else
3302
    {
3303
      return HAL_TIMEOUT;
3304
    }
3305
  }
3306
 
3307
  /* Clear ADDR flag */
3308
  __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
3309
 
3310
  /* Wait until TXE flag is set */
3311
  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
3312
  {
3313
    return HAL_TIMEOUT;
3314
  }
3315
 
3316
  /* If Memory address size is 8Bit */
3317
  if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
3318
  {
3319
    /* Send Memory Address */
3320
    hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
3321
  }
3322
  /* If Memory address size is 16Bit */
3323
  else
3324
  {
3325
    /* Send MSB of Memory Address */
3326
    hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
3327
 
3328
    /* Wait until TXE flag is set */
3329
    if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
3330
    {
3331
      return HAL_TIMEOUT;
3332
    }
3333
 
3334
    /* Send LSB of Memory Address */
3335
    hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
3336
  }
3337
 
3338
  /* Wait until TXE flag is set */
3339
  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
3340
  {
3341
    return HAL_TIMEOUT;
3342
  }
3343
 
3344
  /* Generate Restart */
3345
  SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
3346
 
3347
  /* Wait until SB flag is set */
3348
  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
3349
  {
3350
    return HAL_TIMEOUT;
3351
  }
3352
 
3353
  /* Send slave address */
3354
  hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
3355
 
3356
  /* Wait until ADDR flag is set */
3357
  if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
3358
  {
3359
    if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3360
    {
3361
      return HAL_ERROR;
3362
    }
3363
    else
3364
    {
3365
      return HAL_TIMEOUT;
3366
    }
3367
  }
3368
 
3369
  return HAL_OK;
3370
}
3371
 
3372
/**
3373
  * @brief  DMA I2C master transmit process complete callback.
3374
  * @param  hdma: DMA handle
3375
  * @retval None
3376
  */
3377
static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma)
3378
{
3379
  I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3380
 
3381
  /* Wait until BTF flag is reset */
3382
  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
3383
  {
3384
    hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3385
  }
3386
 
3387
  /* Generate Stop */
3388
  SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
3389
 
3390
  /* Disable DMA Request */
3391
  CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
3392
 
3393
  hi2c->XferCount = 0;
3394
 
3395
  hi2c->State = HAL_I2C_STATE_READY;
3396
 
3397
  /* Check if Errors has been detected during transfer */
3398
  if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3399
  {
3400
    HAL_I2C_ErrorCallback(hi2c);
3401
  }
3402
  else
3403
  {
3404
    HAL_I2C_MasterTxCpltCallback(hi2c);
3405
  }
3406
}
3407
 
3408
/**
3409
  * @brief  DMA I2C slave transmit process complete callback.
3410
  * @param  hdma: DMA handle
3411
  * @retval None
3412
  */
3413
static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma)
3414
{
3415
  I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3416
 
3417
  /* Wait until AF flag is reset */
3418
  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
3419
  {
3420
    hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3421
  }
3422
 
3423
  /* Clear AF flag */
3424
  __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
3425
 
3426
  /* Disable Address Acknowledge */
3427
  CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
3428
 
3429
  /* Disable DMA Request */
3430
  CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
3431
 
3432
  hi2c->XferCount = 0;
3433
 
3434
  hi2c->State = HAL_I2C_STATE_READY;
3435
 
3436
  /* Check if Errors has been detected during transfer */
3437
  if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3438
  {
3439
    HAL_I2C_ErrorCallback(hi2c);
3440
  }
3441
  else
3442
  {
3443
    HAL_I2C_SlaveTxCpltCallback(hi2c);
3444
  }
3445
}
3446
 
3447
/**
3448
  * @brief  DMA I2C master receive process complete callback
3449
  * @param  hdma: DMA handle
3450
  * @retval None
3451
  */
3452
static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma)
3453
{
3454
  I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3455
 
3456
  /* Disable Acknowledge */
3457
  CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
3458
 
3459
  /* Generate Stop */
3460
  SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
3461
 
3462
  /* Disable Last DMA */
3463
  CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
3464
 
3465
  /* Disable DMA Request */
3466
  CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
3467
 
3468
  hi2c->XferCount = 0;
3469
 
3470
  hi2c->State = HAL_I2C_STATE_READY;
3471
 
3472
  /* Check if Errors has been detected during transfer */
3473
  if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3474
  {
3475
    HAL_I2C_ErrorCallback(hi2c);
3476
  }
3477
  else
3478
  {
3479
    HAL_I2C_MasterRxCpltCallback(hi2c);
3480
  }
3481
}
3482
 
3483
/**
3484
  * @brief  DMA I2C slave receive process complete callback.
3485
  * @param  hdma: DMA handle
3486
  * @retval None
3487
  */
3488
static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma)
3489
{
3490
  I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3491
 
3492
  /* Wait until STOPF flag is reset */
3493
  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
3494
  {
3495
    hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3496
  }
3497
 
3498
  /* Clear STOPF flag */
3499
  __HAL_I2C_CLEAR_STOPFLAG(hi2c);
3500
 
3501
  /* Disable Address Acknowledge */
3502
  CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
3503
 
3504
  /* Disable DMA Request */
3505
  CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
3506
 
3507
  hi2c->XferCount = 0;
3508
 
3509
  hi2c->State = HAL_I2C_STATE_READY;
3510
 
3511
  /* Check if Errors has been detected during transfer */
3512
  if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3513
  {
3514
    HAL_I2C_ErrorCallback(hi2c);
3515
  }
3516
  else
3517
  {
3518
    HAL_I2C_SlaveRxCpltCallback(hi2c);
3519
  }
3520
}
3521
 
3522
/**
3523
  * @brief  DMA I2C Memory Write process complete callback
3524
  * @param  hdma: DMA handle
3525
  * @retval None
3526
  */
3527
static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma)
3528
{
3529
  I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3530
 
3531
  /* Wait until BTF flag is reset */
3532
  if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
3533
  {
3534
    hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3535
  }
3536
 
3537
  /* Generate Stop */
3538
  SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
3539
 
3540
  /* Disable DMA Request */
3541
  CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
3542
 
3543
  hi2c->XferCount = 0;
3544
 
3545
  hi2c->State = HAL_I2C_STATE_READY;
3546
 
3547
  /* Check if Errors has been detected during transfer */
3548
  if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3549
  {
3550
    HAL_I2C_ErrorCallback(hi2c);
3551
  }
3552
  else
3553
  {
3554
    HAL_I2C_MemTxCpltCallback(hi2c);
3555
  }
3556
}
3557
 
3558
/**
3559
  * @brief  DMA I2C Memory Read process complete callback
3560
  * @param  hdma: DMA handle
3561
  * @retval None
3562
  */
3563
static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma)
3564
{
3565
  I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3566
 
3567
  /* Disable Acknowledge */
3568
  CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
3569
 
3570
  /* Generate Stop */
3571
  SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
3572
 
3573
  /* Disable Last DMA */
3574
  CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
3575
 
3576
  /* Disable DMA Request */
3577
  CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
3578
 
3579
  hi2c->XferCount = 0;
3580
 
3581
  hi2c->State = HAL_I2C_STATE_READY;
3582
 
3583
  /* Check if Errors has been detected during transfer */
3584
  if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3585
  {
3586
    HAL_I2C_ErrorCallback(hi2c);
3587
  }
3588
  else
3589
  {
3590
    HAL_I2C_MemRxCpltCallback(hi2c);
3591
  }
3592
}
3593
 
3594
/**
3595
  * @brief  I2C Configuration Speed function
3596
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
3597
  *                the configuration information for the specified I2C.
3598
  * @param  I2CClkSrcFreq: PCLK frequency from RCC.
3599
  * @retval CCR Speed: Speed to set in I2C CCR Register
3600
  */
3601
static uint32_t I2C_Configure_Speed(I2C_HandleTypeDef *hi2c, uint32_t I2CClkSrcFreq)
3602
{
3603
  uint32_t tmp1 = 0;
3604
 
3605
  /* Clock Standard Mode */
3606
  if(hi2c->Init.ClockSpeed <= I2C_STANDARD_MODE_MAX_CLK)
3607
  {
3608
    /* Calculate Value to be set in CCR register */
3609
    tmp1 = (I2CClkSrcFreq/(hi2c->Init.ClockSpeed << 1));
3610
 
3611
    /* The minimum allowed value set in CCR register is 0x04 for Standard Mode */
3612
    if( (tmp1 & I2C_CCR_CCR) < 4 )
3613
    {
3614
      return 4;
3615
    }
3616
    else
3617
    {
3618
      return tmp1;
3619
    }
3620
  }
3621
  else
3622
  {
3623
    /* Clock Fast Mode */
3624
    tmp1 = I2C_CCR_FS;
3625
 
3626
    /* Duty Cylce tLow/tHigh = 2 */
3627
    if(hi2c->Init.DutyCycle == I2C_DUTYCYCLE_2)
3628
    {
3629
      tmp1 |= (I2CClkSrcFreq/(hi2c->Init.ClockSpeed * 3)) | I2C_DUTYCYCLE_2;
3630
    }
3631
    else /* Duty Cylce tLow/tHigh = 16/9 */
3632
    {
3633
      tmp1 |= (I2CClkSrcFreq/(hi2c->Init.ClockSpeed * 25)) | I2C_DUTYCYCLE_16_9;
3634
    }
3635
 
3636
    /* The minimum allowed value set in CCR register is 0x01 for Fast Mode */
3637
    if( (tmp1 & I2C_CCR_CCR) < 1 )
3638
    {
3639
      return 1;
3640
    }
3641
    else
3642
    {
3643
      return tmp1;
3644
    }
3645
  }
3646
}
3647
 
3648
/**
3649
  * @brief  DMA I2C communication error callback.
3650
  * @param  hdma: DMA handle
3651
  * @retval None
3652
  */
3653
static void I2C_DMAError(DMA_HandleTypeDef *hdma)
3654
{
3655
  I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3656
 
3657
  /* Disable Acknowledge */
3658
  CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
3659
 
3660
  hi2c->XferCount = 0;
3661
 
3662
  hi2c->State = HAL_I2C_STATE_READY;
3663
 
3664
  hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
3665
 
3666
  HAL_I2C_ErrorCallback(hi2c);
3667
}
3668
 
3669
/**
3670
  * @brief  This function handles I2C Communication Timeout.
3671
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
3672
  *                the configuration information for the specified I2C.
3673
  * @param  Flag: specifies the I2C flag to check.
3674
  * @param  Status: The new Flag status (SET or RESET).
3675
  * @param  Timeout: Timeout duration
3676
  * @retval HAL status
3677
  */
3678
static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
3679
{
3680
  uint32_t tickstart = 0;
3681
 
3682
  /* Get tick */
3683
  tickstart = HAL_GetTick();
3684
 
3685
  /* Wait until flag is set */
3686
  if(Status == RESET)
3687
  {
3688
    while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
3689
    {
3690
      /* Check for the Timeout */
3691
      if(Timeout != HAL_MAX_DELAY)
3692
      {
3693
        if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
3694
        {
3695
          hi2c->State= HAL_I2C_STATE_READY;
3696
 
3697
          /* Process Unlocked */
3698
          __HAL_UNLOCK(hi2c);
3699
 
3700
          return HAL_TIMEOUT;
3701
        }
3702
      }
3703
    }
3704
  }
3705
  else
3706
  {
3707
    while(__HAL_I2C_GET_FLAG(hi2c, Flag) != RESET)
3708
    {
3709
      /* Check for the Timeout */
3710
      if(Timeout != HAL_MAX_DELAY)
3711
      {
3712
        if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
3713
        {
3714
          hi2c->State= HAL_I2C_STATE_READY;
3715
 
3716
          /* Process Unlocked */
3717
          __HAL_UNLOCK(hi2c);
3718
 
3719
          return HAL_TIMEOUT;
3720
        }
3721
      }
3722
    }
3723
  }
3724
  return HAL_OK;
3725
}
3726
 
3727
/**
3728
  * @brief  This function handles I2C Communication Timeout for Master addressing phase.
3729
  * @param  hi2c : Pointer to a I2C_HandleTypeDef structure that contains
3730
  *                the configuration information for the specified I2C.
3731
  * @param  Flag: specifies the I2C flag to check.
3732
  * @param  Timeout: Timeout duration
3733
  * @retval HAL status
3734
  */
3735
static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout)
3736
{
3737
  uint32_t tickstart = 0;
3738
 
3739
  /* Get tick */
3740
  tickstart = HAL_GetTick();
3741
 
3742
  while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
3743
  {
3744
    if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
3745
    {
3746
      /* Generate Stop */
3747
      SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
3748
 
3749
      /* Clear AF Flag */
3750
      __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
3751
 
3752
      hi2c->ErrorCode = HAL_I2C_ERROR_AF;
3753
      hi2c->State= HAL_I2C_STATE_READY;
3754
 
3755
      /* Process Unlocked */
3756
      __HAL_UNLOCK(hi2c);
3757
 
3758
      return HAL_ERROR;
3759
    }
3760
 
3761
    /* Check for the Timeout */
3762
    if(Timeout != HAL_MAX_DELAY)
3763
    {
3764
      if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
3765
      {
3766
        hi2c->State= HAL_I2C_STATE_READY;
3767
 
3768
        /* Process Unlocked */
3769
        __HAL_UNLOCK(hi2c);
3770
 
3771
        return HAL_TIMEOUT;
3772
      }
3773
    }
3774
  }
3775
  return HAL_OK;
3776
}
3777
 
3778
/**
3779
  * @}
3780
  */
3781
 
3782
#endif /* HAL_I2C_MODULE_ENABLED */
3783
 
3784
/**
3785
  * @}
3786
  */
3787
 
3788
/**
3789
  * @}
3790
  */
3791
 
3792
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/