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Rev	Author	Line No.	Line
2	mjames	1	/**
		2	******************************************************************************
		3	* @file stm32f1xx_hal_i2c.c
		4	* @author MCD Application Team
5	mjames	5	* @version V1.0.4
		6	* @date 29-April-2016
2	mjames	7	* @brief I2C HAL module driver.
		8	* This file provides firmware functions to manage the following
		9	* functionalities of the Inter Integrated Circuit (I2C) peripheral:
		10	* + Initialization and de-initialization functions
		11	* + IO operation functions
		12	* + Peripheral Control functions
		13	* + Peripheral State functions
		14	*
		15	@verbatim
		16	==============================================================================
		17	##### How to use this driver #####
		18	==============================================================================
		19	[..]
		20	The I2C HAL driver can be used as follows:
		21
		22	(#) Declare a I2C_HandleTypeDef handle structure, for example:
		23	I2C_HandleTypeDef hi2c;
		24
5	mjames	25	(#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API:
2	mjames	26	(##) Enable the I2Cx interface clock
		27	(##) I2C pins configuration
		28	(+++) Enable the clock for the I2C GPIOs
		29	(+++) Configure I2C pins as alternate function open-drain
		30	(##) NVIC configuration if you need to use interrupt process
		31	(+++) Configure the I2Cx interrupt priority
		32	(+++) Enable the NVIC I2C IRQ Channel
		33	(##) DMA Configuration if you need to use DMA process
		34	(+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel
		35	(+++) Enable the DMAx interface clock using
		36	(+++) Configure the DMA handle parameters
		37	(+++) Configure the DMA Tx or Rx channel
5	mjames	38	(+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle
2	mjames	39	(+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
		40	the DMA Tx or Rx channel
		41
		42	(#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1,
		43	Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure.
		44
		45	(#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
5	mjames	46	(GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API.
2	mjames	47
		48	(#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
		49
		50	(#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
		51
		52	* Polling mode IO operation *
		53	=================================
		54	[..]
		55	(+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
		56	(+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
		57	(+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
		58	(+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
		59
		60	* Polling mode IO MEM operation *
		61	=====================================
		62	[..]
		63	(+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
		64	(+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
		65
		66
		67	* Interrupt mode IO operation *
		68	===================================
		69	[..]
		70	(+) The I2C interrupts should have the highest priority in the application in order
		71	to make them uninterruptible.
5	mjames	72	(+) Transmit in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Transmit_IT()
		73	(+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
		74	add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
		75	(+) Receive in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Receive_IT()
		76	(+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
		77	add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
		78	(+) Transmit in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Transmit_IT()
		79	(+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
		80	add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
		81	(+) Receive in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Receive_IT()
		82	(+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
		83	add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
2	mjames	84	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
5	mjames	85	add his own code by customization of function pointer HAL_I2C_ErrorCallback()
2	mjames	86
		87	* Interrupt mode IO MEM operation *
		88	=======================================
		89	[..]
		90	(+) The I2C interrupts should have the highest priority in the application in order
		91	to make them uninterruptible.
5	mjames	92	(+) Write an amount of data in non-blocking mode with Interrupt to a specific memory address using
2	mjames	93	HAL_I2C_Mem_Write_IT()
5	mjames	94	(+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and user can
		95	add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback()
		96	(+) Read an amount of data in non-blocking mode with Interrupt from a specific memory address using
2	mjames	97	HAL_I2C_Mem_Read_IT()
5	mjames	98	(+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and user can
		99	add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback()
2	mjames	100	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
5	mjames	101	add his own code by customization of function pointer HAL_I2C_ErrorCallback()
2	mjames	102
		103	* DMA mode IO operation *
		104	==============================
		105	[..]
5	mjames	106	(+) Transmit in master mode an amount of data in non-blocking mode (DMA) using
2	mjames	107	HAL_I2C_Master_Transmit_DMA()
5	mjames	108	(+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
		109	add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
		110	(+) Receive in master mode an amount of data in non-blocking mode (DMA) using
2	mjames	111	HAL_I2C_Master_Receive_DMA()
5	mjames	112	(+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
		113	add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
		114	(+) Transmit in slave mode an amount of data in non-blocking mode (DMA) using
2	mjames	115	HAL_I2C_Slave_Transmit_DMA()
5	mjames	116	(+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
		117	add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
		118	(+) Receive in slave mode an amount of data in non-blocking mode (DMA) using
2	mjames	119	HAL_I2C_Slave_Receive_DMA()
5	mjames	120	(+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
		121	add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
2	mjames	122	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
5	mjames	123	add his own code by customization of function pointer HAL_I2C_ErrorCallback()
2	mjames	124
		125	* DMA mode IO MEM operation *
		126	=================================
		127	[..]
5	mjames	128	(+) Write an amount of data in non-blocking mode with DMA to a specific memory address using
2	mjames	129	HAL_I2C_Mem_Write_DMA()
5	mjames	130	(+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and user can
		131	add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback()
		132	(+) Read an amount of data in non-blocking mode with DMA from a specific memory address using
2	mjames	133	HAL_I2C_Mem_Read_DMA()
5	mjames	134	(+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and user can
		135	add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback()
2	mjames	136	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
5	mjames	137	add his own code by customization of function pointer HAL_I2C_ErrorCallback()
2	mjames	138
		139
		140	* I2C HAL driver macros list *
		141	==================================
		142	[..]
		143	Below the list of most used macros in I2C HAL driver.
		144
		145	(+) __HAL_I2C_ENABLE: Enable the I2C peripheral
		146	(+) __HAL_I2C_DISABLE: Disable the I2C peripheral
5	mjames	147	(+) __HAL_I2C_GET_FLAG: Check whether the specified I2C flag is set or not
2	mjames	148	(+) __HAL_I2C_CLEAR_FLAG : Clear the specified I2C pending flag
		149	(+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
		150	(+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
		151	(@) You can refer to the I2C HAL driver header file for more useful macros
		152
		153
		154	* I2C Workarounds linked to Silicon Limitation *
		155	====================================================
		156	[..]
		157	Below the list of all silicon limitations implemented for HAL on STM32F1xx product.
		158	(@) See ErrataSheet to know full silicon limitation list of your product.
		159
		160	(#) Workarounds Implemented inside I2C HAL Driver
		161	(##) Wrong data read into data register (Polling and Interrupt mode)
		162	(##) Start cannot be generated after a misplaced Stop
		163	(##) Some software events must be managed before the current byte is being transferred:
		164	Workaround: Use DMA in general, except when the Master is receiving a single byte.
		165	For Interupt mode, I2C should have the highest priority in the application.
		166	(##) Mismatch on the "Setup time for a repeated Start condition" timing parameter:
		167	Workaround: Reduce the frequency down to 88 kHz or use the I2C Fast-mode if
		168	supported by the slave.
		169	(##) Data valid time (tVD;DAT) violated without the OVR flag being set:
		170	Workaround: If the slave device allows it, use the clock stretching mechanism
		171	by programming NoStretchMode = I2C_NOSTRETCH_DISABLE in HAL_I2C_Init.
		172
		173	@endverbatim
		174	******************************************************************************
		175	* @attention
		176	*
5	mjames	177	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
2	mjames	178	*
		179	* Redistribution and use in source and binary forms, with or without modification,
		180	* are permitted provided that the following conditions are met:
		181	* 1. Redistributions of source code must retain the above copyright notice,
		182	* this list of conditions and the following disclaimer.
		183	* 2. Redistributions in binary form must reproduce the above copyright notice,
		184	* this list of conditions and the following disclaimer in the documentation
		185	* and/or other materials provided with the distribution.
		186	* 3. Neither the name of STMicroelectronics nor the names of its contributors
		187	* may be used to endorse or promote products derived from this software
		188	* without specific prior written permission.
		189	*
		190	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
		191	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
		192	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
		193	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
		194	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
		195	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
		196	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
		197	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
		198	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
		199	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
		200	*
		201	******************************************************************************
		202	*/
		203
		204	/* Includes ------------------------------------------------------------------*/
		205	#include "stm32f1xx_hal.h"
		206
		207	/** @addtogroup STM32F1xx_HAL_Driver
		208	* @{
		209	*/
		210
		211	/** @defgroup I2C I2C
		212	* @brief I2C HAL module driver
		213	* @{
		214	*/
		215
		216	#ifdef HAL_I2C_MODULE_ENABLED
		217
		218	/* Private typedef -----------------------------------------------------------*/
		219	/* Private constants ---------------------------------------------------------*/
		220	/** @addtogroup I2C_Private_Constants I2C Private Constants
		221	* @{
		222	*/
5	mjames	223	#define I2C_TIMEOUT_FLAG ((uint32_t)35) /!< Timeout 35 ms /
		224	#define I2C_TIMEOUT_ADDR_SLAVE ((uint32_t)10000) /!< Timeout 10 s /
		225	#define I2C_TIMEOUT_BUSY_FLAG ((uint32_t)10000) /!< Timeout 10 s /
2	mjames	226	/**
		227	* @}
		228	*/
		229
		230	/* Private macro -------------------------------------------------------------*/
		231	/* Private variables ---------------------------------------------------------*/
		232	/* Private function prototypes -----------------------------------------------*/
		233	/** @addtogroup I2C_Private_Functions I2C Private Functions
		234	* @{
		235	*/
		236	static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma);
		237	static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma);
		238	static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma);
		239	static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma);
		240	static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma);
		241	static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma);
		242	static void I2C_DMAError(DMA_HandleTypeDef *hdma);
		243
		244	static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout);
		245	static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout);
		246	static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout);
		247	static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout);
		248	static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
		249	static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout);
5	mjames	250	static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout);
		251	static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout);
		252	static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout);
		253	static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout);
		254	static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c);
2	mjames	255
		256	static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c);
		257	static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c);
		258	static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c);
		259	static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c);
		260
		261	static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c);
		262	static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c);
		263	static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c);
		264	static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c);
		265	static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c);
		266	static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c);
		267	static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c);
		268
		269	static uint32_t I2C_Configure_Speed(I2C_HandleTypeDef *hi2c, uint32_t I2CClkSrcFreq);
		270	/**
		271	* @}
		272	*/
		273
		274	/* Exported functions ---------------------------------------------------------*/
		275
		276	/** @defgroup I2C_Exported_Functions I2C Exported Functions
		277	* @{
		278	*/
		279
		280	/** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
		281	* @brief Initialization and Configuration functions
		282	*
		283	@verbatim
		284	===============================================================================
		285	##### Initialization and de-initialization functions #####
		286	===============================================================================
		287	[..] This subsection provides a set of functions allowing to initialize and
		288	de-initialiaze the I2Cx peripheral:
		289
		290	(+) User must Implement HAL_I2C_MspInit() function in which he configures
		291	all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC).
		292
		293	(+) Call the function HAL_I2C_Init() to configure the selected device with
		294	the selected configuration:
		295	(++) Communication Speed
		296	(++) Duty cycle
		297	(++) Addressing mode
		298	(++) Own Address 1
		299	(++) Dual Addressing mode
		300	(++) Own Address 2
		301	(++) General call mode
		302	(++) Nostretch mode
		303
		304	(+) Call the function HAL_I2C_DeInit() to restore the default configuration
		305	of the selected I2Cx periperal.
		306
		307	@endverbatim
		308	* @{
		309	*/
		310
		311	/**
		312	* @brief Initializes the I2C according to the specified parameters
5	mjames	313	* in the I2C_InitTypeDef and initialize the associated handle.
		314	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	315	* the configuration information for the specified I2C.
		316	* @retval HAL status
		317	*/
		318	HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
		319	{
		320	uint32_t freqrange = 0;
		321	uint32_t pclk1 = 0;
		322
		323	/* Check the I2C handle allocation */
		324	if(hi2c == NULL)
		325	{
		326	return HAL_ERROR;
		327	}
		328
		329	/* Check the parameters */
		330	assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
		331	assert_param(IS_I2C_CLOCK_SPEED(hi2c->Init.ClockSpeed));
		332	assert_param(IS_I2C_DUTY_CYCLE(hi2c->Init.DutyCycle));
		333	assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
		334	assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
		335	assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
		336	assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
		337	assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
		338	assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
		339
		340	if(hi2c->State == HAL_I2C_STATE_RESET)
		341	{
		342	/* Allocate lock resource and initialize it */
		343	hi2c->Lock = HAL_UNLOCKED;
		344
		345	/* Init the low level hardware : GPIO, CLOCK, NVIC */
		346	HAL_I2C_MspInit(hi2c);
		347	}
		348
		349	hi2c->State = HAL_I2C_STATE_BUSY;
		350
		351	/* Disable the selected I2C peripheral */
		352	__HAL_I2C_DISABLE(hi2c);
		353
		354	/* Get PCLK1 frequency */
		355	pclk1 = HAL_RCC_GetPCLK1Freq();
		356
		357	/* Calculate frequency range */
		358	freqrange = I2C_FREQ_RANGE(pclk1);
		359
		360	/---------------------------- I2Cx CR2 Configuration ----------------------/
		361	/* Configure I2Cx: Frequency range */
		362	hi2c->Instance->CR2 = freqrange;
		363
		364	/---------------------------- I2Cx TRISE Configuration --------------------/
		365	/* Configure I2Cx: Rise Time */
		366	hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
		367
		368	/---------------------------- I2Cx CCR Configuration ----------------------/
		369	/* Configure I2Cx: Speed */
		370	hi2c->Instance->CCR = I2C_Configure_Speed(hi2c, pclk1);
		371
		372	/---------------------------- I2Cx CR1 Configuration ----------------------/
		373	/* Configure I2Cx: Generalcall and NoStretch mode */
		374	hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode \| hi2c->Init.NoStretchMode);
		375
		376	/---------------------------- I2Cx OAR1 Configuration ---------------------/
		377	/* Configure I2Cx: Own Address1 and addressing mode */
		378	hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode \| hi2c->Init.OwnAddress1);
		379
		380	/---------------------------- I2Cx OAR2 Configuration ---------------------/
		381	/* Configure I2Cx: Dual mode and Own Address2 */
		382	hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode \| hi2c->Init.OwnAddress2);
		383
		384	/* Enable the selected I2C peripheral */
		385	__HAL_I2C_ENABLE(hi2c);
		386
		387	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
		388	hi2c->State = HAL_I2C_STATE_READY;
5	mjames	389	hi2c->Mode = HAL_I2C_MODE_NONE;
2	mjames	390
		391	return HAL_OK;
		392	}
		393
		394	/**
5	mjames	395	* @brief DeInitialize the I2C peripheral.
		396	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	397	* the configuration information for the specified I2C.
		398	* @retval HAL status
		399	*/
		400	HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
		401	{
		402	/* Check the I2C handle allocation */
		403	if(hi2c == NULL)
		404	{
		405	return HAL_ERROR;
		406	}
		407
		408	/* Check the parameters */
		409	assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
		410
		411	hi2c->State = HAL_I2C_STATE_BUSY;
		412
		413	/* Disable the I2C Peripheral Clock */
		414	__HAL_I2C_DISABLE(hi2c);
		415
		416	/* DeInit the low level hardware: GPIO, CLOCK, NVIC */
		417	HAL_I2C_MspDeInit(hi2c);
		418
		419	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
		420	hi2c->State = HAL_I2C_STATE_RESET;
5	mjames	421	hi2c->Mode = HAL_I2C_MODE_NONE;
2	mjames	422
		423	/* Release Lock */
		424	__HAL_UNLOCK(hi2c);
		425
		426	return HAL_OK;
		427	}
		428
		429	/**
5	mjames	430	* @brief Initialize the I2C MSP.
		431	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	432	* the configuration information for the specified I2C.
		433	* @retval None
		434	*/
		435	__weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
		436	{
5	mjames	437	/* Prevent unused argument(s) compilation warning */
		438	UNUSED(hi2c);
		439	/* NOTE : This function should not be modified, when the callback is needed,
2	mjames	440	the HAL_I2C_MspInit could be implemented in the user file
		441	*/
		442	}
		443
		444	/**
5	mjames	445	* @brief DeInitialize the I2C MSP.
		446	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	447	* the configuration information for the specified I2C.
		448	* @retval None
		449	*/
		450	__weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
		451	{
5	mjames	452	/* Prevent unused argument(s) compilation warning */
		453	UNUSED(hi2c);
		454	/* NOTE : This function should not be modified, when the callback is needed,
2	mjames	455	the HAL_I2C_MspDeInit could be implemented in the user file
		456	*/
		457	}
		458
		459	/**
		460	* @}
		461	*/
		462
		463	/** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions
		464	* @brief Data transfers functions
		465	*
		466	@verbatim
		467	===============================================================================
		468	##### IO operation functions #####
		469	===============================================================================
		470	[..]
		471	This subsection provides a set of functions allowing to manage the I2C data
		472	transfers.
		473
		474	(#) There are two modes of transfer:
		475	(++) Blocking mode : The communication is performed in the polling mode.
		476	The status of all data processing is returned by the same function
		477	after finishing transfer.
5	mjames	478	(++) No-Blocking mode : The communication is performed using Interrupts
2	mjames	479	or DMA. These functions return the status of the transfer startup.
		480	The end of the data processing will be indicated through the
		481	dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
		482	using DMA mode.
		483
		484	(#) Blocking mode functions are :
		485	(++) HAL_I2C_Master_Transmit()
		486	(++) HAL_I2C_Master_Receive()
		487	(++) HAL_I2C_Slave_Transmit()
		488	(++) HAL_I2C_Slave_Receive()
		489	(++) HAL_I2C_Mem_Write()
		490	(++) HAL_I2C_Mem_Read()
		491	(++) HAL_I2C_IsDeviceReady()
		492
		493	(#) No-Blocking mode functions with Interrupt are :
		494	(++) HAL_I2C_Master_Transmit_IT()
		495	(++) HAL_I2C_Master_Receive_IT()
		496	(++) HAL_I2C_Slave_Transmit_IT()
		497	(++) HAL_I2C_Slave_Receive_IT()
		498	(++) HAL_I2C_Mem_Write_IT()
		499	(++) HAL_I2C_Mem_Read_IT()
		500
		501	(#) No-Blocking mode functions with DMA are :
		502	(++) HAL_I2C_Master_Transmit_DMA()
		503	(++) HAL_I2C_Master_Receive_DMA()
		504	(++) HAL_I2C_Slave_Transmit_DMA()
		505	(++) HAL_I2C_Slave_Receive_DMA()
		506	(++) HAL_I2C_Mem_Write_DMA()
		507	(++) HAL_I2C_Mem_Read_DMA()
		508
		509	(#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
		510	(++) HAL_I2C_MemTxCpltCallback()
		511	(++) HAL_I2C_MemRxCpltCallback()
		512	(++) HAL_I2C_MasterTxCpltCallback()
		513	(++) HAL_I2C_MasterRxCpltCallback()
		514	(++) HAL_I2C_SlaveTxCpltCallback()
		515	(++) HAL_I2C_SlaveRxCpltCallback()
		516	(++) HAL_I2C_ErrorCallback()
		517
		518	@endverbatim
		519	* @{
		520	*/
		521
		522	/**
		523	* @brief Transmits in master mode an amount of data in blocking mode.
5	mjames	524	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	525	* the configuration information for the specified I2C.
5	mjames	526	* @param DevAddress Target device address
		527	* @param pData Pointer to data buffer
		528	* @param Size Amount of data to be sent
		529	* @param Timeout Timeout duration
2	mjames	530	* @retval HAL status
		531	*/
		532	HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t Timeout)
		533	{
		534	if(hi2c->State == HAL_I2C_STATE_READY)
		535	{
		536	if((pData == NULL) \|\| (Size == 0))
		537	{
		538	return HAL_ERROR;
		539	}
		540
		541	/* Wait until BUSY flag is reset */
		542	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
		543	{
		544	return HAL_BUSY;
		545	}
		546
		547	/* Process Locked */
		548	__HAL_LOCK(hi2c);
		549
		550	/* Disable Pos */
		551	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
		552
		553	hi2c->State = HAL_I2C_STATE_BUSY_TX;
5	mjames	554	hi2c->Mode = HAL_I2C_MODE_MASTER;
2	mjames	555	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
		556
		557	/* Send Slave Address */
		558	if(I2C_MasterRequestWrite(hi2c, DevAddress, Timeout) != HAL_OK)
		559	{
		560	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		561	{
		562	/* Process Unlocked */
		563	__HAL_UNLOCK(hi2c);
		564	return HAL_ERROR;
		565	}
		566	else
		567	{
		568	/* Process Unlocked */
		569	__HAL_UNLOCK(hi2c);
		570	return HAL_TIMEOUT;
		571	}
		572	}
		573
		574	/* Clear ADDR flag */
		575	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
		576
		577	while(Size > 0)
		578	{
		579	/* Wait until TXE flag is set */
5	mjames	580	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
2	mjames	581	{
5	mjames	582	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		583	{
		584	/* Generate Stop */
		585	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
		586	return HAL_ERROR;
		587	}
		588	else
		589	{
		590	return HAL_TIMEOUT;
		591	}
2	mjames	592	}
		593
		594	/* Write data to DR */
		595	hi2c->Instance->DR = (*pData++);
		596	Size--;
		597
		598	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
		599	{
		600	/* Write data to DR */
		601	hi2c->Instance->DR = (*pData++);
		602	Size--;
		603	}
		604	}
		605
5	mjames	606	/* Wait until BTF flag is set */
		607	if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
2	mjames	608	{
5	mjames	609	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		610	{
		611	/* Generate Stop */
		612	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
		613	return HAL_ERROR;
		614	}
		615	else
		616	{
		617	return HAL_TIMEOUT;
		618	}
2	mjames	619	}
		620
		621	/* Generate Stop */
		622	SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
		623
		624	hi2c->State = HAL_I2C_STATE_READY;
		625
		626	/* Process Unlocked */
		627	__HAL_UNLOCK(hi2c);
		628
		629	return HAL_OK;
		630	}
		631	else
		632	{
		633	return HAL_BUSY;
		634	}
		635	}
		636
		637	/**
		638	* @brief Receives in master mode an amount of data in blocking mode.
5	mjames	639	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	640	* the configuration information for the specified I2C.
5	mjames	641	* @param DevAddress Target device address
		642	* @param pData Pointer to data buffer
		643	* @param Size Amount of data to be sent
		644	* @param Timeout Timeout duration
2	mjames	645	* @retval HAL status
		646	*/
		647	HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t Timeout)
		648	{
		649	if(hi2c->State == HAL_I2C_STATE_READY)
		650	{
		651	if((pData == NULL) \|\| (Size == 0))
		652	{
		653	return HAL_ERROR;
		654	}
		655
		656	/* Wait until BUSY flag is reset */
		657	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
		658	{
		659	return HAL_BUSY;
		660	}
		661
		662	/* Process Locked */
		663	__HAL_LOCK(hi2c);
		664
		665	/* Disable Pos */
		666	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
		667
		668	hi2c->State = HAL_I2C_STATE_BUSY_RX;
5	mjames	669	hi2c->Mode = HAL_I2C_MODE_MASTER;
2	mjames	670	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
		671
		672	/* Send Slave Address */
		673	if(I2C_MasterRequestRead(hi2c, DevAddress, Timeout) != HAL_OK)
		674	{
		675	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		676	{
		677	/* Process Unlocked */
		678	__HAL_UNLOCK(hi2c);
		679	return HAL_ERROR;
		680	}
		681	else
		682	{
		683	/* Process Unlocked */
		684	__HAL_UNLOCK(hi2c);
		685	return HAL_TIMEOUT;
		686	}
		687	}
		688
		689	if(Size == 1)
		690	{
		691	/* Disable Acknowledge */
		692	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		693
		694	/* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
		695	software sequence must complete before the current byte end of transfer */
		696	__disable_irq();
		697
		698	/* Clear ADDR flag */
		699	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
		700
		701	/* Generate Stop */
		702	SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
		703
		704	/* Re-enable IRQs */
		705	__enable_irq();
		706	}
		707	else if(Size == 2)
		708	{
		709	/* Enable Pos */
		710	SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
		711
		712	/* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
		713	software sequence must complete before the current byte end of transfer */
		714	__disable_irq();
		715
		716	/* Clear ADDR flag */
		717	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
		718
		719	/* Disable Acknowledge */
		720	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		721
		722	/* Re-enable IRQs */
		723	__enable_irq();
		724	}
		725	else
		726	{
		727	/* Enable Acknowledge */
		728	SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		729
		730	/* Clear ADDR flag */
		731	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
		732	}
		733
		734	while(Size > 0)
		735	{
		736	if(Size <= 3)
		737	{
		738	/* One byte */
		739	if(Size == 1)
		740	{
		741	/* Wait until RXNE flag is set */
5	mjames	742	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
2	mjames	743	{
5	mjames	744	if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
		745	{
		746	return HAL_TIMEOUT;
		747	}
		748	else
		749	{
		750	return HAL_ERROR;
		751	}
2	mjames	752	}
		753
		754	/* Read data from DR */
		755	(*pData++) = hi2c->Instance->DR;
		756	Size--;
		757	}
		758	/* Two bytes */
		759	else if(Size == 2)
		760	{
		761	/* Wait until BTF flag is set */
		762	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
		763	{
		764	return HAL_TIMEOUT;
		765	}
		766
		767	/* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
		768	software sequence must complete before the current byte end of transfer */
		769	__disable_irq();
		770
		771	/* Generate Stop */
		772	SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
		773
		774	/* Read data from DR */
		775	(*pData++) = hi2c->Instance->DR;
		776	Size--;
		777
		778	/* Re-enable IRQs */
		779	__enable_irq();
		780
		781	/* Read data from DR */
		782	(*pData++) = hi2c->Instance->DR;
		783	Size--;
		784	}
		785	/* 3 Last bytes */
		786	else
		787	{
		788	/* Wait until BTF flag is set */
		789	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
		790	{
		791	return HAL_TIMEOUT;
		792	}
		793
		794	/* Disable Acknowledge */
		795	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		796
		797	/* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
		798	software sequence must complete before the current byte end of transfer */
		799	__disable_irq();
		800
		801	/* Read data from DR */
		802	(*pData++) = hi2c->Instance->DR;
		803	Size--;
		804
		805	/* Wait until BTF flag is set */
		806	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
		807	{
		808	return HAL_TIMEOUT;
		809	}
		810
		811	/* Generate Stop */
		812	SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
		813
		814	/* Read data from DR */
		815	(*pData++) = hi2c->Instance->DR;
		816	Size--;
		817
		818	/* Re-enable IRQs */
		819	__enable_irq();
		820
		821	/* Read data from DR */
		822	(*pData++) = hi2c->Instance->DR;
		823	Size--;
		824	}
		825	}
		826	else
		827	{
		828	/* Wait until RXNE flag is set */
5	mjames	829	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
2	mjames	830	{
5	mjames	831	if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
		832	{
		833	return HAL_TIMEOUT;
		834	}
		835	else
		836	{
		837	return HAL_ERROR;
		838	}
2	mjames	839	}
		840
		841	/* Read data from DR */
		842	(*pData++) = hi2c->Instance->DR;
		843	Size--;
		844
		845	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
		846	{
		847	/* Read data from DR */
		848	(*pData++) = hi2c->Instance->DR;
		849	Size--;
		850	}
		851	}
		852	}
		853
		854	hi2c->State = HAL_I2C_STATE_READY;
5	mjames	855	hi2c->Mode = HAL_I2C_MODE_NONE;
2	mjames	856
		857	/* Process Unlocked */
		858	__HAL_UNLOCK(hi2c);
		859
		860	return HAL_OK;
		861	}
		862	else
		863	{
		864	return HAL_BUSY;
		865	}
		866	}
		867
		868	/**
		869	* @brief Transmits in slave mode an amount of data in blocking mode.
5	mjames	870	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	871	* the configuration information for the specified I2C.
5	mjames	872	* @param pData Pointer to data buffer
		873	* @param Size Amount of data to be sent
		874	* @param Timeout Timeout duration
2	mjames	875	* @retval HAL status
		876	*/
		877	HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t Timeout)
		878	{
		879	if(hi2c->State == HAL_I2C_STATE_READY)
		880	{
		881	if((pData == NULL) \|\| (Size == 0))
		882	{
		883	return HAL_ERROR;
		884	}
		885
		886	/* Wait until BUSY flag is reset */
		887	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
		888	{
		889	return HAL_BUSY;
		890	}
		891
		892	/* Process Locked */
		893	__HAL_LOCK(hi2c);
		894
		895	/* Disable Pos */
		896	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
		897
		898	hi2c->State = HAL_I2C_STATE_BUSY_TX;
5	mjames	899	hi2c->Mode = HAL_I2C_MODE_SLAVE;
2	mjames	900	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
		901
		902	/* Enable Address Acknowledge */
		903	SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		904
		905	/* Wait until ADDR flag is set */
		906	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
		907	{
		908	return HAL_TIMEOUT;
		909	}
		910
		911	/* Clear ADDR flag */
		912	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
		913
		914	/* If 10bit addressing mode is selected */
		915	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
		916	{
		917	/* Wait until ADDR flag is set */
		918	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
		919	{
		920	return HAL_TIMEOUT;
		921	}
		922
		923	/* Clear ADDR flag */
		924	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
		925	}
		926
		927	while(Size > 0)
		928	{
		929	/* Wait until TXE flag is set */
5	mjames	930	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
2	mjames	931	{
5	mjames	932	/* Disable Address Acknowledge */
		933	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		934	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		935	{
		936	return HAL_ERROR;
		937	}
		938	else
		939	{
		940	return HAL_TIMEOUT;
		941	}
2	mjames	942	}
		943
		944	/* Write data to DR */
		945	hi2c->Instance->DR = (*pData++);
		946	Size--;
		947
		948	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
		949	{
		950	/* Write data to DR */
		951	hi2c->Instance->DR = (*pData++);
		952	Size--;
		953	}
		954	}
		955
		956	/* Wait until AF flag is set */
		957	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout) != HAL_OK)
		958	{
		959	return HAL_TIMEOUT;
		960	}
		961
		962	/* Clear AF flag */
		963	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
		964
		965	/* Disable Address Acknowledge */
		966	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		967
		968	hi2c->State = HAL_I2C_STATE_READY;
5	mjames	969	hi2c->Mode = HAL_I2C_MODE_NONE;
2	mjames	970
		971	/* Process Unlocked */
		972	__HAL_UNLOCK(hi2c);
		973
		974	return HAL_OK;
		975	}
		976	else
		977	{
		978	return HAL_BUSY;
		979	}
		980	}
		981
		982	/**
		983	* @brief Receive in slave mode an amount of data in blocking mode
5	mjames	984	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	985	* the configuration information for the specified I2C.
5	mjames	986	* @param pData Pointer to data buffer
		987	* @param Size Amount of data to be sent
		988	* @param Timeout Timeout duration
2	mjames	989	* @retval HAL status
		990	*/
		991	HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t Timeout)
		992	{
		993	if(hi2c->State == HAL_I2C_STATE_READY)
		994	{
		995	if((pData == NULL) \|\| (Size == 0))
		996	{
		997	return HAL_ERROR;
		998	}
		999
		1000	/* Wait until BUSY flag is reset */
		1001	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
		1002	{
		1003	return HAL_BUSY;
		1004	}
		1005
		1006	/* Process Locked */
		1007	__HAL_LOCK(hi2c);
		1008
		1009	/* Disable Pos */
		1010	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
		1011
		1012	hi2c->State = HAL_I2C_STATE_BUSY_RX;
5	mjames	1013	hi2c->Mode = HAL_I2C_MODE_SLAVE;
2	mjames	1014	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
		1015
		1016	/* Enable Address Acknowledge */
		1017	SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		1018
		1019	/* Wait until ADDR flag is set */
		1020	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
		1021	{
		1022	return HAL_TIMEOUT;
		1023	}
		1024
		1025	/* Clear ADDR flag */
		1026	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
		1027
		1028	while(Size > 0)
		1029	{
		1030	/* Wait until RXNE flag is set */
5	mjames	1031	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
2	mjames	1032	{
5	mjames	1033	/* Disable Address Acknowledge */
		1034	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
		1035	if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
		1036	{
		1037	return HAL_TIMEOUT;
		1038	}
		1039	else
		1040	{
		1041	return HAL_ERROR;
		1042	}
2	mjames	1043	}
		1044
		1045	/* Read data from DR */
		1046	(*pData++) = hi2c->Instance->DR;
		1047	Size--;
		1048
		1049	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
		1050	{
		1051	/* Read data from DR */
		1052	(*pData++) = hi2c->Instance->DR;
		1053	Size--;
		1054	}
		1055	}
		1056
		1057	/* Wait until STOP flag is set */
5	mjames	1058	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_FLAG) != HAL_OK)
2	mjames	1059	{
5	mjames	1060	/* Disable Address Acknowledge */
		1061	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
		1062
		1063	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		1064	{
		1065	return HAL_ERROR;
		1066	}
		1067	else
		1068	{
		1069	return HAL_TIMEOUT;
		1070	}
2	mjames	1071	}
		1072
		1073	/* Clear STOP flag */
		1074	__HAL_I2C_CLEAR_STOPFLAG(hi2c);
		1075
		1076	/* Disable Address Acknowledge */
		1077	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		1078
		1079	hi2c->State = HAL_I2C_STATE_READY;
5	mjames	1080	hi2c->Mode = HAL_I2C_MODE_NONE;
2	mjames	1081
		1082	/* Process Unlocked */
		1083	__HAL_UNLOCK(hi2c);
		1084
		1085	return HAL_OK;
		1086	}
		1087	else
		1088	{
		1089	return HAL_BUSY;
		1090	}
		1091	}
		1092
		1093	/**
5	mjames	1094	* @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt
		1095	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	1096	* the configuration information for the specified I2C.
5	mjames	1097	* @param DevAddress Target device address
		1098	* @param pData Pointer to data buffer
		1099	* @param Size Amount of data to be sent
2	mjames	1100	* @retval HAL status
		1101	*/
		1102	HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
		1103	{
		1104	if(hi2c->State == HAL_I2C_STATE_READY)
		1105	{
		1106	if((pData == NULL) \|\| (Size == 0))
		1107	{
		1108	return HAL_ERROR;
		1109	}
		1110
		1111	/* Wait until BUSY flag is reset */
		1112	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
		1113	{
		1114	return HAL_BUSY;
		1115	}
		1116
		1117	/* Process Locked */
		1118	__HAL_LOCK(hi2c);
		1119
		1120	/* Disable Pos */
		1121	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
		1122
		1123	hi2c->State = HAL_I2C_STATE_BUSY_TX;
5	mjames	1124	hi2c->Mode = HAL_I2C_MODE_MASTER;
2	mjames	1125	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
		1126
		1127	hi2c->pBuffPtr = pData;
		1128	hi2c->XferSize = Size;
		1129	hi2c->XferCount = Size;
		1130
		1131	/* Send Slave Address */
		1132	if(I2C_MasterRequestWrite(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
		1133	{
		1134	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		1135	{
		1136	/* Process Unlocked */
		1137	__HAL_UNLOCK(hi2c);
		1138	return HAL_ERROR;
		1139	}
		1140	else
		1141	{
		1142	/* Process Unlocked */
		1143	__HAL_UNLOCK(hi2c);
		1144	return HAL_TIMEOUT;
		1145	}
		1146	}
		1147
		1148	/* Clear ADDR flag */
		1149	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
		1150
		1151	/* Process Unlocked */
		1152	__HAL_UNLOCK(hi2c);
		1153
		1154	/* Note : The I2C interrupts must be enabled after unlocking current process
		1155	to avoid the risk of I2C interrupt handle execution before current
		1156	process unlock */
		1157
		1158	/* Enable EVT, BUF and ERR interrupt */
		1159	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
		1160
		1161	return HAL_OK;
		1162	}
		1163	else
		1164	{
		1165	return HAL_BUSY;
		1166	}
		1167	}
		1168
		1169	/**
5	mjames	1170	* @brief Receive in master mode an amount of data in non-blocking mode with Interrupt
		1171	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	1172	* the configuration information for the specified I2C.
5	mjames	1173	* @param DevAddress Target device address
		1174	* @param pData Pointer to data buffer
		1175	* @param Size Amount of data to be sent
2	mjames	1176	* @retval HAL status
		1177	*/
		1178	HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
		1179	{
		1180	if(hi2c->State == HAL_I2C_STATE_READY)
		1181	{
		1182	if((pData == NULL) \|\| (Size == 0))
		1183	{
		1184	return HAL_ERROR;
		1185	}
		1186
		1187	/* Wait until BUSY flag is reset */
		1188	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
		1189	{
		1190	return HAL_BUSY;
		1191	}
		1192
		1193	/* Process Locked */
		1194	__HAL_LOCK(hi2c);
		1195
		1196	/* Disable Pos */
		1197	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
		1198
		1199	hi2c->State = HAL_I2C_STATE_BUSY_RX;
5	mjames	1200	hi2c->Mode = HAL_I2C_MODE_MASTER;
2	mjames	1201	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
		1202
		1203	hi2c->pBuffPtr = pData;
		1204	hi2c->XferSize = Size;
		1205	hi2c->XferCount = Size;
		1206
		1207	/* Send Slave Address */
		1208	if(I2C_MasterRequestRead(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
		1209	{
		1210	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		1211	{
		1212	/* Process Unlocked */
		1213	__HAL_UNLOCK(hi2c);
		1214	return HAL_ERROR;
		1215	}
		1216	else
		1217	{
		1218	/* Process Unlocked */
		1219	__HAL_UNLOCK(hi2c);
		1220	return HAL_TIMEOUT;
		1221	}
		1222	}
		1223
		1224	if(hi2c->XferCount == 1)
		1225	{
		1226	/* Disable Acknowledge */
		1227	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		1228
		1229	/* Clear ADDR flag */
		1230	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
		1231
		1232	/* Generate Stop */
		1233	SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
		1234	}
		1235	else if(hi2c->XferCount == 2)
		1236	{
		1237	/* Enable Pos */
		1238	SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
		1239
		1240	/* Clear ADDR flag */
		1241	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
5	mjames	1242
		1243	/* Disable Acknowledge */
		1244	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
2	mjames	1245	}
		1246	else
		1247	{
		1248	/* Enable Acknowledge */
		1249	SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		1250
		1251	/* Clear ADDR flag */
		1252	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
		1253	}
		1254
		1255	/* Process Unlocked */
		1256	__HAL_UNLOCK(hi2c);
		1257
		1258	/* Note : The I2C interrupts must be enabled after unlocking current process
		1259	to avoid the risk of I2C interrupt handle execution before current
		1260	process unlock */
		1261
		1262	/* Enable EVT, BUF and ERR interrupt */
		1263	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
		1264
		1265	return HAL_OK;
		1266	}
		1267	else
		1268	{
		1269	return HAL_BUSY;
		1270	}
		1271	}
		1272
		1273	/**
5	mjames	1274	* @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt
		1275	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	1276	* the configuration information for the specified I2C.
5	mjames	1277	* @param pData Pointer to data buffer
		1278	* @param Size Amount of data to be sent
2	mjames	1279	* @retval HAL status
		1280	*/
		1281	HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
		1282	{
		1283	if(hi2c->State == HAL_I2C_STATE_READY)
		1284	{
		1285	if((pData == NULL) \|\| (Size == 0))
		1286	{
		1287	return HAL_ERROR;
		1288	}
		1289
		1290	/* Wait until BUSY flag is reset */
		1291	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
		1292	{
		1293	return HAL_BUSY;
		1294	}
		1295
		1296	/* Process Locked */
		1297	__HAL_LOCK(hi2c);
		1298
		1299	/* Disable Pos */
		1300	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
		1301
		1302	hi2c->State = HAL_I2C_STATE_BUSY_TX;
5	mjames	1303	hi2c->Mode = HAL_I2C_MODE_SLAVE;
2	mjames	1304	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
		1305
		1306	hi2c->pBuffPtr = pData;
		1307	hi2c->XferSize = Size;
		1308	hi2c->XferCount = Size;
		1309
		1310	/* Enable Address Acknowledge */
		1311	SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		1312
		1313	/* Process Unlocked */
		1314	__HAL_UNLOCK(hi2c);
		1315
		1316	/* Note : The I2C interrupts must be enabled after unlocking current process
		1317	to avoid the risk of I2C interrupt handle execution before current
		1318	process unlock */
		1319
		1320	/* Enable EVT, BUF and ERR interrupt */
		1321	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
		1322
		1323	return HAL_OK;
		1324	}
		1325	else
		1326	{
		1327	return HAL_BUSY;
		1328	}
		1329	}
		1330
		1331	/**
5	mjames	1332	* @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt
		1333	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	1334	* the configuration information for the specified I2C.
5	mjames	1335	* @param pData Pointer to data buffer
		1336	* @param Size Amount of data to be sent
2	mjames	1337	* @retval HAL status
		1338	*/
		1339	HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
		1340	{
		1341	if(hi2c->State == HAL_I2C_STATE_READY)
		1342	{
		1343	if((pData == NULL) \|\| (Size == 0))
		1344	{
		1345	return HAL_ERROR;
		1346	}
		1347
		1348	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
		1349	{
		1350	return HAL_BUSY;
		1351	}
		1352
		1353	/* Process Locked */
		1354	__HAL_LOCK(hi2c);
		1355
		1356	/* Disable Pos */
		1357	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
		1358
		1359	hi2c->State = HAL_I2C_STATE_BUSY_RX;
5	mjames	1360	hi2c->Mode = HAL_I2C_MODE_SLAVE;
2	mjames	1361	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
		1362
		1363	hi2c->pBuffPtr = pData;
		1364	hi2c->XferSize = Size;
		1365	hi2c->XferCount = Size;
		1366
		1367	/* Enable Address Acknowledge */
		1368	SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		1369
		1370	/* Process Unlocked */
		1371	__HAL_UNLOCK(hi2c);
		1372
		1373	/* Note : The I2C interrupts must be enabled after unlocking current process
		1374	to avoid the risk of I2C interrupt handle execution before current
		1375	process unlock */
		1376
		1377	/* Enable EVT, BUF and ERR interrupt */
		1378	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
		1379
		1380	return HAL_OK;
		1381	}
		1382	else
		1383	{
		1384	return HAL_BUSY;
		1385	}
		1386	}
		1387
		1388
		1389	/**
5	mjames	1390	* @brief Transmit in master mode an amount of data in non-blocking mode with DMA
		1391	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	1392	* the configuration information for the specified I2C.
5	mjames	1393	* @param DevAddress Target device address
		1394	* @param pData Pointer to data buffer
		1395	* @param Size Amount of data to be sent
2	mjames	1396	* @retval HAL status
		1397	*/
		1398	HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
		1399	{
		1400	if(hi2c->State == HAL_I2C_STATE_READY)
		1401	{
		1402	if((pData == NULL) \|\| (Size == 0))
		1403	{
		1404	return HAL_ERROR;
		1405	}
		1406
		1407	/* Wait until BUSY flag is reset */
		1408	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
		1409	{
		1410	return HAL_BUSY;
		1411	}
		1412
		1413	/* Process Locked */
		1414	__HAL_LOCK(hi2c);
		1415
		1416	/* Disable Pos */
		1417	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
		1418
		1419	hi2c->State = HAL_I2C_STATE_BUSY_TX;
5	mjames	1420	hi2c->Mode = HAL_I2C_MODE_MASTER;
2	mjames	1421	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
		1422
		1423	hi2c->pBuffPtr = pData;
		1424	hi2c->XferSize = Size;
		1425	hi2c->XferCount = Size;
		1426
		1427	/* Set the I2C DMA transfert complete callback */
		1428	hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt;
		1429
		1430	/* Set the DMA error callback */
		1431	hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
		1432
		1433	/* Enable the DMA channel */
		1434	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
		1435
		1436	/* Send Slave Address */
		1437	if(I2C_MasterRequestWrite(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
		1438	{
		1439	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		1440	{
		1441	/* Process Unlocked */
		1442	__HAL_UNLOCK(hi2c);
		1443	return HAL_ERROR;
		1444	}
		1445	else
		1446	{
		1447	/* Process Unlocked */
		1448	__HAL_UNLOCK(hi2c);
		1449	return HAL_TIMEOUT;
		1450	}
		1451	}
		1452
		1453	/* Enable DMA Request */
		1454	SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
		1455
		1456	/* Clear ADDR flag */
		1457	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
		1458
		1459	/* Process Unlocked */
		1460	__HAL_UNLOCK(hi2c);
		1461
		1462	return HAL_OK;
		1463	}
		1464	else
		1465	{
		1466	return HAL_BUSY;
		1467	}
		1468	}
		1469
		1470	/**
5	mjames	1471	* @brief Receive in master mode an amount of data in non-blocking mode with DMA
		1472	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	1473	* the configuration information for the specified I2C.
5	mjames	1474	* @param DevAddress Target device address
		1475	* @param pData Pointer to data buffer
		1476	* @param Size Amount of data to be sent
2	mjames	1477	* @retval HAL status
		1478	*/
		1479	HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
		1480	{
		1481	if(hi2c->State == HAL_I2C_STATE_READY)
		1482	{
		1483	if((pData == NULL) \|\| (Size == 0))
		1484	{
		1485	return HAL_ERROR;
		1486	}
		1487
		1488	/* Wait until BUSY flag is reset */
		1489	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
		1490	{
		1491	return HAL_BUSY;
		1492	}
		1493
		1494	/* Process Locked */
		1495	__HAL_LOCK(hi2c);
		1496
		1497	/* Disable Pos */
		1498	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
		1499
		1500	hi2c->State = HAL_I2C_STATE_BUSY_RX;
5	mjames	1501	hi2c->Mode = HAL_I2C_MODE_MASTER;
2	mjames	1502	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
		1503
		1504	hi2c->pBuffPtr = pData;
		1505	hi2c->XferSize = Size;
		1506	hi2c->XferCount = Size;
		1507
		1508	/* Set the I2C DMA transfert complete callback */
		1509	hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt;
		1510
		1511	/* Set the DMA error callback */
		1512	hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
		1513
		1514	/* Enable the DMA channel */
		1515	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
		1516
		1517	/* Send Slave Address */
		1518	if(I2C_MasterRequestRead(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
		1519	{
		1520	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		1521	{
		1522	/* Process Unlocked */
		1523	__HAL_UNLOCK(hi2c);
		1524	return HAL_ERROR;
		1525	}
		1526	else
		1527	{
		1528	/* Process Unlocked */
		1529	__HAL_UNLOCK(hi2c);
		1530	return HAL_TIMEOUT;
		1531	}
		1532	}
		1533
		1534	if(Size == 1)
		1535	{
		1536	/* Disable Acknowledge */
		1537	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		1538	}
		1539	else
		1540	{
		1541	/* Enable Last DMA bit */
		1542	SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
		1543	}
		1544
		1545	/* Enable DMA Request */
		1546	SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
		1547
		1548	/* Clear ADDR flag */
		1549	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
		1550
		1551	/* Process Unlocked */
		1552	__HAL_UNLOCK(hi2c);
		1553
		1554	return HAL_OK;
		1555	}
		1556	else
		1557	{
		1558	return HAL_BUSY;
		1559	}
		1560	}
		1561
		1562	/**
5	mjames	1563	* @brief Transmit in slave mode an amount of data in non-blocking mode with DMA
		1564	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	1565	* the configuration information for the specified I2C.
5	mjames	1566	* @param pData Pointer to data buffer
		1567	* @param Size Amount of data to be sent
2	mjames	1568	* @retval HAL status
		1569	*/
		1570	HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
		1571	{
		1572	if(hi2c->State == HAL_I2C_STATE_READY)
		1573	{
		1574	if((pData == NULL) \|\| (Size == 0))
		1575	{
		1576	return HAL_ERROR;
		1577	}
		1578
		1579	/* Wait until BUSY flag is reset */
		1580	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
		1581	{
		1582	return HAL_BUSY;
		1583	}
		1584
		1585	/* Process Locked */
		1586	__HAL_LOCK(hi2c);
		1587
		1588	/* Disable Pos */
		1589	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
		1590
		1591	hi2c->State = HAL_I2C_STATE_BUSY_TX;
5	mjames	1592	hi2c->Mode = HAL_I2C_MODE_SLAVE;
2	mjames	1593	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
		1594
		1595	hi2c->pBuffPtr = pData;
		1596	hi2c->XferSize = Size;
		1597	hi2c->XferCount = Size;
		1598
		1599	/* Set the I2C DMA transfert complete callback */
		1600	hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt;
		1601
		1602	/* Set the DMA error callback */
		1603	hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
		1604
		1605	/* Enable the DMA channel */
		1606	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
		1607
		1608	/* Enable DMA Request */
		1609	SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
		1610
		1611	/* Enable Address Acknowledge */
		1612	SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		1613
		1614	/* Wait until ADDR flag is set */
		1615	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK)
		1616	{
		1617	return HAL_TIMEOUT;
		1618	}
		1619
		1620	/* If 7bit addressing mode is selected */
		1621	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
		1622	{
		1623	/* Clear ADDR flag */
		1624	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
		1625	}
		1626	else
		1627	{
		1628	/* Clear ADDR flag */
		1629	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
		1630
		1631	/* Wait until ADDR flag is set */
		1632	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK)
		1633	{
		1634	return HAL_TIMEOUT;
		1635	}
		1636
		1637	/* Clear ADDR flag */
		1638	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
		1639	}
		1640
		1641	/* Process Unlocked */
		1642	__HAL_UNLOCK(hi2c);
		1643
		1644	return HAL_OK;
		1645	}
		1646	else
		1647	{
		1648	return HAL_BUSY;
		1649	}
		1650	}
		1651
		1652	/**
5	mjames	1653	* @brief Receive in slave mode an amount of data in non-blocking mode with DMA
		1654	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	1655	* the configuration information for the specified I2C.
5	mjames	1656	* @param pData Pointer to data buffer
		1657	* @param Size Amount of data to be sent
2	mjames	1658	* @retval HAL status
		1659	*/
		1660	HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
		1661	{
		1662	if(hi2c->State == HAL_I2C_STATE_READY)
		1663	{
		1664	if((pData == NULL) \|\| (Size == 0))
		1665	{
		1666	return HAL_ERROR;
		1667	}
		1668
		1669	/* Wait until BUSY flag is reset */
		1670	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
		1671	{
		1672	return HAL_BUSY;
		1673	}
		1674
		1675	/* Process Locked */
		1676	__HAL_LOCK(hi2c);
		1677
		1678	/* Disable Pos */
		1679	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
		1680
		1681	hi2c->State = HAL_I2C_STATE_BUSY_RX;
5	mjames	1682	hi2c->Mode = HAL_I2C_MODE_SLAVE;
2	mjames	1683	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
		1684
		1685	hi2c->pBuffPtr = pData;
		1686	hi2c->XferSize = Size;
		1687	hi2c->XferCount = Size;
		1688
5	mjames	1689	/* Set the I2C DMA transfer complete callback */
2	mjames	1690	hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt;
		1691
		1692	/* Set the DMA error callback */
		1693	hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
		1694
		1695	/* Enable the DMA channel */
		1696	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
		1697
		1698	/* Enable DMA Request */
		1699	SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
		1700
		1701	/* Enable Address Acknowledge */
		1702	SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		1703
		1704	/* Wait until ADDR flag is set */
		1705	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK)
		1706	{
		1707	return HAL_TIMEOUT;
		1708	}
		1709
		1710	/* Clear ADDR flag */
		1711	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
		1712
		1713	/* Process Unlocked */
		1714	__HAL_UNLOCK(hi2c);
		1715
		1716	return HAL_OK;
		1717	}
		1718	else
		1719	{
		1720	return HAL_BUSY;
		1721	}
		1722	}
		1723
		1724	/**
		1725	* @brief Write an amount of data in blocking mode to a specific memory address
5	mjames	1726	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	1727	* the configuration information for the specified I2C.
5	mjames	1728	* @param DevAddress Target device address
		1729	* @param MemAddress Internal memory address
		1730	* @param MemAddSize Size of internal memory address
		1731	* @param pData Pointer to data buffer
		1732	* @param Size Amount of data to be sent
		1733	* @param Timeout Timeout duration
2	mjames	1734	* @retval HAL status
		1735	*/
		1736	HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size, uint32_t Timeout)
		1737	{
		1738	/* Check the parameters */
		1739	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
		1740
		1741	if(hi2c->State == HAL_I2C_STATE_READY)
		1742	{
		1743	if((pData == NULL) \|\| (Size == 0))
		1744	{
		1745	return HAL_ERROR;
		1746	}
		1747
		1748	/* Wait until BUSY flag is reset */
		1749	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
		1750	{
		1751	return HAL_BUSY;
		1752	}
		1753
		1754	/* Process Locked */
		1755	__HAL_LOCK(hi2c);
		1756
		1757	/* Disable Pos */
		1758	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
		1759
5	mjames	1760	hi2c->State = HAL_I2C_STATE_BUSY_TX;
		1761	hi2c->Mode = HAL_I2C_MODE_MEM;
2	mjames	1762	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
		1763
		1764	/* Send Slave Address and Memory Address */
		1765	if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK)
		1766	{
		1767	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		1768	{
		1769	/* Process Unlocked */
		1770	__HAL_UNLOCK(hi2c);
		1771	return HAL_ERROR;
		1772	}
		1773	else
		1774	{
		1775	/* Process Unlocked */
		1776	__HAL_UNLOCK(hi2c);
		1777	return HAL_TIMEOUT;
		1778	}
		1779	}
		1780
		1781	while(Size > 0)
		1782	{
		1783	/* Wait until TXE flag is set */
5	mjames	1784	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
2	mjames	1785	{
5	mjames	1786	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		1787	{
		1788	/* Generate Stop */
		1789	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
		1790	return HAL_ERROR;
		1791	}
		1792	else
		1793	{
		1794	return HAL_TIMEOUT;
		1795	}
2	mjames	1796	}
		1797
		1798	/* Write data to DR */
		1799	hi2c->Instance->DR = (*pData++);
		1800	Size--;
		1801
		1802	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
		1803	{
		1804	/* Write data to DR */
		1805	hi2c->Instance->DR = (*pData++);
		1806	Size--;
		1807	}
		1808	}
		1809
		1810	/* Wait until TXE flag is set */
5	mjames	1811	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
2	mjames	1812	{
5	mjames	1813	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		1814	{
		1815	/* Generate Stop */
		1816	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
		1817	return HAL_ERROR;
		1818	}
		1819	else
		1820	{
		1821	return HAL_TIMEOUT;
		1822	}
2	mjames	1823	}
		1824
		1825	/* Generate Stop */
		1826	SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
		1827
		1828	hi2c->State = HAL_I2C_STATE_READY;
5	mjames	1829	hi2c->Mode = HAL_I2C_MODE_NONE;
2	mjames	1830
		1831	/* Process Unlocked */
		1832	__HAL_UNLOCK(hi2c);
		1833
		1834	return HAL_OK;
		1835	}
		1836	else
		1837	{
		1838	return HAL_BUSY;
		1839	}
		1840	}
		1841
		1842	/**
		1843	* @brief Read an amount of data in blocking mode from a specific memory address
5	mjames	1844	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	1845	* the configuration information for the specified I2C.
5	mjames	1846	* @param DevAddress Target device address
		1847	* @param MemAddress Internal memory address
		1848	* @param MemAddSize Size of internal memory address
		1849	* @param pData Pointer to data buffer
		1850	* @param Size Amount of data to be sent
		1851	* @param Timeout Timeout duration
2	mjames	1852	* @retval HAL status
		1853	*/
		1854	HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size, uint32_t Timeout)
		1855	{
		1856	/* Check the parameters */
		1857	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
		1858
		1859	if(hi2c->State == HAL_I2C_STATE_READY)
		1860	{
		1861	if((pData == NULL) \|\| (Size == 0))
		1862	{
		1863	return HAL_ERROR;
		1864	}
		1865
		1866	/* Wait until BUSY flag is reset */
		1867	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
		1868	{
		1869	return HAL_BUSY;
		1870	}
		1871
		1872	/* Process Locked */
		1873	__HAL_LOCK(hi2c);
		1874
		1875	/* Disable Pos */
		1876	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
		1877
5	mjames	1878	hi2c->State = HAL_I2C_STATE_BUSY_RX;
		1879	hi2c->Mode = HAL_I2C_MODE_MEM;
2	mjames	1880	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
		1881
		1882	/* Send Slave Address and Memory Address */
		1883	if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK)
		1884	{
		1885	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		1886	{
		1887	/* Process Unlocked */
		1888	__HAL_UNLOCK(hi2c);
		1889	return HAL_ERROR;
		1890	}
		1891	else
		1892	{
		1893	/* Process Unlocked */
		1894	__HAL_UNLOCK(hi2c);
		1895	return HAL_TIMEOUT;
		1896	}
		1897	}
		1898
		1899	if(Size == 1)
		1900	{
		1901	/* Disable Acknowledge */
		1902	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		1903
5	mjames	1904	/* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
		1905	software sequence must complete before the current byte end of transfer */
		1906	__disable_irq();
		1907
2	mjames	1908	/* Clear ADDR flag */
		1909	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
		1910
		1911	/* Generate Stop */
		1912	SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
5	mjames	1913
		1914	/* Re-enable IRQs */
		1915	__enable_irq();
2	mjames	1916	}
		1917	else if(Size == 2)
		1918	{
		1919	/* Enable Pos */
		1920	SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
		1921
5	mjames	1922	/* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
		1923	software sequence must complete before the current byte end of transfer */
		1924	__disable_irq();
		1925
2	mjames	1926	/* Clear ADDR flag */
		1927	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
5	mjames	1928
		1929	/* Disable Acknowledge */
		1930	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		1931
		1932	/* Re-enable IRQs */
		1933	__enable_irq();
2	mjames	1934	}
		1935	else
		1936	{
5	mjames	1937	/* Enable Acknowledge */
		1938	SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		1939
2	mjames	1940	/* Clear ADDR flag */
		1941	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
		1942	}
		1943
		1944	while(Size > 0)
		1945	{
		1946	if(Size <= 3)
		1947	{
		1948	/* One byte */
		1949	if(Size== 1)
		1950	{
		1951	/* Wait until RXNE flag is set */
5	mjames	1952	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
2	mjames	1953	{
5	mjames	1954	if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
		1955	{
		1956	return HAL_TIMEOUT;
		1957	}
		1958	else
		1959	{
		1960	return HAL_ERROR;
		1961	}
2	mjames	1962	}
		1963
		1964	/* Read data from DR */
		1965	(*pData++) = hi2c->Instance->DR;
		1966	Size--;
		1967	}
		1968	/* Two bytes */
		1969	else if(Size == 2)
		1970	{
		1971	/* Wait until BTF flag is set */
		1972	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
		1973	{
		1974	return HAL_TIMEOUT;
		1975	}
		1976
5	mjames	1977	/* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
		1978	software sequence must complete before the current byte end of transfer */
		1979	__disable_irq();
		1980
2	mjames	1981	/* Generate Stop */
		1982	SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
		1983
		1984	/* Read data from DR */
		1985	(*pData++) = hi2c->Instance->DR;
		1986	Size--;
		1987
5	mjames	1988	/* Re-enable IRQs */
		1989	__enable_irq();
		1990
2	mjames	1991	/* Read data from DR */
		1992	(*pData++) = hi2c->Instance->DR;
		1993	Size--;
		1994	}
		1995	/* 3 Last bytes */
		1996	else
		1997	{
		1998	/* Wait until BTF flag is set */
		1999	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
		2000	{
		2001	return HAL_TIMEOUT;
		2002	}
		2003
		2004	/* Disable Acknowledge */
		2005	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		2006
5	mjames	2007	/* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
		2008	software sequence must complete before the current byte end of transfer */
		2009	__disable_irq();
		2010
2	mjames	2011	/* Read data from DR */
		2012	(*pData++) = hi2c->Instance->DR;
		2013	Size--;
		2014
		2015	/* Wait until BTF flag is set */
		2016	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
		2017	{
		2018	return HAL_TIMEOUT;
		2019	}
		2020
		2021	/* Generate Stop */
		2022	SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
		2023
		2024	/* Read data from DR */
		2025	(*pData++) = hi2c->Instance->DR;
		2026	Size--;
		2027
5	mjames	2028	/* Re-enable IRQs */
		2029	__enable_irq();
		2030
2	mjames	2031	/* Read data from DR */
		2032	(*pData++) = hi2c->Instance->DR;
		2033	Size--;
		2034	}
		2035	}
		2036	else
		2037	{
		2038	/* Wait until RXNE flag is set */
5	mjames	2039	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
2	mjames	2040	{
5	mjames	2041	if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
		2042	{
		2043	return HAL_TIMEOUT;
		2044	}
		2045	else
		2046	{
		2047	return HAL_ERROR;
		2048	}
2	mjames	2049	}
		2050
		2051	/* Read data from DR */
		2052	(*pData++) = hi2c->Instance->DR;
		2053	Size--;
		2054
		2055	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
		2056	{
		2057	/* Read data from DR */
		2058	(*pData++) = hi2c->Instance->DR;
		2059	Size--;
		2060	}
		2061	}
		2062	}
		2063
		2064	hi2c->State = HAL_I2C_STATE_READY;
5	mjames	2065	hi2c->Mode = HAL_I2C_MODE_NONE;
2	mjames	2066
		2067	/* Process Unlocked */
		2068	__HAL_UNLOCK(hi2c);
		2069
		2070	return HAL_OK;
		2071	}
		2072	else
		2073	{
		2074	return HAL_BUSY;
		2075	}
		2076	}
		2077
		2078	/**
5	mjames	2079	* @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory address
		2080	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	2081	* the configuration information for the specified I2C.
5	mjames	2082	* @param DevAddress Target device address
		2083	* @param MemAddress Internal memory address
		2084	* @param MemAddSize Size of internal memory address
		2085	* @param pData Pointer to data buffer
		2086	* @param Size Amount of data to be sent
2	mjames	2087	* @retval HAL status
		2088	*/
		2089	HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
		2090	{
		2091	/* Check the parameters */
		2092	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
		2093
		2094	if(hi2c->State == HAL_I2C_STATE_READY)
		2095	{
		2096	if((pData == NULL) \|\| (Size == 0))
		2097	{
		2098	return HAL_ERROR;
		2099	}
		2100
		2101	/* Wait until BUSY flag is reset */
		2102	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
		2103	{
		2104	return HAL_BUSY;
		2105	}
		2106
		2107	/* Process Locked */
		2108	__HAL_LOCK(hi2c);
		2109
		2110	/* Disable Pos */
		2111	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
		2112
5	mjames	2113	hi2c->State = HAL_I2C_STATE_BUSY_TX;
		2114	hi2c->Mode = HAL_I2C_MODE_MEM;
2	mjames	2115	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
		2116
		2117	hi2c->pBuffPtr = pData;
		2118	hi2c->XferSize = Size;
		2119	hi2c->XferCount = Size;
		2120
		2121	/* Send Slave Address and Memory Address */
		2122	if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
		2123	{
		2124	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		2125	{
		2126	/* Process Unlocked */
		2127	__HAL_UNLOCK(hi2c);
		2128	return HAL_ERROR;
		2129	}
		2130	else
		2131	{
		2132	/* Process Unlocked */
		2133	__HAL_UNLOCK(hi2c);
		2134	return HAL_TIMEOUT;
		2135	}
		2136	}
		2137
		2138	/* Process Unlocked */
		2139	__HAL_UNLOCK(hi2c);
		2140
		2141	/* Note : The I2C interrupts must be enabled after unlocking current process
		2142	to avoid the risk of I2C interrupt handle execution before current
		2143	process unlock */
		2144
		2145	/* Enable EVT, BUF and ERR interrupt */
		2146	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
		2147
		2148	return HAL_OK;
		2149	}
		2150	else
		2151	{
		2152	return HAL_BUSY;
		2153	}
		2154	}
		2155
		2156	/**
5	mjames	2157	* @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory address
		2158	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	2159	* the configuration information for the specified I2C.
5	mjames	2160	* @param DevAddress Target device address
		2161	* @param MemAddress Internal memory address
		2162	* @param MemAddSize Size of internal memory address
		2163	* @param pData Pointer to data buffer
		2164	* @param Size Amount of data to be sent
2	mjames	2165	* @retval HAL status
		2166	*/
		2167	HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
		2168	{
		2169	/* Check the parameters */
		2170	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
		2171
		2172	if(hi2c->State == HAL_I2C_STATE_READY)
		2173	{
		2174	if((pData == NULL) \|\| (Size == 0))
		2175	{
		2176	return HAL_ERROR;
		2177	}
		2178
		2179	/* Wait until BUSY flag is reset */
		2180	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
		2181	{
		2182	return HAL_BUSY;
		2183	}
		2184
		2185	/* Process Locked */
		2186	__HAL_LOCK(hi2c);
		2187
		2188	/* Disable Pos */
		2189	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
		2190
5	mjames	2191	hi2c->State = HAL_I2C_STATE_BUSY_RX;
		2192	hi2c->Mode = HAL_I2C_MODE_MEM;
2	mjames	2193	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
		2194
		2195	hi2c->pBuffPtr = pData;
		2196	hi2c->XferSize = Size;
		2197	hi2c->XferCount = Size;
		2198
		2199	/* Send Slave Address and Memory Address */
		2200	if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
		2201	{
		2202	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		2203	{
		2204	/* Process Unlocked */
		2205	__HAL_UNLOCK(hi2c);
		2206	return HAL_ERROR;
		2207	}
		2208	else
		2209	{
		2210	/* Process Unlocked */
		2211	__HAL_UNLOCK(hi2c);
		2212	return HAL_TIMEOUT;
		2213	}
		2214	}
		2215
		2216	if(hi2c->XferCount == 1)
		2217	{
		2218	/* Disable Acknowledge */
		2219	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		2220
		2221	/* Clear ADDR flag */
		2222	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
		2223
		2224	/* Generate Stop */
		2225	SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
		2226	}
		2227	else if(hi2c->XferCount == 2)
		2228	{
		2229	/* Enable Pos */
		2230	SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
		2231
		2232	/* Clear ADDR flag */
		2233	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
5	mjames	2234
		2235	/* Disable Acknowledge */
		2236	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
2	mjames	2237	}
		2238	else
		2239	{
		2240	/* Enable Acknowledge */
		2241	SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		2242
		2243	/* Clear ADDR flag */
		2244	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
		2245	}
		2246
		2247	/* Process Unlocked */
		2248	__HAL_UNLOCK(hi2c);
		2249
		2250	/* Note : The I2C interrupts must be enabled after unlocking current process
		2251	to avoid the risk of I2C interrupt handle execution before current
		2252	process unlock */
		2253
		2254	/* Enable EVT, BUF and ERR interrupt */
		2255	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
		2256
		2257	return HAL_OK;
		2258	}
		2259	else
		2260	{
		2261	return HAL_BUSY;
		2262	}
		2263	}
		2264
		2265
		2266	/**
5	mjames	2267	* @brief Write an amount of data in non-blocking mode with DMA to a specific memory address
		2268	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	2269	* the configuration information for the specified I2C.
5	mjames	2270	* @param DevAddress Target device address
		2271	* @param MemAddress Internal memory address
		2272	* @param MemAddSize Size of internal memory address
		2273	* @param pData Pointer to data buffer
		2274	* @param Size Amount of data to be sent
2	mjames	2275	* @retval HAL status
		2276	*/
		2277	HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
		2278	{
		2279	/* Check the parameters */
		2280	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
		2281
		2282	if(hi2c->State == HAL_I2C_STATE_READY)
		2283	{
		2284	if((pData == NULL) \|\| (Size == 0))
		2285	{
		2286	return HAL_ERROR;
		2287	}
		2288
		2289	/* Wait until BUSY flag is reset */
		2290	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
		2291	{
		2292	return HAL_BUSY;
		2293	}
		2294
		2295	/* Process Locked */
		2296	__HAL_LOCK(hi2c);
		2297
		2298	/* Disable Pos */
		2299	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
		2300
5	mjames	2301	hi2c->State = HAL_I2C_STATE_BUSY_TX;
		2302	hi2c->Mode = HAL_I2C_MODE_MEM;
2	mjames	2303	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
		2304
		2305	hi2c->pBuffPtr = pData;
		2306	hi2c->XferSize = Size;
		2307	hi2c->XferCount = Size;
		2308
		2309	/* Set the I2C DMA transfert complete callback */
		2310	hi2c->hdmatx->XferCpltCallback = I2C_DMAMemTransmitCplt;
		2311
		2312	/* Set the DMA error callback */
		2313	hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
		2314
		2315	/* Enable the DMA channel */
		2316	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
		2317
		2318	/* Send Slave Address and Memory Address */
		2319	if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
		2320	{
		2321	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		2322	{
		2323	/* Process Unlocked */
		2324	__HAL_UNLOCK(hi2c);
		2325	return HAL_ERROR;
		2326	}
		2327	else
		2328	{
		2329	/* Process Unlocked */
		2330	__HAL_UNLOCK(hi2c);
		2331	return HAL_TIMEOUT;
		2332	}
		2333	}
		2334
		2335	/* Enable DMA Request */
		2336	SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
		2337
		2338	/* Process Unlocked */
		2339	__HAL_UNLOCK(hi2c);
		2340
		2341	return HAL_OK;
		2342	}
		2343	else
		2344	{
		2345	return HAL_BUSY;
		2346	}
		2347	}
		2348
		2349	/**
5	mjames	2350	* @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address.
		2351	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	2352	* the configuration information for the specified I2C.
5	mjames	2353	* @param DevAddress Target device address
		2354	* @param MemAddress Internal memory address
		2355	* @param MemAddSize Size of internal memory address
		2356	* @param pData Pointer to data buffer
		2357	* @param Size Amount of data to be read
2	mjames	2358	* @retval HAL status
		2359	*/
		2360	HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
		2361	{
		2362	/* Check the parameters */
		2363	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
		2364
		2365	if(hi2c->State == HAL_I2C_STATE_READY)
		2366	{
		2367	if((pData == NULL) \|\| (Size == 0))
		2368	{
		2369	return HAL_ERROR;
		2370	}
		2371
		2372	/* Wait until BUSY flag is reset */
		2373	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
		2374	{
		2375	return HAL_BUSY;
		2376	}
		2377
		2378	/* Process Locked */
		2379	__HAL_LOCK(hi2c);
		2380
		2381	/* Disable Pos */
		2382	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
		2383
5	mjames	2384	hi2c->State = HAL_I2C_STATE_BUSY_RX;
		2385	hi2c->Mode = HAL_I2C_MODE_MEM;
2	mjames	2386	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
		2387
		2388	hi2c->pBuffPtr = pData;
		2389	hi2c->XferSize = Size;
		2390	hi2c->XferCount = Size;
		2391
		2392	/* Set the I2C DMA transfert complete callback */
		2393	hi2c->hdmarx->XferCpltCallback = I2C_DMAMemReceiveCplt;
		2394
		2395	/* Set the DMA error callback */
		2396	hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
		2397
		2398	/* Enable the DMA channel */
		2399	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
		2400
		2401	/* Send Slave Address and Memory Address */
		2402	if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
		2403	{
		2404	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		2405	{
		2406	/* Process Unlocked */
		2407	__HAL_UNLOCK(hi2c);
		2408	return HAL_ERROR;
		2409	}
		2410	else
		2411	{
		2412	/* Process Unlocked */
		2413	__HAL_UNLOCK(hi2c);
		2414	return HAL_TIMEOUT;
		2415	}
		2416	}
		2417
		2418	if(Size == 1)
		2419	{
		2420	/* Disable Acknowledge */
		2421	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		2422	}
		2423	else
		2424	{
		2425	/* Enable Last DMA bit */
		2426	SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
		2427	}
		2428
		2429	/* Enable DMA Request */
		2430	SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
		2431
		2432	/* Clear ADDR flag */
		2433	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
		2434
		2435	/* Process Unlocked */
		2436	__HAL_UNLOCK(hi2c);
		2437
		2438	return HAL_OK;
		2439	}
		2440	else
		2441	{
		2442	return HAL_BUSY;
		2443	}
		2444	}
		2445
		2446
		2447	/**
		2448	* @brief Checks if target device is ready for communication.
		2449	* @note This function is used with Memory devices
5	mjames	2450	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	2451	* the configuration information for the specified I2C.
5	mjames	2452	* @param DevAddress Target device address
		2453	* @param Trials Number of trials
		2454	* @param Timeout Timeout duration
2	mjames	2455	* @retval HAL status
		2456	*/
		2457	HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
		2458	{
		2459	uint32_t tickstart = 0, tmp1 = 0, tmp2 = 0, tmp3 = 0, I2C_Trials = 1;
		2460
		2461	if(hi2c->State == HAL_I2C_STATE_READY)
		2462	{
		2463	/* Wait until BUSY flag is reset */
		2464	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
		2465	{
		2466	return HAL_BUSY;
		2467	}
		2468
		2469	/* Process Locked */
		2470	__HAL_LOCK(hi2c);
		2471
		2472	/* Disable Pos */
		2473	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
		2474
		2475	hi2c->State = HAL_I2C_STATE_BUSY;
		2476	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
		2477
		2478	do
		2479	{
		2480	/* Generate Start */
		2481	SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
		2482
		2483	/* Wait until SB flag is set */
		2484	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
		2485	{
		2486	return HAL_TIMEOUT;
		2487	}
		2488
		2489	/* Send slave address */
		2490	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
		2491
		2492	/* Wait until ADDR or AF flag are set */
		2493	/* Get tick */
		2494	tickstart = HAL_GetTick();
		2495
		2496	tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
		2497	tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
		2498	tmp3 = hi2c->State;
		2499	while((tmp1 == RESET) && (tmp2 == RESET) && (tmp3 != HAL_I2C_STATE_TIMEOUT))
		2500	{
		2501	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
		2502	{
		2503	hi2c->State = HAL_I2C_STATE_TIMEOUT;
		2504	}
		2505	tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
		2506	tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
		2507	tmp3 = hi2c->State;
		2508	}
		2509
		2510	hi2c->State = HAL_I2C_STATE_READY;
		2511
		2512	/* Check if the ADDR flag has been set */
		2513	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
		2514	{
		2515	/* Generate Stop */
		2516	SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
		2517
		2518	/* Clear ADDR Flag */
		2519	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
		2520
		2521	/* Wait until BUSY flag is reset */
		2522	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
		2523	{
		2524	return HAL_TIMEOUT;
		2525	}
		2526
		2527	hi2c->State = HAL_I2C_STATE_READY;
		2528
		2529	/* Process Unlocked */
		2530	__HAL_UNLOCK(hi2c);
		2531
		2532	return HAL_OK;
		2533	}
		2534	else
		2535	{
		2536	/* Generate Stop */
		2537	SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
		2538
		2539	/* Clear AF Flag */
		2540	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
		2541
		2542	/* Wait until BUSY flag is reset */
		2543	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK)
		2544	{
		2545	return HAL_TIMEOUT;
		2546	}
		2547	}
		2548	}while(I2C_Trials++ < Trials);
		2549
		2550	hi2c->State = HAL_I2C_STATE_READY;
		2551
		2552	/* Process Unlocked */
		2553	__HAL_UNLOCK(hi2c);
		2554
		2555	return HAL_ERROR;
		2556	}
		2557	else
		2558	{
		2559	return HAL_BUSY;
		2560	}
		2561	}
		2562	/**
		2563	* @}
		2564	*/
		2565
		2566	/** @defgroup I2C_Exported_Functions_Group4 IRQ Handler and Callbacks
		2567	* @{
		2568	*/
		2569
		2570	/**
		2571	* @brief This function handles I2C event interrupt request.
5	mjames	2572	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	2573	* the configuration information for the specified I2C.
		2574	* @retval None
		2575	*/
		2576	void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
		2577	{
		2578	uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0, tmp4 = 0;
5	mjames	2579	/* Master or Memory mode selected */
		2580	if((hi2c->Mode == HAL_I2C_MODE_MASTER) \|\| \
		2581	(hi2c->Mode == HAL_I2C_MODE_MEM))
2	mjames	2582	{
		2583	/* I2C in mode Transmitter -----------------------------------------------*/
		2584	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == SET)
		2585	{
		2586	tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE);
		2587	tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF);
		2588	tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF);
		2589	tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT);
		2590	/* TXE set and BTF reset -----------------------------------------------*/
		2591	if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET))
		2592	{
		2593	I2C_MasterTransmit_TXE(hi2c);
		2594	}
		2595	/* BTF set -------------------------------------------------------------*/
		2596	else if((tmp3 == SET) && (tmp4 == SET))
		2597	{
		2598	I2C_MasterTransmit_BTF(hi2c);
		2599	}
		2600	}
		2601	/* I2C in mode Receiver --------------------------------------------------*/
		2602	else
		2603	{
		2604	tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE);
		2605	tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF);
		2606	tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF);
		2607	tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT);
		2608	/* RXNE set and BTF reset -----------------------------------------------*/
		2609	if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET))
		2610	{
		2611	I2C_MasterReceive_RXNE(hi2c);
		2612	}
		2613	/* BTF set -------------------------------------------------------------*/
		2614	else if((tmp3 == SET) && (tmp4 == SET))
		2615	{
		2616	I2C_MasterReceive_BTF(hi2c);
		2617	}
		2618	}
		2619	}
		2620	/* Slave mode selected */
		2621	else
		2622	{
		2623	tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
		2624	tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_EVT));
		2625	tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF);
		2626	tmp4 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA);
		2627	/* ADDR set --------------------------------------------------------------*/
		2628	if((tmp1 == SET) && (tmp2 == SET))
		2629	{
		2630	I2C_Slave_ADDR(hi2c);
		2631	}
		2632	/* STOPF set --------------------------------------------------------------*/
		2633	else if((tmp3 == SET) && (tmp2 == SET))
		2634	{
		2635	I2C_Slave_STOPF(hi2c);
		2636	}
		2637	/* I2C in mode Transmitter -----------------------------------------------*/
		2638	else if(tmp4 == SET)
		2639	{
		2640	tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE);
		2641	tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF);
		2642	tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF);
		2643	tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT);
		2644	/* TXE set and BTF reset -----------------------------------------------*/
		2645	if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET))
		2646	{
		2647	I2C_SlaveTransmit_TXE(hi2c);
		2648	}
		2649	/* BTF set -------------------------------------------------------------*/
		2650	else if((tmp3 == SET) && (tmp4 == SET))
		2651	{
		2652	I2C_SlaveTransmit_BTF(hi2c);
		2653	}
		2654	}
		2655	/* I2C in mode Receiver --------------------------------------------------*/
		2656	else
		2657	{
		2658	tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE);
		2659	tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF);
		2660	tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF);
		2661	tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT);
		2662	/* RXNE set and BTF reset ----------------------------------------------*/
		2663	if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET))
		2664	{
		2665	I2C_SlaveReceive_RXNE(hi2c);
		2666	}
		2667	/* BTF set -------------------------------------------------------------*/
		2668	else if((tmp3 == SET) && (tmp4 == SET))
		2669	{
		2670	I2C_SlaveReceive_BTF(hi2c);
		2671	}
		2672	}
		2673	}
		2674	}
		2675
		2676	/**
		2677	* @brief This function handles I2C error interrupt request.
		2678	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
		2679	* the configuration information for I2C module
		2680	* @retval HAL status
		2681	*/
		2682	void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
		2683	{
		2684	uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0;
		2685
		2686	tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BERR);
		2687	tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR);
		2688	/* I2C Bus error interrupt occurred ----------------------------------------*/
		2689	if((tmp1 == SET) && (tmp2 == SET))
		2690	{
		2691	hi2c->ErrorCode \|= HAL_I2C_ERROR_BERR;
		2692
		2693	/* Clear BERR flag */
		2694	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
		2695
		2696	/* Workaround: Start cannot be generated after a misplaced Stop */
		2697	SET_BIT(hi2c->Instance->CR1, I2C_CR1_SWRST);
		2698	}
		2699
		2700	tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ARLO);
		2701	tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR);
		2702	/* I2C Arbitration Loss error interrupt occurred ---------------------------*/
		2703	if((tmp1 == SET) && (tmp2 == SET))
		2704	{
		2705	hi2c->ErrorCode \|= HAL_I2C_ERROR_ARLO;
		2706
		2707	/* Clear ARLO flag */
		2708	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
		2709	}
		2710
		2711	tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
		2712	tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR);
		2713	/* I2C Acknowledge failure error interrupt occurred ------------------------*/
		2714	if((tmp1 == SET) && (tmp2 == SET))
		2715	{
5	mjames	2716	tmp1 = hi2c->Mode;
2	mjames	2717	tmp2 = hi2c->XferCount;
		2718	tmp3 = hi2c->State;
5	mjames	2719	if((tmp1 == HAL_I2C_MODE_SLAVE) && (tmp2 == 0) && \
		2720	(tmp3 == HAL_I2C_STATE_BUSY_TX))
2	mjames	2721	{
		2722	I2C_Slave_AF(hi2c);
		2723	}
		2724	else
		2725	{
		2726	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
5	mjames	2727
		2728	/* Generate Stop */
		2729	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
		2730
2	mjames	2731	/* Clear AF flag */
		2732	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
		2733	}
		2734	}
		2735
		2736	tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_OVR);
		2737	tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR);
		2738	/* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/
		2739	if((tmp1 == SET) && (tmp2 == SET))
		2740	{
		2741	hi2c->ErrorCode \|= HAL_I2C_ERROR_OVR;
		2742	/* Clear OVR flag */
		2743	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
		2744	}
		2745
		2746	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
		2747	{
		2748	hi2c->State = HAL_I2C_STATE_READY;
		2749
		2750	/* Disable Pos bit in I2C CR1 when error occured in Master/Mem Receive IT Process */
		2751	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
		2752
		2753	HAL_I2C_ErrorCallback(hi2c);
		2754	}
		2755	}
		2756
		2757	/**
5	mjames	2758	* @brief Master Tx Transfer completed callback.
		2759	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	2760	* the configuration information for the specified I2C.
		2761	* @retval None
		2762	*/
		2763	__weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
		2764	{
5	mjames	2765	/* Prevent unused argument(s) compilation warning */
		2766	UNUSED(hi2c);
		2767	/* NOTE : This function should not be modified, when the callback is needed,
2	mjames	2768	the HAL_I2C_TxCpltCallback could be implemented in the user file
		2769	*/
		2770	}
		2771
		2772	/**
5	mjames	2773	* @brief Master Rx Transfer completed callback.
		2774	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	2775	* the configuration information for the specified I2C.
		2776	* @retval None
		2777	*/
		2778	__weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
		2779	{
5	mjames	2780	/* Prevent unused argument(s) compilation warning */
		2781	UNUSED(hi2c);
		2782	/* NOTE : This function should not be modified, when the callback is needed,
2	mjames	2783	the HAL_I2C_TxCpltCallback could be implemented in the user file
		2784	*/
		2785	}
		2786
5	mjames	2787	/** @brief Slave Tx Transfer completed callback.
		2788	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	2789	* the configuration information for the specified I2C.
		2790	* @retval None
		2791	*/
		2792	__weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
		2793	{
5	mjames	2794	/* Prevent unused argument(s) compilation warning */
		2795	UNUSED(hi2c);
		2796	/* NOTE : This function should not be modified, when the callback is needed,
2	mjames	2797	the HAL_I2C_TxCpltCallback could be implemented in the user file
		2798	*/
		2799	}
		2800
		2801	/**
5	mjames	2802	* @brief Slave Rx Transfer completed callback.
		2803	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	2804	* the configuration information for the specified I2C.
		2805	* @retval None
		2806	*/
		2807	__weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
		2808	{
5	mjames	2809	/* Prevent unused argument(s) compilation warning */
		2810	UNUSED(hi2c);
		2811	/* NOTE : This function should not be modified, when the callback is needed,
2	mjames	2812	the HAL_I2C_TxCpltCallback could be implemented in the user file
		2813	*/
		2814	}
		2815
		2816	/**
5	mjames	2817	* @brief Memory Tx Transfer completed callback.
		2818	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	2819	* the configuration information for the specified I2C.
		2820	* @retval None
		2821	*/
		2822	__weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
		2823	{
5	mjames	2824	/* Prevent unused argument(s) compilation warning */
		2825	UNUSED(hi2c);
		2826	/* NOTE : This function should not be modified, when the callback is needed,
2	mjames	2827	the HAL_I2C_TxCpltCallback could be implemented in the user file
		2828	*/
		2829	}
		2830
		2831	/**
5	mjames	2832	* @brief Memory Rx Transfer completed callback.
		2833	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	2834	* the configuration information for the specified I2C.
		2835	* @retval None
		2836	*/
		2837	__weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
		2838	{
5	mjames	2839	/* Prevent unused argument(s) compilation warning */
		2840	UNUSED(hi2c);
		2841	/* NOTE : This function should not be modified, when the callback is needed,
2	mjames	2842	the HAL_I2C_TxCpltCallback could be implemented in the user file
		2843	*/
		2844	}
		2845
		2846	/**
5	mjames	2847	* @brief I2C error callback.
		2848	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	2849	* the configuration information for the specified I2C.
		2850	* @retval None
		2851	*/
		2852	__weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
		2853	{
5	mjames	2854	/* Prevent unused argument(s) compilation warning */
		2855	UNUSED(hi2c);
		2856	/* NOTE : This function should not be modified, when the callback is needed,
2	mjames	2857	the HAL_I2C_ErrorCallback could be implemented in the user file
		2858	*/
		2859	}
		2860
		2861	/**
		2862	* @}
		2863	*/
		2864
		2865
		2866	/** @defgroup I2C_Exported_Functions_Group3 Peripheral State and Errors functions
		2867	* @brief Peripheral State and Errors functions
		2868	*
		2869	@verbatim
		2870	===============================================================================
		2871	##### Peripheral State and Errors functions #####
		2872	===============================================================================
		2873	[..]
		2874	This subsection permits to get in run-time the status of the peripheral
		2875	and the data flow.
		2876
		2877	@endverbatim
		2878	* @{
		2879	*/
		2880
		2881	/**
5	mjames	2882	* @brief Return the I2C handle state.
		2883	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	2884	* the configuration information for the specified I2C.
		2885	* @retval HAL state
		2886	*/
		2887	HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
		2888	{
5	mjames	2889	/* Return I2C handle state */
2	mjames	2890	return hi2c->State;
		2891	}
		2892
		2893	/**
5	mjames	2894	* @brief Return the I2C error code.
		2895	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	2896	* the configuration information for the specified I2C.
		2897	* @retval I2C Error Code
		2898	*/
		2899	uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
		2900	{
		2901	return hi2c->ErrorCode;
		2902	}
		2903
		2904	/**
		2905	* @}
		2906	*/
		2907
		2908	/**
		2909	* @}
		2910	*/
		2911
		2912	/** @addtogroup I2C_Private_Functions
		2913	* @{
		2914	*/
		2915
		2916	/**
		2917	* @brief Handle TXE flag for Master Transmit Mode
5	mjames	2918	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	2919	* the configuration information for the specified I2C.
		2920	* @retval HAL status
		2921	*/
		2922	static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c)
		2923	{
		2924	if(hi2c->XferCount == 0)
		2925	{
		2926	/* Disable BUF interrupt */
		2927	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
		2928	}
5	mjames	2929	else
		2930	{
		2931	/* Write data to DR */
		2932	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
		2933	hi2c->XferCount--;
		2934	}
		2935
2	mjames	2936	return HAL_OK;
		2937	}
		2938
		2939	/**
		2940	* @brief Handle BTF flag for Master Transmit Mode
5	mjames	2941	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	2942	* the configuration information for the specified I2C.
		2943	* @retval HAL status
		2944	*/
		2945	static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
		2946	{
		2947	if(hi2c->XferCount != 0)
		2948	{
		2949	/* Write data to DR */
		2950	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
		2951	hi2c->XferCount--;
		2952	}
		2953	else
		2954	{
		2955	/* Disable EVT, BUF and ERR interrupt */
		2956	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
		2957
		2958	/* Generate Stop */
		2959	SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
		2960
5	mjames	2961	if(hi2c->Mode == HAL_I2C_MODE_MEM)
2	mjames	2962	{
		2963	hi2c->State = HAL_I2C_STATE_READY;
		2964
		2965	HAL_I2C_MemTxCpltCallback(hi2c);
		2966	}
		2967	else
		2968	{
		2969	hi2c->State = HAL_I2C_STATE_READY;
		2970
		2971	HAL_I2C_MasterTxCpltCallback(hi2c);
		2972	}
		2973	}
		2974	return HAL_OK;
		2975	}
		2976
		2977	/**
		2978	* @brief Handle RXNE flag for Master Receive Mode
5	mjames	2979	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	2980	* the configuration information for the specified I2C.
		2981	* @retval HAL status
		2982	*/
		2983	static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
		2984	{
		2985	uint32_t tmp = 0;
		2986
		2987	tmp = hi2c->XferCount;
		2988	if(tmp > 3)
		2989	{
		2990	/* Read data from DR */
		2991	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
		2992	hi2c->XferCount--;
		2993	}
		2994	else if((tmp == 2) \|\| (tmp == 3))
		2995	{
		2996	/* Disable BUF interrupt */
		2997	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
		2998	}
		2999	else
		3000	{
		3001	/* Disable EVT, BUF and ERR interrupt */
		3002	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
		3003
		3004	/* Read data from DR */
		3005	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
		3006	hi2c->XferCount--;
		3007
5	mjames	3008	if(hi2c->Mode == HAL_I2C_MODE_MEM)
2	mjames	3009	{
		3010	hi2c->State = HAL_I2C_STATE_READY;
		3011
		3012	HAL_I2C_MemRxCpltCallback(hi2c);
		3013	}
		3014	else
		3015	{
		3016	hi2c->State = HAL_I2C_STATE_READY;
		3017
		3018	HAL_I2C_MasterRxCpltCallback(hi2c);
		3019	}
		3020	}
		3021	return HAL_OK;
		3022	}
		3023
		3024	/**
		3025	* @brief Handle BTF flag for Master Receive Mode
5	mjames	3026	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	3027	* the configuration information for the specified I2C.
		3028	* @retval HAL status
		3029	*/
		3030	static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
		3031	{
		3032	if(hi2c->XferCount == 3)
		3033	{
		3034	/* Disable Acknowledge */
		3035	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		3036
		3037	/* Read data from DR */
		3038	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
		3039	hi2c->XferCount--;
		3040	}
		3041	else if(hi2c->XferCount == 2)
		3042	{
		3043	/* Disable EVT and ERR interrupt */
		3044	/* Workaround - Wong data read into data register */
		3045	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
		3046
5	mjames	3047	/* Generate Stop */
		3048	SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
		3049
2	mjames	3050	/* Read data from DR */
		3051	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
		3052	hi2c->XferCount--;
		3053
		3054	/* Read data from DR */
		3055	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
		3056	hi2c->XferCount--;
		3057
5	mjames	3058	if(hi2c->Mode == HAL_I2C_MODE_MEM)
2	mjames	3059	{
		3060	hi2c->State = HAL_I2C_STATE_READY;
		3061
		3062	HAL_I2C_MemRxCpltCallback(hi2c);
		3063	}
		3064	else
		3065	{
		3066	hi2c->State = HAL_I2C_STATE_READY;
		3067
		3068	HAL_I2C_MasterRxCpltCallback(hi2c);
		3069	}
		3070	}
		3071	else
		3072	{
		3073	/* Read data from DR */
		3074	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
		3075	hi2c->XferCount--;
		3076	}
		3077	return HAL_OK;
		3078	}
		3079
		3080	/**
		3081	* @brief Handle TXE flag for Slave Transmit Mode
5	mjames	3082	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	3083	* the configuration information for the specified I2C.
		3084	* @retval HAL status
		3085	*/
		3086	static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c)
		3087	{
		3088	if(hi2c->XferCount != 0)
		3089	{
		3090	/* Write data to DR */
		3091	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
		3092	hi2c->XferCount--;
		3093	}
		3094	return HAL_OK;
		3095	}
		3096
		3097	/**
		3098	* @brief Handle BTF flag for Slave Transmit Mode
5	mjames	3099	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	3100	* the configuration information for the specified I2C.
		3101	* @retval HAL status
		3102	*/
		3103	static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c)
		3104	{
		3105	if(hi2c->XferCount != 0)
		3106	{
		3107	/* Write data to DR */
		3108	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
		3109	hi2c->XferCount--;
		3110	}
		3111	return HAL_OK;
		3112	}
		3113
		3114	/**
		3115	* @brief Handle RXNE flag for Slave Receive Mode
5	mjames	3116	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	3117	* the configuration information for the specified I2C.
		3118	* @retval HAL status
		3119	*/
		3120	static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c)
		3121	{
		3122	if(hi2c->XferCount != 0)
		3123	{
		3124	/* Read data from DR */
		3125	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
		3126	hi2c->XferCount--;
		3127	}
		3128	return HAL_OK;
		3129	}
		3130
		3131	/**
		3132	* @brief Handle BTF flag for Slave Receive Mode
5	mjames	3133	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	3134	* the configuration information for the specified I2C.
		3135	* @retval HAL status
		3136	*/
		3137	static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c)
		3138	{
		3139	if(hi2c->XferCount != 0)
		3140	{
		3141	/* Read data from DR */
		3142	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
		3143	hi2c->XferCount--;
		3144	}
		3145	return HAL_OK;
		3146	}
		3147
		3148	/**
		3149	* @brief Handle ADD flag for Slave
5	mjames	3150	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	3151	* the configuration information for the specified I2C.
		3152	* @retval HAL status
		3153	*/
		3154	static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c)
		3155	{
		3156	/* Clear ADDR flag */
		3157	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
		3158
		3159	return HAL_OK;
		3160	}
		3161
		3162	/**
		3163	* @brief Handle STOPF flag for Slave Mode
5	mjames	3164	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	3165	* the configuration information for the specified I2C.
		3166	* @retval HAL status
		3167	*/
		3168	static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c)
		3169	{
		3170	/* Disable EVT, BUF and ERR interrupt */
		3171	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
		3172
		3173	/* Clear STOPF flag */
		3174	__HAL_I2C_CLEAR_STOPFLAG(hi2c);
		3175
		3176	/* Disable Acknowledge */
		3177	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		3178
		3179	hi2c->State = HAL_I2C_STATE_READY;
		3180
		3181	HAL_I2C_SlaveRxCpltCallback(hi2c);
		3182
		3183	return HAL_OK;
		3184	}
		3185
		3186	/**
		3187	* @brief Handle Acknowledge Failed for Slave Mode
5	mjames	3188	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	3189	* the configuration information for the specified I2C.
		3190	* @retval HAL status
		3191	*/
		3192	static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c)
		3193	{
		3194	/* Disable EVT, BUF and ERR interrupt */
		3195	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
		3196
		3197	/* Clear AF flag */
		3198	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
		3199
		3200	/* Disable Acknowledge */
		3201	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		3202
		3203	hi2c->State = HAL_I2C_STATE_READY;
		3204
		3205	HAL_I2C_SlaveTxCpltCallback(hi2c);
		3206
		3207	return HAL_OK;
		3208	}
		3209
		3210	/**
		3211	* @brief Master sends target device address followed by internal memory address for write request.
5	mjames	3212	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	3213	* the configuration information for the specified I2C.
5	mjames	3214	* @param DevAddress Target device address
		3215	* @param Timeout Timeout duration
2	mjames	3216	* @retval HAL status
		3217	*/
		3218	static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout)
		3219	{
		3220	/* Generate Start */
		3221	SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
		3222
		3223	/* Wait until SB flag is set */
		3224	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
		3225	{
		3226	return HAL_TIMEOUT;
		3227	}
		3228
		3229	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
		3230	{
		3231	/* Send slave address */
		3232	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
		3233	}
		3234	else
		3235	{
		3236	/* Send header of slave address */
		3237	hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
		3238
		3239	/* Wait until ADD10 flag is set */
		3240	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout) != HAL_OK)
		3241	{
		3242	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		3243	{
		3244	return HAL_ERROR;
		3245	}
		3246	else
		3247	{
		3248	return HAL_TIMEOUT;
		3249	}
		3250	}
		3251
		3252	/* Send slave address */
		3253	hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
		3254	}
		3255
		3256	/* Wait until ADDR flag is set */
		3257	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
		3258	{
		3259	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		3260	{
		3261	return HAL_ERROR;
		3262	}
		3263	else
		3264	{
		3265	return HAL_TIMEOUT;
		3266	}
		3267	}
		3268
		3269	return HAL_OK;
		3270	}
		3271
		3272	/**
		3273	* @brief Master sends target device address followed by internal memory address for read request.
5	mjames	3274	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	3275	* the configuration information for the specified I2C.
5	mjames	3276	* @param DevAddress Target device address
		3277	* @param Timeout Timeout duration
2	mjames	3278	* @retval HAL status
		3279	*/
		3280	static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout)
		3281	{
		3282	/* Enable Acknowledge */
		3283	SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		3284
		3285	/* Generate Start */
		3286	SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
		3287
		3288	/* Wait until SB flag is set */
		3289	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
		3290	{
		3291	return HAL_TIMEOUT;
		3292	}
		3293
		3294	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
		3295	{
		3296	/* Send slave address */
		3297	hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
		3298	}
		3299	else
		3300	{
		3301	/* Send header of slave address */
		3302	hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
		3303
		3304	/* Wait until ADD10 flag is set */
		3305	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout) != HAL_OK)
		3306	{
		3307	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		3308	{
		3309	return HAL_ERROR;
		3310	}
		3311	else
		3312	{
		3313	return HAL_TIMEOUT;
		3314	}
		3315	}
		3316
		3317	/* Send slave address */
		3318	hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
		3319
		3320	/* Wait until ADDR flag is set */
		3321	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
		3322	{
		3323	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		3324	{
		3325	return HAL_ERROR;
		3326	}
		3327	else
		3328	{
		3329	return HAL_TIMEOUT;
		3330	}
		3331	}
		3332
		3333	/* Clear ADDR flag */
		3334	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
		3335
		3336	/* Generate Restart */
		3337	SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
		3338
		3339	/* Wait until SB flag is set */
		3340	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
		3341	{
		3342	return HAL_TIMEOUT;
		3343	}
		3344
		3345	/* Send header of slave address */
		3346	hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress);
		3347	}
		3348
		3349	/* Wait until ADDR flag is set */
		3350	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
		3351	{
		3352	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		3353	{
		3354	return HAL_ERROR;
		3355	}
		3356	else
		3357	{
		3358	return HAL_TIMEOUT;
		3359	}
		3360	}
		3361
		3362	return HAL_OK;
		3363	}
		3364
		3365	/**
		3366	* @brief Master sends target device address followed by internal memory address for write request.
5	mjames	3367	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	3368	* the configuration information for the specified I2C.
5	mjames	3369	* @param DevAddress Target device address
		3370	* @param MemAddress Internal memory address
		3371	* @param MemAddSize Size of internal memory address
		3372	* @param Timeout Timeout duration
2	mjames	3373	* @retval HAL status
		3374	*/
		3375	static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout)
		3376	{
		3377	/* Generate Start */
		3378	SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
		3379
		3380	/* Wait until SB flag is set */
		3381	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
		3382	{
		3383	return HAL_TIMEOUT;
		3384	}
		3385
		3386	/* Send slave address */
		3387	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
		3388
		3389	/* Wait until ADDR flag is set */
		3390	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
		3391	{
		3392	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		3393	{
		3394	return HAL_ERROR;
		3395	}
		3396	else
		3397	{
		3398	return HAL_TIMEOUT;
		3399	}
		3400	}
		3401
		3402	/* Clear ADDR flag */
		3403	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
		3404
		3405	/* Wait until TXE flag is set */
5	mjames	3406	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
2	mjames	3407	{
5	mjames	3408	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		3409	{
		3410	/* Generate Stop */
		3411	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
		3412	return HAL_ERROR;
		3413	}
		3414	else
		3415	{
		3416	return HAL_TIMEOUT;
		3417	}
2	mjames	3418	}
		3419
		3420	/* If Memory address size is 8Bit */
		3421	if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
		3422	{
		3423	/* Send Memory Address */
		3424	hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
		3425	}
		3426	/* If Memory address size is 16Bit */
		3427	else
		3428	{
		3429	/* Send MSB of Memory Address */
		3430	hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
		3431
		3432	/* Wait until TXE flag is set */
5	mjames	3433	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
2	mjames	3434	{
5	mjames	3435	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		3436	{
		3437	/* Generate Stop */
		3438	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
		3439	return HAL_ERROR;
		3440	}
		3441	else
		3442	{
		3443	return HAL_TIMEOUT;
		3444	}
2	mjames	3445	}
		3446
		3447	/* Send LSB of Memory Address */
		3448	hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
		3449	}
		3450
		3451	return HAL_OK;
		3452	}
		3453
		3454	/**
		3455	* @brief Master sends target device address followed by internal memory address for read request.
5	mjames	3456	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	3457	* the configuration information for the specified I2C.
5	mjames	3458	* @param DevAddress Target device address
		3459	* @param MemAddress Internal memory address
		3460	* @param MemAddSize Size of internal memory address
		3461	* @param Timeout Timeout duration
2	mjames	3462	* @retval HAL status
		3463	*/
		3464	static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout)
		3465	{
		3466	/* Enable Acknowledge */
		3467	SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		3468
		3469	/* Generate Start */
		3470	SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
		3471
		3472	/* Wait until SB flag is set */
		3473	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
		3474	{
		3475	return HAL_TIMEOUT;
		3476	}
		3477
		3478	/* Send slave address */
		3479	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
		3480
		3481	/* Wait until ADDR flag is set */
		3482	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
		3483	{
		3484	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		3485	{
		3486	return HAL_ERROR;
		3487	}
		3488	else
		3489	{
		3490	return HAL_TIMEOUT;
		3491	}
		3492	}
		3493
		3494	/* Clear ADDR flag */
		3495	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
		3496
		3497	/* Wait until TXE flag is set */
5	mjames	3498	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
2	mjames	3499	{
5	mjames	3500	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		3501	{
		3502	/* Generate Stop */
		3503	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
		3504	return HAL_ERROR;
		3505	}
		3506	else
		3507	{
		3508	return HAL_TIMEOUT;
		3509	}
2	mjames	3510	}
		3511
		3512	/* If Memory address size is 8Bit */
		3513	if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
		3514	{
		3515	/* Send Memory Address */
		3516	hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
		3517	}
		3518	/* If Memory address size is 16Bit */
		3519	else
		3520	{
		3521	/* Send MSB of Memory Address */
		3522	hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
		3523
		3524	/* Wait until TXE flag is set */
5	mjames	3525	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
2	mjames	3526	{
5	mjames	3527	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		3528	{
		3529	/* Generate Stop */
		3530	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
		3531	return HAL_ERROR;
		3532	}
		3533	else
		3534	{
		3535	return HAL_TIMEOUT;
		3536	}
2	mjames	3537	}
		3538
		3539	/* Send LSB of Memory Address */
		3540	hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
		3541	}
		3542
		3543	/* Wait until TXE flag is set */
5	mjames	3544	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout) != HAL_OK)
2	mjames	3545	{
5	mjames	3546	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		3547	{
		3548	/* Generate Stop */
		3549	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
		3550	return HAL_ERROR;
		3551	}
		3552	else
		3553	{
		3554	return HAL_TIMEOUT;
		3555	}
2	mjames	3556	}
		3557
		3558	/* Generate Restart */
		3559	SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
		3560
		3561	/* Wait until SB flag is set */
		3562	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
		3563	{
		3564	return HAL_TIMEOUT;
		3565	}
		3566
		3567	/* Send slave address */
		3568	hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
		3569
		3570	/* Wait until ADDR flag is set */
		3571	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
		3572	{
		3573	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		3574	{
		3575	return HAL_ERROR;
		3576	}
		3577	else
		3578	{
		3579	return HAL_TIMEOUT;
		3580	}
		3581	}
		3582
		3583	return HAL_OK;
		3584	}
		3585
		3586	/**
		3587	* @brief DMA I2C master transmit process complete callback.
		3588	* @param hdma: DMA handle
		3589	* @retval None
		3590	*/
		3591	static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma)
		3592	{
		3593	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
		3594
		3595	/* Wait until BTF flag is reset */
		3596	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
		3597	{
		3598	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
		3599	}
		3600
		3601	/* Generate Stop */
		3602	SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
		3603
		3604	/* Disable DMA Request */
		3605	CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
		3606
		3607	hi2c->XferCount = 0;
		3608
		3609	hi2c->State = HAL_I2C_STATE_READY;
5	mjames	3610	hi2c->Mode = HAL_I2C_MODE_NONE;
2	mjames	3611
		3612	/* Check if Errors has been detected during transfer */
		3613	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
		3614	{
		3615	HAL_I2C_ErrorCallback(hi2c);
		3616	}
		3617	else
		3618	{
		3619	HAL_I2C_MasterTxCpltCallback(hi2c);
		3620	}
		3621	}
		3622
		3623	/**
		3624	* @brief DMA I2C slave transmit process complete callback.
		3625	* @param hdma: DMA handle
		3626	* @retval None
		3627	*/
		3628	static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma)
		3629	{
		3630	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
		3631
		3632	/* Wait until AF flag is reset */
		3633	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
		3634	{
		3635	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
		3636	}
		3637
		3638	/* Clear AF flag */
		3639	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
		3640
		3641	/* Disable Address Acknowledge */
		3642	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		3643
		3644	/* Disable DMA Request */
		3645	CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
		3646
		3647	hi2c->XferCount = 0;
		3648
		3649	hi2c->State = HAL_I2C_STATE_READY;
5	mjames	3650	hi2c->Mode = HAL_I2C_MODE_NONE;
2	mjames	3651
		3652	/* Check if Errors has been detected during transfer */
		3653	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
		3654	{
		3655	HAL_I2C_ErrorCallback(hi2c);
		3656	}
		3657	else
		3658	{
		3659	HAL_I2C_SlaveTxCpltCallback(hi2c);
		3660	}
		3661	}
		3662
		3663	/**
		3664	* @brief DMA I2C master receive process complete callback
		3665	* @param hdma: DMA handle
		3666	* @retval None
		3667	*/
		3668	static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma)
		3669	{
		3670	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
		3671
		3672	/* Disable Acknowledge */
		3673	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		3674
		3675	/* Generate Stop */
		3676	SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
		3677
		3678	/* Disable Last DMA */
		3679	CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
		3680
		3681	/* Disable DMA Request */
		3682	CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
		3683
		3684	hi2c->XferCount = 0;
		3685
		3686	hi2c->State = HAL_I2C_STATE_READY;
5	mjames	3687	hi2c->Mode = HAL_I2C_MODE_NONE;
2	mjames	3688
		3689	/* Check if Errors has been detected during transfer */
		3690	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
		3691	{
		3692	HAL_I2C_ErrorCallback(hi2c);
		3693	}
		3694	else
		3695	{
		3696	HAL_I2C_MasterRxCpltCallback(hi2c);
		3697	}
		3698	}
		3699
		3700	/**
		3701	* @brief DMA I2C slave receive process complete callback.
		3702	* @param hdma: DMA handle
		3703	* @retval None
		3704	*/
		3705	static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma)
		3706	{
		3707	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
		3708
		3709	/* Wait until STOPF flag is reset */
5	mjames	3710	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_FLAG) != HAL_OK)
2	mjames	3711	{
5	mjames	3712	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
		3713	{
		3714	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
		3715	}
		3716	else
		3717	{
		3718	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
		3719	}
2	mjames	3720	}
		3721
		3722	/* Clear STOPF flag */
		3723	__HAL_I2C_CLEAR_STOPFLAG(hi2c);
		3724
		3725	/* Disable Address Acknowledge */
		3726	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		3727
		3728	/* Disable DMA Request */
		3729	CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
		3730
		3731	hi2c->XferCount = 0;
		3732
		3733	hi2c->State = HAL_I2C_STATE_READY;
5	mjames	3734	hi2c->Mode = HAL_I2C_MODE_NONE;
2	mjames	3735
		3736	/* Check if Errors has been detected during transfer */
		3737	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
		3738	{
		3739	HAL_I2C_ErrorCallback(hi2c);
		3740	}
		3741	else
		3742	{
		3743	HAL_I2C_SlaveRxCpltCallback(hi2c);
		3744	}
		3745	}
		3746
		3747	/**
		3748	* @brief DMA I2C Memory Write process complete callback
		3749	* @param hdma: DMA handle
		3750	* @retval None
		3751	*/
		3752	static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma)
		3753	{
		3754	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
		3755
		3756	/* Wait until BTF flag is reset */
		3757	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
		3758	{
		3759	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
		3760	}
		3761
		3762	/* Generate Stop */
		3763	SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
		3764
		3765	/* Disable DMA Request */
		3766	CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
		3767
		3768	hi2c->XferCount = 0;
		3769
		3770	hi2c->State = HAL_I2C_STATE_READY;
5	mjames	3771	hi2c->Mode = HAL_I2C_MODE_NONE;
2	mjames	3772
		3773	/* Check if Errors has been detected during transfer */
		3774	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
		3775	{
		3776	HAL_I2C_ErrorCallback(hi2c);
		3777	}
		3778	else
		3779	{
		3780	HAL_I2C_MemTxCpltCallback(hi2c);
		3781	}
		3782	}
		3783
		3784	/**
		3785	* @brief DMA I2C Memory Read process complete callback
		3786	* @param hdma: DMA handle
		3787	* @retval None
		3788	*/
		3789	static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma)
		3790	{
		3791	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
		3792
		3793	/* Disable Acknowledge */
		3794	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		3795
		3796	/* Generate Stop */
		3797	SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
		3798
		3799	/* Disable Last DMA */
		3800	CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
		3801
		3802	/* Disable DMA Request */
		3803	CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
		3804
		3805	hi2c->XferCount = 0;
		3806
		3807	hi2c->State = HAL_I2C_STATE_READY;
5	mjames	3808	hi2c->Mode = HAL_I2C_MODE_NONE;
2	mjames	3809
		3810	/* Check if Errors has been detected during transfer */
		3811	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
		3812	{
		3813	HAL_I2C_ErrorCallback(hi2c);
		3814	}
		3815	else
		3816	{
		3817	HAL_I2C_MemRxCpltCallback(hi2c);
		3818	}
		3819	}
		3820
		3821	/**
		3822	* @brief I2C Configuration Speed function
5	mjames	3823	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	3824	* the configuration information for the specified I2C.
		3825	* @param I2CClkSrcFreq: PCLK frequency from RCC.
		3826	* @retval CCR Speed: Speed to set in I2C CCR Register
		3827	*/
		3828	static uint32_t I2C_Configure_Speed(I2C_HandleTypeDef *hi2c, uint32_t I2CClkSrcFreq)
		3829	{
		3830	uint32_t tmp1 = 0;
		3831
		3832	/* Clock Standard Mode */
		3833	if(hi2c->Init.ClockSpeed <= I2C_STANDARD_MODE_MAX_CLK)
		3834	{
		3835	/* Calculate Value to be set in CCR register */
		3836	tmp1 = (I2CClkSrcFreq/(hi2c->Init.ClockSpeed << 1));
		3837
		3838	/* The minimum allowed value set in CCR register is 0x04 for Standard Mode */
		3839	if( (tmp1 & I2C_CCR_CCR) < 4 )
		3840	{
		3841	return 4;
		3842	}
		3843	else
		3844	{
		3845	return tmp1;
		3846	}
		3847	}
		3848	else
		3849	{
		3850	/* Clock Fast Mode */
		3851	tmp1 = I2C_CCR_FS;
		3852
		3853	/* Duty Cylce tLow/tHigh = 2 */
		3854	if(hi2c->Init.DutyCycle == I2C_DUTYCYCLE_2)
		3855	{
		3856	tmp1 \|= (I2CClkSrcFreq/(hi2c->Init.ClockSpeed * 3)) \| I2C_DUTYCYCLE_2;
		3857	}
		3858	else /* Duty Cylce tLow/tHigh = 16/9 */
		3859	{
		3860	tmp1 \|= (I2CClkSrcFreq/(hi2c->Init.ClockSpeed * 25)) \| I2C_DUTYCYCLE_16_9;
		3861	}
		3862
		3863	/* The minimum allowed value set in CCR register is 0x01 for Fast Mode */
		3864	if( (tmp1 & I2C_CCR_CCR) < 1 )
		3865	{
		3866	return 1;
		3867	}
		3868	else
		3869	{
		3870	return tmp1;
		3871	}
		3872	}
		3873	}
		3874
		3875	/**
		3876	* @brief DMA I2C communication error callback.
		3877	* @param hdma: DMA handle
		3878	* @retval None
		3879	*/
		3880	static void I2C_DMAError(DMA_HandleTypeDef *hdma)
		3881	{
		3882	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
		3883
		3884	/* Disable Acknowledge */
		3885	CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
		3886
		3887	hi2c->XferCount = 0;
		3888
		3889	hi2c->State = HAL_I2C_STATE_READY;
5	mjames	3890	hi2c->Mode = HAL_I2C_MODE_NONE;
2	mjames	3891
		3892	hi2c->ErrorCode \|= HAL_I2C_ERROR_DMA;
		3893
		3894	HAL_I2C_ErrorCallback(hi2c);
		3895	}
		3896
		3897	/**
		3898	* @brief This function handles I2C Communication Timeout.
5	mjames	3899	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	3900	* the configuration information for the specified I2C.
		3901	* @param Flag: specifies the I2C flag to check.
		3902	* @param Status: The new Flag status (SET or RESET).
5	mjames	3903	* @param Timeout Timeout duration
2	mjames	3904	* @retval HAL status
		3905	*/
		3906	static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
		3907	{
		3908	uint32_t tickstart = 0;
		3909
		3910	/* Get tick */
		3911	tickstart = HAL_GetTick();
		3912
		3913	/* Wait until flag is set */
		3914	if(Status == RESET)
		3915	{
		3916	while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
		3917	{
		3918	/* Check for the Timeout */
		3919	if(Timeout != HAL_MAX_DELAY)
		3920	{
		3921	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
		3922	{
		3923	hi2c->State= HAL_I2C_STATE_READY;
		3924
		3925	/* Process Unlocked */
		3926	__HAL_UNLOCK(hi2c);
		3927
		3928	return HAL_TIMEOUT;
		3929	}
		3930	}
		3931	}
		3932	}
		3933	else
		3934	{
		3935	while(__HAL_I2C_GET_FLAG(hi2c, Flag) != RESET)
		3936	{
		3937	/* Check for the Timeout */
		3938	if(Timeout != HAL_MAX_DELAY)
		3939	{
		3940	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
		3941	{
		3942	hi2c->State= HAL_I2C_STATE_READY;
		3943
		3944	/* Process Unlocked */
		3945	__HAL_UNLOCK(hi2c);
		3946
		3947	return HAL_TIMEOUT;
		3948	}
		3949	}
		3950	}
		3951	}
		3952	return HAL_OK;
		3953	}
		3954
		3955	/**
		3956	* @brief This function handles I2C Communication Timeout for Master addressing phase.
5	mjames	3957	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
2	mjames	3958	* the configuration information for the specified I2C.
		3959	* @param Flag: specifies the I2C flag to check.
5	mjames	3960	* @param Timeout Timeout duration
2	mjames	3961	* @retval HAL status
		3962	*/
		3963	static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout)
		3964	{
		3965	uint32_t tickstart = 0;
		3966
		3967	/* Get tick */
		3968	tickstart = HAL_GetTick();
		3969
		3970	while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
		3971	{
		3972	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
		3973	{
		3974	/* Generate Stop */
		3975	SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
		3976
		3977	/* Clear AF Flag */
		3978	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
		3979
		3980	hi2c->ErrorCode = HAL_I2C_ERROR_AF;
		3981	hi2c->State= HAL_I2C_STATE_READY;
		3982
		3983	/* Process Unlocked */
		3984	__HAL_UNLOCK(hi2c);
		3985
		3986	return HAL_ERROR;
		3987	}
		3988
		3989	/* Check for the Timeout */
		3990	if(Timeout != HAL_MAX_DELAY)
		3991	{
		3992	if((Timeout == 0)\|\|((HAL_GetTick() - tickstart ) > Timeout))
		3993	{
		3994	hi2c->State= HAL_I2C_STATE_READY;
		3995
		3996	/* Process Unlocked */
		3997	__HAL_UNLOCK(hi2c);
		3998
		3999	return HAL_TIMEOUT;
		4000	}
		4001	}
		4002	}
		4003	return HAL_OK;
		4004	}
		4005
		4006	/**
5	mjames	4007	* @brief This function handles I2C Communication Timeout for specific usage of TXE flag.
		4008	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
		4009	* the configuration information for the specified I2C.
		4010	* @param Timeout Timeout duration
		4011	* @retval HAL status
		4012	*/
		4013	static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout)
		4014	{
		4015	uint32_t tickstart = HAL_GetTick();
		4016
		4017	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
		4018	{
		4019	/* Check if a NACK is detected */
		4020	if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
		4021	{
		4022	return HAL_ERROR;
		4023	}
		4024
		4025	/* Check for the Timeout */
		4026	if(Timeout != HAL_MAX_DELAY)
		4027	{
		4028	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
		4029	{
		4030	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
		4031	hi2c->State= HAL_I2C_STATE_READY;
		4032
		4033	/* Process Unlocked */
		4034	__HAL_UNLOCK(hi2c);
		4035
		4036	return HAL_TIMEOUT;
		4037	}
		4038	}
		4039	}
		4040	return HAL_OK;
		4041	}
		4042
		4043	/**
		4044	* @brief This function handles I2C Communication Timeout for specific usage of BTF flag.
		4045	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
		4046	* the configuration information for the specified I2C.
		4047	* @param Timeout Timeout duration
		4048	* @retval HAL status
		4049	*/
		4050	static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout)
		4051	{
		4052	uint32_t tickstart = HAL_GetTick();
		4053
		4054	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
		4055	{
		4056	/* Check if a NACK is detected */
		4057	if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
		4058	{
		4059	return HAL_ERROR;
		4060	}
		4061
		4062	/* Check for the Timeout */
		4063	if(Timeout != HAL_MAX_DELAY)
		4064	{
		4065	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
		4066	{
		4067	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
		4068	hi2c->State= HAL_I2C_STATE_READY;
		4069
		4070	/* Process Unlocked */
		4071	__HAL_UNLOCK(hi2c);
		4072
		4073	return HAL_TIMEOUT;
		4074	}
		4075	}
		4076	}
		4077	return HAL_OK;
		4078	}
		4079
		4080	/**
		4081	* @brief This function handles I2C Communication Timeout for specific usage of STOP flag.
		4082	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
		4083	* the configuration information for the specified I2C.
		4084	* @param Timeout Timeout duration
		4085	* @retval HAL status
		4086	*/
		4087	static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout)
		4088	{
		4089	uint32_t tickstart = 0x00;
		4090	tickstart = HAL_GetTick();
		4091
		4092	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
		4093	{
		4094	/* Check if a NACK is detected */
		4095	if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
		4096	{
		4097	return HAL_ERROR;
		4098	}
		4099
		4100	/* Check for the Timeout */
		4101	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
		4102	{
		4103	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
		4104	hi2c->State= HAL_I2C_STATE_READY;
		4105
		4106	/* Process Unlocked */
		4107	__HAL_UNLOCK(hi2c);
		4108
		4109	return HAL_TIMEOUT;
		4110	}
		4111	}
		4112	return HAL_OK;
		4113	}
		4114
		4115	/**
		4116	* @brief This function handles I2C Communication Timeout for specific usage of RXNE flag.
		4117	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
		4118	* the configuration information for the specified I2C.
		4119	* @param Timeout Timeout duration
		4120	* @retval HAL status
		4121	*/
		4122	static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout)
		4123	{
		4124	uint32_t tickstart = 0x00;
		4125	tickstart = HAL_GetTick();
		4126
		4127	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
		4128	{
		4129	/* Check if a STOPF is detected */
		4130	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
		4131	{
		4132	/* Clear STOP Flag */
		4133	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
		4134
		4135	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
		4136	hi2c->State= HAL_I2C_STATE_READY;
		4137
		4138	/* Process Unlocked */
		4139	__HAL_UNLOCK(hi2c);
		4140
		4141	return HAL_ERROR;
		4142	}
		4143
		4144	/* Check for the Timeout */
		4145	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
		4146	{
		4147	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
		4148	hi2c->State= HAL_I2C_STATE_READY;
		4149
		4150	/* Process Unlocked */
		4151	__HAL_UNLOCK(hi2c);
		4152
		4153	return HAL_TIMEOUT;
		4154	}
		4155	}
		4156	return HAL_OK;
		4157	}
		4158
		4159	/**
		4160	* @brief This function handles Acknowledge failed detection during an I2C Communication.
		4161	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
		4162	* the configuration information for the specified I2C.
		4163	* @retval HAL status
		4164	*/
		4165	static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
		4166	{
		4167	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
		4168	{
		4169	/* Clear NACKF Flag */
		4170	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
		4171
		4172	hi2c->ErrorCode = HAL_I2C_ERROR_AF;
		4173	hi2c->State= HAL_I2C_STATE_READY;
		4174
		4175	/* Process Unlocked */
		4176	__HAL_UNLOCK(hi2c);
		4177
		4178	return HAL_ERROR;
		4179	}
		4180	return HAL_OK;
		4181	}
		4182	/**
2	mjames	4183	* @}
		4184	*/
		4185
		4186	#endif /* HAL_I2C_MODULE_ENABLED */
		4187
		4188	/**
		4189	* @}
		4190	*/
		4191
		4192	/**
		4193	* @}
		4194	*/
		4195
		4196	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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(root)/trunk/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c – Rev 5