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2 | mjames | 1 | /** |
2 | ****************************************************************************** |
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3 | * @file stm32f1xx_hal_dac_ex.c |
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4 | * @author MCD Application Team |
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5 | * @brief DAC HAL module driver. |
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6 | * This file provides firmware functions to manage the following |
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7 | * functionalities of DAC extension peripheral: |
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8 | * + Extended features functions |
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9 | * |
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10 | * |
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11 | @verbatim |
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12 | ============================================================================== |
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13 | ##### How to use this driver ##### |
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14 | ============================================================================== |
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15 | [..] |
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16 | (+) When Dual mode is enabled (i.e DAC Channel1 and Channel2 are used simultaneously) : |
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17 | Use HAL_DACEx_DualGetValue() to get digital data to be converted and use |
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18 | HAL_DACEx_DualSetValue() to set digital value to converted simultaneously in Channel 1 and Channel 2. |
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19 | (+) Use HAL_DACEx_TriangleWaveGenerate() to generate Triangle signal. |
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20 | (+) Use HAL_DACEx_NoiseWaveGenerate() to generate Noise signal. |
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21 | |||
22 | @endverbatim |
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23 | ****************************************************************************** |
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24 | * @attention |
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25 | * |
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26 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
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27 | * |
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28 | * Redistribution and use in source and binary forms, with or without modification, |
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29 | * are permitted provided that the following conditions are met: |
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30 | * 1. Redistributions of source code must retain the above copyright notice, |
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31 | * this list of conditions and the following disclaimer. |
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32 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
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33 | * this list of conditions and the following disclaimer in the documentation |
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34 | * and/or other materials provided with the distribution. |
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35 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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36 | * may be used to endorse or promote products derived from this software |
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37 | * without specific prior written permission. |
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38 | * |
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39 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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40 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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41 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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42 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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43 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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44 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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45 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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46 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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47 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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48 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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49 | * |
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50 | ****************************************************************************** |
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51 | */ |
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52 | |||
53 | |||
54 | /* Includes ------------------------------------------------------------------*/ |
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55 | #include "stm32f1xx_hal.h" |
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56 | |||
57 | /** @addtogroup STM32F1xx_HAL_Driver |
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58 | * @{ |
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59 | */ |
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60 | |||
61 | /** @defgroup DACEx DACEx |
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62 | * @brief DACEx driver module |
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63 | * @{ |
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64 | */ |
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65 | |||
66 | #ifdef HAL_DAC_MODULE_ENABLED |
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67 | #if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC) |
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68 | |||
69 | /* Private typedef -----------------------------------------------------------*/ |
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70 | /* Private define ------------------------------------------------------------*/ |
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71 | /* Private macro -------------------------------------------------------------*/ |
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72 | /* Private variables ---------------------------------------------------------*/ |
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73 | /* Private function prototypes -----------------------------------------------*/ |
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74 | /* Exported functions --------------------------------------------------------*/ |
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75 | |||
76 | /** @defgroup DACEx_Exported_Functions DACEx Exported Functions |
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77 | * @{ |
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78 | */ |
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79 | |||
80 | /** @defgroup DACEx_Exported_Functions_Group1 Extended features functions |
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81 | * @brief Extended features functions |
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82 | * |
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83 | @verbatim |
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84 | ============================================================================== |
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85 | ##### Extended features functions ##### |
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86 | ============================================================================== |
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87 | [..] This section provides functions allowing to: |
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88 | (+) Start conversion. |
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89 | (+) Stop conversion. |
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90 | (+) Start conversion and enable DMA transfer. |
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91 | (+) Stop conversion and disable DMA transfer. |
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92 | (+) Get result of conversion. |
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93 | (+) Get result of dual mode conversion. |
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94 | |||
95 | @endverbatim |
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96 | * @{ |
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97 | */ |
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98 | |||
99 | /** |
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100 | * @brief Returns the last data output value of the selected DAC channel. |
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101 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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102 | * the configuration information for the specified DAC. |
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103 | * @retval The selected DAC channel data output value. |
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104 | */ |
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105 | uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac) |
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106 | { |
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107 | uint32_t tmp = 0U; |
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108 | |||
109 | tmp |= hdac->Instance->DOR1; |
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110 | |||
111 | tmp |= hdac->Instance->DOR2 << 16U; |
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112 | |||
113 | /* Returns the DAC channel data output register value */ |
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114 | return tmp; |
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115 | } |
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116 | |||
117 | /** |
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118 | * @brief Enables or disables the selected DAC channel wave generation. |
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119 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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120 | * the configuration information for the specified DAC. |
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121 | * @param Channel: The selected DAC channel. |
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122 | * This parameter can be one of the following values: |
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123 | * DAC_CHANNEL_1 / DAC_CHANNEL_2 |
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124 | * @param Amplitude: Select max triangle amplitude. |
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125 | * This parameter can be one of the following values: |
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126 | * @arg DAC_TRIANGLEAMPLITUDE_1: Select max triangle amplitude of 1 |
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127 | * @arg DAC_TRIANGLEAMPLITUDE_3: Select max triangle amplitude of 3 |
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128 | * @arg DAC_TRIANGLEAMPLITUDE_7: Select max triangle amplitude of 7 |
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129 | * @arg DAC_TRIANGLEAMPLITUDE_15: Select max triangle amplitude of 15 |
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130 | * @arg DAC_TRIANGLEAMPLITUDE_31: Select max triangle amplitude of 31 |
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131 | * @arg DAC_TRIANGLEAMPLITUDE_63: Select max triangle amplitude of 63 |
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132 | * @arg DAC_TRIANGLEAMPLITUDE_127: Select max triangle amplitude of 127 |
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133 | * @arg DAC_TRIANGLEAMPLITUDE_255: Select max triangle amplitude of 255 |
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134 | * @arg DAC_TRIANGLEAMPLITUDE_511: Select max triangle amplitude of 511 |
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135 | * @arg DAC_TRIANGLEAMPLITUDE_1023: Select max triangle amplitude of 1023 |
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136 | * @arg DAC_TRIANGLEAMPLITUDE_2047: Select max triangle amplitude of 2047 |
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137 | * @arg DAC_TRIANGLEAMPLITUDE_4095: Select max triangle amplitude of 4095 |
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138 | * @retval HAL status |
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139 | */ |
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140 | HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude) |
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141 | { |
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142 | /* Check the parameters */ |
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143 | assert_param(IS_DAC_CHANNEL(Channel)); |
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144 | assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude)); |
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145 | |||
146 | /* Process locked */ |
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147 | __HAL_LOCK(hdac); |
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148 | |||
149 | /* Change DAC state */ |
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150 | hdac->State = HAL_DAC_STATE_BUSY; |
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151 | |||
152 | /* Enable the selected wave generation for the selected DAC channel */ |
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153 | MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_CR_WAVE1_1 | Amplitude) << Channel); |
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154 | |||
155 | /* Change DAC state */ |
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156 | hdac->State = HAL_DAC_STATE_READY; |
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157 | |||
158 | /* Process unlocked */ |
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159 | __HAL_UNLOCK(hdac); |
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160 | |||
161 | /* Return function status */ |
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162 | return HAL_OK; |
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163 | } |
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164 | |||
165 | /** |
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166 | * @brief Enables or disables the selected DAC channel wave generation. |
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167 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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168 | * the configuration information for the specified DAC. |
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169 | * @param Channel: The selected DAC channel. |
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170 | * This parameter can be one of the following values: |
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171 | * DAC_CHANNEL_1 / DAC_CHANNEL_2 |
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172 | * @param Amplitude: Unmask DAC channel LFSR for noise wave generation. |
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173 | * This parameter can be one of the following values: |
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174 | * @arg DAC_LFSRUNMASK_BIT0: Unmask DAC channel LFSR bit0 for noise wave generation |
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175 | * @arg DAC_LFSRUNMASK_BITS1_0: Unmask DAC channel LFSR bit[1:0] for noise wave generation |
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176 | * @arg DAC_LFSRUNMASK_BITS2_0: Unmask DAC channel LFSR bit[2:0] for noise wave generation |
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177 | * @arg DAC_LFSRUNMASK_BITS3_0: Unmask DAC channel LFSR bit[3:0] for noise wave generation |
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178 | * @arg DAC_LFSRUNMASK_BITS4_0: Unmask DAC channel LFSR bit[4:0] for noise wave generation |
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179 | * @arg DAC_LFSRUNMASK_BITS5_0: Unmask DAC channel LFSR bit[5:0] for noise wave generation |
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180 | * @arg DAC_LFSRUNMASK_BITS6_0: Unmask DAC channel LFSR bit[6:0] for noise wave generation |
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181 | * @arg DAC_LFSRUNMASK_BITS7_0: Unmask DAC channel LFSR bit[7:0] for noise wave generation |
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182 | * @arg DAC_LFSRUNMASK_BITS8_0: Unmask DAC channel LFSR bit[8:0] for noise wave generation |
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183 | * @arg DAC_LFSRUNMASK_BITS9_0: Unmask DAC channel LFSR bit[9:0] for noise wave generation |
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184 | * @arg DAC_LFSRUNMASK_BITS10_0: Unmask DAC channel LFSR bit[10:0] for noise wave generation |
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185 | * @arg DAC_LFSRUNMASK_BITS11_0: Unmask DAC channel LFSR bit[11:0] for noise wave generation |
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186 | * @retval HAL status |
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187 | */ |
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188 | HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude) |
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189 | { |
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190 | /* Check the parameters */ |
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191 | assert_param(IS_DAC_CHANNEL(Channel)); |
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192 | assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude)); |
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193 | |||
194 | /* Process locked */ |
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195 | __HAL_LOCK(hdac); |
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196 | |||
197 | /* Change DAC state */ |
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198 | hdac->State = HAL_DAC_STATE_BUSY; |
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199 | |||
200 | /* Enable the selected wave generation for the selected DAC channel */ |
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201 | MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_CR_WAVE1_0 | Amplitude) << Channel); |
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202 | |||
203 | /* Change DAC state */ |
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204 | hdac->State = HAL_DAC_STATE_READY; |
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205 | |||
206 | /* Process unlocked */ |
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207 | __HAL_UNLOCK(hdac); |
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208 | |||
209 | /* Return function status */ |
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210 | return HAL_OK; |
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211 | } |
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212 | |||
213 | /** |
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214 | * @brief Set the specified data holding register value for dual DAC channel. |
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215 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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216 | * the configuration information for the specified DAC. |
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217 | * @param Alignment: Specifies the data alignment for dual channel DAC. |
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218 | * This parameter can be one of the following values: |
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219 | * DAC_ALIGN_8B_R: 8bit right data alignment selected |
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220 | * DAC_ALIGN_12B_L: 12bit left data alignment selected |
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221 | * DAC_ALIGN_12B_R: 12bit right data alignment selected |
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222 | * @param Data1: Data for DAC Channel2 to be loaded in the selected data holding register. |
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223 | * @param Data2: Data for DAC Channel1 to be loaded in the selected data holding register. |
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224 | * @note In dual mode, a unique register access is required to write in both |
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225 | * DAC channels at the same time. |
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226 | * @retval HAL status |
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227 | */ |
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228 | HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef* hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2) |
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229 | { |
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230 | uint32_t data = 0U, tmp = 0U; |
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231 | |||
232 | /* Check the parameters */ |
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233 | assert_param(IS_DAC_ALIGN(Alignment)); |
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234 | assert_param(IS_DAC_DATA(Data1)); |
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235 | assert_param(IS_DAC_DATA(Data2)); |
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236 | |||
237 | /* Calculate and set dual DAC data holding register value */ |
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238 | if (Alignment == DAC_ALIGN_8B_R) |
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239 | { |
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240 | data = ((uint32_t)Data2 << 8U) | Data1; |
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241 | } |
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242 | else |
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243 | { |
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244 | data = ((uint32_t)Data2 << 16U) | Data1; |
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245 | } |
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246 | |||
247 | tmp = (uint32_t)hdac->Instance; |
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248 | tmp += DAC_DHR12RD_ALIGNMENT(Alignment); |
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249 | |||
250 | /* Set the dual DAC selected data holding register */ |
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251 | *(__IO uint32_t *)tmp = data; |
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252 | |||
253 | /* Return function status */ |
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254 | return HAL_OK; |
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255 | } |
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256 | |||
257 | /** |
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258 | * @brief Conversion complete callback in non blocking mode for Channel2 |
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259 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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260 | * the configuration information for the specified DAC. |
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261 | * @retval None |
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262 | */ |
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263 | __weak void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac) |
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264 | { |
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265 | /* Prevent unused argument(s) compilation warning */ |
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266 | UNUSED(hdac); |
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267 | /* NOTE : This function Should not be modified, when the callback is needed, |
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268 | the HAL_DACEx_ConvCpltCallbackCh2 could be implemented in the user file |
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269 | */ |
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270 | } |
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271 | |||
272 | /** |
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273 | * @brief Conversion half DMA transfer callback in non blocking mode for Channel2 |
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274 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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275 | * the configuration information for the specified DAC. |
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276 | * @retval None |
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277 | */ |
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278 | __weak void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac) |
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279 | { |
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280 | /* Prevent unused argument(s) compilation warning */ |
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281 | UNUSED(hdac); |
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282 | /* NOTE : This function Should not be modified, when the callback is needed, |
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283 | the HAL_DACEx_ConvHalfCpltCallbackCh2 could be implemented in the user file |
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284 | */ |
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285 | } |
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286 | |||
287 | /** |
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288 | * @brief Error DAC callback for Channel2. |
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289 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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290 | * the configuration information for the specified DAC. |
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291 | * @retval None |
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292 | */ |
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293 | __weak void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac) |
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294 | { |
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295 | /* Prevent unused argument(s) compilation warning */ |
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296 | UNUSED(hdac); |
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297 | /* NOTE : This function Should not be modified, when the callback is needed, |
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298 | the HAL_DACEx_ErrorCallbackCh2 could be implemented in the user file |
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299 | */ |
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300 | } |
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301 | |||
302 | #if defined (STM32F100xB) || defined (STM32F100xE) |
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303 | /** |
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304 | * @brief DMA underrun DAC callback for channel1. |
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305 | * Note: For STM32F100x devices with specific feature: DMA underrun. |
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306 | * On these devices, this function uses the interruption of DMA |
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307 | * underrun. |
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308 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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309 | * the configuration information for the specified DAC. |
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310 | * @retval None |
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311 | */ |
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312 | __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac) |
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313 | { |
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314 | /* Prevent unused argument(s) compilation warning */ |
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315 | UNUSED(hdac); |
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316 | /* NOTE : This function Should not be modified, when the callback is needed, |
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317 | the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file |
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318 | */ |
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319 | } |
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320 | |||
321 | /** |
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322 | * @brief DMA underrun DAC callback for channel2. |
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323 | * Note: For STM32F100x devices with specific feature: DMA underrun. |
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324 | * On these devices, this function uses the interruption of DMA |
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325 | * underrun. |
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326 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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327 | * the configuration information for the specified DAC. |
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328 | * @retval None |
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329 | */ |
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330 | __weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac) |
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331 | { |
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332 | /* Prevent unused argument(s) compilation warning */ |
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333 | UNUSED(hdac); |
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334 | /* NOTE : This function Should not be modified, when the callback is needed, |
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335 | the HAL_DACEx_DMAUnderrunCallbackCh2 could be implemented in the user file |
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336 | */ |
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337 | } |
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338 | #endif /* STM32F100xB) || defined (STM32F100xE) */ |
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339 | |||
340 | /** |
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341 | * @} |
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342 | */ |
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343 | |||
344 | #if defined (STM32F100xB) || defined (STM32F100xE) |
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345 | /** |
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346 | * @brief Enables DAC and starts conversion of channel. |
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347 | * Note: For STM32F100x devices with specific feature: DMA underrun. |
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348 | * On these devices, this function enables the interruption of DMA |
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349 | * underrun. |
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350 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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351 | * the configuration information for the specified DAC. |
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352 | * @param Channel: The selected DAC channel. |
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353 | * This parameter can be one of the following values: |
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354 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
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355 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
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356 | * @param pData: The destination peripheral Buffer address. |
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357 | * @param Length: The length of data to be transferred from memory to DAC peripheral |
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358 | * @param Alignment: Specifies the data alignment for DAC channel. |
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359 | * This parameter can be one of the following values: |
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360 | * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected |
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361 | * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected |
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362 | * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected |
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363 | * @retval HAL status |
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364 | */ |
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365 | HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment) |
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366 | { |
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367 | uint32_t tmpreg = 0U; |
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368 | |||
369 | /* Check the parameters */ |
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370 | assert_param(IS_DAC_CHANNEL(Channel)); |
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371 | assert_param(IS_DAC_ALIGN(Alignment)); |
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372 | |||
373 | /* Process locked */ |
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374 | __HAL_LOCK(hdac); |
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375 | |||
376 | /* Change DAC state */ |
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377 | hdac->State = HAL_DAC_STATE_BUSY; |
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378 | |||
379 | if(Channel == DAC_CHANNEL_1) |
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380 | { |
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381 | /* Set the DMA transfer complete callback for channel1 */ |
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382 | hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1; |
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383 | |||
384 | /* Set the DMA half transfer complete callback for channel1 */ |
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385 | hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1; |
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386 | |||
387 | /* Set the DMA error callback for channel1 */ |
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388 | hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1; |
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389 | |||
390 | /* Enable the selected DAC channel1 DMA request */ |
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391 | SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); |
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392 | |||
393 | /* Case of use of channel 1 */ |
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394 | switch(Alignment) |
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395 | { |
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396 | case DAC_ALIGN_12B_R: |
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397 | /* Get DHR12R1 address */ |
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398 | tmpreg = (uint32_t)&hdac->Instance->DHR12R1; |
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399 | break; |
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400 | case DAC_ALIGN_12B_L: |
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401 | /* Get DHR12L1 address */ |
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402 | tmpreg = (uint32_t)&hdac->Instance->DHR12L1; |
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403 | break; |
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404 | case DAC_ALIGN_8B_R: |
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405 | /* Get DHR8R1 address */ |
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406 | tmpreg = (uint32_t)&hdac->Instance->DHR8R1; |
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407 | break; |
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408 | default: |
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409 | break; |
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410 | } |
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411 | } |
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412 | else |
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413 | { |
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414 | /* Set the DMA transfer complete callback for channel2 */ |
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415 | hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2; |
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416 | |||
417 | /* Set the DMA half transfer complete callback for channel2 */ |
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418 | hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2; |
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419 | |||
420 | /* Set the DMA error callback for channel2 */ |
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421 | hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2; |
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422 | |||
423 | /* Enable the selected DAC channel2 DMA request */ |
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424 | SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2); |
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425 | |||
426 | /* Case of use of channel 2 */ |
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427 | switch(Alignment) |
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428 | { |
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429 | case DAC_ALIGN_12B_R: |
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430 | /* Get DHR12R2 address */ |
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431 | tmpreg = (uint32_t)&hdac->Instance->DHR12R2; |
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432 | break; |
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433 | case DAC_ALIGN_12B_L: |
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434 | /* Get DHR12L2 address */ |
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435 | tmpreg = (uint32_t)&hdac->Instance->DHR12L2; |
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436 | break; |
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437 | case DAC_ALIGN_8B_R: |
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438 | /* Get DHR8R2 address */ |
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439 | tmpreg = (uint32_t)&hdac->Instance->DHR8R2; |
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440 | break; |
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441 | default: |
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442 | break; |
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443 | } |
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444 | } |
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445 | |||
446 | /* Enable the DMA channel */ |
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447 | if(Channel == DAC_CHANNEL_1) |
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448 | { |
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449 | /* Enable the DAC DMA underrun interrupt */ |
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450 | __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1); |
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451 | |||
452 | /* Enable the DMA channel */ |
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453 | HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length); |
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454 | } |
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455 | else |
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456 | { |
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457 | /* Enable the DAC DMA underrun interrupt */ |
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458 | __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2); |
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459 | |||
460 | /* Enable the DMA channel */ |
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461 | HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length); |
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462 | } |
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463 | |||
464 | /* Enable the Peripharal */ |
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465 | __HAL_DAC_ENABLE(hdac, Channel); |
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466 | |||
467 | /* Process Unlocked */ |
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468 | __HAL_UNLOCK(hdac); |
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469 | |||
470 | /* Return function status */ |
||
471 | return HAL_OK; |
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472 | } |
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473 | #endif /* STM32F100xB) || defined (STM32F100xE) */ |
||
474 | |||
475 | #if defined (STM32F100xB) || defined (STM32F100xE) |
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476 | /** |
||
477 | * @brief Disables DAC and stop conversion of channel. |
||
478 | * Note: For STM32F100x devices with specific feature: DMA underrun. |
||
479 | * On these devices, this function disables the interruption of DMA |
||
480 | * underrun. |
||
481 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
||
482 | * the configuration information for the specified DAC. |
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483 | * @param Channel: The selected DAC channel. |
||
484 | * This parameter can be one of the following values: |
||
485 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
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486 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
||
487 | * @retval HAL status |
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488 | */ |
||
489 | HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel) |
||
490 | { |
||
491 | HAL_StatusTypeDef status = HAL_OK; |
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492 | |||
493 | /* Check the parameters */ |
||
494 | assert_param(IS_DAC_CHANNEL(Channel)); |
||
495 | |||
496 | /* Disable the selected DAC channel DMA request */ |
||
497 | hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << Channel); |
||
498 | |||
499 | /* Disable the Peripharal */ |
||
500 | __HAL_DAC_DISABLE(hdac, Channel); |
||
501 | |||
502 | /* Disable the DMA Channel */ |
||
503 | /* Channel1 is used */ |
||
504 | if(Channel == DAC_CHANNEL_1) |
||
505 | { |
||
506 | /* Disable the DMA channel */ |
||
507 | status = HAL_DMA_Abort(hdac->DMA_Handle1); |
||
508 | |||
509 | /* Disable the DAC DMA underrun interrupt */ |
||
510 | __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1); |
||
511 | } |
||
512 | else /* Channel2 is used for */ |
||
513 | { |
||
514 | /* Disable the DMA channel */ |
||
515 | status = HAL_DMA_Abort(hdac->DMA_Handle2); |
||
516 | |||
517 | /* Disable the DAC DMA underrun interrupt */ |
||
518 | __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2); |
||
519 | } |
||
520 | |||
521 | /* Check if DMA Channel effectively disabled */ |
||
522 | if(status != HAL_OK) |
||
523 | { |
||
524 | /* Update ADC state machine to error */ |
||
525 | hdac->State = HAL_DAC_STATE_ERROR; |
||
526 | } |
||
527 | else |
||
528 | { |
||
529 | /* Change DAC state */ |
||
530 | hdac->State = HAL_DAC_STATE_READY; |
||
531 | } |
||
532 | |||
533 | /* Return function status */ |
||
534 | return status; |
||
535 | } |
||
536 | #endif /* STM32F100xB) || defined (STM32F100xE) */ |
||
537 | |||
538 | #if defined (STM32F100xB) || defined (STM32F100xE) |
||
539 | /** |
||
540 | * @brief Handles DAC interrupt request |
||
541 | * Note: For STM32F100x devices with specific feature: DMA underrun. |
||
542 | * On these devices, this function uses the interruption of DMA |
||
543 | * underrun. |
||
544 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
||
545 | * the configuration information for the specified DAC. |
||
546 | * @retval None |
||
547 | */ |
||
548 | void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac) |
||
549 | { |
||
550 | |||
551 | if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1)) |
||
552 | { |
||
553 | /* Check underrun flag of DAC channel 1 */ |
||
554 | if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1)) |
||
555 | { |
||
556 | /* Change DAC state to error state */ |
||
557 | hdac->State = HAL_DAC_STATE_ERROR; |
||
558 | |||
559 | /* Set DAC error code to chanel1 DMA underrun error */ |
||
560 | SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1); |
||
561 | |||
562 | /* Clear the underrun flag */ |
||
563 | __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1); |
||
564 | |||
565 | /* Disable the selected DAC channel1 DMA request */ |
||
566 | CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); |
||
567 | |||
568 | /* Error callback */ |
||
569 | HAL_DAC_DMAUnderrunCallbackCh1(hdac); |
||
570 | } |
||
571 | } |
||
572 | |||
573 | if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2)) |
||
574 | { |
||
575 | /* Check underrun flag of DAC channel 2 */ |
||
576 | if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2)) |
||
577 | { |
||
578 | /* Change DAC state to error state */ |
||
579 | hdac->State = HAL_DAC_STATE_ERROR; |
||
580 | |||
581 | /* Set DAC error code to channel2 DMA underrun error */ |
||
582 | SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2); |
||
583 | |||
584 | /* Clear the underrun flag */ |
||
585 | __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR2); |
||
586 | |||
587 | /* Disable the selected DAC channel1 DMA request */ |
||
588 | CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2); |
||
589 | |||
590 | /* Error callback */ |
||
591 | HAL_DACEx_DMAUnderrunCallbackCh2(hdac); |
||
592 | } |
||
593 | } |
||
594 | } |
||
595 | #endif /* STM32F100xB || STM32F100xE */ |
||
596 | |||
597 | |||
598 | /** |
||
599 | * @} |
||
600 | */ |
||
601 | |||
602 | /** @defgroup DACEx_Private_Functions DACEx Private Functions |
||
603 | * @{ |
||
604 | */ |
||
605 | |||
606 | /** |
||
607 | * @brief DMA conversion complete callback. |
||
608 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
||
609 | * the configuration information for the specified DMA module. |
||
610 | * @retval None |
||
611 | */ |
||
612 | void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma) |
||
613 | { |
||
614 | DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
||
615 | |||
616 | HAL_DACEx_ConvCpltCallbackCh2(hdac); |
||
617 | |||
618 | hdac->State= HAL_DAC_STATE_READY; |
||
619 | } |
||
620 | |||
621 | /** |
||
622 | * @brief DMA half transfer complete callback. |
||
623 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
||
624 | * the configuration information for the specified DMA module. |
||
625 | * @retval None |
||
626 | */ |
||
627 | void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma) |
||
628 | { |
||
629 | DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
||
630 | /* Conversion complete callback */ |
||
631 | HAL_DACEx_ConvHalfCpltCallbackCh2(hdac); |
||
632 | } |
||
633 | |||
634 | /** |
||
635 | * @brief DMA error callback |
||
636 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
||
637 | * the configuration information for the specified DMA module. |
||
638 | * @retval None |
||
639 | */ |
||
640 | void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma) |
||
641 | { |
||
642 | DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
||
643 | |||
644 | /* Set DAC error code to DMA error */ |
||
645 | hdac->ErrorCode |= HAL_DAC_ERROR_DMA; |
||
646 | |||
647 | HAL_DACEx_ErrorCallbackCh2(hdac); |
||
648 | |||
649 | hdac->State= HAL_DAC_STATE_READY; |
||
650 | } |
||
651 | |||
652 | /** |
||
653 | * @} |
||
654 | */ |
||
655 | |||
656 | #endif /* STM32F100xB || STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ |
||
657 | #endif /* HAL_DAC_MODULE_ENABLED */ |
||
658 | |||
659 | /** |
||
660 | * @} |
||
661 | */ |
||
662 | |||
663 | /** |
||
664 | * @} |
||
665 | */ |
||
666 | |||
667 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |