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| Rev | Author | Line No. | Line |
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| 2 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
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| 3 | * @file stm32f1xx_hal_dac_ex.c |
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| 4 | * @author MCD Application Team |
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| 5 | mjames | 5 | * @version V1.0.4 |
| 6 | * @date 29-April-2016 |
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| 2 | mjames | 7 | * @brief DAC HAL module driver. |
| 8 | * This file provides firmware functions to manage the following |
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| 9 | * functionalities of DAC extension peripheral: |
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| 10 | * + Extended features functions |
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| 11 | * |
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| 12 | * |
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| 13 | @verbatim |
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| 14 | ============================================================================== |
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| 15 | ##### How to use this driver ##### |
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| 16 | ============================================================================== |
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| 17 | [..] |
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| 18 | (+) When Dual mode is enabled (i.e DAC Channel1 and Channel2 are used simultaneously) : |
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| 19 | Use HAL_DACEx_DualGetValue() to get digital data to be converted and use |
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| 20 | HAL_DACEx_DualSetValue() to set digital value to converted simultaneously in Channel 1 and Channel 2. |
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| 21 | (+) Use HAL_DACEx_TriangleWaveGenerate() to generate Triangle signal. |
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| 22 | (+) Use HAL_DACEx_NoiseWaveGenerate() to generate Noise signal. |
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| 23 | |||
| 24 | @endverbatim |
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| 25 | ****************************************************************************** |
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| 26 | * @attention |
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| 27 | * |
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| 5 | mjames | 28 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| 2 | mjames | 29 | * |
| 30 | * Redistribution and use in source and binary forms, with or without modification, |
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| 31 | * are permitted provided that the following conditions are met: |
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| 32 | * 1. Redistributions of source code must retain the above copyright notice, |
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| 33 | * this list of conditions and the following disclaimer. |
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| 34 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
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| 35 | * this list of conditions and the following disclaimer in the documentation |
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| 36 | * and/or other materials provided with the distribution. |
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| 37 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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| 38 | * may be used to endorse or promote products derived from this software |
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| 39 | * without specific prior written permission. |
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| 40 | * |
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| 41 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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| 42 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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| 43 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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| 44 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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| 45 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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| 46 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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| 47 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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| 48 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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| 49 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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| 50 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 51 | * |
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| 52 | ****************************************************************************** |
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| 53 | */ |
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| 54 | |||
| 55 | |||
| 56 | /* Includes ------------------------------------------------------------------*/ |
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| 57 | #include "stm32f1xx_hal.h" |
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| 58 | |||
| 59 | /** @addtogroup STM32F1xx_HAL_Driver |
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| 60 | * @{ |
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| 61 | */ |
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| 62 | |||
| 63 | /** @defgroup DACEx DACEx |
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| 64 | * @brief DACEx driver module |
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| 65 | * @{ |
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| 66 | */ |
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| 67 | |||
| 68 | #ifdef HAL_DAC_MODULE_ENABLED |
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| 69 | #if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC) |
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| 70 | |||
| 71 | /* Private typedef -----------------------------------------------------------*/ |
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| 72 | /* Private define ------------------------------------------------------------*/ |
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| 73 | /* Private macro -------------------------------------------------------------*/ |
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| 74 | /* Private variables ---------------------------------------------------------*/ |
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| 75 | /* Private function prototypes -----------------------------------------------*/ |
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| 76 | /* Exported functions --------------------------------------------------------*/ |
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| 77 | |||
| 78 | /** @defgroup DACEx_Exported_Functions DACEx Exported Functions |
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| 79 | * @{ |
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| 80 | */ |
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| 81 | |||
| 82 | /** @defgroup DACEx_Exported_Functions_Group1 Extended features functions |
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| 83 | * @brief Extended features functions |
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| 84 | * |
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| 85 | @verbatim |
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| 86 | ============================================================================== |
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| 87 | ##### Extended features functions ##### |
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| 88 | ============================================================================== |
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| 89 | [..] This section provides functions allowing to: |
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| 90 | (+) Start conversion. |
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| 91 | (+) Stop conversion. |
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| 92 | (+) Start conversion and enable DMA transfer. |
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| 93 | (+) Stop conversion and disable DMA transfer. |
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| 94 | (+) Get result of conversion. |
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| 95 | (+) Get result of dual mode conversion. |
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| 96 | |||
| 97 | @endverbatim |
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| 98 | * @{ |
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| 99 | */ |
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| 100 | |||
| 101 | /** |
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| 102 | * @brief Returns the last data output value of the selected DAC channel. |
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| 103 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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| 104 | * the configuration information for the specified DAC. |
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| 105 | * @retval The selected DAC channel data output value. |
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| 106 | */ |
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| 107 | uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac) |
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| 108 | { |
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| 109 | uint32_t tmp = 0; |
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| 110 | |||
| 111 | tmp |= hdac->Instance->DOR1; |
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| 112 | |||
| 113 | tmp |= hdac->Instance->DOR2 << 16; |
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| 114 | |||
| 115 | /* Returns the DAC channel data output register value */ |
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| 116 | return tmp; |
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| 117 | } |
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| 118 | |||
| 119 | /** |
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| 120 | * @brief Enables or disables the selected DAC channel wave generation. |
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| 121 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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| 122 | * the configuration information for the specified DAC. |
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| 123 | * @param Channel: The selected DAC channel. |
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| 124 | * This parameter can be one of the following values: |
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| 125 | * DAC_CHANNEL_1 / DAC_CHANNEL_2 |
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| 126 | * @param Amplitude: Select max triangle amplitude. |
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| 127 | * This parameter can be one of the following values: |
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| 128 | * @arg DAC_TRIANGLEAMPLITUDE_1: Select max triangle amplitude of 1 |
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| 129 | * @arg DAC_TRIANGLEAMPLITUDE_3: Select max triangle amplitude of 3 |
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| 130 | * @arg DAC_TRIANGLEAMPLITUDE_7: Select max triangle amplitude of 7 |
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| 131 | * @arg DAC_TRIANGLEAMPLITUDE_15: Select max triangle amplitude of 15 |
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| 132 | * @arg DAC_TRIANGLEAMPLITUDE_31: Select max triangle amplitude of 31 |
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| 133 | * @arg DAC_TRIANGLEAMPLITUDE_63: Select max triangle amplitude of 63 |
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| 134 | * @arg DAC_TRIANGLEAMPLITUDE_127: Select max triangle amplitude of 127 |
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| 135 | * @arg DAC_TRIANGLEAMPLITUDE_255: Select max triangle amplitude of 255 |
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| 136 | * @arg DAC_TRIANGLEAMPLITUDE_511: Select max triangle amplitude of 511 |
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| 137 | * @arg DAC_TRIANGLEAMPLITUDE_1023: Select max triangle amplitude of 1023 |
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| 138 | * @arg DAC_TRIANGLEAMPLITUDE_2047: Select max triangle amplitude of 2047 |
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| 139 | * @arg DAC_TRIANGLEAMPLITUDE_4095: Select max triangle amplitude of 4095 |
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| 140 | * @retval HAL status |
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| 141 | */ |
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| 142 | HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude) |
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| 143 | { |
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| 144 | /* Check the parameters */ |
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| 145 | assert_param(IS_DAC_CHANNEL(Channel)); |
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| 146 | assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude)); |
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| 147 | |||
| 148 | /* Process locked */ |
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| 149 | __HAL_LOCK(hdac); |
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| 150 | |||
| 151 | /* Change DAC state */ |
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| 152 | hdac->State = HAL_DAC_STATE_BUSY; |
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| 153 | |||
| 154 | /* Enable the selected wave generation for the selected DAC channel */ |
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| 155 | MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_CR_WAVE1_1 | Amplitude) << Channel); |
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| 156 | |||
| 157 | /* Change DAC state */ |
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| 158 | hdac->State = HAL_DAC_STATE_READY; |
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| 159 | |||
| 160 | /* Process unlocked */ |
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| 161 | __HAL_UNLOCK(hdac); |
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| 162 | |||
| 163 | /* Return function status */ |
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| 164 | return HAL_OK; |
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| 165 | } |
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| 166 | |||
| 167 | /** |
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| 168 | * @brief Enables or disables the selected DAC channel wave generation. |
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| 169 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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| 170 | * the configuration information for the specified DAC. |
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| 171 | * @param Channel: The selected DAC channel. |
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| 172 | * This parameter can be one of the following values: |
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| 173 | * DAC_CHANNEL_1 / DAC_CHANNEL_2 |
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| 174 | * @param Amplitude: Unmask DAC channel LFSR for noise wave generation. |
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| 175 | * This parameter can be one of the following values: |
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| 176 | * @arg DAC_LFSRUNMASK_BIT0: Unmask DAC channel LFSR bit0 for noise wave generation |
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| 177 | * @arg DAC_LFSRUNMASK_BITS1_0: Unmask DAC channel LFSR bit[1:0] for noise wave generation |
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| 178 | * @arg DAC_LFSRUNMASK_BITS2_0: Unmask DAC channel LFSR bit[2:0] for noise wave generation |
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| 179 | * @arg DAC_LFSRUNMASK_BITS3_0: Unmask DAC channel LFSR bit[3:0] for noise wave generation |
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| 180 | * @arg DAC_LFSRUNMASK_BITS4_0: Unmask DAC channel LFSR bit[4:0] for noise wave generation |
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| 181 | * @arg DAC_LFSRUNMASK_BITS5_0: Unmask DAC channel LFSR bit[5:0] for noise wave generation |
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| 182 | * @arg DAC_LFSRUNMASK_BITS6_0: Unmask DAC channel LFSR bit[6:0] for noise wave generation |
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| 183 | * @arg DAC_LFSRUNMASK_BITS7_0: Unmask DAC channel LFSR bit[7:0] for noise wave generation |
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| 184 | * @arg DAC_LFSRUNMASK_BITS8_0: Unmask DAC channel LFSR bit[8:0] for noise wave generation |
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| 185 | * @arg DAC_LFSRUNMASK_BITS9_0: Unmask DAC channel LFSR bit[9:0] for noise wave generation |
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| 186 | * @arg DAC_LFSRUNMASK_BITS10_0: Unmask DAC channel LFSR bit[10:0] for noise wave generation |
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| 187 | * @arg DAC_LFSRUNMASK_BITS11_0: Unmask DAC channel LFSR bit[11:0] for noise wave generation |
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| 188 | * @retval HAL status |
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| 189 | */ |
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| 190 | HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude) |
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| 191 | { |
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| 192 | /* Check the parameters */ |
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| 193 | assert_param(IS_DAC_CHANNEL(Channel)); |
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| 194 | assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude)); |
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| 195 | |||
| 196 | /* Process locked */ |
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| 197 | __HAL_LOCK(hdac); |
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| 198 | |||
| 199 | /* Change DAC state */ |
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| 200 | hdac->State = HAL_DAC_STATE_BUSY; |
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| 201 | |||
| 202 | /* Enable the selected wave generation for the selected DAC channel */ |
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| 203 | MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_CR_WAVE1_0 | Amplitude) << Channel); |
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| 204 | |||
| 205 | /* Change DAC state */ |
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| 206 | hdac->State = HAL_DAC_STATE_READY; |
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| 207 | |||
| 208 | /* Process unlocked */ |
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| 209 | __HAL_UNLOCK(hdac); |
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| 210 | |||
| 211 | /* Return function status */ |
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| 212 | return HAL_OK; |
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| 213 | } |
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| 214 | |||
| 215 | /** |
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| 216 | * @brief Set the specified data holding register value for dual DAC channel. |
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| 217 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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| 218 | * the configuration information for the specified DAC. |
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| 219 | * @param Alignment: Specifies the data alignment for dual channel DAC. |
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| 220 | * This parameter can be one of the following values: |
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| 221 | * DAC_ALIGN_8B_R: 8bit right data alignment selected |
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| 222 | * DAC_ALIGN_12B_L: 12bit left data alignment selected |
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| 223 | * DAC_ALIGN_12B_R: 12bit right data alignment selected |
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| 224 | * @param Data1: Data for DAC Channel2 to be loaded in the selected data holding register. |
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| 225 | * @param Data2: Data for DAC Channel1 to be loaded in the selected data holding register. |
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| 226 | * @note In dual mode, a unique register access is required to write in both |
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| 227 | * DAC channels at the same time. |
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| 228 | * @retval HAL status |
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| 229 | */ |
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| 230 | HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef* hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2) |
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| 231 | { |
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| 232 | uint32_t data = 0, tmp = 0; |
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| 233 | |||
| 234 | /* Check the parameters */ |
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| 235 | assert_param(IS_DAC_ALIGN(Alignment)); |
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| 236 | assert_param(IS_DAC_DATA(Data1)); |
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| 237 | assert_param(IS_DAC_DATA(Data2)); |
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| 238 | |||
| 239 | /* Calculate and set dual DAC data holding register value */ |
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| 240 | if (Alignment == DAC_ALIGN_8B_R) |
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| 241 | { |
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| 242 | data = ((uint32_t)Data2 << 8) | Data1; |
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| 243 | } |
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| 244 | else |
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| 245 | { |
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| 246 | data = ((uint32_t)Data2 << 16) | Data1; |
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| 247 | } |
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| 248 | |||
| 249 | tmp = (uint32_t)hdac->Instance; |
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| 250 | tmp += DAC_DHR12RD_ALIGNMENT(Alignment); |
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| 251 | |||
| 252 | /* Set the dual DAC selected data holding register */ |
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| 253 | *(__IO uint32_t *)tmp = data; |
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| 254 | |||
| 255 | /* Return function status */ |
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| 256 | return HAL_OK; |
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| 257 | } |
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| 258 | |||
| 259 | /** |
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| 260 | * @brief Conversion complete callback in non blocking mode for Channel2 |
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| 261 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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| 262 | * the configuration information for the specified DAC. |
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| 263 | * @retval None |
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| 264 | */ |
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| 265 | __weak void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac) |
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| 266 | { |
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| 5 | mjames | 267 | /* Prevent unused argument(s) compilation warning */ |
| 268 | UNUSED(hdac); |
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| 2 | mjames | 269 | /* NOTE : This function Should not be modified, when the callback is needed, |
| 270 | the HAL_DACEx_ConvCpltCallbackCh2 could be implemented in the user file |
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| 271 | */ |
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| 272 | } |
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| 273 | |||
| 274 | /** |
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| 275 | * @brief Conversion half DMA transfer callback in non blocking mode for Channel2 |
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| 276 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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| 277 | * the configuration information for the specified DAC. |
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| 278 | * @retval None |
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| 279 | */ |
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| 280 | __weak void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac) |
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| 281 | { |
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| 5 | mjames | 282 | /* Prevent unused argument(s) compilation warning */ |
| 283 | UNUSED(hdac); |
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| 2 | mjames | 284 | /* NOTE : This function Should not be modified, when the callback is needed, |
| 285 | the HAL_DACEx_ConvHalfCpltCallbackCh2 could be implemented in the user file |
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| 286 | */ |
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| 287 | } |
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| 288 | |||
| 289 | /** |
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| 290 | * @brief Error DAC callback for Channel2. |
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| 291 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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| 292 | * the configuration information for the specified DAC. |
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| 293 | * @retval None |
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| 294 | */ |
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| 295 | __weak void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac) |
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| 296 | { |
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| 5 | mjames | 297 | /* Prevent unused argument(s) compilation warning */ |
| 298 | UNUSED(hdac); |
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| 2 | mjames | 299 | /* NOTE : This function Should not be modified, when the callback is needed, |
| 300 | the HAL_DACEx_ErrorCallbackCh2 could be implemented in the user file |
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| 301 | */ |
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| 302 | } |
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| 303 | |||
| 304 | #if defined (STM32F100xB) || defined (STM32F100xE) |
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| 305 | /** |
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| 306 | * @brief DMA underrun DAC callback for channel1. |
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| 307 | * Note: For STM32F100x devices with specific feature: DMA underrun. |
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| 308 | * On these devices, this function uses the interruption of DMA |
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| 309 | * underrun. |
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| 310 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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| 311 | * the configuration information for the specified DAC. |
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| 312 | * @retval None |
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| 313 | */ |
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| 314 | __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac) |
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| 315 | { |
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| 5 | mjames | 316 | /* Prevent unused argument(s) compilation warning */ |
| 317 | UNUSED(hdac); |
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| 2 | mjames | 318 | /* NOTE : This function Should not be modified, when the callback is needed, |
| 319 | the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file |
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| 320 | */ |
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| 321 | } |
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| 322 | |||
| 323 | /** |
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| 324 | * @brief DMA underrun DAC callback for channel2. |
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| 325 | * Note: For STM32F100x devices with specific feature: DMA underrun. |
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| 326 | * On these devices, this function uses the interruption of DMA |
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| 327 | * underrun. |
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| 328 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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| 329 | * the configuration information for the specified DAC. |
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| 330 | * @retval None |
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| 331 | */ |
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| 332 | __weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac) |
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| 333 | { |
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| 5 | mjames | 334 | /* Prevent unused argument(s) compilation warning */ |
| 335 | UNUSED(hdac); |
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| 2 | mjames | 336 | /* NOTE : This function Should not be modified, when the callback is needed, |
| 337 | the HAL_DACEx_DMAUnderrunCallbackCh2 could be implemented in the user file |
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| 338 | */ |
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| 339 | } |
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| 340 | #endif /* STM32F100xB) || defined (STM32F100xE) */ |
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| 341 | |||
| 342 | /** |
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| 343 | * @} |
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| 344 | */ |
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| 345 | |||
| 346 | #if defined (STM32F100xB) || defined (STM32F100xE) |
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| 347 | /** |
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| 348 | * @brief Enables DAC and starts conversion of channel. |
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| 349 | * Note: For STM32F100x devices with specific feature: DMA underrun. |
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| 350 | * On these devices, this function enables the interruption of DMA |
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| 351 | * underrun. |
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| 352 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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| 353 | * the configuration information for the specified DAC. |
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| 354 | * @param Channel: The selected DAC channel. |
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| 355 | * This parameter can be one of the following values: |
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| 356 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
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| 357 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
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| 358 | * @param pData: The destination peripheral Buffer address. |
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| 359 | * @param Length: The length of data to be transferred from memory to DAC peripheral |
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| 360 | * @param Alignment: Specifies the data alignment for DAC channel. |
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| 361 | * This parameter can be one of the following values: |
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| 362 | * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected |
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| 363 | * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected |
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| 364 | * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected |
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| 365 | * @retval HAL status |
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| 366 | */ |
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| 367 | HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment) |
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| 368 | { |
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| 369 | uint32_t tmpreg = 0; |
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| 370 | |||
| 371 | /* Check the parameters */ |
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| 372 | assert_param(IS_DAC_CHANNEL(Channel)); |
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| 373 | assert_param(IS_DAC_ALIGN(Alignment)); |
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| 374 | |||
| 375 | /* Process locked */ |
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| 376 | __HAL_LOCK(hdac); |
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| 377 | |||
| 378 | /* Change DAC state */ |
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| 379 | hdac->State = HAL_DAC_STATE_BUSY; |
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| 380 | |||
| 381 | if(Channel == DAC_CHANNEL_1) |
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| 382 | { |
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| 383 | /* Set the DMA transfer complete callback for channel1 */ |
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| 384 | hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1; |
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| 385 | |||
| 386 | /* Set the DMA half transfer complete callback for channel1 */ |
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| 387 | hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1; |
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| 388 | |||
| 389 | /* Set the DMA error callback for channel1 */ |
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| 390 | hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1; |
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| 391 | |||
| 392 | /* Enable the selected DAC channel1 DMA request */ |
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| 393 | SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); |
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| 394 | |||
| 395 | /* Case of use of channel 1 */ |
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| 396 | switch(Alignment) |
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| 397 | { |
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| 398 | case DAC_ALIGN_12B_R: |
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| 399 | /* Get DHR12R1 address */ |
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| 400 | tmpreg = (uint32_t)&hdac->Instance->DHR12R1; |
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| 401 | break; |
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| 402 | case DAC_ALIGN_12B_L: |
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| 403 | /* Get DHR12L1 address */ |
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| 404 | tmpreg = (uint32_t)&hdac->Instance->DHR12L1; |
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| 405 | break; |
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| 406 | case DAC_ALIGN_8B_R: |
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| 407 | /* Get DHR8R1 address */ |
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| 408 | tmpreg = (uint32_t)&hdac->Instance->DHR8R1; |
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| 409 | break; |
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| 410 | default: |
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| 411 | break; |
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| 412 | } |
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| 413 | } |
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| 414 | else |
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| 415 | { |
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| 416 | /* Set the DMA transfer complete callback for channel2 */ |
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| 417 | hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2; |
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| 418 | |||
| 419 | /* Set the DMA half transfer complete callback for channel2 */ |
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| 420 | hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2; |
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| 421 | |||
| 422 | /* Set the DMA error callback for channel2 */ |
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| 423 | hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2; |
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| 424 | |||
| 425 | /* Enable the selected DAC channel2 DMA request */ |
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| 426 | SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2); |
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| 427 | |||
| 428 | /* Case of use of channel 2 */ |
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| 429 | switch(Alignment) |
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| 430 | { |
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| 431 | case DAC_ALIGN_12B_R: |
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| 432 | /* Get DHR12R2 address */ |
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| 433 | tmpreg = (uint32_t)&hdac->Instance->DHR12R2; |
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| 434 | break; |
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| 435 | case DAC_ALIGN_12B_L: |
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| 436 | /* Get DHR12L2 address */ |
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| 437 | tmpreg = (uint32_t)&hdac->Instance->DHR12L2; |
||
| 438 | break; |
||
| 439 | case DAC_ALIGN_8B_R: |
||
| 440 | /* Get DHR8R2 address */ |
||
| 441 | tmpreg = (uint32_t)&hdac->Instance->DHR8R2; |
||
| 442 | break; |
||
| 443 | default: |
||
| 444 | break; |
||
| 445 | } |
||
| 446 | } |
||
| 447 | |||
| 448 | /* Enable the DMA channel */ |
||
| 449 | if(Channel == DAC_CHANNEL_1) |
||
| 450 | { |
||
| 451 | /* Enable the DAC DMA underrun interrupt */ |
||
| 452 | __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1); |
||
| 453 | |||
| 454 | /* Enable the DMA channel */ |
||
| 455 | HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length); |
||
| 456 | } |
||
| 457 | else |
||
| 458 | { |
||
| 459 | /* Enable the DAC DMA underrun interrupt */ |
||
| 460 | __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2); |
||
| 461 | |||
| 462 | /* Enable the DMA channel */ |
||
| 463 | HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length); |
||
| 464 | } |
||
| 465 | |||
| 466 | /* Enable the Peripharal */ |
||
| 467 | __HAL_DAC_ENABLE(hdac, Channel); |
||
| 468 | |||
| 469 | /* Process Unlocked */ |
||
| 470 | __HAL_UNLOCK(hdac); |
||
| 471 | |||
| 472 | /* Return function status */ |
||
| 473 | return HAL_OK; |
||
| 474 | } |
||
| 475 | #endif /* STM32F100xB) || defined (STM32F100xE) */ |
||
| 476 | |||
| 477 | #if defined (STM32F100xB) || defined (STM32F100xE) |
||
| 478 | /** |
||
| 479 | * @brief Disables DAC and stop conversion of channel. |
||
| 480 | * Note: For STM32F100x devices with specific feature: DMA underrun. |
||
| 481 | * On these devices, this function disables the interruption of DMA |
||
| 482 | * underrun. |
||
| 483 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
||
| 484 | * the configuration information for the specified DAC. |
||
| 485 | * @param Channel: The selected DAC channel. |
||
| 486 | * This parameter can be one of the following values: |
||
| 487 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
||
| 488 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
||
| 489 | * @retval HAL status |
||
| 490 | */ |
||
| 491 | HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel) |
||
| 492 | { |
||
| 493 | HAL_StatusTypeDef status = HAL_OK; |
||
| 494 | |||
| 495 | /* Check the parameters */ |
||
| 496 | assert_param(IS_DAC_CHANNEL(Channel)); |
||
| 497 | |||
| 498 | /* Disable the selected DAC channel DMA request */ |
||
| 499 | hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << Channel); |
||
| 500 | |||
| 501 | /* Disable the Peripharal */ |
||
| 502 | __HAL_DAC_DISABLE(hdac, Channel); |
||
| 503 | |||
| 504 | /* Disable the DMA Channel */ |
||
| 505 | /* Channel1 is used */ |
||
| 506 | if(Channel == DAC_CHANNEL_1) |
||
| 507 | { |
||
| 508 | /* Disable the DMA channel */ |
||
| 509 | status = HAL_DMA_Abort(hdac->DMA_Handle1); |
||
| 510 | |||
| 511 | /* Disable the DAC DMA underrun interrupt */ |
||
| 512 | __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1); |
||
| 513 | } |
||
| 514 | else /* Channel2 is used for */ |
||
| 515 | { |
||
| 516 | /* Disable the DMA channel */ |
||
| 517 | status = HAL_DMA_Abort(hdac->DMA_Handle2); |
||
| 518 | |||
| 519 | /* Disable the DAC DMA underrun interrupt */ |
||
| 520 | __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2); |
||
| 521 | } |
||
| 522 | |||
| 523 | /* Check if DMA Channel effectively disabled */ |
||
| 524 | if(status != HAL_OK) |
||
| 525 | { |
||
| 526 | /* Update ADC state machine to error */ |
||
| 527 | hdac->State = HAL_DAC_STATE_ERROR; |
||
| 528 | } |
||
| 529 | else |
||
| 530 | { |
||
| 531 | /* Change DAC state */ |
||
| 532 | hdac->State = HAL_DAC_STATE_READY; |
||
| 533 | } |
||
| 534 | |||
| 535 | /* Return function status */ |
||
| 536 | return status; |
||
| 537 | } |
||
| 538 | #endif /* STM32F100xB) || defined (STM32F100xE) */ |
||
| 539 | |||
| 540 | #if defined (STM32F100xB) || defined (STM32F100xE) |
||
| 541 | /** |
||
| 542 | * @brief Handles DAC interrupt request |
||
| 543 | * Note: For STM32F100x devices with specific feature: DMA underrun. |
||
| 544 | * On these devices, this function uses the interruption of DMA |
||
| 545 | * underrun. |
||
| 546 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
||
| 547 | * the configuration information for the specified DAC. |
||
| 548 | * @retval None |
||
| 549 | */ |
||
| 550 | void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac) |
||
| 551 | { |
||
| 552 | |||
| 553 | if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1)) |
||
| 554 | { |
||
| 555 | /* Check underrun flag of DAC channel 1 */ |
||
| 556 | if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1)) |
||
| 557 | { |
||
| 558 | /* Change DAC state to error state */ |
||
| 559 | hdac->State = HAL_DAC_STATE_ERROR; |
||
| 560 | |||
| 561 | /* Set DAC error code to chanel1 DMA underrun error */ |
||
| 562 | SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1); |
||
| 563 | |||
| 564 | /* Clear the underrun flag */ |
||
| 565 | __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1); |
||
| 566 | |||
| 567 | /* Disable the selected DAC channel1 DMA request */ |
||
| 568 | CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); |
||
| 569 | |||
| 570 | /* Error callback */ |
||
| 571 | HAL_DAC_DMAUnderrunCallbackCh1(hdac); |
||
| 572 | } |
||
| 573 | } |
||
| 574 | |||
| 575 | if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2)) |
||
| 576 | { |
||
| 577 | /* Check underrun flag of DAC channel 2 */ |
||
| 578 | if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2)) |
||
| 579 | { |
||
| 580 | /* Change DAC state to error state */ |
||
| 581 | hdac->State = HAL_DAC_STATE_ERROR; |
||
| 582 | |||
| 583 | /* Set DAC error code to channel2 DMA underrun error */ |
||
| 584 | SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2); |
||
| 585 | |||
| 586 | /* Clear the underrun flag */ |
||
| 587 | __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR2); |
||
| 588 | |||
| 589 | /* Disable the selected DAC channel1 DMA request */ |
||
| 590 | CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2); |
||
| 591 | |||
| 592 | /* Error callback */ |
||
| 593 | HAL_DACEx_DMAUnderrunCallbackCh2(hdac); |
||
| 594 | } |
||
| 595 | } |
||
| 596 | } |
||
| 597 | #endif /* STM32F100xB || STM32F100xE */ |
||
| 598 | |||
| 599 | |||
| 600 | /** |
||
| 601 | * @} |
||
| 602 | */ |
||
| 603 | |||
| 604 | /** @defgroup DACEx_Private_Functions DACEx Private Functions |
||
| 605 | * @{ |
||
| 606 | */ |
||
| 607 | |||
| 608 | /** |
||
| 609 | * @brief DMA conversion complete callback. |
||
| 610 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
||
| 611 | * the configuration information for the specified DMA module. |
||
| 612 | * @retval None |
||
| 613 | */ |
||
| 614 | void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma) |
||
| 615 | { |
||
| 616 | DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
||
| 617 | |||
| 618 | HAL_DACEx_ConvCpltCallbackCh2(hdac); |
||
| 619 | |||
| 620 | hdac->State= HAL_DAC_STATE_READY; |
||
| 621 | } |
||
| 622 | |||
| 623 | /** |
||
| 624 | * @brief DMA half transfer complete callback. |
||
| 625 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
||
| 626 | * the configuration information for the specified DMA module. |
||
| 627 | * @retval None |
||
| 628 | */ |
||
| 629 | void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma) |
||
| 630 | { |
||
| 631 | DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
||
| 632 | /* Conversion complete callback */ |
||
| 633 | HAL_DACEx_ConvHalfCpltCallbackCh2(hdac); |
||
| 634 | } |
||
| 635 | |||
| 636 | /** |
||
| 637 | * @brief DMA error callback |
||
| 638 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
||
| 639 | * the configuration information for the specified DMA module. |
||
| 640 | * @retval None |
||
| 641 | */ |
||
| 642 | void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma) |
||
| 643 | { |
||
| 644 | DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
||
| 645 | |||
| 646 | /* Set DAC error code to DMA error */ |
||
| 647 | hdac->ErrorCode |= HAL_DAC_ERROR_DMA; |
||
| 648 | |||
| 649 | HAL_DACEx_ErrorCallbackCh2(hdac); |
||
| 650 | |||
| 651 | hdac->State= HAL_DAC_STATE_READY; |
||
| 652 | } |
||
| 653 | |||
| 654 | /** |
||
| 655 | * @} |
||
| 656 | */ |
||
| 657 | |||
| 658 | #endif /* STM32F100xB || STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ |
||
| 659 | #endif /* HAL_DAC_MODULE_ENABLED */ |
||
| 660 | |||
| 661 | /** |
||
| 662 | * @} |
||
| 663 | */ |
||
| 664 | |||
| 665 | /** |
||
| 666 | * @} |
||
| 667 | */ |
||
| 668 | |||
| 669 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |