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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 2 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
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| 3 | * @file stm32f1xx_hal_dac.c |
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| 4 | * @author MCD Application Team |
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| 5 | * @brief DAC HAL module driver. |
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| 6 | * This file provides firmware functions to manage the following |
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| 7 | * functionalities of the Digital to Analog Converter (DAC) peripheral: |
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| 8 | * + Initialization and de-initialization functions |
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| 9 | * + IO operation functions |
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| 10 | * + Peripheral Control functions |
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| 11 | * + Peripheral State and Errors functions |
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| 12 | * |
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| 13 | * |
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| 14 | @verbatim |
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| 15 | ============================================================================== |
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| 16 | ##### DAC Peripheral features ##### |
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| 17 | ============================================================================== |
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| 18 | [..] |
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| 19 | *** DAC Channels *** |
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| 20 | ==================== |
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| 21 | [..] |
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| 22 | STM32F1 devices integrate two 12-bit Digital Analog Converters |
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| 23 | |||
| 24 | The 2 converters (i.e. channel1 & channel2) |
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| 25 | can be used independently or simultaneously (dual mode): |
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| 26 | (#) DAC channel1 with DAC_OUT1 (PA4) as output or connected to on-chip |
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| 27 | peripherals (ex. timers). |
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| 28 | (#) DAC channel2 with DAC_OUT2 (PA5) as output or connected to on-chip |
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| 29 | peripherals (ex. timers). |
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| 30 | |||
| 31 | *** DAC Triggers *** |
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| 32 | ==================== |
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| 33 | [..] |
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| 34 | Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE |
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| 35 | and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register. |
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| 36 | [..] |
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| 37 | Digital to Analog conversion can be triggered by: |
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| 38 | (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9. |
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| 39 | The used pin (GPIOx_PIN_9) must be configured in input mode. |
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| 40 | |||
| 41 | (#) Timers TRGO: TIM2, TIM4, TIM6, TIM7 |
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| 42 | For STM32F10x connectivity line devices and STM32F100x devices: TIM3 |
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| 43 | For STM32F10x high-density and XL-density devices: TIM8 |
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| 44 | For STM32F100x high-density value line devices: TIM15 as |
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| 45 | replacement of TIM5. |
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| 46 | (DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T4_TRGO...) |
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| 47 | |||
| 48 | (#) Software using DAC_TRIGGER_SOFTWARE |
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| 49 | |||
| 50 | *** DAC Buffer mode feature *** |
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| 51 | =============================== |
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| 52 | [..] |
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| 53 | Each DAC channel integrates an output buffer that can be used to |
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| 54 | reduce the output impedance, and to drive external loads directly |
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| 55 | without having to add an external operational amplifier. |
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| 56 | To enable, the output buffer use |
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| 57 | sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE; |
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| 58 | [..] |
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| 59 | (@) Refer to the device datasheet for more details about output |
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| 60 | impedance value with and without output buffer. |
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| 61 | |||
| 62 | *** DAC connect feature *** |
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| 63 | =============================== |
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| 64 | [..] |
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| 65 | Each DAC channel can be connected internally. |
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| 66 | To connect, use |
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| 67 | sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_ENABLE; |
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| 68 | |||
| 69 | *** GPIO configurations guidelines *** |
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| 70 | ===================== |
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| 71 | [..] |
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| 72 | When a DAC channel is used (ex channel1 on PA4) and the other is not |
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| 73 | (ex channel2 on PA5 is configured in Analog and disabled). |
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| 74 | Channel1 may disturb channel2 as coupling effect. |
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| 75 | Note that there is no coupling on channel2 as soon as channel2 is turned on. |
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| 76 | Coupling on adjacent channel could be avoided as follows: |
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| 77 | when unused PA5 is configured as INPUT PULL-UP or DOWN. |
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| 78 | PA5 is configured in ANALOG just before it is turned on. |
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| 79 | |||
| 80 | *** DAC wave generation feature *** |
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| 81 | =================================== |
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| 82 | [..] |
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| 83 | Both DAC channels can be used to generate |
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| 84 | (#) Noise wave |
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| 85 | (#) Triangle wave |
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| 86 | |||
| 87 | *** DAC data format *** |
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| 88 | ======================= |
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| 89 | [..] |
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| 90 | The DAC data format can be: |
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| 91 | (#) 8-bit right alignment using DAC_ALIGN_8B_R |
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| 92 | (#) 12-bit left alignment using DAC_ALIGN_12B_L |
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| 93 | (#) 12-bit right alignment using DAC_ALIGN_12B_R |
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| 94 | |||
| 95 | *** DAC data value to voltage correspondence *** |
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| 96 | ================================================ |
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| 97 | [..] |
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| 98 | The analog output voltage on each DAC channel pin is determined |
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| 99 | by the following equation: |
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| 100 | [..] |
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| 101 | DAC_OUTx = VREF+ * DOR / 4095 |
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| 102 | (+) with DOR is the Data Output Register |
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| 103 | [..] |
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| 104 | VEF+ is the input voltage reference (refer to the device datasheet) |
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| 105 | [..] |
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| 106 | e.g. To set DAC_OUT1 to 0.7V, use |
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| 107 | (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V |
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| 108 | |||
| 109 | *** DMA requests *** |
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| 110 | ===================== |
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| 111 | [..] |
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| 112 | A DMA request can be generated when an external trigger (but not a software trigger) |
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| 113 | occurs if DMA1 requests are enabled using HAL_DAC_Start_DMA(). |
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| 114 | DMA1 requests are mapped as following: |
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| 115 | (#) DAC channel1 mapped on DMA1 channel3 |
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| 116 | for STM32F100x low-density, medium-density, high-density with DAC |
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| 117 | DMA remap: |
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| 118 | (#) DAC channel2 mapped on DMA2 channel3 |
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| 119 | for STM32F100x high-density without DAC DMA remap and other |
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| 120 | STM32F1 devices |
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| 121 | |||
| 122 | [..] |
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| 123 | (@) For Dual mode and specific signal (Triangle and noise) generation please |
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| 124 | refer to Extended Features Driver description |
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| 125 | |||
| 126 | ##### How to use this driver ##### |
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| 127 | ============================================================================== |
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| 128 | [..] |
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| 129 | (+) DAC APB clock must be enabled to get write access to DAC |
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| 130 | registers using HAL_DAC_Init() |
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| 131 | (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode. |
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| 132 | (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function. |
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| 133 | (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA() functions. |
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| 134 | |||
| 135 | |||
| 136 | *** Polling mode IO operation *** |
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| 137 | ================================= |
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| 138 | [..] |
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| 139 | (+) Start the DAC peripheral using HAL_DAC_Start() |
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| 140 | (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function. |
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| 141 | (+) Stop the DAC peripheral using HAL_DAC_Stop() |
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| 142 | |||
| 143 | *** DMA mode IO operation *** |
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| 144 | ============================== |
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| 145 | [..] |
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| 146 | (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length |
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| 147 | of data to be transferred at each end of conversion |
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| 148 | First issued trigger will start the conversion of the value previously set by HAL_DAC_SetValue(). |
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| 149 | (+) At the middle of data transfer HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() |
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| 150 | function is executed and user can add his own code by customization of function pointer |
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| 151 | HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() |
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| 152 | (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() |
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| 153 | function is executed and user can add his own code by customization of function pointer |
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| 154 | HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() |
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| 155 | (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can |
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| 156 | add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1 |
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| 157 | (+) For STM32F100x devices with specific feature: DMA underrun. |
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| 158 | In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler. |
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| 159 | HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() |
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| 160 | function is executed and user can add his own code by customization of function pointer |
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| 161 | HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() and |
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| 162 | add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1() |
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| 163 | (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA() |
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| 164 | |||
| 165 | *** Callback registration *** |
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| 166 | ============================================= |
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| 167 | [..] |
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| 168 | The compilation define USE_HAL_DAC_REGISTER_CALLBACKS when set to 1 |
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| 169 | allows the user to configure dynamically the driver callbacks. |
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| 170 | |||
| 171 | Use Functions @ref HAL_DAC_RegisterCallback() to register a user callback, |
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| 172 | it allows to register following callbacks: |
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| 173 | (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1. |
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| 174 | (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1. |
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| 175 | (+) ErrorCallbackCh1 : callback when an error occurs on Ch1. |
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| 176 | (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1. |
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| 177 | (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2. |
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| 178 | (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2. |
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| 179 | (+) ErrorCallbackCh2 : callback when an error occurs on Ch2. |
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| 180 | (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2. |
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| 181 | (+) MspInitCallback : DAC MspInit. |
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| 182 | (+) MspDeInitCallback : DAC MspdeInit. |
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| 183 | This function takes as parameters the HAL peripheral handle, the Callback ID |
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| 184 | and a pointer to the user callback function. |
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| 185 | |||
| 186 | Use function @ref HAL_DAC_UnRegisterCallback() to reset a callback to the default |
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| 187 | weak (surcharged) function. It allows to reset following callbacks: |
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| 188 | (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1. |
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| 189 | (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1. |
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| 190 | (+) ErrorCallbackCh1 : callback when an error occurs on Ch1. |
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| 191 | (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1. |
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| 192 | (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2. |
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| 193 | (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2. |
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| 194 | (+) ErrorCallbackCh2 : callback when an error occurs on Ch2. |
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| 195 | (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2. |
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| 196 | (+) MspInitCallback : DAC MspInit. |
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| 197 | (+) MspDeInitCallback : DAC MspdeInit. |
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| 198 | (+) All Callbacks |
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| 199 | This function) takes as parameters the HAL peripheral handle and the Callback ID. |
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| 200 | |||
| 201 | By default, after the @ref HAL_DAC_Init and if the state is HAL_DAC_STATE_RESET |
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| 202 | all callbacks are reset to the corresponding legacy weak (surcharged) functions. |
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| 203 | Exception done for MspInit and MspDeInit callbacks that are respectively |
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| 204 | reset to the legacy weak (surcharged) functions in the @ref HAL_DAC_Init |
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| 205 | and @ref HAL_DAC_DeInit only when these callbacks are null (not registered beforehand). |
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| 206 | If not, MspInit or MspDeInit are not null, the @ref HAL_DAC_Init and @ref HAL_DAC_DeInit |
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| 207 | keep and use the user MspInit/MspDeInit callbacks (registered beforehand) |
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| 208 | |||
| 209 | Callbacks can be registered/unregistered in READY state only. |
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| 210 | Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered |
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| 211 | in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used |
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| 212 | during the Init/DeInit. |
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| 213 | In that case first register the MspInit/MspDeInit user callbacks |
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| 214 | using @ref HAL_DAC_RegisterCallback before calling @ref HAL_DAC_DeInit |
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| 215 | or @ref HAL_DAC_Init function. |
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| 216 | |||
| 217 | When The compilation define USE_HAL_DAC_REGISTER_CALLBACKS is set to 0 or |
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| 218 | not defined, the callback registering feature is not available |
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| 219 | and weak (surcharged) callbacks are used. |
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| 220 | |||
| 221 | *** DAC HAL driver macros list *** |
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| 222 | ============================================= |
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| 223 | [..] |
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| 224 | Below the list of most used macros in DAC HAL driver. |
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| 225 | |||
| 226 | (+) __HAL_DAC_ENABLE : Enable the DAC peripheral (For STM32F100x devices with specific feature: DMA underrun) |
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| 227 | (+) __HAL_DAC_DISABLE : Disable the DAC peripheral (For STM32F100x devices with specific feature: DMA underrun) |
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| 228 | (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags (For STM32F100x devices with specific feature: DMA underrun) |
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| 229 | (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status (For STM32F100x devices with specific feature: DMA underrun) |
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| 230 | |||
| 231 | [..] |
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| 232 | (@) You can refer to the DAC HAL driver header file for more useful macros |
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| 233 | |||
| 234 | @endverbatim |
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| 235 | ****************************************************************************** |
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| 236 | * @attention |
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| 237 | * |
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| 238 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
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| 239 | * All rights reserved.</center></h2> |
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| 240 | * |
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| 241 | * This software component is licensed by ST under BSD 3-Clause license, |
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| 242 | * the "License"; You may not use this file except in compliance with the |
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| 243 | * License. You may obtain a copy of the License at: |
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| 244 | * opensource.org/licenses/BSD-3-Clause |
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| 245 | * |
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| 246 | ****************************************************************************** |
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| 247 | */ |
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| 248 | |||
| 249 | /* Includes ------------------------------------------------------------------*/ |
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| 250 | #include "stm32f1xx_hal.h" |
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| 251 | |||
| 252 | /** @addtogroup STM32F1xx_HAL_Driver |
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| 253 | * @{ |
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| 254 | */ |
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| 255 | |||
| 256 | #ifdef HAL_DAC_MODULE_ENABLED |
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| 257 | #if defined(DAC) |
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| 258 | |||
| 259 | /** @defgroup DAC DAC |
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| 260 | * @brief DAC driver modules |
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| 261 | * @{ |
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| 262 | */ |
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| 263 | |||
| 264 | /* Private typedef -----------------------------------------------------------*/ |
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| 265 | /* Private define ------------------------------------------------------------*/ |
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| 266 | /* Private constants ---------------------------------------------------------*/ |
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| 267 | /* Private macro -------------------------------------------------------------*/ |
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| 268 | /* Private variables ---------------------------------------------------------*/ |
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| 269 | /* Private function prototypes -----------------------------------------------*/ |
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| 270 | /* Exported functions -------------------------------------------------------*/ |
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| 271 | |||
| 272 | /** @defgroup DAC_Exported_Functions DAC Exported Functions |
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| 273 | * @{ |
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| 274 | */ |
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| 275 | |||
| 276 | /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions |
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| 277 | * @brief Initialization and Configuration functions |
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| 278 | * |
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| 279 | @verbatim |
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| 280 | ============================================================================== |
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| 281 | ##### Initialization and de-initialization functions ##### |
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| 282 | ============================================================================== |
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| 283 | [..] This section provides functions allowing to: |
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| 284 | (+) Initialize and configure the DAC. |
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| 285 | (+) De-initialize the DAC. |
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| 286 | |||
| 287 | @endverbatim |
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| 288 | * @{ |
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| 289 | */ |
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| 290 | |||
| 291 | /** |
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| 292 | * @brief Initialize the DAC peripheral according to the specified parameters |
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| 293 | * in the DAC_InitStruct and initialize the associated handle. |
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| 294 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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| 295 | * the configuration information for the specified DAC. |
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| 296 | * @retval HAL status |
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| 297 | */ |
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| 298 | HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac) |
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| 299 | { |
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| 300 | /* Check DAC handle */ |
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| 301 | if (hdac == NULL) |
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| 302 | { |
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| 303 | return HAL_ERROR; |
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| 304 | } |
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| 305 | /* Check the parameters */ |
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| 306 | assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); |
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| 307 | |||
| 308 | if (hdac->State == HAL_DAC_STATE_RESET) |
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| 309 | { |
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| 310 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
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| 311 | /* Init the DAC Callback settings */ |
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| 312 | hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1; |
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| 313 | hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1; |
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| 314 | hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1; |
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| 315 | hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1; |
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| 316 | |||
| 317 | hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2; |
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| 318 | hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2; |
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| 319 | hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2; |
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| 320 | hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2; |
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| 321 | |||
| 322 | if (hdac->MspInitCallback == NULL) |
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| 323 | { |
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| 324 | hdac->MspInitCallback = HAL_DAC_MspInit; |
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| 325 | } |
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| 326 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
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| 327 | |||
| 328 | /* Allocate lock resource and initialize it */ |
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| 329 | hdac->Lock = HAL_UNLOCKED; |
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| 330 | |||
| 331 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
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| 332 | /* Init the low level hardware */ |
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| 333 | hdac->MspInitCallback(hdac); |
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| 334 | #else |
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| 335 | /* Init the low level hardware */ |
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| 336 | HAL_DAC_MspInit(hdac); |
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| 337 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
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| 338 | } |
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| 339 | |||
| 340 | /* Initialize the DAC state*/ |
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| 341 | hdac->State = HAL_DAC_STATE_BUSY; |
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| 342 | |||
| 343 | /* Set DAC error code to none */ |
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| 344 | hdac->ErrorCode = HAL_DAC_ERROR_NONE; |
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| 345 | |||
| 346 | /* Initialize the DAC state*/ |
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| 347 | hdac->State = HAL_DAC_STATE_READY; |
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| 348 | |||
| 349 | /* Return function status */ |
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| 350 | return HAL_OK; |
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| 351 | } |
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| 352 | |||
| 353 | /** |
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| 354 | * @brief Deinitialize the DAC peripheral registers to their default reset values. |
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| 355 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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| 356 | * the configuration information for the specified DAC. |
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| 357 | * @retval HAL status |
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| 358 | */ |
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| 359 | HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac) |
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| 360 | { |
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| 361 | /* Check DAC handle */ |
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| 362 | if (hdac == NULL) |
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| 363 | { |
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| 364 | return HAL_ERROR; |
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| 365 | } |
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| 366 | |||
| 367 | /* Check the parameters */ |
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| 368 | assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); |
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| 369 | |||
| 370 | /* Change DAC state */ |
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| 371 | hdac->State = HAL_DAC_STATE_BUSY; |
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| 372 | |||
| 373 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
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| 374 | if (hdac->MspDeInitCallback == NULL) |
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| 375 | { |
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| 376 | hdac->MspDeInitCallback = HAL_DAC_MspDeInit; |
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| 377 | } |
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| 378 | /* DeInit the low level hardware */ |
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| 379 | hdac->MspDeInitCallback(hdac); |
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| 380 | #else |
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| 381 | /* DeInit the low level hardware */ |
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| 382 | HAL_DAC_MspDeInit(hdac); |
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| 383 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
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| 384 | |||
| 385 | /* Set DAC error code to none */ |
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| 386 | hdac->ErrorCode = HAL_DAC_ERROR_NONE; |
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| 387 | |||
| 388 | /* Change DAC state */ |
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| 389 | hdac->State = HAL_DAC_STATE_RESET; |
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| 390 | |||
| 391 | /* Release Lock */ |
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| 392 | __HAL_UNLOCK(hdac); |
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| 393 | |||
| 394 | /* Return function status */ |
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| 395 | return HAL_OK; |
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| 396 | } |
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| 397 | |||
| 398 | /** |
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| 399 | * @brief Initialize the DAC MSP. |
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| 400 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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| 401 | * the configuration information for the specified DAC. |
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| 402 | * @retval None |
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| 403 | */ |
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| 404 | __weak void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac) |
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| 405 | { |
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| 406 | /* Prevent unused argument(s) compilation warning */ |
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| 407 | UNUSED(hdac); |
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| 408 | |||
| 409 | /* NOTE : This function should not be modified, when the callback is needed, |
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| 410 | the HAL_DAC_MspInit could be implemented in the user file |
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| 411 | */ |
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| 412 | } |
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| 413 | |||
| 414 | /** |
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| 415 | * @brief DeInitialize the DAC MSP. |
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| 416 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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| 417 | * the configuration information for the specified DAC. |
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| 418 | * @retval None |
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| 419 | */ |
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| 420 | __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac) |
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| 421 | { |
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| 422 | /* Prevent unused argument(s) compilation warning */ |
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| 423 | UNUSED(hdac); |
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| 424 | |||
| 425 | /* NOTE : This function should not be modified, when the callback is needed, |
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| 426 | the HAL_DAC_MspDeInit could be implemented in the user file |
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| 427 | */ |
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| 428 | } |
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| 429 | |||
| 430 | /** |
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| 431 | * @} |
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| 432 | */ |
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| 433 | |||
| 434 | /** @defgroup DAC_Exported_Functions_Group2 IO operation functions |
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| 435 | * @brief IO operation functions |
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| 436 | * |
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| 437 | @verbatim |
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| 438 | ============================================================================== |
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| 439 | ##### IO operation functions ##### |
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| 440 | ============================================================================== |
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| 441 | [..] This section provides functions allowing to: |
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| 442 | (+) Start conversion. |
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| 443 | (+) Stop conversion. |
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| 444 | (+) Start conversion and enable DMA transfer. |
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| 445 | (+) Stop conversion and disable DMA transfer. |
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| 446 | (+) Get result of conversion. |
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| 447 | |||
| 448 | @endverbatim |
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| 449 | * @{ |
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| 450 | */ |
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| 451 | |||
| 452 | /** |
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| 453 | * @brief Enables DAC and starts conversion of channel. |
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| 454 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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| 455 | * the configuration information for the specified DAC. |
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| 456 | * @param Channel The selected DAC channel. |
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| 457 | * This parameter can be one of the following values: |
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| 458 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
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| 459 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
||
| 460 | * @retval HAL status |
||
| 461 | */ |
||
| 462 | HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel) |
||
| 463 | { |
||
| 464 | /* Check the parameters */ |
||
| 465 | assert_param(IS_DAC_CHANNEL(Channel)); |
||
| 466 | |||
| 467 | /* Process locked */ |
||
| 468 | __HAL_LOCK(hdac); |
||
| 469 | |||
| 470 | /* Change DAC state */ |
||
| 471 | hdac->State = HAL_DAC_STATE_BUSY; |
||
| 472 | |||
| 473 | /* Enable the Peripheral */ |
||
| 474 | __HAL_DAC_ENABLE(hdac, Channel); |
||
| 475 | |||
| 476 | if (Channel == DAC_CHANNEL_1) |
||
| 477 | { |
||
| 478 | /* Check if software trigger enabled */ |
||
| 479 | if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_TRIGGER_SOFTWARE) |
||
| 480 | { |
||
| 481 | /* Enable the selected DAC software conversion */ |
||
| 482 | SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1); |
||
| 483 | } |
||
| 484 | } |
||
| 485 | else |
||
| 486 | { |
||
| 487 | /* Check if software trigger enabled */ |
||
| 488 | if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_TRIGGER_SOFTWARE << (Channel & 0x10UL))) |
||
| 489 | { |
||
| 490 | /* Enable the selected DAC software conversion*/ |
||
| 491 | SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2); |
||
| 492 | } |
||
| 493 | } |
||
| 494 | |||
| 495 | /* Change DAC state */ |
||
| 496 | hdac->State = HAL_DAC_STATE_READY; |
||
| 497 | |||
| 498 | /* Process unlocked */ |
||
| 499 | __HAL_UNLOCK(hdac); |
||
| 500 | |||
| 501 | /* Return function status */ |
||
| 502 | return HAL_OK; |
||
| 503 | } |
||
| 504 | |||
| 505 | /** |
||
| 506 | * @brief Disables DAC and stop conversion of channel. |
||
| 507 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
||
| 508 | * the configuration information for the specified DAC. |
||
| 509 | * @param Channel The selected DAC channel. |
||
| 510 | * This parameter can be one of the following values: |
||
| 511 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
||
| 512 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
||
| 513 | * @retval HAL status |
||
| 514 | */ |
||
| 515 | HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel) |
||
| 516 | { |
||
| 517 | /* Check the parameters */ |
||
| 518 | assert_param(IS_DAC_CHANNEL(Channel)); |
||
| 519 | |||
| 520 | /* Disable the Peripheral */ |
||
| 521 | __HAL_DAC_DISABLE(hdac, Channel); |
||
| 522 | |||
| 523 | /* Change DAC state */ |
||
| 524 | hdac->State = HAL_DAC_STATE_READY; |
||
| 525 | |||
| 526 | /* Return function status */ |
||
| 527 | return HAL_OK; |
||
| 528 | } |
||
| 529 | |||
| 530 | /** |
||
| 531 | * @brief Enables DAC and starts conversion of channel. |
||
| 532 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
||
| 533 | * the configuration information for the specified DAC. |
||
| 534 | * @param Channel The selected DAC channel. |
||
| 535 | * This parameter can be one of the following values: |
||
| 536 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
||
| 537 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
||
| 538 | * @param pData The destination peripheral Buffer address. |
||
| 539 | * @param Length The length of data to be transferred from memory to DAC peripheral |
||
| 540 | * @param Alignment Specifies the data alignment for DAC channel. |
||
| 541 | * This parameter can be one of the following values: |
||
| 542 | * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected |
||
| 543 | * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected |
||
| 544 | * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected |
||
| 545 | * @retval HAL status |
||
| 546 | */ |
||
| 547 | HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length, |
||
| 548 | uint32_t Alignment) |
||
| 549 | { |
||
| 550 | HAL_StatusTypeDef status; |
||
| 551 | uint32_t tmpreg = 0U; |
||
| 552 | |||
| 553 | /* Check the parameters */ |
||
| 554 | assert_param(IS_DAC_CHANNEL(Channel)); |
||
| 555 | assert_param(IS_DAC_ALIGN(Alignment)); |
||
| 556 | |||
| 557 | /* Process locked */ |
||
| 558 | __HAL_LOCK(hdac); |
||
| 559 | |||
| 560 | /* Change DAC state */ |
||
| 561 | hdac->State = HAL_DAC_STATE_BUSY; |
||
| 562 | |||
| 563 | if (Channel == DAC_CHANNEL_1) |
||
| 564 | { |
||
| 565 | /* Set the DMA transfer complete callback for channel1 */ |
||
| 566 | hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1; |
||
| 567 | |||
| 568 | /* Set the DMA half transfer complete callback for channel1 */ |
||
| 569 | hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1; |
||
| 570 | |||
| 571 | /* Set the DMA error callback for channel1 */ |
||
| 572 | hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1; |
||
| 573 | |||
| 574 | /* Enable the selected DAC channel1 DMA request */ |
||
| 575 | SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); |
||
| 576 | |||
| 577 | /* Case of use of channel 1 */ |
||
| 578 | switch (Alignment) |
||
| 579 | { |
||
| 580 | case DAC_ALIGN_12B_R: |
||
| 581 | /* Get DHR12R1 address */ |
||
| 582 | tmpreg = (uint32_t)&hdac->Instance->DHR12R1; |
||
| 583 | break; |
||
| 584 | case DAC_ALIGN_12B_L: |
||
| 585 | /* Get DHR12L1 address */ |
||
| 586 | tmpreg = (uint32_t)&hdac->Instance->DHR12L1; |
||
| 587 | break; |
||
| 588 | case DAC_ALIGN_8B_R: |
||
| 589 | /* Get DHR8R1 address */ |
||
| 590 | tmpreg = (uint32_t)&hdac->Instance->DHR8R1; |
||
| 591 | break; |
||
| 592 | default: |
||
| 593 | break; |
||
| 594 | } |
||
| 595 | } |
||
| 596 | else |
||
| 597 | { |
||
| 598 | /* Set the DMA transfer complete callback for channel2 */ |
||
| 599 | hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2; |
||
| 600 | |||
| 601 | /* Set the DMA half transfer complete callback for channel2 */ |
||
| 602 | hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2; |
||
| 603 | |||
| 604 | /* Set the DMA error callback for channel2 */ |
||
| 605 | hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2; |
||
| 606 | |||
| 607 | /* Enable the selected DAC channel2 DMA request */ |
||
| 608 | SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2); |
||
| 609 | |||
| 610 | /* Case of use of channel 2 */ |
||
| 611 | switch (Alignment) |
||
| 612 | { |
||
| 613 | case DAC_ALIGN_12B_R: |
||
| 614 | /* Get DHR12R2 address */ |
||
| 615 | tmpreg = (uint32_t)&hdac->Instance->DHR12R2; |
||
| 616 | break; |
||
| 617 | case DAC_ALIGN_12B_L: |
||
| 618 | /* Get DHR12L2 address */ |
||
| 619 | tmpreg = (uint32_t)&hdac->Instance->DHR12L2; |
||
| 620 | break; |
||
| 621 | case DAC_ALIGN_8B_R: |
||
| 622 | /* Get DHR8R2 address */ |
||
| 623 | tmpreg = (uint32_t)&hdac->Instance->DHR8R2; |
||
| 624 | break; |
||
| 625 | default: |
||
| 626 | break; |
||
| 627 | } |
||
| 628 | } |
||
| 629 | |||
| 630 | /* Enable the DMA Stream */ |
||
| 631 | if (Channel == DAC_CHANNEL_1) |
||
| 632 | { |
||
| 633 | #if defined(DAC_CR_DMAUDRIE1) |
||
| 634 | /* Enable the DAC DMA underrun interrupt */ |
||
| 635 | __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1); |
||
| 636 | #endif /* DAC_CR_DMAUDRIE1 */ |
||
| 637 | /* Enable the DMA Stream */ |
||
| 638 | status = HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length); |
||
| 639 | } |
||
| 640 | else |
||
| 641 | { |
||
| 642 | #if defined(DAC_CR_DMAUDRIE2) |
||
| 643 | /* Enable the DAC DMA underrun interrupt */ |
||
| 644 | __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2); |
||
| 645 | #endif /* DAC_CR_DMAUDRIE2 */ |
||
| 646 | /* Enable the DMA Stream */ |
||
| 647 | status = HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length); |
||
| 648 | } |
||
| 649 | |||
| 650 | /* Process Unlocked */ |
||
| 651 | __HAL_UNLOCK(hdac); |
||
| 652 | |||
| 653 | if (status == HAL_OK) |
||
| 654 | { |
||
| 655 | /* Enable the Peripheral */ |
||
| 656 | __HAL_DAC_ENABLE(hdac, Channel); |
||
| 657 | } |
||
| 658 | else |
||
| 659 | { |
||
| 660 | hdac->ErrorCode |= HAL_DAC_ERROR_DMA; |
||
| 661 | } |
||
| 662 | |||
| 663 | /* Return function status */ |
||
| 664 | return status; |
||
| 665 | } |
||
| 666 | |||
| 667 | /** |
||
| 668 | * @brief Disables DAC and stop conversion of channel. |
||
| 669 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
||
| 670 | * the configuration information for the specified DAC. |
||
| 671 | * @param Channel The selected DAC channel. |
||
| 672 | * This parameter can be one of the following values: |
||
| 673 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
||
| 674 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
||
| 675 | * @retval HAL status |
||
| 676 | */ |
||
| 677 | HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel) |
||
| 678 | { |
||
| 679 | HAL_StatusTypeDef status; |
||
| 680 | |||
| 681 | /* Check the parameters */ |
||
| 682 | assert_param(IS_DAC_CHANNEL(Channel)); |
||
| 683 | |||
| 684 | /* Disable the selected DAC channel DMA request */ |
||
| 685 | hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << (Channel & 0x10UL)); |
||
| 686 | |||
| 687 | /* Disable the Peripheral */ |
||
| 688 | __HAL_DAC_DISABLE(hdac, Channel); |
||
| 689 | |||
| 690 | /* Disable the DMA Stream */ |
||
| 691 | |||
| 692 | /* Channel1 is used */ |
||
| 693 | if (Channel == DAC_CHANNEL_1) |
||
| 694 | { |
||
| 695 | /* Disable the DMA Stream */ |
||
| 696 | status = HAL_DMA_Abort(hdac->DMA_Handle1); |
||
| 697 | #if defined(DAC_CR_DMAUDRIE1) |
||
| 698 | /* Disable the DAC DMA underrun interrupt */ |
||
| 699 | __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1); |
||
| 700 | #endif /* DAC_CR_DMAUDRIE1 */ |
||
| 701 | } |
||
| 702 | else /* Channel2 is used for */ |
||
| 703 | { |
||
| 704 | /* Disable the DMA Stream */ |
||
| 705 | status = HAL_DMA_Abort(hdac->DMA_Handle2); |
||
| 706 | #if defined(DAC_CR_DMAUDRIE2) |
||
| 707 | /* Disable the DAC DMA underrun interrupt */ |
||
| 708 | __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2); |
||
| 709 | #endif /* DAC_CR_DMAUDRIE2 */ |
||
| 710 | } |
||
| 711 | |||
| 712 | /* Check if DMA Stream effectively disabled */ |
||
| 713 | if (status != HAL_OK) |
||
| 714 | { |
||
| 715 | /* Update DAC state machine to error */ |
||
| 716 | hdac->State = HAL_DAC_STATE_ERROR; |
||
| 717 | } |
||
| 718 | else |
||
| 719 | { |
||
| 720 | /* Change DAC state */ |
||
| 721 | hdac->State = HAL_DAC_STATE_READY; |
||
| 722 | } |
||
| 723 | |||
| 724 | /* Return function status */ |
||
| 725 | return status; |
||
| 726 | } |
||
| 727 | |||
| 728 | /** |
||
| 729 | * @brief Handles DAC interrupt request |
||
| 730 | * This function uses the interruption of DMA |
||
| 731 | * underrun. |
||
| 732 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
||
| 733 | * the configuration information for the specified DAC. |
||
| 734 | * @retval None |
||
| 735 | */ |
||
| 736 | void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac) |
||
| 737 | { |
||
| 738 | #if defined(DAC_SR_DMAUDR1) |
||
| 739 | if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1)) |
||
| 740 | { |
||
| 741 | /* Check underrun flag of DAC channel 1 */ |
||
| 742 | if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1)) |
||
| 743 | { |
||
| 744 | /* Change DAC state to error state */ |
||
| 745 | hdac->State = HAL_DAC_STATE_ERROR; |
||
| 746 | |||
| 747 | /* Set DAC error code to chanel1 DMA underrun error */ |
||
| 748 | SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1); |
||
| 749 | |||
| 750 | /* Clear the underrun flag */ |
||
| 751 | __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR1); |
||
| 752 | |||
| 753 | /* Disable the selected DAC channel1 DMA request */ |
||
| 754 | CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); |
||
| 755 | |||
| 756 | /* Error callback */ |
||
| 757 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
||
| 758 | hdac->DMAUnderrunCallbackCh1(hdac); |
||
| 759 | #else |
||
| 760 | HAL_DAC_DMAUnderrunCallbackCh1(hdac); |
||
| 761 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
||
| 762 | } |
||
| 763 | } |
||
| 764 | #endif /* DAC_SR_DMAUDR1 */ |
||
| 765 | |||
| 766 | #if defined(DAC_SR_DMAUDR2) |
||
| 767 | if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2)) |
||
| 768 | { |
||
| 769 | /* Check underrun flag of DAC channel 2 */ |
||
| 770 | if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2)) |
||
| 771 | { |
||
| 772 | /* Change DAC state to error state */ |
||
| 773 | hdac->State = HAL_DAC_STATE_ERROR; |
||
| 774 | |||
| 775 | /* Set DAC error code to channel2 DMA underrun error */ |
||
| 776 | SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2); |
||
| 777 | |||
| 778 | /* Clear the underrun flag */ |
||
| 779 | __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR2); |
||
| 780 | |||
| 781 | /* Disable the selected DAC channel2 DMA request */ |
||
| 782 | CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2); |
||
| 783 | |||
| 784 | /* Error callback */ |
||
| 785 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
||
| 786 | hdac->DMAUnderrunCallbackCh2(hdac); |
||
| 787 | #else |
||
| 788 | HAL_DACEx_DMAUnderrunCallbackCh2(hdac); |
||
| 789 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
||
| 790 | } |
||
| 791 | } |
||
| 792 | #endif /* DAC_SR_DMAUDR2 */ |
||
| 793 | } |
||
| 794 | |||
| 795 | /** |
||
| 796 | * @brief Set the specified data holding register value for DAC channel. |
||
| 797 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
||
| 798 | * the configuration information for the specified DAC. |
||
| 799 | * @param Channel The selected DAC channel. |
||
| 800 | * This parameter can be one of the following values: |
||
| 801 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
||
| 802 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
||
| 803 | * @param Alignment Specifies the data alignment. |
||
| 804 | * This parameter can be one of the following values: |
||
| 805 | * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected |
||
| 806 | * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected |
||
| 807 | * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected |
||
| 808 | * @param Data Data to be loaded in the selected data holding register. |
||
| 809 | * @retval HAL status |
||
| 810 | */ |
||
| 811 | HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data) |
||
| 812 | { |
||
| 813 | __IO uint32_t tmp = 0; |
||
| 814 | |||
| 815 | /* Check the parameters */ |
||
| 816 | assert_param(IS_DAC_CHANNEL(Channel)); |
||
| 817 | assert_param(IS_DAC_ALIGN(Alignment)); |
||
| 818 | assert_param(IS_DAC_DATA(Data)); |
||
| 819 | |||
| 820 | tmp = (uint32_t)hdac->Instance; |
||
| 821 | if (Channel == DAC_CHANNEL_1) |
||
| 822 | { |
||
| 823 | tmp += DAC_DHR12R1_ALIGNMENT(Alignment); |
||
| 824 | } |
||
| 825 | else |
||
| 826 | { |
||
| 827 | tmp += DAC_DHR12R2_ALIGNMENT(Alignment); |
||
| 828 | } |
||
| 829 | |||
| 830 | /* Set the DAC channel selected data holding register */ |
||
| 831 | *(__IO uint32_t *) tmp = Data; |
||
| 832 | |||
| 833 | /* Return function status */ |
||
| 834 | return HAL_OK; |
||
| 835 | } |
||
| 836 | |||
| 837 | /** |
||
| 838 | * @brief Conversion complete callback in non-blocking mode for Channel1 |
||
| 839 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
||
| 840 | * the configuration information for the specified DAC. |
||
| 841 | * @retval None |
||
| 842 | */ |
||
| 843 | __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac) |
||
| 844 | { |
||
| 845 | /* Prevent unused argument(s) compilation warning */ |
||
| 846 | UNUSED(hdac); |
||
| 847 | |||
| 848 | /* NOTE : This function should not be modified, when the callback is needed, |
||
| 849 | the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file |
||
| 850 | */ |
||
| 851 | } |
||
| 852 | |||
| 853 | /** |
||
| 854 | * @brief Conversion half DMA transfer callback in non-blocking mode for Channel1 |
||
| 855 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
||
| 856 | * the configuration information for the specified DAC. |
||
| 857 | * @retval None |
||
| 858 | */ |
||
| 859 | __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac) |
||
| 860 | { |
||
| 861 | /* Prevent unused argument(s) compilation warning */ |
||
| 862 | UNUSED(hdac); |
||
| 863 | |||
| 864 | /* NOTE : This function should not be modified, when the callback is needed, |
||
| 865 | the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file |
||
| 866 | */ |
||
| 867 | } |
||
| 868 | |||
| 869 | /** |
||
| 870 | * @brief Error DAC callback for Channel1. |
||
| 871 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
||
| 872 | * the configuration information for the specified DAC. |
||
| 873 | * @retval None |
||
| 874 | */ |
||
| 875 | __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac) |
||
| 876 | { |
||
| 877 | /* Prevent unused argument(s) compilation warning */ |
||
| 878 | UNUSED(hdac); |
||
| 879 | |||
| 880 | /* NOTE : This function should not be modified, when the callback is needed, |
||
| 881 | the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file |
||
| 882 | */ |
||
| 883 | } |
||
| 884 | |||
| 885 | /** |
||
| 886 | * @brief DMA underrun DAC callback for channel1. |
||
| 887 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
||
| 888 | * the configuration information for the specified DAC. |
||
| 889 | * @retval None |
||
| 890 | */ |
||
| 891 | __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac) |
||
| 892 | { |
||
| 893 | /* Prevent unused argument(s) compilation warning */ |
||
| 894 | UNUSED(hdac); |
||
| 895 | |||
| 896 | /* NOTE : This function should not be modified, when the callback is needed, |
||
| 897 | the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file |
||
| 898 | */ |
||
| 899 | } |
||
| 900 | |||
| 901 | /** |
||
| 902 | * @} |
||
| 903 | */ |
||
| 904 | |||
| 905 | /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions |
||
| 906 | * @brief Peripheral Control functions |
||
| 907 | * |
||
| 908 | @verbatim |
||
| 909 | ============================================================================== |
||
| 910 | ##### Peripheral Control functions ##### |
||
| 911 | ============================================================================== |
||
| 912 | [..] This section provides functions allowing to: |
||
| 913 | (+) Configure channels. |
||
| 914 | (+) Set the specified data holding register value for DAC channel. |
||
| 915 | |||
| 916 | @endverbatim |
||
| 917 | * @{ |
||
| 918 | */ |
||
| 919 | |||
| 920 | /** |
||
| 921 | * @brief Returns the last data output value of the selected DAC channel. |
||
| 922 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
||
| 923 | * the configuration information for the specified DAC. |
||
| 924 | * @param Channel The selected DAC channel. |
||
| 925 | * This parameter can be one of the following values: |
||
| 926 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
||
| 927 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
||
| 928 | * @retval The selected DAC channel data output value. |
||
| 929 | */ |
||
| 930 | uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel) |
||
| 931 | { |
||
| 932 | /* Check the parameters */ |
||
| 933 | assert_param(IS_DAC_CHANNEL(Channel)); |
||
| 934 | |||
| 935 | /* Returns the DAC channel data output register value */ |
||
| 936 | if (Channel == DAC_CHANNEL_1) |
||
| 937 | { |
||
| 938 | return hdac->Instance->DOR1; |
||
| 939 | } |
||
| 940 | else |
||
| 941 | { |
||
| 942 | return hdac->Instance->DOR2; |
||
| 943 | } |
||
| 944 | } |
||
| 945 | |||
| 946 | /** |
||
| 947 | * @brief Configures the selected DAC channel. |
||
| 948 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
||
| 949 | * the configuration information for the specified DAC. |
||
| 950 | * @param sConfig DAC configuration structure. |
||
| 951 | * @param Channel The selected DAC channel. |
||
| 952 | * This parameter can be one of the following values: |
||
| 953 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
||
| 954 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
||
| 955 | * @retval HAL status |
||
| 956 | */ |
||
| 957 | HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel) |
||
| 958 | { |
||
| 959 | uint32_t tmpreg1; |
||
| 960 | uint32_t tmpreg2; |
||
| 961 | |||
| 962 | /* Check the DAC parameters */ |
||
| 963 | assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger)); |
||
| 964 | assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer)); |
||
| 965 | assert_param(IS_DAC_CHANNEL(Channel)); |
||
| 966 | |||
| 967 | /* Process locked */ |
||
| 968 | __HAL_LOCK(hdac); |
||
| 969 | |||
| 970 | /* Change DAC state */ |
||
| 971 | hdac->State = HAL_DAC_STATE_BUSY; |
||
| 972 | |||
| 973 | /* Get the DAC CR value */ |
||
| 974 | tmpreg1 = hdac->Instance->CR; |
||
| 975 | /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */ |
||
| 976 | tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << (Channel & 0x10UL)); |
||
| 977 | /* Configure for the selected DAC channel: buffer output, trigger */ |
||
| 978 | /* Set TSELx and TENx bits according to DAC_Trigger value */ |
||
| 979 | /* Set BOFFx bit according to DAC_OutputBuffer value */ |
||
| 980 | tmpreg2 = (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer); |
||
| 981 | /* Calculate CR register value depending on DAC_Channel */ |
||
| 982 | tmpreg1 |= tmpreg2 << (Channel & 0x10UL); |
||
| 983 | /* Write to DAC CR */ |
||
| 984 | hdac->Instance->CR = tmpreg1; |
||
| 985 | /* Disable wave generation */ |
||
| 986 | CLEAR_BIT(hdac->Instance->CR, (DAC_CR_WAVE1 << (Channel & 0x10UL))); |
||
| 987 | /* Disable wave generation */ |
||
| 988 | hdac->Instance->CR &= ~(DAC_CR_WAVE1 << (Channel & 0x10UL)); |
||
| 989 | |||
| 990 | /* Change DAC state */ |
||
| 991 | hdac->State = HAL_DAC_STATE_READY; |
||
| 992 | |||
| 993 | /* Process unlocked */ |
||
| 994 | __HAL_UNLOCK(hdac); |
||
| 995 | |||
| 996 | /* Return function status */ |
||
| 997 | return HAL_OK; |
||
| 998 | } |
||
| 999 | |||
| 1000 | /** |
||
| 1001 | * @} |
||
| 1002 | */ |
||
| 1003 | |||
| 1004 | /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions |
||
| 1005 | * @brief Peripheral State and Errors functions |
||
| 1006 | * |
||
| 1007 | @verbatim |
||
| 1008 | ============================================================================== |
||
| 1009 | ##### Peripheral State and Errors functions ##### |
||
| 1010 | ============================================================================== |
||
| 1011 | [..] |
||
| 1012 | This subsection provides functions allowing to |
||
| 1013 | (+) Check the DAC state. |
||
| 1014 | (+) Check the DAC Errors. |
||
| 1015 | |||
| 1016 | @endverbatim |
||
| 1017 | * @{ |
||
| 1018 | */ |
||
| 1019 | |||
| 1020 | /** |
||
| 1021 | * @brief return the DAC handle state |
||
| 1022 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
||
| 1023 | * the configuration information for the specified DAC. |
||
| 1024 | * @retval HAL state |
||
| 1025 | */ |
||
| 1026 | HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac) |
||
| 1027 | { |
||
| 1028 | /* Return DAC handle state */ |
||
| 1029 | return hdac->State; |
||
| 1030 | } |
||
| 1031 | |||
| 1032 | |||
| 1033 | /** |
||
| 1034 | * @brief Return the DAC error code |
||
| 1035 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
||
| 1036 | * the configuration information for the specified DAC. |
||
| 1037 | * @retval DAC Error Code |
||
| 1038 | */ |
||
| 1039 | uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac) |
||
| 1040 | { |
||
| 1041 | return hdac->ErrorCode; |
||
| 1042 | } |
||
| 1043 | |||
| 1044 | /** |
||
| 1045 | * @} |
||
| 1046 | */ |
||
| 1047 | |||
| 1048 | /** |
||
| 1049 | * @} |
||
| 1050 | */ |
||
| 1051 | |||
| 1052 | /** @addtogroup DAC_Exported_Functions |
||
| 1053 | * @{ |
||
| 1054 | */ |
||
| 1055 | |||
| 1056 | /** @addtogroup DAC_Exported_Functions_Group1 |
||
| 1057 | * @{ |
||
| 1058 | */ |
||
| 1059 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
||
| 1060 | /** |
||
| 1061 | * @brief Register a User DAC Callback |
||
| 1062 | * To be used instead of the weak (surcharged) predefined callback |
||
| 1063 | * @param hdac DAC handle |
||
| 1064 | * @param CallbackID ID of the callback to be registered |
||
| 1065 | * This parameter can be one of the following values: |
||
| 1066 | * @arg @ref HAL_DAC_ERROR_INVALID_CALLBACK DAC Error Callback ID |
||
| 1067 | * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 Complete Callback ID |
||
| 1068 | * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID |
||
| 1069 | * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID |
||
| 1070 | * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID |
||
| 1071 | * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID |
||
| 1072 | * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID |
||
| 1073 | * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID |
||
| 1074 | * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID |
||
| 1075 | * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID |
||
| 1076 | * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID |
||
| 1077 | * |
||
| 1078 | * @param pCallback pointer to the Callback function |
||
| 1079 | * @retval status |
||
| 1080 | */ |
||
| 1081 | HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID, |
||
| 1082 | pDAC_CallbackTypeDef pCallback) |
||
| 1083 | { |
||
| 1084 | HAL_StatusTypeDef status = HAL_OK; |
||
| 1085 | |||
| 1086 | if (pCallback == NULL) |
||
| 1087 | { |
||
| 1088 | /* Update the error code */ |
||
| 1089 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
||
| 1090 | return HAL_ERROR; |
||
| 1091 | } |
||
| 1092 | |||
| 1093 | /* Process locked */ |
||
| 1094 | __HAL_LOCK(hdac); |
||
| 1095 | |||
| 1096 | if (hdac->State == HAL_DAC_STATE_READY) |
||
| 1097 | { |
||
| 1098 | switch (CallbackID) |
||
| 1099 | { |
||
| 1100 | case HAL_DAC_CH1_COMPLETE_CB_ID : |
||
| 1101 | hdac->ConvCpltCallbackCh1 = pCallback; |
||
| 1102 | break; |
||
| 1103 | case HAL_DAC_CH1_HALF_COMPLETE_CB_ID : |
||
| 1104 | hdac->ConvHalfCpltCallbackCh1 = pCallback; |
||
| 1105 | break; |
||
| 1106 | case HAL_DAC_CH1_ERROR_ID : |
||
| 1107 | hdac->ErrorCallbackCh1 = pCallback; |
||
| 1108 | break; |
||
| 1109 | case HAL_DAC_CH1_UNDERRUN_CB_ID : |
||
| 1110 | hdac->DMAUnderrunCallbackCh1 = pCallback; |
||
| 1111 | break; |
||
| 1112 | case HAL_DAC_CH2_COMPLETE_CB_ID : |
||
| 1113 | hdac->ConvCpltCallbackCh2 = pCallback; |
||
| 1114 | break; |
||
| 1115 | case HAL_DAC_CH2_HALF_COMPLETE_CB_ID : |
||
| 1116 | hdac->ConvHalfCpltCallbackCh2 = pCallback; |
||
| 1117 | break; |
||
| 1118 | case HAL_DAC_CH2_ERROR_ID : |
||
| 1119 | hdac->ErrorCallbackCh2 = pCallback; |
||
| 1120 | break; |
||
| 1121 | case HAL_DAC_CH2_UNDERRUN_CB_ID : |
||
| 1122 | hdac->DMAUnderrunCallbackCh2 = pCallback; |
||
| 1123 | break; |
||
| 1124 | case HAL_DAC_MSPINIT_CB_ID : |
||
| 1125 | hdac->MspInitCallback = pCallback; |
||
| 1126 | break; |
||
| 1127 | case HAL_DAC_MSPDEINIT_CB_ID : |
||
| 1128 | hdac->MspDeInitCallback = pCallback; |
||
| 1129 | break; |
||
| 1130 | default : |
||
| 1131 | /* Update the error code */ |
||
| 1132 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
||
| 1133 | /* update return status */ |
||
| 1134 | status = HAL_ERROR; |
||
| 1135 | break; |
||
| 1136 | } |
||
| 1137 | } |
||
| 1138 | else if (hdac->State == HAL_DAC_STATE_RESET) |
||
| 1139 | { |
||
| 1140 | switch (CallbackID) |
||
| 1141 | { |
||
| 1142 | case HAL_DAC_MSPINIT_CB_ID : |
||
| 1143 | hdac->MspInitCallback = pCallback; |
||
| 1144 | break; |
||
| 1145 | case HAL_DAC_MSPDEINIT_CB_ID : |
||
| 1146 | hdac->MspDeInitCallback = pCallback; |
||
| 1147 | break; |
||
| 1148 | default : |
||
| 1149 | /* Update the error code */ |
||
| 1150 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
||
| 1151 | /* update return status */ |
||
| 1152 | status = HAL_ERROR; |
||
| 1153 | break; |
||
| 1154 | } |
||
| 1155 | } |
||
| 1156 | else |
||
| 1157 | { |
||
| 1158 | /* Update the error code */ |
||
| 1159 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
||
| 1160 | /* update return status */ |
||
| 1161 | status = HAL_ERROR; |
||
| 1162 | } |
||
| 1163 | |||
| 1164 | /* Release Lock */ |
||
| 1165 | __HAL_UNLOCK(hdac); |
||
| 1166 | return status; |
||
| 1167 | } |
||
| 1168 | |||
| 1169 | /** |
||
| 1170 | * @brief Unregister a User DAC Callback |
||
| 1171 | * DAC Callback is redirected to the weak (surcharged) predefined callback |
||
| 1172 | * @param hdac DAC handle |
||
| 1173 | * @param CallbackID ID of the callback to be unregistered |
||
| 1174 | * This parameter can be one of the following values: |
||
| 1175 | * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 tranfer Complete Callback ID |
||
| 1176 | * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID |
||
| 1177 | * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID |
||
| 1178 | * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID |
||
| 1179 | * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID |
||
| 1180 | * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID |
||
| 1181 | * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID |
||
| 1182 | * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID |
||
| 1183 | * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID |
||
| 1184 | * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID |
||
| 1185 | * @arg @ref HAL_DAC_ALL_CB_ID DAC All callbacks |
||
| 1186 | * @retval status |
||
| 1187 | */ |
||
| 1188 | HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID) |
||
| 1189 | { |
||
| 1190 | HAL_StatusTypeDef status = HAL_OK; |
||
| 1191 | |||
| 1192 | /* Process locked */ |
||
| 1193 | __HAL_LOCK(hdac); |
||
| 1194 | |||
| 1195 | if (hdac->State == HAL_DAC_STATE_READY) |
||
| 1196 | { |
||
| 1197 | switch (CallbackID) |
||
| 1198 | { |
||
| 1199 | case HAL_DAC_CH1_COMPLETE_CB_ID : |
||
| 1200 | hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1; |
||
| 1201 | break; |
||
| 1202 | case HAL_DAC_CH1_HALF_COMPLETE_CB_ID : |
||
| 1203 | hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1; |
||
| 1204 | break; |
||
| 1205 | case HAL_DAC_CH1_ERROR_ID : |
||
| 1206 | hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1; |
||
| 1207 | break; |
||
| 1208 | case HAL_DAC_CH1_UNDERRUN_CB_ID : |
||
| 1209 | hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1; |
||
| 1210 | break; |
||
| 1211 | case HAL_DAC_CH2_COMPLETE_CB_ID : |
||
| 1212 | hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2; |
||
| 1213 | break; |
||
| 1214 | case HAL_DAC_CH2_HALF_COMPLETE_CB_ID : |
||
| 1215 | hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2; |
||
| 1216 | break; |
||
| 1217 | case HAL_DAC_CH2_ERROR_ID : |
||
| 1218 | hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2; |
||
| 1219 | break; |
||
| 1220 | case HAL_DAC_CH2_UNDERRUN_CB_ID : |
||
| 1221 | hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2; |
||
| 1222 | break; |
||
| 1223 | case HAL_DAC_MSPINIT_CB_ID : |
||
| 1224 | hdac->MspInitCallback = HAL_DAC_MspInit; |
||
| 1225 | break; |
||
| 1226 | case HAL_DAC_MSPDEINIT_CB_ID : |
||
| 1227 | hdac->MspDeInitCallback = HAL_DAC_MspDeInit; |
||
| 1228 | break; |
||
| 1229 | case HAL_DAC_ALL_CB_ID : |
||
| 1230 | hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1; |
||
| 1231 | hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1; |
||
| 1232 | hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1; |
||
| 1233 | hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1; |
||
| 1234 | hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2; |
||
| 1235 | hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2; |
||
| 1236 | hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2; |
||
| 1237 | hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2; |
||
| 1238 | hdac->MspInitCallback = HAL_DAC_MspInit; |
||
| 1239 | hdac->MspDeInitCallback = HAL_DAC_MspDeInit; |
||
| 1240 | break; |
||
| 1241 | default : |
||
| 1242 | /* Update the error code */ |
||
| 1243 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
||
| 1244 | /* update return status */ |
||
| 1245 | status = HAL_ERROR; |
||
| 1246 | break; |
||
| 1247 | } |
||
| 1248 | } |
||
| 1249 | else if (hdac->State == HAL_DAC_STATE_RESET) |
||
| 1250 | { |
||
| 1251 | switch (CallbackID) |
||
| 1252 | { |
||
| 1253 | case HAL_DAC_MSPINIT_CB_ID : |
||
| 1254 | hdac->MspInitCallback = HAL_DAC_MspInit; |
||
| 1255 | break; |
||
| 1256 | case HAL_DAC_MSPDEINIT_CB_ID : |
||
| 1257 | hdac->MspDeInitCallback = HAL_DAC_MspDeInit; |
||
| 1258 | break; |
||
| 1259 | default : |
||
| 1260 | /* Update the error code */ |
||
| 1261 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
||
| 1262 | /* update return status */ |
||
| 1263 | status = HAL_ERROR; |
||
| 1264 | break; |
||
| 1265 | } |
||
| 1266 | } |
||
| 1267 | else |
||
| 1268 | { |
||
| 1269 | /* Update the error code */ |
||
| 1270 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
||
| 1271 | /* update return status */ |
||
| 1272 | status = HAL_ERROR; |
||
| 1273 | } |
||
| 1274 | |||
| 1275 | /* Release Lock */ |
||
| 1276 | __HAL_UNLOCK(hdac); |
||
| 1277 | return status; |
||
| 1278 | } |
||
| 1279 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
||
| 1280 | |||
| 1281 | /** |
||
| 1282 | * @} |
||
| 1283 | */ |
||
| 1284 | |||
| 1285 | /** |
||
| 1286 | * @} |
||
| 1287 | */ |
||
| 1288 | |||
| 1289 | /** @addtogroup DAC_Private_Functions |
||
| 1290 | * @{ |
||
| 1291 | */ |
||
| 1292 | |||
| 1293 | /** |
||
| 1294 | * @brief DMA conversion complete callback. |
||
| 1295 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
||
| 1296 | * the configuration information for the specified DMA module. |
||
| 1297 | * @retval None |
||
| 1298 | */ |
||
| 1299 | void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma) |
||
| 1300 | { |
||
| 1301 | DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; |
||
| 1302 | |||
| 1303 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
||
| 1304 | hdac->ConvCpltCallbackCh1(hdac); |
||
| 1305 | #else |
||
| 1306 | HAL_DAC_ConvCpltCallbackCh1(hdac); |
||
| 1307 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
||
| 1308 | |||
| 1309 | hdac->State = HAL_DAC_STATE_READY; |
||
| 1310 | } |
||
| 1311 | |||
| 1312 | /** |
||
| 1313 | * @brief DMA half transfer complete callback. |
||
| 1314 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
||
| 1315 | * the configuration information for the specified DMA module. |
||
| 1316 | * @retval None |
||
| 1317 | */ |
||
| 1318 | void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma) |
||
| 1319 | { |
||
| 1320 | DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; |
||
| 1321 | /* Conversion complete callback */ |
||
| 1322 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
||
| 1323 | hdac->ConvHalfCpltCallbackCh1(hdac); |
||
| 1324 | #else |
||
| 1325 | HAL_DAC_ConvHalfCpltCallbackCh1(hdac); |
||
| 1326 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
||
| 1327 | } |
||
| 1328 | |||
| 1329 | /** |
||
| 1330 | * @brief DMA error callback |
||
| 1331 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
||
| 1332 | * the configuration information for the specified DMA module. |
||
| 1333 | * @retval None |
||
| 1334 | */ |
||
| 1335 | void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma) |
||
| 1336 | { |
||
| 1337 | DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; |
||
| 1338 | |||
| 1339 | /* Set DAC error code to DMA error */ |
||
| 1340 | hdac->ErrorCode |= HAL_DAC_ERROR_DMA; |
||
| 1341 | |||
| 1342 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
||
| 1343 | hdac->ErrorCallbackCh1(hdac); |
||
| 1344 | #else |
||
| 1345 | HAL_DAC_ErrorCallbackCh1(hdac); |
||
| 1346 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
||
| 1347 | |||
| 1348 | hdac->State = HAL_DAC_STATE_READY; |
||
| 1349 | } |
||
| 1350 | |||
| 1351 | /** |
||
| 1352 | * @} |
||
| 1353 | */ |
||
| 1354 | |||
| 1355 | /** |
||
| 1356 | * @} |
||
| 1357 | */ |
||
| 1358 | |||
| 1359 | #endif /* DAC */ |
||
| 1360 | |||
| 1361 | #endif /* HAL_DAC_MODULE_ENABLED */ |
||
| 1362 | |||
| 1363 | /** |
||
| 1364 | * @} |
||
| 1365 | */ |
||
| 1366 | |||
| 1367 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |