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2 | mjames | 1 | /** |
2 | ****************************************************************************** |
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3 | * @file stm32f1xx_hal_dac.c |
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4 | * @author MCD Application Team |
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5 | * @brief DAC HAL module driver. |
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6 | * This file provides firmware functions to manage the following |
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7 | * functionalities of the Digital to Analog Converter (DAC) peripheral: |
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8 | * + Initialization and de-initialization functions |
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9 | * + IO operation functions |
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10 | * + Peripheral Control functions |
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11 | * + Peripheral State and Errors functions |
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12 | * |
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13 | * |
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14 | @verbatim |
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15 | ============================================================================== |
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16 | ##### DAC Peripheral features ##### |
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17 | ============================================================================== |
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18 | [..] |
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19 | *** DAC Channels *** |
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20 | ==================== |
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21 | [..] |
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22 | The device integrates two 12-bit Digital Analog Converters that can |
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23 | be used independently or simultaneously (dual mode): |
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24 | (#) DAC channel1 with DAC_OUT1 (PA4) as output |
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25 | (#) DAC channel2 with DAC_OUT2 (PA5) as output |
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26 | |||
27 | *** DAC Triggers *** |
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28 | ==================== |
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29 | [..] |
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30 | Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE |
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31 | and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register. |
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32 | [..] |
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33 | Digital to Analog conversion can be triggered by: |
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34 | (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9. |
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35 | The used pin (GPIOx_PIN_9) must be configured in input mode. |
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36 | |||
37 | (#) Timers TRGO: TIM2, TIM4, TIM6, TIM7 |
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38 | For STM32F10x connectivity line devices and STM32F100x devices: TIM3 |
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39 | For STM32F10x high-density and XL-density devices: TIM8 |
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40 | For STM32F100x high-density value line devices: TIM15 as |
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41 | replacement of TIM5. |
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42 | (DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T4_TRGO...) |
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43 | |||
44 | (#) Software using DAC_TRIGGER_SOFTWARE |
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45 | |||
46 | *** DAC Buffer mode feature *** |
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47 | =============================== |
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48 | [..] |
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49 | Each DAC channel integrates an output buffer that can be used to |
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50 | reduce the output impedance, and to drive external loads directly |
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51 | without having to add an external operational amplifier. |
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52 | To enable, the output buffer use |
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53 | sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE; |
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54 | [..] |
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55 | (@) Refer to the device datasheet for more details about output |
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56 | impedance value with and without output buffer. |
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57 | |||
58 | *** DAC connect feature *** |
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59 | =============================== |
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60 | [..] |
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61 | Each DAC channel can be connected internally. |
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62 | To connect, use |
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63 | sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_ENABLE; |
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64 | |||
65 | *** GPIO configurations guidelines *** |
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66 | ===================== |
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67 | [..] |
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68 | When a DAC channel is used (ex channel1 on PA4) and the other is not |
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69 | (ex channel1 on PA5 is configured in Analog and disabled). |
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70 | Channel1 may disturb channel2 as coupling effect. |
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71 | Note that there is no coupling on channel2 as soon as channel2 is turned on. |
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72 | Coupling on adjacent channel could be avoided as follows: |
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73 | when unused PA5 is configured as INPUT PULL-UP or DOWN. |
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74 | PA5 is configured in ANALOG just before it is turned on. |
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75 | |||
76 | *** DAC wave generation feature *** |
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77 | =================================== |
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78 | [..] |
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79 | Both DAC channels can be used to generate |
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80 | (#) Noise wave using HAL_DACEx_NoiseWaveGenerate() |
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81 | (#) Triangle wave using HAL_DACEx_TriangleWaveGenerate() |
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82 | |||
83 | *** DAC data format *** |
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84 | ======================= |
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85 | [..] |
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86 | The DAC data format can be: |
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87 | (#) 8-bit right alignment using DAC_ALIGN_8B_R |
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88 | (#) 12-bit left alignment using DAC_ALIGN_12B_L |
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89 | (#) 12-bit right alignment using DAC_ALIGN_12B_R |
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90 | |||
91 | *** DAC data value to voltage correspondance *** |
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92 | ================================================ |
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93 | [..] |
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94 | The analog output voltage on each DAC channel pin is determined |
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95 | by the following equation: |
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96 | [..] |
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97 | DAC_OUTx = VREF+ * DOR / 4095 |
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98 | (+) with DOR is the Data Output Register |
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99 | [..] |
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100 | VEF+ is the input voltage reference (refer to the device datasheet) |
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101 | [..] |
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102 | e.g. To set DAC_OUT1 to 0.7V, use |
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103 | (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V |
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104 | |||
105 | *** DMA requests *** |
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106 | ===================== |
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107 | [..] |
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108 | A DMA1 request can be generated when an external trigger (but not |
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109 | a software trigger) occurs if DMA1 requests are enabled using |
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110 | HAL_DAC_Start_DMA() |
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111 | [..] |
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112 | DMA requests are mapped as following: |
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113 | (#) DAC channel1 : |
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114 | For STM32F100x low-density, medium-density, high-density with DAC |
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115 | DMA remap: |
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116 | mapped on DMA1 channel3 which must be |
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117 | already configured |
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118 | For STM32F100x high-density without DAC DMA remap and other |
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119 | STM32F1 devices: |
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120 | mapped on DMA2 channel3 which must be |
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121 | already configured |
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122 | (#) DAC channel2 : |
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123 | For STM32F100x low-density, medium-density, high-density with DAC |
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124 | DMA remap: |
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125 | mapped on DMA1 channel4 which must be |
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126 | already configured |
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127 | For STM32F100x high-density without DAC DMA remap and other |
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128 | STM32F1 devices: |
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129 | mapped on DMA2 channel4 which must be |
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130 | already configured |
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131 | |||
132 | ##### How to use this driver ##### |
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133 | ============================================================================== |
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134 | [..] |
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135 | (+) DAC APB clock must be enabled to get write access to DAC |
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136 | registers using HAL_DAC_Init() |
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137 | (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode. |
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138 | (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function. |
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139 | (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA functions |
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140 | |||
141 | *** Polling mode IO operation *** |
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142 | ================================= |
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143 | [..] |
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144 | (+) Start the DAC peripheral using HAL_DAC_Start() |
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145 | (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function. |
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146 | (+) Stop the DAC peripheral using HAL_DAC_Stop() |
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147 | |||
148 | *** DMA mode IO operation *** |
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149 | ============================== |
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150 | [..] |
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151 | (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length |
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152 | of data to be transferred at each end of conversion |
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153 | (+) At the middle of data transfer HAL_DACEx_ConvHalfCpltCallbackCh1()or HAL_DACEx_ConvHalfCpltCallbackCh2() |
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154 | function is executed and user can add his own code by customization of function pointer |
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155 | HAL_DAC_ConvHalfCpltCallbackCh1 or HAL_DAC_ConvHalfCpltCallbackCh2 |
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156 | (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1()or HAL_DAC_ConvCpltCallbackCh2() |
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157 | function is executed and user can add his own code by customization of function pointer |
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158 | HAL_DAC_ConvCpltCallbackCh1 or HAL_DAC_ConvCpltCallbackCh2 |
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159 | (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() or HAL_DACEx_ErrorCallbackCh2() function is executed and user can |
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160 | add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1 or HAL_DACEx_ErrorCallbackCh2 |
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161 | (+) For STM32F100x devices with specific feature: DMA underrun. |
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162 | In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler. |
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163 | HAL_DAC_DMAUnderrunCallbackCh1()or HAL_DACEx_DMAUnderrunCallbackCh2() |
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164 | function is executed and user can add his own code by customization of function pointer |
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165 | HAL_DAC_DMAUnderrunCallbackCh1 or HAL_DACEx_DMAUnderrunCallbackCh2 |
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166 | add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1 |
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167 | (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA() |
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168 | |||
169 | *** DAC HAL driver macros list *** |
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170 | ============================================= |
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171 | [..] |
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172 | Below the list of most used macros in DAC HAL driver. |
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173 | |||
174 | (+) __HAL_DAC_ENABLE : Enable the DAC peripheral (For STM32F100x devices with specific feature: DMA underrun) |
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175 | (+) __HAL_DAC_DISABLE : Disable the DAC peripheral (For STM32F100x devices with specific feature: DMA underrun) |
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176 | (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags (For STM32F100x devices with specific feature: DMA underrun) |
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177 | (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status (For STM32F100x devices with specific feature: DMA underrun) |
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178 | |||
179 | [..] |
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180 | (@) You can refer to the DAC HAL driver header file for more useful macros |
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181 | |||
182 | @endverbatim |
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183 | ****************************************************************************** |
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184 | * @attention |
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185 | * |
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186 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
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187 | * |
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188 | * Redistribution and use in source and binary forms, with or without modification, |
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189 | * are permitted provided that the following conditions are met: |
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190 | * 1. Redistributions of source code must retain the above copyright notice, |
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191 | * this list of conditions and the following disclaimer. |
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192 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
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193 | * this list of conditions and the following disclaimer in the documentation |
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194 | * and/or other materials provided with the distribution. |
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195 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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196 | * may be used to endorse or promote products derived from this software |
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197 | * without specific prior written permission. |
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198 | * |
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199 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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200 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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201 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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202 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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203 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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204 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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205 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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206 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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207 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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208 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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209 | * |
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210 | ****************************************************************************** |
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211 | */ |
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212 | |||
213 | |||
214 | /* Includes ------------------------------------------------------------------*/ |
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215 | #include "stm32f1xx_hal.h" |
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216 | |||
217 | /** @addtogroup STM32F1xx_HAL_Driver |
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218 | * @{ |
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219 | */ |
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220 | |||
221 | /** @defgroup DAC DAC |
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222 | * @brief DAC driver modules |
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223 | * @{ |
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224 | */ |
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225 | |||
226 | #ifdef HAL_DAC_MODULE_ENABLED |
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227 | #if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC) |
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228 | |||
229 | /* Private typedef -----------------------------------------------------------*/ |
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230 | /* Private define ------------------------------------------------------------*/ |
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231 | /* Private macro -------------------------------------------------------------*/ |
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232 | /* Private variables ---------------------------------------------------------*/ |
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233 | /* Private function prototypes -----------------------------------------------*/ |
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234 | /* Exported functions -------------------------------------------------------*/ |
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235 | |||
236 | /** @defgroup DAC_Exported_Functions DAC Exported Functions |
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237 | * @{ |
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238 | */ |
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239 | |||
240 | /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions |
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241 | * @brief Initialization and Configuration functions |
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242 | * |
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243 | @verbatim |
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244 | ============================================================================== |
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245 | ##### Initialization and de-initialization functions ##### |
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246 | ============================================================================== |
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247 | [..] This section provides functions allowing to: |
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248 | (+) Initialize and configure the DAC. |
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249 | (+) De-initialize the DAC. |
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250 | |||
251 | @endverbatim |
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252 | * @{ |
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253 | */ |
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254 | |||
255 | /** |
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256 | * @brief Initializes the DAC peripheral according to the specified parameters |
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257 | * in the DAC_InitStruct. |
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258 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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259 | * the configuration information for the specified DAC. |
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260 | * @retval HAL status |
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261 | */ |
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262 | HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac) |
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263 | { |
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264 | /* Check DAC handle */ |
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265 | if(hdac == NULL) |
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266 | { |
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267 | return HAL_ERROR; |
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268 | } |
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269 | /* Check the parameters */ |
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270 | assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); |
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271 | |||
272 | if(hdac->State == HAL_DAC_STATE_RESET) |
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273 | { |
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274 | /* Allocate lock resource and initialize it */ |
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275 | hdac->Lock = HAL_UNLOCKED; |
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276 | |||
277 | /* Init the low level hardware */ |
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278 | HAL_DAC_MspInit(hdac); |
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279 | } |
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280 | |||
281 | /* Initialize the DAC state*/ |
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282 | hdac->State = HAL_DAC_STATE_BUSY; |
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283 | |||
284 | /* Set DAC error code to none */ |
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285 | hdac->ErrorCode = HAL_DAC_ERROR_NONE; |
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286 | |||
287 | /* Initialize the DAC state*/ |
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288 | hdac->State = HAL_DAC_STATE_READY; |
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289 | |||
290 | /* Return function status */ |
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291 | return HAL_OK; |
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292 | } |
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293 | |||
294 | /** |
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295 | * @brief Deinitializes the DAC peripheral registers to their default reset values. |
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296 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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297 | * the configuration information for the specified DAC. |
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298 | * @retval HAL status |
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299 | */ |
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300 | HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac) |
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301 | { |
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302 | /* Check DAC handle */ |
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303 | if(hdac == NULL) |
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304 | { |
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305 | return HAL_ERROR; |
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306 | } |
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307 | |||
308 | /* Check the parameters */ |
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309 | assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); |
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310 | |||
311 | /* Change DAC state */ |
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312 | hdac->State = HAL_DAC_STATE_BUSY; |
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313 | |||
314 | /* DeInit the low level hardware */ |
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315 | HAL_DAC_MspDeInit(hdac); |
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316 | |||
317 | /* Set DAC error code to none */ |
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318 | hdac->ErrorCode = HAL_DAC_ERROR_NONE; |
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319 | |||
320 | /* Change DAC state */ |
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321 | hdac->State = HAL_DAC_STATE_RESET; |
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322 | |||
323 | /* Release Lock */ |
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324 | __HAL_UNLOCK(hdac); |
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325 | |||
326 | /* Return function status */ |
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327 | return HAL_OK; |
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328 | } |
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329 | |||
330 | /** |
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331 | * @brief Initializes the DAC MSP. |
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332 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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333 | * the configuration information for the specified DAC. |
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334 | * @retval None |
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335 | */ |
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336 | __weak void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac) |
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337 | { |
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338 | /* Prevent unused argument(s) compilation warning */ |
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339 | UNUSED(hdac); |
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340 | /* NOTE : This function Should not be modified, when the callback is needed, |
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341 | the HAL_DAC_MspInit could be implemented in the user file |
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342 | */ |
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343 | } |
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344 | |||
345 | /** |
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346 | * @brief DeInitializes the DAC MSP. |
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347 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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348 | * the configuration information for the specified DAC. |
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349 | * @retval None |
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350 | */ |
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351 | __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac) |
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352 | { |
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353 | /* Prevent unused argument(s) compilation warning */ |
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354 | UNUSED(hdac); |
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355 | /* NOTE : This function Should not be modified, when the callback is needed, |
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356 | the HAL_DAC_MspDeInit could be implemented in the user file |
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357 | */ |
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358 | } |
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359 | |||
360 | /** |
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361 | * @} |
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362 | */ |
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363 | |||
364 | /** @defgroup DAC_Exported_Functions_Group2 IO operation functions |
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365 | * @brief IO operation functions |
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366 | * |
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367 | @verbatim |
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368 | ============================================================================== |
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369 | ##### IO operation functions ##### |
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370 | ============================================================================== |
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371 | [..] This section provides functions allowing to: |
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372 | (+) Start conversion. |
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373 | (+) Stop conversion. |
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374 | (+) Start conversion and enable DMA transfer. |
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375 | (+) Stop conversion and disable DMA transfer. |
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376 | (+) Get result of conversion. |
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377 | |||
378 | @endverbatim |
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379 | * @{ |
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380 | */ |
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381 | |||
382 | /** |
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383 | * @brief Enables DAC and starts conversion of channel. |
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384 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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385 | * the configuration information for the specified DAC. |
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386 | * @param Channel: The selected DAC channel. |
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387 | * This parameter can be one of the following values: |
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388 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
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389 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
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390 | * @retval HAL status |
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391 | */ |
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392 | HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel) |
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393 | { |
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394 | /* Check the parameters */ |
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395 | assert_param(IS_DAC_CHANNEL(Channel)); |
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396 | |||
397 | /* Process locked */ |
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398 | __HAL_LOCK(hdac); |
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399 | |||
400 | /* Change DAC state */ |
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401 | hdac->State = HAL_DAC_STATE_BUSY; |
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402 | |||
403 | /* Enable the Peripharal */ |
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404 | __HAL_DAC_ENABLE(hdac, Channel); |
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405 | |||
406 | if(Channel == DAC_CHANNEL_1) |
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407 | { |
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408 | /* Check if software trigger enabled */ |
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409 | if((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == (DAC_CR_TEN1 | DAC_CR_TSEL1)) |
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410 | { |
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411 | /* Enable the selected DAC software conversion */ |
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412 | SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1); |
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413 | } |
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414 | } |
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415 | else |
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416 | { |
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417 | /* Check if software trigger enabled */ |
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418 | if((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_CR_TEN2 | DAC_CR_TSEL2)) |
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419 | { |
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420 | /* Enable the selected DAC software conversion*/ |
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421 | SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2); |
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422 | } |
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423 | } |
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424 | |||
425 | /* Change DAC state */ |
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426 | hdac->State = HAL_DAC_STATE_READY; |
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427 | |||
428 | /* Process unlocked */ |
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429 | __HAL_UNLOCK(hdac); |
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430 | |||
431 | /* Return function status */ |
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432 | return HAL_OK; |
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433 | } |
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434 | |||
435 | /** |
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436 | * @brief Disables DAC and stop conversion of channel. |
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437 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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438 | * the configuration information for the specified DAC. |
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439 | * @param Channel: The selected DAC channel. |
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440 | * This parameter can be one of the following values: |
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441 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
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442 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
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443 | * @retval HAL status |
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444 | */ |
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445 | HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel) |
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446 | { |
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447 | /* Check the parameters */ |
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448 | assert_param(IS_DAC_CHANNEL(Channel)); |
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449 | |||
450 | /* Disable the Peripheral */ |
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451 | __HAL_DAC_DISABLE(hdac, Channel); |
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452 | |||
453 | /* Change DAC state */ |
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454 | hdac->State = HAL_DAC_STATE_READY; |
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455 | |||
456 | /* Return function status */ |
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457 | return HAL_OK; |
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458 | } |
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459 | |||
460 | /** |
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461 | * @brief Enables DAC and starts conversion of channel. |
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462 | * Note: For STM32F100x devices with specific feature: DMA underrun. |
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463 | * On these devices, this function enables the interruption of DMA |
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464 | * underrun. |
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465 | * (refer to redefinition of this function in DAC extended file) |
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466 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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467 | * the configuration information for the specified DAC. |
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468 | * @param Channel: The selected DAC channel. |
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469 | * This parameter can be one of the following values: |
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470 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
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471 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
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472 | * @param pData: The Source memory Buffer address. |
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473 | * @param Length: The length of data to be transferred from memory to DAC peripheral |
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474 | * @param Alignment: Specifies the data alignment for DAC channel. |
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475 | * This parameter can be one of the following values: |
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476 | * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected |
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477 | * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected |
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478 | * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected |
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479 | * @retval HAL status |
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480 | */ |
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481 | __weak HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment) |
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482 | { |
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483 | uint32_t tmpreg = 0U; |
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484 | |||
485 | /* Check the parameters */ |
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486 | assert_param(IS_DAC_CHANNEL(Channel)); |
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487 | assert_param(IS_DAC_ALIGN(Alignment)); |
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488 | |||
489 | /* Process locked */ |
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490 | __HAL_LOCK(hdac); |
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491 | |||
492 | /* Change DAC state */ |
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493 | hdac->State = HAL_DAC_STATE_BUSY; |
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494 | |||
495 | if(Channel == DAC_CHANNEL_1) |
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496 | { |
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497 | /* Set the DMA transfer complete callback for channel1 */ |
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498 | hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1; |
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499 | |||
500 | /* Set the DMA half transfer complete callback for channel1 */ |
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501 | hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1; |
||
502 | |||
503 | /* Set the DMA error callback for channel1 */ |
||
504 | hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1; |
||
505 | |||
506 | /* Enable the selected DAC channel1 DMA request */ |
||
507 | SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); |
||
508 | |||
509 | /* Case of use of channel 1 */ |
||
510 | switch(Alignment) |
||
511 | { |
||
512 | case DAC_ALIGN_12B_R: |
||
513 | /* Get DHR12R1 address */ |
||
514 | tmpreg = (uint32_t)&hdac->Instance->DHR12R1; |
||
515 | break; |
||
516 | case DAC_ALIGN_12B_L: |
||
517 | /* Get DHR12L1 address */ |
||
518 | tmpreg = (uint32_t)&hdac->Instance->DHR12L1; |
||
519 | break; |
||
520 | case DAC_ALIGN_8B_R: |
||
521 | /* Get DHR8R1 address */ |
||
522 | tmpreg = (uint32_t)&hdac->Instance->DHR8R1; |
||
523 | break; |
||
524 | default: |
||
525 | break; |
||
526 | } |
||
527 | } |
||
528 | else |
||
529 | { |
||
530 | /* Set the DMA transfer complete callback for channel2 */ |
||
531 | hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2; |
||
532 | |||
533 | /* Set the DMA half transfer complete callback for channel2 */ |
||
534 | hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2; |
||
535 | |||
536 | /* Set the DMA error callback for channel2 */ |
||
537 | hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2; |
||
538 | |||
539 | /* Enable the selected DAC channel2 DMA request */ |
||
540 | SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2); |
||
541 | |||
542 | /* Case of use of channel 2 */ |
||
543 | switch(Alignment) |
||
544 | { |
||
545 | case DAC_ALIGN_12B_R: |
||
546 | /* Get DHR12R2 address */ |
||
547 | tmpreg = (uint32_t)&hdac->Instance->DHR12R2; |
||
548 | break; |
||
549 | case DAC_ALIGN_12B_L: |
||
550 | /* Get DHR12L2 address */ |
||
551 | tmpreg = (uint32_t)&hdac->Instance->DHR12L2; |
||
552 | break; |
||
553 | case DAC_ALIGN_8B_R: |
||
554 | /* Get DHR8R2 address */ |
||
555 | tmpreg = (uint32_t)&hdac->Instance->DHR8R2; |
||
556 | break; |
||
557 | default: |
||
558 | break; |
||
559 | } |
||
560 | } |
||
561 | |||
562 | /* Enable the DMA channel */ |
||
563 | if(Channel == DAC_CHANNEL_1) |
||
564 | { |
||
565 | /* Enable the DMA channel */ |
||
566 | HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length); |
||
567 | } |
||
568 | else |
||
569 | { |
||
570 | /* Enable the DMA channel */ |
||
571 | HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length); |
||
572 | } |
||
573 | |||
574 | /* Process Unlocked */ |
||
575 | __HAL_UNLOCK(hdac); |
||
576 | |||
577 | /* Enable the Peripharal */ |
||
578 | __HAL_DAC_ENABLE(hdac, Channel); |
||
579 | |||
580 | /* Return function status */ |
||
581 | return HAL_OK; |
||
582 | } |
||
583 | |||
584 | /** |
||
585 | * @brief Disables DAC and stop conversion of channel. |
||
586 | * Note: For STM32F100x devices with specific feature: DMA underrun. |
||
587 | * On these devices, this function disables the interruption of DMA |
||
588 | * underrun. |
||
589 | * (refer to redefinition of this function in DAC extended file) |
||
590 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
||
591 | * the configuration information for the specified DAC. |
||
592 | * @param Channel: The selected DAC channel. |
||
593 | * This parameter can be one of the following values: |
||
594 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
||
595 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
||
596 | * @retval HAL status |
||
597 | */ |
||
598 | __weak HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel) |
||
599 | { |
||
600 | HAL_StatusTypeDef status = HAL_OK; |
||
601 | |||
602 | /* Check the parameters */ |
||
603 | assert_param(IS_DAC_CHANNEL(Channel)); |
||
604 | |||
605 | /* Disable the selected DAC channel DMA request */ |
||
606 | CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1 << Channel); |
||
607 | |||
608 | /* Disable the Peripharal */ |
||
609 | __HAL_DAC_DISABLE(hdac, Channel); |
||
610 | |||
611 | /* Disable the DMA Channel */ |
||
612 | /* Channel1 is used */ |
||
613 | if (Channel == DAC_CHANNEL_1) |
||
614 | { |
||
615 | status = HAL_DMA_Abort(hdac->DMA_Handle1); |
||
616 | } |
||
617 | else /* Channel2 is used for */ |
||
618 | { |
||
619 | status = HAL_DMA_Abort(hdac->DMA_Handle2); |
||
620 | } |
||
621 | |||
622 | /* Check if DMA Channel effectively disabled */ |
||
623 | if (status != HAL_OK) |
||
624 | { |
||
625 | /* Update ADC state machine to error */ |
||
626 | hdac->State = HAL_DAC_STATE_ERROR; |
||
627 | } |
||
628 | else |
||
629 | { |
||
630 | /* Change DAC state */ |
||
631 | hdac->State = HAL_DAC_STATE_READY; |
||
632 | } |
||
633 | |||
634 | /* Return function status */ |
||
635 | return status; |
||
636 | } |
||
637 | |||
638 | /** |
||
639 | * @brief Returns the last data output value of the selected DAC channel. |
||
640 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
||
641 | * the configuration information for the specified DAC. |
||
642 | * @param Channel: The selected DAC channel. |
||
643 | * This parameter can be one of the following values: |
||
644 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
||
645 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
||
646 | * @retval The selected DAC channel data output value. |
||
647 | */ |
||
648 | uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel) |
||
649 | { |
||
650 | /* Check the parameters */ |
||
651 | assert_param(IS_DAC_CHANNEL(Channel)); |
||
652 | |||
653 | /* Returns the DAC channel data output register value */ |
||
654 | if(Channel == DAC_CHANNEL_1) |
||
655 | { |
||
656 | return hdac->Instance->DOR1; |
||
657 | } |
||
658 | else |
||
659 | { |
||
660 | return hdac->Instance->DOR2; |
||
661 | } |
||
662 | } |
||
663 | |||
664 | /** |
||
665 | * @brief Conversion complete callback in non blocking mode for Channel1 |
||
666 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
||
667 | * the configuration information for the specified DAC. |
||
668 | * @retval None |
||
669 | */ |
||
670 | __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac) |
||
671 | { |
||
672 | /* Prevent unused argument(s) compilation warning */ |
||
673 | UNUSED(hdac); |
||
674 | /* NOTE : This function Should not be modified, when the callback is needed, |
||
675 | the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file |
||
676 | */ |
||
677 | } |
||
678 | |||
679 | /** |
||
680 | * @brief Conversion half DMA transfer callback in non blocking mode for Channel1 |
||
681 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
||
682 | * the configuration information for the specified DAC. |
||
683 | * @retval None |
||
684 | */ |
||
685 | __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac) |
||
686 | { |
||
687 | /* Prevent unused argument(s) compilation warning */ |
||
688 | UNUSED(hdac); |
||
689 | /* NOTE : This function Should not be modified, when the callback is needed, |
||
690 | the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file |
||
691 | */ |
||
692 | } |
||
693 | |||
694 | /** |
||
695 | * @brief Error DAC callback for Channel1. |
||
696 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
||
697 | * the configuration information for the specified DAC. |
||
698 | * @retval None |
||
699 | */ |
||
700 | __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac) |
||
701 | { |
||
702 | /* Prevent unused argument(s) compilation warning */ |
||
703 | UNUSED(hdac); |
||
704 | /* NOTE : This function Should not be modified, when the callback is needed, |
||
705 | the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file |
||
706 | */ |
||
707 | } |
||
708 | |||
709 | /** |
||
710 | * @} |
||
711 | */ |
||
712 | |||
713 | /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions |
||
714 | * @brief Peripheral Control functions |
||
715 | * |
||
716 | @verbatim |
||
717 | ============================================================================== |
||
718 | ##### Peripheral Control functions ##### |
||
719 | ============================================================================== |
||
720 | [..] This section provides functions allowing to: |
||
721 | (+) Configure channels. |
||
722 | (+) Set the specified data holding register value for DAC channel. |
||
723 | |||
724 | @endverbatim |
||
725 | * @{ |
||
726 | */ |
||
727 | |||
728 | /** |
||
729 | * @brief Configures the selected DAC channel. |
||
730 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
||
731 | * the configuration information for the specified DAC. |
||
732 | * @param sConfig: DAC configuration structure. |
||
733 | * @param Channel: The selected DAC channel. |
||
734 | * This parameter can be one of the following values: |
||
735 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
||
736 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
||
737 | * @retval HAL status |
||
738 | */ |
||
739 | HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel) |
||
740 | { |
||
741 | uint32_t tmpreg1 = 0U; |
||
742 | |||
743 | /* Check the DAC parameters */ |
||
744 | assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger)); |
||
745 | assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer)); |
||
746 | assert_param(IS_DAC_CHANNEL(Channel)); |
||
747 | |||
748 | /* Process locked */ |
||
749 | __HAL_LOCK(hdac); |
||
750 | |||
751 | /* Change DAC state */ |
||
752 | hdac->State = HAL_DAC_STATE_BUSY; |
||
753 | |||
754 | /* Configure for the selected DAC channel: buffer output, trigger */ |
||
755 | /* Set TSELx and TENx bits according to DAC_Trigger value */ |
||
756 | /* Set BOFFx bit according to DAC_OutputBuffer value */ |
||
757 | SET_BIT(tmpreg1, (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer)); |
||
758 | |||
759 | /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */ |
||
760 | /* Calculate CR register value depending on DAC_Channel */ |
||
761 | MODIFY_REG(hdac->Instance->CR, |
||
762 | ((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << Channel, |
||
763 | tmpreg1 << Channel); |
||
764 | |||
765 | /* Disable wave generation */ |
||
766 | hdac->Instance->CR &= ~(DAC_CR_WAVE1 << Channel); |
||
767 | |||
768 | /* Change DAC state */ |
||
769 | hdac->State = HAL_DAC_STATE_READY; |
||
770 | |||
771 | /* Process unlocked */ |
||
772 | __HAL_UNLOCK(hdac); |
||
773 | |||
774 | /* Return function status */ |
||
775 | return HAL_OK; |
||
776 | } |
||
777 | |||
778 | /** |
||
779 | * @brief Set the specified data holding register value for DAC channel. |
||
780 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
||
781 | * the configuration information for the specified DAC. |
||
782 | * @param Channel: The selected DAC channel. |
||
783 | * This parameter can be one of the following values: |
||
784 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
||
785 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
||
786 | * @param Alignment: Specifies the data alignment. |
||
787 | * This parameter can be one of the following values: |
||
788 | * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected |
||
789 | * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected |
||
790 | * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected |
||
791 | * @param Data: Data to be loaded in the selected data holding register. |
||
792 | * @retval HAL status |
||
793 | */ |
||
794 | HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data) |
||
795 | { |
||
796 | __IO uint32_t tmp = 0U; |
||
797 | |||
798 | /* Check the parameters */ |
||
799 | assert_param(IS_DAC_CHANNEL(Channel)); |
||
800 | assert_param(IS_DAC_ALIGN(Alignment)); |
||
801 | assert_param(IS_DAC_DATA(Data)); |
||
802 | |||
803 | tmp = (uint32_t)hdac->Instance; |
||
804 | if(Channel == DAC_CHANNEL_1) |
||
805 | { |
||
806 | tmp += DAC_DHR12R1_ALIGNMENT(Alignment); |
||
807 | } |
||
808 | else |
||
809 | { |
||
810 | tmp += DAC_DHR12R2_ALIGNMENT(Alignment); |
||
811 | } |
||
812 | |||
813 | /* Set the DAC channel selected data holding register */ |
||
814 | *(__IO uint32_t *) tmp = Data; |
||
815 | |||
816 | /* Return function status */ |
||
817 | return HAL_OK; |
||
818 | } |
||
819 | |||
820 | /** |
||
821 | * @} |
||
822 | */ |
||
823 | |||
824 | /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions |
||
825 | * @brief Peripheral State and Errors functions |
||
826 | * |
||
827 | @verbatim |
||
828 | ============================================================================== |
||
829 | ##### Peripheral State and Errors functions ##### |
||
830 | ============================================================================== |
||
831 | [..] |
||
832 | This subsection provides functions allowing to |
||
833 | (+) Check the DAC state. |
||
834 | (+) Check the DAC Errors. |
||
835 | |||
836 | @endverbatim |
||
837 | * @{ |
||
838 | */ |
||
839 | |||
840 | /** |
||
841 | * @brief return the DAC state |
||
842 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
||
843 | * the configuration information for the specified DAC. |
||
844 | * @retval HAL state |
||
845 | */ |
||
846 | HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac) |
||
847 | { |
||
848 | /* Return DAC state */ |
||
849 | return hdac->State; |
||
850 | } |
||
851 | |||
852 | |||
853 | /** |
||
854 | * @brief Return the DAC error code |
||
855 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
||
856 | * the configuration information for the specified DAC. |
||
857 | * @retval DAC Error Code |
||
858 | */ |
||
859 | uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac) |
||
860 | { |
||
861 | return hdac->ErrorCode; |
||
862 | } |
||
863 | |||
864 | /** |
||
865 | * @} |
||
866 | */ |
||
867 | |||
868 | /** |
||
869 | * @} |
||
870 | */ |
||
871 | |||
872 | /** @addtogroup DAC_Private_Functions |
||
873 | * @{ |
||
874 | */ |
||
875 | |||
876 | /** |
||
877 | * @brief DMA conversion complete callback. |
||
878 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
||
879 | * the configuration information for the specified DMA module. |
||
880 | * @retval None |
||
881 | */ |
||
882 | void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma) |
||
883 | { |
||
884 | DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
||
885 | |||
886 | HAL_DAC_ConvCpltCallbackCh1(hdac); |
||
887 | |||
888 | hdac->State = HAL_DAC_STATE_READY; |
||
889 | } |
||
890 | |||
891 | /** |
||
892 | * @brief DMA half transfer complete callback. |
||
893 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
||
894 | * the configuration information for the specified DMA module. |
||
895 | * @retval None |
||
896 | */ |
||
897 | void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma) |
||
898 | { |
||
899 | DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
||
900 | /* Conversion complete callback */ |
||
901 | HAL_DAC_ConvHalfCpltCallbackCh1(hdac); |
||
902 | } |
||
903 | |||
904 | /** |
||
905 | * @brief DMA error callback |
||
906 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
||
907 | * the configuration information for the specified DMA module. |
||
908 | * @retval None |
||
909 | */ |
||
910 | void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma) |
||
911 | { |
||
912 | DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
||
913 | |||
914 | /* Set DAC error code to DMA error */ |
||
915 | hdac->ErrorCode |= HAL_DAC_ERROR_DMA; |
||
916 | |||
917 | HAL_DAC_ErrorCallbackCh1(hdac); |
||
918 | |||
919 | hdac->State = HAL_DAC_STATE_READY; |
||
920 | } |
||
921 | |||
922 | /** |
||
923 | * @} |
||
924 | */ |
||
925 | |||
926 | #endif /* STM32F100xB || STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ |
||
927 | #endif /* HAL_DAC_MODULE_ENABLED */ |
||
928 | |||
929 | /** |
||
930 | * @} |
||
931 | */ |
||
932 | |||
933 | /** |
||
934 | * @} |
||
935 | */ |
||
936 | |||
937 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |