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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 2 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
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| 3 | * @file stm32f1xx_hal_dac.c |
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| 4 | * @author MCD Application Team |
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| 5 | * @version V1.0.1 |
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| 6 | * @date 31-July-2015 |
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| 7 | * @brief DAC HAL module driver. |
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| 8 | * This file provides firmware functions to manage the following |
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| 9 | * functionalities of the Digital to Analog Converter (DAC) peripheral: |
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| 10 | * + Initialization and de-initialization functions |
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| 11 | * + IO operation functions |
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| 12 | * + Peripheral Control functions |
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| 13 | * + Peripheral State and Errors functions |
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| 14 | * |
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| 15 | * |
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| 16 | @verbatim |
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| 17 | ============================================================================== |
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| 18 | ##### DAC Peripheral features ##### |
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| 19 | ============================================================================== |
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| 20 | [..] |
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| 21 | *** DAC Channels *** |
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| 22 | ==================== |
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| 23 | [..] |
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| 24 | The device integrates two 12-bit Digital Analog Converters that can |
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| 25 | be used independently or simultaneously (dual mode): |
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| 26 | (#) DAC channel1 with DAC_OUT1 (PA4) as output |
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| 27 | (#) DAC channel2 with DAC_OUT2 (PA5) as output |
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| 28 | |||
| 29 | *** DAC Triggers *** |
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| 30 | ==================== |
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| 31 | [..] |
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| 32 | Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE |
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| 33 | and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register. |
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| 34 | [..] |
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| 35 | Digital to Analog conversion can be triggered by: |
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| 36 | (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9. |
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| 37 | The used pin (GPIOx_PIN_9) must be configured in input mode. |
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| 38 | |||
| 39 | (#) Timers TRGO: TIM2, TIM4, TIM6, TIM7 |
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| 40 | For STM32F10x connectivity line devices and STM32F100x devices: TIM3 |
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| 41 | For STM32F10x high-density and XL-density devices: TIM8 |
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| 42 | For STM32F100x high-density value line devices: TIM15 as |
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| 43 | replacement of TIM5. |
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| 44 | (DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T4_TRGO...) |
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| 45 | |||
| 46 | (#) Software using DAC_TRIGGER_SOFTWARE |
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| 47 | |||
| 48 | *** DAC Buffer mode feature *** |
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| 49 | =============================== |
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| 50 | [..] |
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| 51 | Each DAC channel integrates an output buffer that can be used to |
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| 52 | reduce the output impedance, and to drive external loads directly |
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| 53 | without having to add an external operational amplifier. |
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| 54 | To enable, the output buffer use |
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| 55 | sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE; |
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| 56 | [..] |
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| 57 | (@) Refer to the device datasheet for more details about output |
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| 58 | impedance value with and without output buffer. |
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| 59 | |||
| 60 | *** DAC connect feature *** |
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| 61 | =============================== |
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| 62 | [..] |
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| 63 | Each DAC channel can be connected internally. |
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| 64 | To connect, use |
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| 65 | sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_ENABLE; |
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| 66 | |||
| 67 | *** GPIO configurations guidelines *** |
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| 68 | ===================== |
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| 69 | [..] |
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| 70 | When a DAC channel is used (ex channel1 on PA4) and the other is not |
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| 71 | (ex channel1 on PA5 is configured in Analog and disabled). |
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| 72 | Channel1 may disturb channel2 as coupling effect. |
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| 73 | Note that there is no coupling on channel2 as soon as channel2 is turned on. |
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| 74 | Coupling on adjacent channel could be avoided as follows: |
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| 75 | when unused PA5 is configured as INPUT PULL-UP or DOWN. |
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| 76 | PA5 is configured in ANALOG just before it is turned on. |
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| 77 | |||
| 78 | *** DAC wave generation feature *** |
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| 79 | =================================== |
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| 80 | [..] |
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| 81 | Both DAC channels can be used to generate |
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| 82 | (#) Noise wave using HAL_DACEx_NoiseWaveGenerate() |
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| 83 | (#) Triangle wave using HAL_DACEx_TriangleWaveGenerate() |
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| 84 | |||
| 85 | *** DAC data format *** |
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| 86 | ======================= |
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| 87 | [..] |
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| 88 | The DAC data format can be: |
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| 89 | (#) 8-bit right alignment using DAC_ALIGN_8B_R |
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| 90 | (#) 12-bit left alignment using DAC_ALIGN_12B_L |
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| 91 | (#) 12-bit right alignment using DAC_ALIGN_12B_R |
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| 92 | |||
| 93 | *** DAC data value to voltage correspondance *** |
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| 94 | ================================================ |
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| 95 | [..] |
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| 96 | The analog output voltage on each DAC channel pin is determined |
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| 97 | by the following equation: |
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| 98 | [..] |
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| 99 | DAC_OUTx = VREF+ * DOR / 4095 |
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| 100 | (+) with DOR is the Data Output Register |
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| 101 | [..] |
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| 102 | VEF+ is the input voltage reference (refer to the device datasheet) |
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| 103 | [..] |
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| 104 | e.g. To set DAC_OUT1 to 0.7V, use |
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| 105 | (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V |
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| 106 | |||
| 107 | *** DMA requests *** |
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| 108 | ===================== |
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| 109 | [..] |
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| 110 | A DMA1 request can be generated when an external trigger (but not |
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| 111 | a software trigger) occurs if DMA1 requests are enabled using |
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| 112 | HAL_DAC_Start_DMA() |
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| 113 | [..] |
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| 114 | DMA requests are mapped as following: |
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| 115 | (#) DAC channel1 : |
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| 116 | For STM32F100x low-density, medium-density, high-density with DAC |
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| 117 | DMA remap: |
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| 118 | mapped on DMA1 channel3 which must be |
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| 119 | already configured |
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| 120 | For STM32F100x high-density without DAC DMA remap and other |
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| 121 | STM32F1 devices: |
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| 122 | mapped on DMA2 channel3 which must be |
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| 123 | already configured |
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| 124 | (#) DAC channel2 : |
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| 125 | For STM32F100x low-density, medium-density, high-density with DAC |
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| 126 | DMA remap: |
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| 127 | mapped on DMA1 channel4 which must be |
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| 128 | already configured |
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| 129 | For STM32F100x high-density without DAC DMA remap and other |
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| 130 | STM32F1 devices: |
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| 131 | mapped on DMA2 channel4 which must be |
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| 132 | already configured |
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| 133 | |||
| 134 | ##### How to use this driver ##### |
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| 135 | ============================================================================== |
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| 136 | [..] |
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| 137 | (+) DAC APB clock must be enabled to get write access to DAC |
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| 138 | registers using HAL_DAC_Init() |
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| 139 | (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode. |
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| 140 | (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function. |
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| 141 | (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA functions |
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| 142 | |||
| 143 | *** Polling mode IO operation *** |
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| 144 | ================================= |
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| 145 | [..] |
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| 146 | (+) Start the DAC peripheral using HAL_DAC_Start() |
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| 147 | (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function. |
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| 148 | (+) Stop the DAC peripheral using HAL_DAC_Stop() |
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| 149 | |||
| 150 | *** DMA mode IO operation *** |
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| 151 | ============================== |
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| 152 | [..] |
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| 153 | (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length |
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| 154 | of data to be transferred at each end of conversion |
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| 155 | (+) At the middle of data transfer HAL_DACEx_ConvHalfCpltCallbackCh1()or HAL_DACEx_ConvHalfCpltCallbackCh2() |
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| 156 | function is executed and user can add his own code by customization of function pointer |
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| 157 | HAL_DAC_ConvHalfCpltCallbackCh1 or HAL_DAC_ConvHalfCpltCallbackCh2 |
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| 158 | (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1()or HAL_DAC_ConvCpltCallbackCh2() |
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| 159 | function is executed and user can add his own code by customization of function pointer |
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| 160 | HAL_DAC_ConvCpltCallbackCh1 or HAL_DAC_ConvCpltCallbackCh2 |
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| 161 | (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() or HAL_DACEx_ErrorCallbackCh2() function is executed and user can |
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| 162 | add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1 or HAL_DACEx_ErrorCallbackCh2 |
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| 163 | (+) For STM32F100x devices with specific feature: DMA underrun. |
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| 164 | In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler. |
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| 165 | HAL_DAC_DMAUnderrunCallbackCh1()or HAL_DACEx_DMAUnderrunCallbackCh2() |
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| 166 | function is executed and user can add his own code by customization of function pointer |
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| 167 | HAL_DAC_DMAUnderrunCallbackCh1 or HAL_DACEx_DMAUnderrunCallbackCh2 |
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| 168 | add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1 |
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| 169 | (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA() |
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| 170 | |||
| 171 | *** DAC HAL driver macros list *** |
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| 172 | ============================================= |
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| 173 | [..] |
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| 174 | Below the list of most used macros in DAC HAL driver. |
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| 175 | |||
| 176 | (+) __HAL_DAC_ENABLE : Enable the DAC peripheral (For STM32F100x devices with specific feature: DMA underrun) |
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| 177 | (+) __HAL_DAC_DISABLE : Disable the DAC peripheral (For STM32F100x devices with specific feature: DMA underrun) |
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| 178 | (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags (For STM32F100x devices with specific feature: DMA underrun) |
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| 179 | (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status (For STM32F100x devices with specific feature: DMA underrun) |
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| 180 | |||
| 181 | [..] |
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| 182 | (@) You can refer to the DAC HAL driver header file for more useful macros |
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| 183 | |||
| 184 | @endverbatim |
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| 185 | ****************************************************************************** |
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| 186 | * @attention |
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| 187 | * |
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| 188 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
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| 189 | * |
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| 190 | * Redistribution and use in source and binary forms, with or without modification, |
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| 191 | * are permitted provided that the following conditions are met: |
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| 192 | * 1. Redistributions of source code must retain the above copyright notice, |
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| 193 | * this list of conditions and the following disclaimer. |
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| 194 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
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| 195 | * this list of conditions and the following disclaimer in the documentation |
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| 196 | * and/or other materials provided with the distribution. |
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| 197 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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| 198 | * may be used to endorse or promote products derived from this software |
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| 199 | * without specific prior written permission. |
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| 200 | * |
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| 201 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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| 202 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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| 203 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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| 204 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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| 205 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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| 206 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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| 207 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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| 208 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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| 209 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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| 210 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 211 | * |
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| 212 | ****************************************************************************** |
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| 213 | */ |
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| 214 | |||
| 215 | |||
| 216 | /* Includes ------------------------------------------------------------------*/ |
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| 217 | #include "stm32f1xx_hal.h" |
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| 218 | |||
| 219 | /** @addtogroup STM32F1xx_HAL_Driver |
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| 220 | * @{ |
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| 221 | */ |
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| 222 | |||
| 223 | /** @defgroup DAC DAC |
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| 224 | * @brief DAC driver modules |
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| 225 | * @{ |
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| 226 | */ |
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| 227 | |||
| 228 | #ifdef HAL_DAC_MODULE_ENABLED |
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| 229 | #if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101xE) || defined (STM32F101xG) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC) |
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| 230 | |||
| 231 | /* Private typedef -----------------------------------------------------------*/ |
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| 232 | /* Private define ------------------------------------------------------------*/ |
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| 233 | /* Private macro -------------------------------------------------------------*/ |
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| 234 | /* Private variables ---------------------------------------------------------*/ |
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| 235 | /* Private function prototypes -----------------------------------------------*/ |
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| 236 | /* Exported functions -------------------------------------------------------*/ |
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| 237 | |||
| 238 | /** @defgroup DAC_Exported_Functions DAC Exported Functions |
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| 239 | * @{ |
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| 240 | */ |
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| 241 | |||
| 242 | /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions |
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| 243 | * @brief Initialization and Configuration functions |
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| 244 | * |
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| 245 | @verbatim |
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| 246 | ============================================================================== |
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| 247 | ##### Initialization and de-initialization functions ##### |
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| 248 | ============================================================================== |
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| 249 | [..] This section provides functions allowing to: |
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| 250 | (+) Initialize and configure the DAC. |
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| 251 | (+) De-initialize the DAC. |
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| 252 | |||
| 253 | @endverbatim |
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| 254 | * @{ |
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| 255 | */ |
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| 256 | |||
| 257 | /** |
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| 258 | * @brief Initializes the DAC peripheral according to the specified parameters |
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| 259 | * in the DAC_InitStruct. |
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| 260 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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| 261 | * the configuration information for the specified DAC. |
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| 262 | * @retval HAL status |
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| 263 | */ |
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| 264 | HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac) |
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| 265 | { |
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| 266 | /* Check DAC handle */ |
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| 267 | if(hdac == NULL) |
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| 268 | { |
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| 269 | return HAL_ERROR; |
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| 270 | } |
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| 271 | /* Check the parameters */ |
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| 272 | assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); |
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| 273 | |||
| 274 | if(hdac->State == HAL_DAC_STATE_RESET) |
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| 275 | { |
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| 276 | /* Allocate lock resource and initialize it */ |
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| 277 | hdac->Lock = HAL_UNLOCKED; |
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| 278 | |||
| 279 | /* Init the low level hardware */ |
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| 280 | HAL_DAC_MspInit(hdac); |
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| 281 | } |
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| 282 | |||
| 283 | /* Initialize the DAC state*/ |
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| 284 | hdac->State = HAL_DAC_STATE_BUSY; |
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| 285 | |||
| 286 | /* Set DAC error code to none */ |
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| 287 | hdac->ErrorCode = HAL_DAC_ERROR_NONE; |
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| 288 | |||
| 289 | /* Initialize the DAC state*/ |
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| 290 | hdac->State = HAL_DAC_STATE_READY; |
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| 291 | |||
| 292 | /* Return function status */ |
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| 293 | return HAL_OK; |
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| 294 | } |
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| 295 | |||
| 296 | /** |
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| 297 | * @brief Deinitializes the DAC peripheral registers to their default reset values. |
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| 298 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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| 299 | * the configuration information for the specified DAC. |
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| 300 | * @retval HAL status |
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| 301 | */ |
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| 302 | HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac) |
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| 303 | { |
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| 304 | /* Check DAC handle */ |
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| 305 | if(hdac == NULL) |
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| 306 | { |
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| 307 | return HAL_ERROR; |
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| 308 | } |
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| 309 | |||
| 310 | /* Check the parameters */ |
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| 311 | assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); |
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| 312 | |||
| 313 | /* Change DAC state */ |
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| 314 | hdac->State = HAL_DAC_STATE_BUSY; |
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| 315 | |||
| 316 | /* DeInit the low level hardware */ |
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| 317 | HAL_DAC_MspDeInit(hdac); |
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| 318 | |||
| 319 | /* Set DAC error code to none */ |
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| 320 | hdac->ErrorCode = HAL_DAC_ERROR_NONE; |
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| 321 | |||
| 322 | /* Change DAC state */ |
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| 323 | hdac->State = HAL_DAC_STATE_RESET; |
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| 324 | |||
| 325 | /* Release Lock */ |
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| 326 | __HAL_UNLOCK(hdac); |
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| 327 | |||
| 328 | /* Return function status */ |
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| 329 | return HAL_OK; |
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| 330 | } |
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| 331 | |||
| 332 | /** |
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| 333 | * @brief Initializes the DAC MSP. |
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| 334 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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| 335 | * the configuration information for the specified DAC. |
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| 336 | * @retval None |
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| 337 | */ |
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| 338 | __weak void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac) |
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| 339 | { |
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| 340 | /* NOTE : This function Should not be modified, when the callback is needed, |
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| 341 | the HAL_DAC_MspInit could be implemented in the user file |
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| 342 | */ |
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| 343 | } |
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| 344 | |||
| 345 | /** |
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| 346 | * @brief DeInitializes the DAC MSP. |
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| 347 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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| 348 | * the configuration information for the specified DAC. |
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| 349 | * @retval None |
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| 350 | */ |
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| 351 | __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac) |
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| 352 | { |
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| 353 | /* NOTE : This function Should not be modified, when the callback is needed, |
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| 354 | the HAL_DAC_MspDeInit could be implemented in the user file |
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| 355 | */ |
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| 356 | } |
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| 357 | |||
| 358 | /** |
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| 359 | * @} |
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| 360 | */ |
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| 361 | |||
| 362 | /** @defgroup DAC_Exported_Functions_Group2 IO operation functions |
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| 363 | * @brief IO operation functions |
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| 364 | * |
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| 365 | @verbatim |
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| 366 | ============================================================================== |
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| 367 | ##### IO operation functions ##### |
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| 368 | ============================================================================== |
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| 369 | [..] This section provides functions allowing to: |
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| 370 | (+) Start conversion. |
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| 371 | (+) Stop conversion. |
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| 372 | (+) Start conversion and enable DMA transfer. |
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| 373 | (+) Stop conversion and disable DMA transfer. |
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| 374 | (+) Get result of conversion. |
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| 375 | |||
| 376 | @endverbatim |
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| 377 | * @{ |
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| 378 | */ |
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| 379 | |||
| 380 | /** |
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| 381 | * @brief Enables DAC and starts conversion of channel. |
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| 382 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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| 383 | * the configuration information for the specified DAC. |
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| 384 | * @param Channel: The selected DAC channel. |
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| 385 | * This parameter can be one of the following values: |
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| 386 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
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| 387 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
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| 388 | * @retval HAL status |
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| 389 | */ |
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| 390 | HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel) |
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| 391 | { |
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| 392 | /* Check the parameters */ |
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| 393 | assert_param(IS_DAC_CHANNEL(Channel)); |
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| 394 | |||
| 395 | /* Process locked */ |
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| 396 | __HAL_LOCK(hdac); |
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| 397 | |||
| 398 | /* Change DAC state */ |
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| 399 | hdac->State = HAL_DAC_STATE_BUSY; |
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| 400 | |||
| 401 | /* Enable the Peripharal */ |
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| 402 | __HAL_DAC_ENABLE(hdac, Channel); |
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| 403 | |||
| 404 | if(Channel == DAC_CHANNEL_1) |
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| 405 | { |
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| 406 | /* Check if software trigger enabled */ |
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| 407 | if((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == (DAC_CR_TEN1 | DAC_CR_TSEL1)) |
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| 408 | { |
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| 409 | /* Enable the selected DAC software conversion */ |
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| 410 | SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1); |
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| 411 | } |
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| 412 | } |
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| 413 | else |
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| 414 | { |
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| 415 | /* Check if software trigger enabled */ |
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| 416 | if((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_CR_TEN2 | DAC_CR_TSEL2)) |
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| 417 | { |
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| 418 | /* Enable the selected DAC software conversion*/ |
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| 419 | SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2); |
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| 420 | } |
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| 421 | } |
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| 422 | |||
| 423 | /* Change DAC state */ |
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| 424 | hdac->State = HAL_DAC_STATE_READY; |
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| 425 | |||
| 426 | /* Process unlocked */ |
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| 427 | __HAL_UNLOCK(hdac); |
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| 428 | |||
| 429 | /* Return function status */ |
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| 430 | return HAL_OK; |
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| 431 | } |
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| 432 | |||
| 433 | /** |
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| 434 | * @brief Disables DAC and stop conversion of channel. |
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| 435 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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| 436 | * the configuration information for the specified DAC. |
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| 437 | * @param Channel: The selected DAC channel. |
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| 438 | * This parameter can be one of the following values: |
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| 439 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
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| 440 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
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| 441 | * @retval HAL status |
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| 442 | */ |
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| 443 | HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel) |
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| 444 | { |
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| 445 | /* Check the parameters */ |
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| 446 | assert_param(IS_DAC_CHANNEL(Channel)); |
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| 447 | |||
| 448 | /* Disable the Peripheral */ |
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| 449 | __HAL_DAC_DISABLE(hdac, Channel); |
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| 450 | |||
| 451 | /* Change DAC state */ |
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| 452 | hdac->State = HAL_DAC_STATE_READY; |
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| 453 | |||
| 454 | /* Return function status */ |
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| 455 | return HAL_OK; |
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| 456 | } |
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| 457 | |||
| 458 | /** |
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| 459 | * @brief Enables DAC and starts conversion of channel. |
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| 460 | * Note: For STM32F100x devices with specific feature: DMA underrun. |
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| 461 | * On these devices, this function enables the interruption of DMA |
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| 462 | * underrun. |
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| 463 | * (refer to redefinition of this function in DAC extended file) |
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| 464 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
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| 465 | * the configuration information for the specified DAC. |
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| 466 | * @param Channel: The selected DAC channel. |
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| 467 | * This parameter can be one of the following values: |
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| 468 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
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| 469 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
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| 470 | * @param pData: The destination peripheral Buffer address. |
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| 471 | * @param Length: The length of data to be transferred from memory to DAC peripheral |
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| 472 | * @param Alignment: Specifies the data alignment for DAC channel. |
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| 473 | * This parameter can be one of the following values: |
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| 474 | * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected |
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| 475 | * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected |
||
| 476 | * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected |
||
| 477 | * @retval HAL status |
||
| 478 | */ |
||
| 479 | __weak HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment) |
||
| 480 | { |
||
| 481 | uint32_t tmpreg = 0; |
||
| 482 | |||
| 483 | /* Check the parameters */ |
||
| 484 | assert_param(IS_DAC_CHANNEL(Channel)); |
||
| 485 | assert_param(IS_DAC_ALIGN(Alignment)); |
||
| 486 | |||
| 487 | /* Process locked */ |
||
| 488 | __HAL_LOCK(hdac); |
||
| 489 | |||
| 490 | /* Change DAC state */ |
||
| 491 | hdac->State = HAL_DAC_STATE_BUSY; |
||
| 492 | |||
| 493 | if(Channel == DAC_CHANNEL_1) |
||
| 494 | { |
||
| 495 | /* Set the DMA transfer complete callback for channel1 */ |
||
| 496 | hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1; |
||
| 497 | |||
| 498 | /* Set the DMA half transfer complete callback for channel1 */ |
||
| 499 | hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1; |
||
| 500 | |||
| 501 | /* Set the DMA error callback for channel1 */ |
||
| 502 | hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1; |
||
| 503 | |||
| 504 | /* Enable the selected DAC channel1 DMA request */ |
||
| 505 | SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); |
||
| 506 | |||
| 507 | /* Case of use of channel 1 */ |
||
| 508 | switch(Alignment) |
||
| 509 | { |
||
| 510 | case DAC_ALIGN_12B_R: |
||
| 511 | /* Get DHR12R1 address */ |
||
| 512 | tmpreg = (uint32_t)&hdac->Instance->DHR12R1; |
||
| 513 | break; |
||
| 514 | case DAC_ALIGN_12B_L: |
||
| 515 | /* Get DHR12L1 address */ |
||
| 516 | tmpreg = (uint32_t)&hdac->Instance->DHR12L1; |
||
| 517 | break; |
||
| 518 | case DAC_ALIGN_8B_R: |
||
| 519 | /* Get DHR8R1 address */ |
||
| 520 | tmpreg = (uint32_t)&hdac->Instance->DHR8R1; |
||
| 521 | break; |
||
| 522 | default: |
||
| 523 | break; |
||
| 524 | } |
||
| 525 | } |
||
| 526 | else |
||
| 527 | { |
||
| 528 | /* Set the DMA transfer complete callback for channel2 */ |
||
| 529 | hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2; |
||
| 530 | |||
| 531 | /* Set the DMA half transfer complete callback for channel2 */ |
||
| 532 | hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2; |
||
| 533 | |||
| 534 | /* Set the DMA error callback for channel2 */ |
||
| 535 | hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2; |
||
| 536 | |||
| 537 | /* Enable the selected DAC channel2 DMA request */ |
||
| 538 | SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2); |
||
| 539 | |||
| 540 | /* Case of use of channel 2 */ |
||
| 541 | switch(Alignment) |
||
| 542 | { |
||
| 543 | case DAC_ALIGN_12B_R: |
||
| 544 | /* Get DHR12R2 address */ |
||
| 545 | tmpreg = (uint32_t)&hdac->Instance->DHR12R2; |
||
| 546 | break; |
||
| 547 | case DAC_ALIGN_12B_L: |
||
| 548 | /* Get DHR12L2 address */ |
||
| 549 | tmpreg = (uint32_t)&hdac->Instance->DHR12L2; |
||
| 550 | break; |
||
| 551 | case DAC_ALIGN_8B_R: |
||
| 552 | /* Get DHR8R2 address */ |
||
| 553 | tmpreg = (uint32_t)&hdac->Instance->DHR8R2; |
||
| 554 | break; |
||
| 555 | default: |
||
| 556 | break; |
||
| 557 | } |
||
| 558 | } |
||
| 559 | |||
| 560 | /* Enable the DMA channel */ |
||
| 561 | if(Channel == DAC_CHANNEL_1) |
||
| 562 | { |
||
| 563 | /* Enable the DMA channel */ |
||
| 564 | HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length); |
||
| 565 | } |
||
| 566 | else |
||
| 567 | { |
||
| 568 | /* Enable the DMA channel */ |
||
| 569 | HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length); |
||
| 570 | } |
||
| 571 | |||
| 572 | /* Process Unlocked */ |
||
| 573 | __HAL_UNLOCK(hdac); |
||
| 574 | |||
| 575 | /* Enable the Peripharal */ |
||
| 576 | __HAL_DAC_ENABLE(hdac, Channel); |
||
| 577 | |||
| 578 | /* Return function status */ |
||
| 579 | return HAL_OK; |
||
| 580 | } |
||
| 581 | |||
| 582 | /** |
||
| 583 | * @brief Disables DAC and stop conversion of channel. |
||
| 584 | * Note: For STM32F100x devices with specific feature: DMA underrun. |
||
| 585 | * On these devices, this function disables the interruption of DMA |
||
| 586 | * underrun. |
||
| 587 | * (refer to redefinition of this function in DAC extended file) |
||
| 588 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
||
| 589 | * the configuration information for the specified DAC. |
||
| 590 | * @param Channel: The selected DAC channel. |
||
| 591 | * This parameter can be one of the following values: |
||
| 592 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
||
| 593 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
||
| 594 | * @retval HAL status |
||
| 595 | */ |
||
| 596 | __weak HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel) |
||
| 597 | { |
||
| 598 | HAL_StatusTypeDef status = HAL_OK; |
||
| 599 | |||
| 600 | /* Check the parameters */ |
||
| 601 | assert_param(IS_DAC_CHANNEL(Channel)); |
||
| 602 | |||
| 603 | /* Disable the selected DAC channel DMA request */ |
||
| 604 | CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1 << Channel); |
||
| 605 | |||
| 606 | /* Disable the Peripharal */ |
||
| 607 | __HAL_DAC_DISABLE(hdac, Channel); |
||
| 608 | |||
| 609 | /* Disable the DMA Channel */ |
||
| 610 | /* Channel1 is used */ |
||
| 611 | if (Channel == DAC_CHANNEL_1) |
||
| 612 | { |
||
| 613 | status = HAL_DMA_Abort(hdac->DMA_Handle1); |
||
| 614 | } |
||
| 615 | else /* Channel2 is used for */ |
||
| 616 | { |
||
| 617 | status = HAL_DMA_Abort(hdac->DMA_Handle2); |
||
| 618 | } |
||
| 619 | |||
| 620 | /* Check if DMA Channel effectively disabled */ |
||
| 621 | if (status != HAL_OK) |
||
| 622 | { |
||
| 623 | /* Update ADC state machine to error */ |
||
| 624 | hdac->State = HAL_DAC_STATE_ERROR; |
||
| 625 | } |
||
| 626 | else |
||
| 627 | { |
||
| 628 | /* Change DAC state */ |
||
| 629 | hdac->State = HAL_DAC_STATE_READY; |
||
| 630 | } |
||
| 631 | |||
| 632 | /* Return function status */ |
||
| 633 | return status; |
||
| 634 | } |
||
| 635 | |||
| 636 | /** |
||
| 637 | * @brief Returns the last data output value of the selected DAC channel. |
||
| 638 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
||
| 639 | * the configuration information for the specified DAC. |
||
| 640 | * @param Channel: The selected DAC channel. |
||
| 641 | * This parameter can be one of the following values: |
||
| 642 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
||
| 643 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
||
| 644 | * @retval The selected DAC channel data output value. |
||
| 645 | */ |
||
| 646 | uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel) |
||
| 647 | { |
||
| 648 | /* Check the parameters */ |
||
| 649 | assert_param(IS_DAC_CHANNEL(Channel)); |
||
| 650 | |||
| 651 | /* Returns the DAC channel data output register value */ |
||
| 652 | if(Channel == DAC_CHANNEL_1) |
||
| 653 | { |
||
| 654 | return hdac->Instance->DOR1; |
||
| 655 | } |
||
| 656 | else |
||
| 657 | { |
||
| 658 | return hdac->Instance->DOR2; |
||
| 659 | } |
||
| 660 | } |
||
| 661 | |||
| 662 | /** |
||
| 663 | * @brief Conversion complete callback in non blocking mode for Channel1 |
||
| 664 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
||
| 665 | * the configuration information for the specified DAC. |
||
| 666 | * @retval None |
||
| 667 | */ |
||
| 668 | __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac) |
||
| 669 | { |
||
| 670 | /* NOTE : This function Should not be modified, when the callback is needed, |
||
| 671 | the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file |
||
| 672 | */ |
||
| 673 | } |
||
| 674 | |||
| 675 | /** |
||
| 676 | * @brief Conversion half DMA transfer callback in non blocking mode for Channel1 |
||
| 677 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
||
| 678 | * the configuration information for the specified DAC. |
||
| 679 | * @retval None |
||
| 680 | */ |
||
| 681 | __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac) |
||
| 682 | { |
||
| 683 | /* NOTE : This function Should not be modified, when the callback is needed, |
||
| 684 | the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file |
||
| 685 | */ |
||
| 686 | } |
||
| 687 | |||
| 688 | /** |
||
| 689 | * @brief Error DAC callback for Channel1. |
||
| 690 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
||
| 691 | * the configuration information for the specified DAC. |
||
| 692 | * @retval None |
||
| 693 | */ |
||
| 694 | __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac) |
||
| 695 | { |
||
| 696 | /* NOTE : This function Should not be modified, when the callback is needed, |
||
| 697 | the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file |
||
| 698 | */ |
||
| 699 | } |
||
| 700 | |||
| 701 | /** |
||
| 702 | * @} |
||
| 703 | */ |
||
| 704 | |||
| 705 | /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions |
||
| 706 | * @brief Peripheral Control functions |
||
| 707 | * |
||
| 708 | @verbatim |
||
| 709 | ============================================================================== |
||
| 710 | ##### Peripheral Control functions ##### |
||
| 711 | ============================================================================== |
||
| 712 | [..] This section provides functions allowing to: |
||
| 713 | (+) Configure channels. |
||
| 714 | (+) Set the specified data holding register value for DAC channel. |
||
| 715 | |||
| 716 | @endverbatim |
||
| 717 | * @{ |
||
| 718 | */ |
||
| 719 | |||
| 720 | /** |
||
| 721 | * @brief Configures the selected DAC channel. |
||
| 722 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
||
| 723 | * the configuration information for the specified DAC. |
||
| 724 | * @param sConfig: DAC configuration structure. |
||
| 725 | * @param Channel: The selected DAC channel. |
||
| 726 | * This parameter can be one of the following values: |
||
| 727 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
||
| 728 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
||
| 729 | * @retval HAL status |
||
| 730 | */ |
||
| 731 | HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel) |
||
| 732 | { |
||
| 733 | uint32_t tmpreg1 = 0; |
||
| 734 | |||
| 735 | /* Check the DAC parameters */ |
||
| 736 | assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger)); |
||
| 737 | assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer)); |
||
| 738 | assert_param(IS_DAC_CHANNEL(Channel)); |
||
| 739 | |||
| 740 | /* Process locked */ |
||
| 741 | __HAL_LOCK(hdac); |
||
| 742 | |||
| 743 | /* Change DAC state */ |
||
| 744 | hdac->State = HAL_DAC_STATE_BUSY; |
||
| 745 | |||
| 746 | /* Configure for the selected DAC channel: buffer output, trigger */ |
||
| 747 | /* Set TSELx and TENx bits according to DAC_Trigger value */ |
||
| 748 | /* Set BOFFx bit according to DAC_OutputBuffer value */ |
||
| 749 | SET_BIT(tmpreg1, (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer)); |
||
| 750 | |||
| 751 | /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */ |
||
| 752 | /* Calculate CR register value depending on DAC_Channel */ |
||
| 753 | MODIFY_REG(hdac->Instance->CR, |
||
| 754 | ((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << Channel, |
||
| 755 | tmpreg1 << Channel); |
||
| 756 | |||
| 757 | /* Disable wave generation */ |
||
| 758 | hdac->Instance->CR &= ~(DAC_CR_WAVE1 << Channel); |
||
| 759 | |||
| 760 | /* Change DAC state */ |
||
| 761 | hdac->State = HAL_DAC_STATE_READY; |
||
| 762 | |||
| 763 | /* Process unlocked */ |
||
| 764 | __HAL_UNLOCK(hdac); |
||
| 765 | |||
| 766 | /* Return function status */ |
||
| 767 | return HAL_OK; |
||
| 768 | } |
||
| 769 | |||
| 770 | /** |
||
| 771 | * @brief Set the specified data holding register value for DAC channel. |
||
| 772 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
||
| 773 | * the configuration information for the specified DAC. |
||
| 774 | * @param Channel: The selected DAC channel. |
||
| 775 | * This parameter can be one of the following values: |
||
| 776 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
||
| 777 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
||
| 778 | * @param Alignment: Specifies the data alignment. |
||
| 779 | * This parameter can be one of the following values: |
||
| 780 | * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected |
||
| 781 | * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected |
||
| 782 | * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected |
||
| 783 | * @param Data: Data to be loaded in the selected data holding register. |
||
| 784 | * @retval HAL status |
||
| 785 | */ |
||
| 786 | HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data) |
||
| 787 | { |
||
| 788 | __IO uint32_t tmp = 0; |
||
| 789 | |||
| 790 | /* Check the parameters */ |
||
| 791 | assert_param(IS_DAC_CHANNEL(Channel)); |
||
| 792 | assert_param(IS_DAC_ALIGN(Alignment)); |
||
| 793 | assert_param(IS_DAC_DATA(Data)); |
||
| 794 | |||
| 795 | tmp = (uint32_t)hdac->Instance; |
||
| 796 | if(Channel == DAC_CHANNEL_1) |
||
| 797 | { |
||
| 798 | tmp += DAC_DHR12R1_ALIGNMENT(Alignment); |
||
| 799 | } |
||
| 800 | else |
||
| 801 | { |
||
| 802 | tmp += DAC_DHR12R2_ALIGNMENT(Alignment); |
||
| 803 | } |
||
| 804 | |||
| 805 | /* Set the DAC channel selected data holding register */ |
||
| 806 | *(__IO uint32_t *) tmp = Data; |
||
| 807 | |||
| 808 | /* Return function status */ |
||
| 809 | return HAL_OK; |
||
| 810 | } |
||
| 811 | |||
| 812 | /** |
||
| 813 | * @} |
||
| 814 | */ |
||
| 815 | |||
| 816 | /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions |
||
| 817 | * @brief Peripheral State and Errors functions |
||
| 818 | * |
||
| 819 | @verbatim |
||
| 820 | ============================================================================== |
||
| 821 | ##### Peripheral State and Errors functions ##### |
||
| 822 | ============================================================================== |
||
| 823 | [..] |
||
| 824 | This subsection provides functions allowing to |
||
| 825 | (+) Check the DAC state. |
||
| 826 | (+) Check the DAC Errors. |
||
| 827 | |||
| 828 | @endverbatim |
||
| 829 | * @{ |
||
| 830 | */ |
||
| 831 | |||
| 832 | /** |
||
| 833 | * @brief return the DAC state |
||
| 834 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
||
| 835 | * the configuration information for the specified DAC. |
||
| 836 | * @retval HAL state |
||
| 837 | */ |
||
| 838 | HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac) |
||
| 839 | { |
||
| 840 | /* Return DAC state */ |
||
| 841 | return hdac->State; |
||
| 842 | } |
||
| 843 | |||
| 844 | |||
| 845 | /** |
||
| 846 | * @brief Return the DAC error code |
||
| 847 | * @param hdac: pointer to a DAC_HandleTypeDef structure that contains |
||
| 848 | * the configuration information for the specified DAC. |
||
| 849 | * @retval DAC Error Code |
||
| 850 | */ |
||
| 851 | uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac) |
||
| 852 | { |
||
| 853 | return hdac->ErrorCode; |
||
| 854 | } |
||
| 855 | |||
| 856 | /** |
||
| 857 | * @} |
||
| 858 | */ |
||
| 859 | |||
| 860 | /** |
||
| 861 | * @} |
||
| 862 | */ |
||
| 863 | |||
| 864 | /** @addtogroup DAC_Private_Functions |
||
| 865 | * @{ |
||
| 866 | */ |
||
| 867 | |||
| 868 | /** |
||
| 869 | * @brief DMA conversion complete callback. |
||
| 870 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
||
| 871 | * the configuration information for the specified DMA module. |
||
| 872 | * @retval None |
||
| 873 | */ |
||
| 874 | void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma) |
||
| 875 | { |
||
| 876 | DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
||
| 877 | |||
| 878 | HAL_DAC_ConvCpltCallbackCh1(hdac); |
||
| 879 | |||
| 880 | hdac->State = HAL_DAC_STATE_READY; |
||
| 881 | } |
||
| 882 | |||
| 883 | /** |
||
| 884 | * @brief DMA half transfer complete callback. |
||
| 885 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
||
| 886 | * the configuration information for the specified DMA module. |
||
| 887 | * @retval None |
||
| 888 | */ |
||
| 889 | void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma) |
||
| 890 | { |
||
| 891 | DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
||
| 892 | /* Conversion complete callback */ |
||
| 893 | HAL_DAC_ConvHalfCpltCallbackCh1(hdac); |
||
| 894 | } |
||
| 895 | |||
| 896 | /** |
||
| 897 | * @brief DMA error callback |
||
| 898 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
||
| 899 | * the configuration information for the specified DMA module. |
||
| 900 | * @retval None |
||
| 901 | */ |
||
| 902 | void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma) |
||
| 903 | { |
||
| 904 | DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
||
| 905 | |||
| 906 | /* Set DAC error code to DMA error */ |
||
| 907 | hdac->ErrorCode |= HAL_DAC_ERROR_DMA; |
||
| 908 | |||
| 909 | HAL_DAC_ErrorCallbackCh1(hdac); |
||
| 910 | |||
| 911 | hdac->State = HAL_DAC_STATE_READY; |
||
| 912 | } |
||
| 913 | |||
| 914 | /** |
||
| 915 | * @} |
||
| 916 | */ |
||
| 917 | |||
| 918 | #endif /* STM32F100xB || STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ |
||
| 919 | #endif /* HAL_DAC_MODULE_ENABLED */ |
||
| 920 | |||
| 921 | /** |
||
| 922 | * @} |
||
| 923 | */ |
||
| 924 | |||
| 925 | /** |
||
| 926 | * @} |
||
| 927 | */ |
||
| 928 | |||
| 929 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |