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2 | mjames | 1 | /** |
2 | ****************************************************************************** |
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3 | * @file stm32f1xx_hal_dac.c |
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4 | * @author MCD Application Team |
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5 | * @brief DAC HAL module driver. |
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6 | * This file provides firmware functions to manage the following |
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7 | * functionalities of the Digital to Analog Converter (DAC) peripheral: |
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8 | * + Initialization and de-initialization functions |
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9 | * + IO operation functions |
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10 | * + Peripheral Control functions |
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11 | * + Peripheral State and Errors functions |
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12 | * |
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13 | * |
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14 | ****************************************************************************** |
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15 | * @attention |
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16 | * |
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17 | * Copyright (c) 2016 STMicroelectronics. |
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18 | * All rights reserved. |
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19 | * |
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20 | * This software is licensed under terms that can be found in the LICENSE file |
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21 | * in the root directory of this software component. |
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22 | * If no LICENSE file comes with this software, it is provided AS-IS. |
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23 | * |
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24 | ****************************************************************************** |
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25 | @verbatim |
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26 | ============================================================================== |
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27 | ##### DAC Peripheral features ##### |
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28 | ============================================================================== |
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29 | [..] |
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30 | *** DAC Channels *** |
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31 | ==================== |
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32 | [..] |
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33 | STM32F1 devices integrate two 12-bit Digital Analog Converters |
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34 | |||
35 | The 2 converters (i.e. channel1 & channel2) |
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36 | can be used independently or simultaneously (dual mode): |
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37 | (#) DAC channel1 with DAC_OUT1 (PA4) as output or connected to on-chip |
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38 | peripherals (ex. timers). |
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39 | (#) DAC channel2 with DAC_OUT2 (PA5) as output or connected to on-chip |
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40 | peripherals (ex. timers). |
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41 | |||
42 | *** DAC Triggers *** |
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43 | ==================== |
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44 | [..] |
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45 | Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE |
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46 | and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register. |
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47 | [..] |
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48 | Digital to Analog conversion can be triggered by: |
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49 | (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9. |
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50 | The used pin (GPIOx_PIN_9) must be configured in input mode. |
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51 | |||
52 | (#) Timers TRGO: TIM2, TIM4, TIM6, TIM7 |
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53 | For STM32F10x connectivity line devices and STM32F100x devices: TIM3 |
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54 | For STM32F10x high-density and XL-density devices: TIM8 |
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55 | For STM32F100x high-density value line devices: TIM15 as |
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56 | replacement of TIM5. |
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57 | (DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T4_TRGO...) |
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58 | |||
59 | (#) Software using DAC_TRIGGER_SOFTWARE |
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60 | |||
61 | *** DAC Buffer mode feature *** |
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62 | =============================== |
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63 | [..] |
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64 | Each DAC channel integrates an output buffer that can be used to |
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65 | reduce the output impedance, and to drive external loads directly |
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66 | without having to add an external operational amplifier. |
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67 | To enable, the output buffer use |
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68 | sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE; |
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69 | [..] |
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70 | (@) Refer to the device datasheet for more details about output |
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71 | impedance value with and without output buffer. |
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72 | |||
73 | *** GPIO configurations guidelines *** |
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74 | ===================== |
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75 | [..] |
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76 | When a DAC channel is used (ex channel1 on PA4) and the other is not |
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77 | (ex channel2 on PA5 is configured in Analog and disabled). |
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78 | Channel1 may disturb channel2 as coupling effect. |
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79 | Note that there is no coupling on channel2 as soon as channel2 is turned on. |
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80 | Coupling on adjacent channel could be avoided as follows: |
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81 | when unused PA5 is configured as INPUT PULL-UP or DOWN. |
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82 | PA5 is configured in ANALOG just before it is turned on. |
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83 | |||
84 | *** DAC wave generation feature *** |
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85 | =================================== |
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86 | [..] |
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87 | Both DAC channels can be used to generate |
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88 | (#) Noise wave |
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89 | (#) Triangle wave |
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90 | |||
91 | *** DAC data format *** |
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92 | ======================= |
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93 | [..] |
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94 | The DAC data format can be: |
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95 | (#) 8-bit right alignment using DAC_ALIGN_8B_R |
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96 | (#) 12-bit left alignment using DAC_ALIGN_12B_L |
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97 | (#) 12-bit right alignment using DAC_ALIGN_12B_R |
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98 | |||
99 | *** DAC data value to voltage correspondence *** |
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100 | ================================================ |
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101 | [..] |
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102 | The analog output voltage on each DAC channel pin is determined |
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103 | by the following equation: |
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104 | [..] |
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105 | DAC_OUTx = VREF+ * DOR / 4095 |
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106 | (+) with DOR is the Data Output Register |
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107 | [..] |
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108 | VREF+ is the input voltage reference (refer to the device datasheet) |
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109 | [..] |
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110 | e.g. To set DAC_OUT1 to 0.7V, use |
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111 | (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V |
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112 | |||
113 | *** DMA requests *** |
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114 | ===================== |
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115 | [..] |
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116 | A DMA request can be generated when an external trigger (but not a software trigger) |
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117 | occurs if DMA1 requests are enabled using HAL_DAC_Start_DMA(). |
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118 | DMA1 requests are mapped as following: |
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119 | (#) DAC channel1 mapped on DMA1 channel3 |
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120 | for STM32F100x low-density, medium-density, high-density with DAC |
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121 | DMA remap: |
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122 | (#) DAC channel2 mapped on DMA2 channel3 |
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123 | for STM32F100x high-density without DAC DMA remap and other |
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124 | STM32F1 devices |
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125 | |||
126 | [..] |
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127 | (@) For Dual mode and specific signal (Triangle and noise) generation please |
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128 | refer to Extended Features Driver description |
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129 | |||
130 | ##### How to use this driver ##### |
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131 | ============================================================================== |
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132 | [..] |
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133 | (+) DAC APB clock must be enabled to get write access to DAC |
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134 | registers using HAL_DAC_Init() |
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135 | (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode. |
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136 | (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function. |
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137 | (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA() functions. |
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138 | |||
139 | |||
140 | *** Polling mode IO operation *** |
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141 | ================================= |
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142 | [..] |
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143 | (+) Start the DAC peripheral using HAL_DAC_Start() |
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144 | (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function. |
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145 | (+) Stop the DAC peripheral using HAL_DAC_Stop() |
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146 | |||
147 | *** DMA mode IO operation *** |
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148 | ============================== |
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149 | [..] |
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150 | (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length |
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151 | of data to be transferred at each end of conversion |
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152 | First issued trigger will start the conversion of the value previously set by HAL_DAC_SetValue(). |
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153 | (+) At the middle of data transfer HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() |
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154 | function is executed and user can add his own code by customization of function pointer |
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155 | HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() |
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156 | (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() |
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157 | function is executed and user can add his own code by customization of function pointer |
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158 | HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() |
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159 | (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can |
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160 | add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1 |
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161 | (+) For STM32F100x devices with specific feature: DMA underrun. |
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162 | In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler. |
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163 | HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() |
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164 | function is executed and user can add his own code by customization of function pointer |
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165 | HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() and |
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166 | add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1() |
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167 | (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA() |
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168 | |||
169 | *** Callback registration *** |
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170 | ============================================= |
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171 | [..] |
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172 | The compilation define USE_HAL_DAC_REGISTER_CALLBACKS when set to 1 |
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173 | allows the user to configure dynamically the driver callbacks. |
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174 | |||
175 | Use Functions HAL_DAC_RegisterCallback() to register a user callback, |
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176 | it allows to register following callbacks: |
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177 | (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1. |
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178 | (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1. |
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179 | (+) ErrorCallbackCh1 : callback when an error occurs on Ch1. |
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180 | (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1. |
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181 | (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2. |
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182 | (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2. |
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183 | (+) ErrorCallbackCh2 : callback when an error occurs on Ch2. |
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184 | (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2. |
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185 | (+) MspInitCallback : DAC MspInit. |
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186 | (+) MspDeInitCallback : DAC MspdeInit. |
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187 | This function takes as parameters the HAL peripheral handle, the Callback ID |
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188 | and a pointer to the user callback function. |
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189 | |||
190 | Use function HAL_DAC_UnRegisterCallback() to reset a callback to the default |
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191 | weak (overridden) function. It allows to reset following callbacks: |
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192 | (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1. |
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193 | (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1. |
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194 | (+) ErrorCallbackCh1 : callback when an error occurs on Ch1. |
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195 | (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1. |
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196 | (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2. |
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197 | (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2. |
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198 | (+) ErrorCallbackCh2 : callback when an error occurs on Ch2. |
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199 | (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2. |
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200 | (+) MspInitCallback : DAC MspInit. |
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201 | (+) MspDeInitCallback : DAC MspdeInit. |
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202 | (+) All Callbacks |
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203 | This function) takes as parameters the HAL peripheral handle and the Callback ID. |
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204 | |||
205 | By default, after the HAL_DAC_Init and if the state is HAL_DAC_STATE_RESET |
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206 | all callbacks are reset to the corresponding legacy weak (overridden) functions. |
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207 | Exception done for MspInit and MspDeInit callbacks that are respectively |
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208 | reset to the legacy weak (overridden) functions in the HAL_DAC_Init |
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209 | and HAL_DAC_DeInit only when these callbacks are null (not registered beforehand). |
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210 | If not, MspInit or MspDeInit are not null, the HAL_DAC_Init and HAL_DAC_DeInit |
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211 | keep and use the user MspInit/MspDeInit callbacks (registered beforehand) |
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212 | |||
213 | Callbacks can be registered/unregistered in READY state only. |
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214 | Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered |
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215 | in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used |
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216 | during the Init/DeInit. |
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217 | In that case first register the MspInit/MspDeInit user callbacks |
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218 | using HAL_DAC_RegisterCallback before calling HAL_DAC_DeInit |
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219 | or HAL_DAC_Init function. |
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220 | |||
221 | When The compilation define USE_HAL_DAC_REGISTER_CALLBACKS is set to 0 or |
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222 | not defined, the callback registering feature is not available |
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223 | and weak (overridden) callbacks are used. |
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224 | |||
225 | *** DAC HAL driver macros list *** |
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226 | ============================================= |
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227 | [..] |
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228 | Below the list of most used macros in DAC HAL driver. |
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229 | |||
230 | (+) __HAL_DAC_ENABLE : Enable the DAC peripheral (For STM32F100x devices with specific feature: DMA underrun) |
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231 | (+) __HAL_DAC_DISABLE : Disable the DAC peripheral (For STM32F100x devices with specific feature: DMA underrun) |
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232 | (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags (For STM32F100x devices with specific feature: DMA underrun) |
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233 | (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status (For STM32F100x devices with specific feature: DMA underrun) |
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234 | |||
235 | [..] |
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236 | (@) You can refer to the DAC HAL driver header file for more useful macros |
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237 | |||
238 | @endverbatim |
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239 | ****************************************************************************** |
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240 | */ |
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241 | |||
242 | /* Includes ------------------------------------------------------------------*/ |
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243 | #include "stm32f1xx_hal.h" |
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244 | |||
245 | /** @addtogroup STM32F1xx_HAL_Driver |
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246 | * @{ |
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247 | */ |
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248 | |||
249 | #ifdef HAL_DAC_MODULE_ENABLED |
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250 | #if defined(DAC) |
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251 | |||
252 | /** @defgroup DAC DAC |
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253 | * @brief DAC driver modules |
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254 | * @{ |
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255 | */ |
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256 | |||
257 | /* Private typedef -----------------------------------------------------------*/ |
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258 | /* Private define ------------------------------------------------------------*/ |
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259 | /* Private constants ---------------------------------------------------------*/ |
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260 | /* Private macro -------------------------------------------------------------*/ |
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261 | /* Private variables ---------------------------------------------------------*/ |
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262 | /* Private function prototypes -----------------------------------------------*/ |
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263 | /* Exported functions -------------------------------------------------------*/ |
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264 | |||
265 | /** @defgroup DAC_Exported_Functions DAC Exported Functions |
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266 | * @{ |
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267 | */ |
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268 | |||
269 | /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions |
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270 | * @brief Initialization and Configuration functions |
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271 | * |
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272 | @verbatim |
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273 | ============================================================================== |
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274 | ##### Initialization and de-initialization functions ##### |
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275 | ============================================================================== |
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276 | [..] This section provides functions allowing to: |
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277 | (+) Initialize and configure the DAC. |
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278 | (+) De-initialize the DAC. |
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279 | |||
280 | @endverbatim |
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281 | * @{ |
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282 | */ |
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283 | |||
284 | /** |
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285 | * @brief Initialize the DAC peripheral according to the specified parameters |
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286 | * in the DAC_InitStruct and initialize the associated handle. |
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287 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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288 | * the configuration information for the specified DAC. |
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289 | * @retval HAL status |
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290 | */ |
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291 | HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac) |
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292 | { |
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293 | /* Check the DAC peripheral handle */ |
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294 | if (hdac == NULL) |
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295 | { |
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296 | return HAL_ERROR; |
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297 | } |
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298 | /* Check the parameters */ |
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299 | assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); |
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300 | |||
301 | if (hdac->State == HAL_DAC_STATE_RESET) |
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302 | { |
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303 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
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304 | /* Init the DAC Callback settings */ |
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305 | hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1; |
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306 | hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1; |
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307 | hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1; |
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308 | hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1; |
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309 | |||
310 | hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2; |
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311 | hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2; |
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312 | hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2; |
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313 | hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2; |
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314 | |||
315 | if (hdac->MspInitCallback == NULL) |
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316 | { |
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317 | hdac->MspInitCallback = HAL_DAC_MspInit; |
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318 | } |
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319 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
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320 | |||
321 | /* Allocate lock resource and initialize it */ |
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322 | hdac->Lock = HAL_UNLOCKED; |
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323 | |||
324 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
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325 | /* Init the low level hardware */ |
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326 | hdac->MspInitCallback(hdac); |
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327 | #else |
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328 | /* Init the low level hardware */ |
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329 | HAL_DAC_MspInit(hdac); |
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330 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
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331 | } |
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332 | |||
333 | /* Initialize the DAC state*/ |
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334 | hdac->State = HAL_DAC_STATE_BUSY; |
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335 | |||
336 | /* Set DAC error code to none */ |
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337 | hdac->ErrorCode = HAL_DAC_ERROR_NONE; |
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338 | |||
339 | /* Initialize the DAC state*/ |
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340 | hdac->State = HAL_DAC_STATE_READY; |
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341 | |||
342 | /* Return function status */ |
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343 | return HAL_OK; |
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344 | } |
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345 | |||
346 | /** |
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347 | * @brief Deinitialize the DAC peripheral registers to their default reset values. |
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348 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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349 | * the configuration information for the specified DAC. |
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350 | * @retval HAL status |
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351 | */ |
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352 | HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac) |
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353 | { |
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354 | /* Check the DAC peripheral handle */ |
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355 | if (hdac == NULL) |
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356 | { |
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357 | return HAL_ERROR; |
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358 | } |
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359 | |||
360 | /* Check the parameters */ |
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361 | assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); |
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362 | |||
363 | /* Change DAC state */ |
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364 | hdac->State = HAL_DAC_STATE_BUSY; |
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365 | |||
366 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
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367 | if (hdac->MspDeInitCallback == NULL) |
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368 | { |
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369 | hdac->MspDeInitCallback = HAL_DAC_MspDeInit; |
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370 | } |
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371 | /* DeInit the low level hardware */ |
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372 | hdac->MspDeInitCallback(hdac); |
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373 | #else |
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374 | /* DeInit the low level hardware */ |
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375 | HAL_DAC_MspDeInit(hdac); |
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376 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
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377 | |||
378 | /* Set DAC error code to none */ |
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379 | hdac->ErrorCode = HAL_DAC_ERROR_NONE; |
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380 | |||
381 | /* Change DAC state */ |
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382 | hdac->State = HAL_DAC_STATE_RESET; |
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383 | |||
384 | /* Release Lock */ |
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385 | __HAL_UNLOCK(hdac); |
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386 | |||
387 | /* Return function status */ |
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388 | return HAL_OK; |
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389 | } |
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390 | |||
391 | /** |
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392 | * @brief Initialize the DAC MSP. |
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393 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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394 | * the configuration information for the specified DAC. |
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395 | * @retval None |
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396 | */ |
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397 | __weak void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac) |
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398 | { |
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399 | /* Prevent unused argument(s) compilation warning */ |
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400 | UNUSED(hdac); |
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401 | |||
402 | /* NOTE : This function should not be modified, when the callback is needed, |
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403 | the HAL_DAC_MspInit could be implemented in the user file |
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404 | */ |
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405 | } |
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406 | |||
407 | /** |
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408 | * @brief DeInitialize the DAC MSP. |
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409 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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410 | * the configuration information for the specified DAC. |
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411 | * @retval None |
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412 | */ |
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413 | __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac) |
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414 | { |
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415 | /* Prevent unused argument(s) compilation warning */ |
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416 | UNUSED(hdac); |
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417 | |||
418 | /* NOTE : This function should not be modified, when the callback is needed, |
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419 | the HAL_DAC_MspDeInit could be implemented in the user file |
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420 | */ |
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421 | } |
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422 | |||
423 | /** |
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424 | * @} |
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425 | */ |
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426 | |||
427 | /** @defgroup DAC_Exported_Functions_Group2 IO operation functions |
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428 | * @brief IO operation functions |
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429 | * |
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430 | @verbatim |
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431 | ============================================================================== |
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432 | ##### IO operation functions ##### |
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433 | ============================================================================== |
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434 | [..] This section provides functions allowing to: |
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435 | (+) Start conversion. |
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436 | (+) Stop conversion. |
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437 | (+) Start conversion and enable DMA transfer. |
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438 | (+) Stop conversion and disable DMA transfer. |
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439 | (+) Get result of conversion. |
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440 | |||
441 | @endverbatim |
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442 | * @{ |
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443 | */ |
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444 | |||
445 | /** |
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446 | * @brief Enables DAC and starts conversion of channel. |
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447 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
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448 | * the configuration information for the specified DAC. |
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449 | * @param Channel The selected DAC channel. |
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450 | * This parameter can be one of the following values: |
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451 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
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452 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
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453 | * @retval HAL status |
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454 | */ |
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455 | HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel) |
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456 | { |
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457 | /* Check the DAC peripheral handle */ |
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458 | if (hdac == NULL) |
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459 | { |
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460 | return HAL_ERROR; |
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461 | } |
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462 | |||
463 | /* Check the parameters */ |
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464 | assert_param(IS_DAC_CHANNEL(Channel)); |
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465 | |||
466 | /* Process locked */ |
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467 | __HAL_LOCK(hdac); |
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468 | |||
469 | /* Change DAC state */ |
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470 | hdac->State = HAL_DAC_STATE_BUSY; |
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471 | |||
472 | /* Enable the Peripheral */ |
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473 | __HAL_DAC_ENABLE(hdac, Channel); |
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474 | |||
475 | if (Channel == DAC_CHANNEL_1) |
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476 | { |
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477 | /* Check if software trigger enabled */ |
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478 | if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_TRIGGER_SOFTWARE) |
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479 | { |
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480 | /* Enable the selected DAC software conversion */ |
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481 | SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1); |
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482 | } |
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483 | } |
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484 | |||
485 | else |
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486 | { |
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487 | /* Check if software trigger enabled */ |
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488 | if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_TRIGGER_SOFTWARE << (Channel & 0x10UL))) |
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489 | { |
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490 | /* Enable the selected DAC software conversion*/ |
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491 | SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2); |
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492 | } |
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493 | } |
||
494 | |||
495 | |||
496 | /* Change DAC state */ |
||
497 | hdac->State = HAL_DAC_STATE_READY; |
||
498 | |||
499 | /* Process unlocked */ |
||
500 | __HAL_UNLOCK(hdac); |
||
501 | |||
502 | /* Return function status */ |
||
503 | return HAL_OK; |
||
504 | } |
||
505 | |||
506 | /** |
||
507 | * @brief Disables DAC and stop conversion of channel. |
||
508 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
||
509 | * the configuration information for the specified DAC. |
||
510 | * @param Channel The selected DAC channel. |
||
511 | * This parameter can be one of the following values: |
||
512 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
||
513 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
||
514 | * @retval HAL status |
||
515 | */ |
||
516 | HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel) |
||
517 | { |
||
518 | /* Check the DAC peripheral handle */ |
||
519 | if (hdac == NULL) |
||
520 | { |
||
521 | return HAL_ERROR; |
||
522 | } |
||
523 | |||
524 | /* Check the parameters */ |
||
525 | assert_param(IS_DAC_CHANNEL(Channel)); |
||
526 | |||
527 | /* Disable the Peripheral */ |
||
528 | __HAL_DAC_DISABLE(hdac, Channel); |
||
529 | |||
530 | /* Change DAC state */ |
||
531 | hdac->State = HAL_DAC_STATE_READY; |
||
532 | |||
533 | /* Return function status */ |
||
534 | return HAL_OK; |
||
535 | } |
||
536 | |||
537 | /** |
||
538 | * @brief Enables DAC and starts conversion of channel. |
||
539 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
||
540 | * the configuration information for the specified DAC. |
||
541 | * @param Channel The selected DAC channel. |
||
542 | * This parameter can be one of the following values: |
||
543 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
||
544 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
||
545 | * @param pData The source Buffer address. |
||
546 | * @param Length The length of data to be transferred from memory to DAC peripheral |
||
547 | * @param Alignment Specifies the data alignment for DAC channel. |
||
548 | * This parameter can be one of the following values: |
||
549 | * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected |
||
550 | * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected |
||
551 | * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected |
||
552 | * @retval HAL status |
||
553 | */ |
||
554 | HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, const uint32_t *pData, uint32_t Length, |
||
555 | uint32_t Alignment) |
||
556 | { |
||
557 | HAL_StatusTypeDef status; |
||
558 | uint32_t tmpreg; |
||
559 | |||
560 | /* Check the DAC peripheral handle */ |
||
561 | if (hdac == NULL) |
||
562 | { |
||
563 | return HAL_ERROR; |
||
564 | } |
||
565 | |||
566 | /* Check the parameters */ |
||
567 | assert_param(IS_DAC_CHANNEL(Channel)); |
||
568 | assert_param(IS_DAC_ALIGN(Alignment)); |
||
569 | |||
570 | /* Process locked */ |
||
571 | __HAL_LOCK(hdac); |
||
572 | |||
573 | /* Change DAC state */ |
||
574 | hdac->State = HAL_DAC_STATE_BUSY; |
||
575 | |||
576 | if (Channel == DAC_CHANNEL_1) |
||
577 | { |
||
578 | /* Set the DMA transfer complete callback for channel1 */ |
||
579 | hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1; |
||
580 | |||
581 | /* Set the DMA half transfer complete callback for channel1 */ |
||
582 | hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1; |
||
583 | |||
584 | /* Set the DMA error callback for channel1 */ |
||
585 | hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1; |
||
586 | |||
587 | /* Enable the selected DAC channel1 DMA request */ |
||
588 | SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); |
||
589 | |||
590 | /* Case of use of channel 1 */ |
||
591 | switch (Alignment) |
||
592 | { |
||
593 | case DAC_ALIGN_12B_R: |
||
594 | /* Get DHR12R1 address */ |
||
595 | tmpreg = (uint32_t)&hdac->Instance->DHR12R1; |
||
596 | break; |
||
597 | case DAC_ALIGN_12B_L: |
||
598 | /* Get DHR12L1 address */ |
||
599 | tmpreg = (uint32_t)&hdac->Instance->DHR12L1; |
||
600 | break; |
||
601 | default: /* case DAC_ALIGN_8B_R */ |
||
602 | /* Get DHR8R1 address */ |
||
603 | tmpreg = (uint32_t)&hdac->Instance->DHR8R1; |
||
604 | break; |
||
605 | } |
||
606 | } |
||
607 | |||
608 | else |
||
609 | { |
||
610 | /* Set the DMA transfer complete callback for channel2 */ |
||
611 | hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2; |
||
612 | |||
613 | /* Set the DMA half transfer complete callback for channel2 */ |
||
614 | hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2; |
||
615 | |||
616 | /* Set the DMA error callback for channel2 */ |
||
617 | hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2; |
||
618 | |||
619 | /* Enable the selected DAC channel2 DMA request */ |
||
620 | SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2); |
||
621 | |||
622 | /* Case of use of channel 2 */ |
||
623 | switch (Alignment) |
||
624 | { |
||
625 | case DAC_ALIGN_12B_R: |
||
626 | /* Get DHR12R2 address */ |
||
627 | tmpreg = (uint32_t)&hdac->Instance->DHR12R2; |
||
628 | break; |
||
629 | case DAC_ALIGN_12B_L: |
||
630 | /* Get DHR12L2 address */ |
||
631 | tmpreg = (uint32_t)&hdac->Instance->DHR12L2; |
||
632 | break; |
||
633 | default: /* case DAC_ALIGN_8B_R */ |
||
634 | /* Get DHR8R2 address */ |
||
635 | tmpreg = (uint32_t)&hdac->Instance->DHR8R2; |
||
636 | break; |
||
637 | } |
||
638 | } |
||
639 | |||
640 | if (Channel == DAC_CHANNEL_1) |
||
641 | { |
||
642 | #if defined(DAC_CR_DMAUDRIE1) |
||
643 | /* Enable the DAC DMA underrun interrupt */ |
||
644 | __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1); |
||
645 | #endif /* DAC_CR_DMAUDRIE1 */ |
||
646 | |||
647 | /* Enable the DMA Stream */ |
||
648 | status = HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length); |
||
649 | } |
||
650 | |||
651 | else |
||
652 | { |
||
653 | #if defined(DAC_CR_DMAUDRIE2) |
||
654 | /* Enable the DAC DMA underrun interrupt */ |
||
655 | __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2); |
||
656 | #endif /* DAC_CR_DMAUDRIE2 */ |
||
657 | |||
658 | /* Enable the DMA Stream */ |
||
659 | status = HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length); |
||
660 | } |
||
661 | |||
662 | |||
663 | /* Process Unlocked */ |
||
664 | __HAL_UNLOCK(hdac); |
||
665 | |||
666 | if (status == HAL_OK) |
||
667 | { |
||
668 | /* Enable the Peripheral */ |
||
669 | __HAL_DAC_ENABLE(hdac, Channel); |
||
670 | } |
||
671 | else |
||
672 | { |
||
673 | hdac->ErrorCode |= HAL_DAC_ERROR_DMA; |
||
674 | } |
||
675 | |||
676 | /* Return function status */ |
||
677 | return status; |
||
678 | } |
||
679 | |||
680 | /** |
||
681 | * @brief Disables DAC and stop conversion of channel. |
||
682 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
||
683 | * the configuration information for the specified DAC. |
||
684 | * @param Channel The selected DAC channel. |
||
685 | * This parameter can be one of the following values: |
||
686 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
||
687 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
||
688 | * @retval HAL status |
||
689 | */ |
||
690 | HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel) |
||
691 | { |
||
692 | /* Check the DAC peripheral handle */ |
||
693 | if (hdac == NULL) |
||
694 | { |
||
695 | return HAL_ERROR; |
||
696 | } |
||
697 | |||
698 | /* Check the parameters */ |
||
699 | assert_param(IS_DAC_CHANNEL(Channel)); |
||
700 | |||
701 | /* Disable the selected DAC channel DMA request */ |
||
702 | hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << (Channel & 0x10UL)); |
||
703 | |||
704 | /* Disable the Peripheral */ |
||
705 | __HAL_DAC_DISABLE(hdac, Channel); |
||
706 | |||
707 | /* Disable the DMA Stream */ |
||
708 | |||
709 | /* Channel1 is used */ |
||
710 | if (Channel == DAC_CHANNEL_1) |
||
711 | { |
||
712 | /* Disable the DMA Stream */ |
||
713 | (void)HAL_DMA_Abort(hdac->DMA_Handle1); |
||
714 | |||
715 | #if defined(DAC_CR_DMAUDRIE1) |
||
716 | /* Disable the DAC DMA underrun interrupt */ |
||
717 | __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1); |
||
718 | #endif /* DAC_CR_DMAUDRIE1 */ |
||
719 | } |
||
720 | |||
721 | else /* Channel2 is used for */ |
||
722 | { |
||
723 | /* Disable the DMA Stream */ |
||
724 | (void)HAL_DMA_Abort(hdac->DMA_Handle2); |
||
725 | |||
726 | #if defined(DAC_CR_DMAUDRIE2) |
||
727 | /* Disable the DAC DMA underrun interrupt */ |
||
728 | __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2); |
||
729 | #endif /* DAC_CR_DMAUDRIE2 */ |
||
730 | } |
||
731 | |||
732 | |||
733 | /* Change DAC state */ |
||
734 | hdac->State = HAL_DAC_STATE_READY; |
||
735 | |||
736 | /* Return function status */ |
||
737 | return HAL_OK; |
||
738 | } |
||
739 | |||
740 | /** |
||
741 | * @brief Handles DAC interrupt request |
||
742 | * This function uses the interruption of DMA |
||
743 | * underrun. |
||
744 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
||
745 | * the configuration information for the specified DAC. |
||
746 | * @retval None |
||
747 | */ |
||
748 | void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac) |
||
749 | { |
||
750 | #if !defined(DAC_SR_DMAUDR1) && !defined(DAC_SR_DMAUDR2) |
||
751 | UNUSED(hdac); |
||
752 | #else |
||
753 | uint32_t itsource = hdac->Instance->CR; |
||
754 | uint32_t itflag = hdac->Instance->SR; |
||
755 | #endif /* !DAC_SR_DMAUDR1 && !DAC_SR_DMAUDR2 */ |
||
756 | |||
757 | #if defined(DAC_SR_DMAUDR1) |
||
758 | if ((itsource & DAC_IT_DMAUDR1) == DAC_IT_DMAUDR1) |
||
759 | { |
||
760 | /* Check underrun flag of DAC channel 1 */ |
||
761 | if ((itflag & DAC_FLAG_DMAUDR1) == DAC_FLAG_DMAUDR1) |
||
762 | { |
||
763 | /* Change DAC state to error state */ |
||
764 | hdac->State = HAL_DAC_STATE_ERROR; |
||
765 | |||
766 | /* Set DAC error code to channel1 DMA underrun error */ |
||
767 | SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1); |
||
768 | |||
769 | /* Clear the underrun flag */ |
||
770 | __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR1); |
||
771 | |||
772 | /* Disable the selected DAC channel1 DMA request */ |
||
773 | __HAL_DAC_DISABLE_IT(hdac, DAC_CR_DMAEN1); |
||
774 | |||
775 | /* Error callback */ |
||
776 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
||
777 | hdac->DMAUnderrunCallbackCh1(hdac); |
||
778 | #else |
||
779 | HAL_DAC_DMAUnderrunCallbackCh1(hdac); |
||
780 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
||
781 | } |
||
782 | } |
||
783 | #endif /* DAC_SR_DMAUDR1 */ |
||
784 | |||
785 | #if defined(DAC_SR_DMAUDR2) |
||
786 | if ((itsource & DAC_IT_DMAUDR2) == DAC_IT_DMAUDR2) |
||
787 | { |
||
788 | /* Check underrun flag of DAC channel 2 */ |
||
789 | if ((itflag & DAC_FLAG_DMAUDR2) == DAC_FLAG_DMAUDR2) |
||
790 | { |
||
791 | /* Change DAC state to error state */ |
||
792 | hdac->State = HAL_DAC_STATE_ERROR; |
||
793 | |||
794 | /* Set DAC error code to channel2 DMA underrun error */ |
||
795 | SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2); |
||
796 | |||
797 | /* Clear the underrun flag */ |
||
798 | __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR2); |
||
799 | |||
800 | /* Disable the selected DAC channel2 DMA request */ |
||
801 | __HAL_DAC_DISABLE_IT(hdac, DAC_CR_DMAEN2); |
||
802 | |||
803 | /* Error callback */ |
||
804 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
||
805 | hdac->DMAUnderrunCallbackCh2(hdac); |
||
806 | #else |
||
807 | HAL_DACEx_DMAUnderrunCallbackCh2(hdac); |
||
808 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
||
809 | } |
||
810 | } |
||
811 | #endif /* DAC_SR_DMAUDR2 */ |
||
812 | } |
||
813 | |||
814 | /** |
||
815 | * @brief Set the specified data holding register value for DAC channel. |
||
816 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
||
817 | * the configuration information for the specified DAC. |
||
818 | * @param Channel The selected DAC channel. |
||
819 | * This parameter can be one of the following values: |
||
820 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
||
821 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
||
822 | * @param Alignment Specifies the data alignment. |
||
823 | * This parameter can be one of the following values: |
||
824 | * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected |
||
825 | * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected |
||
826 | * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected |
||
827 | * @param Data Data to be loaded in the selected data holding register. |
||
828 | * @retval HAL status |
||
829 | */ |
||
830 | HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data) |
||
831 | { |
||
832 | __IO uint32_t tmp = 0UL; |
||
833 | |||
834 | /* Check the DAC peripheral handle */ |
||
835 | if (hdac == NULL) |
||
836 | { |
||
837 | return HAL_ERROR; |
||
838 | } |
||
839 | |||
840 | /* Check the parameters */ |
||
841 | assert_param(IS_DAC_CHANNEL(Channel)); |
||
842 | assert_param(IS_DAC_ALIGN(Alignment)); |
||
843 | assert_param(IS_DAC_DATA(Data)); |
||
844 | |||
845 | tmp = (uint32_t)hdac->Instance; |
||
846 | if (Channel == DAC_CHANNEL_1) |
||
847 | { |
||
848 | tmp += DAC_DHR12R1_ALIGNMENT(Alignment); |
||
849 | } |
||
850 | |||
851 | else |
||
852 | { |
||
853 | tmp += DAC_DHR12R2_ALIGNMENT(Alignment); |
||
854 | } |
||
855 | |||
856 | |||
857 | /* Set the DAC channel selected data holding register */ |
||
858 | *(__IO uint32_t *) tmp = Data; |
||
859 | |||
860 | /* Return function status */ |
||
861 | return HAL_OK; |
||
862 | } |
||
863 | |||
864 | /** |
||
865 | * @brief Conversion complete callback in non-blocking mode for Channel1 |
||
866 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
||
867 | * the configuration information for the specified DAC. |
||
868 | * @retval None |
||
869 | */ |
||
870 | __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac) |
||
871 | { |
||
872 | /* Prevent unused argument(s) compilation warning */ |
||
873 | UNUSED(hdac); |
||
874 | |||
875 | /* NOTE : This function should not be modified, when the callback is needed, |
||
876 | the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file |
||
877 | */ |
||
878 | } |
||
879 | |||
880 | /** |
||
881 | * @brief Conversion half DMA transfer callback in non-blocking mode for Channel1 |
||
882 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
||
883 | * the configuration information for the specified DAC. |
||
884 | * @retval None |
||
885 | */ |
||
886 | __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac) |
||
887 | { |
||
888 | /* Prevent unused argument(s) compilation warning */ |
||
889 | UNUSED(hdac); |
||
890 | |||
891 | /* NOTE : This function should not be modified, when the callback is needed, |
||
892 | the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file |
||
893 | */ |
||
894 | } |
||
895 | |||
896 | /** |
||
897 | * @brief Error DAC callback for Channel1. |
||
898 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
||
899 | * the configuration information for the specified DAC. |
||
900 | * @retval None |
||
901 | */ |
||
902 | __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac) |
||
903 | { |
||
904 | /* Prevent unused argument(s) compilation warning */ |
||
905 | UNUSED(hdac); |
||
906 | |||
907 | /* NOTE : This function should not be modified, when the callback is needed, |
||
908 | the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file |
||
909 | */ |
||
910 | } |
||
911 | |||
912 | /** |
||
913 | * @brief DMA underrun DAC callback for channel1. |
||
914 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
||
915 | * the configuration information for the specified DAC. |
||
916 | * @retval None |
||
917 | */ |
||
918 | __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac) |
||
919 | { |
||
920 | /* Prevent unused argument(s) compilation warning */ |
||
921 | UNUSED(hdac); |
||
922 | |||
923 | /* NOTE : This function should not be modified, when the callback is needed, |
||
924 | the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file |
||
925 | */ |
||
926 | } |
||
927 | |||
928 | /** |
||
929 | * @} |
||
930 | */ |
||
931 | |||
932 | /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions |
||
933 | * @brief Peripheral Control functions |
||
934 | * |
||
935 | @verbatim |
||
936 | ============================================================================== |
||
937 | ##### Peripheral Control functions ##### |
||
938 | ============================================================================== |
||
939 | [..] This section provides functions allowing to: |
||
940 | (+) Configure channels. |
||
941 | (+) Set the specified data holding register value for DAC channel. |
||
942 | |||
943 | @endverbatim |
||
944 | * @{ |
||
945 | */ |
||
946 | |||
947 | /** |
||
948 | * @brief Returns the last data output value of the selected DAC channel. |
||
949 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
||
950 | * the configuration information for the specified DAC. |
||
951 | * @param Channel The selected DAC channel. |
||
952 | * This parameter can be one of the following values: |
||
953 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
||
954 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
||
955 | * @retval The selected DAC channel data output value. |
||
956 | */ |
||
957 | uint32_t HAL_DAC_GetValue(const DAC_HandleTypeDef *hdac, uint32_t Channel) |
||
958 | { |
||
959 | uint32_t result; |
||
960 | |||
961 | /* Check the DAC peripheral handle */ |
||
962 | if (hdac == NULL) |
||
963 | { |
||
964 | return HAL_ERROR; |
||
965 | } |
||
966 | |||
967 | /* Check the parameters */ |
||
968 | assert_param(IS_DAC_CHANNEL(Channel)); |
||
969 | |||
970 | if (Channel == DAC_CHANNEL_1) |
||
971 | { |
||
972 | result = hdac->Instance->DOR1; |
||
973 | } |
||
974 | |||
975 | else |
||
976 | { |
||
977 | result = hdac->Instance->DOR2; |
||
978 | } |
||
979 | |||
980 | /* Returns the DAC channel data output register value */ |
||
981 | return result; |
||
982 | } |
||
983 | |||
984 | /** |
||
985 | * @brief Configures the selected DAC channel. |
||
986 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
||
987 | * the configuration information for the specified DAC. |
||
988 | * @param sConfig DAC configuration structure. |
||
989 | * @param Channel The selected DAC channel. |
||
990 | * This parameter can be one of the following values: |
||
991 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
||
992 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
||
993 | * @retval HAL status |
||
994 | */ |
||
995 | HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, |
||
996 | const DAC_ChannelConfTypeDef *sConfig, uint32_t Channel) |
||
997 | { |
||
998 | HAL_StatusTypeDef status = HAL_OK; |
||
999 | uint32_t tmpreg1; |
||
1000 | uint32_t tmpreg2; |
||
1001 | |||
1002 | /* Check the DAC peripheral handle and channel configuration struct */ |
||
1003 | if ((hdac == NULL) || (sConfig == NULL)) |
||
1004 | { |
||
1005 | return HAL_ERROR; |
||
1006 | } |
||
1007 | |||
1008 | /* Check the DAC parameters */ |
||
1009 | assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger)); |
||
1010 | assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer)); |
||
1011 | assert_param(IS_DAC_CHANNEL(Channel)); |
||
1012 | |||
1013 | /* Process locked */ |
||
1014 | __HAL_LOCK(hdac); |
||
1015 | |||
1016 | /* Change DAC state */ |
||
1017 | hdac->State = HAL_DAC_STATE_BUSY; |
||
1018 | |||
1019 | /* Get the DAC CR value */ |
||
1020 | tmpreg1 = hdac->Instance->CR; |
||
1021 | /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */ |
||
1022 | tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) |
||
1023 | << (Channel & 0x10UL)); |
||
1024 | /* Configure for the selected DAC channel: buffer output, trigger */ |
||
1025 | /* Set TSELx and TENx bits according to DAC_Trigger value */ |
||
1026 | /* Set BOFFx bit according to DAC_OutputBuffer value */ |
||
1027 | tmpreg2 = (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer); |
||
1028 | /* Calculate CR register value depending on DAC_Channel */ |
||
1029 | tmpreg1 |= tmpreg2 << (Channel & 0x10UL); |
||
1030 | /* Write to DAC CR */ |
||
1031 | hdac->Instance->CR = tmpreg1; |
||
1032 | /* Disable wave generation */ |
||
1033 | CLEAR_BIT(hdac->Instance->CR, (DAC_CR_WAVE1 << (Channel & 0x10UL))); |
||
1034 | |||
1035 | /* Change DAC state */ |
||
1036 | hdac->State = HAL_DAC_STATE_READY; |
||
1037 | |||
1038 | /* Process unlocked */ |
||
1039 | __HAL_UNLOCK(hdac); |
||
1040 | |||
1041 | /* Return function status */ |
||
1042 | return status; |
||
1043 | } |
||
1044 | |||
1045 | /** |
||
1046 | * @} |
||
1047 | */ |
||
1048 | |||
1049 | /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions |
||
1050 | * @brief Peripheral State and Errors functions |
||
1051 | * |
||
1052 | @verbatim |
||
1053 | ============================================================================== |
||
1054 | ##### Peripheral State and Errors functions ##### |
||
1055 | ============================================================================== |
||
1056 | [..] |
||
1057 | This subsection provides functions allowing to |
||
1058 | (+) Check the DAC state. |
||
1059 | (+) Check the DAC Errors. |
||
1060 | |||
1061 | @endverbatim |
||
1062 | * @{ |
||
1063 | */ |
||
1064 | |||
1065 | /** |
||
1066 | * @brief return the DAC handle state |
||
1067 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
||
1068 | * the configuration information for the specified DAC. |
||
1069 | * @retval HAL state |
||
1070 | */ |
||
1071 | HAL_DAC_StateTypeDef HAL_DAC_GetState(const DAC_HandleTypeDef *hdac) |
||
1072 | { |
||
1073 | /* Return DAC handle state */ |
||
1074 | return hdac->State; |
||
1075 | } |
||
1076 | |||
1077 | |||
1078 | /** |
||
1079 | * @brief Return the DAC error code |
||
1080 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
||
1081 | * the configuration information for the specified DAC. |
||
1082 | * @retval DAC Error Code |
||
1083 | */ |
||
1084 | uint32_t HAL_DAC_GetError(const DAC_HandleTypeDef *hdac) |
||
1085 | { |
||
1086 | return hdac->ErrorCode; |
||
1087 | } |
||
1088 | |||
1089 | /** |
||
1090 | * @} |
||
1091 | */ |
||
1092 | |||
1093 | /** |
||
1094 | * @} |
||
1095 | */ |
||
1096 | |||
1097 | /** @addtogroup DAC_Exported_Functions |
||
1098 | * @{ |
||
1099 | */ |
||
1100 | |||
1101 | /** @addtogroup DAC_Exported_Functions_Group1 |
||
1102 | * @{ |
||
1103 | */ |
||
1104 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
||
1105 | /** |
||
1106 | * @brief Register a User DAC Callback |
||
1107 | * To be used instead of the weak (overridden) predefined callback |
||
1108 | * @note The HAL_DAC_RegisterCallback() may be called before HAL_DAC_Init() in HAL_DAC_STATE_RESET to register |
||
1109 | * callbacks for HAL_DAC_MSPINIT_CB_ID and HAL_DAC_MSPDEINIT_CB_ID |
||
1110 | * @param hdac DAC handle |
||
1111 | * @param CallbackID ID of the callback to be registered |
||
1112 | * This parameter can be one of the following values: |
||
1113 | * @arg @ref HAL_DAC_ERROR_INVALID_CALLBACK DAC Error Callback ID |
||
1114 | * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 Complete Callback ID |
||
1115 | * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID |
||
1116 | * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID |
||
1117 | * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID |
||
1118 | * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID |
||
1119 | * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID |
||
1120 | * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID |
||
1121 | * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID |
||
1122 | * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID |
||
1123 | * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID |
||
1124 | * |
||
1125 | * @param pCallback pointer to the Callback function |
||
1126 | * @retval status |
||
1127 | */ |
||
1128 | HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID, |
||
1129 | pDAC_CallbackTypeDef pCallback) |
||
1130 | { |
||
1131 | HAL_StatusTypeDef status = HAL_OK; |
||
1132 | |||
1133 | /* Check the DAC peripheral handle */ |
||
1134 | if (hdac == NULL) |
||
1135 | { |
||
1136 | return HAL_ERROR; |
||
1137 | } |
||
1138 | |||
1139 | if (pCallback == NULL) |
||
1140 | { |
||
1141 | /* Update the error code */ |
||
1142 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
||
1143 | return HAL_ERROR; |
||
1144 | } |
||
1145 | |||
1146 | if (hdac->State == HAL_DAC_STATE_READY) |
||
1147 | { |
||
1148 | switch (CallbackID) |
||
1149 | { |
||
1150 | case HAL_DAC_CH1_COMPLETE_CB_ID : |
||
1151 | hdac->ConvCpltCallbackCh1 = pCallback; |
||
1152 | break; |
||
1153 | case HAL_DAC_CH1_HALF_COMPLETE_CB_ID : |
||
1154 | hdac->ConvHalfCpltCallbackCh1 = pCallback; |
||
1155 | break; |
||
1156 | case HAL_DAC_CH1_ERROR_ID : |
||
1157 | hdac->ErrorCallbackCh1 = pCallback; |
||
1158 | break; |
||
1159 | case HAL_DAC_CH1_UNDERRUN_CB_ID : |
||
1160 | hdac->DMAUnderrunCallbackCh1 = pCallback; |
||
1161 | break; |
||
1162 | |||
1163 | case HAL_DAC_CH2_COMPLETE_CB_ID : |
||
1164 | hdac->ConvCpltCallbackCh2 = pCallback; |
||
1165 | break; |
||
1166 | case HAL_DAC_CH2_HALF_COMPLETE_CB_ID : |
||
1167 | hdac->ConvHalfCpltCallbackCh2 = pCallback; |
||
1168 | break; |
||
1169 | case HAL_DAC_CH2_ERROR_ID : |
||
1170 | hdac->ErrorCallbackCh2 = pCallback; |
||
1171 | break; |
||
1172 | case HAL_DAC_CH2_UNDERRUN_CB_ID : |
||
1173 | hdac->DMAUnderrunCallbackCh2 = pCallback; |
||
1174 | break; |
||
1175 | |||
1176 | case HAL_DAC_MSPINIT_CB_ID : |
||
1177 | hdac->MspInitCallback = pCallback; |
||
1178 | break; |
||
1179 | case HAL_DAC_MSPDEINIT_CB_ID : |
||
1180 | hdac->MspDeInitCallback = pCallback; |
||
1181 | break; |
||
1182 | default : |
||
1183 | /* Update the error code */ |
||
1184 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
||
1185 | /* update return status */ |
||
1186 | status = HAL_ERROR; |
||
1187 | break; |
||
1188 | } |
||
1189 | } |
||
1190 | else if (hdac->State == HAL_DAC_STATE_RESET) |
||
1191 | { |
||
1192 | switch (CallbackID) |
||
1193 | { |
||
1194 | case HAL_DAC_MSPINIT_CB_ID : |
||
1195 | hdac->MspInitCallback = pCallback; |
||
1196 | break; |
||
1197 | case HAL_DAC_MSPDEINIT_CB_ID : |
||
1198 | hdac->MspDeInitCallback = pCallback; |
||
1199 | break; |
||
1200 | default : |
||
1201 | /* Update the error code */ |
||
1202 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
||
1203 | /* update return status */ |
||
1204 | status = HAL_ERROR; |
||
1205 | break; |
||
1206 | } |
||
1207 | } |
||
1208 | else |
||
1209 | { |
||
1210 | /* Update the error code */ |
||
1211 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
||
1212 | /* update return status */ |
||
1213 | status = HAL_ERROR; |
||
1214 | } |
||
1215 | |||
1216 | return status; |
||
1217 | } |
||
1218 | |||
1219 | /** |
||
1220 | * @brief Unregister a User DAC Callback |
||
1221 | * DAC Callback is redirected to the weak (overridden) predefined callback |
||
1222 | * @note The HAL_DAC_UnRegisterCallback() may be called before HAL_DAC_Init() in HAL_DAC_STATE_RESET to un-register |
||
1223 | * callbacks for HAL_DAC_MSPINIT_CB_ID and HAL_DAC_MSPDEINIT_CB_ID |
||
1224 | * @param hdac DAC handle |
||
1225 | * @param CallbackID ID of the callback to be unregistered |
||
1226 | * This parameter can be one of the following values: |
||
1227 | * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 transfer Complete Callback ID |
||
1228 | * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID |
||
1229 | * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID |
||
1230 | * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID |
||
1231 | * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID |
||
1232 | * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID |
||
1233 | * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID |
||
1234 | * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID |
||
1235 | * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID |
||
1236 | * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID |
||
1237 | * @arg @ref HAL_DAC_ALL_CB_ID DAC All callbacks |
||
1238 | * @retval status |
||
1239 | */ |
||
1240 | HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID) |
||
1241 | { |
||
1242 | HAL_StatusTypeDef status = HAL_OK; |
||
1243 | |||
1244 | /* Check the DAC peripheral handle */ |
||
1245 | if (hdac == NULL) |
||
1246 | { |
||
1247 | return HAL_ERROR; |
||
1248 | } |
||
1249 | |||
1250 | if (hdac->State == HAL_DAC_STATE_READY) |
||
1251 | { |
||
1252 | switch (CallbackID) |
||
1253 | { |
||
1254 | case HAL_DAC_CH1_COMPLETE_CB_ID : |
||
1255 | hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1; |
||
1256 | break; |
||
1257 | case HAL_DAC_CH1_HALF_COMPLETE_CB_ID : |
||
1258 | hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1; |
||
1259 | break; |
||
1260 | case HAL_DAC_CH1_ERROR_ID : |
||
1261 | hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1; |
||
1262 | break; |
||
1263 | case HAL_DAC_CH1_UNDERRUN_CB_ID : |
||
1264 | hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1; |
||
1265 | break; |
||
1266 | |||
1267 | case HAL_DAC_CH2_COMPLETE_CB_ID : |
||
1268 | hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2; |
||
1269 | break; |
||
1270 | case HAL_DAC_CH2_HALF_COMPLETE_CB_ID : |
||
1271 | hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2; |
||
1272 | break; |
||
1273 | case HAL_DAC_CH2_ERROR_ID : |
||
1274 | hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2; |
||
1275 | break; |
||
1276 | case HAL_DAC_CH2_UNDERRUN_CB_ID : |
||
1277 | hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2; |
||
1278 | break; |
||
1279 | |||
1280 | case HAL_DAC_MSPINIT_CB_ID : |
||
1281 | hdac->MspInitCallback = HAL_DAC_MspInit; |
||
1282 | break; |
||
1283 | case HAL_DAC_MSPDEINIT_CB_ID : |
||
1284 | hdac->MspDeInitCallback = HAL_DAC_MspDeInit; |
||
1285 | break; |
||
1286 | case HAL_DAC_ALL_CB_ID : |
||
1287 | hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1; |
||
1288 | hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1; |
||
1289 | hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1; |
||
1290 | hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1; |
||
1291 | |||
1292 | hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2; |
||
1293 | hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2; |
||
1294 | hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2; |
||
1295 | hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2; |
||
1296 | |||
1297 | hdac->MspInitCallback = HAL_DAC_MspInit; |
||
1298 | hdac->MspDeInitCallback = HAL_DAC_MspDeInit; |
||
1299 | break; |
||
1300 | default : |
||
1301 | /* Update the error code */ |
||
1302 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
||
1303 | /* update return status */ |
||
1304 | status = HAL_ERROR; |
||
1305 | break; |
||
1306 | } |
||
1307 | } |
||
1308 | else if (hdac->State == HAL_DAC_STATE_RESET) |
||
1309 | { |
||
1310 | switch (CallbackID) |
||
1311 | { |
||
1312 | case HAL_DAC_MSPINIT_CB_ID : |
||
1313 | hdac->MspInitCallback = HAL_DAC_MspInit; |
||
1314 | break; |
||
1315 | case HAL_DAC_MSPDEINIT_CB_ID : |
||
1316 | hdac->MspDeInitCallback = HAL_DAC_MspDeInit; |
||
1317 | break; |
||
1318 | default : |
||
1319 | /* Update the error code */ |
||
1320 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
||
1321 | /* update return status */ |
||
1322 | status = HAL_ERROR; |
||
1323 | break; |
||
1324 | } |
||
1325 | } |
||
1326 | else |
||
1327 | { |
||
1328 | /* Update the error code */ |
||
1329 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
||
1330 | /* update return status */ |
||
1331 | status = HAL_ERROR; |
||
1332 | } |
||
1333 | |||
1334 | return status; |
||
1335 | } |
||
1336 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
||
1337 | |||
1338 | /** |
||
1339 | * @} |
||
1340 | */ |
||
1341 | |||
1342 | /** |
||
1343 | * @} |
||
1344 | */ |
||
1345 | |||
1346 | /** @addtogroup DAC_Private_Functions |
||
1347 | * @{ |
||
1348 | */ |
||
1349 | |||
1350 | /** |
||
1351 | * @brief DMA conversion complete callback. |
||
1352 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
||
1353 | * the configuration information for the specified DMA module. |
||
1354 | * @retval None |
||
1355 | */ |
||
1356 | void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma) |
||
1357 | { |
||
1358 | DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; |
||
1359 | |||
1360 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
||
1361 | hdac->ConvCpltCallbackCh1(hdac); |
||
1362 | #else |
||
1363 | HAL_DAC_ConvCpltCallbackCh1(hdac); |
||
1364 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
||
1365 | |||
1366 | hdac->State = HAL_DAC_STATE_READY; |
||
1367 | } |
||
1368 | |||
1369 | /** |
||
1370 | * @brief DMA half transfer complete callback. |
||
1371 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
||
1372 | * the configuration information for the specified DMA module. |
||
1373 | * @retval None |
||
1374 | */ |
||
1375 | void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma) |
||
1376 | { |
||
1377 | DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; |
||
1378 | /* Conversion complete callback */ |
||
1379 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
||
1380 | hdac->ConvHalfCpltCallbackCh1(hdac); |
||
1381 | #else |
||
1382 | HAL_DAC_ConvHalfCpltCallbackCh1(hdac); |
||
1383 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
||
1384 | } |
||
1385 | |||
1386 | /** |
||
1387 | * @brief DMA error callback |
||
1388 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
||
1389 | * the configuration information for the specified DMA module. |
||
1390 | * @retval None |
||
1391 | */ |
||
1392 | void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma) |
||
1393 | { |
||
1394 | DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; |
||
1395 | |||
1396 | /* Set DAC error code to DMA error */ |
||
1397 | hdac->ErrorCode |= HAL_DAC_ERROR_DMA; |
||
1398 | |||
1399 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
||
1400 | hdac->ErrorCallbackCh1(hdac); |
||
1401 | #else |
||
1402 | HAL_DAC_ErrorCallbackCh1(hdac); |
||
1403 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
||
1404 | |||
1405 | hdac->State = HAL_DAC_STATE_READY; |
||
1406 | } |
||
1407 | |||
1408 | /** |
||
1409 | * @} |
||
1410 | */ |
||
1411 | |||
1412 | /** |
||
1413 | * @} |
||
1414 | */ |
||
1415 | |||
1416 | #endif /* DAC */ |
||
1417 | |||
1418 | #endif /* HAL_DAC_MODULE_ENABLED */ |
||
1419 | /** |
||
1420 | * @} |
||
1421 | */ |